From f7f1da989464e57610b566fdaa04f1e13423f358 Mon Sep 17 00:00:00 2001 From: scpcom Date: Mon, 17 Feb 2025 02:11:13 +0100 Subject: [PATCH 1/3] add support for gc4653 720p60 --- .../sensor/cv182x/gcore_gc4653/gc4653_cmos.c | 36 +++- .../cv182x/gcore_gc4653/gc4653_cmos_ex.h | 1 + .../cv182x/gcore_gc4653/gc4653_cmos_param.h | 41 +++++ .../cv182x/gcore_gc4653/gc4653_sensor_ctl.c | 172 +++++++++++++++++- 4 files changed, 245 insertions(+), 5 deletions(-) diff --git a/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_cmos.c b/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_cmos.c index 85b4c81f15..4e698cc6f0 100644 --- a/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_cmos.c +++ b/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_cmos.c @@ -90,6 +90,7 @@ static CVI_S32 cmos_get_wdr_size(VI_PIPE ViPipe, ISP_SNS_ISP_INFO_S *pstIspCfg); #define GC4653_FRAME_BUF_ADDR 0x031D #define GC4653_RES_IS_1440P(w, h) ((w) <= 2560 && (h) <= 1440) +#define GC4653_RES_IS_720P(w, h) ((w) <= 1280 && (h) <= 720) static CVI_S32 cmos_get_ae_default(VI_PIPE ViPipe, AE_SENSOR_DEFAULT_S *pstAeSnsDft) { @@ -485,15 +486,13 @@ static CVI_S32 cmos_set_wdr_mode(VI_PIPE ViPipe, CVI_U8 u8Mode) CMOS_CHECK_POINTER(pstSnsState); pstSnsState->bSyncInit = CVI_FALSE; - switch (u8Mode) { case WDR_MODE_NONE: - pstSnsState->u8ImgMode = GC4653_MODE_2560X1440P30; + // pstSnsState->u8ImgMode = GC4653_MODE_2560X1440P30; pstSnsState->enWDRMode = WDR_MODE_NONE; pstSnsState->u32FLStd = g_astGc4653_mode[pstSnsState->u8ImgMode].u32VtsDef; syslog(LOG_INFO, "WDR_MODE_NONE\n"); break; - case WDR_MODE_2To1_LINE: default: CVI_TRACE_SNS(CVI_DBG_ERR, "Unsupport sensor mode!\n"); @@ -683,6 +682,21 @@ static CVI_S32 cmos_set_image_mode(VI_PIPE ViPipe, ISP_CMOS_SENSOR_IMAGE_MODE_S pstSnsState->enWDRMode); return CVI_FAILURE; } + } else if (pstSensorImageMode->f32Fps <= 60) { + if (pstSnsState->enWDRMode == WDR_MODE_NONE) { + if (GC4653_RES_IS_720P(pstSensorImageMode->u16Width, pstSensorImageMode->u16Height)) + u8SensorImageMode = GC4653_MODE_1280X720P60; + else { + u8SensorImageMode = GC4653_MODE_2560X1440P30; + } + } else { + CVI_TRACE_SNS(CVI_DBG_ERR, "Not support! Width:%d, Height:%d, Fps:%f, WDRMode:%d\n", + pstSensorImageMode->u16Width, + pstSensorImageMode->u16Height, + pstSensorImageMode->f32Fps, + pstSnsState->enWDRMode); + return CVI_FAILURE; + } } else { CVI_TRACE_SNS(CVI_DBG_ERR, "Not support this Fps:%f\n", pstSensorImageMode->f32Fps); return CVI_FAILURE; @@ -763,7 +777,21 @@ static CVI_S32 sensor_rx_attr(VI_PIPE ViPipe, SNS_COMBO_DEV_ATTR_S *pstRxAttr) CMOS_CHECK_POINTER(pstRxAttr); memcpy(pstRxAttr, &gc4653_rx_attr, sizeof(*pstRxAttr)); - + if (pstSnsState->u8ImgMode == GC4653_MODE_1280X720P60) { + char *value = getenv("MAIX_SENSOR_FPS"); + if (value == NULL) { + pstRxAttr->mclk.freq = CAMPLL_FREQ_27M; + } else { + int fps = atoi(value); + if (fps == 80) { + pstRxAttr->mclk.freq = CAMPLL_FREQ_37P125M; + } else { + pstRxAttr->mclk.freq = CAMPLL_FREQ_27M; + } + } + } else if (pstSnsState->u8ImgMode == GC4653_MODE_2560X1440P30) { + pstRxAttr->mclk.freq = CAMPLL_FREQ_24M; + } pstRxAttr->img_size.width = g_astGc4653_mode[pstSnsState->u8ImgMode].astImg[0].stSnsSize.u32Width; pstRxAttr->img_size.height = g_astGc4653_mode[pstSnsState->u8ImgMode].astImg[0].stSnsSize.u32Height; if (pstSnsState->enWDRMode == WDR_MODE_NONE) diff --git a/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_cmos_ex.h b/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_cmos_ex.h index eb04a9fb53..5a78ff18fa 100644 --- a/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_cmos_ex.h +++ b/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_cmos_ex.h @@ -45,6 +45,7 @@ enum gc4653_linear_regs_e { typedef enum _GC4653_MODE_E { GC4653_MODE_2560X1440P30 = 0, GC4653_MODE_LINEAR_NUM, + GC4653_MODE_1280X720P60, GC4653_MODE_NUM } GC4653_MODE_E; diff --git a/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_cmos_param.h b/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_cmos_param.h index f848d7f52f..d5147f3eaa 100644 --- a/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_cmos_param.h +++ b/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_cmos_param.h @@ -61,6 +61,47 @@ static const GC4653_MODE_S g_astGc4653_mode[GC4653_MODE_NUM] = { .u32Step = 64, }, }, + [GC4653_MODE_1280X720P60] = { + .name = "1280X720P30", + .astImg[0] = { + .stSnsSize = { + .u32Width = 1280, + .u32Height = 720, + }, + .stWndRect = { + .s32X = 0, + .s32Y = 0, + .u32Width = 1280, + .u32Height = 720, + }, + .stMaxSize = { + .u32Width = 1280, + .u32Height = 720, + }, + }, + .f32MaxFps = 60, + .f32MinFps = 2.75, /* 1500 * 30 / 16383 */ + .u32HtsDef = 1500, + .u32VtsDef = 750,//650 + .stExp[0] = { + .u16Min = 1, + .u16Max = 0x3fff, + .u16Def = 0x2000, + .u16Step = 1, + }, + .stAgain[0] = { + .u32Min = 1024, + .u32Max = 77648, + .u32Def = 1024, + .u32Step = 1, + }, + .stDgain[0] = { + .u32Min = 1024, + .u32Max = 16368, + .u32Def = 1024, + .u32Step = 64, + }, + } }; static ISP_CMOS_NOISE_CALIBRATION_S g_stIspNoiseCalibratio = {.CalibrationCoef = { diff --git a/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_sensor_ctl.c b/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_sensor_ctl.c index 4745f3d53a..58dd583c70 100644 --- a/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_sensor_ctl.c +++ b/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_sensor_ctl.c @@ -22,6 +22,7 @@ #define GC4653_CHIP_ID 0x4653 static void gc4653_linear_1440p30_init(VI_PIPE ViPipe); +static void gc4653_linear_720p60_init(VI_PIPE ViPipe); CVI_U8 gc4653_i2c_addr = 0x29; const CVI_U32 gc4653_addr_byte = 2; @@ -200,9 +201,17 @@ int gc4653_probe(VI_PIPE ViPipe) void gc4653_init(VI_PIPE ViPipe) { + CVI_U8 u8ImgMode; + gc4653_i2c_init(ViPipe); - gc4653_linear_1440p30_init(ViPipe); + u8ImgMode = g_pastGc4653[ViPipe]->u8ImgMode; + + if (u8ImgMode == GC4653_MODE_1280X720P60) { + gc4653_linear_720p60_init(ViPipe); + } else { + gc4653_linear_1440p30_init(ViPipe); + } g_pastGc4653[ViPipe]->bInit = CVI_TRUE; } @@ -365,3 +374,164 @@ static void gc4653_linear_1440p30_init(VI_PIPE ViPipe) printf("ViPipe:%d,===GC4653 1440P 30fps 10bit LINEAR Init OK!===\n", ViPipe); } + +static void gc4653_linear_720p60_init(VI_PIPE ViPipe) +{ + gc4653_write_register(ViPipe, 0x03fe, 0xf0); + gc4653_write_register(ViPipe, 0x03fe, 0x00); + gc4653_write_register(ViPipe, 0x0317, 0x00); + gc4653_write_register(ViPipe, 0x0320, 0x77); + gc4653_write_register(ViPipe, 0x0324, 0xc8); + gc4653_write_register(ViPipe, 0x0325, 0x06); + gc4653_write_register(ViPipe, 0x0326, 0x60); + gc4653_write_register(ViPipe, 0x0327, 0x03); + gc4653_write_register(ViPipe, 0x0334, 0x40); + gc4653_write_register(ViPipe, 0x0336, 0x60); + gc4653_write_register(ViPipe, 0x0337, 0x82); + gc4653_write_register(ViPipe, 0x0335, 0x55); + gc4653_write_register(ViPipe, 0x0315, 0x25); + gc4653_write_register(ViPipe, 0x031c, 0xc6); + gc4653_write_register(ViPipe, 0x0287, 0x18); + gc4653_write_register(ViPipe, 0x0084, 0x00); + gc4653_write_register(ViPipe, 0x0087, 0x50); + gc4653_write_register(ViPipe, 0x029d, 0x08); + gc4653_write_register(ViPipe, 0x0290, 0x00); + gc4653_write_register(ViPipe, 0x0217, 0x40); + gc4653_write_register(ViPipe, 0x0234, 0x20); + gc4653_write_register(ViPipe, 0x0340, 0x05); + gc4653_write_register(ViPipe, 0x0341, 0xdd); + gc4653_write_register(ViPipe, 0x0341, 0xd0); + gc4653_write_register(ViPipe, 0x0345, 0x06); + gc4653_write_register(ViPipe, 0x034b, 0xb0); + + gc4653_write_register(ViPipe, 0x034c, 0x05); + gc4653_write_register(ViPipe, 0x034e, 0x02); + gc4653_write_register(ViPipe, 0x034f, 0xd0); + gc4653_write_register(ViPipe, 0x0352, 0x08); + gc4653_write_register(ViPipe, 0x0354, 0x08); + gc4653_write_register(ViPipe, 0x02d1, 0xe0); + gc4653_write_register(ViPipe, 0x0223, 0xf2); + gc4653_write_register(ViPipe, 0x0238, 0xa4); + gc4653_write_register(ViPipe, 0x02ce, 0x7f); + gc4653_write_register(ViPipe, 0x0232, 0xc4); + gc4653_write_register(ViPipe, 0x02d3, 0x05); + gc4653_write_register(ViPipe, 0x0243, 0x06); + gc4653_write_register(ViPipe, 0x02ee, 0x30); + gc4653_write_register(ViPipe, 0x026f, 0x70); + gc4653_write_register(ViPipe, 0x0257, 0x09); + gc4653_write_register(ViPipe, 0x0211, 0x02); + gc4653_write_register(ViPipe, 0x0219, 0x09); + gc4653_write_register(ViPipe, 0x023f, 0x2d); + gc4653_write_register(ViPipe, 0x0518, 0x00); + gc4653_write_register(ViPipe, 0x0519, 0x01); + gc4653_write_register(ViPipe, 0x0515, 0x08); + gc4653_write_register(ViPipe, 0x02d9, 0x3f); + gc4653_write_register(ViPipe, 0x02da, 0x02); + gc4653_write_register(ViPipe, 0x02db, 0xe8); + gc4653_write_register(ViPipe, 0x02e6, 0x20); + gc4653_write_register(ViPipe, 0x021b, 0x10); + gc4653_write_register(ViPipe, 0x0252, 0x22); + gc4653_write_register(ViPipe, 0x024e, 0x22); + gc4653_write_register(ViPipe, 0x02c4, 0x01); + gc4653_write_register(ViPipe, 0x021d, 0x17); + gc4653_write_register(ViPipe, 0x024a, 0x01); + gc4653_write_register(ViPipe, 0x02ca, 0x02); + gc4653_write_register(ViPipe, 0x0262, 0x10); + gc4653_write_register(ViPipe, 0x029a, 0x20); + gc4653_write_register(ViPipe, 0x021c, 0x0e); + gc4653_write_register(ViPipe, 0x0298, 0x03); + gc4653_write_register(ViPipe, 0x029c, 0x00); + gc4653_write_register(ViPipe, 0x027e, 0x14); + gc4653_write_register(ViPipe, 0x02c2, 0x10); + gc4653_write_register(ViPipe, 0x0540, 0x20); + gc4653_write_register(ViPipe, 0x0546, 0x01); + gc4653_write_register(ViPipe, 0x0548, 0x01); + gc4653_write_register(ViPipe, 0x0544, 0x01); + gc4653_write_register(ViPipe, 0x0242, 0x1b); + gc4653_write_register(ViPipe, 0x02c0, 0x1b); + gc4653_write_register(ViPipe, 0x02c3, 0x20); + gc4653_write_register(ViPipe, 0x02e4, 0x10); + gc4653_write_register(ViPipe, 0x022e, 0x00); + gc4653_write_register(ViPipe, 0x027b, 0x3f); + gc4653_write_register(ViPipe, 0x0269, 0x0f); + gc4653_write_register(ViPipe, 0x02d2, 0x40); + gc4653_write_register(ViPipe, 0x027c, 0x08); + gc4653_write_register(ViPipe, 0x023a, 0x2e); + gc4653_write_register(ViPipe, 0x0245, 0xce); + gc4653_write_register(ViPipe, 0x0530, 0x20); + gc4653_write_register(ViPipe, 0x0531, 0x02); + gc4653_write_register(ViPipe, 0x0228, 0x50); + gc4653_write_register(ViPipe, 0x02ab, 0x00); + gc4653_write_register(ViPipe, 0x0250, 0x00); + gc4653_write_register(ViPipe, 0x0221, 0x50); + gc4653_write_register(ViPipe, 0x02ac, 0x00); + gc4653_write_register(ViPipe, 0x02a5, 0x02); + gc4653_write_register(ViPipe, 0x0260, 0x0b); + gc4653_write_register(ViPipe, 0x0216, 0x04); + gc4653_write_register(ViPipe, 0x0299, 0x1C); + gc4653_write_register(ViPipe, 0x02bb, 0x0d); + gc4653_write_register(ViPipe, 0x02a3, 0x02); + gc4653_write_register(ViPipe, 0x02a4, 0x02); + gc4653_write_register(ViPipe, 0x021e, 0x02); + gc4653_write_register(ViPipe, 0x024f, 0x08); + gc4653_write_register(ViPipe, 0x028c, 0x08); + gc4653_write_register(ViPipe, 0x0532, 0x3f); + gc4653_write_register(ViPipe, 0x0533, 0x02); + gc4653_write_register(ViPipe, 0x0277, 0xc0); + gc4653_write_register(ViPipe, 0x0276, 0xc0); + gc4653_write_register(ViPipe, 0x0239, 0xc0); + gc4653_write_register(ViPipe, 0x0202, 0x05); + gc4653_write_register(ViPipe, 0x0203, 0xd0); + gc4653_write_register(ViPipe, 0x0205, 0xc0); + gc4653_write_register(ViPipe, 0x02b0, 0x68); + gc4653_write_register(ViPipe, 0x0002, 0xa9); + gc4653_write_register(ViPipe, 0x0004, 0x01); + gc4653_write_register(ViPipe, 0x021a, 0x98); + gc4653_write_register(ViPipe, 0x0266, 0xa0); + gc4653_write_register(ViPipe, 0x0020, 0x01); + gc4653_write_register(ViPipe, 0x0021, 0x03); + gc4653_write_register(ViPipe, 0x0022, 0x00); + gc4653_write_register(ViPipe, 0x0023, 0x04); + gc4653_write_register(ViPipe, 0x0342, 0x06); + gc4653_write_register(ViPipe, 0x0343, 0x40); + gc4653_write_register(ViPipe, 0x03fe, 0x10); + gc4653_write_register(ViPipe, 0x03fe, 0x00); + gc4653_write_register(ViPipe, 0x0106, 0x78); + gc4653_write_register(ViPipe, 0x0108, 0x0c); + gc4653_write_register(ViPipe, 0x0114, 0x01); + gc4653_write_register(ViPipe, 0x0115, 0x12); + gc4653_write_register(ViPipe, 0x0180, 0x46); + gc4653_write_register(ViPipe, 0x0181, 0x30); + gc4653_write_register(ViPipe, 0x0182, 0x05); + gc4653_write_register(ViPipe, 0x0185, 0x01); + gc4653_write_register(ViPipe, 0x03fe, 0x10); + gc4653_write_register(ViPipe, 0x03fe, 0x00); + gc4653_write_register(ViPipe, 0x0100, 0x09); + + gc4653_write_register(ViPipe, 0x000f, 0x00); + // otp + gc4653_write_register(ViPipe, 0x0080, 0x02); + gc4653_write_register(ViPipe, 0x0097, 0x0a); + gc4653_write_register(ViPipe, 0x0098, 0x10); + gc4653_write_register(ViPipe, 0x0099, 0x05); + gc4653_write_register(ViPipe, 0x009a, 0xb0); + gc4653_write_register(ViPipe, 0x0317, 0x08); + gc4653_write_register(ViPipe, 0x0a67, 0x80); + gc4653_write_register(ViPipe, 0x0a70, 0x03); + gc4653_write_register(ViPipe, 0x0a82, 0x00); + gc4653_write_register(ViPipe, 0x0a83, 0x10); + gc4653_write_register(ViPipe, 0x0a80, 0x2b); + gc4653_write_register(ViPipe, 0x05be, 0x00); + gc4653_write_register(ViPipe, 0x05a9, 0x01); + gc4653_write_register(ViPipe, 0x0313, 0x80); + gc4653_write_register(ViPipe, 0x05be, 0x01); + gc4653_write_register(ViPipe, 0x0317, 0x00); + gc4653_write_register(ViPipe, 0x0a67, 0x00); + + gc4653_write_register(ViPipe, 0x0000, 0x00); // end flag + + gc4653_default_reg_init(ViPipe); + delay_ms(10); + + printf("ViPipe:%d,===GC4653 720P 60fps 10bit LINEAR Init OK!===\n", ViPipe); +} \ No newline at end of file From 28f637165c23b1dfb1558132cb7cff05dc006dd6 Mon Sep 17 00:00:00 2001 From: lxowalle Date: Tue, 21 Jan 2025 09:46:35 +0800 Subject: [PATCH 2/3] * os04a10 support 720p90 --- .../sensor/cv182x/gcore_gc4653/gc4653_cmos.c | 2 +- .../sensor/cv182x/ov_os04a10/os04a10_cmos.c | 5 + .../cv182x/ov_os04a10/os04a10_cmos_ex.h | 1 + .../cv182x/ov_os04a10/os04a10_cmos_param.h | 41 +++ .../cv182x/ov_os04a10/os04a10_sensor_ctl.c | 334 ++++++++++++++++++ middleware/v2/sample/common/sample_comm.h | 1 + .../v2/sample/common/sample_common_sensor.c | 12 +- 7 files changed, 392 insertions(+), 4 deletions(-) diff --git a/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_cmos.c b/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_cmos.c index 4e698cc6f0..407f294bb8 100644 --- a/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_cmos.c +++ b/middleware/v2/component/isp/sensor/cv182x/gcore_gc4653/gc4653_cmos.c @@ -783,7 +783,7 @@ static CVI_S32 sensor_rx_attr(VI_PIPE ViPipe, SNS_COMBO_DEV_ATTR_S *pstRxAttr) pstRxAttr->mclk.freq = CAMPLL_FREQ_27M; } else { int fps = atoi(value); - if (fps == 80) { + if (fps >= 80) { pstRxAttr->mclk.freq = CAMPLL_FREQ_37P125M; } else { pstRxAttr->mclk.freq = CAMPLL_FREQ_27M; diff --git a/middleware/v2/component/isp/sensor/cv182x/ov_os04a10/os04a10_cmos.c b/middleware/v2/component/isp/sensor/cv182x/ov_os04a10/os04a10_cmos.c index 69277de3e5..8c608afa64 100644 --- a/middleware/v2/component/isp/sensor/cv182x/ov_os04a10/os04a10_cmos.c +++ b/middleware/v2/component/isp/sensor/cv182x/ov_os04a10/os04a10_cmos.c @@ -1173,6 +1173,8 @@ static CVI_S32 cmos_set_image_mode(VI_PIPE ViPipe, ISP_CMOS_SENSOR_IMAGE_MODE_S OS04A10_SENSOR_GET_CTX(ViPipe, pstSnsState); CMOS_CHECK_POINTER(pstSnsState); + printf("############# [%s][%d] fps:%f\r\n", __func__, __LINE__, pstSensorImageMode->f32Fps); + u8SensorImageMode = pstSnsState->u8ImgMode; pstSnsState->bSyncInit = CVI_FALSE; if (pstSensorImageMode->f32Fps <= 30) { @@ -1207,6 +1209,9 @@ static CVI_S32 cmos_set_image_mode(VI_PIPE ViPipe, ISP_CMOS_SENSOR_IMAGE_MODE_S return CVI_FAILURE; } } else { + if (pstSensorImageMode->u16Width <= 1280 && pstSensorImageMode->u16Height <= 720) { + u8SensorImageMode = OS04A10_MODE_720P90_12BIT; + } } if ((pstSnsState->bInit == CVI_TRUE) && (u8SensorImageMode == pstSnsState->u8ImgMode)) { diff --git a/middleware/v2/component/isp/sensor/cv182x/ov_os04a10/os04a10_cmos_ex.h b/middleware/v2/component/isp/sensor/cv182x/ov_os04a10/os04a10_cmos_ex.h index 0f14d408a9..f56c4b3c39 100644 --- a/middleware/v2/component/isp/sensor/cv182x/ov_os04a10/os04a10_cmos_ex.h +++ b/middleware/v2/component/isp/sensor/cv182x/ov_os04a10/os04a10_cmos_ex.h @@ -66,6 +66,7 @@ enum os04a10_wdr2_regs_e { typedef enum _OS04A10_MODE_E { OS04A10_MODE_1440P30_12BIT = 0, + OS04A10_MODE_720P90_12BIT, OS04A10_MODE_LINEAR_NUM, OS04A10_MODE_1440P30_WDR = OS04A10_MODE_LINEAR_NUM, OS04A10_MODE_NUM diff --git a/middleware/v2/component/isp/sensor/cv182x/ov_os04a10/os04a10_cmos_param.h b/middleware/v2/component/isp/sensor/cv182x/ov_os04a10/os04a10_cmos_param.h index fc6986893e..6897a62c11 100644 --- a/middleware/v2/component/isp/sensor/cv182x/ov_os04a10/os04a10_cmos_param.h +++ b/middleware/v2/component/isp/sensor/cv182x/ov_os04a10/os04a10_cmos_param.h @@ -61,6 +61,47 @@ static const OS04A10_MODE_S g_astOs04a10_mode[OS04A10_MODE_NUM] = { .u32Step = 1, }, }, + [OS04A10_MODE_720P90_12BIT] = { + .name = "640x480_fps130_12bit", + .astImg[0] = { + .stSnsSize = { + .u32Width = 1280, + .u32Height = 720, + }, + .stWndRect = { + .s32X = 0, + .s32Y = 0, + .u32Width = 1280, + .u32Height = 720, + }, + .stMaxSize = { + .u32Width = 1280, + .u32Height = 720, + }, + }, + .f32MaxFps = 30, + .f32MinFps = 0.74, /* 0x658 * 30 / 0xFFFF */ + .u32HtsDef = 1400, + .u32VtsDef = 780, + .stExp[0] = { + .u16Min = 1, + .u16Max = 780 - 8, + .u16Def = 500, + .u16Step = 1, + }, + .stAgain[0] = { + .u32Min = 1024, + .u32Max = 68200, + .u32Def = 1024, + .u32Step = 1, + }, + .stDgain[0] = { + .u32Min = 1024, + .u32Max = 16373, + .u32Def = 1024, + .u32Step = 1, + }, + }, [OS04A10_MODE_1440P30_WDR] = { .name = "1440p30wdr", .astImg[0] = { diff --git a/middleware/v2/component/isp/sensor/cv182x/ov_os04a10/os04a10_sensor_ctl.c b/middleware/v2/component/isp/sensor/cv182x/ov_os04a10/os04a10_sensor_ctl.c index be3101de53..62c3fe49a0 100644 --- a/middleware/v2/component/isp/sensor/cv182x/ov_os04a10/os04a10_sensor_ctl.c +++ b/middleware/v2/component/isp/sensor/cv182x/ov_os04a10/os04a10_sensor_ctl.c @@ -19,6 +19,7 @@ static void os04a10_wdr_1520p30_2to1_init(VI_PIPE ViPipe); static void os04a10_linear_1520p30_12BIT_init(VI_PIPE ViPipe); +static void os04a10_linear_640x480_90fps_12BIT_init(VI_PIPE ViPipe); CVI_U8 os04a10_i2c_addr = 0x36; /* I2C Address of OS04A10 */ const CVI_U32 os04a10_addr_byte = 2; @@ -274,6 +275,8 @@ void os04a10_init(VI_PIPE ViPipe) } else { if (u8ImgMode == OS04A10_MODE_1440P30_12BIT) os04a10_linear_1520p30_12BIT_init(ViPipe); + else if (u8ImgMode == OS04A10_MODE_720P90_12BIT) + os04a10_linear_640x480_90fps_12BIT_init(ViPipe); } g_pastOs04a10[ViPipe]->bInit = CVI_TRUE; } @@ -594,6 +597,337 @@ static void os04a10_linear_1520p30_12BIT_init(VI_PIPE ViPipe) printf("ViPipe:%d,===OS04A10 1520P 30fps 12bit LINE Init OK!===\n", ViPipe); } + +static void os04a10_linear_640x480_90fps_12BIT_init(VI_PIPE ViPipe) +{ + os04a10_write_register(ViPipe, 0x0103, 0x01); + os04a10_write_register(ViPipe, 0x0109, 0x01); + os04a10_write_register(ViPipe, 0x0104, 0x02); + os04a10_write_register(ViPipe, 0x0102, 0x00); + os04a10_write_register(ViPipe, 0x0305, 0x5c); + os04a10_write_register(ViPipe, 0x0306, 0x00); + os04a10_write_register(ViPipe, 0x0307, 0x00); + os04a10_write_register(ViPipe, 0x0308, 0x05); + os04a10_write_register(ViPipe, 0x030a, 0x01); + os04a10_write_register(ViPipe, 0x0317, 0x0a); + os04a10_write_register(ViPipe, 0x0322, 0x01); + os04a10_write_register(ViPipe, 0x0323, 0x02); + os04a10_write_register(ViPipe, 0x0324, 0x00); + os04a10_write_register(ViPipe, 0x0325, 0xd0); + os04a10_write_register(ViPipe, 0x0327, 0x05); + os04a10_write_register(ViPipe, 0x0329, 0x02); + os04a10_write_register(ViPipe, 0x032c, 0x02); + os04a10_write_register(ViPipe, 0x032d, 0x02); + os04a10_write_register(ViPipe, 0x032e, 0x02); + os04a10_write_register(ViPipe, 0x300f, 0x11); + os04a10_write_register(ViPipe, 0x3012, 0x41); + os04a10_write_register(ViPipe, 0x3026, 0x10); + os04a10_write_register(ViPipe, 0x3027, 0x08); + os04a10_write_register(ViPipe, 0x302d, 0x24); + os04a10_write_register(ViPipe, 0x3104, 0x01); + os04a10_write_register(ViPipe, 0x3106, 0x11); + os04a10_write_register(ViPipe, 0x3400, 0x00); + os04a10_write_register(ViPipe, 0x3408, 0x05); + os04a10_write_register(ViPipe, 0x340c, 0x0c); + os04a10_write_register(ViPipe, 0x340d, 0xb0); + os04a10_write_register(ViPipe, 0x3425, 0x51); + os04a10_write_register(ViPipe, 0x3426, 0x10); + os04a10_write_register(ViPipe, 0x3427, 0x14); + os04a10_write_register(ViPipe, 0x3428, 0x10); + os04a10_write_register(ViPipe, 0x3429, 0x10); + os04a10_write_register(ViPipe, 0x342a, 0x10); + os04a10_write_register(ViPipe, 0x342b, 0x04); + os04a10_write_register(ViPipe, 0x3501, 0x02); + os04a10_write_register(ViPipe, 0x3504, 0x08); + os04a10_write_register(ViPipe, 0x3508, 0x01); + os04a10_write_register(ViPipe, 0x3509, 0x00); + os04a10_write_register(ViPipe, 0x350a, 0x01); + os04a10_write_register(ViPipe, 0x3544, 0x08); + os04a10_write_register(ViPipe, 0x3548, 0x01); + os04a10_write_register(ViPipe, 0x3549, 0x00); + os04a10_write_register(ViPipe, 0x3584, 0x08); + os04a10_write_register(ViPipe, 0x3588, 0x01); + os04a10_write_register(ViPipe, 0x3589, 0x00); + os04a10_write_register(ViPipe, 0x3601, 0x70); + os04a10_write_register(ViPipe, 0x3604, 0xe3); + os04a10_write_register(ViPipe, 0x3605, 0xff); + os04a10_write_register(ViPipe, 0x3606, 0x01); + os04a10_write_register(ViPipe, 0x3608, 0xa8); + os04a10_write_register(ViPipe, 0x360a, 0xd0); + os04a10_write_register(ViPipe, 0x360b, 0x08); + os04a10_write_register(ViPipe, 0x360e, 0xc8); + os04a10_write_register(ViPipe, 0x360f, 0x66); + os04a10_write_register(ViPipe, 0x3610, 0x89); + os04a10_write_register(ViPipe, 0x3611, 0x8a); + os04a10_write_register(ViPipe, 0x3612, 0x4e); + os04a10_write_register(ViPipe, 0x3613, 0xbd); + os04a10_write_register(ViPipe, 0x3614, 0x9b); + os04a10_write_register(ViPipe, 0x362a, 0x0e); + os04a10_write_register(ViPipe, 0x362b, 0x0e); + os04a10_write_register(ViPipe, 0x362c, 0x0e); + os04a10_write_register(ViPipe, 0x362d, 0x09); + os04a10_write_register(ViPipe, 0x362e, 0x1a); + os04a10_write_register(ViPipe, 0x362f, 0x34); + os04a10_write_register(ViPipe, 0x3630, 0x67); + os04a10_write_register(ViPipe, 0x3631, 0x7f); + os04a10_write_register(ViPipe, 0x3638, 0x00); + os04a10_write_register(ViPipe, 0x3643, 0x00); + os04a10_write_register(ViPipe, 0x3644, 0x00); + os04a10_write_register(ViPipe, 0x3645, 0x00); + os04a10_write_register(ViPipe, 0x3646, 0x00); + os04a10_write_register(ViPipe, 0x3647, 0x00); + os04a10_write_register(ViPipe, 0x3648, 0x00); + os04a10_write_register(ViPipe, 0x3649, 0x00); + os04a10_write_register(ViPipe, 0x364a, 0x04); + os04a10_write_register(ViPipe, 0x364c, 0x0e); + os04a10_write_register(ViPipe, 0x364d, 0x0e); + os04a10_write_register(ViPipe, 0x364e, 0x0e); + os04a10_write_register(ViPipe, 0x364f, 0x0e); + os04a10_write_register(ViPipe, 0x3650, 0xff); + os04a10_write_register(ViPipe, 0x3651, 0xff); + os04a10_write_register(ViPipe, 0x365a, 0x00); + os04a10_write_register(ViPipe, 0x365b, 0x00); + os04a10_write_register(ViPipe, 0x365c, 0x00); + os04a10_write_register(ViPipe, 0x365d, 0x00); + os04a10_write_register(ViPipe, 0x3661, 0x07); + os04a10_write_register(ViPipe, 0x3662, 0x00); + os04a10_write_register(ViPipe, 0x3663, 0x20); + os04a10_write_register(ViPipe, 0x3665, 0x12); + os04a10_write_register(ViPipe, 0x3667, 0xd4); + os04a10_write_register(ViPipe, 0x3668, 0x80); + os04a10_write_register(ViPipe, 0x366c, 0x00); + os04a10_write_register(ViPipe, 0x366d, 0x00); + os04a10_write_register(ViPipe, 0x366e, 0x00); + os04a10_write_register(ViPipe, 0x366f, 0x00); + os04a10_write_register(ViPipe, 0x3671, 0x08); + os04a10_write_register(ViPipe, 0x3673, 0x2a); + os04a10_write_register(ViPipe, 0x3681, 0x80); + os04a10_write_register(ViPipe, 0x3700, 0x2d); + os04a10_write_register(ViPipe, 0x3701, 0x22); + os04a10_write_register(ViPipe, 0x3702, 0x25); + os04a10_write_register(ViPipe, 0x3703, 0x28); + os04a10_write_register(ViPipe, 0x3705, 0x00); + os04a10_write_register(ViPipe, 0x3706, 0xf0); + os04a10_write_register(ViPipe, 0x3707, 0x0a); + os04a10_write_register(ViPipe, 0x3708, 0x36); + os04a10_write_register(ViPipe, 0x3709, 0x57); + os04a10_write_register(ViPipe, 0x370a, 0x03); + os04a10_write_register(ViPipe, 0x370b, 0x15); + os04a10_write_register(ViPipe, 0x3714, 0x01); + os04a10_write_register(ViPipe, 0x3719, 0x24); + os04a10_write_register(ViPipe, 0x371b, 0x1f); + os04a10_write_register(ViPipe, 0x371c, 0x00); + os04a10_write_register(ViPipe, 0x371d, 0x08); + os04a10_write_register(ViPipe, 0x373f, 0x63); + os04a10_write_register(ViPipe, 0x3740, 0x63); + os04a10_write_register(ViPipe, 0x3741, 0x63); + os04a10_write_register(ViPipe, 0x3742, 0x63); + os04a10_write_register(ViPipe, 0x3743, 0x01); + os04a10_write_register(ViPipe, 0x3756, 0xe7); + os04a10_write_register(ViPipe, 0x3757, 0xe7); + os04a10_write_register(ViPipe, 0x3762, 0x1c); + os04a10_write_register(ViPipe, 0x376c, 0x10); + os04a10_write_register(ViPipe, 0x3776, 0x05); + os04a10_write_register(ViPipe, 0x3777, 0x22); + os04a10_write_register(ViPipe, 0x3779, 0x60); + os04a10_write_register(ViPipe, 0x377c, 0x48); + os04a10_write_register(ViPipe, 0x3784, 0x06); + os04a10_write_register(ViPipe, 0x3785, 0x0a); + os04a10_write_register(ViPipe, 0x3790, 0x10); + os04a10_write_register(ViPipe, 0x3793, 0x04); + os04a10_write_register(ViPipe, 0x3794, 0x07); + os04a10_write_register(ViPipe, 0x3796, 0x00); + os04a10_write_register(ViPipe, 0x3797, 0x02); + os04a10_write_register(ViPipe, 0x379c, 0x4d); + os04a10_write_register(ViPipe, 0x37a1, 0x80); + os04a10_write_register(ViPipe, 0x37bb, 0x88); + os04a10_write_register(ViPipe, 0x37be, 0x48); + os04a10_write_register(ViPipe, 0x37bf, 0x01); + os04a10_write_register(ViPipe, 0x37c0, 0x01); + os04a10_write_register(ViPipe, 0x37c4, 0x72); + os04a10_write_register(ViPipe, 0x37c5, 0x72); + os04a10_write_register(ViPipe, 0x37c6, 0x72); + os04a10_write_register(ViPipe, 0x37ca, 0x21); + os04a10_write_register(ViPipe, 0x37cc, 0x15); + os04a10_write_register(ViPipe, 0x37cd, 0x90); + os04a10_write_register(ViPipe, 0x37cf, 0x02); + os04a10_write_register(ViPipe, 0x37d0, 0x00); + os04a10_write_register(ViPipe, 0x37d1, 0xf0); + os04a10_write_register(ViPipe, 0x37d2, 0x03); + os04a10_write_register(ViPipe, 0x37d3, 0x15); + os04a10_write_register(ViPipe, 0x37d4, 0x01); + os04a10_write_register(ViPipe, 0x37d5, 0x00); + os04a10_write_register(ViPipe, 0x37d6, 0x03); + os04a10_write_register(ViPipe, 0x37d7, 0x15); + os04a10_write_register(ViPipe, 0x37d8, 0x01); + os04a10_write_register(ViPipe, 0x37dc, 0x00); + os04a10_write_register(ViPipe, 0x37dd, 0x00); + os04a10_write_register(ViPipe, 0x37da, 0x00); + os04a10_write_register(ViPipe, 0x37db, 0x00); + os04a10_write_register(ViPipe, 0x3800, 0x00); + os04a10_write_register(ViPipe, 0x3801, 0x00); + os04a10_write_register(ViPipe, 0x3802, 0x00); + os04a10_write_register(ViPipe, 0x3803, 0x00); + os04a10_write_register(ViPipe, 0x3804, 0x0a); + os04a10_write_register(ViPipe, 0x3805, 0x8f); + os04a10_write_register(ViPipe, 0x3806, 0x05); + os04a10_write_register(ViPipe, 0x3807, 0xff); + os04a10_write_register(ViPipe, 0x3808, 0x0a); + os04a10_write_register(ViPipe, 0x3809, 0x80); + os04a10_write_register(ViPipe, 0x380a, 0x05); + os04a10_write_register(ViPipe, 0x380b, 0xf0); + os04a10_write_register(ViPipe, 0x380c, 0x05); + os04a10_write_register(ViPipe, 0x380d, 0xcc); + os04a10_write_register(ViPipe, 0x380e, 0x09); + os04a10_write_register(ViPipe, 0x380f, 0x80); + os04a10_write_register(ViPipe, 0x3811, 0x08); + os04a10_write_register(ViPipe, 0x3813, 0x08); + os04a10_write_register(ViPipe, 0x3814, 0x01); + os04a10_write_register(ViPipe, 0x3815, 0x01); + os04a10_write_register(ViPipe, 0x3816, 0x01); + os04a10_write_register(ViPipe, 0x3817, 0x01); + os04a10_write_register(ViPipe, 0x381c, 0x00); + os04a10_write_register(ViPipe, 0x3820, 0x02); + os04a10_write_register(ViPipe, 0x3821, 0x00); + os04a10_write_register(ViPipe, 0x3822, 0x14); + os04a10_write_register(ViPipe, 0x3823, 0x18); + os04a10_write_register(ViPipe, 0x3826, 0x00); + os04a10_write_register(ViPipe, 0x3827, 0x00); + os04a10_write_register(ViPipe, 0x3833, 0x40); + os04a10_write_register(ViPipe, 0x384c, 0x05); + os04a10_write_register(ViPipe, 0x384d, 0xc4); + os04a10_write_register(ViPipe, 0x3858, 0x3c); + os04a10_write_register(ViPipe, 0x3865, 0x02); + os04a10_write_register(ViPipe, 0x3866, 0x00); + os04a10_write_register(ViPipe, 0x3867, 0x00); + os04a10_write_register(ViPipe, 0x3868, 0x02); + os04a10_write_register(ViPipe, 0x3900, 0x13); + os04a10_write_register(ViPipe, 0x3940, 0x13); + os04a10_write_register(ViPipe, 0x3980, 0x13); + os04a10_write_register(ViPipe, 0x3c01, 0x11); + os04a10_write_register(ViPipe, 0x3c05, 0x00); + os04a10_write_register(ViPipe, 0x3c0f, 0x1c); + os04a10_write_register(ViPipe, 0x3c12, 0x0d); + os04a10_write_register(ViPipe, 0x3c19, 0x00); + os04a10_write_register(ViPipe, 0x3c21, 0x00); + os04a10_write_register(ViPipe, 0x3c3a, 0x10); + os04a10_write_register(ViPipe, 0x3c3b, 0x18); + os04a10_write_register(ViPipe, 0x3c3d, 0xc6); + os04a10_write_register(ViPipe, 0x3c55, 0x08); + os04a10_write_register(ViPipe, 0x3c5a, 0xe5); + os04a10_write_register(ViPipe, 0x3c5d, 0xcf); + os04a10_write_register(ViPipe, 0x3c5e, 0xcf); + os04a10_write_register(ViPipe, 0x3d8c, 0x70); + os04a10_write_register(ViPipe, 0x3d8d, 0x10); + os04a10_write_register(ViPipe, 0x4000, 0xf9); + os04a10_write_register(ViPipe, 0x4001, 0x2f); + os04a10_write_register(ViPipe, 0x4004, 0x00); + os04a10_write_register(ViPipe, 0x4005, 0x80); + os04a10_write_register(ViPipe, 0x4008, 0x02); + os04a10_write_register(ViPipe, 0x4009, 0x11); + os04a10_write_register(ViPipe, 0x400a, 0x03); + os04a10_write_register(ViPipe, 0x400b, 0x27); + os04a10_write_register(ViPipe, 0x400e, 0x40); + os04a10_write_register(ViPipe, 0x402e, 0x00); + os04a10_write_register(ViPipe, 0x402f, 0x80); + os04a10_write_register(ViPipe, 0x4030, 0x00); + os04a10_write_register(ViPipe, 0x4031, 0x80); + os04a10_write_register(ViPipe, 0x4032, 0x9f); + os04a10_write_register(ViPipe, 0x4033, 0x80); + os04a10_write_register(ViPipe, 0x4050, 0x00); + os04a10_write_register(ViPipe, 0x4051, 0x07); + os04a10_write_register(ViPipe, 0x4011, 0xbb); + os04a10_write_register(ViPipe, 0x410f, 0x01); + os04a10_write_register(ViPipe, 0x4288, 0xcf); + os04a10_write_register(ViPipe, 0x4289, 0x00); + os04a10_write_register(ViPipe, 0x428a, 0x46); + os04a10_write_register(ViPipe, 0x430b, 0xff); + os04a10_write_register(ViPipe, 0x430c, 0xff); + os04a10_write_register(ViPipe, 0x430d, 0x00); + os04a10_write_register(ViPipe, 0x430e, 0x00); + os04a10_write_register(ViPipe, 0x4314, 0x04); + os04a10_write_register(ViPipe, 0x4500, 0x18); + os04a10_write_register(ViPipe, 0x4501, 0x18); + os04a10_write_register(ViPipe, 0x4503, 0x10); + os04a10_write_register(ViPipe, 0x4504, 0x00); + os04a10_write_register(ViPipe, 0x4506, 0x32); + os04a10_write_register(ViPipe, 0x4507, 0x02); + os04a10_write_register(ViPipe, 0x4601, 0x30); + os04a10_write_register(ViPipe, 0x4603, 0x00); + os04a10_write_register(ViPipe, 0x460a, 0x50); + os04a10_write_register(ViPipe, 0x460c, 0x60); + os04a10_write_register(ViPipe, 0x4640, 0x62); + os04a10_write_register(ViPipe, 0x4646, 0xaa); + os04a10_write_register(ViPipe, 0x4647, 0x55); + os04a10_write_register(ViPipe, 0x4648, 0x99); + os04a10_write_register(ViPipe, 0x4649, 0x66); + os04a10_write_register(ViPipe, 0x464d, 0x00); + os04a10_write_register(ViPipe, 0x4654, 0x11); + os04a10_write_register(ViPipe, 0x4655, 0x22); + os04a10_write_register(ViPipe, 0x4800, 0x44); + os04a10_write_register(ViPipe, 0x480e, 0x00); + os04a10_write_register(ViPipe, 0x4810, 0xff); + os04a10_write_register(ViPipe, 0x4811, 0xff); + os04a10_write_register(ViPipe, 0x4813, 0x00); + os04a10_write_register(ViPipe, 0x481f, 0x30); + os04a10_write_register(ViPipe, 0x4837, 0x0d); + os04a10_write_register(ViPipe, 0x484b, 0x27); + os04a10_write_register(ViPipe, 0x4d00, 0x4d); + os04a10_write_register(ViPipe, 0x4d01, 0x9d); + os04a10_write_register(ViPipe, 0x4d02, 0xb9); + os04a10_write_register(ViPipe, 0x4d03, 0x2e); + os04a10_write_register(ViPipe, 0x4d04, 0x4a); + os04a10_write_register(ViPipe, 0x4d05, 0x3d); + os04a10_write_register(ViPipe, 0x4d09, 0x4f); + os04a10_write_register(ViPipe, 0x5000, 0x7f); + os04a10_write_register(ViPipe, 0x5001, 0x0d); + os04a10_write_register(ViPipe, 0x5080, 0x00); + os04a10_write_register(ViPipe, 0x50c0, 0x00); + os04a10_write_register(ViPipe, 0x5100, 0x00); + os04a10_write_register(ViPipe, 0x5200, 0x00); + os04a10_write_register(ViPipe, 0x5201, 0x00); + os04a10_write_register(ViPipe, 0x5202, 0x03); + os04a10_write_register(ViPipe, 0x5203, 0xff); + os04a10_write_register(ViPipe, 0x5780, 0x53); + os04a10_write_register(ViPipe, 0x5782, 0x60); + os04a10_write_register(ViPipe, 0x5783, 0xf0); + os04a10_write_register(ViPipe, 0x5786, 0x01); + os04a10_write_register(ViPipe, 0x5788, 0x60); + os04a10_write_register(ViPipe, 0x5789, 0xf0); + os04a10_write_register(ViPipe, 0x5792, 0x11); + os04a10_write_register(ViPipe, 0x5793, 0x33); + os04a10_write_register(ViPipe, 0x5857, 0xff); + os04a10_write_register(ViPipe, 0x5858, 0xff); + os04a10_write_register(ViPipe, 0x5859, 0xff); + os04a10_write_register(ViPipe, 0x58d7, 0xff); + os04a10_write_register(ViPipe, 0x58d8, 0xff); + os04a10_write_register(ViPipe, 0x58d9, 0xff); + + os04a10_write_register(ViPipe, 0x3800, 0x02); // crop x start + os04a10_write_register(ViPipe, 0x3801, 0xbe); // crop x start + os04a10_write_register(ViPipe, 0x3804, 0x07); // crop x end + os04a10_write_register(ViPipe, 0x3805, 0xcd); // crop x end + + os04a10_write_register(ViPipe, 0x3802, 0x01); // crop y start + os04a10_write_register(ViPipe, 0x3803, 0x8e); // crop y start + os04a10_write_register(ViPipe, 0x3806, 0x04); // crop y end + os04a10_write_register(ViPipe, 0x3807, 0x6d); // crop y end + + // os04a10_write_register(ViPipe, 0x3810, 0x00); // output x start + // os04a10_write_register(ViPipe, 0x3811, 0x00); // output x start + // os04a10_write_register(ViPipe, 0x3812, 0x00); // output y start + // os04a10_write_register(ViPipe, 0x3813, 0x00); // output y start + os04a10_write_register(ViPipe, 0x3808, 0x05); // output x size + os04a10_write_register(ViPipe, 0x3809, 0x00); // output x size + os04a10_write_register(ViPipe, 0x380A, 0x02); // output y size + os04a10_write_register(ViPipe, 0x380B, 0xd0); // output y size + + os04a10_default_reg_init(ViPipe); + os04a10_write_register(ViPipe, 0x0100, 0x01); + + printf("ViPipe:%d,===OS04A10 720P 90fps 12bit LINE Init OK!===\n", ViPipe); +} + static void os04a10_wdr_1520p30_2to1_init(VI_PIPE ViPipe) { os04a10_write_register(ViPipe, 0x0103, 0x01); diff --git a/middleware/v2/sample/common/sample_comm.h b/middleware/v2/sample/common/sample_comm.h index 37f9d6feb5..6f7a96e116 100644 --- a/middleware/v2/sample/common/sample_comm.h +++ b/middleware/v2/sample/common/sample_comm.h @@ -315,6 +315,7 @@ typedef enum _SAMPLE_SNS_TYPE_E { LONTIUM_LT6911_2M_60FPS_8BIT, GCORE_GC4653_MIPI_720P_60FPS_10BIT, GCORE_OV2685_MIPI_1600x1200_30FPS_10BIT, + OV_OS04A10_MIPI_4M_720P90_12BIT, /* ------ LINEAR END ------*/ SAMPLE_SNS_TYPE_LINEAR_BUTT, diff --git a/middleware/v2/sample/common/sample_common_sensor.c b/middleware/v2/sample/common/sample_common_sensor.c index 4942fd9c20..d3352f229e 100644 --- a/middleware/v2/sample/common/sample_common_sensor.c +++ b/middleware/v2/sample/common/sample_common_sensor.c @@ -221,6 +221,7 @@ static const char *snsr_type_name[SAMPLE_SNS_TYPE_BUTT] = { "LONTIUM_LT6911_2M_60FPS_8BIT", "GCORE_GC4653_MIPI_720P_60FPS_10BIT", "GCORE_OV2685_MIPI_1600x1200_30FPS_10BIT", + "OV_OS04A10_MIPI_4M_720P90_12BIT" /* ------ LINEAR END ------*/ /* ------ WDR 2TO1 BEGIN ------*/ @@ -534,6 +535,7 @@ CVI_S32 SAMPLE_COMM_SNS_GetSize(SAMPLE_SNS_TYPE_E enMode, PIC_SIZE_E *penSize) break; #endif case GCORE_GC4653_MIPI_720P_60FPS_10BIT: + case OV_OS04A10_MIPI_4M_720P90_12BIT: *penSize = PIC_720P; break; case GCORE_OV2685_MIPI_1600x1200_30FPS_10BIT: @@ -974,7 +976,7 @@ CVI_S32 SAMPLE_COMM_SNS_GetYuvBypassSts(SAMPLE_SNS_TYPE_E enSnsType) * funciton : Get ISP attr info by diffrent sensor ******************************************************************************/ CVI_S32 SAMPLE_COMM_SNS_GetIspAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, ISP_PUB_ATTR_S *pstPubAttr) -{ +{printf(" ================== [%s][%d]\r\n", __func__, __LINE__); CVI_S32 s32Ret = CVI_SUCCESS; PIC_SIZE_E enPicSize; SIZE_S stSize; @@ -988,13 +990,16 @@ CVI_S32 SAMPLE_COMM_SNS_GetIspAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, ISP_PUB_ATT pstPubAttr->stSnsSize.u32Height = stSize.u32Height; pstPubAttr->stWndRect.u32Width = stSize.u32Width; pstPubAttr->stWndRect.u32Height = stSize.u32Height; - +printf(" ================== [%s][%d]\r\n", __func__, __LINE__); // WDR mode if (enSnsType >= SAMPLE_SNS_TYPE_LINEAR_BUTT) pstPubAttr->enWDRMode = WDR_MODE_2To1_LINE; - +printf(" ================== [%s][%d] enSnsType:%d\r\n", __func__, __LINE__, enSnsType); // FPS switch (enSnsType) { + case OV_OS04A10_MIPI_4M_720P90_12BIT:printf(" ================== [%s][%d]\r\n", __func__, __LINE__); + pstPubAttr->f32FrameRate = 130;printf(" ================== [%s][%d]\r\n", __func__, __LINE__); + break; case CVSENS_CV4001_MIPI_4M_1440P_15FPS_WDR2TO1: pstPubAttr->f32FrameRate = 15; break; @@ -1288,6 +1293,7 @@ CVI_VOID *SAMPLE_COMM_SNS_GetSnsObj(SAMPLE_SNS_TYPE_E enSnsType) #endif #if defined(SENSOR_OV_OS04A10) case OV_OS04A10_MIPI_4M_1440P_30FPS_12BIT: + case OV_OS04A10_MIPI_4M_720P90_12BIT: case OV_OS04A10_MIPI_4M_1440P_30FPS_10BIT_WDR2TO1: pSnsObj = &stSnsOs04a10_Obj; break; From 95d1e5df626690e0c529a49e1733c1dda29838a5 Mon Sep 17 00:00:00 2001 From: lxowalle Date: Wed, 22 Jan 2025 17:52:41 +0800 Subject: [PATCH 3/3] * delete unused code --- middleware/v2/sample/common/sample_common_sensor.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/middleware/v2/sample/common/sample_common_sensor.c b/middleware/v2/sample/common/sample_common_sensor.c index d3352f229e..6ea03aaea9 100644 --- a/middleware/v2/sample/common/sample_common_sensor.c +++ b/middleware/v2/sample/common/sample_common_sensor.c @@ -976,7 +976,7 @@ CVI_S32 SAMPLE_COMM_SNS_GetYuvBypassSts(SAMPLE_SNS_TYPE_E enSnsType) * funciton : Get ISP attr info by diffrent sensor ******************************************************************************/ CVI_S32 SAMPLE_COMM_SNS_GetIspAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, ISP_PUB_ATTR_S *pstPubAttr) -{printf(" ================== [%s][%d]\r\n", __func__, __LINE__); +{ CVI_S32 s32Ret = CVI_SUCCESS; PIC_SIZE_E enPicSize; SIZE_S stSize; @@ -990,15 +990,15 @@ CVI_S32 SAMPLE_COMM_SNS_GetIspAttrBySns(SAMPLE_SNS_TYPE_E enSnsType, ISP_PUB_ATT pstPubAttr->stSnsSize.u32Height = stSize.u32Height; pstPubAttr->stWndRect.u32Width = stSize.u32Width; pstPubAttr->stWndRect.u32Height = stSize.u32Height; -printf(" ================== [%s][%d]\r\n", __func__, __LINE__); + // WDR mode if (enSnsType >= SAMPLE_SNS_TYPE_LINEAR_BUTT) pstPubAttr->enWDRMode = WDR_MODE_2To1_LINE; -printf(" ================== [%s][%d] enSnsType:%d\r\n", __func__, __LINE__, enSnsType); + // FPS switch (enSnsType) { - case OV_OS04A10_MIPI_4M_720P90_12BIT:printf(" ================== [%s][%d]\r\n", __func__, __LINE__); - pstPubAttr->f32FrameRate = 130;printf(" ================== [%s][%d]\r\n", __func__, __LINE__); + case OV_OS04A10_MIPI_4M_720P90_12BIT: + pstPubAttr->f32FrameRate = 90; break; case CVSENS_CV4001_MIPI_4M_1440P_15FPS_WDR2TO1: pstPubAttr->f32FrameRate = 15;