From 904a57d52a32cd817b9e0bd1252d11e1efa46ec0 Mon Sep 17 00:00:00 2001
From: Andarwinux <Andarwinux@users.noreply.github.com>
Date: Wed, 29 May 2024 00:00:00 +0000
Subject: [PATCH] Update test matrix

Subdivided Windows LLVM into llvm-gnu and llvm-msvc to distinguish between *-w64-mingw32 (aka *-pc-windows-gnu) and *-pc-windows-msvc targets.

Updated Windows AArch64 from N/A to Not tested in CI.
---
 README.md | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/README.md b/README.md
index 5ae99fab..4ec36e19 100644
--- a/README.md
+++ b/README.md
@@ -33,54 +33,54 @@ The following table summarises currently supported vector extensions, compilers
 <table>
 <tr>
   <th colspan="2" rowspan="2"></th>
-  <th colspan="8">OS/Compiler</th>
+  <th colspan="9">OS/Compiler</th>
 </tr>
 <tr>
   <th colspan="3">Linux</th>
   <th colspan="2">MacOS</th>
-  <th colspan="3">Windows</th>
+  <th colspan="4">Windows</th>
 </tr>
 <tr>
   <th>Arch.</th>
   <th>Vector Extensions</th>
   <th>gcc</th><th>llvm</th><th>icc</th>
   <th>gcc</th><th>llvm</th>
-  <th>gcc</th><th>llvm</th><th>msvc</th>
+  <th>gcc</th><th>llvm-gnu</th><th>llvm-msvc</th><th>msvc</th>
 </tr>
 <tr align="center"><th>x86_64</th><th>SSE2, SSE4,<br>AVX, AVX2, AVX512F</th>
   <td>:green_circle:</td><td>:green_circle:</td><td>:white_circle:</td>
   <td>:white_circle:</td><td>:white_circle:</td>
-  <td>:white_circle:</td><td>:white_circle:</td><td>:white_circle:</td>
+  <td>:white_circle:</td><td>:green_circle:</td><td>:white_circle:</td><td>:white_circle:</td>
 </tr>
 <tr align="center"><th>x86 32bit<br>(i386)</th><th>SSE</th>
   <td>:green_circle:</td><td>:green_circle:</td><td>:white_circle:</td>
   <td>:white_circle:</td><td>:white_circle:</td>
-  <td>:white_circle:</td><td>:white_circle:</td><td>:white_circle:</td>
+  <td>:white_circle:</td><td>:white_circle:</td><td>:white_circle:</td><td>:white_circle:</td>
 </tr>
 <tr align="center"><th>AArch64<br>(arm)</th><th>Neon, SVE</th>
   <td>:green_circle:</td><td>:green_circle:</td><td>N/A</td>
   <td colspan="2">Preliminary</td>
-  <td colspan="3">N/A</td>
+  <td colspan="1">N/A</td><td>:white_circle:</td><td>:white_circle:</td><td>:white_circle:</td>
 </tr>
 <tr align="center"><th>AArch32<br>(armhf)</th><th>NEON</th>
   <td>:green_circle:</td><td>:green_circle:</td><td>N/A</td>
   <td colspan="2">Preliminary</td>
-  <td colspan="3">N/A</td>
+  <td colspan="4">N/A</td>
 </tr>
 <tr align="center"><th>PowerPC<br>(ppc64el)</th><th>VSX, VSX3</th>
   <td>:green_circle:</td><td>:green_circle:</td><td>N/A</td>
   <td colspan="2">N/A</td>
-  <td colspan="3">N/A</td>
+  <td colspan="4">N/A</td>
 </tr>
 <tr align="center"><th>IBM/Z<br>(s390x)</th><th>VXE, VXE2</th>
   <td>:green_circle:</td><td>:green_circle:</td><td>N/A</td>
   <td colspan="2">N/A</td>
-  <td colspan="3">N/A</td>
+  <td colspan="4">N/A</td>
 </tr>
 <tr align="center"><th>RISC-V<br>(riscv64)</th><th>RVV1, RVV2</th>
   <td>N/A (14+)</td><td>:green_circle:</td><td>N/A</td>
   <td colspan="2">N/A</td>
-  <td colspan="3">N/A</td>
+  <td colspan="4">N/A</td>
 </tr>
 </table>