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davidtwcodavidtwco
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gen-arm: assert_instr on msvc for [su]mull[tb]
`dumpbin.exe` produces `44a1c000`/`44e1c000`/`44a1c400`/`44e1c400` for `[su]mull[tb]` instead of the instruction name - so skip `assert_instr` for these intrinsics on MSVC targets.
1 parent f0dbe83 commit b661e23

2 files changed

Lines changed: 60 additions & 26 deletions

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‎crates/core_arch/src/aarch64/sve2/generated.rs‎

Lines changed: 44 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -10281,7 +10281,10 @@ pub fn svmul_lane_u64<const IMM_INDEX: i32>(op1: svuint64_t, op2: svuint64_t) ->
1028110281
#[inline(always)]
1028210282
#[target_feature(enable = "sve,sve2")]
1028310283
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10284-
#[cfg_attr(test, assert_instr(smullb, IMM_INDEX = 0))]
10284+
#[cfg_attr(
10285+
all(test, not(target_env = "msvc")),
10286+
assert_instr(smullb, IMM_INDEX = 0)
10287+
)]
1028510288
pub fn svmullb_lane_s32<const IMM_INDEX: i32>(op1: svint16_t, op2: svint16_t) -> svint32_t {
1028610289
static_assert_range!(IMM_INDEX, 0..=7);
1028710290
unsafe extern "unadjusted" {
@@ -10298,7 +10301,10 @@ pub fn svmullb_lane_s32<const IMM_INDEX: i32>(op1: svint16_t, op2: svint16_t) ->
1029810301
#[inline(always)]
1029910302
#[target_feature(enable = "sve,sve2")]
1030010303
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10301-
#[cfg_attr(test, assert_instr(smullb, IMM_INDEX = 0))]
10304+
#[cfg_attr(
10305+
all(test, not(target_env = "msvc")),
10306+
assert_instr(smullb, IMM_INDEX = 0)
10307+
)]
1030210308
pub fn svmullb_lane_s64<const IMM_INDEX: i32>(op1: svint32_t, op2: svint32_t) -> svint64_t {
1030310309
static_assert_range!(IMM_INDEX, 0..=3);
1030410310
unsafe extern "unadjusted" {
@@ -10315,7 +10321,10 @@ pub fn svmullb_lane_s64<const IMM_INDEX: i32>(op1: svint32_t, op2: svint32_t) ->
1031510321
#[inline(always)]
1031610322
#[target_feature(enable = "sve,sve2")]
1031710323
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10318-
#[cfg_attr(test, assert_instr(umullb, IMM_INDEX = 0))]
10324+
#[cfg_attr(
10325+
all(test, not(target_env = "msvc")),
10326+
assert_instr(umullb, IMM_INDEX = 0)
10327+
)]
1031910328
pub fn svmullb_lane_u32<const IMM_INDEX: i32>(op1: svuint16_t, op2: svuint16_t) -> svuint32_t {
1032010329
static_assert_range!(IMM_INDEX, 0..=7);
1032110330
unsafe extern "unadjusted" {
@@ -10332,7 +10341,10 @@ pub fn svmullb_lane_u32<const IMM_INDEX: i32>(op1: svuint16_t, op2: svuint16_t)
1033210341
#[inline(always)]
1033310342
#[target_feature(enable = "sve,sve2")]
1033410343
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10335-
#[cfg_attr(test, assert_instr(umullb, IMM_INDEX = 0))]
10344+
#[cfg_attr(
10345+
all(test, not(target_env = "msvc")),
10346+
assert_instr(umullb, IMM_INDEX = 0)
10347+
)]
1033610348
pub fn svmullb_lane_u64<const IMM_INDEX: i32>(op1: svuint32_t, op2: svuint32_t) -> svuint64_t {
1033710349
static_assert_range!(IMM_INDEX, 0..=3);
1033810350
unsafe extern "unadjusted" {
@@ -10481,7 +10493,10 @@ pub fn svmullb_n_u64(op1: svuint32_t, op2: u32) -> svuint64_t {
1048110493
#[inline(always)]
1048210494
#[target_feature(enable = "sve,sve2")]
1048310495
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10484-
#[cfg_attr(test, assert_instr(smullt, IMM_INDEX = 0))]
10496+
#[cfg_attr(
10497+
all(test, not(target_env = "msvc")),
10498+
assert_instr(smullt, IMM_INDEX = 0)
10499+
)]
1048510500
pub fn svmullt_lane_s32<const IMM_INDEX: i32>(op1: svint16_t, op2: svint16_t) -> svint32_t {
1048610501
static_assert_range!(IMM_INDEX, 0..=7);
1048710502
unsafe extern "unadjusted" {
@@ -10498,7 +10513,10 @@ pub fn svmullt_lane_s32<const IMM_INDEX: i32>(op1: svint16_t, op2: svint16_t) ->
1049810513
#[inline(always)]
1049910514
#[target_feature(enable = "sve,sve2")]
1050010515
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10501-
#[cfg_attr(test, assert_instr(smullt, IMM_INDEX = 0))]
10516+
#[cfg_attr(
10517+
all(test, not(target_env = "msvc")),
10518+
assert_instr(smullt, IMM_INDEX = 0)
10519+
)]
1050210520
pub fn svmullt_lane_s64<const IMM_INDEX: i32>(op1: svint32_t, op2: svint32_t) -> svint64_t {
1050310521
static_assert_range!(IMM_INDEX, 0..=3);
1050410522
unsafe extern "unadjusted" {
@@ -10515,7 +10533,10 @@ pub fn svmullt_lane_s64<const IMM_INDEX: i32>(op1: svint32_t, op2: svint32_t) ->
1051510533
#[inline(always)]
1051610534
#[target_feature(enable = "sve,sve2")]
1051710535
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10518-
#[cfg_attr(test, assert_instr(umullt, IMM_INDEX = 0))]
10536+
#[cfg_attr(
10537+
all(test, not(target_env = "msvc")),
10538+
assert_instr(umullt, IMM_INDEX = 0)
10539+
)]
1051910540
pub fn svmullt_lane_u32<const IMM_INDEX: i32>(op1: svuint16_t, op2: svuint16_t) -> svuint32_t {
1052010541
static_assert_range!(IMM_INDEX, 0..=7);
1052110542
unsafe extern "unadjusted" {
@@ -10532,7 +10553,10 @@ pub fn svmullt_lane_u32<const IMM_INDEX: i32>(op1: svuint16_t, op2: svuint16_t)
1053210553
#[inline(always)]
1053310554
#[target_feature(enable = "sve,sve2")]
1053410555
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10535-
#[cfg_attr(test, assert_instr(umullt, IMM_INDEX = 0))]
10556+
#[cfg_attr(
10557+
all(test, not(target_env = "msvc")),
10558+
assert_instr(umullt, IMM_INDEX = 0)
10559+
)]
1053610560
pub fn svmullt_lane_u64<const IMM_INDEX: i32>(op1: svuint32_t, op2: svuint32_t) -> svuint64_t {
1053710561
static_assert_range!(IMM_INDEX, 0..=3);
1053810562
unsafe extern "unadjusted" {
@@ -10549,7 +10573,7 @@ pub fn svmullt_lane_u64<const IMM_INDEX: i32>(op1: svuint32_t, op2: svuint32_t)
1054910573
#[inline(always)]
1055010574
#[target_feature(enable = "sve,sve2")]
1055110575
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10552-
#[cfg_attr(test, assert_instr(smullt))]
10576+
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(smullt))]
1055310577
pub fn svmullt_s16(op1: svint8_t, op2: svint8_t) -> svint16_t {
1055410578
unsafe extern "unadjusted" {
1055510579
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.sve.smullt.nxv8i16")]
@@ -10562,7 +10586,7 @@ pub fn svmullt_s16(op1: svint8_t, op2: svint8_t) -> svint16_t {
1056210586
#[inline(always)]
1056310587
#[target_feature(enable = "sve,sve2")]
1056410588
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10565-
#[cfg_attr(test, assert_instr(smullt))]
10589+
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(smullt))]
1056610590
pub fn svmullt_n_s16(op1: svint8_t, op2: i8) -> svint16_t {
1056710591
svmullt_s16(op1, svdup_n_s8(op2))
1056810592
}
@@ -10571,7 +10595,7 @@ pub fn svmullt_n_s16(op1: svint8_t, op2: i8) -> svint16_t {
1057110595
#[inline(always)]
1057210596
#[target_feature(enable = "sve,sve2")]
1057310597
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10574-
#[cfg_attr(test, assert_instr(smullt))]
10598+
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(smullt))]
1057510599
pub fn svmullt_s32(op1: svint16_t, op2: svint16_t) -> svint32_t {
1057610600
unsafe extern "unadjusted" {
1057710601
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.sve.smullt.nxv4i32")]
@@ -10584,7 +10608,7 @@ pub fn svmullt_s32(op1: svint16_t, op2: svint16_t) -> svint32_t {
1058410608
#[inline(always)]
1058510609
#[target_feature(enable = "sve,sve2")]
1058610610
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10587-
#[cfg_attr(test, assert_instr(smullt))]
10611+
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(smullt))]
1058810612
pub fn svmullt_n_s32(op1: svint16_t, op2: i16) -> svint32_t {
1058910613
svmullt_s32(op1, svdup_n_s16(op2))
1059010614
}
@@ -10593,7 +10617,7 @@ pub fn svmullt_n_s32(op1: svint16_t, op2: i16) -> svint32_t {
1059310617
#[inline(always)]
1059410618
#[target_feature(enable = "sve,sve2")]
1059510619
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10596-
#[cfg_attr(test, assert_instr(smullt))]
10620+
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(smullt))]
1059710621
pub fn svmullt_s64(op1: svint32_t, op2: svint32_t) -> svint64_t {
1059810622
unsafe extern "unadjusted" {
1059910623
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.sve.smullt.nxv2i64")]
@@ -10606,7 +10630,7 @@ pub fn svmullt_s64(op1: svint32_t, op2: svint32_t) -> svint64_t {
1060610630
#[inline(always)]
1060710631
#[target_feature(enable = "sve,sve2")]
1060810632
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10609-
#[cfg_attr(test, assert_instr(smullt))]
10633+
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(smullt))]
1061010634
pub fn svmullt_n_s64(op1: svint32_t, op2: i32) -> svint64_t {
1061110635
svmullt_s64(op1, svdup_n_s32(op2))
1061210636
}
@@ -10615,7 +10639,7 @@ pub fn svmullt_n_s64(op1: svint32_t, op2: i32) -> svint64_t {
1061510639
#[inline(always)]
1061610640
#[target_feature(enable = "sve,sve2")]
1061710641
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10618-
#[cfg_attr(test, assert_instr(umullt))]
10642+
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(umullt))]
1061910643
pub fn svmullt_u16(op1: svuint8_t, op2: svuint8_t) -> svuint16_t {
1062010644
unsafe extern "unadjusted" {
1062110645
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.sve.umullt.nxv8i16")]
@@ -10628,7 +10652,7 @@ pub fn svmullt_u16(op1: svuint8_t, op2: svuint8_t) -> svuint16_t {
1062810652
#[inline(always)]
1062910653
#[target_feature(enable = "sve,sve2")]
1063010654
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10631-
#[cfg_attr(test, assert_instr(umullt))]
10655+
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(umullt))]
1063210656
pub fn svmullt_n_u16(op1: svuint8_t, op2: u8) -> svuint16_t {
1063310657
svmullt_u16(op1, svdup_n_u8(op2))
1063410658
}
@@ -10637,7 +10661,7 @@ pub fn svmullt_n_u16(op1: svuint8_t, op2: u8) -> svuint16_t {
1063710661
#[inline(always)]
1063810662
#[target_feature(enable = "sve,sve2")]
1063910663
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10640-
#[cfg_attr(test, assert_instr(umullt))]
10664+
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(umullt))]
1064110665
pub fn svmullt_u32(op1: svuint16_t, op2: svuint16_t) -> svuint32_t {
1064210666
unsafe extern "unadjusted" {
1064310667
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.sve.umullt.nxv4i32")]
@@ -10650,7 +10674,7 @@ pub fn svmullt_u32(op1: svuint16_t, op2: svuint16_t) -> svuint32_t {
1065010674
#[inline(always)]
1065110675
#[target_feature(enable = "sve,sve2")]
1065210676
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10653-
#[cfg_attr(test, assert_instr(umullt))]
10677+
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(umullt))]
1065410678
pub fn svmullt_n_u32(op1: svuint16_t, op2: u16) -> svuint32_t {
1065510679
svmullt_u32(op1, svdup_n_u16(op2))
1065610680
}
@@ -10659,7 +10683,7 @@ pub fn svmullt_n_u32(op1: svuint16_t, op2: u16) -> svuint32_t {
1065910683
#[inline(always)]
1066010684
#[target_feature(enable = "sve,sve2")]
1066110685
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10662-
#[cfg_attr(test, assert_instr(umullt))]
10686+
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(umullt))]
1066310687
pub fn svmullt_u64(op1: svuint32_t, op2: svuint32_t) -> svuint64_t {
1066410688
unsafe extern "unadjusted" {
1066510689
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.sve.umullt.nxv2i64")]
@@ -10672,7 +10696,7 @@ pub fn svmullt_u64(op1: svuint32_t, op2: svuint32_t) -> svuint64_t {
1067210696
#[inline(always)]
1067310697
#[target_feature(enable = "sve,sve2")]
1067410698
#[unstable(feature = "stdarch_aarch64_sve", issue = "145052")]
10675-
#[cfg_attr(test, assert_instr(umullt))]
10699+
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(umullt))]
1067610700
pub fn svmullt_n_u64(op1: svuint32_t, op2: u32) -> svuint64_t {
1067710701
svmullt_u64(op1, svdup_n_u32(op2))
1067810702
}

‎crates/stdarch-gen-arm/spec/sve2/aarch64.spec.yml‎

Lines changed: 16 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,10 @@ generate_load_store_tests: true
1010
sve-unstable: &sve-unstable
1111
FnCall: [unstable, ['feature = "stdarch_aarch64_sve"', 'issue= "145052"']]
1212

13+
# `#[cfg_attr(all(test, not(target_env = "msvc"))]`
14+
msvc-disabled: &msvc-disabled
15+
FnCall: [all, [test, {FnCall: [not, ['target_env = "msvc"']]}]]
16+
1317
intrinsics:
1418
- name: svbext[{_n}_{type}]
1519
attr: [*sve-unstable]
@@ -2429,7 +2433,10 @@ intrinsics:
24292433
- LLVMLink: { name: "{type_kind[0].su}mullb.{sve_type[0]}" }
24302434

24312435
- name: svmullb_lane[_{type[0]}]
2432-
attr: [*sve-unstable]
2436+
attr:
2437+
- *sve-unstable
2438+
# FIXME(arm-maintainers): MSVC disassembly of `[su]mullb` fails
2439+
- FnCall: [cfg_attr, [*msvc-disabled, {FnCall: [assert_instr, ["{type_kind[0].su}mullb", "IMM_INDEX = 0"]]}]]
24332440
doc: Multiply long (bottom)
24342441
arguments: ["op1: {sve_type[1]}", "op2: {sve_type[1]}"]
24352442
return_type: "{sve_type[0]}"
@@ -2440,7 +2447,6 @@ intrinsics:
24402447
- [u64, u32]
24412448
static_defs: ["const IMM_INDEX: i32"]
24422449
constraints: [{ variable: IMM_INDEX, vec_max_elems_type: "{type[1]}" }]
2443-
assert_instr: [["{type_kind[0].su}mullb", "IMM_INDEX = 0"]]
24442450
compose:
24452451
- LLVMLink:
24462452
name: "{type_kind[0].su}mullb.lane.{sve_type[0]}"
@@ -2449,7 +2455,10 @@ intrinsics:
24492455
- FnCall: ["{llvm_link}", [$op1, $op2, $IMM_INDEX]]
24502456

24512457
- name: svmullt[{_n}_{type[0]}]
2452-
attr: [*sve-unstable]
2458+
attr:
2459+
- *sve-unstable
2460+
# FIXME(arm-maintainers): MSVC disassembly of `[su]mullt` fails
2461+
- FnCall: [cfg_attr, [*msvc-disabled, {FnCall: [assert_instr, ["{type_kind[0].su}mullt"]]}]]
24532462
doc: Multiply long (top)
24542463
arguments: ["op1: {sve_type[1]}", "op2: {sve_type[1]}"]
24552464
return_type: "{sve_type[0]}"
@@ -2460,13 +2469,15 @@ intrinsics:
24602469
- [u16, u8]
24612470
- [u32, u16]
24622471
- [u64, u32]
2463-
assert_instr: ["{type_kind[0].su}mullt"]
24642472
n_variant_op: op2
24652473
compose:
24662474
- LLVMLink: { name: "{type_kind[0].su}mullt.{sve_type[0]}" }
24672475

24682476
- name: svmullt_lane[_{type[0]}]
2469-
attr: [*sve-unstable]
2477+
attr:
2478+
- *sve-unstable
2479+
# FIXME(arm-maintainers): MSVC disassembly of `[su]mullt` fails
2480+
- FnCall: [cfg_attr, [*msvc-disabled, {FnCall: [assert_instr, ["{type_kind[0].su}mullt", "IMM_INDEX = 0"]]}]]
24702481
doc: Multiply long (top)
24712482
arguments: ["op1: {sve_type[1]}", "op2: {sve_type[1]}"]
24722483
return_type: "{sve_type[0]}"
@@ -2477,7 +2488,6 @@ intrinsics:
24772488
- [u64, u32]
24782489
static_defs: ["const IMM_INDEX: i32"]
24792490
constraints: [{ variable: IMM_INDEX, vec_max_elems_type: "{type[1]}" }]
2480-
assert_instr: [["{type_kind[0].su}mullt", "IMM_INDEX = 0"]]
24812491
compose:
24822492
- LLVMLink:
24832493
name: "{type_kind[0].su}mullt.lane.{sve_type[0]}"

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