From 924293da8d8c6d5934430a670545c2d56c8e8f9c Mon Sep 17 00:00:00 2001 From: Markus Reiter Date: Fri, 22 Apr 2022 12:26:18 +0200 Subject: [PATCH 1/5] Refactor `VectActive` to `Vector` and pass it to `DefaultHandler`. --- cortex-m-rt/macros/src/lib.rs | 16 ++-- src/peripheral/scb.rs | 171 +++++++++++++++++++--------------- xtask/src/lib.rs | 16 ++-- 3 files changed, 116 insertions(+), 87 deletions(-) diff --git a/cortex-m-rt/macros/src/lib.rs b/cortex-m-rt/macros/src/lib.rs index 0641c736..fd91c822 100644 --- a/cortex-m-rt/macros/src/lib.rs +++ b/cortex-m-rt/macros/src/lib.rs @@ -187,6 +187,13 @@ pub fn exception(args: TokenStream, input: TokenStream) -> TokenStream { && f.vis == Visibility::Inherited && f.sig.abi.is_none() && f.sig.inputs.len() == 1 + && match &f.sig.inputs[0] { + FnArg::Typed(arg) => match arg.ty.as_ref() { + Type::Path(t) => true, + _ => false, + }, + _ => false, + } && f.sig.generics.params.is_empty() && f.sig.generics.where_clause.is_none() && f.sig.variadic.is_none() @@ -202,7 +209,7 @@ pub fn exception(args: TokenStream, input: TokenStream) -> TokenStream { if !valid_signature { return parse::Error::new( fspan, - "`DefaultHandler` must have signature `unsafe fn(i16) [-> !]`", + "`DefaultHandler` must have signature `unsafe fn(Vector) [-> !]`", ) .to_compile_error() .into(); @@ -222,11 +229,8 @@ pub fn exception(args: TokenStream, input: TokenStream) -> TokenStream { pub unsafe extern "C" fn #tramp_ident() { extern crate core; - const SCB_ICSR: *const u32 = 0xE000_ED04 as *const u32; - - let irqn = unsafe { (core::ptr::read_volatile(SCB_ICSR) & 0x1FF) as i16 - 16 }; - - #ident(irqn) + let vect_active = ::cortex_m::peripheral::SCB::vect_active(); + #ident(vect_active) } #f diff --git a/src/peripheral/scb.rs b/src/peripheral/scb.rs index b9cf0e4b..52e3ec9b 100644 --- a/src/peripheral/scb.rs +++ b/src/peripheral/scb.rs @@ -1,5 +1,6 @@ //! System Control Block +use core::convert::TryFrom; use core::ptr; use volatile_register::RW; @@ -167,31 +168,15 @@ impl SCB { } impl SCB { - /// Returns the active exception number + /// Returns the `Vector` containing the active exception number. #[inline] - pub fn vect_active() -> VectActive { - let icsr = - unsafe { ptr::read_volatile(&(*SCB::PTR).icsr as *const _ as *const u32) } & 0x1FF; - - match icsr as u16 { - 0 => VectActive::ThreadMode, - 2 => VectActive::Exception(Exception::NonMaskableInt), - 3 => VectActive::Exception(Exception::HardFault), - #[cfg(not(armv6m))] - 4 => VectActive::Exception(Exception::MemoryManagement), - #[cfg(not(armv6m))] - 5 => VectActive::Exception(Exception::BusFault), - #[cfg(not(armv6m))] - 6 => VectActive::Exception(Exception::UsageFault), - #[cfg(any(armv8m, native))] - 7 => VectActive::Exception(Exception::SecureFault), - 11 => VectActive::Exception(Exception::SVCall), - #[cfg(not(armv6m))] - 12 => VectActive::Exception(Exception::DebugMonitor), - 14 => VectActive::Exception(Exception::PendSV), - 15 => VectActive::Exception(Exception::SysTick), - irqn => VectActive::Interrupt { irqn: irqn - 16 }, - } + pub fn vect_active() -> Vector { + let icsr = unsafe { ptr::read_volatile(&(*SCB::PTR).icsr as *const _ as *const u32) }; + let isrn = (icsr & 0x1FF) as u16; + + // NOTE(unsafe): `isrn` is in range [0, 511] and contains + // a valid `Exception` if in range [2, 15]. + unsafe { Vector::new_unchecked(isrn) } } } @@ -199,74 +184,110 @@ impl SCB { #[derive(Clone, Copy, Debug, Eq, PartialEq)] #[cfg_attr(feature = "serde", derive(Serialize, Deserialize))] #[cfg_attr(feature = "std", derive(PartialOrd, Hash))] +#[repr(i8)] pub enum Exception { /// Non maskable interrupt - NonMaskableInt, + NonMaskableInt = -14, /// Hard fault interrupt - HardFault, + HardFault = -13, /// Memory management interrupt (not present on Cortex-M0 variants) #[cfg(not(armv6m))] - MemoryManagement, + MemoryManagement = -12, /// Bus fault interrupt (not present on Cortex-M0 variants) #[cfg(not(armv6m))] - BusFault, + BusFault = -11, /// Usage fault interrupt (not present on Cortex-M0 variants) #[cfg(not(armv6m))] - UsageFault, + UsageFault = -10, /// Secure fault interrupt (only on ARMv8-M) #[cfg(any(armv8m, native))] - SecureFault, + SecureFault = -9, /// SV call interrupt - SVCall, + SVCall = -5, /// Debug monitor interrupt (not present on Cortex-M0 variants) #[cfg(not(armv6m))] - DebugMonitor, + DebugMonitor = -4, /// Pend SV interrupt - PendSV, + PendSV = -2, /// System Tick interrupt - SysTick, + SysTick = -1, } impl Exception { - /// Returns the IRQ number of this `Exception` + /// Create an `Exception` from an IRQ number. /// - /// The return value is always within the closed range `[-1, -14]` + /// `irqn` must be in the range `[-14, -1]` and contain a valid `Exception`. #[inline] - pub fn irqn(self) -> i8 { - match self { - Exception::NonMaskableInt => -14, - Exception::HardFault => -13, + const unsafe fn new_unchecked(irqn: i8) -> Self { + match irqn { + -14 => Self::NonMaskableInt, + -13 => Self::HardFault, #[cfg(not(armv6m))] - Exception::MemoryManagement => -12, + -12 => Self::MemoryManagement, #[cfg(not(armv6m))] - Exception::BusFault => -11, + -11 => Self::BusFault, #[cfg(not(armv6m))] - Exception::UsageFault => -10, + -10 => Self::UsageFault, #[cfg(any(armv8m, native))] - Exception::SecureFault => -9, - Exception::SVCall => -5, + -9 => Self::SecureFault, + -5 => Self::SVCall, #[cfg(not(armv6m))] - Exception::DebugMonitor => -4, - Exception::PendSV => -2, - Exception::SysTick => -1, + -4 => Self::DebugMonitor, + -2 => Self::PendSV, + -1 => Self::SysTick, + _ => core::hint::unreachable_unchecked(), } } + + /// Returns the IRQ number of this `Exception`. + /// + /// The return value is always within the closed range `[-14, -1]`. + #[inline] + pub const fn irqn(self) -> i8 { + self as i8 + } +} + +impl TryFrom for Exception { + type Error = i8; + + #[inline] + fn try_from(irqn: i8) -> Result { + Ok(match irqn { + -14 => Self::NonMaskableInt, + -13 => Self::HardFault, + #[cfg(not(armv6m))] + -12 => Self::MemoryManagement, + #[cfg(not(armv6m))] + -11 => Self::BusFault, + #[cfg(not(armv6m))] + -10 => Self::UsageFault, + #[cfg(any(armv8m, native))] + -9 => Self::SecureFault, + -5 => Self::SVCall, + #[cfg(not(armv6m))] + -4 => Self::DebugMonitor, + -2 => Self::PendSV, + -1 => Self::SysTick, + _ => return Err(irqn), + }) + } } -/// Active exception number +/// Exception/Interrupt Vector #[derive(Clone, Copy, Debug, Eq, PartialEq)] #[cfg_attr(feature = "serde", derive(Serialize, Deserialize))] #[cfg_attr(feature = "std", derive(PartialOrd, Hash))] -pub enum VectActive { +pub enum Vector { /// Thread mode ThreadMode, @@ -275,34 +296,38 @@ pub enum VectActive { /// Device specific exception (external interrupts) Interrupt { - /// Interrupt number. This number is always within half open range `[0, 512)` (9 bit) + /// Interrupt number. This number is always in range `[0, 495]` (9-bit integer - 16) irqn: u16, }, } -impl VectActive { - /// Converts a vector number into `VectActive` +impl Vector { + /// Create an `Vector` from an ISR number. + /// + /// `isrn` must be in the range `[0, 511]` and contain a valid + /// `Exception` variant if in range `[2, 15]`. #[inline] - pub fn from(vect_active: u16) -> Option { - Some(match vect_active { - 0 => VectActive::ThreadMode, - 2 => VectActive::Exception(Exception::NonMaskableInt), - 3 => VectActive::Exception(Exception::HardFault), - #[cfg(not(armv6m))] - 4 => VectActive::Exception(Exception::MemoryManagement), - #[cfg(not(armv6m))] - 5 => VectActive::Exception(Exception::BusFault), - #[cfg(not(armv6m))] - 6 => VectActive::Exception(Exception::UsageFault), - #[cfg(any(armv8m, native))] - 7 => VectActive::Exception(Exception::SecureFault), - 11 => VectActive::Exception(Exception::SVCall), - #[cfg(not(armv6m))] - 12 => VectActive::Exception(Exception::DebugMonitor), - 14 => VectActive::Exception(Exception::PendSV), - 15 => VectActive::Exception(Exception::SysTick), - irqn if (16..512).contains(&irqn) => VectActive::Interrupt { irqn: irqn - 16 }, - _ => return None, + const unsafe fn new_unchecked(isrn: u16) -> Self { + match isrn { + 0 => Self::ThreadMode, + 2..=15 => Self::Exception(Exception::new_unchecked(isrn as i8 - 16)), + 16..=511 => Self::Interrupt { irqn: isrn - 16 }, + _ => core::hint::unreachable_unchecked(), + } + } +} + +impl TryFrom for Vector { + type Error = u16; + + /// Try creating an `Vector` from an ISR number. + #[inline] + fn try_from(isrn: u16) -> Result { + Ok(match isrn { + 0 => Self::ThreadMode, + 2..=15 => Self::Exception(Exception::try_from(isrn as i8 - 16).or(Err(isrn))?), + 16..=511 => Self::Interrupt { irqn: isrn - 16 }, + _ => return Err(isrn), }) } } diff --git a/xtask/src/lib.rs b/xtask/src/lib.rs index 9d966868..2a3ee8fc 100644 --- a/xtask/src/lib.rs +++ b/xtask/src/lib.rs @@ -16,16 +16,16 @@ pub fn install_targets(targets: &mut dyn Iterator, toolchain: Optio assert!(status.success(), "rustup command failed: {:?}", rustup); } -// Check that serde and PartialOrd works with VectActive +// Check that serde and `PartialOrd` works with `Vector`. pub fn check_host_side() { - use cortex_m::peripheral::{itm::LocalTimestampOptions, scb::VectActive}; + use cortex_m::peripheral::{itm::LocalTimestampOptions, scb::Vector}; // check serde { - let v = VectActive::from(22).unwrap(); - let json = serde_json::to_string(&v).expect("Failed to serialize VectActive"); - let deser_v: VectActive = - serde_json::from_str(&json).expect("Failed to deserialize VectActive"); + let v = Vector::try_from(22).unwrap(); + let json = serde_json::to_string(&v).expect("Failed to serialize Vector"); + let deser_v: Vector = + serde_json::from_str(&json).expect("Failed to deserialize Vector"); assert_eq!(deser_v, v); let lts = LocalTimestampOptions::EnabledDiv4; @@ -37,8 +37,8 @@ pub fn check_host_side() { // check PartialOrd { - let a = VectActive::from(19).unwrap(); - let b = VectActive::from(20).unwrap(); + let a = Vector::try_from(19).unwrap(); + let b = Vector::try_from(20).unwrap(); assert!(a < b); } From 9baa54121fa95ee04763f8ed8847a044aca68cea Mon Sep 17 00:00:00 2001 From: Markus Reiter Date: Fri, 22 Apr 2022 15:56:04 +0200 Subject: [PATCH 2/5] Allow mapping interrupt in `Vector`. --- src/peripheral/scb.rs | 22 ++++++++++++++++------ xtask/src/lib.rs | 3 +-- 2 files changed, 17 insertions(+), 8 deletions(-) diff --git a/src/peripheral/scb.rs b/src/peripheral/scb.rs index 52e3ec9b..3ed8ba4d 100644 --- a/src/peripheral/scb.rs +++ b/src/peripheral/scb.rs @@ -287,7 +287,7 @@ impl TryFrom for Exception { #[derive(Clone, Copy, Debug, Eq, PartialEq)] #[cfg_attr(feature = "serde", derive(Serialize, Deserialize))] #[cfg_attr(feature = "std", derive(PartialOrd, Hash))] -pub enum Vector { +pub enum Vector { /// Thread mode ThreadMode, @@ -295,10 +295,10 @@ pub enum Vector { Exception(Exception), /// Device specific exception (external interrupts) - Interrupt { + Interrupt( /// Interrupt number. This number is always in range `[0, 495]` (9-bit integer - 16) - irqn: u16, - }, + INT, + ), } impl Vector { @@ -311,10 +311,20 @@ impl Vector { match isrn { 0 => Self::ThreadMode, 2..=15 => Self::Exception(Exception::new_unchecked(isrn as i8 - 16)), - 16..=511 => Self::Interrupt { irqn: isrn - 16 }, + 16..=511 => Self::Interrupt(isrn - 16), _ => core::hint::unreachable_unchecked(), } } + + /// Map the interrupt number to a different type. + #[inline] + pub fn map_interrupt(&self, f: impl FnOnce(u16) -> INT) -> Vector { + match self { + Self::ThreadMode => Vector::ThreadMode, + Self::Exception(ex) => Vector::Exception(*ex), + Self::Interrupt(irqn) => Vector::Interrupt(f(*irqn)), + } + } } impl TryFrom for Vector { @@ -326,7 +336,7 @@ impl TryFrom for Vector { Ok(match isrn { 0 => Self::ThreadMode, 2..=15 => Self::Exception(Exception::try_from(isrn as i8 - 16).or(Err(isrn))?), - 16..=511 => Self::Interrupt { irqn: isrn - 16 }, + 16..=511 => Self::Interrupt(isrn - 16), _ => return Err(isrn), }) } diff --git a/xtask/src/lib.rs b/xtask/src/lib.rs index 2a3ee8fc..1105f956 100644 --- a/xtask/src/lib.rs +++ b/xtask/src/lib.rs @@ -24,8 +24,7 @@ pub fn check_host_side() { { let v = Vector::try_from(22).unwrap(); let json = serde_json::to_string(&v).expect("Failed to serialize Vector"); - let deser_v: Vector = - serde_json::from_str(&json).expect("Failed to deserialize Vector"); + let deser_v: Vector = serde_json::from_str(&json).expect("Failed to deserialize Vector"); assert_eq!(deser_v, v); let lts = LocalTimestampOptions::EnabledDiv4; From cfa088b5b7c7893af7ff3a313fd121aafd2e09ee Mon Sep 17 00:00:00 2001 From: Markus Reiter Date: Thu, 5 May 2022 13:47:55 +0200 Subject: [PATCH 3/5] Add `SCB::vect_pending` function. --- src/peripheral/scb.rs | 26 +++++++++++++++++++++++--- 1 file changed, 23 insertions(+), 3 deletions(-) diff --git a/src/peripheral/scb.rs b/src/peripheral/scb.rs index 3ed8ba4d..c51da833 100644 --- a/src/peripheral/scb.rs +++ b/src/peripheral/scb.rs @@ -168,13 +168,33 @@ impl SCB { } impl SCB { + #[inline] + fn icsr() -> u32 { + unsafe { ptr::read_volatile(&(*Self::PTR).icsr as *const _ as *const u32) } + } + + /// Return the `Vector` containing the pending exception number, if any. + #[inline] + pub fn vect_pending() -> Option { + let icsr = Self::icsr(); + let isrn = ((icsr >> 12) & 0x7F) as u16; + + match isrn { + // No pending exceptions. + 0 => return None, + // SAFETY: `isrn` is in range [1, 127] and contains + // a valid `Exception` if in range [2, 15]. + isrn => unsafe { Some(Vector::new_unchecked(isrn)) }, + } + } + /// Returns the `Vector` containing the active exception number. #[inline] pub fn vect_active() -> Vector { - let icsr = unsafe { ptr::read_volatile(&(*SCB::PTR).icsr as *const _ as *const u32) }; + let icsr = Self::icsr(); let isrn = (icsr & 0x1FF) as u16; - // NOTE(unsafe): `isrn` is in range [0, 511] and contains + // SAFETY: `isrn` is in range [0, 511] and contains // a valid `Exception` if in range [2, 15]. unsafe { Vector::new_unchecked(isrn) } } @@ -283,7 +303,7 @@ impl TryFrom for Exception { } } -/// Exception/Interrupt Vector +/// Active exception number #[derive(Clone, Copy, Debug, Eq, PartialEq)] #[cfg_attr(feature = "serde", derive(Serialize, Deserialize))] #[cfg_attr(feature = "std", derive(PartialOrd, Hash))] From 87d8b04d778ec8be382af601fbab9924b3723202 Mon Sep 17 00:00:00 2001 From: Markus Reiter Date: Thu, 5 May 2022 14:56:00 +0200 Subject: [PATCH 4/5] Use edition 2021 for `xtask`. --- xtask/Cargo.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xtask/Cargo.toml b/xtask/Cargo.toml index b5b5c5f4..c97b6d2d 100644 --- a/xtask/Cargo.toml +++ b/xtask/Cargo.toml @@ -2,7 +2,7 @@ name = "xtask" version = "0.0.0" authors = ["The Cortex-M Team "] -edition = "2018" +edition = "2021" publish = false [[test]] From 53c40eb6ee97439b0d23bae654b1b8ad701b338e Mon Sep 17 00:00:00 2001 From: Markus Reiter Date: Thu, 5 May 2022 15:21:10 +0200 Subject: [PATCH 5/5] Fix tests. --- cortex-m-rt/examples/divergent-default-handler.rs | 4 ++-- cortex-m-rt/examples/override-exception.rs | 8 +++----- cortex-m-rt/examples/unsafe-default-handler.rs | 4 ++-- cortex-m-rt/examples/unsafety.rs | 4 ++-- cortex-m-rt/macros/src/lib.rs | 2 +- cortex-m-rt/src/lib.rs | 5 +++-- .../tests/compile-fail/default-handler-bad-signature-1.rs | 6 ++++-- .../tests/compile-fail/default-handler-bad-signature-2.rs | 6 ++++-- cortex-m-rt/tests/compile-fail/default-handler-hidden.rs | 6 ++++-- cortex-m-rt/tests/compile-fail/default-handler-twice.rs | 7 +++++-- cortex-m-rt/tests/compile-fail/exception-nmi-unsafe.rs | 4 +++- cortex-m-rt/tests/compile-fail/unsafe-init-static.rs | 4 +++- 12 files changed, 36 insertions(+), 24 deletions(-) diff --git a/cortex-m-rt/examples/divergent-default-handler.rs b/cortex-m-rt/examples/divergent-default-handler.rs index 32902540..14abbe84 100644 --- a/cortex-m-rt/examples/divergent-default-handler.rs +++ b/cortex-m-rt/examples/divergent-default-handler.rs @@ -2,9 +2,9 @@ #![no_main] #![no_std] -extern crate cortex_m_rt; extern crate panic_halt; +use cortex_m::peripheral::scb::Vector; use cortex_m_rt::{entry, exception}; #[entry] @@ -13,6 +13,6 @@ fn foo() -> ! { } #[exception] -unsafe fn DefaultHandler(_irqn: i16) -> ! { +unsafe fn DefaultHandler(_: Vector) -> ! { loop {} } diff --git a/cortex-m-rt/examples/override-exception.rs b/cortex-m-rt/examples/override-exception.rs index 3190b77d..b91d76b3 100644 --- a/cortex-m-rt/examples/override-exception.rs +++ b/cortex-m-rt/examples/override-exception.rs @@ -4,12 +4,10 @@ #![no_main] #![no_std] -extern crate cortex_m; -extern crate cortex_m_rt as rt; extern crate panic_halt; -use cortex_m::asm; -use rt::{entry, exception, ExceptionFrame}; +use cortex_m::{asm, peripheral::scb::Vector}; +use cortex_m_rt::{entry, exception, ExceptionFrame}; #[entry] fn main() -> ! { @@ -17,7 +15,7 @@ fn main() -> ! { } #[exception] -unsafe fn DefaultHandler(_irqn: i16) { +unsafe fn DefaultHandler(_: Vector) { asm::bkpt(); } diff --git a/cortex-m-rt/examples/unsafe-default-handler.rs b/cortex-m-rt/examples/unsafe-default-handler.rs index a805c120..30a00621 100644 --- a/cortex-m-rt/examples/unsafe-default-handler.rs +++ b/cortex-m-rt/examples/unsafe-default-handler.rs @@ -2,9 +2,9 @@ #![no_main] #![no_std] -extern crate cortex_m_rt; extern crate panic_halt; +use cortex_m::peripheral::scb::Vector; use cortex_m_rt::{entry, exception}; #[entry] @@ -13,4 +13,4 @@ fn foo() -> ! { } #[exception] -unsafe fn DefaultHandler(_irqn: i16) {} +unsafe fn DefaultHandler(_: Vector) {} diff --git a/cortex-m-rt/examples/unsafety.rs b/cortex-m-rt/examples/unsafety.rs index cdb5acaf..47a28236 100644 --- a/cortex-m-rt/examples/unsafety.rs +++ b/cortex-m-rt/examples/unsafety.rs @@ -4,9 +4,9 @@ #![no_main] #![no_std] -extern crate cortex_m_rt; extern crate panic_halt; +use cortex_m::peripheral::scb::Vector; use cortex_m_rt::{entry, exception, ExceptionFrame}; #[entry] @@ -17,7 +17,7 @@ unsafe fn main() -> ! { } #[exception] -unsafe fn DefaultHandler(_irqn: i16) { +unsafe fn DefaultHandler(_: Vector) { foo(); } diff --git a/cortex-m-rt/macros/src/lib.rs b/cortex-m-rt/macros/src/lib.rs index fd91c822..b902458c 100644 --- a/cortex-m-rt/macros/src/lib.rs +++ b/cortex-m-rt/macros/src/lib.rs @@ -189,7 +189,7 @@ pub fn exception(args: TokenStream, input: TokenStream) -> TokenStream { && f.sig.inputs.len() == 1 && match &f.sig.inputs[0] { FnArg::Typed(arg) => match arg.ty.as_ref() { - Type::Path(t) => true, + Type::Path(_) => true, _ => false, }, _ => false, diff --git a/cortex-m-rt/src/lib.rs b/cortex-m-rt/src/lib.rs index 97540e78..fb135859 100644 --- a/cortex-m-rt/src/lib.rs +++ b/cortex-m-rt/src/lib.rs @@ -785,11 +785,12 @@ pub use macros::entry; /// - Setting the default handler /// /// ``` +/// use cortex_m::peripheral::scb::Vector; /// use cortex_m_rt::exception; /// /// #[exception] -/// unsafe fn DefaultHandler(irqn: i16) { -/// println!("IRQn = {}", irqn); +/// unsafe fn DefaultHandler(v: Vector) { +/// println!("Unexpected interrupt: {:?}", v); /// } /// /// # fn main() {} diff --git a/cortex-m-rt/tests/compile-fail/default-handler-bad-signature-1.rs b/cortex-m-rt/tests/compile-fail/default-handler-bad-signature-1.rs index b5908839..fdf32b8c 100644 --- a/cortex-m-rt/tests/compile-fail/default-handler-bad-signature-1.rs +++ b/cortex-m-rt/tests/compile-fail/default-handler-bad-signature-1.rs @@ -1,9 +1,11 @@ #![no_main] #![no_std] +extern crate cortex_m; extern crate cortex_m_rt; extern crate panic_halt; +use cortex_m::peripheral::scb::Vector; use cortex_m_rt::{entry, exception}; #[entry] @@ -12,5 +14,5 @@ fn foo() -> ! { } #[exception] -unsafe fn DefaultHandler(_irqn: i16, undef: u32) {} -//~^ ERROR `DefaultHandler` must have signature `unsafe fn(i16) [-> !]` +unsafe fn DefaultHandler(_: Vector, _: u32) {} +//~^ ERROR `DefaultHandler` must have signature `unsafe fn(Vector) [-> !]` diff --git a/cortex-m-rt/tests/compile-fail/default-handler-bad-signature-2.rs b/cortex-m-rt/tests/compile-fail/default-handler-bad-signature-2.rs index 0dadd6ab..0dc9f3e5 100644 --- a/cortex-m-rt/tests/compile-fail/default-handler-bad-signature-2.rs +++ b/cortex-m-rt/tests/compile-fail/default-handler-bad-signature-2.rs @@ -1,9 +1,11 @@ #![no_main] #![no_std] +extern crate cortex_m; extern crate cortex_m_rt; extern crate panic_halt; +use cortex_m::peripheral::scb::Vector; use cortex_m_rt::{entry, exception}; #[entry] @@ -12,7 +14,7 @@ fn foo() -> ! { } #[exception] -unsafe fn DefaultHandler(_irqn: i16) -> u32 { - //~^ ERROR `DefaultHandler` must have signature `unsafe fn(i16) [-> !]` +unsafe fn DefaultHandler(_: Vector) -> u32 { + //~^ ERROR `DefaultHandler` must have signature `unsafe fn(Vector) [-> !]` 0 } diff --git a/cortex-m-rt/tests/compile-fail/default-handler-hidden.rs b/cortex-m-rt/tests/compile-fail/default-handler-hidden.rs index c658e2bf..129d771c 100644 --- a/cortex-m-rt/tests/compile-fail/default-handler-hidden.rs +++ b/cortex-m-rt/tests/compile-fail/default-handler-hidden.rs @@ -4,10 +4,11 @@ #![no_main] #![no_std] +extern crate cortex_m; extern crate cortex_m_rt; extern crate panic_halt; -use cortex_m_rt::{entry, exception}; +use cortex_m_rt::entry; #[entry] fn foo() -> ! { @@ -15,8 +16,9 @@ fn foo() -> ! { } mod hidden { + use cortex_m::peripheral::scb::Vector; use cortex_m_rt::exception; #[exception] - unsafe fn DefaultHandler(_irqn: i16) {} + unsafe fn DefaultHandler(_: Vector) {} } diff --git a/cortex-m-rt/tests/compile-fail/default-handler-twice.rs b/cortex-m-rt/tests/compile-fail/default-handler-twice.rs index bbf2eddd..c611510d 100644 --- a/cortex-m-rt/tests/compile-fail/default-handler-twice.rs +++ b/cortex-m-rt/tests/compile-fail/default-handler-twice.rs @@ -1,9 +1,11 @@ #![no_main] #![no_std] +extern crate cortex_m; extern crate cortex_m_rt; extern crate panic_halt; +use cortex_m::peripheral::scb::Vector; use cortex_m_rt::{entry, exception}; #[entry] @@ -12,11 +14,12 @@ fn foo() -> ! { } #[exception] -unsafe fn DefaultHandler(_irqn: i16) {} +unsafe fn DefaultHandler(_: Vector) {} pub mod reachable { + use cortex_m::peripheral::scb::Vector; use cortex_m_rt::exception; #[exception] //~ ERROR symbol `DefaultHandler` is already defined - unsafe fn DefaultHandler(_irqn: i16) {} + unsafe fn DefaultHandler(_: Vector) {} } diff --git a/cortex-m-rt/tests/compile-fail/exception-nmi-unsafe.rs b/cortex-m-rt/tests/compile-fail/exception-nmi-unsafe.rs index f5de2f8d..41bac473 100644 --- a/cortex-m-rt/tests/compile-fail/exception-nmi-unsafe.rs +++ b/cortex-m-rt/tests/compile-fail/exception-nmi-unsafe.rs @@ -1,9 +1,11 @@ #![no_main] #![no_std] +extern crate cortex_m; extern crate cortex_m_rt; extern crate panic_halt; +use cortex_m::peripheral::scb::Vector; use cortex_m_rt::{entry, exception}; #[entry] @@ -12,7 +14,7 @@ fn foo() -> ! { } #[exception] -fn DefaultHandler(_irq: i16) {} +fn DefaultHandler(_: Vector) {} //~^ ERROR defining a `DefaultHandler` is unsafe and requires an `unsafe fn` #[exception] diff --git a/cortex-m-rt/tests/compile-fail/unsafe-init-static.rs b/cortex-m-rt/tests/compile-fail/unsafe-init-static.rs index 23105f15..4aec4a72 100644 --- a/cortex-m-rt/tests/compile-fail/unsafe-init-static.rs +++ b/cortex-m-rt/tests/compile-fail/unsafe-init-static.rs @@ -4,9 +4,11 @@ #![no_main] #![no_std] +extern crate cortex_m; extern crate cortex_m_rt; extern crate panic_halt; +use cortex_m::peripheral::scb::Vector; use cortex_m_rt::{entry, exception, interrupt}; #[allow(non_camel_case_types)] @@ -29,7 +31,7 @@ fn SVCall() { } #[exception] -unsafe fn DefaultHandler(_irq: i16) { +unsafe fn DefaultHandler(_: Vector) { static mut X: u32 = init(); //~ ERROR requires unsafe }