@@ -65,14 +65,12 @@ static u64 hi64(u64 val, u64 pc) {
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// LU52I.D simply set bits to [51:31] and to [63:53], respectively.
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//
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// Compensating all the sign-extensions is a bit complicated.
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- bool x = val & 0x800 ;
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- bool y = (page (val + 0x800 ) - page (pc)) & 0x8000'0000 ;
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-
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- if (x && !y)
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- return val - 0x1'0000'0000 ;
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- if (!x && y)
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- return val + 0x1'0000'0000 ;
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- return val;
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+ u64 x = page (val) - page (pc);
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+ if (val & 0x800 )
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+ x += 0x1000 - 0x1'0000'0000 ;
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+ if (x & 0x8000'0000 )
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+ x += 0x1'0000'0000 ;
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+ return x;
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}
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static u64 higher20 (u64 val, u64 pc) {
@@ -328,7 +326,6 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
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write_k12 (loc, S + A);
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break ;
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case R_LARCH_PCALA_HI20:
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- check (S + A - P, -(1LL << 31 ), 1LL << 31 );
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write_j20 (loc, hi20 (S + A, P));
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break ;
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case R_LARCH_PCALA64_LO20:
@@ -587,6 +584,7 @@ void InputSection<E>::scan_relocations(Context<E> &ctx) {
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scan_dyn_absrel (ctx, sym, rel);
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break ;
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case R_LARCH_B26:
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+ case R_LARCH_PCALA_HI20:
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if (sym.is_imported )
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sym.flags |= NEEDS_PLT;
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break ;
@@ -620,7 +618,6 @@ void InputSection<E>::scan_relocations(Context<E> &ctx) {
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case R_LARCH_ABS_LO12:
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case R_LARCH_ABS64_LO20:
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case R_LARCH_ABS64_HI12:
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- case R_LARCH_PCALA_HI20:
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case R_LARCH_PCALA_LO12:
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case R_LARCH_PCALA64_LO20:
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case R_LARCH_PCALA64_HI12:
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