when I run this command , it gets some errors. make clean simulate verify postverify XLEN=32 RISCV_DEVICE=I

[jundijiujieke]

when I run this command , it gets some errors. make clean simulate verify postverify XLEN=32 RISCV_DEVICE=I
It shows 'src/JALR-01.S:31: Error: unrecognized opcode csrw mepc,t0', extension zicsr' required'

[duncangraham-Imperas]

This appears to be a cross compiler toolchain configuration issue. Earlier toolchains included zicsr as default because it was part of RV32I etc. This was later made optional so must be specifically enabled.
What toolchain are you using?
I expect the march argument should be modified to specify that extension zicsr is required, typically by adding _zicsr to the march field.
Try changing riscv-test-suite/rv32i_m/I/Makefile so that -march=rv32i_zicsr .. this syntax may not be exactly right! I hope the toolchain GCC help would provide a clue if not.

[jundijiujieke]

Thanks for your advice. I am using the riscv64-unknow-elf-gcc, so do these tests have to work on the riscv-32 bit toolchain? Maybe it is the problem about my compiler toolchain.

[duncangraham-Imperas]

Sorry, riscv64-unknown-elf-gcc does not narrow down the toolchain you are using; I have seen many versions that provide this.

Please let me know where you downloaded and the result of executing
riscv64-unknown-elf-gcc --version

[jundijiujieke]

This is my riscv64-unknown-elf-gcc version 12.2.0

and I download the riscv64-unknown-elf-gcc from this link.
https://github.com/riscv-collab/riscv-gnu-toolchain