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		(title "NEC PC-Engine IFU-30")
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		(comment 1 "Author: Regis Galland")
		(comment 2 "NEC IFU-30 PCB reverse engineered schematics")
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	(text "All input signals biased to 3.95V\n"
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	(text "TR6 (A144) seems to be a pre-biased PNP transistor with 47kOhm on base.\nThis explain why there is no resistor between base pin and IC pin.\n\nIn normal operation, IC113_P79 is high and C12 charges quickly to 5V in about 75ms\nas the time constant is close to R39 * C12 = 470 * 47 * 10-6 = 22 ms\n\nWhen IC113_P79 goes low, C12 discharges via: \n1) R40 when IC113_P80 is high and TR7 is shorting R41 to ground\n	t1 = R40 * C12 = 39000 * 47 * 10-6 = 1.8s\n2) R40 and R41 as TR7 is open \n	t2 = (R40+R41) * C12 = 121000 * 47 * 10-6 = 5.687s\n\nIf we consider that it take 3 t to go to 0V, it will take 4.6s with t1 and 17s with t2.\n\nAttenuation is M51131 is almost linear at -20dB/680ms for t1 and -20dB/2190ms for t2.\nHowever attenuation does not start until VC12 drops below 4.2V which takes 310ms with t1 and 920ms with t2 and\nattenuation is a bit softer before it reaches -20dB.\n\nWith regards to register 180F, we can conclude that:\n- P81 =~{b3}; when b3 = 0 , bit2 = P80, bit1 = ~{P79}. Other bits don't do anything.\n\n"
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	(text "text to paste into https://latex2png.com/ to have nice equations\n\nV_{BIAS} = \\frac{R20}{R20 + R19} \\times (9V - V_{D1} - V_{TR2 BE}) \\\\\nV_{BIAS} = \\frac{10k}{10k + 10k} \\times 7.9 \\\\\nV_{BIAS} = 1/2 \\times 7.9 \\\\\nV_{BIAS} = 3.95V\n\nIC117A calculations\n\nAt DC level\n\\frac{V_{IFUL}/R16 + V_{IFUR}/R22 + V_{IFULR}/R21}{1/R16 + 1/R22 + 1/R21} = V_{BIAS} \\\\\n\\frac{3.95/33k + 3.95/33k + V_{IFULR}/39k}{1/33k + 1/33k + 1/39k} = 3.95 \\\\\nV_{IFULR} = 39k \\times 3.95 \\times (1/11.595k - 1/33K - 1/33K) \\\\\nV_{IFULR} = 3.95V\n\nAt AC level\n\\frac{V_{IFUL}/R16 + V_{IFUR}/R22 + V_{IFULR}/R21}{1/R16 + 1/R22 + 1/R21} = 0 \\\\\nV_{IFUL}/R16 + V_{IFUR}/R22 + V_{IFULR}/R21 = 0 \\\\\nV_{IFUL}/33k + V_{IFUR}/33k + V_{IFULR}/39k = 0 \\\\\nV_{IFULR} = - V_{IFUR} \\times 39/33 - V_{IFUR} \\times 39/33\n\nGain is 39/33 = 1.18"
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	(text "Stereo CD and ADPCM signals are mixed together \nto be sent as mono to the RF output on the console."
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	(text "text to paste into https://latex2png.com/ to have nice equations\n\nIC116A & IC116B calculations\n\nAt DC level\n\\frac{V_{IFUL}/R32 + V_{BIAS}/(R118+R31) + V_{AUDIOL}/R93}{1/R32 + 1/(R118+R31) + 1/R93} = V_{BIAS} \\\\\n\\frac{3.95/22k + 3.95/(15k+22k) + V_{AUDIOL}/62k} = 3.95 \\times (1/22k + 1/(15k+22k) + 1/62) \\\\\nV_{AUDIOL} = 62k \\times 3.95 \\times (1/11.285k - 1/22K - 1/37K) \\\\\nV_{IFULR} = 3.95V\n\nAt AC level\n\\frac{V_{IFUL}/R32 + V_{PCEL}/R31 + V_{AUDIOL}/R93}{1/R32 + 1/R31 + 1/R93} = 0 \\\\\nV_{IFUL}/R32 + V_{PCEL}/R31 + V_{AUDIOL}/R93 = 0 \\\\\nV_{AUDIOL} = - R93 \\times (V_{IFUL}/R32 + V_{PCEL}/R31) \\\\\nV_{AUDIOL} = - V_{IFUL} \\times 62/22 - V_{PCEL} \\times 62/22 \\\\\n\nGain is 62/22 = 2.818\n\nMultiplied by previous gain, we get 8.2/22 * 62/22 = 1.05 close enough to 1 (by 5%)"
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	(text "With control (P12) connected to REF (5.2V),\nVolume 1 is applied to both left and right\n(simultaneous volume mode)\nVolume 2 is actually balance control but is fixed to Vref/2 which makes L and R volumes even."
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