Update csnext commit tip ##build ##arch

libr/arch/p/arm/plugin_cs.c

@@ -2,7 +2,12 @@
 
 #include <r_arch.h>
 #include <sdb/ht_uu.h>
+
+#if CS_API_MAJOR < 6
+#define AARCH64LAYOUT_VL_INVALID AARCH64LAYOUT_INVALID
+#endif
 #define CAPSTONE_AARCH64_COMPAT_HEADER
+#define CAPSTONE_ARM_COMPAT_HEADER
 #include <capstone/capstone.h>
 #include <capstone/arm.h>
 #include <r_util/r_assert.h>
@@ -120,61 +125,8 @@ static inline HtUU *ht_it_for_session (RArchSession *as) {
 // *********************
 // CS6 compatibility:
 #if CS_API_MAJOR == 6
-typedef enum arm_cc {
-	ARM_CC_EQ = ARMCC_EQ,
-	ARM_CC_NE = ARMCC_NE,
-	ARM_CC_HS = ARMCC_HS,
-	ARM_CC_LO = ARMCC_LO,
-	ARM_CC_MI = ARMCC_MI,
-	ARM_CC_PL = ARMCC_PL,
-	ARM_CC_VS = ARMCC_VS,
-	ARM_CC_VC = ARMCC_VC,
-	ARM_CC_HI = ARMCC_HI,
-	ARM_CC_LS = ARMCC_LS,
-	ARM_CC_GE = ARMCC_GE,
-	ARM_CC_LT = ARMCC_LT,
-	ARM_CC_GT = ARMCC_GT,
-	ARM_CC_LE = ARMCC_LE,
-	ARM_CC_AL = ARMCC_AL,
-
-	ARM_CC_INVALID = ARMCC_UNDEF
-} arm_cc;
-
-typedef enum arm64_cc {
-	ARM64_CC_INVALID = ARM64CC_Invalid,
-	ARM64_CC_EQ = ARM64CC_EQ,
-	ARM64_CC_NE = ARM64CC_NE,
-	ARM64_CC_HS = ARM64CC_HS,
-	ARM64_CC_LO = ARM64CC_LO,
-	ARM64_CC_MI = ARM64CC_MI,
-	ARM64_CC_PL = ARM64CC_PL,
-	ARM64_CC_VS = ARM64CC_VS,
-	ARM64_CC_VC = ARM64CC_VC,
-	ARM64_CC_HI = ARM64CC_HI,
-	ARM64_CC_LS = ARM64CC_LS,
-	ARM64_CC_GE = ARM64CC_GE,
-	ARM64_CC_LT = ARM64CC_LT,
-	ARM64_CC_GT = ARM64CC_GT,
-	ARM64_CC_LE = ARM64CC_LE,
-	ARM64_CC_AL = ARM64CC_AL,
-	ARM64_CC_NV = ARM64CC_NV
-} arm64_cc;
-
-typedef enum arm64_vas {
-	ARM64_VAS_INVALID = ARM64LAYOUT_INVALID,
-	ARM64_VAS_16B = ARM64LAYOUT_VL_16B,
-	ARM64_VAS_8B = ARM64LAYOUT_VL_8B,
-	ARM64_VAS_4B = ARM64LAYOUT_VL_4B,
-	ARM64_VAS_8H = ARM64LAYOUT_VL_8H,
-	ARM64_VAS_4H = ARM64LAYOUT_VL_4H,
-	ARM64_VAS_2H = ARM64LAYOUT_VL_2H,
-	ARM64_VAS_4S = ARM64LAYOUT_VL_4S,
-	ARM64_VAS_2S = ARM64LAYOUT_VL_2S,
-	ARM64_VAS_1S = ARM64LAYOUT_VL_1S,
-	ARM64_VAS_2D = ARM64LAYOUT_VL_2D,
-	ARM64_VAS_1D = ARM64LAYOUT_VL_1D,
-	ARM64_VAS_1Q = ARM64LAYOUT_VL_1Q
-} arm64_vas;
+
+#define ARM64_CC_NV AArch64CC_NV
 
 #define ARM_INS_NOP ARM_INS_ALIAS_NOP
 
@@ -226,9 +178,9 @@ typedef enum arm64_vas {
 #define ARM64_GRP_NEON ARM64_FEATURE_HASNEON
 #define ARM64_GRP_FPARMV8 ARM64_FEATURE_HASFPARMV8
 
-#define ARM_GRP_CRC ARM_FEATURE_HasCRC
-#define ARM_GRP_NEON ARM_FEATURE_HasNEON
-#define ARM_GRP_FPARMV8 ARM_FEATURE_HasFPARMv8
+#define ARM_GRP_CRC ARM_FEATURE_HASCRC
+#define ARM_GRP_NEON ARM_FEATURE_HASNEON
+#define ARM_GRP_FPARMV8 ARM_FEATURE_HASFPARMV8
 #endif
 // *********************
 

shlr/Makefile

@@ -49,7 +49,7 @@ CS_ARCHIVE=https://$(CS_URL_BASE)/archive
 CS_UPD=20201203
 # NOTE: when you update CS_TIP or CS_BRA, also update them in shlr/meson.build
 ifeq ($(USE_CSNEXT),1)
-CS_TIP=76242699291a998d27934442ab5b425e2d566a03
+CS_TIP=e46838ed974948b4446c7c478508409e0000aeaa
 CS_BRA=next
 else
 ifeq ($(USE_CS4),1)

shlr/meson.build

@@ -21,7 +21,7 @@ else
     patches_files = []
     # NOTE: when you update CS_TIP or CS_BRA, also update them in shlr/Makefile
     if capstone_version == 'next'
-      CS_TIP = '76242699291a998d27934442ab5b425e2d566a03'
+      CS_TIP = 'e46838ed974948b4446c7c478508409e0000aeaa'
       CS_BRA = 'next'
       patches_files = [
         'fix-x86-16.patch',