1212#include "stm32f030xc.h"
1313
1414#include <pbdrv/motor.h>
15- #include <pbio/config.h>
16-
17- void _pbdrv_motor_init (void ) {
18- // TIM3 is used for port C PWM
19- TIM3 -> PSC = 3 ; // divide by 4 (= 3 + 1), so ticks are 12MHz
20- TIM3 -> ARR = 10000 ; // 12MHz divided by 10k makes 1.2kHz PWM
21- TIM3 -> BDTR |= TIM_BDTR_MOE ;
22-
23- // port B
24- // init PWM pins as gpio out low (coasting) and prepare alternate function
25- GPIOC -> MODER = (GPIOC -> MODER & ~GPIO_MODER_MODER6_Msk ) | (1 << GPIO_MODER_MODER6_Pos );
26- GPIOC -> BRR = GPIO_BRR_BR_6 ;
27- GPIOC -> MODER = (GPIOC -> MODER & ~GPIO_MODER_MODER8_Msk ) | (1 << GPIO_MODER_MODER8_Pos );
28- GPIOC -> BRR = GPIO_BRR_BR_8 ;
29- GPIOC -> AFR [0 ] = (GPIOC -> AFR [0 ] & ~GPIO_AFRL_AFSEL6_Msk ) | (0 << GPIO_AFRL_AFSEL6_Pos );
30- GPIOC -> AFR [1 ] = (GPIOC -> AFR [1 ] & ~GPIO_AFRH_AFSEL8_Msk ) | (0 << GPIO_AFRH_AFSEL8_Pos );
31- TIM3 -> CCR1 = 0 ;
32- TIM3 -> CCR3 = 0 ;
33- TIM3 -> CCMR1 |= (6 << TIM_CCMR1_OC1M_Pos ) | TIM_CCMR1_OC1PE ; // PWM mode 1
34- TIM3 -> CCER |= TIM_CCER_CC1E ;
35- TIM3 -> CCMR2 |= (6 << TIM_CCMR2_OC3M_Pos ) | TIM_CCMR2_OC3PE ; // PWM mode 1
36- TIM3 -> CCER |= TIM_CCER_CC3E ;
37-
38- // port A
39- // init PWM pins as gpio out low (coasting) and prepare alternate function
40- GPIOC -> MODER = (GPIOC -> MODER & ~GPIO_MODER_MODER7_Msk ) | (1 << GPIO_MODER_MODER7_Pos );
41- GPIOC -> BRR = GPIO_BRR_BR_7 ;
42- GPIOC -> MODER = (GPIOC -> MODER & ~GPIO_MODER_MODER9_Msk ) | (1 << GPIO_MODER_MODER9_Pos );
43- GPIOC -> BRR = GPIO_BRR_BR_9 ;
44- GPIOC -> AFR [0 ] = (GPIOC -> AFR [0 ] & ~GPIO_AFRL_AFSEL7_Msk ) | (0 << GPIO_AFRL_AFSEL7_Pos );
45- GPIOC -> AFR [1 ] = (GPIOC -> AFR [1 ] & ~GPIO_AFRH_AFSEL9_Msk ) | (0 << GPIO_AFRH_AFSEL9_Pos );
46- TIM3 -> CCR2 = 0 ;
47- TIM3 -> CCR4 = 0 ;
48- TIM3 -> CCMR1 |= (6 << TIM_CCMR1_OC2M_Pos ) | TIM_CCMR1_OC2PE ; // PWM mode 1
49- TIM3 -> CCER |= TIM_CCER_CC2E ;
50- TIM3 -> CCMR2 |= (6 << TIM_CCMR2_OC4M_Pos ) | TIM_CCMR2_OC4PE ; // PWM mode 1
51- TIM3 -> CCER |= TIM_CCER_CC4E ;
52-
53- // apply settings and start timer
54- TIM3 -> CR1 |= TIM_CR1_CEN ;
55- TIM3 -> EGR |= TIM_EGR_UG ;
56- }
15+ #include <pbdrv/pwm.h>
16+ #include <pbio/error.h>
17+ #include <pbio/iodev.h>
18+ #include <pbio/port.h>
5719
5820static pbio_iodev_t * get_iodev (pbio_port_t port ) {
5921 pbio_iodev_t * iodev ;
@@ -115,18 +77,24 @@ static void pbdrv_motor_brake(pbio_port_t port) {
11577}
11678
11779static void pbdrv_motor_run_fwd (pbio_port_t port , int16_t duty_cycle ) { // duty is pos
80+ pbdrv_pwm_dev_t * dev ;
81+
11882 // one pin as out, high and the other as PWM
11983 switch (port ) {
12084 case PBIO_PORT_B :
12185 GPIOC -> MODER = (GPIOC -> MODER & ~GPIO_MODER_MODER6_Msk ) | (1 << GPIO_MODER_MODER6_Pos );
12286 GPIOC -> BSRR = GPIO_BSRR_BS_6 ;
123- TIM3 -> CCR3 = 10000 - duty_cycle ;
87+ if (pbdrv_pwm_get_dev (0 , & dev ) == PBIO_SUCCESS ) {
88+ pbdrv_pwm_set_duty (dev , 3 , 10000 - duty_cycle );
89+ }
12490 GPIOC -> MODER = (GPIOC -> MODER & ~GPIO_MODER_MODER8_Msk ) | (2 << GPIO_MODER_MODER8_Pos );
12591 break ;
12692 case PBIO_PORT_A :
12793 GPIOC -> MODER = (GPIOC -> MODER & ~GPIO_MODER_MODER7_Msk ) | (1 << GPIO_MODER_MODER7_Pos );
12894 GPIOC -> BSRR = GPIO_BSRR_BS_7 ;
129- TIM3 -> CCR4 = 10000 - duty_cycle ;
95+ if (pbdrv_pwm_get_dev (0 , & dev ) == PBIO_SUCCESS ) {
96+ pbdrv_pwm_set_duty (dev , 4 , 10000 - duty_cycle );
97+ }
13098 GPIOC -> MODER = (GPIOC -> MODER & ~GPIO_MODER_MODER9_Msk ) | (2 << GPIO_MODER_MODER9_Pos );
13199 break ;
132100 default :
@@ -135,18 +103,24 @@ static void pbdrv_motor_run_fwd(pbio_port_t port, int16_t duty_cycle) { // duty
135103}
136104
137105static void pbdrv_motor_run_rev (pbio_port_t port , int16_t duty_cycle ) { // duty is neg
106+ pbdrv_pwm_dev_t * dev ;
107+
138108 // one pin as out, high and the other as PWM
139109 switch (port ) {
140110 case PBIO_PORT_B :
141111 GPIOC -> MODER = (GPIOC -> MODER & ~GPIO_MODER_MODER8_Msk ) | (1 << GPIO_MODER_MODER8_Pos );
142112 GPIOC -> BSRR = GPIO_BSRR_BS_8 ;
143- TIM3 -> CCR1 = 10000 + duty_cycle ;
113+ if (pbdrv_pwm_get_dev (0 , & dev ) == PBIO_SUCCESS ) {
114+ pbdrv_pwm_set_duty (dev , 1 , 10000 + duty_cycle );
115+ }
144116 GPIOC -> MODER = (GPIOC -> MODER & ~GPIO_MODER_MODER6_Msk ) | (2 << GPIO_MODER_MODER6_Pos );
145117 break ;
146118 case PBIO_PORT_A :
147119 GPIOC -> MODER = (GPIOC -> MODER & ~GPIO_MODER_MODER9_Msk ) | (1 << GPIO_MODER_MODER9_Pos );
148120 GPIOC -> BSRR = GPIO_BSRR_BS_9 ;
149- TIM3 -> CCR2 = 10000 + duty_cycle ;
121+ if (pbdrv_pwm_get_dev (0 , & dev ) == PBIO_SUCCESS ) {
122+ pbdrv_pwm_set_duty (dev , 2 , 10000 + duty_cycle );
123+ }
150124 GPIOC -> MODER = (GPIOC -> MODER & ~GPIO_MODER_MODER7_Msk ) | (2 << GPIO_MODER_MODER7_Pos );
151125 break ;
152126 default :
@@ -192,19 +166,4 @@ pbio_error_t pbdrv_motor_setup(pbio_port_t port, bool is_servo) {
192166 return PBIO_SUCCESS ;
193167}
194168
195- #if PBIO_CONFIG_ENABLE_DEINIT
196- void _pbdrv_motor_deinit (void ) {
197- // disable the PWM timers
198- TIM3 -> CR1 &= TIM_CR1_CEN ;
199- GPIOC -> MODER = (GPIOC -> MODER & ~GPIO_MODER_MODER6_Msk ) | (1 << GPIO_MODER_MODER6_Pos );
200- GPIOC -> BRR = GPIO_BRR_BR_6 ;
201- GPIOC -> MODER = (GPIOC -> MODER & ~GPIO_MODER_MODER8_Msk ) | (1 << GPIO_MODER_MODER8_Pos );
202- GPIOC -> BRR = GPIO_BRR_BR_8 ;
203- GPIOC -> MODER = (GPIOC -> MODER & ~GPIO_MODER_MODER7_Msk ) | (1 << GPIO_MODER_MODER7_Pos );
204- GPIOC -> BRR = GPIO_BRR_BR_7 ;
205- GPIOC -> MODER = (GPIOC -> MODER & ~GPIO_MODER_MODER9_Msk ) | (1 << GPIO_MODER_MODER9_Pos );
206- GPIOC -> BRR = GPIO_BRR_BR_9 ;
207- }
208- #endif
209-
210169#endif // PBDRV_CONFIG_MOTOR
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