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[hardware] Correct scrambler parametrization
1 parent 473bd0e commit 737d106

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2 files changed

+13
-11
lines changed

2 files changed

+13
-11
lines changed

hardware/src/address_scrambler.sv

Lines changed: 10 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -6,18 +6,20 @@
66
// sequentially and part is interleaved.
77
// Current constraints:
88

9+
// Author: Samuel Riedel <[email protected]>
910
// Author: Marco Bertuletti <[email protected]>
1011

1112
module address_scrambler #(
1213
parameter int unsigned AddrWidth = 32,
1314
parameter int unsigned DataWidth = 32,
1415
parameter int unsigned ByteOffset = 2,
16+
parameter bit Bypass = 0,
1517
parameter int unsigned NumTiles = 2,
1618
parameter int unsigned NumBanksPerTile = 2,
17-
parameter bit Bypass = 0,
18-
parameter int unsigned SeqMemSizePerTile = 4*1024,
1919
parameter int unsigned TCDMSizePerBank = 1024,
20+
parameter int unsigned SeqMemSizePerTile = 4096,
2021
parameter int unsigned NumDASPartitions = 4,
22+
// Dependant parameters, do not change
2123
parameter int unsigned MemSizePerTile = NumBanksPerTile*TCDMSizePerBank,
2224
parameter int unsigned MemSizePerRow = (1 << ByteOffset)*NumBanksPerTile*NumTiles
2325
) (
@@ -52,8 +54,8 @@ module address_scrambler #(
5254

5355
// `tile_index` : how many bits to shift for TileID bits in each partition
5456
// `row_index`: how many bits need to swap within Row Index
55-
logic [NumDASPartitions-1:0][$clog2(NumTiles):0] tile_index;
56-
logic [NumDASPartitions-1:0][$clog2(NumTiles):0] row_index;
57+
logic [NumDASPartitions-1:0][$clog2($clog2(NumTiles)+1)-1:0] tile_index;
58+
logic [NumDASPartitions-1:0][$clog2($clog2(NumTiles)+1)-1:0] row_index;
5759

5860
for (genvar i = 0; i < NumDASPartitions; i++) begin : gen_shift_index
5961
lzc #(
@@ -65,12 +67,12 @@ module address_scrambler #(
6567
.empty_o (/* Unused */ )
6668
);
6769
lzc #(
68-
.WIDTH ($clog2(NumTiles)),
70+
.WIDTH ($clog2(NumTiles)+1),
6971
.MODE (1'b0 )
7072
) i_log_row_index (
71-
.in_i (allocated_size_i[i]),
72-
.cnt_o (row_index[i] ),
73-
.empty_o (/* Unused */ )
73+
.in_i (allocated_size_i[i][$clog2(NumTiles):0]),
74+
.cnt_o (row_index[i] ),
75+
.empty_o (/* Unused */ )
7476
);
7577
end
7678

hardware/src/mempool_tile.sv

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -897,12 +897,12 @@ module mempool_tile
897897
address_scrambler #(
898898
.AddrWidth (AddrWidth ),
899899
.ByteOffset (ByteOffset ),
900+
.Bypass (0 ),
900901
.NumTiles (NumTiles ),
901902
.NumBanksPerTile (NumBanksPerTile ),
902-
.Bypass (0 ),
903+
.TCDMSizePerBank (TCDMSizePerBank ),
903904
.SeqMemSizePerTile (SeqMemSizePerTile),
904-
.NumDASPartitions (NumDASPartitions ),
905-
.TCDMSizePerBank (TCDMSizePerBank )
905+
.NumDASPartitions (NumDASPartitions )
906906
) i_address_scrambler (
907907
.address_i (snitch_data_qaddr[c]),
908908
.group_factor_i (partition_sel_i ),

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