From a99de7a3cc6649bcee5be514c1f96e06167abd43 Mon Sep 17 00:00:00 2001 From: Yvan Tortorella Date: Sat, 31 Aug 2024 12:30:11 +0200 Subject: [PATCH] Better use testbench functions. --- target/sim/src/astral_fix.sv | 3 --- target/sim/src/astral_tb.sv | 6 +++--- 2 files changed, 3 insertions(+), 6 deletions(-) diff --git a/target/sim/src/astral_fix.sv b/target/sim/src/astral_fix.sv index 673d5b77..931fac63 100644 --- a/target/sim/src/astral_fix.sv +++ b/target/sim/src/astral_fix.sv @@ -893,7 +893,6 @@ module astral_fixture; endtask: wait_fll_lock task automatic configure_sl_pad(ref bit jtag_check_write); - chs_vip.jtag_init(); chs_vip.jtag_write_reg32(PAD_CFG_ADDR + ASTRAL_PADFRAME_PERIPH_CONFIG_MUXED_V_04_MUX_SEL_OFFSET, PAD_MUX_GROUP_MUXED_V_04_SEL_SERIAL_LINK_RCV_CLK_I, jtag_check_write); chs_vip.jtag_write_reg32(PAD_CFG_ADDR + ASTRAL_PADFRAME_PERIPH_CONFIG_MUXED_V_05_MUX_SEL_OFFSET, PAD_MUX_GROUP_MUXED_V_05_SEL_SERIAL_LINK_I_0, jtag_check_write); chs_vip.jtag_write_reg32(PAD_CFG_ADDR + ASTRAL_PADFRAME_PERIPH_CONFIG_MUXED_V_06_MUX_SEL_OFFSET, PAD_MUX_GROUP_MUXED_V_06_SEL_SERIAL_LINK_I_1, jtag_check_write); @@ -915,7 +914,6 @@ module astral_fixture; endtask: configure_sl_pad task automatic configure_spi_pad(ref bit jtag_check_write); - chs_vip.jtag_init(); chs_vip.jtag_write_reg32(PAD_CFG_ADDR + ASTRAL_PADFRAME_PERIPH_CONFIG_MUXED_V_00_MUX_SEL_OFFSET, PAD_MUX_GROUP_MUXED_V_00_SEL_SPI_SCK, jtag_check_write); chs_vip.jtag_write_reg32(PAD_CFG_ADDR + ASTRAL_PADFRAME_PERIPH_CONFIG_MUXED_V_01_MUX_SEL_OFFSET, PAD_MUX_GROUP_MUXED_V_01_SEL_SPI_CSB_0, jtag_check_write); chs_vip.jtag_write_reg32(PAD_CFG_ADDR + ASTRAL_PADFRAME_PERIPH_CONFIG_MUXED_V_02_MUX_SEL_OFFSET, PAD_MUX_GROUP_MUXED_V_02_SEL_SPI_CSB_1, jtag_check_write); @@ -926,7 +924,6 @@ module astral_fixture; endtask: configure_spi_pad task automatic configure_i2c_pad(ref bit jtag_check_write); - chs_vip.jtag_init(); chs_vip.jtag_write_reg32(PAD_CFG_ADDR + ASTRAL_PADFRAME_PERIPH_CONFIG_MUXED_V_00_MUX_SEL_OFFSET, PAD_MUX_GROUP_MUXED_V_00_SEL_I2C_SDA, jtag_check_write); chs_vip.jtag_write_reg32(PAD_CFG_ADDR + ASTRAL_PADFRAME_PERIPH_CONFIG_MUXED_V_01_MUX_SEL_OFFSET, PAD_MUX_GROUP_MUXED_V_01_SEL_I2C_SCL, jtag_check_write); endtask: configure_i2c_pad diff --git a/target/sim/src/astral_tb.sv b/target/sim/src/astral_tb.sv index f2bb025b..575408d9 100644 --- a/target/sim/src/astral_tb.sv +++ b/target/sim/src/astral_tb.sv @@ -102,6 +102,9 @@ module tb_astral; // Wait for FLL lock fix.wait_fll_lock(); + // Initialize JTAG at first + fix.chs_vip.jtag_init(); + // We need to initialize memories after the reset due to limitations of the memory models. if (chs_mem_rand) begin `ifdef CHS_NETLIST @@ -133,7 +136,6 @@ module tb_astral; $display("[TB] INFO: Configuring Hyperbus through serial link."); fix.chs_vip.slink_write_32(HyperbusTburstMax, 32'd128); end else begin: gen_jtag_hyperbus_cfg - fix.chs_vip.jtag_init(); $display("[TB] INFO: Configuring Hyperbus through JTAG."); fix.chs_vip.jtag_write_reg32(HyperbusTburstMax, 32'd128, 1); end @@ -184,14 +186,12 @@ module tb_astral; fix.configure_spi_pad(jtag_check_write); // Autonomous boot: Only poll return code $display("[TB] %t - Entering autonomous boot mode", $realtime); - fix.chs_vip.jtag_init(); fix.chs_vip.jtag_wait_for_eoc(exit_code); end else begin // Configure I2C padframe fix.configure_i2c_pad(jtag_check_write); // Autonomous boot: Only poll return code $display("[TB] %t - Entering autonomous boot mode", $realtime); - fix.chs_vip.jtag_init(); fix.chs_vip.jtag_wait_for_eoc(exit_code); end