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Merge pull request #861 from os-fpga/checker_skip_unused_RAM_bits
checker: skip unused RAM output bits
2 parents bdc6e98 + ea2c16a commit 3d0357a

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3 files changed

+12
-2
lines changed

3 files changed

+12
-2
lines changed

planning/src/file_io/pln_blif_file.cpp

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1571,10 +1571,17 @@ bool BLIF_file::linkNodes() noexcept {
15711571
for (BNode* fab_nd : fabricNodes_) {
15721572
BNode& nd = *fab_nd;
15731573
assert(!nd.out_.empty());
1574-
if (nd.parent_) continue;
1574+
if (nd.parent_)
1575+
continue;
15751576
int pinIndex = -1;
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BNode* par = findFabricParent(nd.id_, nd.out_, pinIndex);
15771578
if (!par) {
1579+
if (nd.is_RAM()) {
1580+
// RAM output bits may be unused
1581+
if (trace_ >= 6)
1582+
lprintf("skipping dangling cell output issue for RAM");
1583+
continue;
1584+
}
15781585
err_msg_ = "dangling cell output: ";
15791586
err_msg_ += nd.out_;
15801587
if (trace_ >= 2) {

planning/src/file_io/pln_blif_file.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -165,6 +165,9 @@ struct BLIF_file : public fio::MMapReader
165165
bool is_FF() const noexcept {
166166
return prim::pr_is_DFF(ptype_);
167167
}
168+
bool is_RAM() const noexcept {
169+
return prim::pr_is_RAM(ptype_);
170+
}
168171

169172
bool canDriveClockNode() const noexcept {
170173
return isTopInput() or is_CLK_BUF() or ptype_ == prim::I_SERDES;

planning/src/main.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
static const char* _pln_VERSION_STR = "pln0340";
1+
static const char* _pln_VERSION_STR = "pln0341";
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33
#include "RS/rsEnv.h"
44
#include "util/pln_log.h"

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