From f2588f687e39c668ce603092b2d4b5c74fc8d52a Mon Sep 17 00:00:00 2001 From: vamsi-parasa Date: Wed, 7 May 2025 09:02:17 -0700 Subject: [PATCH 1/2] JDK-8356281: Fix for TestFPComparison failure due to incorrect result --- src/hotspot/cpu/x86/x86_64.ad | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/src/hotspot/cpu/x86/x86_64.ad b/src/hotspot/cpu/x86/x86_64.ad index 25cee7a3094cd..fc44c9227c636 100644 --- a/src/hotspot/cpu/x86/x86_64.ad +++ b/src/hotspot/cpu/x86/x86_64.ad @@ -6270,10 +6270,10 @@ instruct cmovI_regUCF2_ne_ndd(cmpOpUCF2 cop, rFlagsRegUCF cr, rRegI dst, rRegI s ins_cost(200); format %{ "ecmovpl $dst, $src1, $src2\n\t" - "ecmovnel $dst, $src1, $src2" %} + "cmovnel $dst, $src2" %} ins_encode %{ __ ecmovl(Assembler::parity, $dst$$Register, $src1$$Register, $src2$$Register); - __ ecmovl(Assembler::notEqual, $dst$$Register, $src1$$Register, $src2$$Register); + __ cmovl(Assembler::notEqual, $dst$$Register, $src2$$Register); %} ins_pipe(pipe_cmov_reg); %} @@ -6298,14 +6298,14 @@ instruct cmovI_regUCF2_eq(cmpOpUCF2 cop, rFlagsRegUCF cr, rRegI dst, rRegI src) // and parity flag bit is set if any of the operand is a NaN. instruct cmovI_regUCF2_eq_ndd(cmpOpUCF2 cop, rFlagsRegUCF cr, rRegI dst, rRegI src1, rRegI src2) %{ predicate(UseAPX && n->in(1)->in(1)->as_Bool()->_test._test == BoolTest::eq); - match(Set dst (CMoveI (Binary cop cr) (Binary src1 src2))); + match(Set dst (CMoveI (Binary cop cr) (Binary src2 src1))); ins_cost(200); format %{ "ecmovpl $dst, $src1, $src2\n\t" - "ecmovnel $dst, $src1, $src2" %} + "cmovnel $dst, $src2" %} ins_encode %{ __ ecmovl(Assembler::parity, $dst$$Register, $src1$$Register, $src2$$Register); - __ ecmovl(Assembler::notEqual, $dst$$Register, $src1$$Register, $src2$$Register); + __ cmovl(Assembler::notEqual, $dst$$Register, $src2$$Register); %} ins_pipe(pipe_cmov_reg); %} @@ -6585,10 +6585,10 @@ instruct cmovP_regUCF2_ne_ndd(cmpOpUCF2 cop, rFlagsRegUCF cr, rRegP dst, rRegP s ins_cost(200); format %{ "ecmovpq $dst, $src1, $src2\n\t" - "ecmovneq $dst, $src1, $src2" %} + "cmovneq $dst, $src2" %} ins_encode %{ __ ecmovq(Assembler::parity, $dst$$Register, $src1$$Register, $src2$$Register); - __ ecmovq(Assembler::notEqual, $dst$$Register, $src1$$Register, $src2$$Register); + __ cmovq(Assembler::notEqual, $dst$$Register, $src2$$Register); %} ins_pipe(pipe_cmov_reg); %} @@ -6611,14 +6611,14 @@ instruct cmovP_regUCF2_eq(cmpOpUCF2 cop, rFlagsRegUCF cr, rRegP dst, rRegP src) instruct cmovP_regUCF2_eq_ndd(cmpOpUCF2 cop, rFlagsRegUCF cr, rRegP dst, rRegP src1, rRegP src2) %{ predicate(UseAPX && n->in(1)->in(1)->as_Bool()->_test._test == BoolTest::eq); - match(Set dst (CMoveP (Binary cop cr) (Binary src1 src2))); + match(Set dst (CMoveP (Binary cop cr) (Binary src2 src1))); ins_cost(200); format %{ "ecmovpq $dst, $src1, $src2\n\t" - "ecmovneq $dst, $src1, $src2" %} + "cmovneq $dst, $src2" %} ins_encode %{ __ ecmovq(Assembler::parity, $dst$$Register, $src1$$Register, $src2$$Register); - __ ecmovq(Assembler::notEqual, $dst$$Register, $src1$$Register, $src2$$Register); + __ cmovq(Assembler::notEqual, $dst$$Register, $src2$$Register); %} ins_pipe(pipe_cmov_reg); %} @@ -6784,10 +6784,10 @@ instruct cmovL_regUCF2_ne_ndd(cmpOpUCF2 cop, rFlagsRegUCF cr, rRegL dst, rRegL s ins_cost(200); format %{ "ecmovpq $dst, $src1, $src2\n\t" - "ecmovneq $dst, $src1, $src2" %} + "cmovneq $dst, $src2" %} ins_encode %{ __ ecmovq(Assembler::parity, $dst$$Register, $src1$$Register, $src2$$Register); - __ ecmovq(Assembler::notEqual, $dst$$Register, $src1$$Register, $src2$$Register); + __ cmovq(Assembler::notEqual, $dst$$Register, $src2$$Register); %} ins_pipe(pipe_cmov_reg); %} @@ -6810,14 +6810,14 @@ instruct cmovL_regUCF2_eq(cmpOpUCF2 cop, rFlagsRegUCF cr, rRegL dst, rRegL src) instruct cmovL_regUCF2_eq_ndd(cmpOpUCF2 cop, rFlagsRegUCF cr, rRegL dst, rRegL src1, rRegL src2) %{ predicate(UseAPX && n->in(1)->in(1)->as_Bool()->_test._test == BoolTest::eq); - match(Set dst (CMoveL (Binary cop cr) (Binary src1 src2))); + match(Set dst (CMoveL (Binary cop cr) (Binary src2 src1))); ins_cost(200); format %{ "ecmovpq $dst, $src1, $src2\n\t" - "ecmovneq $dst, $src1, $src2" %} + "cmovneq $dst, $src2" %} ins_encode %{ __ ecmovq(Assembler::parity, $dst$$Register, $src1$$Register, $src2$$Register); - __ ecmovq(Assembler::notEqual, $dst$$Register, $src1$$Register, $src2$$Register); + __ cmovq(Assembler::notEqual, $dst$$Register, $src2$$Register); %} ins_pipe(pipe_cmov_reg); %} From ec2959b2ef065609fbed83e88164670362b03ed3 Mon Sep 17 00:00:00 2001 From: vamsi-parasa Date: Thu, 8 May 2025 12:38:16 -0700 Subject: [PATCH 2/2] add missing predicates for cmovP_regUCF --- src/hotspot/cpu/x86/x86_64.ad | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/hotspot/cpu/x86/x86_64.ad b/src/hotspot/cpu/x86/x86_64.ad index fc44c9227c636..18b36a79e8ae3 100644 --- a/src/hotspot/cpu/x86/x86_64.ad +++ b/src/hotspot/cpu/x86/x86_64.ad @@ -6548,6 +6548,7 @@ instruct cmovP_regU_ndd(rRegP dst, cmpOpU cop, rFlagsRegU cr, rRegP src1, rRegP %} instruct cmovP_regUCF(cmpOpUCF cop, rFlagsRegUCF cr, rRegP dst, rRegP src) %{ + predicate(!UseAPX); match(Set dst (CMoveP (Binary cop cr) (Binary dst src))); ins_cost(200); expand %{ @@ -6556,6 +6557,7 @@ instruct cmovP_regUCF(cmpOpUCF cop, rFlagsRegUCF cr, rRegP dst, rRegP src) %{ %} instruct cmovP_regUCF_ndd(rRegP dst, cmpOpUCF cop, rFlagsRegUCF cr, rRegP src1, rRegP src2) %{ + predicate(UseAPX); match(Set dst (CMoveP (Binary cop cr) (Binary src1 src2))); ins_cost(200); format %{ "ecmovq$cop $dst, $src1, $src2\t# unsigned, ptr ndd" %}