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Microcode.txt
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// MINIMAL CPU SYSTEM - MICROCODE VERSION 1.5 written by Carsten Herting 17.04.2021
// Use for board revisions 1.3 and higher.
#define NOP CO|MI, CO|MI|HI, RO|HI|CEME, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define BNK CO|MI, CO|MI|HI, RO|HI|CEME, AO|EC|HI, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define Out CO|MI, CO|MI|HI, RO|HI|CEME, AO|TR|HI, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define CLC CO|MI, CO|MI|HI, RO|HI|CEME, AO|BI, EOFI|ES, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define SEC CO|MI, CO|MI|HI, RO|HI|CEME, AO|BI, EOFI|ES|EC, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define LSL CO|MI, CO|MI|HI, RO|HI|CEME, AO|BI, EOFI|AI, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define ROL0 CO|MI, CO|MI|HI, RO|HI|CEME, AO|BI, EOFI|AI, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define ROL1 CO|MI, CO|MI|HI, RO|HI|CEME, AO|BI, EOFI|AI|EC, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define LSR0 CO|MI, CO|MI|HI, RO|HI|CEME, AO|BI, EOFI|ES, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, IC, 0, 0
#define LSR1 CO|MI, CO|MI|HI, RO|HI|CEME, AO|BI, EOFI|ES, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, IC, 0, 0
#define ROR0 CO|MI, CO|MI|HI, RO|HI|CEME, AO|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, IC, 0, 0, 0
#define ROR1 CO|MI, CO|MI|HI, RO|HI|CEME, AO|BI, EOFI|AI|BI|EC, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, IC, 0, 0, 0
#define ASR00x CO|MI, CO|MI|HI, RO|HI|CEME, BI, EOFI|EC, AO|BI, EOFI|ES, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, IC
#define ASR01x CO|MI, CO|MI|HI, RO|HI|CEME, BI, EOFI|EC, AO|BI, EOFI|ES, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, IC
#define ASR10x CO|MI, CO|MI|HI, RO|HI|CEME, BI, EOFI|EC, AO|BI, EOFI|ES|EC, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, EOFI|AI|BI, IC
#define ASR11x CO|MI, CO|MI|HI, RO|HI|CEME, BI, EOFI|EC, AO|BI, EOFI|ES|EC, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, EOFI|EC|AI|BI, IC
#define INP CO|MI, CO|MI|HI, RO|HI|CEME, TR|AI|BI, EOFI|ES|BI, EOFI|ES|EC, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define NEG CO|MI, CO|MI|HI, RO|HI|CEME, AO|BI, EOFI|ES|EC|AI, EOFI|ES|EC|AI, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define Inc CO|MI, CO|MI|HI, RO|HI|CEME, BI, EOFI|ES|EC|AI, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define Dec CO|MI, CO|MI|HI, RO|HI|CEME, BI, EOFI|AI, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define LDI CO|MI, CO|MI|HI, RO|HI|CEME, RO|AI|CEME, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define ADI CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI, EOFI|AI|CEME, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define SBI CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI, EOFI|ES|EC|AI|CEME, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define CPI CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI, EOFI|ES|EC|CEME, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define ACI0 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI, EOFI|AI|CEME, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define ACI1 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI, EOFI|EC|AI|CEME, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define SCI0 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI, EOFI|ES|AI|CEME, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define SCI1 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI, EOFI|ES|EC|AI|CEME, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define JPA CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|CI|HI, BO|CI, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0
#define LDA CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|AI|CEME, IC, 0, 0, 0, 0, 0, 0, 0, 0
#define STA CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, AO|RI, CEME, IC, 0, 0, 0, 0, 0, 0, 0
#define ADA CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|AI|CEME, IC, 0, 0, 0, 0, 0, 0, 0
#define SBA CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|ES|EC|AI|CEME, IC, 0, 0, 0, 0, 0, 0, 0
#define CPA CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|ES|EC|CEME, IC, 0, 0, 0, 0, 0, 0, 0
#define ACA0 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|AI|CEME, IC, 0, 0, 0, 0, 0, 0, 0
#define ACA1 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|EC|AI|CEME, IC, 0, 0, 0, 0, 0, 0, 0
#define SCA0 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|ES|AI|CEME, IC, 0, 0, 0, 0, 0, 0, 0
#define SCA1 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|ES|EC|AI|CEME, IC, 0, 0, 0, 0, 0, 0, 0
#define JPR CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI|CEME, RO|CI|HI, BO|CI, IC, 0, 0, 0, 0, 0, 0
#define LDR CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI|CEME, RO|MI|HI, BO|MI, RO|AI, IC, 0, 0, 0, 0, 0
#define STR CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI|CEME, RO|MI|HI, BO|MI, AO|RI, IC, 0, 0, 0, 0, 0
#define ADR CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|AI, IC, 0, 0, 0, 0
#define SBR CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|ES|EC|AI, IC, 0, 0, 0, 0
#define CPR CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|ES|EC, IC, 0, 0, 0, 0
#define ACR0 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|AI, IC, 0, 0, 0, 0
#define ACR1 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|EC|AI, IC, 0, 0, 0, 0
#define SCR0 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|ES|AI, IC, 0, 0, 0, 0
#define SCR1 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|ES|EC|AI, IC, 0, 0, 0, 0
#define CLB CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI|AI, EOFI|ES|EC|RI, EOFI|ES|EC|AI|CEME, IC, 0, 0, 0, 0, 0, 0, 0
#define NEB CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|AI|BI, EOFI|ES|EC|AI, EOFI|ES|EC|RI, EOFI|ES|EC|AI|CEME, IC, 0, 0, 0, 0, 0
#define INB CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|AI|BI, EOFI|ES|EC|BI, EOFI|EC|RI, EOFI|EC|AI|CEME, IC, 0, 0, 0, 0, 0
#define DEB CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|AI|BI, EOFI|ES|EC|BI, EOFI|ES|RI, EOFI|ES|AI|CEME, IC, 0, 0, 0, 0, 0
#define ADB CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|RI, CEME, IC, 0, 0, 0, 0, 0, 0
#define SBB CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, AO|BI, RO|AI, EOFI|ES|EC|RI, BO|AI|CEME, IC, 0, 0, 0, 0, 0
#define ACB0 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|AI, AO|RI, CEME, IC, 0, 0, 0, 0, 0
#define ACB1 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|EC|AI, AO|RI, CEME, IC, 0, 0, 0, 0, 0
#define SCB0 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, AO|BI, RO|AI, EOFI|ES|AI, AO|RI, BO|AI|CEME, IC, 0, 0, 0, 0
#define SCB1 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, AO|BI, RO|AI, EOFI|ES|EC|AI, AO|RI, BO|AI|CEME, IC, 0, 0, 0, 0
#define CLW CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, AO|BI, EOFI|ES|EC|RI, CEME, EOFI|ES|EC|RI, IC, 0, 0, 0, 0, 0
#define NEW0 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|AI|BI, EOFI|ES|EC|AI, EOFI|ES|EC|RI, CEME, RO|BI, EOFI|ES|AI, AO|RI, IC, 0, 0
#define NEW1 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|AI|BI, EOFI|ES|EC|AI, EOFI|ES|EC|RI, CEME, RO|BI, EOFI|ES|EC|AI, AO|RI, IC, 0, 0
#define INW0 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|AI|BI, EOFI|ES|EC|BI, EOFI|EC|RI, CEME|BI, RO|AI, EOFI|ES|AI, AO|RI, IC, 0, 0
#define INW1 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|AI|BI, EOFI|ES|EC|BI, EOFI|EC|RI, CEME|BI, RO|AI, EOFI|ES|EC|AI, AO|RI, IC, 0, 0
#define DEW0 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|AI|BI, EOFI|ES|EC|BI, EOFI|ES|RI, CEME|BI, RO|AI, EOFI|AI, AO|RI, IC, 0, 0
#define DEW1 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|AI|BI, EOFI|ES|EC|BI, EOFI|ES|RI, CEME|BI, RO|AI, EOFI|EC|AI, AO|RI, IC, 0, 0
#define ADW0 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|RI, CEME|BI, RO|AI, EOFI|ES|AI, AO|RI, IC, 0, 0, 0
#define ADW1 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|RI, CEME|BI, RO|AI, EOFI|ES|EC|AI, AO|RI, IC, 0, 0, 0
#define SBW0 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, AO|BI, RO|AI, EOFI|ES|EC|RI, CEME|BI, RO|AI, EOFI|AI, AO|RI, IC, 0, 0
#define SBW1 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, AO|BI, RO|AI, EOFI|ES|EC|RI, CEME|BI, RO|AI, EOFI|EC|AI, AO|RI, IC, 0, 0
#define ACW0 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|BI, BO|RI, CEME|BI, RO|AI, EOFI|ES|AI, AO|RI, IC, 0, 0
#define ACW1 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, RO|BI, EOFI|EC|BI, BO|RI, CEME|BI, RO|AI, EOFI|ES|EC|AI, AO|RI, IC, 0, 0
#define SCW0 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, AO|BI, RO|AI, EOFI|ES|BI, BO|RI, CEME|BI, RO|AI, EOFI|AI, AO|RI, IC, 0
#define SCW1 CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|MI|HI, BO|MI, AO|BI, RO|AI, EOFI|ES|EC|BI, BO|RI, CEME|BI, RO|AI, EOFI|EC|AI, AO|RI, IC, 0
#define LDS CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, MI|HI, MI, RO|AI, EOFI|MI, RO|AI, IC, 0, 0, 0, 0, 0, 0
#define STS CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, MI|HI, MI, RO|MI, AO|RI, MI, RO|AI, EOFI|BI, MI, RO|MI, RO|AI, BO|MI, AO|RI
#define PHS CO|MI, CO|MI|HI, RO|HI|CEME, MI|HI, MI, RO|MI|BI, AO|RI, BO|AI, EOFI|ES|BI|MI, EOFI|RI, AO|MI, RO|AI, IC, 0, 0, 0
#define PLS CO|MI, CO|MI|HI, RO|HI|CEME, MI|HI, MI|BI, RO|AI, EOFI|ES|EC|AI, AO|RI, AO|MI, RO|AI, IC, 0, 0, 0, 0, 0
#define JPS CO|MI, CO|MI|HI, RO|HI|CEME, MI|HI, MI|BI, RO|AI|MI, CO|RI, EOFI|AI|MI, CO|RI|HI, BO|MI, EOFI|RI, CO|MI, CO|MI|HI, RO|BI|CEME, RO|CI|HI, BO|CI
#define RTS CO|MI, CO|MI|HI, RO|HI|CEME, MI|HI, MI|BI, RO|AI|MI, EOFI|ES|EC|AI|MI, RO|CI|HI, EOFI|ES|EC|AI|MI, RO|CI, BO|MI, AO|RI, CEME, CEME, IC, 0
#define BRA CO|MI, CO|MI|HI, RO|HI|CEME, RO|BI|CEME, RO|CI|HI, BO|CI, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0 // branching
#define ___ CO|MI, CO|MI|HI, RO|HI|CEME, CEME, CEME, IC, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 // non-branching
uint16_t mEEPROM[8192] // microcode depending on flags, opcode and stepcounter
{
/*NCZ target: A, operand: none target: A, operand: immediate target: A, operand: byte at abs address target: A, operand: byte at rel address target: byte at abs address, operand: A target: word at abs address, operand: A stack operations BNE BEQ BCC BCS BPL BMI */
/*---*/ NOP, BNK, Out, CLC, SEC, LSL, ROL0, LSR0, ROR0, ASR00x, INP, NEG, Inc, Dec, LDI, ADI, SBI, CPI, ACI0, SCI0, JPA, LDA, STA, ADA, SBA, CPA, ACA0, SCA0, JPR, LDR, STR, ADR, SBR, CPR, ACR0, SCR0, CLB, NEB, INB, DEB, ADB, SBB, ACB0, SCB0, CLW, NEW0, INW0, DEW0, ADW0, SBW0, ACW0, SCW0, LDS, STS, PHS, PLS, JPS, RTS, BRA, ___, BRA, ___, BRA, ___,
/*--1*/ NOP, BNK, Out, CLC, SEC, LSL, ROL0, LSR0, ROR0, ASR00x, INP, NEG, Inc, Dec, LDI, ADI, SBI, CPI, ACI0, SCI0, JPA, LDA, STA, ADA, SBA, CPA, ACA0, SCA0, JPR, LDR, STR, ADR, SBR, CPR, ACR0, SCR0, CLB, NEB, INB, DEB, ADB, SBB, ACB0, SCB0, CLW, NEW0, INW0, DEW0, ADW0, SBW0, ACW0, SCW0, LDS, STS, PHS, PLS, JPS, RTS, ___, BRA, BRA, ___, BRA, ___,
/*-1-*/ NOP, BNK, Out, CLC, SEC, LSL, ROL1, LSR1, ROR1, ASR01x, INP, NEG, Inc, Dec, LDI, ADI, SBI, CPI, ACI1, SCI1, JPA, LDA, STA, ADA, SBA, CPA, ACA1, SCA1, JPR, LDR, STR, ADR, SBR, CPR, ACR1, SCR1, CLB, NEB, INB, DEB, ADB, SBB, ACB1, SCB1, CLW, NEW1, INW1, DEW1, ADW1, SBW1, ACW1, SCW1, LDS, STS, PHS, PLS, JPS, RTS, BRA, ___, ___, BRA, BRA, ___,
/*-11*/ NOP, BNK, Out, CLC, SEC, LSL, ROL1, LSR1, ROR1, ASR01x, INP, NEG, Inc, Dec, LDI, ADI, SBI, CPI, ACI1, SCI1, JPA, LDA, STA, ADA, SBA, CPA, ACA1, SCA1, JPR, LDR, STR, ADR, SBR, CPR, ACR1, SCR1, CLB, NEB, INB, DEB, ADB, SBB, ACB1, SCB1, CLW, NEW1, INW1, DEW1, ADW1, SBW1, ACW1, SCW1, LDS, STS, PHS, PLS, JPS, RTS, ___, BRA, ___, BRA, BRA, ___,
/*1--*/ NOP, BNK, Out, CLC, SEC, LSL, ROL0, LSR0, ROR0, ASR10x, INP, NEG, Inc, Dec, LDI, ADI, SBI, CPI, ACI0, SCI0, JPA, LDA, STA, ADA, SBA, CPA, ACA0, SCA0, JPR, LDR, STR, ADR, SBR, CPR, ACR0, SCR0, CLB, NEB, INB, DEB, ADB, SBB, ACB0, SCB0, CLW, NEW0, INW0, DEW0, ADW0, SBW0, ACW0, SCW0, LDS, STS, PHS, PLS, JPS, RTS, BRA, ___, BRA, ___, ___, BRA,
/*1-1*/ NOP, BNK, Out, CLC, SEC, LSL, ROL0, LSR0, ROR0, ASR10x, INP, NEG, Inc, Dec, LDI, ADI, SBI, CPI, ACI0, SCI0, JPA, LDA, STA, ADA, SBA, CPA, ACA0, SCA0, JPR, LDR, STR, ADR, SBR, CPR, ACR0, SCR0, CLB, NEB, INB, DEB, ADB, SBB, ACB0, SCB0, CLW, NEW0, INW0, DEW0, ADW0, SBW0, ACW0, SCW0, LDS, STS, PHS, PLS, JPS, RTS, ___, BRA, BRA, ___, ___, BRA,
/*11-*/ NOP, BNK, Out, CLC, SEC, LSL, ROL1, LSR1, ROR1, ASR11x, INP, NEG, Inc, Dec, LDI, ADI, SBI, CPI, ACI1, SCI1, JPA, LDA, STA, ADA, SBA, CPA, ACA1, SCA1, JPR, LDR, STR, ADR, SBR, CPR, ACR1, SCR1, CLB, NEB, INB, DEB, ADB, SBB, ACB1, SCB1, CLW, NEW1, INW1, DEW1, ADW1, SBW1, ACW1, SCW1, LDS, STS, PHS, PLS, JPS, RTS, BRA, ___, ___, BRA, ___, BRA,
/*111*/ NOP, BNK, Out, CLC, SEC, LSL, ROL1, LSR1, ROR1, ASR11x, INP, NEG, Inc, Dec, LDI, ADI, SBI, CPI, ACI1, SCI1, JPA, LDA, STA, ADA, SBA, CPA, ACA1, SCA1, JPR, LDR, STR, ADR, SBR, CPR, ACR1, SCR1, CLB, NEB, INB, DEB, ADB, SBB, ACB1, SCB1, CLW, NEW1, INW1, DEW1, ADW1, SBW1, ACW1, SCW1, LDS, STS, PHS, PLS, JPS, RTS, ___, BRA, ___, BRA, ___, BRA,
};
/*
------------------------------------------------------------------------------
MIT License
Copyright (c) 2021 Carsten Herting
------------------------------------------------------------------------------
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
------------------------------------------------------------------------------
*/