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Static cast float32<->float is FCVT not FMOV
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backend/arm64/emit.mlp

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1031,16 +1031,12 @@ let emit_reinterpret_cast (cast : Cmm.reinterpret_cast) i =
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if distinct then (
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DSL.check_reg Float src;
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DSL.check_reg Float32 dst;
1034-
(* CR melse: I think this might be broken - maybe we need to do fmov dN,
1035-
dM without referring to single-precision registers? *)
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DSL.ins I.FMOV [| DSL.emit_reg dst; DSL.emit_reg src |])
1034+
DSL.ins I.FCVT [| DSL.emit_reg dst; DSL.emit_reg src |])
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| Float_of_float32 ->
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if distinct then (
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DSL.check_reg Float32 src;
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DSL.check_reg Float dst;
1041-
(* CR melse: I think this might be broken - maybe we need to do fmov dN,
1042-
dM without referring to single-precision registers? *)
1043-
DSL.ins I.FMOV [| DSL.emit_reg dst; DSL.emit_reg src |])
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DSL.ins I.FCVT [| DSL.emit_reg dst; DSL.emit_reg src |])
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| V128_of_v128 ->
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if distinct then (
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DSL.check_reg Vec128 src;

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