From be457b959e80b7c796cee4e68ac5ec5e1b6a5830 Mon Sep 17 00:00:00 2001
From: Arkadiusz Balys <arkadiusz.balys@nordicsemi.no>
Date: Wed, 4 Dec 2024 08:50:25 +0100
Subject: [PATCH] samples: matter: Align nRF54L15 internal pm_static

We need to reach 35% of the compression rate, so we need to
align the nRF54L15 internal partition map in the pm_static file.

Signed-off-by: Arkadiusz Balys <arkadiusz.balys@nordicsemi.no>
---
 .../nrf54l15dk_nrf54l15_cpuapp_internal.conf    |  4 ++--
 ...atic_nrf54l15dk_nrf54l15_cpuapp_internal.yml | 17 +++++++++--------
 2 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/samples/matter/template/boards/nrf54l15dk_nrf54l15_cpuapp_internal.conf b/samples/matter/template/boards/nrf54l15dk_nrf54l15_cpuapp_internal.conf
index 5a9bff26e66b..892cdfca3db4 100644
--- a/samples/matter/template/boards/nrf54l15dk_nrf54l15_cpuapp_internal.conf
+++ b/samples/matter/template/boards/nrf54l15dk_nrf54l15_cpuapp_internal.conf
@@ -11,8 +11,8 @@ CONFIG_BT_LL_SOFTDEVICE_MULTIROLE=y
 CONFIG_CHIP_MALLOC_SYS_HEAP_SIZE=10240
 CONFIG_MPSL_WORK_STACK_SIZE=2048
 
-# Set the ZMS sector count to match the settings partition size that is 44 kB for this application.
-CONFIG_SETTINGS_ZMS_SECTOR_COUNT=11
+# Set the ZMS sector count to match the settings partition size that is 40 kB for this application.
+CONFIG_SETTINGS_ZMS_SECTOR_COUNT=10
 # Workaround required as Zephyr L2 implies usage of NVS backend for settings.
 # It should be removed once the proper fix will be applied in Zephyr.
 CONFIG_NVS=n
diff --git a/samples/matter/template/pm_static_nrf54l15dk_nrf54l15_cpuapp_internal.yml b/samples/matter/template/pm_static_nrf54l15dk_nrf54l15_cpuapp_internal.yml
index a73ddb883041..a8bcbce256bf 100644
--- a/samples/matter/template/pm_static_nrf54l15dk_nrf54l15_cpuapp_internal.yml
+++ b/samples/matter/template/pm_static_nrf54l15dk_nrf54l15_cpuapp_internal.yml
@@ -9,38 +9,39 @@ mcuboot_pad:
 app:
   address: 0xD800
   region: flash_primary
-  size: 0xD4800
+  size: 0xD7800
 mcuboot_primary:
   address: 0xD000
   orig_span: &id001
   - app
   - mcuboot_pad
   region: flash_primary
-  size: 0xD5000
+  size: 0xD8000
   span: *id001
 mcuboot_primary_app:
   address: 0xD800
   orig_span: &id002
   - app
   region: flash_primary
-  size: 0xD4800
+  size: 0xD7800
   span: *id002
 mcuboot_secondary:
-  address: 0xE2000
+  address: 0xE5000
   orig_span: &id003
   - mcuboot_secondary_pad
   - mcuboot_secondary_app
   region: flash_primary
-  size: 0x90000
+  size: 0x8D000
   span: *id003
 mcuboot_secondary_pad:
   region: flash_primary
-  address: 0xE2000
+  address: 0xE5000
   size: 0x800
+# Compression rate 34.80%
 mcuboot_secondary_app:
   region: flash_primary
-  address: 0xE2800
-  size: 0x8F800
+  address: 0xE5800
+  size: 0x8C800
 factory_data:
   address: 0x172000
   region: flash_primary