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Use clippy
1 parent fc75b7d commit a684e1d

38 files changed

+141
-159
lines changed

.github/workflows/release.yml

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,8 +22,10 @@ jobs:
2222
with:
2323
python-version: "3.13"
2424
- run: python scripts/sync_code.py --check
25-
- run: cargo build --release --features=stm32f103,xG
2625
- run: cargo build --release --features=stm32f100,xC
26+
- run: cargo build --release --features=stm32f103,xG,rtic
27+
- run: cargo clippy --features=stm32f103,xG,rtic
28+
- run: cargo test --target=x86_64-unknown-linux-gnu --features=std
2729
- run: python scripts/build.py --example=f103c8
2830

2931
publish:

Cargo.toml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99
name = "stm32f1-hal"
1010
readme = "README.md"
1111
repository = "https://github.com/jw-mcu-rust/stm32f1-hal"
12-
version = "0.0.4"
12+
version = "0.0.5"
1313

1414
[package.metadata.docs.rs]
1515
features = ["stm32f103", "xG"]

src/common/dma/circular_buffer_rx.rs

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -26,15 +26,18 @@ where
2626
}
2727
}
2828

29-
pub struct CircularBuffer<T: Sized> {
29+
pub struct CircularBuffer<T> {
3030
recv_buf: Vec<T>,
3131
read_idx: usize,
3232
}
3333

34-
impl<T> CircularBuffer<T> {
34+
impl<T: Sized + Copy> CircularBuffer<T> {
3535
fn new(buf_size: usize) -> Self {
3636
let mut recv_buf = Vec::<T>::with_capacity(buf_size);
37-
unsafe { recv_buf.set_len(buf_size) }
37+
#[allow(clippy::uninit_vec)]
38+
unsafe {
39+
recv_buf.set_len(buf_size)
40+
}
3841

3942
Self {
4043
recv_buf,
@@ -63,18 +66,15 @@ impl<T> CircularBuffer<T> {
6366
ret = Some(&self.recv_buf[self.read_idx..end]);
6467
self.read_idx = end;
6568
}
69+
} else if max > dma_recv_idx - self.read_idx {
70+
ret = Some(&self.recv_buf[self.read_idx..dma_recv_idx]);
71+
self.read_idx = dma_recv_idx;
6672
} else {
67-
if max > dma_recv_idx - self.read_idx {
68-
ret = Some(&self.recv_buf[self.read_idx..dma_recv_idx]);
69-
self.read_idx = dma_recv_idx;
70-
} else {
71-
let end = self.read_idx + max;
72-
ret = Some(&self.recv_buf[self.read_idx..end]);
73-
self.read_idx = end;
74-
};
73+
let end = self.read_idx + max;
74+
ret = Some(&self.recv_buf[self.read_idx..end]);
75+
self.read_idx = end;
7576
}
76-
77-
return ret;
77+
ret
7878
}
7979

8080
fn as_slice(&self) -> &[T] {

src/common/dma/ringbuf_tx.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@ use critical_section::Mutex;
66
pub struct DmaRingbufTx {}
77

88
impl DmaRingbufTx {
9+
#[allow(clippy::new_ret_no_self)]
910
pub fn new<T, CH>(
1011
mut ch: CH,
1112
peripheral_addr: usize,

src/common/os.rs

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -69,12 +69,8 @@ impl TimeoutInstance for RetryTimesInstance {
6969

7070
// Always ----------------------------------
7171

72+
#[derive(Default)]
7273
pub struct AlwaysTimeout {}
73-
impl AlwaysTimeout {
74-
pub fn new() -> Self {
75-
Self {}
76-
}
77-
}
7874
impl Timeout for AlwaysTimeout {
7975
#[inline]
8076
fn start(&mut self) -> impl TimeoutInstance {

src/common/ringbuf.rs

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -10,10 +10,10 @@ pub trait ProducerExt<T> {
1010
impl<T: Copy> ProducerExt<T> for Producer<T> {
1111
fn get_write_chunk_uninit(&mut self) -> Option<WriteChunkUninit<'_, T>> {
1212
let n = self.slots();
13-
if n > 0 {
14-
if let Ok(chunk) = self.write_chunk_uninit(n) {
15-
return Some(chunk);
16-
}
13+
if n > 0
14+
&& let Ok(chunk) = self.write_chunk_uninit(n)
15+
{
16+
return Some(chunk);
1717
}
1818
None
1919
}
@@ -81,10 +81,10 @@ pub trait ConsumerExt<T> {
8181
impl<T: Copy> ConsumerExt<T> for Consumer<T> {
8282
fn get_read_chunk(&mut self) -> Option<ReadChunk<'_, T>> {
8383
let n = self.slots();
84-
if n > 0 {
85-
if let Ok(chunk) = self.read_chunk(n) {
86-
return Some(chunk);
87-
}
84+
if n > 0
85+
&& let Ok(chunk) = self.read_chunk(n)
86+
{
87+
return Some(chunk);
8888
}
8989
None
9090
}

src/common/timer/counter.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -88,7 +88,7 @@ impl<TIM: GeneralTimer> CounterHz<TIM> {
8888
// freq_divider is always bigger than 0, since (psc + 1) is always less than
8989
// timer_clock
9090
let freq_divider = (self.clk.raw() / (psc + 1)) as u64;
91-
let cnt: u32 = self.tim.read_count().into();
91+
let cnt: u32 = self.tim.read_count();
9292
let cnt = cnt as u64;
9393

9494
// It is safe to make this cast, because the maximum timer period in this HAL is
@@ -132,7 +132,7 @@ impl<TIM: GeneralTimer, const FREQ: u32> Counter<TIM, FREQ> {
132132
}
133133

134134
pub fn now(&self) -> TimerInstantU32<FREQ> {
135-
TimerInstantU32::from_ticks(self.tim.read_count().into())
135+
TimerInstantU32::from_ticks(self.tim.read_count())
136136
}
137137

138138
pub fn start(&mut self, timeout: TimerDurationU32<FREQ>) -> Result<(), Error> {

src/common/timer/mod.rs

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,9 @@ pub trait GeneralTimer {
2424
fn reset_counter(&mut self);
2525
fn enable_preload(&mut self, b: bool);
2626
fn max_auto_reload() -> u32;
27+
/// # Safety
28+
///
29+
/// `arr` must be greater than 0
2730
unsafe fn set_auto_reload_unchecked(&mut self, arr: u32);
2831
fn set_auto_reload(&mut self, arr: u32) -> Result<(), Error>;
2932
fn read_auto_reload(&self) -> u32;

src/common/timer/pwm.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -23,12 +23,12 @@ impl<TIM: TimerWithPwm> PwmTimer<TIM> {
2323

2424
#[inline]
2525
pub fn get_count_value(&self) -> u32 {
26-
self.tim.read_count().into()
26+
self.tim.read_count()
2727
}
2828

2929
#[inline]
3030
pub fn get_max_duty(&self) -> u32 {
31-
(self.tim.read_auto_reload() as u32).wrapping_add(1)
31+
self.tim.read_auto_reload().wrapping_add(1)
3232
}
3333

3434
#[inline]

src/common/uart/uart_dma.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@ where
5555
{
5656
#[inline(always)]
5757
fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
58-
if buf.len() == 0 {
58+
if buf.is_empty() {
5959
return Err(Error::Other);
6060
}
6161

@@ -126,7 +126,7 @@ where
126126
T: Timeout,
127127
{
128128
fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
129-
if buf.len() == 0 {
129+
if buf.is_empty() {
130130
return Err(Error::Other);
131131
}
132132

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