Releases: lowRISC/sonata-system
v1.3
Please use the v1.3 branch of the sonata software repository for compatible software. Please note that software that ran on v0.4 and v0.2 will not be compatible with this release.
Release Notes
This release is primarily performance improvements.
It also adds external interrupts.
This release contains on top of v1.2:
- Over 3x performance improvement of HyperRAM memory system.
- Introduces separate data and instruction TL-UL ports, read buffering filled by burst reads, and write coalescing logic that can drive write bursts.
- Particularly improves execution times when loading un-cached instructions from the HyperRAM, such as CHERIoT-RTOS interrupt handlers.
- 2x throughput improvement in back-to-back SRAM accesses.
- Increase the number of outstanding requests from one to two to avoid stalls.
- Particularly improves the performance of capability load/store operations, such as context switching.
- 2x performance improvement of multiplier unit.
- Change from a 3-4 cycle multiplier to a 1-2 cycle multiplier that uses FPGA DSP blocks.
- GPIO Pin-Change Interrupts (PCINT) introduced.
- Can trigger a core interrupt when a GPIO pin experiences a rising-edge, a falling-edge, any-edge, or a low-level.
- Halved access latency of GPIO, PWM, and timer peripherals.
- SW-configurable SPI COPI line idle state.
- Simulation improvements.
- Test improvements.
Bitstream information
The utilization of the bitstream:
| Type | Used | Available | Percentage |
|---|---|---|---|
| Slice LUTs | 26,942 | 32,600 | 82.64% |
| Slice Registers | 16,210 | 65,200 | 24.86% |
| Block RAM Tiles | 43 | 75 | 57.33% |
| DSPs | 16 | 120 | 13.33% |
Other bitstream statistics:
| Name | Value |
|---|---|
| Overall WNS | 0.058 ns |
| System clock WNS | 0.058 ns |
| HyperRAM clock WNS | 0.428 ns |
| USB clock WNS | 8.201 ns |
| Total on-chip power | 0.318 W |
Quick start guide
Here's the developer flow for using these files:
- Make sure the bitstream select switch (immediately below the main USB-C port) is set to position 1.
- Before plugging in your Sonata board, hold down the "SW9" button labelled "RP2040 Boot", and while holding this button plug your board into your laptop using the Main USB.
- A drive called "RPI-RP2" should pop up on your computer and copy rpi_rp2_v1.3.uf2 into it.
- This drive should automatically dismount once the file is transferred and remount as "SONATA". Once the remount has happened, you can drag in the wrapped bitstream sonata_bitstream_v1.3.bit.slot1.uf2.
- Once programming is successful, you should see the "CHERI" LED light up and the "LEGACY" LED turn off. If this is not the case, the bitstream loading may have failed and you should retry by unplugging and replugging the main USB on the Sonata board. Then re-drag the bitstream into the "SONATA" drive.
- After programming the bitstream, drag the sonata_simple_demo_v1.3.slot1.uf2 into the "SONATA" drive.
- You should now see the user LEDs turn on and off, as well as the lowRISC logo appear on the LCD.
- You can also drag snake_demo_v1.3.slot2.uf2 into the SONATA drive to play snake using the joystick. Make sure to switch to the second software slot (SW7) and reset the board with SW5. Watch the CHERI error LEDs as you hit the boundary.
Sonata system v1.2
Please use the v1.2 branch of the sonata software repository for compatible software. Please note that software that ran on v0.4 and v0.2 will not be compatible with v1.0 and above because of improvements that we think are necessary for the longevity of the project.
Release Notes
This release contains on top of v1.1:
- CHERIoT-enabled debugger to aid in LLDB development, see documentation for basic instructions.
- JTAG DPI to allow debugging in Verilator simulation as well as on FPGA.
- CHERIoT Ibex fixes for MISA and instruction cache in debug mode.
- Software now relies on upstream CHERIoT RTOS instead of the lowRISC fork.
- LCD SPI read connected and resolution detection code developed.
Bitstream information
The utilization of the bitstream:
| Type | Used | Available | Percentage |
|---|---|---|---|
| Slice LUTs | 26,003 | 32,600 | 79.76% |
| Slice Registers | 15,730 | 65,200 | 24.13% |
| Block RAM Tiles | 41 | 75 | 54.67% |
| DSPs | 13 | 120 | 10.83% |
Other bitstream statistics:
| Name | Value |
|---|---|
| Overall WNS | 0.079 ns |
| System clock WNS | 0.079 ns |
| HyperRAM clock WNS | 0.902 ns |
| USB clock WNS | 9.978 ns |
| Total on-chip power | 0.315 W |
Quick start guide
Here's the developer flow for using these files:
- Make sure the bitstream select switch (immediately below the main USB-C port) is set to position 1.
- Before plugging in your Sonata board, hold down the "SW9" button labelled "RP2040 Boot", and while holding this button plug your board into your laptop using the Main USB.
- A drive called "RPI-RP2" should pop up on your computer and copy rpi_rp2_v1.2.uf2 into it.
- This drive should automatically dismount once the file is transferred and remount as "SONATA". Once the remount has happened, you can drag in the wrapped bitstream sonata_bitstream_v1.2.bit.slot1.uf2.
- Once programming is successful, you should see the "CHERI" LED light up and the "LEGACY" LED turn off. If this is not the case, the bitstream loading may have failed and you should retry by unplugging and replugging the main USB on the Sonata board. Then re-drag the bitstream into the "SONATA" drive.
- After programming the bitstream, drag the sonata_simple_demo_v1.2.slot1.uf2 into the "SONATA" drive.
- You should now see the user LEDs turn on and off, as well as the lowRISC logo appear on the LCD.
- You can also drag snake_demo_v1.2.slot2.uf2 into the SONATA drive to play snake using the joystick. Make sure to switch to the second software slot (SW7) and reset the board with SW5. Watch the CHERI error LEDs as you hit the boundary.
PRE-RELEASE CHERIoT debug module
Please keep using v1.1 as the official release.
This is a pre-release that includes a bitstream with a CHERIoT debug module. This pre-release is made to help the LLDB development work but should not be considered a full release.
Initial documentation on how to use the debug module can be found here.
Sonata system v1.1
Please use the v1.1 branch of the sonata software repository for compatible software. Please note that software that ran on v0.4 and v0.2 will not be compatible with v1.0 and above because of improvements that we think are necessary for the longevity of the project.
Release Notes
This release contains on top of the previous v1.0 release:
- Improved Vivado optimizations and timing
- Revocation control is now generated by reggen
- SD card example added
- PWM enable fix for PWM 1 and above
- Simulator now exits with magic UART string
- Latest CHERIoT Ibex with support for CHERIoT ISA v1.0
Bitstream information
The utilization of the bitstream:
| Type | Used | Available | Percentage |
|---|---|---|---|
| Slice LUTs | 25,375 | 32,600 | 77.84% |
| Slice Registers | 15,417 | 65,200 | 23.65% |
| Block RAM Tiles | 41 | 75 | 54.67% |
| DSPs | 13 | 120 | 10.83% |
Other bitstream statistics:
| Name | Value |
|---|---|
| Overall WNS | 0.029 ns |
| System clock WNS | 0.029 ns |
| HyperRAM clock WNS | 2.766 ns |
| USB clock WNS | 10.173 ns |
| Total on-chip power | 0.319 W |
Quick start guide
Here's the developer flow for using these files:
- Make sure the bitstream select switch (immediately below the main USB-C port) is set to position 1.
- Before plugging in your Sonata board, hold down the "SW9" button labelled "RP2040 Boot", and while holding this button plug your board into your laptop using the Main USB.
- A drive called "RPI-RP2" should pop up on your computer and copy
rpi_rp2_v1.1.uf2into it. - This drive should automatically dismount once the file is transferred and remount as "SONATA". Once the remount has happened, you can drag in the wrapped bitstream
sonata_bitstream_v1.1.bit.slot1.uf2. - Once programming is successful, you should see the "CHERI" LED light up and the "LEGACY" LED turn off. If this is not the case, the bitstream loading may have failed and you should retry by unplugging and replugging the main USB on the Sonata board. Then re-drag the bitstream into the "SONATA" drive.
- After programming the bitstream, select position 1 on the "SW App" switch (bottom left corner of the board) drag the
sonata_simple_demo_v1.1.slot1.uf2into the "SONATA" drive. - You should now see the user LEDs turn on and off, as well as the lowRISC logo appear on the LCD.
- You can also drag
snake_demo_v1.1.slot2.uf2into the SONATA drive to play snake using the joystick. - After copying the snake demo across select position 2 on the "SW App" switch and reset the board (with the reset button or a power cycle) to run it
- Watch the CHERI error LEDs as you hit the boundary.
As a next step, have a look at our getting started guide.
Sonata system v1.0
This is a stable release, from here on out we aim not to make any software visible changes to the hardware. Please note that software that ran on v0.4 and v0.2 will not be compatible with v1.0 because of improvements that we think are necessary for the longevity of the project. Please use the v1.0 branch of the sonata software repository for compatible software.
Release Notes
This release contains on top of the previous v0.4 release:
- New functionality:
- Pin multiplexer and padring. You can see a diagram of the connection possible through the pinmux here.
- Pmod 0 and 1 now also have I2C and SPI connections, and Pmod C is now also accessible.
- SPI chip selects can now be compartmentalized as they are controlled by each SPI host separately.
- Support software slots in bootloader. On boot the bootloader will look at the software switch to determine which program to run.
- Live switching of bitstreams so that when you change the bitstream selector the FPGA will be reprogrammed without having to unplug and replug the board.
- GPIO output enable is now software accessible.
- Interrupt are refactored so that each block just has one interrupt.
- System information IP for reporting git build hash, system frequency and IP block numbers.
- RS-485 now connected up.
- LCD backlight now dimmable.
- Quality and performance improvements:
- Main system clock is now 40 MHz up from 30 MHz.
- Timing and pin constraints reworked.
- Improve TL-UL bus access latency. Before access to SRAM went through multiple FIFOs, which added multiple cycles of latency. This is now reduced so that you can have single-cycle access to SRAM.
- Area improvements including reducing FIFO sizes in I2C and UART.
- FPGA build and testing in CI.
- Linting and more checks in CI.
- I2C and SPI DPI model for simulation.
Bitstream information
The utilization of the bitstream:
| Type | Used | Available | Percentage |
|---|---|---|---|
| Slice LUTs | 22,691 | 32,600 | 69.60% |
| Slice Registers | 15,618 | 65,200 | 23.95% |
| Block RAM Tiles | 41 | 75 | 54.67% |
| DSPs | 13 | 120 | 10.83% |
Other bitstream statistics:
| Name | Value |
|---|---|
| Overall WNS | 0.120 ns |
| System clock WNS | 0.120 ns |
| HyperRAM clock WNS | 2.298 ns |
| USB clock WNS | 7.848 ns |
| Total on-chip power | 0.313 W |
Quick start guide
Here's the developer flow for using these files:
- Make sure the bitstream select switch (immediately below the main USB-C port) is set to position 1.
- Before plugging in your Sonata board, hold down the "SW9" button labeled "RP2040 Boot", and while holding this button plug your board into your laptop using the Main USB.
- A drive called "RPI-RP2" should pop up on your computer and copy
rpi_rp2_v1.0.uf2into it. - This drive should automatically dismount once the file is transferred and remount as "SONATA". Once the remount has happened, you can drag in the wrapped bitstream
sonata_bitstream_v1.0.bit.slot1.uf2. - Once programming is successful, you should see the "CHERI" LED light up and the "LEGACY" LED turn off. If this is not the case, the bitstream loading may have failed and you should retry by unplugging and replugging the main USB on the Sonata board. Then re-drag the bitstream into the "SONATA" drive.
- After programming the bitstream, select position 1 on the "SW App" switch (bottom left corner of the board) drag the
sonata_simple_demo_v1.0.slot1.uf2into the "SONATA" drive. - You should now see the user LEDs turn on and off, as well as the lowRISC logo appear on the LCD.
- You can also drag
snake_demo_v1.0.slot2.uf2into the SONATA drive to play snake using the joystick. - After copying the snake demo across select position 2 on the "SW App" switch and reset the board (with the reset button or a power cycle) to run it
- Watch the CHERI error LEDs as you hit the boundary.
As a next step, have a look at our getting started guide.
PRE-RELEASE 2 Sonata system v1.0
This is a pre-release for testing, v0.4.1 remains the latest release recommended for end-users.
This is the second pre-release of v1.0, the release notes will be added to the v1.0 release when it is fully released. This release contains the bitstream, the bitstream UF2s, the bootloader elf and a tarball of the complete build directory. There is also a new RP2040 firmware.
When using sonata-software you must use the staging branch until we've merged that into main.
Here are a few characteristics of this bitstream:
- Utilization
- Slice LUTs 69.83% (22766 / 32600)
- Slice Registers: 23.96% (15619 / 65200)
- Block RAM Tile: 54.67% (41/75)
- DSPs: 10.83% (13/120)
- Timing
- Overall WNS: 0.319 ns
- System clock WNS: 0.319 ns
- HyperRAM clock WNS: 2.947 ns
- USB clock WNS: 7.729 ns
- Total on-chip power: 0.316 W
PRE-RELEASE 1 Sonata system v1.0
This is a pre-release for testing, v0.4.1 remains the latest release recommended for end-users
Pre-release of v1.0. Release notes are not yet available. Only bitstream UF2s are provided.
When using sonata-software the CHERIoT RTOS sub-module needs to point to the latest sonata branch of the lowRISC CHERIoT RTOS fork.
Tests from sonata-system are passing, however there are known issues with ethernet. They are believe to be software related but further investigation is required.
Here are a few characteristics of this bitstream:
- Utilization
- Slice LUTs 70.45% (22967 / 32600)
- Slice Registers: 23.92% (15594 / 65200)
- Block RAM Tile: 54.67% (41/75)
- DSPs: 10.83% (13/120)
- Timing
- Overall WNS: 0.003 ns
- System clock WNS: 0.003 ns
- HyperRAM clock WNS: 2.454 ns
- USB clock WNS: 8.287 ns
- Total on-chip power: 0.316 W
Sonata system v0.4.1
This release contains on top of v0.3:
- Execution from HyperRAM including instruction cache support and bootloader support
- Bumped version of CHERIoT Ibex
- Support for XADC, which is the FPGA's analogue to digital converter
- Improvements to CI and automated testing
It fixes a bug from v0.4 that caused the icache to be effectively disabled following execution of a fence.i. It is recommended you use this release over v0.4.
This is the release that we will use during the CHES hackathon 2024. It is recommended you use the v0.4 branch of sonata-software repository with this release. That branch will be maintained to remain compatible with this release.
Here's the flow for using these files:
- Make sure the bitstream select switch (immediately below the main USB-C port) is set to position 1.
- Before plugging in your Sonata board, hold down the SW9 labelled "RP2040 Boot", and while holding this button plug your board into your laptop using the Main USB.
- A drive called
RPI-RP2should pop up on your computer and copyrpi_rp2_v0.4.uf2into it. - This drive should automatically dismount once the file is transferred and remount as
SONATA. Once the remount has happened, you can drag in the wrapped bitstreamsonata_bitstream_v0.4.bit.slot1.uf2. - Once programming is successful, you should see the CHERI LED light up and the LEGACY LED turn off. If this is not the case, the bitstream loading may have failed and you should retry by unplugging and replugging the main USB on the Sonata board and re-drag the bitstream into the
SONATAdrive. - After programming the bitstream, drag the
sonata_simple_demo_v0.4.slot1.uf2into theSONATAdrive. - You should now see the user LEDs turn on and off, as well as the lowRISC logo appear on the LCD.
- You can also drag
snake_demo_v0.4.slot1.uf2into theSONATAdrive to play snake using the joystick. Watch the CHERI error LEDs as you hit the boundary.
Sonata system v0.4
There is an icache related bug in v0.4 it is recommended you use v0.4.1 instead.
This release contains on top of v0.3:
- Execution from HyperRAM including instruction cache support and bootloader support
- Bumped version of CHERIoT Ibex
- Support for XADC, which is the FPGA's analogue to digital converter
- Improvements to CI and automated testing
This is the release that we will use during the CHES hackathon 2024. It is recommended you use the v0.4 branch of sonata-software repository with this release. That branch will be maintained to remain compatible with this release.
Here's the flow for using these files:
- Make sure the bitstream select switch (immediately below the main USB-C port) is set to position 1.
- Before plugging in your Sonata board, hold down the SW9 labelled "RP2040 Boot", and while holding this button plug your board into your laptop using the Main USB.
- A drive called
RPI-RP2should pop up on your computer and copyrpi_rp2_v0.4.uf2into it. - This drive should automatically dismount once the file is transferred and remount as
SONATA. Once the remount has happened, you can drag in the wrapped bitstreamsonata_bitstream_v0.4.bit.slot1.uf2. - Once programming is successful, you should see the CHERI LED light up and the LEGACY LED turn off. If this is not the case, the bitstream loading may have failed and you should retry by unplugging and replugging the main USB on the Sonata board and re-drag the bitstream into the
SONATAdrive. - After programming the bitstream, drag the
sonata_simple_demo_v0.4.slot1.uf2into theSONATAdrive. - You should now see the user LEDs turn on and off, as well as the lowRISC logo appear on the LCD.
- You can also drag
snake_demo_v0.4.slot1.uf2into theSONATAdrive to play snake using the joystick. Watch the CHERI error LEDs as you hit the boundary.
Sonata system v0.3
This release contains the following on top of v0.2:
- Use Sonata JTAG ID code
- Documentation updates
- Implemented Elf bootloader
- Fixes to the Nix environment
- Enabling hardware revoker
- New testing framework
The main reason for this pre-release is to enable usage of the new RP2040 firmware (v0.4) and provide a release compatible with the latest sonata-software. This firmware uses UF2 for both FPGA bitstreams and Sonata firmware providing more reliable operation. Firmware is now written as an elf file into the flash and the sonata-software repository does not maintain support for the old method used by the v0.2 release.
It is recommended you use the v0.3 branch of sonata-software repository with this release. That branch will be maintained to remain compatible with this release.
Here's the flow for using these files:
- Before plugging in your Sonata board, hold down the SW9 labelled "RP2040 Boot", and while holding this button plug your board into your laptop using the Main USB.
- A drive called
RPI-RP2should pop up on your computer and copyrpi_rp2_v0.4.uf2into it. - Make sure the bitstream select switch (immediately below the main USB-C port) is set to position 1.
- This drive should automatically dismount once the file is transferred and remount as
SONATA. Once the remount has happened, you can drag in the wrapped bitstreamsonata-v0.3.bit.slot1.uf2. You may have to unplug and replug the USB cable if the drive does not mount automatically. - Once programming is successful, you should see the CHERI LED light up and the LEGACY LED turn off. If this is not the case, the bitstream loading may have failed and you should retry by unplugging and replugging the main USB on the Sonata board and re-drag the bitstream into the
SONATAdrive. - After programming the bitstream, drag the
sonata_simple_demo_v0.3.uf2into theSONATAdrive. - You should now see the user LEDs turn on and off, as well as the lowRISC logo appear on the LCD.