From 491b20bd3c8a57d4c052c3aeb4380567ad25f2c3 Mon Sep 17 00:00:00 2001 From: Moritz Date: Mon, 27 Oct 2025 12:24:49 +0100 Subject: [PATCH 1/3] [GlobalISel] add G_ROTL, G_ROTR to computeKnownBits --- .../CodeGen/GlobalISel/GISelValueTracking.cpp | 21 ++ .../GlobalISel/knownbits-rotl-rotr.mir | 270 ++++++++++++++++++ 2 files changed, 291 insertions(+) create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/knownbits-rotl-rotr.mir diff --git a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp index d6f23b62519fe..5b45a0d9a506b 100644 --- a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp +++ b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp @@ -483,6 +483,27 @@ void GISelValueTracking::computeKnownBitsImpl(Register R, KnownBits &Known, Known = KnownBits::shl(LHSKnown, RHSKnown); break; } + case TargetOpcode::G_ROTL: + case TargetOpcode::G_ROTR: { + MachineInstr *AmtOpMI = MRI.getVRegDef(MI.getOperand(2).getReg()); + if (!AmtOpMI) + break; + auto MaybeAmtOp = isConstantOrConstantSplatVector(*AmtOpMI, MRI); + if (MaybeAmtOp.has_value()) { + unsigned Amt = MaybeAmtOp.value().urem(BitWidth); + + Register SrcReg = MI.getOperand(1).getReg(); + computeKnownBitsImpl(SrcReg, Known, DemandedElts, Depth + 1); + + // Canonicalize to ROTR. + if (Opcode == TargetOpcode::G_ROTL && Amt != 0) + Amt = BitWidth - Amt; + + Known.Zero = Known.Zero.rotr(Amt); + Known.One = Known.One.rotr(Amt); + } + break; + } case TargetOpcode::G_INTTOPTR: case TargetOpcode::G_PTRTOINT: if (DstTy.isVector()) diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-rotl-rotr.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-rotl-rotr.mir new file mode 100644 index 0000000000000..d468c84ce899f --- /dev/null +++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-rotl-rotr.mir @@ -0,0 +1,270 @@ +# NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 5 +# RUN: llc -mtriple aarch64 -passes="print" %s -o - 2>&1 | FileCheck %s + +--- +name: Cst +body: | + bb.1: + ; CHECK-LABEL: name: @Cst + ; CHECK-NEXT: %0:_ KnownBits:11100010 SignBits:3 + ; CHECK-NEXT: %1:_ KnownBits:00000010 SignBits:6 + ; CHECK-NEXT: %2:_ KnownBits:10111000 SignBits:1 + %0:_(s8) = G_CONSTANT i8 226 + %1:_(s8) = G_CONSTANT i8 2 + %2:_(s8) = G_ROTR %0, %1 +... +--- +name: CstBig +body: | + bb.1: + ; CHECK-LABEL: name: @CstBig + ; CHECK-NEXT: %0:_ KnownBits:11111001 SignBits:5 + ; CHECK-NEXT: %1:_ KnownBits:00000110 SignBits:5 + ; CHECK-NEXT: %2:_ KnownBits:11100111 SignBits:3 + %0:_(s8) = G_CONSTANT i8 249 + %1:_(s8) = G_CONSTANT i8 6 + %2:_(s8) = G_ROTR %0, %1 +... +--- +name: CstSext +body: | + bb.1: + ; CHECK-LABEL: name: @CstSext + ; CHECK-NEXT: %0:_ KnownBits:10000001 SignBits:1 + ; CHECK-NEXT: %1:_ KnownBits:00000100 SignBits:5 + ; CHECK-NEXT: %2:_ KnownBits:11111000 SignBits:5 + ; CHECK-NEXT: %3:_ KnownBits:00000100 SignBits:5 + ; CHECK-NEXT: %4:_ KnownBits:10001111 SignBits:1 + %0:_(s8) = G_CONSTANT i8 129 + %1:_(s8) = G_CONSTANT i8 4 + %2:_(s8) = G_ASHR %0, %1 + %3:_(s8) = G_CONSTANT i8 4 + %4:_(s8) = G_ROTR %2, %3 +... +--- +name: CstSextBig +body: | + bb.1: + ; CHECK-LABEL: name: @CstSextBig + ; CHECK-NEXT: %0:_ KnownBits:10000001 SignBits:1 + ; CHECK-NEXT: %1:_ KnownBits:00000100 SignBits:5 + ; CHECK-NEXT: %2:_ KnownBits:11111000 SignBits:5 + ; CHECK-NEXT: %3:_ KnownBits:00000110 SignBits:5 + ; CHECK-NEXT: %4:_ KnownBits:11100011 SignBits:3 + %0:_(s8) = G_CONSTANT i8 129 + %1:_(s8) = G_CONSTANT i8 4 + %2:_(s8) = G_ASHR %0, %1 + %3:_(s8) = G_CONSTANT i8 6 + %4:_(s8) = G_ROTR %2, %3 +... +--- +name: ScalarVar +body: | + bb.1: + ; CHECK-LABEL: name: @ScalarVar + ; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1 + ; CHECK-NEXT: %1:_ KnownBits:???????? SignBits:1 + ; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1 + %0:_(s8) = COPY $b0 + %1:_(s8) = COPY $b1 + %2:_(s8) = G_ROTR %0, %1 +... +--- +name: ScalarCst +body: | + bb.1: + ; CHECK-LABEL: name: @ScalarCst + ; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1 + ; CHECK-NEXT: %1:_ KnownBits:00000011 SignBits:6 + ; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:1 + %0:_(s8) = COPY $b0 + %1:_(s8) = G_CONSTANT i8 3 + %2:_(s8) = G_ROTR %0, %1 +... +--- +name: VectorVar +body: | + bb.1: + ; CHECK-LABEL: name: @VectorVar + ; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1 + ; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1 + ; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:1 + %0:_(<4 x s16>) = COPY $d0 + %1:_(<4 x s16>) = COPY $d1 + %2:_(<4 x s16>) = G_ROTR %0, %1 +... +--- +name: VectorSimple +body: | + bb.1: + ; CHECK-LABEL: name: @VectorSimple + ; CHECK-NEXT: %0:_ KnownBits:0000000000010011 SignBits:11 + ; CHECK-NEXT: %1:_ KnownBits:0000000000000011 SignBits:14 + ; CHECK-NEXT: %2:_ KnownBits:0000000000010011 SignBits:11 + ; CHECK-NEXT: %3:_ KnownBits:0000000000000011 SignBits:14 + ; CHECK-NEXT: %4:_ KnownBits:0110000000000010 SignBits:1 + %0:_(s16) = G_CONSTANT i16 19 + %1:_(s16) = G_CONSTANT i16 3 + %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %0, %0, %0 + %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1 + %4:_(<4 x s16>) = G_ROTR %2, %3 +... +--- +name: VectorCst +body: | + bb.1: + ; CHECK-LABEL: name: @VectorCst + ; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1 + ; CHECK-NEXT: %1:_ KnownBits:0000000000000011 SignBits:14 + ; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14 + ; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1 + %0:_(<4 x s16>) = COPY $d0 + %1:_(s16) = G_CONSTANT i16 3 + %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1 + %3:_(<4 x s16>) = G_ROTR %0, %2 +... +--- +name: VectorCst36 +body: | + bb.1: + ; CHECK-LABEL: name: @VectorCst36 + ; CHECK-NEXT: %0:_ KnownBits:0000000000000011 SignBits:14 + ; CHECK-NEXT: %1:_ KnownBits:0000000000000110 SignBits:13 + ; CHECK-NEXT: %2:_ KnownBits:0000000000000?1? SignBits:13 + ; CHECK-NEXT: %3:_ KnownBits:0000000000000?1? SignBits:13 + ; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1 + %0:_(s16) = G_CONSTANT i16 3 + %1:_(s16) = G_CONSTANT i16 6 + %2:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0 + %3:_(<4 x s16>) = G_BUILD_VECTOR %0, %1, %1, %0 + %4:_(<4 x s16>) = G_ROTR %2, %3 +... + +--- +name: VectorCst3unknown +body: | + bb.1: + ; CHECK-LABEL: name: @VectorCst3unknown + ; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1 + ; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1 + ; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14 + ; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1 + ; CHECK-NEXT: %4:_ KnownBits:???????????????? SignBits:1 + %0:_(<4 x s16>) = COPY $d0 + %1:_(s16) = COPY $h0 + %2:_(s16) = G_CONSTANT i16 3 + %3:_(<4 x s16>) = G_BUILD_VECTOR %1, %2, %2, %1 + %4:_(<4 x s16>) = G_ROTR %0, %3 +... +--- +name: VectorSext +body: | + bb.1: + ; CHECK-LABEL: name: @VectorSext + ; CHECK-NEXT: %0:_ KnownBits:11101110 SignBits:3 + ; CHECK-NEXT: %1:_ KnownBits:1111111111101110 SignBits:11 + ; CHECK-NEXT: %2:_ KnownBits:1111111111101110 SignBits:11 + ; CHECK-NEXT: %3:_ KnownBits:0000000000000011 SignBits:14 + ; CHECK-NEXT: %4:_ KnownBits:0000000000000110 SignBits:13 + ; CHECK-NEXT: %5:_ KnownBits:0000000000000?1? SignBits:13 + ; CHECK-NEXT: %6:_ KnownBits:???????????????? SignBits:1 + %0:_(s8) = G_CONSTANT i8 238 + %1:_(s16) = G_SEXT %0(s8) + %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1 + %3:_(s16) = G_CONSTANT i16 3 + %4:_(s16) = G_CONSTANT i16 6 + %5:_(<4 x s16>) = G_BUILD_VECTOR %3, %4, %4, %3 + %6:_(<4 x s16>) = G_ROTR %2, %5 +... +--- +name: VectorSextBig +body: | + bb.1: + ; CHECK-LABEL: name: @VectorSextBig + ; CHECK-NEXT: %0:_ KnownBits:11101110 SignBits:3 + ; CHECK-NEXT: %1:_ KnownBits:1111111111101110 SignBits:11 + ; CHECK-NEXT: %2:_ KnownBits:1111111111101110 SignBits:11 + ; CHECK-NEXT: %3:_ KnownBits:0000000000001000 SignBits:12 + ; CHECK-NEXT: %4:_ KnownBits:0000000000001001 SignBits:12 + ; CHECK-NEXT: %5:_ KnownBits:000000000000100? SignBits:12 + ; CHECK-NEXT: %6:_ KnownBits:???????????????? SignBits:1 + %0:_(s8) = G_CONSTANT i8 238 + %1:_(s16) = G_SEXT %0(s8) + %2:_(<4 x s16>) = G_BUILD_VECTOR %1, %1, %1, %1 + %3:_(s16) = G_CONSTANT i16 8 + %4:_(s16) = G_CONSTANT i16 9 + %5:_(<4 x s16>) = G_BUILD_VECTOR %3, %4, %4, %3 + %6:_(<4 x s16>) = G_ROTR %2, %5 +... +--- +name: ROTRless +body: | + bb.1: + ; CHECK-LABEL: name: @ROTRless + ; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1 + ; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:9 + ; CHECK-NEXT: %2:_ KnownBits:0000000000000011 SignBits:14 + ; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1 + %0:_(s8) = COPY $b0 + %1:_(s16) = G_SEXT %0(s8) + %2:_(s16) = G_CONSTANT i16 3 + %3:_(s16) = G_ROTR %1, %2 +... +--- +name: ROTReq +body: | + bb.1: + ; CHECK-LABEL: name: @ROTReq + ; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1 + ; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:9 + ; CHECK-NEXT: %2:_ KnownBits:0000000000001000 SignBits:12 + ; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1 + %0:_(s8) = COPY $b0 + %1:_(s16) = G_SEXT %0(s8) + %2:_(s16) = G_CONSTANT i16 8 + %3:_(s16) = G_ROTR %1, %2 +... +--- +name: ROTRmore +body: | + bb.1: + ; CHECK-LABEL: name: @ROTRmore + ; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1 + ; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:9 + ; CHECK-NEXT: %2:_ KnownBits:0000000000001101 SignBits:12 + ; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:1 + %0:_(s8) = COPY $b0 + %1:_(s16) = G_SEXT %0(s8) + %2:_(s16) = G_CONSTANT i16 13 + %3:_(s16) = G_ROTR %1, %2 +... +--- +name: SignBitsThroughZext +body: | + bb.1: + ; CHECK-LABEL: name: @SignBitsThroughZext + ; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1 + ; CHECK-NEXT: %1:_ KnownBits:0000000000000011 SignBits:14 + ; CHECK-NEXT: %2:_ KnownBits:???????? SignBits:4 + ; CHECK-NEXT: %3:_ KnownBits:00000000???????? SignBits:8 + ; CHECK-NEXT: %4:_ KnownBits:0000000000001000 SignBits:12 + ; CHECK-NEXT: %5:_ KnownBits:????????00000000 SignBits:1 + %0:_(s8) = COPY $b0 + %1:_(s16) = G_CONSTANT i16 3 + %2:_(s8) = G_ASHR %0, %1 + %3:_(s16) = G_ZEXT %2 + %4:_(s16) = G_CONSTANT i16 8 + %5:_(s16) = G_ROTR %3, %4 +... +--- +name: ROTRCanonicalize +body: | + bb.1: + ; CHECK-LABEL: name: @ROTRCanonicalize + ; CHECK-NEXT: %0:_ KnownBits:11100000 SignBits:3 + ; CHECK-NEXT: %1:_ KnownBits:00000010 SignBits:6 + ; CHECK-NEXT: %2:_ KnownBits:10000011 SignBits:1 + %0:_(s8) = G_CONSTANT i8 224 + %1:_(s8) = G_CONSTANT i8 2 + %2:_(s8) = G_ROTL %0, %1 +... From 5767a7a4297ab6401fedd0efd2ecd58fe01f14c1 Mon Sep 17 00:00:00 2001 From: Moritz Zielke Date: Wed, 5 Nov 2025 13:30:56 +0100 Subject: [PATCH 2/3] Address review comments --- .../CodeGen/GlobalISel/GISelValueTracking.cpp | 22 +++++++++---------- 1 file changed, 10 insertions(+), 12 deletions(-) diff --git a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp index 5b45a0d9a506b..73975cba99130 100644 --- a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp +++ b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp @@ -486,22 +486,20 @@ void GISelValueTracking::computeKnownBitsImpl(Register R, KnownBits &Known, case TargetOpcode::G_ROTL: case TargetOpcode::G_ROTR: { MachineInstr *AmtOpMI = MRI.getVRegDef(MI.getOperand(2).getReg()); - if (!AmtOpMI) - break; auto MaybeAmtOp = isConstantOrConstantSplatVector(*AmtOpMI, MRI); - if (MaybeAmtOp.has_value()) { - unsigned Amt = MaybeAmtOp.value().urem(BitWidth); + if (!MaybeAmtOp) + break; + unsigned Amt = MaybeAmtOp->urem(BitWidth); - Register SrcReg = MI.getOperand(1).getReg(); - computeKnownBitsImpl(SrcReg, Known, DemandedElts, Depth + 1); + Register SrcReg = MI.getOperand(1).getReg(); + computeKnownBitsImpl(SrcReg, Known, DemandedElts, Depth + 1); - // Canonicalize to ROTR. - if (Opcode == TargetOpcode::G_ROTL && Amt != 0) - Amt = BitWidth - Amt; + // Canonicalize to ROTR. + if (Opcode == TargetOpcode::G_ROTL) + Amt = BitWidth - Amt; - Known.Zero = Known.Zero.rotr(Amt); - Known.One = Known.One.rotr(Amt); - } + Known.Zero = Known.Zero.rotr(Amt); + Known.One = Known.One.rotr(Amt); break; } case TargetOpcode::G_INTTOPTR: From c57ff7aab24f03448a622ea17d6f29d2015213e6 Mon Sep 17 00:00:00 2001 From: Moritz Zielke Date: Wed, 5 Nov 2025 20:23:54 +0100 Subject: [PATCH 3/3] Address review comment --- llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp index 73975cba99130..4314b79e4afbd 100644 --- a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp +++ b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp @@ -489,11 +489,12 @@ void GISelValueTracking::computeKnownBitsImpl(Register R, KnownBits &Known, auto MaybeAmtOp = isConstantOrConstantSplatVector(*AmtOpMI, MRI); if (!MaybeAmtOp) break; - unsigned Amt = MaybeAmtOp->urem(BitWidth); Register SrcReg = MI.getOperand(1).getReg(); computeKnownBitsImpl(SrcReg, Known, DemandedElts, Depth + 1); + unsigned Amt = MaybeAmtOp->urem(BitWidth); + // Canonicalize to ROTR. if (Opcode == TargetOpcode::G_ROTL) Amt = BitWidth - Amt;