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s/fixupBlendComponents/fixupPtrauthDiscriminator/
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llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -3246,20 +3246,20 @@ MachineBasicBlock *AArch64TargetLowering::EmitInstrWithCustomInserter(
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&AArch64::GPR64noipRegClass);
32473247
return BB;
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case AArch64::AUTH_TCRETURN:
3249-
fixupBlendComponents(MI, BB, MI.getOperand(3), MI.getOperand(4),
3250-
&AArch64::tcGPR64RegClass);
3249+
fixupPtrauthDiscriminator(MI, BB, MI.getOperand(3), MI.getOperand(4),
3250+
&AArch64::tcGPR64RegClass);
32513251
return BB;
32523252
case AArch64::AUTH_TCRETURN_BTI:
3253-
fixupBlendComponents(MI, BB, MI.getOperand(3), MI.getOperand(4),
3254-
&AArch64::tcGPRnotx16x17RegClass);
3253+
fixupPtrauthDiscriminator(MI, BB, MI.getOperand(3), MI.getOperand(4),
3254+
&AArch64::tcGPRnotx16x17RegClass);
32553255
return BB;
32563256
case AArch64::BLRA:
3257-
fixupBlendComponents(MI, BB, MI.getOperand(2), MI.getOperand(3),
3258-
&AArch64::GPR64noipRegClass);
3257+
fixupPtrauthDiscriminator(MI, BB, MI.getOperand(2), MI.getOperand(3),
3258+
&AArch64::GPR64noipRegClass);
32593259
return BB;
32603260
case AArch64::BLRA_RVMARKER:
3261-
fixupBlendComponents(MI, BB, MI.getOperand(4), MI.getOperand(5),
3262-
&AArch64::GPR64noipRegClass);
3261+
fixupPtrauthDiscriminator(MI, BB, MI.getOperand(4), MI.getOperand(5),
3262+
&AArch64::GPR64noipRegClass);
32633263
return BB;
32643264
}
32653265
}

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