Skip to content

Commit 483bf23

Browse files
0xdaryl0xdaryl
authored
Merge pull request eclipse-omr#2887 from knn-k/aarch64memref4
AArch64: Implement OMRMemoryReference::estimateBinaryLength()
2 parents fcbe08d + cfa3420 commit 483bf23

File tree

5 files changed

+57
-19
lines changed

5 files changed

+57
-19
lines changed

‎compiler/aarch64/codegen/ARM64BinaryEncoding.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -246,7 +246,7 @@ uint8_t *TR::ARM64Trg1MemInstruction::generateBinaryEncoding()
246246

247247
int32_t TR::ARM64Trg1MemInstruction::estimateBinaryLength(int32_t currentEstimate)
248248
{
249-
setEstimatedBinaryLength(getMemoryReference()->estimateBinaryLength());
249+
setEstimatedBinaryLength(getMemoryReference()->estimateBinaryLength(getOpCodeValue()));
250250
return currentEstimate + getEstimatedBinaryLength();
251251
}
252252

@@ -264,7 +264,7 @@ uint8_t *TR::ARM64MemInstruction::generateBinaryEncoding()
264264

265265
int32_t TR::ARM64MemInstruction::estimateBinaryLength(int32_t currentEstimate)
266266
{
267-
setEstimatedBinaryLength(getMemoryReference()->estimateBinaryLength());
267+
setEstimatedBinaryLength(getMemoryReference()->estimateBinaryLength(getOpCodeValue()));
268268
return(currentEstimate + getEstimatedBinaryLength());
269269
}
270270

@@ -283,6 +283,6 @@ uint8_t *TR::ARM64MemSrc1Instruction::generateBinaryEncoding()
283283

284284
int32_t TR::ARM64MemSrc1Instruction::estimateBinaryLength(int32_t currentEstimate)
285285
{
286-
setEstimatedBinaryLength(getMemoryReference()->estimateBinaryLength());
286+
setEstimatedBinaryLength(getMemoryReference()->estimateBinaryLength(getOpCodeValue()));
287287
return(currentEstimate + getEstimatedBinaryLength());
288288
}

‎compiler/aarch64/codegen/ARM64Instruction.hpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@ namespace TR { class SymbolReference; }
4141
* @param[in] intValue : signed integer value
4242
* @return true if the value can be placed in 9-bit field, false otherwise
4343
*/
44-
inline bool constantIsImmed9(int32_t intValue)
44+
inline bool constantIsImm9(int32_t intValue)
4545
{
4646
return (-256 <= intValue && intValue < 256);
4747
}
@@ -51,7 +51,7 @@ inline bool constantIsImmed9(int32_t intValue)
5151
* @param[in] intValue : unsigned integer value
5252
* @return true if the value can be placed in 12-bit field, false otherwise
5353
*/
54-
inline bool constantIsUnsignedImmed12(uint32_t intValue)
54+
inline bool constantIsUnsignedImm12(uint32_t intValue)
5555
{
5656
return (intValue < 4096);
5757
}

‎compiler/aarch64/codegen/ARM64SystemLinkage.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -365,7 +365,7 @@ TR::ARM64SystemLinkage::createPrologue(TR::Instruction *cursor, List<TR::Paramet
365365

366366
// allocate stack space
367367
uint32_t frameSize = (uint32_t)codeGen->getFrameSizeInBytes();
368-
if (constantIsUnsignedImmed12(frameSize))
368+
if (constantIsUnsignedImm12(frameSize))
369369
{
370370
cursor = generateTrg1Src1ImmInstruction(codeGen, TR::InstOpCode::subimmx, firstNode, sp, sp, frameSize, cursor);
371371
}
@@ -488,7 +488,7 @@ TR::ARM64SystemLinkage::createEpilogue(TR::Instruction *cursor)
488488

489489
// remove space for preserved registers
490490
uint32_t frameSize = codeGen->getFrameSizeInBytes();
491-
if (constantIsUnsignedImmed12(frameSize))
491+
if (constantIsUnsignedImm12(frameSize))
492492
{
493493
cursor = generateTrg1Src1ImmInstruction(codeGen, TR::InstOpCode::addimmx, lastNode, sp, sp, frameSize, cursor);
494494
}

‎compiler/aarch64/codegen/OMRMemoryReference.cpp

Lines changed: 47 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -252,36 +252,34 @@ uint8_t *OMR::ARM64::MemoryReference::generateBinaryEncoding(TR::Instruction *cu
252252

253253
if (isImm9OffsetInstruction(enc))
254254
{
255-
if (constantIsImmed9(displacement))
255+
if (constantIsImm9(displacement))
256256
{
257257
*wcursor |= (displacement & 0x1ff) << 12; /* imm9 */
258258
cursor += ARM64_INSTRUCTION_LENGTH;
259259
}
260260
else
261261
{
262-
/* Need additional instructions for large offset */
263-
TR_ASSERT(false, "Not implemented yet.");
262+
TR_ASSERT(false, "Offset is too large for specified instruction.");
264263
}
265264
}
266265
else if (isImm12OffsetInstruction(enc))
267266
{
268-
int32_t size = (enc >> 30) & 3; /* b=0, h=1, w=2, x=3 */
269-
int32_t shifted = displacement >> size;
267+
uint32_t size = (enc >> 30) & 3; /* b=0, h=1, w=2, x=3 */
268+
uint32_t shifted = displacement >> size;
270269

271270
if (size > 0)
272271
{
273-
TR_ASSERT((displacement & ((1 << size) - 1)) == 0, "Non-aligned offset in halfword memory access.");
272+
TR_ASSERT((displacement & ((1 << size) - 1)) == 0, "Non-aligned offset in 2/4/8-byte memory access.");
274273
}
275274

276-
if (constantIsUnsignedImmed12(shifted))
275+
if (constantIsUnsignedImm12(shifted))
277276
{
278277
*wcursor |= (shifted & 0xfff) << 10; /* imm12 */
279278
cursor += ARM64_INSTRUCTION_LENGTH;
280279
}
281280
else
282281
{
283-
/* Need additional instructions for large offset */
284-
TR_ASSERT(false, "Not implemented yet.");
282+
TR_ASSERT(false, "Offset is too large for specified instruction.");
285283
}
286284
}
287285
else
@@ -296,7 +294,7 @@ uint8_t *OMR::ARM64::MemoryReference::generateBinaryEncoding(TR::Instruction *cu
296294
}
297295

298296

299-
uint32_t OMR::ARM64::MemoryReference::estimateBinaryLength()
297+
uint32_t OMR::ARM64::MemoryReference::estimateBinaryLength(TR::InstOpCode op)
300298
{
301299
if (self()->getUnresolvedSnippet() != NULL)
302300
{
@@ -310,7 +308,45 @@ uint32_t OMR::ARM64::MemoryReference::estimateBinaryLength()
310308
}
311309
else
312310
{
313-
TR_ASSERT(false, "Not implemented yet.");
311+
/* no index register */
312+
int32_t displacement = self()->getOffset();
313+
uint32_t enc = (uint32_t)op.getOpCodeBinaryEncoding();
314+
315+
if (isImm9OffsetInstruction(enc))
316+
{
317+
if (constantIsImm9(displacement))
318+
{
319+
return ARM64_INSTRUCTION_LENGTH;
320+
}
321+
else
322+
{
323+
TR_ASSERT(false, "Offset is too large for specified instruction.");
324+
}
325+
}
326+
else if (isImm12OffsetInstruction(enc))
327+
{
328+
uint32_t size = (enc >> 30) & 3; /* b=0, h=1, w=2, x=3 */
329+
uint32_t shifted = displacement >> size;
330+
331+
if (size > 0)
332+
{
333+
TR_ASSERT((displacement & ((1 << size) - 1)) == 0, "Non-aligned offset in 2/4/8-byte memory access.");
334+
}
335+
336+
if (constantIsUnsignedImm12(shifted))
337+
{
338+
return ARM64_INSTRUCTION_LENGTH;
339+
}
340+
else
341+
{
342+
TR_ASSERT(false, "Offset is too large for specified instruction.");
343+
}
344+
}
345+
else
346+
{
347+
/* Register pair, literal, exclusive instructions to be supported */
348+
TR_ASSERT(false, "Not implemented yet.");
349+
}
314350
}
315351
}
316352

‎compiler/aarch64/codegen/OMRMemoryReference.hpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,7 @@ namespace OMR { typedef OMR::ARM64::MemoryReference MemoryReferenceConnector; }
3737

3838
#include <stddef.h>
3939
#include <stdint.h>
40+
#include "codegen/InstOpCode.hpp"
4041
#include "codegen/Register.hpp"
4142
#include "env/TRMemory.hpp"
4243
#include "il/SymbolReference.hpp"
@@ -324,9 +325,10 @@ class OMR_EXTENSIBLE MemoryReference : public OMR::MemoryReference
324325

325326
/**
326327
* @brief Estimates the length of generated binary
328+
* @param[in] op : opcode of the instruction to attach this memory reference to
327329
* @return estimated binary length
328330
*/
329-
uint32_t estimateBinaryLength();
331+
uint32_t estimateBinaryLength(TR::InstOpCode op);
330332

331333
/**
332334
* @brief Generates binary encoding

0 commit comments

Comments
 (0)