Add DMA table

Author: JalonWong

README.md

@@ -8,12 +8,12 @@ Example is [here](https://github.com/jw-mcu-rust/stm32f1-hal/blob/main/examples/
 Below are the design principles.
 1. Readability is the most important.
     - We only write code a few times, but we read it countless times. Moreover, understanding the code is a necessary condition for maintaining it.
-2. Conciseness does not equal simplicity.
-    - Fewer lines of code mean conciseness, but being easy to understand is simplicity.
+2. Concise is not equal to simple.
+    - Fewer lines of code do not necessarily mean easier to read and understand.
 
 Therefore, if a module is quite complex, I would not use a macro + generic approach, as it is too difficult to read.
 
-Instead, I use a script to generate code for GPIO alternate function remapping and a synchronization script to manage duplicate code across peripherals.
+Instead, I use a synchronization script to manage duplicate code across peripherals and a script to generate code for GPIO alternate function remapping.
 
 ## Note
 This project is still in its early stages, with only a few features completed.

scripts/table/stm32f1_dma_table.csv

@@ -0,0 +1,12 @@
+dma1,ch1,ADC1,TIM2_CH3,TIM4_CH1,,,,,
+dma1,ch2,SPI1_RX,USART3_TX,TIM1_CH1,TIM2_UP,TIM3_CH3,,,
+dma1,ch3,SPI1_TX,USART3_RX,TIM3_CH4,TIM3_UP,,,
+dma1,ch4,SPI2_RX,I2S2_RX,USART1_TX,I2C2_TX,TIM1_CH4,TIM1_TRIG,TIM1_COM,TIM4_CH2
+dma1,ch5,SPI2_TX,I2S2_TX,USART1_RX,I2C2_RX,TIM1_UP,TIM2_CH1,TIM4_CH3,
+dma1,ch6,USART2_RX,I2C1_TX,TIM1_CH3,TIM3_CH1,TIM3_TRIG,,,
+dma1,ch7,USART2_TX,I2C1_RX,TIM2_CH2,TIM2_CH4,TIM4_UP,,,
+dma2,ch1,SPI3_RX,I2S3_RX,TIM5_CH4,TIM5_TRIG,TIM8_CH3,TIM8_UP,,
+dma2,ch2,SPI3_TX,I2S3_TX,TIM5_CH3,TIM5_UP,TIM8_CH4,TIM8_TRIG,TIM8_COM,
+dma2,ch3,UART4_RX,TIM6_UP,DAC_CH1,TIM8_CH1,,,,
+dma2,ch4,SDIO,TIM5_CH2,TIM7_UP,DAC_CH2,,,,
+dma2,ch5,ADC3,UART4_TX,TIM5_CH1,TIM8_CH2,,,,

src/common/uart/mod.rs

@@ -189,7 +189,7 @@ impl embedded_io::Error for Error {
             Error::FrameFormat => e_io::ErrorKind::InvalidData,
             Error::Parity => e_io::ErrorKind::InvalidData,
             Error::Noise => e_io::ErrorKind::InvalidData,
-            Error::Busy => e_io::ErrorKind::Interrupted,
+            Error::Busy => e_io::ErrorKind::WriteZero,
             Error::Other => e_io::ErrorKind::Other,
         }
     }