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mcore.cpp
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mcore.cpp
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//----------------------------------------------------------------------------
// Copyright [2014] [Ztachip Technologies Inc]c
//
// Author: Vuong Nguyen
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except IN compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to IN writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
//------------------------------------------------------------------------------
//
// Implements mcore program preprocessor
// mcore programs are C-program with embedded extension for special ztachip tensor
// operations.
// mcore embedded instructions begin line with '>'
// Emit instructions to mcore as a series of mcore register settings.
// 1. mcore instruction can be execution instruction. Instructs pcore array to begin
// execution
// 2. mcore instruction can be transfer instruction. It works like a hardware multi-nested for-loop
// that generates corresponding source and destination memory addresses.
//
// mcore instructions are emitted via the following registers
// - Tensor definition
// - DPREG_STRIDE[0-4] : Stride used for each hardware for-loop level 0-4
// - DPREG_STRIDE[0-4]_COUNT : Loop count for each hardware for-loop level 0-4
// - DPREG_STRIDE[0-4]_MIN : Min value for the hardware for-loop index for each loop level (0-4).
// Read access when loop index is below MIN value are padded with a constant
// Write access when loop index is below MIN value are skipped.
// - DPREG_STRIDE[0-4]_MAX : Max value for the hardware for loop index for each loop level (0-4)
// Read access when loop index is above MAX value are padded with a constant
// Write access when loop index is above MAX value are skipped.
// - DPREG_BURST_STRIDE[0-4] : Stride used for the most inner for-loop
// - DPREG_COUNT : Loop count for most inner for-loop.
// - DPREG_BURST_MIN : Min value for the most inner for-loop index.
// - DPREG_BURST_MAX : Max value for the most inner for-loop index
// - DPREG_DATA : Data constant used for padding or constant tensor transfer
// - DP_MODE : Attributes of the tensor
// - Tensor execution
// - REG_DP_RUN : Instruct PCORE array to execute a pcore program or to start a tensor transfer
// - Others
// - REG_DP_RESTORE : To retrieve a previously saved tensor variable.
//
#include <stdio.h>
#include <stdlib.h>
#include <ctype.h>
#include <string>
#include <vector>
#include <assert.h>
#include "../base/zta.h"
#include "ast.h"
#include "ident.h"
#include "instruction.h"
#include "mcore.h"
// Tokens used by mcore intepreter...
#define TOKEN_NOP "NOP"
#define TOKEN_PCORE "PCORE"
#define TOKEN_PCORES "PCORES"
#define TOKEN_SRAM "SCRATCH"
#define TOKEN_SRAMH "HSCRATCH"
#define TOKEN_SRAMS "SCRATCHS"
#define TOKEN_DDR "MEM"
#define TOKEN_DDRS "MEMS"
#define TOKEN_EXE "EXE"
#define TOKEN_LOCKSTEP_EXE "EXE_LOCKSTEP"
#define TOKEN_PRINT "PRINT"
#define TOKEN_NOTIFY "CALLBACK"
#define TOKEN_LOG_ON "LOG_ON"
#define TOKEN_LOG_OFF "LOG_OFF"
#define TOKEN_BARRIER "BARRIER"
#define TOKEN_ALL_INT "INT16"
#define TOKEN_ALL_HALF "HALF"
#define TOKEN_ALL_SHORT "INT8"
#define TOKEN_FOR "FOR"
#define TOKEN_REPEAT "REPEAT"
#define TOKEN_PAD "PAD"
#define TOKEN_LATEST "LATEST"
#define TOKEN_THREAD "THREAD"
#define TOKEN_CONCURRENT "CONCURRENT"
#define TOKEN_SPU "SPU"
#define TOKEN_PCORE_PROG "PROG"
#define TOKEN_EXPORT "EXPORT"
#define TOKEN_VAR "VAR"
#define TOKEN_DTYPE "DTYPE"
#define TOKEN_REMAP "REMAP"
// PCORE layout
#define TOKEN_PCORE_LAYOUT_N "N"
#define TOKEN_PCORE_LAYOUT_Nx2 "Nx2"
#define TOKEN_PCORE_LAYOUT_Nx4 "Nx4"
#define TOKEN_PCORE_LAYOUT_Nx8 "Nx8"
#define TOKEN_PCORE_LAYOUT_Nx16 "Nx16"
// Position for the specifier
#define SPECIFIER_PCORE_DIM 0
#define SPECIFIER_SRAM_ADDRESS 0
#define SPECIFIER_SRAM_DIM 1
#define SPECIFIER_DDR_ADDRESS 0
#define SPECIFIER_DDR_DIM 1
#define SPECIFIER_ALL_VAL 0
// Maximum of a line process by intepreter
#define MAX_LINE 8000
// Types of commands
#define CMD_EXE 0
#define CMD_NOTIFY 1
#define CMD_SYNC_NOTIFY 2
#define CMD_ASSIGN 3
#define CMD_TRANSFER 4
#define CMD_NOP 5
#define CMD_LOG_ON 6
#define CMD_LOG_OFF 7
#define CMD_PRINT 8
#define CMD_EXPORT 9
#define CMD_INCLUDE 10
#define CMD_VAR 11
#define MAX_DP_STRIDE 6
// MCORE variables
#define VAR_SOURCE 0
#define VAR_DEST 1
// Bit position for DP_MODE register
#define DP_MODE_LOAD 0
#define DP_MODE_TEMPLATEID (DP_MODE_LOAD+1)
// **** NOTE ****** DP_MODE_DATATYPE+DP_MODE_DOUBLEPRECISION <= m_dataType (least significant bit of m_dataType is double precision
// So DP_MODE_DATATYPE and DP_MODE_DOUBLEPRECISION must be in this order....
#define DP_MODE_DOUBLEPRECISION (DP_MODE_TEMPLATEID+DP_TEMPLATE_ID_WIDTH)
#define DP_MODE_DATATYPE (DP_MODE_DOUBLEPRECISION+1)
#define DP_MODE_DATA_MODEL (DP_MODE_DATATYPE+DATATYPE_WIDTH)
#define DP_MODE_SCATTER (DP_MODE_DATA_MODEL+DATAMODEL_WIDTH)
#define DP_MODE_BUSID (DP_MODE_SCATTER+1)
#define DP_MODE_REPEAT (DP_MODE_BUSID+BUSID_WIDTH)
#define DP_MODE_MCAST (DP_MODE_REPEAT+1)
static int STR_DPREG_STRIDE[MAX_DP_STRIDE] = { DPREG_STRIDE0,DPREG_STRIDE1,DPREG_STRIDE2,DPREG_STRIDE3,DPREG_STRIDE4,DPREG_BURST_STRIDE };
static int STR_DPREG_STRIDE_COUNT[MAX_DP_STRIDE] = { DPREG_STRIDE0_COUNT,DPREG_STRIDE1_COUNT,DPREG_STRIDE2_COUNT,DPREG_STRIDE3_COUNT,DPREG_STRIDE4_COUNT,DPREG_COUNT };
static int STR_DPREG_STRIDE_MAX[MAX_DP_STRIDE] = { DPREG_STRIDE0_MAX,DPREG_STRIDE1_MAX,DPREG_STRIDE2_MAX,DPREG_STRIDE3_MAX,DPREG_STRIDE4_MAX,DPREG_BURST_MAX };
static int STR_DPREG_STRIDE_MIN[MAX_DP_STRIDE] = { DPREG_STRIDE0_MIN,DPREG_STRIDE1_MIN,DPREG_STRIDE2_MIN,DPREG_STRIDE3_MIN,DPREG_STRIDE4_MIN,DPREG_BURST_MIN };
int cMcore::M_currLine = 0;
int cMcore::M_currDepth = 0;
bool cMcore::M_beginBlock = true;
cMcoreVariable cMcore::M_vars[DP_TEMPLATE_MAX];
std::vector<std::string> cMcore::M_export;
char s_ztamFifoReady[] = "";
// This class holds each element of a tensor definition
// For example
// Case 1: DDR(p,2,10,20)
// Tensor definition of a tensor 2x10x20 with 3 cMcoreSpecifier "p", "2", "10" and "20"
// Case 2: DDR(p,2,10,20+)
// Tensor definition similar to previous one but "20" specifier has a plus option
// to indicate boundary check is disabled for this dimension index
// Case 3: DDR(p,2,195(10,20))
// Tensor definition similar to previous one exception the sub-tensor 10x20 is bounded to total size=195
// This means the every tensor row has size=20 except for last row of the tensor that has size=195-((10-1)*20)=15.
cMcoreSpecifier::~cMcoreSpecifier()
{
}
cMcoreSpecifier::cMcoreSpecifier(
const char *_v, // string represents tensor definition entry. But '+' is stripped is present
const char *_v2, // For case3 above, this points to string represents that size of last row of the tensor
bool _plus // true if '+' is appended to the specifier
)
{
if (_v)
m_v = _v;
else
m_v = "";
if (_v2)
m_v2 = _v2;
else
m_v2 = "";
m_plus = _plus;
}
cMcoreSpecifier::cMcoreSpecifier(const cMcoreSpecifier &other)
{
m_v = other.m_v;
m_v2 = other.m_v2;
m_plus = other.m_plus;
}
//
// cMcoreVariable is a alias for a tensor definition
// For example
// $tensor := DDR(p,10,20)[$][0:19]
// $tensor is a variable alias represents the tensor definition on the right
// Example below shows how the variable is used
// PCORE.thread[0].var[0:2] <= $tensor[0:2];
// Line above is equivalent to (when substitue $ with [0:2] to $tensor macro above)
// PCORE.thread[0].var[0:2][0:19] <= DDR(p,10,20)[0:2][0:19];
//
cMcoreVariable::cMcoreVariable()
{
m_parmIndex = -1;
m_term = 0;
}
// Destructor for cMcoreVariable
cMcoreVariable::~cMcoreVariable()
{
if(m_term)
delete m_term;
}
// Expand the macro by substitute macro argument '$' with supplied parameter
std::string cMcoreVariable::getLine(cMcoreRange &range)
{
std::string line;
char temp[MAX_LINE];
line = m_line;
sprintf(temp, "%s:%s:%s", range.m_item[0].c_str(), range.m_item[1].c_str(), range.m_item[2].c_str());
if (m_parmIndex >= 0)
line.replace(line.find('$', 0), 1, std::string(temp));
return line;
}
void cMcoreVariable::Clear() {
m_line = "";
m_parmIndex = 0;
m_depth = 0;
m_name = "";
if(m_term)
delete m_term;
m_term=0;
}
void cMcoreVariable::Declare(char *name, int depth) {
m_name = name;
m_depth = depth;
}
// Constructor for cMcoreTerm
// This object defines the tensor definition
// Format
// [Name](Specifier)[][][].funcName.parmName[..][..][..]
// Example
// PCORE:
// PCORE(DATATYPE:vm:dy:dx)[pcore][tid].TEST.parm[:][:][range]
// SRAM(DATATYPE:ADDRESS:dz:dy:dx)[range][...][range]
// DDR(DATATYPE:ADDRESS:dz:dy:dx)[range][...][range]
// ALL(DATATYPE:val)
cMcoreTerm::cMcoreTerm()
{
m_id = cMcoreTerm::eMcoreTermTypePCORE;
m_identifier = 0;
m_maxNumThreads = NUM_THREAD_PER_CORE;
m_dataModel = 0;
m_repeat = false;
m_latest = false;
m_stream = false;
m_datatype = "";
m_pcoreDim = 0;
m_pcoreSize = 0;
m_var = -1;
m_isSource = true;
m_varIndex = -1;
}
// Destructor of cMcoreTerm
cMcoreTerm::~cMcoreTerm()
{
}
// Emit mcore instructions
void cMcoreTerm::GEN(FILE *fp, int p1, int p2, int p3, char *s)
{
fprintf(fp, "ZTAM_GREG(%d,%d,%d)=%s;", p1, p2, p3, s);
}
int cMcoreTerm::GetParmRange()
{
int numParmRange, i;
for (i = 0, numParmRange = 0; i < (int)m_parm.size(); i++)
{
if (m_parm[i].m_type == cMcoreRange::eMcoreRangeTypeRange)
numParmRange++;
}
return numParmRange;
}
int cMcoreTerm::GetNumDim(cIdentifier *id)
{
int numDim;
if (m_parmSpecifier.size() == 0)
{
numDim = id->getNumDim();
if (id->getVectorWidth() > 0)
numDim++;
}
else
{
return m_parmSpecifier.size();
}
return numDim;
}
// Get total dimension for this tensor
int cMcoreTerm::GetDim()
{
int numParmRange, dimSize;
numParmRange = GetParmRange();
dimSize = m_dim.size() + numParmRange;
if (numParmRange == 0)
dimSize++;
return dimSize;
}
std::string cMcoreTerm::GetDim(cIdentifier *id, int index)
{
int size;
char buf[128];
if (m_parmSpecifier.size() == 0)
{
if (index >= id->getNumDim())
size = (1 << id->getVectorWidth());
else
size = id->getDim(index);
sprintf(buf, "%d", size);
return std::string(buf);
}
else
{
return m_parmSpecifier[index].m_v;
}
}
std::string cMcoreTerm::GetDimSize(cIdentifier *id, int index)
{
int size;
char buf[128];
if (m_parmSpecifier.size() == 0)
{
if (index >= id->getNumDim())
size = 1;
else
{
size = (id->getDimSize(index) << id->getVectorWidth());
}
sprintf(buf, "%d", size);
return std::string(buf);
}
else
{
int i;
sprintf(buf, "(1");
for (i = index + 1; i < (int)m_parmSpecifier.size(); i++)
sprintf(&buf[strlen(buf)], "*(%s)", m_parmSpecifier[i].m_v.c_str());
sprintf(&buf[strlen(buf)], ")");
return std::string(buf);
}
}
// Get definition of the term
// If term is a reference of a previously defined variable, then return
// the definition of the variable
cMcoreTerm *cMcoreTerm::GetDef() {
if(m_id==cMcoreTerm::eMcoreTermTypeVar)
return cMcore::M_vars[m_var].m_term;
else
return this;
}
// Return if this tensor can perform scattering operation
bool cMcoreTerm::CanScatter()
{
int dimSize, index;
int from, to, i;
// Always false for now...
return false;
if (m_id != cMcoreTerm::eMcoreTermTypePCORE)
return false;
dimSize = GetDim();
from = dimSize - m_pcoreSize - 1;
to = from + m_pcoreSize - 1;
// Check if all pcore-index are just above the last index
for (i = m_pcoreDim; i <= (m_pcoreDim + m_pcoreSize - 1); i++)
{
index = getStrideRegisterIndex(i, dimSize, false) - (MAX_DP_STRIDE - dimSize);
if (index < from || index > to)
return false;
}
return true;
}
// Generate temporary variable definitions required for the code generator
int cMcoreTerm::GenDef(FILE *out)
{
int i, j;
if (m_id == cMcoreTerm::eMcoreTermTypeVar)
return 0;
for (i = 0; i < (int)m_index.size(); i++)
{
for (j = 0; j < (int)m_index[i].m_item.size(); j++)
{
if (i == 0 && j == 0)
{
fprintf(out, "int ");
}
else
fprintf(out, ",");
fprintf(out, "t%d%d=(%s)", i, j, m_index[i].m_item[j].c_str());
}
}
fprintf(out, ";");
return 0;
}
// Perform validation on the term
// Calculate dimension of memory reference
int cMcoreTerm::Validate()
{
cIdentifier *id = 0;
std::vector<std::string> range_min;
std::vector<std::string> range_max;
char temp[MAX_LINE];
int i, j;
int var;
std::string item1, item2, item3;
if (m_name.length() == 0)
{
// This is a global variable reference...
m_id = cMcoreTerm::eMcoreTermTypeGlobalRef;
}
else if (decodeVarName((char *)m_name.c_str(), &var))
{
if (!cMcore::M_vars[var].IsDefined())
error(cMcore::M_currLine, "Variable has not been defined");
m_id = cMcoreTerm::eMcoreTermTypeVar;
m_var = var;
}
else if (strcasecmp(m_name.c_str(), TOKEN_PCORE) == 0 || strcasecmp(m_name.c_str(), TOKEN_PCORES) == 0)
{
int numPCORES = cConfig::m_numPCORES;
if (m_funcName == "")
error(cMcore::M_currLine, "PCORE function parameter not specified");
if (strcasecmp(m_name.c_str(), TOKEN_PCORES) == 0)
{
// This is a fork. First dimension is fork count
numPCORES = PID_MAX;
if (m_specifier.size() < (SPECIFIER_PCORE_DIM + 1))
error(cMcore::M_currLine, "Invalid dimension");
m_forkCount = m_specifier[SPECIFIER_PCORE_DIM].m_v;
for (int ii = SPECIFIER_PCORE_DIM; ii < (int)m_specifier.size() - 1; ii++)
{
m_specifier[ii] = m_specifier[ii + 1];
}
m_specifier.resize(m_specifier.size() - 1);
}
char temp[MAX_LINE], temp2[MAX_LINE];
char *funcName, *parmName;
cInstruction *func;
strcpy(temp, m_funcName.c_str());
if (strstr(temp, "."))
{
funcName = strtok(temp, ".");
parmName = strtok(0, ".");
if (!funcName || !parmName || strtok(0, "."))
error(cMcore::M_currLine, "Invalid function parameter");
}
else
{
parmName = strstr(temp, "::");
if (!parmName)
error(cMcore::M_currLine, "Invalid function parameter");
parmName[0] = 0;
parmName += 2;
funcName = temp;
strcpy(temp2, funcName);
strcat(temp2, "::");
funcName = temp2;
}
id = cIdentifier::lookupParm(root, funcName, parmName);
if (!id)
error(cMcore::M_currLine, "Undefined function parameter");
m_identifier = id;
if (!m_identifier->isKindOf(cIdentifierShared::getCLID()))
{
char temp2[MAX_STRING_LEN];
if (m_thread.size() == 0)
{
sprintf(temp2, "%d", NUM_THREAD_PER_CORE);
m_thread.push_back(cMcoreSpecifier(temp2, 0));
}
if (m_thread.size() > 2)
error(cMcore::M_currLine, "Invalid thread block dimension. Must be 1 or 2");
}
func = cInstruction::GetFunctionBegin(funcName);
if (func)
{
m_maxNumThreads = func->m_maxNumThreads;
m_dataModel = func->m_dataModel;
}
else if (strcmp(funcName, "root") == 0)
{
m_maxNumThreads = NUM_THREAD_PER_CORE;
m_dataModel = 0;
}
else
error(cMcore::M_currLine, "Undefined function name");
// This is referencing PCORE memory space...
m_id = cMcoreTerm::eMcoreTermTypePCORE;
if (strcasecmp(m_dtype.c_str(), "INT16") == 0)
{
m_datatype = "INT16";
}
else if (strcasecmp(m_dtype.c_str(), "INT8") == 0)
{
m_datatype = "INT8";
}
else if (strcasecmp(m_dtype.c_str(), "UINT8") == 0)
{
m_datatype = "UINT8";
}
else if (m_dtype.length() > 0)
{
// This is a dynamic type
char temp[MAX_LINE];
sprintf(temp, "(%s)", m_dtype.c_str());
m_datatype = temp;
}
else
{
error(cMcore::M_currLine, "DTYPE is not defined");
}
if (m_specifier.size() <= SPECIFIER_PCORE_DIM)
{
// If dimension not specifier then set to 1 dimensional array=NUM_PCORE
char temp[MAX_LINE];
sprintf(temp, "%d", numPCORES);
m_specifier.push_back(cMcoreSpecifier(temp, ""));
}
if ((m_specifier.size() > (SPECIFIER_PCORE_DIM + 1)) && m_specifier[SPECIFIER_PCORE_DIM].m_v == "")
{
// If 2D array, if a dimension is not specifier then set it to NUM_PCORE/[the other dimension size]
char temp[MAX_LINE];
if (m_specifier.size() <= (SPECIFIER_PCORE_DIM + 1))
error(cMcore::M_currLine, "Invalid PCORE specification");
sprintf(temp, "(%d/(%s))", numPCORES, m_specifier[SPECIFIER_PCORE_DIM + 1].m_v.c_str());
m_specifier[SPECIFIER_PCORE_DIM].m_v = temp;
}
if ((m_specifier.size() > (SPECIFIER_PCORE_DIM + 1)) && m_specifier[SPECIFIER_PCORE_DIM + 1].m_v == "")
{
// If 2D array, if a dimension is not specifier then set it to NUM_PCORE/[the other dimension size]
char temp[MAX_LINE];
sprintf(temp, "(%d/(%s))", numPCORES, m_specifier[SPECIFIER_PCORE_DIM].m_v.c_str());
m_specifier[SPECIFIER_PCORE_DIM + 1].m_v = temp;
}
if (m_specifier.size() == (SPECIFIER_PCORE_DIM + 1))
{
// One dimensional PCORE
if (m_index.size() != (1 + m_thread.size()))
error(cMcore::M_currLine, "Invalid range for PCORE memory space");
m_pcoreDim = m_dim.size();
m_pcoreSize = 1;
sprintf(temp, "%d", REGISTER_SIZE*NUM_THREAD_PER_CORE);
m_dim.push_back(temp);
sprintf(temp, "%d", 0);
range_min.push_back(temp);
sprintf(temp, "(%s)-1", m_specifier[SPECIFIER_PCORE_DIM].m_v.c_str());
range_max.push_back(temp);
}
else if (m_specifier.size() == (SPECIFIER_PCORE_DIM + 2))
{
// Two dimensional PCORE
if (m_index.size() != (2 + m_thread.size()))
error(cMcore::M_currLine, "Invalid range for PCORE memory space");
m_pcoreDim = m_dim.size();
m_pcoreSize = 2;
sprintf(temp, "%d*(%s)", REGISTER_SIZE*NUM_THREAD_PER_CORE, m_specifier[SPECIFIER_PCORE_DIM + 1].m_v.c_str());
m_dim.push_back(temp);
sprintf(temp, "%d", REGISTER_SIZE*NUM_THREAD_PER_CORE);
m_dim.push_back(temp);
sprintf(temp, "%d", 0);
range_min.push_back(temp);
sprintf(temp, "%d", 0);
range_min.push_back(temp);
sprintf(temp, "(%s)-1", m_specifier[SPECIFIER_PCORE_DIM].m_v.c_str());
range_max.push_back(temp);
sprintf(temp, "(%s)-1", m_specifier[SPECIFIER_PCORE_DIM + 1].m_v.c_str());
range_max.push_back(temp);
}
else
error(cMcore::M_currLine, "Invalid PCORE memory reference");
// Build dimension for thread block....
if (!m_identifier->isKindOf(cIdentifierShared::getCLID()))
{
if (m_thread.size() <= 1)
{
// Thread block is 1 dimensional
sprintf(temp, "%d", REGISTER_SIZE);
m_dim.push_back(temp);
sprintf(temp, "%d", 0);
range_min.push_back(temp);
sprintf(temp, "%d", NUM_THREAD_PER_CORE - 1);
range_max.push_back(temp);
}
else
{
// Thread block is 2 dimensional...
sprintf(temp, "%d*%s", REGISTER_SIZE, m_thread[1].m_v.c_str());
m_dim.push_back(temp);
sprintf(temp, "%d", REGISTER_SIZE);
m_dim.push_back(temp);
sprintf(temp, "%d", 0);
range_min.push_back(temp);
sprintf(temp, "%d", 0);
range_min.push_back(temp);
sprintf(temp, "%s-1", m_thread[0].m_v.c_str());
range_max.push_back(temp);
sprintf(temp, "%s-1", m_thread[1].m_v.c_str());
range_max.push_back(temp);
}
}
}
else if (strcasecmp(m_name.c_str(), TOKEN_ALL_INT) == 0)
{
// Constants
m_id = cMcoreTerm::eMcoreTermTypeALLInt;
m_datatype = "INT16";
if (m_specifier.size() != 1)
error(cMcore::M_currLine, "Invalid ALL syntax");
if (m_concurrent.size() > 0)
error(cMcore::M_currLine, "SCATTER is only for PCORE");
}
else if (strcasecmp(m_name.c_str(), TOKEN_ALL_SHORT) == 0)
{
// Constants
m_id = cMcoreTerm::eMcoreTermTypeALLInt;
m_datatype = "INT8";
if (m_specifier.size() != 1)
error(cMcore::M_currLine, "Invalid ALL syntax");
if (m_concurrent.size() > 0)
error(cMcore::M_currLine, "SCATTER is only for PCORE");
}
else if (strcasecmp(m_name.c_str(), TOKEN_SPU) == 0)
{
// Program SPU unit
m_id = cMcoreTerm::eMcoreTermTypeSPU;
m_datatype = "INT16";
if (m_specifier.size() == 0)
m_spuCount = SPU_NUM_STREAM;
else
m_spuCount = atoi(m_specifier[0].m_v.c_str());
}
else if (strcasecmp(m_name.c_str(), TOKEN_PCORE_PROG) == 0)
{
// Program SPU unit
m_id = cMcoreTerm::eMcoreTermTypePcoreProg;
m_datatype = "INT16";
if (m_specifier.size() != 1)
error(cMcore::M_currLine, "Invalid PROG specification");
}
else if (strcasecmp(m_name.c_str(), TOKEN_SRAM) == 0 || strcasecmp(m_name.c_str(), TOKEN_SRAMS) == 0)
{
// Referenced SRAM
m_id = cMcoreTerm::eMcoreTermTypeSRAM;
if (m_concurrent.size() > 0)
error(cMcore::M_currLine, "SCATTER is only for PCORE");
if(m_remap.size() > 0)
error(cMcore::M_currLine, "REMAP is only for PCORE");
if (strcasecmp(m_name.c_str(), TOKEN_SRAMS) == 0)
{
// This is a fork. First dimension is fork count
if (m_specifier.size() < (SPECIFIER_SRAM_DIM + 1))
error(cMcore::M_currLine, "Invalid dimension");
m_forkCount = m_specifier[SPECIFIER_SRAM_DIM].m_v;
for (int ii = SPECIFIER_SRAM_DIM; ii < (int)m_specifier.size() - 1; ii++)
{
m_specifier[ii] = m_specifier[ii + 1];
}
m_specifier.resize(m_specifier.size() - 1);
}
if (strcasecmp(m_dtype.c_str(), "INT16") == 0)
{
m_datatype = "INT16";
}
else if (strcasecmp(m_dtype.c_str(), "INT8") == 0)
{
m_datatype = "INT8";
}
else if (strcasecmp(m_dtype.c_str(), "UINT8") == 0)
{
m_datatype = "UINT8";
}
else if (m_dtype.length() > 0)
{
char temp[MAX_LINE];
sprintf(temp, "(%s)", m_dtype.c_str());
m_datatype = temp;
}
else
{
m_datatype = "INT16";
}
if (m_specifier.size() < 1)
error(cMcore::M_currLine, "Invalid SRAM memory reference");
if (m_specifier.size() <= SPECIFIER_SRAM_DIM)
{
// If dimension not specifier then set to 1 dimension array=[SRAM SIZE]
char temp[MAX_LINE];
sprintf(temp, "%d", SRAM_SIZE);
m_specifier.push_back(cMcoreSpecifier(temp));
}
for (i = SPECIFIER_SRAM_DIM; i < (int)m_specifier.size(); i++)
{
char temp[MAX_LINE];
strcpy(temp, "1");
for (j = i + 1; j < (int)m_specifier.size(); j++)
sprintf(&temp[strlen(temp)], "*(%s)", m_specifier[j].m_v.c_str());
m_dim.push_back(temp);
}
if (m_dim.size() != m_index.size())
error(cMcore::M_currLine, "Invalid SRAM reference");
for (i = 0; i < (int)m_index.size(); i++)
{
char temp[MAX_LINE];
sprintf(temp, "%d", 0);
range_min.push_back(temp);
sprintf(temp, "((%s)-1)", m_specifier[i + SPECIFIER_SRAM_DIM].m_v.c_str());
range_max.push_back(temp);
}
}
else if (strcasecmp(m_name.c_str(), TOKEN_DDR) == 0 || strcasecmp(m_name.c_str(), TOKEN_DDRS) == 0)
{
// Referenced DDR
m_id = cMcoreTerm::eMcoreTermTypeDDR;
if(m_remap.size() > 0)
error(cMcore::M_currLine, "REMAP is only for PCORE");
if (strcasecmp(m_name.c_str(), TOKEN_DDRS) == 0)
{
// This is a fork. First dimension is fork count
if (m_specifier.size() < (SPECIFIER_DDR_DIM + 1))
error(cMcore::M_currLine, "Invalid dimension");
m_forkCount = m_specifier[SPECIFIER_DDR_DIM].m_v;
for (int ii = SPECIFIER_DDR_DIM; ii < (int)m_specifier.size() - 1; ii++)
{
m_specifier[ii] = m_specifier[ii + 1];
}
m_specifier.resize(m_specifier.size() - 1);
}
if (m_concurrent.size() > 0)
error(cMcore::M_currLine, "SCATTER is only for PCORE");
if (strcasecmp(m_dtype.c_str(), "INT16") == 0)
{
m_datatype = "INT16";
}
else if (strcasecmp(m_dtype.c_str(), "INT8") == 0)
{
m_datatype = "INT8";
}
else if (strcasecmp(m_dtype.c_str(), "UINT8") == 0)
{
m_datatype = "UINT8";
}
else if (m_dtype.length() > 0)
{
char temp[MAX_LINE];
sprintf(temp, "(%s)", m_dtype.c_str());
m_datatype = temp;
}
else
{
error(cMcore::M_currLine, "DTYPE is not defined");
}
if (m_specifier.size() < 1)
error(cMcore::M_currLine, "Invalid DDR memory reference");
if (m_specifier.size() <= SPECIFIER_DDR_DIM)
{
// If dimension not specifier then set to 1D array size=[MAX DDR SIZE]
char temp[MAX_LINE];
sprintf(temp, "%d", MAX_DP_ADDR_SIZE);
m_specifier.push_back(cMcoreSpecifier(temp));
}
for (i = SPECIFIER_DDR_DIM; i < (int)m_specifier.size(); i++)
{
char temp[MAX_LINE];
strcpy(temp, "1");
if (m_specifier[m_specifier.size() - 1].m_v2.length()>0 && m_specifier.size() >= (2 + SPECIFIER_DDR_DIM))
{
if ((i + 1) <= ((int)m_specifier.size() - 2))
{
for (j = i + 1; j < (int)m_specifier.size() - 2; j++)
sprintf(&temp[strlen(temp)], "*(%s)", m_specifier[j].m_v.c_str());
sprintf(&temp[strlen(temp)], "*(((%s)-1)*(%s)+(%s))",
m_specifier[(int)m_specifier.size() - 2].m_v.c_str(),
m_specifier[(int)m_specifier.size() - 1].m_v.c_str(),
m_specifier[(int)m_specifier.size() - 1].m_v2.c_str());
}
else if ((i + 1) == ((int)m_specifier.size() - 1))
{
sprintf(&temp[strlen(temp)], "*((%s))",
m_specifier[(int)m_specifier.size() - 1].m_v.c_str());
}
}
else
{
for (j = i + 1; j < (int)m_specifier.size(); j++)
sprintf(&temp[strlen(temp)], "*(%s)", m_specifier[j].m_v.c_str());
}
m_dim.push_back(temp);
}
if (m_dim.size() != m_index.size())
error(cMcore::M_currLine, "Invalid DDR memory reference");
for (i = 0; i < (int)m_index.size(); i++)
{
sprintf(temp, "%d", 0);
range_min.push_back(temp);
sprintf(temp, "((%s)-1)", m_specifier[i + SPECIFIER_DDR_DIM].m_v.c_str());
range_max.push_back(temp);
}
}
else
error(cMcore::M_currLine, "Unrecognized memory space");
for (i = 0; i < (int)m_index.size(); i++)
{
m_index[i].validate((char *)range_min[i].c_str(), (char *)range_max[i].c_str());
}
// Check parameter list. This is only applied to PCORE memory reference
if (m_parm.size() > 0)
{
// Validate parameter field
int count = 0;
if (m_id != cMcoreTerm::eMcoreTermTypePCORE)
error(cMcore::M_currLine, "Parameter is allowed for PCORE");
for (i = 0; i < (int)m_parm.size(); i++)
{
if (m_parm[i].m_item.size() > 1)
count++;
}
if ((int)m_parm.size() != GetNumDim(id))
error(cMcore::M_currLine, "Invalid parameter reference");
for (i = 0; i < (int)m_parm.size(); i++)
{
char temp[MAX_LINE];
sprintf(temp, "(%s)-1", GetDim(id, i).c_str());
m_parm[i].validate("0", temp);
}
}
// Locate mcore variable parameter....
for (i = 0; i < (int)m_index.size(); i++)
{
if (m_index[i].m_isParm)
{
if (m_varIndex >= 0)
error(cMcore::M_currLine, "Invalid MCORE variable."); // Only 1 mcore variable is allowed
m_varIndex = i;
}
}
for (i = 0; i < (int)m_parm.size(); i++)
{
if (m_parm[i].m_isParm)
error(cMcore::M_currLine, "Invalid MCORE variable."); // Parameter not allowed in variable section
}
return 0;
}
// mcore functions like a hardware nested-for loop
// Find which of the hardware loop counter to use
//
int cMcoreTerm::getStrideRegisterIndex(int index, int dimSize, bool concurrent)
{
int _index;
int i;
int count;
int numParmRange;
int parmRangeFor[MAX_DP_STRIDE];
_index = index;
for (i = 0, numParmRange = 0; i < (int)m_parm.size(); i++)
{
if (m_parm[i].m_type == cMcoreRange::eMcoreRangeTypeRange)
{
parmRangeFor[numParmRange++] = m_parm[i].m_forIndex;
assert(numParmRange <= MAX_DP_STRIDE);
}
}
if (index < (int)m_index.size() && m_index[index].m_forIndex >= 0)
index = m_index[index].m_forIndex;
else if (index >= (int)m_index.size() && numParmRange > 0 && parmRangeFor[index - m_index.size()] >= 0)
index = parmRangeFor[index - m_index.size()];
else
{
count = 0;
for (i = 0; i < index; i++)
{
if (i < (int)m_index.size() && m_index[i].m_forIndex < 0)
count++;
else if (i >= (int)m_index.size() && numParmRange == 0)
count++;
else if (i >= (int)m_index.size() && parmRangeFor[i - m_index.size()] < 0)
count++;
}
index = m_forRange.size() + count;
}
assert(dimSize <= MAX_DP_STRIDE);
if (concurrent)
{
if (m_pcoreSize > 0 && _index >= m_pcoreDim && _index <= (m_pcoreDim + m_pcoreSize - 1))
{
// This index is for PCORE
index = (_index - m_pcoreDim) + dimSize - m_pcoreSize - 1;
}
else if (index < (dimSize - 1))
{
// This index is not PCORE
int index2;
index2 = getStrideRegisterIndex(_index, dimSize, false);
for (i = m_pcoreDim; i <= (m_pcoreDim + m_pcoreSize - 1); i++)
{
if (getStrideRegisterIndex(i, dimSize, false) < index2)
index--;
}
}
}
index += (MAX_DP_STRIDE - dimSize);
assert(index < MAX_DP_STRIDE);
return index;
}
// Push tensor variable/alias definitions to mcore
// mcore can hold up to 8 different mcore variables for each process.
// Each mcore process has its own tensor variable definition.
// This will speed up reference to this alias in subsequent tensor transfer operations
//
int cMcoreTerm::GenVariableTensor(FILE *out, int _parm, cMcoreRange *_parmRange)
{
char temp[MAX_LINE];
// This is a dynamic variable. Restore register values that are saved earlier.
assert(m_var >= 0);
assert(_parm < 0);
sprintf(temp, "(%d)", m_var);
GEN(out, 0, REG_DP_RESTORE, 0, temp);
// Override with variable parameter...
if (m_varParameter.size() > 0)
{
cMcoreTerm term;
std::string line;
line = cMcore::M_vars[m_var].getLine(m_varParameter[0]);
cMcore::scan_term((char *)line.c_str(), &term);
term.Validate();
term.m_isSource = m_isSource;
fprintf(out, "{");
term.GenDef(out);
term.Gen(out, cMcore::M_vars[m_var].getParmIndex(), &m_varParameter[0]);
fprintf(out, "}");
}
if (m_isSource)
sprintf(temp, "(DP_TEMPLATE_ID_SRC<<%d)", DP_MODE_TEMPLATEID);
else
sprintf(temp, "(DP_TEMPLATE_ID_DEST<<%d)", DP_MODE_TEMPLATEID);
GEN(out, DPREG_MODE, REG_DP_TEMPLATE, 0, temp);
return 0;
}