{"payload":{"header_redesign_enabled":false,"results":[{"id":"84592554","archived":false,"color":"#adb2cb","followers":75,"has_funding_file":true,"hl_name":"jotego/jt51","hl_trunc_description":"YM2151 clone in verilog. FPGA proven.","language":"VHDL","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":84592554,"name":"jt51","owner_id":1863036,"owner_login":"jotego","updated_at":"2024-06-24T05:12:20.468Z","has_issues":true}},"sponsorable":true,"topics":[],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":67,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Ajotego%252Fjt51%2B%2Blanguage%253AVHDL","metadata":null,"csrf_tokens":{"/jotego/jt51/star":{"post":"YL7-Av9rwhI7JPPSrW91Q9409XvrCitEYbdBX1E8KKXzIftPNDiVmmBXUnYisR5q4w0IWVlZ2yUcprvOD_SILQ"},"/jotego/jt51/unstar":{"post":"xs_h-4g1heW5ExSjr4t_2BKRci3kcKkEGS7uyQZayKT_7seE2qowW_8ISothlI4Kq5icEoDOryLycghjw-0_KA"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"IV10rYiBI606v6qawuB1Xu68DlIG6QKyzDX3JsVFjMccNtfzXFz9CA2Reqc3tmV7qoviJ2RqT_ghTz4BmkdHmg"}}},"title":"Repository search results"}