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[Media Common] [VP][MCPY]Remove AUX MMIO and refactor CreateGpuConent…
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… for VE copy from Xe2.

Remove AUX MMIO and refactor CreateGpuConent for VE copy from Xe2.
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fenhu authored and intel-mediadev committed Sep 18, 2024
1 parent cef9a33 commit b19e20e
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Showing 8 changed files with 90 additions and 210 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -3061,79 +3061,6 @@ class Impl : public vebox::Impl<mhw::vebox::xe2_lpm_base_next::Cmd>
return eStatus;
}

//!
//! \brief Create Gpu Context for Vebox
//! \details Create Gpu Context for Vebox
//! \param [in] pOsInterface
//! OS interface
//! \param [in] VeboxGpuContext
//! Vebox Gpu Context
//! \param [in] VeboxGpuNode
//! Vebox Gpu Node
//! \return MOS_STATUS
//! MOS_STATUS_SUCCESS if success, else fail reason
//!
MOS_STATUS CreateGpuContext(
PMOS_INTERFACE pOsInterface,
MOS_GPU_CONTEXT VeboxGpuContext,
MOS_GPU_NODE VeboxGpuNode)
{
MEDIA_FEATURE_TABLE *skuTable;
MOS_STATUS eStatus = MOS_STATUS_SUCCESS;

MHW_CHK_NULL_RETURN(pOsInterface);

skuTable = pOsInterface->pfnGetSkuTable(pOsInterface);
MHW_CHK_NULL_RETURN(skuTable);

#if (_DEBUG || _RELEASE_INTERNAL)
if (MEDIA_IS_SKU(skuTable, FtrContextBasedScheduling) && pOsInterface->bVeboxScalabilityMode)
{
pOsInterface->ctxBasedScheduling = true;
}
#endif

if (!MOS_VE_CTXBASEDSCHEDULING_SUPPORTED(pOsInterface))
{
MOS_GPUCTX_CREATOPTIONS createOption;

// Create VEBOX/VEBOX2 Context
MHW_CHK_STATUS_RETURN(pOsInterface->pfnCreateGpuContext(
pOsInterface,
VeboxGpuContext,
VeboxGpuNode,
&createOption));
}
else
{
MOS_GPUCTX_CREATOPTIONS_ENHANCED createOptionenhanced;

MEDIA_ENGINE_INFO mediaSysInfo = {};

MOS_STATUS eStatus = pOsInterface->pfnGetMediaEngineInfo(pOsInterface, mediaSysInfo);
MHW_CHK_STATUS_RETURN(eStatus);

if (pOsInterface->ctxBasedScheduling)
{
createOptionenhanced.LRCACount = mediaSysInfo.VEBoxInfo.NumberOfVEBoxEnabled;
}
else
{
createOptionenhanced.LRCACount = 1;
createOptionenhanced.UsingSFC = true;
}

// Create VEBOX/VEBOX2 Context
MHW_CHK_STATUS_RETURN(pOsInterface->pfnCreateGpuContext(
pOsInterface,
VeboxGpuContext,
VeboxGpuNode,
&createOptionenhanced));
}

return eStatus;
}

#if (_DEBUG || _RELEASE_INTERNAL)
MOS_STATUS ValidateVeboxScalabilityConfig()
{
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Original file line number Diff line number Diff line change
Expand Up @@ -3130,59 +3130,6 @@ MOS_STATUS DumpDNDIStates(uint8_t *pDndiSate)
return eStatus;
}

//!
//! \brief Create Gpu Context for Vebox
//! \details Create Gpu Context for Vebox
//! \param [in] pOsInterface
//! OS interface
//! \param [in] VeboxGpuContext
//! Vebox Gpu Context
//! \param [in] VeboxGpuNode
//! Vebox Gpu Node
//! \return MOS_STATUS
//! MOS_STATUS_SUCCESS if success, else fail reason
//!
MOS_STATUS CreateGpuContext(
PMOS_INTERFACE pOsInterface,
MOS_GPU_CONTEXT VeboxGpuContext,
MOS_GPU_NODE VeboxGpuNode)
{
MOS_STATUS eStatus = MOS_STATUS_SUCCESS;

MHW_CHK_NULL_RETURN(pOsInterface);

Mos_SetVirtualEngineSupported(pOsInterface, true);
pOsInterface->pfnVirtualEngineSupported(pOsInterface, true, true);

if (!MOS_VE_CTXBASEDSCHEDULING_SUPPORTED(pOsInterface))
{
MOS_GPUCTX_CREATOPTIONS createOption;

// Create VEBOX/VEBOX2 Context
MHW_CHK_STATUS_RETURN(pOsInterface->pfnCreateGpuContext(
pOsInterface,
VeboxGpuContext,
VeboxGpuNode,
&createOption));
}
else
{
MOS_GPUCTX_CREATOPTIONS_ENHANCED createOptionenhanced;

createOptionenhanced.LRCACount = 1;
createOptionenhanced.UsingSFC = true;

// Create VEBOX/VEBOX2 Context
MHW_CHK_STATUS_RETURN(pOsInterface->pfnCreateGpuContext(
pOsInterface,
VeboxGpuContext,
VeboxGpuNode,
&createOptionenhanced));
}

return eStatus;
}

#if (_DEBUG || _RELEASE_INTERNAL)
MOS_STATUS ValidateVeboxScalabilityConfig()
{
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Original file line number Diff line number Diff line change
Expand Up @@ -1062,6 +1062,35 @@ class Impl : public mi::Impl<Cmd>

return eStatus;
}

MOS_STATUS AddVeboxMMIOPrologCmd(
PMOS_COMMAND_BUFFER cmdBuffer)
{
MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
uint64_t auxTableBaseAddr = 0;

MHW_CHK_NULL_RETURN(cmdBuffer);
MHW_CHK_NULL_RETURN(this->m_osItf);

auxTableBaseAddr = this->m_osItf->pfnGetAuxTableBaseAddr(this->m_osItf);

if (auxTableBaseAddr)
{
auto &par = MHW_GETPAR_F(MI_LOAD_REGISTER_IMM)();
par = {};
par.dwData = (auxTableBaseAddr & 0xffffffff);
par.dwRegister = GetMmioInterfaces(mhw::mi::MHW_MMIO_VE0_AUX_TABLE_BASE_LOW);
MHW_ADDCMD_F(MI_LOAD_REGISTER_IMM)
(cmdBuffer);

par.dwData = ((auxTableBaseAddr >> 32) & 0xffffffff);
par.dwRegister = GetMmioInterfaces(mhw::mi::MHW_MMIO_VE0_AUX_TABLE_BASE_HIGH);
MHW_ADDCMD_F(MI_LOAD_REGISTER_IMM)
(cmdBuffer);
}

return eStatus;
}
MEDIA_CLASS_DEFINE_END(mhw__mi__xe_lpm_plus_base_next__Impl)
};

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Original file line number Diff line number Diff line change
Expand Up @@ -3223,59 +3223,6 @@ MOS_STATUS DumpDNDIStates(uint8_t *pDndiSate)
return eStatus;
}

//!
//! \brief Create Gpu Context for Vebox
//! \details Create Gpu Context for Vebox
//! \param [in] pOsInterface
//! OS interface
//! \param [in] VeboxGpuContext
//! Vebox Gpu Context
//! \param [in] VeboxGpuNode
//! Vebox Gpu Node
//! \return MOS_STATUS
//! MOS_STATUS_SUCCESS if success, else fail reason
//!
MOS_STATUS CreateGpuContext(
PMOS_INTERFACE pOsInterface,
MOS_GPU_CONTEXT VeboxGpuContext,
MOS_GPU_NODE VeboxGpuNode) override
{
MOS_STATUS eStatus = MOS_STATUS_SUCCESS;

MHW_CHK_NULL_RETURN(pOsInterface);

Mos_SetVirtualEngineSupported(pOsInterface, true);
pOsInterface->pfnVirtualEngineSupported(pOsInterface, true, true);

if (!MOS_VE_CTXBASEDSCHEDULING_SUPPORTED(pOsInterface))
{
MOS_GPUCTX_CREATOPTIONS createOption;

// Create VEBOX/VEBOX2 Context
MHW_CHK_STATUS_RETURN(pOsInterface->pfnCreateGpuContext(
pOsInterface,
VeboxGpuContext,
VeboxGpuNode,
&createOption));
}
else
{
MOS_GPUCTX_CREATOPTIONS_ENHANCED createOptionenhanced;

createOptionenhanced.LRCACount = 1;
createOptionenhanced.UsingSFC = true;

// Create VEBOX/VEBOX2 Context
MHW_CHK_STATUS_RETURN(pOsInterface->pfnCreateGpuContext(
pOsInterface,
VeboxGpuContext,
VeboxGpuNode,
&createOptionenhanced));
}

return eStatus;
}

#if (_DEBUG || _RELEASE_INTERNAL)
MOS_STATUS ValidateVeboxScalabilityConfig()
{
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Original file line number Diff line number Diff line change
Expand Up @@ -42,14 +42,6 @@ class VeboxCopyStateXe_Lpm_Plus_Base: virtual public VeboxCopyStateNext
VeboxCopyStateXe_Lpm_Plus_Base(PMOS_INTERFACE osInterface, MhwInterfacesNext* mhwInterfaces);

virtual ~VeboxCopyStateXe_Lpm_Plus_Base();
//!
//! \brief Vebox Copy State initialize
//! \details Initialize the Vebox Copy State, create Vebox Copy State context.
//! \return MOS_STATUS
//! Return MOS_STATUS_SUCCESS if successful, otherwise failed
//!

protected:

MEDIA_CLASS_DEFINE_END(VeboxCopyStateXe_Lpm_Plus_Base)
};
Expand Down
23 changes: 1 addition & 22 deletions media_softlet/agnostic/common/hw/mhw_mi_impl.h
Original file line number Diff line number Diff line change
Expand Up @@ -283,28 +283,7 @@ class Impl : public Itf, public mhw::Impl
MOS_STATUS AddVeboxMMIOPrologCmd(
PMOS_COMMAND_BUFFER cmdBuffer) override
{
MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
uint64_t auxTableBaseAddr = 0;

MHW_CHK_NULL_RETURN(cmdBuffer);
MHW_CHK_NULL_RETURN(this->m_osItf);

auxTableBaseAddr = this->m_osItf->pfnGetAuxTableBaseAddr(this->m_osItf);

if (auxTableBaseAddr)
{
auto &par = MHW_GETPAR_F(MI_LOAD_REGISTER_IMM)();
par = {};
par.dwData = (auxTableBaseAddr & 0xffffffff);
par.dwRegister = GetMmioInterfaces(mhw::mi::MHW_MMIO_VE0_AUX_TABLE_BASE_LOW);
MHW_ADDCMD_F(MI_LOAD_REGISTER_IMM)(cmdBuffer);

par.dwData = ((auxTableBaseAddr >> 32) & 0xffffffff);
par.dwRegister = GetMmioInterfaces(mhw::mi::MHW_MMIO_VE0_AUX_TABLE_BASE_HIGH);
MHW_ADDCMD_F(MI_LOAD_REGISTER_IMM)(cmdBuffer);
}

return eStatus;
return MOS_STATUS_SUCCESS;
}

virtual MOS_STATUS AddBLTMMIOPrologCmd(
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -132,7 +132,7 @@ MOS_STATUS VeboxCopyStateNext::CopyMainSurface(PMOS_RESOURCE src, PMOS_RESOURCE
VeboxGpuNode = (MOS_GPU_NODE)(GpuNodeLimit.dwGpuNodeToUse);
VeboxGpuContext = (VeboxGpuNode == MOS_GPU_NODE_VE) ? MOS_GPU_CONTEXT_VEBOX : MOS_GPU_CONTEXT_VEBOX2;
// Create VEBOX/VEBOX2 Context
VEBOX_COPY_CHK_STATUS_RETURN(m_veboxItf->CreateGpuContext(
VEBOX_COPY_CHK_STATUS_RETURN(CreateGpuContext(
m_osInterface,
VeboxGpuContext,
VeboxGpuNode));
Expand Down Expand Up @@ -585,4 +585,40 @@ void VeboxCopyStateNext::AdjustSurfaceFormat(MOS_SURFACE &surface)
{
surface.Format = Format_P8;
}
}

MOS_STATUS VeboxCopyStateNext::CreateGpuContext(
PMOS_INTERFACE pOsInterface,
MOS_GPU_CONTEXT VeboxGpuContext,
MOS_GPU_NODE VeboxGpuNode)
{
MOS_STATUS eStatus = MOS_STATUS_SUCCESS;

MHW_CHK_NULL_RETURN(pOsInterface);

if (!MOS_VE_CTXBASEDSCHEDULING_SUPPORTED(pOsInterface))
{
MOS_GPUCTX_CREATOPTIONS createOption;
// Create VEBOX/VEBOX2 Context
MHW_CHK_STATUS_RETURN(pOsInterface->pfnCreateGpuContext(
pOsInterface,
VeboxGpuContext,
VeboxGpuNode,
&createOption));
}
else
{
MOS_GPUCTX_CREATOPTIONS_ENHANCED createOptionenhanced;
// vebox copy always uses 1 vebox to copy each frame.
createOptionenhanced.LRCACount = 1;

// Create virtual engine context for vebox
MHW_CHK_STATUS_RETURN(pOsInterface->pfnCreateGpuContext(
pOsInterface,
VeboxGpuContext,
VeboxGpuNode,
&createOptionenhanced));
}

return eStatus;
}
Original file line number Diff line number Diff line change
Expand Up @@ -140,8 +140,31 @@ class VeboxCopyStateNext
//!
virtual bool IsVeCopySupportedFormat(MOS_FORMAT format);

//!
//! \brief change vebox surface format.
//! \details change vebox surface format
//! \param [in] surface
//! mos surface
//! \return void
virtual void AdjustSurfaceFormat(MOS_SURFACE &surface);

//!
//! \brief Create Gpu Context for Vebox
//! \details Create Gpu Context for Vebox
//! \param [in] pOsInterface
//! OS interface
//! \param [in] VeboxGpuContext
//! Vebox Gpu Context
//! \param [in] VeboxGpuNode
//! Vebox Gpu Node
//! \return MOS_STATUS
//! MOS_STATUS_SUCCESS if success, else fail reason
//!
virtual MOS_STATUS CreateGpuContext(
PMOS_INTERFACE pOsInterface,
MOS_GPU_CONTEXT VeboxGpuContext,
MOS_GPU_NODE VeboxGpuNode);

protected:
PMOS_INTERFACE m_osInterface = nullptr;
MhwInterfacesNext *m_mhwInterfaces = nullptr;
Expand Down

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