@@ -2196,6 +2196,60 @@ bool RISCVTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
21962196 return SetRVVLoadStoreInfo(/*PtrOp*/ I.arg_size() - 5,
21972197 /*IsStore*/ true,
21982198 /*IsUnitStrided*/ false);
2199+ case Intrinsic::riscv_sf_vlte8:
2200+ case Intrinsic::riscv_sf_vlte16:
2201+ case Intrinsic::riscv_sf_vlte32:
2202+ case Intrinsic::riscv_sf_vlte64:
2203+ Info.opc = ISD::INTRINSIC_VOID;
2204+ Info.ptrVal = I.getArgOperand(1);
2205+ switch (Intrinsic) {
2206+ case Intrinsic::riscv_sf_vlte8:
2207+ Info.memVT = MVT::i8;
2208+ Info.align = Align(1);
2209+ break;
2210+ case Intrinsic::riscv_sf_vlte16:
2211+ Info.memVT = MVT::i16;
2212+ Info.align = Align(2);
2213+ break;
2214+ case Intrinsic::riscv_sf_vlte32:
2215+ Info.memVT = MVT::i32;
2216+ Info.align = Align(4);
2217+ break;
2218+ case Intrinsic::riscv_sf_vlte64:
2219+ Info.memVT = MVT::i64;
2220+ Info.align = Align(8);
2221+ break;
2222+ }
2223+ Info.size = MemoryLocation::UnknownSize;
2224+ Info.flags |= MachineMemOperand::MOLoad;
2225+ return true;
2226+ case Intrinsic::riscv_sf_vste8:
2227+ case Intrinsic::riscv_sf_vste16:
2228+ case Intrinsic::riscv_sf_vste32:
2229+ case Intrinsic::riscv_sf_vste64:
2230+ Info.opc = ISD::INTRINSIC_VOID;
2231+ Info.ptrVal = I.getArgOperand(1);
2232+ switch (Intrinsic) {
2233+ case Intrinsic::riscv_sf_vste8:
2234+ Info.memVT = MVT::i8;
2235+ Info.align = Align(1);
2236+ break;
2237+ case Intrinsic::riscv_sf_vste16:
2238+ Info.memVT = MVT::i16;
2239+ Info.align = Align(2);
2240+ break;
2241+ case Intrinsic::riscv_sf_vste32:
2242+ Info.memVT = MVT::i32;
2243+ Info.align = Align(4);
2244+ break;
2245+ case Intrinsic::riscv_sf_vste64:
2246+ Info.memVT = MVT::i64;
2247+ Info.align = Align(8);
2248+ break;
2249+ }
2250+ Info.size = MemoryLocation::UnknownSize;
2251+ Info.flags |= MachineMemOperand::MOStore;
2252+ return true;
21992253 }
22002254}
22012255
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