diff --git a/docs/Settings.md b/docs/Settings.md
index 7c6bf6ed565..07c2773df1b 100644
--- a/docs/Settings.md
+++ b/docs/Settings.md
@@ -2140,7 +2140,7 @@ Gyro processing anti-aliasing filter cutoff frequency. In normal operation this
 
 ### gyro_data_ready
 
-Read the gyro when it signals a new sample, on its data-ready interrupt, instead of polling it: every sample once, and the CPU no longer waits on the bus. Needs a supported IMU (ICM-42605, ICM-42688-P) and a target that declares the interrupt pin. AUTO and ON do it, OFF polls the gyro.
+Read the gyro when it signals a new sample, on its data-ready interrupt, instead of polling it: every sample once, and the CPU no longer waits on the bus. Needs a supported IMU (ICM-42605, ICM-42688-P) and a target that declares the interrupt pin; without interrupts the gyro is read as before. AUTO and ON do it, OFF polls the gyro.
 
 | Allowed Values |  |
 | --- | --- |
diff --git a/src/main/drivers/accgyro/accgyro.h b/src/main/drivers/accgyro/accgyro.h
index 310696517f0..7bf8ac1eb01 100644
--- a/src/main/drivers/accgyro/accgyro.h
+++ b/src/main/drivers/accgyro/accgyro.h
@@ -42,7 +42,7 @@ typedef struct {
 // Whether a driver that can reads its gyro on the data-ready interrupt (gyro_data_ready)
 typedef enum {
     GYRO_DEV_DATA_READY_OFF = 0,
-    GYRO_DEV_DATA_READY_WHERE_TESTED,   // only where that driver has been tested
+    GYRO_DEV_DATA_READY_WHERE_TESTED,   // where the driver turns it on for AUTO
     GYRO_DEV_DATA_READY_ON,
 } gyroDevDataReady_e;
 
diff --git a/src/main/drivers/accgyro/accgyro_data_ready.c b/src/main/drivers/accgyro/accgyro_data_ready.c
index 4b46ca9cd6b..4b898c26895 100644
--- a/src/main/drivers/accgyro/accgyro_data_ready.c
+++ b/src/main/drivers/accgyro/accgyro_data_ready.c
@@ -216,7 +216,11 @@ void gyroDataReadyStart(gyroDev_t *gyro)
 
     IOInit(dev->irqPin, OWNER_MPU, RESOURCE_EXTI, RESOURCE_INDEX(gyro->imuSensorToUse));
     EXTIHandlerInit(&d->exti, gyroDataReadyExti);
-    EXTIConfig(dev->irqPin, &d->exti, NVIC_PRIO_GYRO_DATA_READY, IOCFG_IN_FLOATING);
+#if defined(STM32F7) || defined(STM32H7)
+    EXTIConfig(dev->irqPin, &d->exti, NVIC_PRIO_GYRO_DATA_READY, IOCFG_IN_FLOATING);   // always on the rising edge
+#else
+    EXTIConfig(dev->irqPin, &d->exti, NVIC_PRIO_GYRO_DATA_READY, EXTI_Trigger_Rising);
+#endif
     EXTIEnable(dev->irqPin, true);
 
     gyro->dataReadyState = d;
diff --git a/src/main/drivers/accgyro/accgyro_icm42605.c b/src/main/drivers/accgyro/accgyro_icm42605.c
index 1c657aa8b87..4b70849c3a1 100644
--- a/src/main/drivers/accgyro/accgyro_icm42605.c
+++ b/src/main/drivers/accgyro/accgyro_icm42605.c
@@ -183,9 +183,7 @@ static const gyroDataReadyDriver_t icm426xxDataReady = {
     .hasTemp = true,
     .parse = icm426xxDataReadyParse,
     .registerRead = icm42605GyroRead,
-#if defined(STM32H7)
     .tested = true,
-#endif
 };
 #endif
 
diff --git a/src/main/drivers/adc.h b/src/main/drivers/adc.h
index 1749c9fa63e..6955bbb987b 100644
--- a/src/main/drivers/adc.h
+++ b/src/main/drivers/adc.h
@@ -45,6 +45,12 @@ typedef struct drv_adc_config_s {
 
 void adcInit(drv_adc_config_t *init);
 uint16_t adcGetChannel(uint8_t channel);
+#if defined(STM32F4) || defined(STM32F7)
+struct dmaChannelDescriptor_s;
+// ADC1 can use DMA2 stream 0 or stream 4. If it has `stream` and the other one is free, it moves
+// there, for a user that can have only `stream`. For users that take their streams after everyone else
+bool adcDmaMoveOff(struct dmaChannelDescriptor_s *stream);
+#endif
 bool adcIsFunctionAssigned(uint8_t function);
 int adcGetFunctionChannelAllocation(uint8_t function);
 
diff --git a/src/main/drivers/adc_stm32f4xx.c b/src/main/drivers/adc_stm32f4xx.c
index 42f9583ed8c..f9ef7eb15cc 100644
--- a/src/main/drivers/adc_stm32f4xx.c
+++ b/src/main/drivers/adc_stm32f4xx.c
@@ -153,6 +153,32 @@ static void adcInstanceInit(ADCDevice adcDevice)
     ADC_SoftwareStartConv(adc->ADCx);
 }
 
+bool adcDmaMoveOff(DMA_t stream)
+{
+    adcDevice_t *adc = &adcHardware[ADCDEV_1];
+    if (!adc->enabled || dmaGetByRef(adc->DMAy_Streamx) != stream) {
+        return false;
+    }
+    DMA_Stream_TypeDef *other = adc->DMAy_Streamx == DMA2_Stream0 ? DMA2_Stream4 : DMA2_Stream0;
+    DMA_t otherDma = dmaGetByRef(other);
+    if (!otherDma || dmaGetOwner(otherDma) != OWNER_FREE) {
+        return false;
+    }
+
+    // Stopped first: a conversion the DMA misses would be an overrun, which stops its requests
+    ADC_Cmd(adc->ADCx, DISABLE);
+    ADC_DMACmd(adc->ADCx, DISABLE);
+    DMA_Cmd(adc->DMAy_Streamx, DISABLE);
+    while (DMA_GetCmdStatus(adc->DMAy_Streamx) != DISABLE) {
+    }
+    ADC_ClearFlag(adc->ADCx, ADC_FLAG_OVR);
+    dmaInit(stream, OWNER_FREE, 0);
+
+    adc->DMAy_Streamx = other;
+    adcInstanceInit(ADCDEV_1);
+    return true;
+}
+
 void adcHardwareInit(drv_adc_config_t *init)
 {
     UNUSED(init);
diff --git a/src/main/drivers/adc_stm32f7xx.c b/src/main/drivers/adc_stm32f7xx.c
index c680f2c379f..b9bea381237 100644
--- a/src/main/drivers/adc_stm32f7xx.c
+++ b/src/main/drivers/adc_stm32f7xx.c
@@ -164,6 +164,27 @@ static void adcInstanceInit(ADCDevice adcDevice)
     }
 }
 
+bool adcDmaMoveOff(DMA_t stream)
+{
+    adcDevice_t *adc = &adcHardware[ADCDEV_1];
+    if (!adc->enabled || dmaGetByRef(adc->DMAy_Streamx) != stream) {
+        return false;
+    }
+    DMA_Stream_TypeDef *other = adc->DMAy_Streamx == DMA2_Stream0 ? DMA2_Stream4 : DMA2_Stream0;
+    DMA_t otherDma = dmaGetByRef(other);
+    if (!otherDma || dmaGetOwner(otherDma) != OWNER_FREE) {
+        return false;
+    }
+
+    HAL_ADC_Stop_DMA(&adc->ADCHandle);
+    HAL_DMA_DeInit(&adc->DmaHandle);
+    dmaInit(stream, OWNER_FREE, 0);
+
+    adc->DMAy_Streamx = other;
+    adcInstanceInit(ADCDEV_1);
+    return true;
+}
+
 void adcHardwareInit(drv_adc_config_t *init)
 {
     UNUSED(init);
diff --git a/src/main/drivers/bus_spi.c b/src/main/drivers/bus_spi.c
index 8220ad01cd9..634772b285e 100644
--- a/src/main/drivers/bus_spi.c
+++ b/src/main/drivers/bus_spi.c
@@ -18,11 +18,14 @@
 #include <stdbool.h>
 #include <stdint.h>
 
+#include <string.h>
+
 #include <platform.h>
 
 #ifdef USE_SPI
 
 #include "drivers/bus_spi.h"
+#include "drivers/bus_spi_data_ready_impl.h"
 #include "drivers/exti.h"
 #include "drivers/io.h"
 #include "drivers/io_impl.h"
@@ -248,6 +251,86 @@ bool spiTransfer(SPI_TypeDef *instance, uint8_t *out, const uint8_t *in, int len
     return true;
 }
 
+#if defined(USE_SPI_DATA_READY)
+// Data-ready reads (see bus_spi_data_ready.c). The F4 SPI has no FIFO, so every read uses two
+// DMA streams; the buffers stay out of the CCM RAM, which the DMA can not reach
+
+// Longest read, address included
+#define SPI_DATA_READY_MAX  32
+
+typedef struct {
+    uint8_t len;                        // bytes after the address
+    spiDataReadyDma_t streams;
+} spiDataReadyHw_t;
+
+static spiDataReadyHw_t spiDataReadyHw[SPIDEV_COUNT];
+static uint8_t spiDataReadyTx[SPIDEV_COUNT][SPI_DATA_READY_MAX];
+static uint8_t spiDataReadyRx[SPIDEV_COUNT][SPI_DATA_READY_MAX];
+
+static void spiDataReadyDmaDone(DMA_t rx)
+{
+    const SPIDevice device = (SPIDevice)rx->userParam;
+    if (!spiDataReadyDmaEnded(rx)) {
+        // The read never ends: the main loop takes it off the bus when it next needs it
+        return;
+    }
+
+    // A copy: a data-ready that came meanwhile starts the next read into the same buffer
+    uint8_t data[SPI_DATA_READY_MAX];
+    memcpy(data, spiDataReadyRx[device] + 1, spiDataReadyHw[device].len);
+    spiDataReadyDone(device, data);
+}
+
+bool spiDataReadyHwInit(SPIDevice device, uint8_t reg, uint8_t len)
+{
+    spiDataReadyHw_t *h = &spiDataReadyHw[device];
+    if (!spiHardwareMap[device].dev || len + 1 > SPI_DATA_READY_MAX) {
+        return false;
+    }
+    if (!spiDataReadyDmaInit(device, &h->streams, spiDataReadyDmaDone, device)) {
+        return false;
+    }
+
+    h->len = len;
+    memset(spiDataReadyTx[device], 0xFF, SPI_DATA_READY_MAX);
+    spiDataReadyTx[device][0] = reg;
+    return true;
+}
+
+// Setting the DMA requests starts the read: receive first, as the reference manual has it
+void spiDataReadyHwStart(SPIDevice device)
+{
+    const spiDataReadyHw_t *h = &spiDataReadyHw[device];
+    SPI_TypeDef *instance = spiHardwareMap[device].dev;
+
+    // A byte left in the data register would be taken for the first one of this read
+    (void)instance->DR;
+    spiDataReadyDmaStart(&h->streams, &instance->DR, &instance->DR, spiDataReadyTx[device], spiDataReadyRx[device], h->len + 1);
+    instance->CR2 |= SPI_CR2_RXDMAEN;
+    instance->CR2 |= SPI_CR2_TXDMAEN;
+}
+
+void spiDataReadyHwStop(SPIDevice device)
+{
+    const spiDataReadyHw_t *h = &spiDataReadyHw[device];
+    SPI_TypeDef *instance = spiHardwareMap[device].dev;
+
+    spiDataReadyDmaStop(&h->streams);
+    instance->CR2 &= ~(SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
+
+    // A read stopped half way may leave a byte going out: let it finish and drop the echo.
+    // DR then SR also clears an overrun, which would hand the next transfer a stale byte
+    for (int timeout = 1000; timeout && (!(instance->SR & SPI_SR_TXE) || (instance->SR & SPI_SR_BSY)); timeout--);
+    (void)instance->DR;
+    (void)instance->SR;
+}
+
+void spiDataReadyHwDisable(SPIDevice device)
+{
+    spiDataReadyDmaDisable(&spiDataReadyHw[device].streams);
+}
+#endif
+
 void spiSetSpeed(SPI_TypeDef *instance, SPIClockSpeed_e speed)
 {
 #define BR_CLEAR_MASK 0xFFC7
diff --git a/src/main/drivers/bus_spi_data_ready_dma.c b/src/main/drivers/bus_spi_data_ready_dma.c
index 3cec396c896..844e3127ec7 100644
--- a/src/main/drivers/bus_spi_data_ready_dma.c
+++ b/src/main/drivers/bus_spi_data_ready_dma.c
@@ -26,19 +26,24 @@
 
 #include "drivers/bus_spi.h"
 
-#if defined(USE_SPI_DATA_READY) && defined(STM32H7)
+#if defined(USE_SPI_DATA_READY) && (defined(STM32F4) || defined(STM32F7) || defined(STM32H7))
 
 #include "drivers/bus_spi_data_ready_impl.h"
+#include "drivers/adc.h"
 #include "drivers/dma.h"
 #include "drivers/nvic.h"
 #include "drivers/resource.h"
 
+#if defined(STM32H7)
 #include "stm32h7xx_ll_dma.h"
+#endif
 
 // DMA streams for data-ready reads, taken at the end of init from those nobody owns; a bus with
-// no free pair reads without DMA. H7 routes any request through its DMAMUX
+// no free pair reads without DMA. H7 routes any request through its DMAMUX, F4/F7 have fixed ones
 
 #define SPI_DMA_FLAGS       (DMA_IT_TCIF | DMA_IT_HTIF | DMA_IT_TEIF | DMA_IT_DMEIF | DMA_IT_FEIF)
+// F4 and F7: the request's channel in the stream's CR (CHSEL)
+#define SPI_DMA_CHSEL(ch)   ((uint32_t)(ch) << 25)
 
 // Streams named for serial ports stay theirs: a port may open after init
 static const dmaTag_t spiDmaReserved[] = {
@@ -106,6 +111,7 @@ static bool spiDmaIsFree(DMA_t d)
     return true;
 }
 
+#if defined(STM32H7)
 static const uint32_t spiDmaRequest[SPIDEV_COUNT][2] = {
     { DMA_REQUEST_SPI1_RX, DMA_REQUEST_SPI1_TX },
     { DMA_REQUEST_SPI2_RX, DMA_REQUEST_SPI2_TX },
@@ -125,9 +131,44 @@ static DMA_t spiDmaFindFree(DMA_t other)
     }
     return NULL;
 }
+#else
+// The streams, with their channel, each SPI's receive and transmit requests can use
+static const dmaTag_t spiDmaOptions[SPIDEV_COUNT][2][2] = {
+    { { DMA_TAG(2, 0, 3), DMA_TAG(2, 2, 3) }, { DMA_TAG(2, 3, 3), DMA_TAG(2, 5, 3) } },   // SPI1
+    { { DMA_TAG(1, 3, 0), DMA_NONE },         { DMA_TAG(1, 4, 0), DMA_NONE } },           // SPI2
+    { { DMA_TAG(1, 0, 0), DMA_TAG(1, 2, 0) }, { DMA_TAG(1, 5, 0), DMA_TAG(1, 7, 0) } },   // SPI3
+#if defined(STM32F7)
+    { { DMA_TAG(2, 0, 4), DMA_TAG(2, 3, 5) }, { DMA_TAG(2, 1, 4), DMA_TAG(2, 4, 5) } },   // SPI4
+#endif
+};
+
+static DMA_t spiDmaFindFree(const dmaTag_t *options, uint32_t *channel)
+{
+    for (int i = 0; i < 2; i++) {
+        DMA_t d = options[i] ? dmaGetByTag(options[i]) : NULL;
+        if (spiDmaIsFree(d)) {
+            *channel = SPI_DMA_CHSEL(DMATAG_GET_CHANNEL(options[i]));
+            return d;
+        }
+    }
+#if defined(USE_ADC)
+    // Both taken: move the ADC to its other stream (many boards give it DMA2 stream 0, and a timer
+    // the other stream SPI1 could receive on)
+    for (int i = 0; i < 2; i++) {
+        DMA_t d = options[i] ? dmaGetByTag(options[i]) : NULL;
+        if (d && dmaGetOwner(d) == OWNER_ADC && adcDmaMoveOff(d) && spiDmaIsFree(d)) {
+            *channel = SPI_DMA_CHSEL(DMATAG_GET_CHANNEL(options[i]));
+            return d;
+        }
+    }
+#endif
+    return NULL;
+}
+#endif
 
 bool spiDataReadyDmaInit(SPIDevice device, spiDataReadyDma_t *dma, dmaCallbackHandlerFuncPtr done, uint32_t userParam)
 {
+#if defined(STM32H7)
     DMA_t rx = spiDmaFindFree(NULL);
     DMA_t tx = spiDmaFindFree(rx);
     if (!rx || !tx) {
@@ -135,6 +176,19 @@ bool spiDataReadyDmaInit(SPIDevice device, spiDataReadyDma_t *dma, dmaCallbackHa
     }
     LL_DMA_SetPeriphRequest(rx->dma, DMATAG_GET_STREAM(rx->tag), spiDmaRequest[device][0]);
     LL_DMA_SetPeriphRequest(tx->dma, DMATAG_GET_STREAM(tx->tag), spiDmaRequest[device][1]);
+#else
+    DMA_t rx = spiDmaFindFree(spiDmaOptions[device][0], &dma->rxChannel);
+    if (!rx) {
+        return false;
+    }
+    // Owned before the transmit search: moving the ADC for that one must not put it back here
+    dmaInit(rx, OWNER_SPI, device + 1);
+    DMA_t tx = spiDmaFindFree(spiDmaOptions[device][1], &dma->txChannel);
+    if (!tx) {
+        dmaInit(rx, OWNER_FREE, 0);
+        return false;
+    }
+#endif
 
     dmaInit(rx, OWNER_SPI, device + 1);
     dmaInit(tx, OWNER_SPI, device + 1);
@@ -168,8 +222,13 @@ static void spiDmaStreamStart(DMA_t d, uint32_t cr, volatile void *periph, const
 
 void spiDataReadyDmaStart(const spiDataReadyDma_t *dma, volatile void *txReg, volatile void *rxReg, const uint8_t *tx, uint8_t *rx, uint16_t n)
 {
-    spiDmaStreamStart(dma->rx, DMA_SxCR_MINC | DMA_SxCR_PL_1 | DMA_SxCR_TCIE | DMA_SxCR_TEIE, rxReg, rx, n);
-    spiDmaStreamStart(dma->tx, DMA_SxCR_DIR_0 | DMA_SxCR_MINC | DMA_SxCR_PL_0, txReg, tx, n);
+#if defined(STM32H7)
+    const uint32_t rxChannel = 0, txChannel = 0;    // the DMAMUX routes the requests
+#else
+    const uint32_t rxChannel = dma->rxChannel, txChannel = dma->txChannel;
+#endif
+    spiDmaStreamStart(dma->rx, rxChannel | DMA_SxCR_MINC | DMA_SxCR_PL_1 | DMA_SxCR_TCIE | DMA_SxCR_TEIE, rxReg, rx, n);
+    spiDmaStreamStart(dma->tx, txChannel | DMA_SxCR_DIR_0 | DMA_SxCR_MINC | DMA_SxCR_PL_0, txReg, tx, n);
 }
 
 void spiDataReadyDmaStop(const spiDataReadyDma_t *dma)
diff --git a/src/main/drivers/bus_spi_data_ready_impl.h b/src/main/drivers/bus_spi_data_ready_impl.h
index 216219f9187..ce0f18a6001 100644
--- a/src/main/drivers/bus_spi_data_ready_impl.h
+++ b/src/main/drivers/bus_spi_data_ready_impl.h
@@ -40,13 +40,17 @@ void spiTimeoutUserCallback(SPI_TypeDef *instance);
 uint32_t spiTimeoutUserCallback(SPI_TypeDef *instance);
 #endif
 
-#if defined(STM32H7)
+#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
 #include "drivers/dma.h"
 
 // Reads longer than the SPI FIFO go through two DMA streams (bus_spi_data_ready_dma.c)
 typedef struct {
     DMA_t rx;
     DMA_t tx;
+#if defined(STM32F4) || defined(STM32F7)
+    uint32_t rxChannel;                 // the stream's channel for this SPI
+    uint32_t txChannel;
+#endif
 } spiDataReadyDma_t;
 
 // Takes a free stream for each direction. done() runs at the end of each read, or when the
diff --git a/src/main/drivers/bus_spi_hal_ll.c b/src/main/drivers/bus_spi_hal_ll.c
index a68c5e799c0..aeb67f2e28e 100644
--- a/src/main/drivers/bus_spi_hal_ll.c
+++ b/src/main/drivers/bus_spi_hal_ll.c
@@ -519,7 +519,7 @@ bool spiTransfer(SPI_TypeDef *instance, uint8_t *rxData, const uint8_t *txData,
 #if defined(USE_SPI_DATA_READY)
 // Data-ready reads (see bus_spi_data_ready.c). On H7 a read that fits the SPI FIFO (16 bytes on
 // SPI1-3, 8 on SPI4-6) needs no DMA: the end-of-transfer interrupt takes it all back. Longer
-// reads use two DMA streams
+// reads, and all on F7 (4-byte FIFO), use two DMA streams
 
 // Longest read, address included
 #define SPI_DATA_READY_MAX  32
@@ -568,6 +568,7 @@ static bool spiDataReadyDmaSetup(SPIDevice device)
     return true;
 }
 
+#if defined(STM32H7)
 static const IRQn_Type spiIrq[SPIDEV_COUNT] = { SPI1_IRQn, SPI2_IRQn, SPI3_IRQn, SPI4_IRQn };
 
 static uint8_t spiFifoSize(SPI_TypeDef *instance)
@@ -676,6 +677,57 @@ void SPI3_IRQHandler(void) { spiDataReadyIrqHandler(SPIDEV_3); }
 void SPI4_IRQHandler(void) { spiDataReadyIrqHandler(SPIDEV_4); }
 #endif
 
+#else // STM32F7
+
+bool spiDataReadyHwInit(SPIDevice device, uint8_t reg, uint8_t len)
+{
+    SPI_TypeDef *instance = spiHardwareMap[device].dev;
+    spiDataReadyHw_t *h = &spiDataReadyHw[device];
+    if (!instance || len + 1 > SPI_DATA_READY_MAX) {
+        return false;
+    }
+
+    h->reg = reg;
+    h->len = len;
+    return spiDataReadyDmaSetup(device);
+}
+
+// Setting the DMA requests starts the read: receive first, as the reference manual has it
+void spiDataReadyHwStart(SPIDevice device)
+{
+    const spiDataReadyHw_t *h = &spiDataReadyHw[device];
+    SPI_TypeDef *instance = spiHardwareMap[device].dev;
+
+    // A byte left in the receive FIFO would be taken for the first one of this read
+    for (int n = 0; n < 8 && LL_SPI_GetRxFIFOLevel(instance) != LL_SPI_RX_FIFO_EMPTY; n++) {
+        (void)LL_SPI_ReceiveData8(instance);
+    }
+    spiDataReadyDmaStart(&h->streams, &instance->DR, &instance->DR, spiDataReadyTx[device], spiDataReadyRx[device], h->len + 1);
+    SET_BIT(instance->CR2, SPI_CR2_RXDMAEN);
+    SET_BIT(instance->CR2, SPI_CR2_TXDMAEN);
+}
+
+void spiDataReadyHwStop(SPIDevice device)
+{
+    const spiDataReadyHw_t *h = &spiDataReadyHw[device];
+    SPI_TypeDef *instance = spiHardwareMap[device].dev;
+
+    spiDataReadyDmaStop(&h->streams);
+    CLEAR_BIT(instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
+
+    // A read stopped half way leaves bytes behind: send them and drop what comes back, or the main
+    // loop's next transfer would take it for its own
+    for (int timeout = 1000; timeout && (LL_SPI_GetTxFIFOLevel(instance) != LL_SPI_TX_FIFO_EMPTY || LL_SPI_IsActiveFlag_BSY(instance)); timeout--);
+    for (int n = 0; n < 8 && LL_SPI_GetRxFIFOLevel(instance) != LL_SPI_RX_FIFO_EMPTY; n++) {
+        (void)LL_SPI_ReceiveData8(instance);
+    }
+}
+
+void spiDataReadyHwDisable(SPIDevice device)
+{
+    spiDataReadyDmaDisable(&spiDataReadyHw[device].streams);
+}
+#endif
 #endif
 
 void spiSetSpeed(SPI_TypeDef *instance, SPIClockSpeed_e speed)
diff --git a/src/main/fc/settings.yaml b/src/main/fc/settings.yaml
index 749f348429e..698f9f3c9d1 100644
--- a/src/main/fc/settings.yaml
+++ b/src/main/fc/settings.yaml
@@ -353,7 +353,7 @@ groups:
         field: gyro_secondary_enabled
         type: bool
       - name: gyro_data_ready
-        description: "Read the gyro when it signals a new sample, on its data-ready interrupt, instead of polling it: every sample once, and the CPU no longer waits on the bus. Needs a supported IMU (ICM-42605, ICM-42688-P) and a target that declares the interrupt pin. AUTO and ON do it, OFF polls the gyro."
+        description: "Read the gyro when it signals a new sample, on its data-ready interrupt, instead of polling it: every sample once, and the CPU no longer waits on the bus. Needs a supported IMU (ICM-42605, ICM-42688-P) and a target that declares the interrupt pin; without interrupts the gyro is read as before. AUTO and ON do it, OFF polls the gyro."
         default_value: "AUTO"
         condition: USE_SPI_DATA_READY
         field: gyro_data_ready
diff --git a/src/main/target/AIKONF4V2/target.h b/src/main/target/AIKONF4V2/target.h
index a93415371bd..d2c2ff7c0bc 100644
--- a/src/main/target/AIKONF4V2/target.h
+++ b/src/main/target/AIKONF4V2/target.h
@@ -96,6 +96,7 @@
 #define IMU_MPU6000_ALIGN       CW0_DEG
 #define USE_IMU_ICM42605
 #define ICM42605_CS_PIN         SPI1_NSS_PIN
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define IMU_ICM42605_ALIGN      CW90_DEG
 // OSD
diff --git a/src/main/target/AOCODARCF405AIO/target.h b/src/main/target/AOCODARCF405AIO/target.h
index d732ebdd042..f7593f11ffd 100644
--- a/src/main/target/AOCODARCF405AIO/target.h
+++ b/src/main/target/AOCODARCF405AIO/target.h
@@ -65,19 +65,19 @@
 #define USE_IMU_MPU6500
 #define MPU6500_CS_PIN           PA4
 #define MPU6500_SPI_BUS          BUS_SPI1
-#define MPU6500_EXTI_PIN         PC5
+#define MPU6500_EXTI_PIN         PC4
 #define IMU_MPU6500_ALIGN        CW90_DEG
 
 #define USE_IMU_MPU6000
 #define MPU6000_CS_PIN           PA4
 #define MPU6000_SPI_BUS          BUS_SPI1
-#define MPU6000_EXTI_PIN         PC5
+#define MPU6000_EXTI_PIN         PC4
 #define IMU_MPU6000_ALIGN        CW90_DEG
 
 #define USE_IMU_BMI270
 #define BMI270_CS_PIN           PA4
 #define BMI270_SPI_BUS          BUS_SPI1
-#define BMI270_EXTI_PIN         PC5
+#define BMI270_EXTI_PIN         PC4
 #define IMU_BMI270_ALIGN        CW90_DEG
 
 /*** I2C (Baro & Mag) ***/
diff --git a/src/main/target/AOCODARCF722AIO/target.c b/src/main/target/AOCODARCF722AIO/target.c
index 84ccbfd6708..7ec1ee6880a 100644
--- a/src/main/target/AOCODARCF722AIO/target.c
+++ b/src/main/target/AOCODARCF722AIO/target.c
@@ -26,7 +26,7 @@
 
 BUSDEV_REGISTER_SPI_TAG(busdev_mpu6500,  DEVHW_MPU6500,   MPU6500_SPI_BUS, MPU6500_CS_PIN,  NONE,  0, DEVFLAGS_NONE, IMU_MPU6500_ALIGN);
 BUSDEV_REGISTER_SPI_TAG(busdev_mpu6000,  DEVHW_MPU6000,   MPU6000_SPI_BUS, MPU6000_CS_PIN,  NONE,  0, DEVFLAGS_NONE, IMU_MPU6000_ALIGN);
-BUSDEV_REGISTER_SPI_TAG(busdev_icm42605, DEVHW_ICM42605,  ICM42605_SPI_BUS, ICM42605_CS_PIN, NONE,  0, DEVFLAGS_NONE, IMU_ICM42605_ALIGN);
+BUSDEV_REGISTER_SPI_TAG(busdev_icm42605, DEVHW_ICM42605,  ICM42605_SPI_BUS, ICM42605_CS_PIN, ICM42605_EXTI_PIN,  0, DEVFLAGS_NONE, IMU_ICM42605_ALIGN);
 
 timerHardware_t timerHardware[] = {
     // DEF_TIM(TIM9, CH2, PA3,  TIM_USE_PPM, 0, 0),  // PPM
diff --git a/src/main/target/AXISFLYINGF7PRO/target.h b/src/main/target/AXISFLYINGF7PRO/target.h
index 39c94e47e9a..d40c74483f8 100644
--- a/src/main/target/AXISFLYINGF7PRO/target.h
+++ b/src/main/target/AXISFLYINGF7PRO/target.h
@@ -57,6 +57,7 @@
 #define IMU_ICM42605_ALIGN      CW0_DEG
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define ICM42605_CS_PIN         SPI1_NSS_PIN
+#define ICM42605_EXTI_PIN       PC4
 
 #define USE_IMU_BMI270
 #define IMU_BMI270_ALIGN        CW0_DEG
diff --git a/src/main/target/BETAFPVF722/target.h b/src/main/target/BETAFPVF722/target.h
index cab6d2ff146..886b2659036 100755
--- a/src/main/target/BETAFPVF722/target.h
+++ b/src/main/target/BETAFPVF722/target.h
@@ -44,6 +44,7 @@
 #define IMU_ICM42605_ALIGN      CW180_DEG
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define ICM42605_CS_PIN         PA4
+#define ICM42605_EXTI_PIN       PC4
 
 #define USE_IMU_BMI270
 #define IMU_BMI270_ALIGN        CW180_DEG
diff --git a/src/main/target/BLADE_F4/target.h b/src/main/target/BLADE_F4/target.h
index 71cf76cc0cf..125f1327897 100644
--- a/src/main/target/BLADE_F4/target.h
+++ b/src/main/target/BLADE_F4/target.h
@@ -69,6 +69,7 @@
 #define IMU_ICM42605_ALIGN       CW270_DEG
 #define ICM42605_SPI_BUS         BUS_SPI1
 #define ICM42605_CS_PIN          SPI1_NSS_PIN
+#define ICM42605_EXTI_PIN       PC4
 
 //BMI270
 #define USE_IMU_BMI270
diff --git a/src/main/target/BOTWINGF405/target.h b/src/main/target/BOTWINGF405/target.h
index f4860c653a5..7e4312c753f 100644
--- a/src/main/target/BOTWINGF405/target.h
+++ b/src/main/target/BOTWINGF405/target.h
@@ -73,6 +73,7 @@
 */
 #define USE_IMU_ICM42605
 #define ICM42605_CS_PIN       PA4
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS      BUS_SPI1
 #define IMU_ICM42605_ALIGN    CW0_DEG
 
diff --git a/src/main/target/BOTWINGF722/target.h b/src/main/target/BOTWINGF722/target.h
index 2d3823f2a04..e31d6859074 100644
--- a/src/main/target/BOTWINGF722/target.h
+++ b/src/main/target/BOTWINGF722/target.h
@@ -46,6 +46,7 @@
 
 // #define ICM42605_CS_PIN                              SPI3_NSS_PIN
 #define ICM42605_CS_PIN                                 PD2
+#define ICM42605_EXTI_PIN       PC13
 #define ICM42605_SPI_BUS                                BUS_SPI3
 
 #define USE_BEEPER
diff --git a/src/main/target/BROTHERHOBBYF405V3/target.h b/src/main/target/BROTHERHOBBYF405V3/target.h
index 9a9115bbf36..d01b4789af9 100644
--- a/src/main/target/BROTHERHOBBYF405V3/target.h
+++ b/src/main/target/BROTHERHOBBYF405V3/target.h
@@ -97,6 +97,7 @@
 // Gyro & ACC
 #define USE_IMU_ICM42605
 #define ICM42605_CS_PIN       PA4
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS BUS_SPI1
 #define IMU_ICM42605_ALIGN    CW90_DEG
 
diff --git a/src/main/target/CADDXF4_AIO_ELRS/target.h b/src/main/target/CADDXF4_AIO_ELRS/target.h
index 85a1718f684..0a46b81eb4a 100644
--- a/src/main/target/CADDXF4_AIO_ELRS/target.h
+++ b/src/main/target/CADDXF4_AIO_ELRS/target.h
@@ -35,6 +35,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW180_DEG
 #define ICM42605_CS_PIN         PA4
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 #define USE_BARO
diff --git a/src/main/target/DAKEFPVF405/target.h b/src/main/target/DAKEFPVF405/target.h
index 30834b7682b..9f6c37cbf95 100644
--- a/src/main/target/DAKEFPVF405/target.h
+++ b/src/main/target/DAKEFPVF405/target.h
@@ -66,6 +66,7 @@
 #define IMU_ICM42605_ALIGN      CW90_DEG
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define ICM42605_CS_PIN         PA4
+#define ICM42605_EXTI_PIN       PC4
 
 #define USE_IMU_BMI270
 #define IMU_BMI270_ALIGN        CW90_DEG
diff --git a/src/main/target/DAKEFPVF722/target.h b/src/main/target/DAKEFPVF722/target.h
index 7d993971a40..ddf980860ca 100644
--- a/src/main/target/DAKEFPVF722/target.h
+++ b/src/main/target/DAKEFPVF722/target.h
@@ -66,6 +66,7 @@
 #define IMU_ICM42605_ALIGN      CW90_DEG
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define ICM42605_CS_PIN         PA4
+#define ICM42605_EXTI_PIN       PC4
 
 #define USE_IMU_BMI270
 #define IMU_BMI270_ALIGN        CW90_DEG
diff --git a/src/main/target/FLASHHOBBYF405/target.h b/src/main/target/FLASHHOBBYF405/target.h
index 937917c95c1..8f71f0967f1 100644
--- a/src/main/target/FLASHHOBBYF405/target.h
+++ b/src/main/target/FLASHHOBBYF405/target.h
@@ -49,6 +49,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW0_DEG
 #define ICM42605_CS_PIN         SPI1_NSS_PIN
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 // *************** I2C/Baro/Mag *********************
diff --git a/src/main/target/FLASHHOBBYF722/target.h b/src/main/target/FLASHHOBBYF722/target.h
index f0cc7881352..7a816fc85f4 100644
--- a/src/main/target/FLASHHOBBYF722/target.h
+++ b/src/main/target/FLASHHOBBYF722/target.h
@@ -47,6 +47,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW0_DEG
 #define ICM42605_CS_PIN         SPI1_NSS_PIN
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 // *************** I2C/Baro/Mag *********************
diff --git a/src/main/target/FLYWOOF405PRO/target.h b/src/main/target/FLYWOOF405PRO/target.h
index 22ddd0a6fd2..4fd4ee9fbfa 100644
--- a/src/main/target/FLYWOOF405PRO/target.h
+++ b/src/main/target/FLYWOOF405PRO/target.h
@@ -50,6 +50,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW180_DEG_FLIP
 #define ICM42605_CS_PIN         PB12
+#define ICM42605_EXTI_PIN       GYRO_INT_EXTI
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 #define USE_EXTI
diff --git a/src/main/target/FLYWOOF405S_AIO/target.h b/src/main/target/FLYWOOF405S_AIO/target.h
index 4250943633e..840cf7e6f49 100644
--- a/src/main/target/FLYWOOF405S_AIO/target.h
+++ b/src/main/target/FLYWOOF405S_AIO/target.h
@@ -46,6 +46,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW270_DEG
 #define ICM42605_CS_PIN         PB12
+#define ICM42605_EXTI_PIN       PB13
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 #define USE_EXTI
diff --git a/src/main/target/FLYWOOF722PRO/target.c b/src/main/target/FLYWOOF722PRO/target.c
index e8b78979f95..7eba2b3344e 100644
--- a/src/main/target/FLYWOOF722PRO/target.c
+++ b/src/main/target/FLYWOOF722PRO/target.c
@@ -27,7 +27,7 @@
 
 
 BUSDEV_REGISTER_SPI_TAG(busdev_mpu6000,     DEVHW_MPU6000,      MPU6000_SPI_BUS,    MPU6000_CS_PIN,     NONE,       0,  DEVFLAGS_NONE,  IMU_MPU6000_ALIGN);
-BUSDEV_REGISTER_SPI_TAG(busdev_ICM42605,    DEVHW_ICM42605,     ICM42605_SPI_BUS,   ICM42605_CS_PIN,    NONE,      0,  DEVFLAGS_NONE,  IMU_ICM42605_ALIGN);
+BUSDEV_REGISTER_SPI_TAG(busdev_ICM42605,    DEVHW_ICM42605,     ICM42605_SPI_BUS,   ICM42605_CS_PIN,    ICM42605_EXTI_PIN,      0,  DEVFLAGS_NONE,  IMU_ICM42605_ALIGN);
 BUSDEV_REGISTER_SPI_TAG(busdev_BMI270,      DEVHW_BMI270,       BMI270_SPI_BUS,     BMI270_CS_PIN,      NONE,        0,  DEVFLAGS_NONE,  IMU_BMI270_ALIGN);
 
 timerHardware_t timerHardware[] = {
diff --git a/src/main/target/FLYWOOF722PRO/target.h b/src/main/target/FLYWOOF722PRO/target.h
index 3f11b44e317..0db06779723 100644
--- a/src/main/target/FLYWOOF722PRO/target.h
+++ b/src/main/target/FLYWOOF722PRO/target.h
@@ -42,6 +42,7 @@
 #define IMU_ICM42605_ALIGN      CW270_DEG
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define ICM42605_CS_PIN         PA4
+#define ICM42605_EXTI_PIN       PC3
 
 #define USE_IMU_BMI270
 #define IMU_BMI270_ALIGN        CW180_DEG
diff --git a/src/main/target/FLYWOOF745/target.h b/src/main/target/FLYWOOF745/target.h
index d00c2455945..a54899f5f02 100644
--- a/src/main/target/FLYWOOF745/target.h
+++ b/src/main/target/FLYWOOF745/target.h
@@ -49,6 +49,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW270_DEG
 #define ICM42605_CS_PIN         SPI4_NSS_PIN
+#define ICM42605_EXTI_PIN       PE1
 #define ICM42605_SPI_BUS        BUS_SPI4
 
 #define USB_IO
diff --git a/src/main/target/FOXEERF405V2/target.h b/src/main/target/FOXEERF405V2/target.h
index 1b0a3e65134..93b787cf418 100644
--- a/src/main/target/FOXEERF405V2/target.h
+++ b/src/main/target/FOXEERF405V2/target.h
@@ -76,6 +76,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN       CW270_DEG
 #define ICM42605_CS_PIN          SPI1_NSS_PIN
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS         BUS_SPI1
 
 
diff --git a/src/main/target/FOXEERF722V4/target.h b/src/main/target/FOXEERF722V4/target.h
index fe6d4279d26..d764f3399d8 100644
--- a/src/main/target/FOXEERF722V4/target.h
+++ b/src/main/target/FOXEERF722V4/target.h
@@ -31,6 +31,7 @@
 #define IMU_ICM42605_ALIGN      CW270_DEG
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define ICM42605_CS_PIN         PB2
+#define ICM42605_EXTI_PIN       PC4
 
 #define USE_IMU_MPU6000
 #define IMU_MPU6000_ALIGN       CW270_DEG
diff --git a/src/main/target/FOXEERF745AIO/target.h b/src/main/target/FOXEERF745AIO/target.h
index 860ea18d861..43886731db3 100644
--- a/src/main/target/FOXEERF745AIO/target.h
+++ b/src/main/target/FOXEERF745AIO/target.h
@@ -32,6 +32,7 @@
 #define IMU_ICM42605_ALIGN      CW90_DEG
 #define ICM42605_SPI_BUS        BUS_SPI3
 #define ICM42605_CS_PIN         PA15
+#define ICM42605_EXTI_PIN       PD0
 
 #else
 
diff --git a/src/main/target/FURYF4OSD/target.h b/src/main/target/FURYF4OSD/target.h
index 71abc9a8c68..6b6b3f6d8a9 100644
--- a/src/main/target/FURYF4OSD/target.h
+++ b/src/main/target/FURYF4OSD/target.h
@@ -50,6 +50,9 @@
 #define IMU_ICM42605_ALIGN      CW180_DEG
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define ICM42605_CS_PIN         PA4
+#ifndef MAMBAF405
+#define ICM42605_EXTI_PIN       PC4
+#endif
 
 #define ENABLE_BLACKBOX_LOGGING_ON_SPIFLASH_BY_DEFAULT
 #define USE_SPI_DEVICE_3
diff --git a/src/main/target/GEPRCF405/target.h b/src/main/target/GEPRCF405/target.h
index 0b96d5b8b1e..f35a4bd7e8c 100644
--- a/src/main/target/GEPRCF405/target.h
+++ b/src/main/target/GEPRCF405/target.h
@@ -54,6 +54,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW180_DEG
 #define ICM42605_CS_PIN         PA15
+#define ICM42605_EXTI_PIN       PC3
 #define ICM42605_SPI_BUS        BUS_SPI3
 
 // *************** I2C/Baro/Mag *********************
diff --git a/src/main/target/GEPRCF405_BT_HD/target.h b/src/main/target/GEPRCF405_BT_HD/target.h
index 185a3970a11..e76ce06e305 100644
--- a/src/main/target/GEPRCF405_BT_HD/target.h
+++ b/src/main/target/GEPRCF405_BT_HD/target.h
@@ -52,6 +52,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW180_DEG
 #define ICM42605_CS_PIN         PA15
+#define ICM42605_EXTI_PIN       PC3
 #define ICM42605_SPI_BUS        BUS_SPI3
 
 // *************** I2C/Baro/Mag *********************
diff --git a/src/main/target/GEPRCF722/target.h b/src/main/target/GEPRCF722/target.h
index df7cc6d3eca..a0ca42a6bbc 100644
--- a/src/main/target/GEPRCF722/target.h
+++ b/src/main/target/GEPRCF722/target.h
@@ -51,6 +51,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW180_DEG
 #define ICM42605_CS_PIN         PA15
+#define ICM42605_EXTI_PIN       PC3
 #define ICM42605_SPI_BUS        BUS_SPI3
 
 // *************** I2C/Baro/Mag *********************
diff --git a/src/main/target/GEPRCF722_BT_HD/target.h b/src/main/target/GEPRCF722_BT_HD/target.h
index e388203c6aa..450324aff43 100644
--- a/src/main/target/GEPRCF722_BT_HD/target.h
+++ b/src/main/target/GEPRCF722_BT_HD/target.h
@@ -49,6 +49,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW0_DEG
 #define ICM42605_CS_PIN         PA15
+#define ICM42605_EXTI_PIN       PA8
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 // *************** I2C/Baro/Mag *********************
diff --git a/src/main/target/GEPRCF745_BT_HD/target.c b/src/main/target/GEPRCF745_BT_HD/target.c
index 91f9957fefc..de23e37be15 100644
--- a/src/main/target/GEPRCF745_BT_HD/target.c
+++ b/src/main/target/GEPRCF745_BT_HD/target.c
@@ -26,11 +26,11 @@
 #include "drivers/sensor.h"
 
 
-BUSDEV_REGISTER_SPI_TAG(busdev_mpu6000,  DEVHW_MPU6000,  IMU1_SPI_BUS,   IMU1_CS_PIN,   NONE,   0,  DEVFLAGS_NONE,  IMU1_ALIGN);
-BUSDEV_REGISTER_SPI_TAG(busdev_mpu6000_2,  DEVHW_MPU6000, IMU2_SPI_BUS,   IMU2_CS_PIN,   NONE,   1,  DEVFLAGS_NONE,  IMU2_ALIGN);
+BUSDEV_REGISTER_SPI_TAG(busdev_mpu6000,  DEVHW_MPU6000,  IMU1_SPI_BUS,   IMU1_CS_PIN,   IMU1_EXTI_PIN,   0,  DEVFLAGS_NONE,  IMU1_ALIGN);
+BUSDEV_REGISTER_SPI_TAG(busdev_mpu6000_2,  DEVHW_MPU6000, IMU2_SPI_BUS,   IMU2_CS_PIN,   IMU2_EXTI_PIN,   1,  DEVFLAGS_NONE,  IMU2_ALIGN);
 
-BUSDEV_REGISTER_SPI_TAG(busdev_icm42688,  DEVHW_ICM42605,  IMU1_SPI_BUS,   IMU1_CS_PIN,   NONE,   0,  DEVFLAGS_NONE,  IMU1_ALIGN);
-BUSDEV_REGISTER_SPI_TAG(busdev_icm42688_2, DEVHW_ICM42605, IMU2_SPI_BUS,   IMU2_CS_PIN,   NONE,   1,  DEVFLAGS_NONE,  IMU2_ALIGN);
+BUSDEV_REGISTER_SPI_TAG(busdev_icm42688,  DEVHW_ICM42605,  IMU1_SPI_BUS,   IMU1_CS_PIN,   IMU1_EXTI_PIN,   0,  DEVFLAGS_NONE,  IMU1_ALIGN);
+BUSDEV_REGISTER_SPI_TAG(busdev_icm42688_2, DEVHW_ICM42605, IMU2_SPI_BUS,   IMU2_CS_PIN,   IMU2_EXTI_PIN,   1,  DEVFLAGS_NONE,  IMU2_ALIGN);
 
 
 
diff --git a/src/main/target/GEPRCF745_BT_HD/target.h b/src/main/target/GEPRCF745_BT_HD/target.h
index c6c84a32ad3..dbd5772c40e 100644
--- a/src/main/target/GEPRCF745_BT_HD/target.h
+++ b/src/main/target/GEPRCF745_BT_HD/target.h
@@ -65,6 +65,7 @@
 #define IMU1_ALIGN              CW180_DEG
 #define IMU1_SPI_BUS            BUS_SPI1
 #define IMU1_CS_PIN             PA4
+#define IMU1_EXTI_PIN           PD0
 
 
 
@@ -72,6 +73,7 @@
 #define IMU2_ALIGN              CW0_DEG
 #define IMU2_SPI_BUS            BUS_SPI2
 #define IMU2_CS_PIN             PB12
+#define IMU2_EXTI_PIN           PD8
 
 
 // *************** I2C/Baro/Mag *********************
diff --git a/src/main/target/GEPRC_F722_AIO/target.h b/src/main/target/GEPRC_F722_AIO/target.h
index ee2b9330552..eed916d473f 100644
--- a/src/main/target/GEPRC_F722_AIO/target.h
+++ b/src/main/target/GEPRC_F722_AIO/target.h
@@ -53,6 +53,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW90_DEG
 #define ICM42605_CS_PIN         PA15
+#define ICM42605_EXTI_PIN       PA8
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 // *************** I2C/Baro/Mag *********************
diff --git a/src/main/target/HAKRCF405D/target.c b/src/main/target/HAKRCF405D/target.c
index 14447efed4b..ffdecfc6c64 100644
--- a/src/main/target/HAKRCF405D/target.c
+++ b/src/main/target/HAKRCF405D/target.c
@@ -25,7 +25,7 @@
 #include "drivers/sensor.h"
 
 BUSDEV_REGISTER_SPI_TAG(busdev_bmi270,   DEVHW_BMI270,  BMI270_SPI_BUS,   BMI270_CS_PIN,   NONE,   0,  DEVFLAGS_NONE,  IMU_BMI270_ALIGN);
-BUSDEV_REGISTER_SPI_TAG(busdev_icm42688,  DEVHW_ICM42605, ICM42605_SPI_BUS,  ICM42605_CS_PIN,  NONE,  0,  DEVFLAGS_NONE,  IMU_ICM42605_ALIGN);
+BUSDEV_REGISTER_SPI_TAG(busdev_icm42688,  DEVHW_ICM42605, ICM42605_SPI_BUS,  ICM42605_CS_PIN,  ICM42605_EXTI_PIN,  0,  DEVFLAGS_NONE,  IMU_ICM42605_ALIGN);
 BUSDEV_REGISTER_SPI_TAG(busdev_mpu6000,  DEVHW_MPU6000, MPU6000_SPI_BUS,  MPU6000_CS_PIN,  NONE,  0,  DEVFLAGS_NONE,  IMU_MPU6000_ALIGN);
 
 
diff --git a/src/main/target/HAKRCF405D/target.h b/src/main/target/HAKRCF405D/target.h
index d47ec61dc99..f626ab22d85 100644
--- a/src/main/target/HAKRCF405D/target.h
+++ b/src/main/target/HAKRCF405D/target.h
@@ -67,6 +67,7 @@
 #define IMU_ICM42605_ALIGN      CW270_DEG
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define ICM42605_CS_PIN         SPI1_NSS_PIN
+#define ICM42605_EXTI_PIN       PC3
 
 //BMI270
 #define USE_IMU_BMI270
diff --git a/src/main/target/HAKRCF405V2/target.h b/src/main/target/HAKRCF405V2/target.h
index 85cc164230b..e48a6e7c3a2 100644
--- a/src/main/target/HAKRCF405V2/target.h
+++ b/src/main/target/HAKRCF405V2/target.h
@@ -68,6 +68,7 @@
 #define IMU_ICM42605_ALIGN       CW90_DEG
 #define ICM42605_SPI_BUS         BUS_SPI1
 #define ICM42605_CS_PIN          SPI1_NSS_PIN
+#define ICM42605_EXTI_PIN       PC4
 
 //BMI270
 #define USE_IMU_BMI270
diff --git a/src/main/target/HAKRCF411D/target.h b/src/main/target/HAKRCF411D/target.h
index 5b3a479ed19..a67932cb9c5 100644
--- a/src/main/target/HAKRCF411D/target.h
+++ b/src/main/target/HAKRCF411D/target.h
@@ -59,6 +59,7 @@
 #define IMU_ICM42605_ALIGN      CW180_DEG
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define ICM42605_CS_PIN         SPI1_NSS_PIN
+#define ICM42605_EXTI_PIN       PA1
 
 //BMI270
 #define USE_IMU_BMI270
diff --git a/src/main/target/HAKRCF722V2/target.c b/src/main/target/HAKRCF722V2/target.c
index 9738db56d0c..14ef569f08f 100644
--- a/src/main/target/HAKRCF722V2/target.c
+++ b/src/main/target/HAKRCF722V2/target.c
@@ -23,14 +23,14 @@
 #include "drivers/sensor.h"
 #include "drivers/pwm_mapping.h"
 
-BUSDEV_REGISTER_SPI_TAG(busdev_mpu6000, DEVHW_MPU6000, GYRO_SPI_BUS, GYRO1_CS_PIN, NONE, 0, DEVFLAGS_NONE, IMU_MPU6000_ALIGN);
-BUSDEV_REGISTER_SPI_TAG(busdev_mpu6000_2, DEVHW_MPU6000, GYRO_SPI_BUS, GYRO2_CS_PIN, NONE, 1, DEVFLAGS_NONE, IMU_MPU6000_ALIGN);
+BUSDEV_REGISTER_SPI_TAG(busdev_mpu6000, DEVHW_MPU6000, GYRO_SPI_BUS, GYRO1_CS_PIN, GYRO1_EXTI_PIN, 0, DEVFLAGS_NONE, IMU_MPU6000_ALIGN);
+BUSDEV_REGISTER_SPI_TAG(busdev_mpu6000_2, DEVHW_MPU6000, GYRO_SPI_BUS, GYRO2_CS_PIN, GYRO2_EXTI_PIN, 1, DEVFLAGS_NONE, IMU_MPU6000_ALIGN);
 
-BUSDEV_REGISTER_SPI_TAG(busdev_icm42688, DEVHW_ICM42605, GYRO_SPI_BUS, GYRO1_CS_PIN, NONE, 0, DEVFLAGS_NONE, IMU_ICM42605_ALIGN);
-BUSDEV_REGISTER_SPI_TAG(busdev_icm42688_2, DEVHW_ICM42605, GYRO_SPI_BUS, GYRO2_CS_PIN, NONE, 1, DEVFLAGS_NONE, IMU_ICM42605_ALIGN);
+BUSDEV_REGISTER_SPI_TAG(busdev_icm42688, DEVHW_ICM42605, GYRO_SPI_BUS, GYRO1_CS_PIN, GYRO1_EXTI_PIN, 0, DEVFLAGS_NONE, IMU_ICM42605_ALIGN);
+BUSDEV_REGISTER_SPI_TAG(busdev_icm42688_2, DEVHW_ICM42605, GYRO_SPI_BUS, GYRO2_CS_PIN, GYRO2_EXTI_PIN, 1, DEVFLAGS_NONE, IMU_ICM42605_ALIGN);
 
-BUSDEV_REGISTER_SPI_TAG(busdev_bmi270, DEVHW_BMI270, GYRO_SPI_BUS, GYRO1_CS_PIN, NONE, 0, DEVFLAGS_NONE, IMU_BMI270_ALIGN);
-BUSDEV_REGISTER_SPI_TAG(busdev_bmi270_2, DEVHW_BMI270, GYRO_SPI_BUS, GYRO2_CS_PIN, NONE, 1, DEVFLAGS_NONE, IMU_BMI270_ALIGN);
+BUSDEV_REGISTER_SPI_TAG(busdev_bmi270, DEVHW_BMI270, GYRO_SPI_BUS, GYRO1_CS_PIN, GYRO1_EXTI_PIN, 0, DEVFLAGS_NONE, IMU_BMI270_ALIGN);
+BUSDEV_REGISTER_SPI_TAG(busdev_bmi270_2, DEVHW_BMI270, GYRO_SPI_BUS, GYRO2_CS_PIN, GYRO2_EXTI_PIN, 1, DEVFLAGS_NONE, IMU_BMI270_ALIGN);
 
 timerHardware_t timerHardware[] = {
     DEF_TIM(TIM8, CH3, PC8,  TIM_USE_OUTPUT_AUTO, 0, 0), // S1
diff --git a/src/main/target/HAKRCF722V2/target.h b/src/main/target/HAKRCF722V2/target.h
index 52c07b6545a..814cfa65d5a 100644
--- a/src/main/target/HAKRCF722V2/target.h
+++ b/src/main/target/HAKRCF722V2/target.h
@@ -63,7 +63,9 @@
 
 #define GYRO_SPI_BUS         BUS_SPI1
 #define GYRO1_CS_PIN          SPI1_NSS1_PIN
+#define GYRO1_EXTI_PIN          PC4
 #define GYRO2_CS_PIN          SPI1_NSS2_PIN
+#define GYRO2_EXTI_PIN          PB10
 
 // MPU6000
 #define USE_IMU_MPU6000
diff --git a/src/main/target/HGLRCF405V2/target.h b/src/main/target/HGLRCF405V2/target.h
index 9f3a02b48f7..8d427eedb2c 100644
--- a/src/main/target/HGLRCF405V2/target.h
+++ b/src/main/target/HGLRCF405V2/target.h
@@ -66,6 +66,7 @@
 #define IMU_ICM42605_ALIGN       CW270_DEG
 #define ICM42605_SPI_BUS         BUS_SPI1
 #define ICM42605_CS_PIN          SPI1_NSS_PIN
+#define ICM42605_EXTI_PIN       PC4
 
 /*** OSD ***/
 #define USE_MAX7456
diff --git a/src/main/target/HUMMINGBIRD_FC305/target.c b/src/main/target/HUMMINGBIRD_FC305/target.c
index 476d31c71b3..e2fe703a85f 100644
--- a/src/main/target/HUMMINGBIRD_FC305/target.c
+++ b/src/main/target/HUMMINGBIRD_FC305/target.c
@@ -24,7 +24,7 @@
 #include "drivers/bus.h"
 #include "drivers/sensor.h"
 
-BUSDEV_REGISTER_SPI_TAG(busdev_icm42688, DEVHW_ICM42605, ICM42605_SPI_BUS, ICM42605_CS_PIN, NONE, 0, DEVFLAGS_NONE, IMU_ICM42605_ALIGN);
+BUSDEV_REGISTER_SPI_TAG(busdev_icm42688, DEVHW_ICM42605, ICM42605_SPI_BUS, ICM42605_CS_PIN, ICM42605_EXTI_PIN, 0, DEVFLAGS_NONE, IMU_ICM42605_ALIGN);
 BUSDEV_REGISTER_SPI(busdev_sdcard_spi,  DEVHW_SDCARD,       SDCARD_SPI_BUS,     SDCARD_CS_PIN,      NONE,           DEVFLAGS_SPI_MODE_0,  0);
 BUSDEV_REGISTER_SPI(busdev_max7456,    DEVHW_MAX7456,  MAX7456_SPI_BUS,    MAX7456_CS_PIN, NONE, DEVFLAGS_USE_RAW_REGISTERS,  0);
 BUSDEV_REGISTER_I2C(busdev_dps310_0,   DEVHW_DPS310_0,     BARO_I2C_BUS,       DPS310_I2C_ADDR,               NONE,           DEVFLAGS_NONE,      0);
diff --git a/src/main/target/HUMMINGBIRD_FC305/target.h b/src/main/target/HUMMINGBIRD_FC305/target.h
index 7b121a775b2..52fd3e7fddf 100644
--- a/src/main/target/HUMMINGBIRD_FC305/target.h
+++ b/src/main/target/HUMMINGBIRD_FC305/target.h
@@ -46,6 +46,7 @@
 #define IMU_ICM42605_ALIGN      CW0_DEG
 #define ICM42605_SPI_BUS        BUS_SPI2
 #define ICM42605_CS_PIN         SPI2_NSS_PIN
+#define ICM42605_EXTI_PIN       PB6
 
 // *************** I2C /Baro/Mag *********************
 #define USE_I2C
diff --git a/src/main/target/IFLIGHT_BLITZ_F722/target.h b/src/main/target/IFLIGHT_BLITZ_F722/target.h
index cea6b4422ac..bac54b97841 100644
--- a/src/main/target/IFLIGHT_BLITZ_F722/target.h
+++ b/src/main/target/IFLIGHT_BLITZ_F722/target.h
@@ -46,6 +46,7 @@
 #define IMU_ICM42605_ALIGN      CW0_DEG
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define ICM42605_CS_PIN         PA4
+#define ICM42605_EXTI_PIN       PC4
 
 // *************** I2C /Baro/Mag *********************
 #define USE_I2C
diff --git a/src/main/target/IFLIGHT_BLITZ_F722_X1/target.h b/src/main/target/IFLIGHT_BLITZ_F722_X1/target.h
index 03196254420..200ec9c14c7 100644
--- a/src/main/target/IFLIGHT_BLITZ_F722_X1/target.h
+++ b/src/main/target/IFLIGHT_BLITZ_F722_X1/target.h
@@ -42,6 +42,7 @@
 #define IMU_ICM42605_ALIGN      CW90_DEG_FLIP
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define ICM42605_CS_PIN         PA4
+#define ICM42605_EXTI_PIN       PC4
 
 // *************** I2C /Baro/Mag *********************
 #define USE_I2C
diff --git a/src/main/target/IFLIGHT_BLITZ_F7_AIO/target.h b/src/main/target/IFLIGHT_BLITZ_F7_AIO/target.h
index 69ea37e5357..aac23727644 100644
--- a/src/main/target/IFLIGHT_BLITZ_F7_AIO/target.h
+++ b/src/main/target/IFLIGHT_BLITZ_F7_AIO/target.h
@@ -67,6 +67,7 @@
 #define IMU_ICM42605_ALIGN      CW0_DEG
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define ICM42605_CS_PIN         SPI1_NSS_PIN
+#define ICM42605_EXTI_PIN       PD0
 
 // *************** I2C/Baro/Mag *********************
 #define USE_I2C
diff --git a/src/main/target/JHEF405PRO/target.h b/src/main/target/JHEF405PRO/target.h
index 43547cd2efa..4d288f83a44 100644
--- a/src/main/target/JHEF405PRO/target.h
+++ b/src/main/target/JHEF405PRO/target.h
@@ -33,6 +33,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW90_DEG
 #define ICM42605_CS_PIN         PB12
+#define ICM42605_EXTI_PIN       GYRO_INT_EXTI
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 #define USE_EXTI
diff --git a/src/main/target/KAKUTEF4/target.h b/src/main/target/KAKUTEF4/target.h
index 92cbcf13414..345b3fa5a3a 100644
--- a/src/main/target/KAKUTEF4/target.h
+++ b/src/main/target/KAKUTEF4/target.h
@@ -60,6 +60,9 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN       CW270_DEG
 #define ICM42605_CS_PIN          PC4
+#if defined(KAKUTEF4) || defined(KAKUTEF4V2)
+#define ICM42605_EXTI_PIN       PC5
+#endif
 #define ICM42605_SPI_BUS         BUS_SPI1
 
 #if defined(KAKUTEF4V2) || defined(KAKUTEF4V23) || defined(KAKUTEF4V24)
diff --git a/src/main/target/KAKUTEF4WING/target.h b/src/main/target/KAKUTEF4WING/target.h
index 70eb125646a..fde9f45fbd8 100644
--- a/src/main/target/KAKUTEF4WING/target.h
+++ b/src/main/target/KAKUTEF4WING/target.h
@@ -37,7 +37,7 @@
 #define IMU_ICM42605_ALIGN       CW270_DEG
 #define ICM42605_SPI_BUS         BUS_SPI1
 #define ICM42605_CS_PIN          PA4
-#define ICM42605_EXTI_PIN        PB12
+#define ICM42605_EXTI_PIN        PB2
 
 // *************** I2C ****************
 #define USE_I2C     
diff --git a/src/main/target/MAMBAF405_2022A/target.h b/src/main/target/MAMBAF405_2022A/target.h
index 5a24771288d..8f836ff378e 100644
--- a/src/main/target/MAMBAF405_2022A/target.h
+++ b/src/main/target/MAMBAF405_2022A/target.h
@@ -60,6 +60,7 @@
 #define IMU_ICM42605_ALIGN      CW270_DEG
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define ICM42605_CS_PIN         SPI1_NSS_PIN
+#define ICM42605_EXTI_PIN       PC4
 
 #endif
 
diff --git a/src/main/target/MAMBAF722_2022A/target.h b/src/main/target/MAMBAF722_2022A/target.h
index cf834b11ea6..617aae32305 100644
--- a/src/main/target/MAMBAF722_2022A/target.h
+++ b/src/main/target/MAMBAF722_2022A/target.h
@@ -64,6 +64,7 @@
 #define IMU_ICM42605_ALIGN      CW270_DEG
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define ICM42605_CS_PIN         SPI1_NSS_PIN
+#define ICM42605_EXTI_PIN       PC4
 
 #endif
 
diff --git a/src/main/target/MATEKF405SE/target.h b/src/main/target/MATEKF405SE/target.h
index 38c8f56f5d9..3a5cbb58142 100644
--- a/src/main/target/MATEKF405SE/target.h
+++ b/src/main/target/MATEKF405SE/target.h
@@ -46,6 +46,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW0_DEG_FLIP
 #define ICM42605_CS_PIN         PA4
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 // *************** I2C /Baro/Mag *********************
diff --git a/src/main/target/MATEKF405TE/target.h b/src/main/target/MATEKF405TE/target.h
index fc7c1ad0ce9..2cdc3aadb57 100644
--- a/src/main/target/MATEKF405TE/target.h
+++ b/src/main/target/MATEKF405TE/target.h
@@ -45,6 +45,7 @@
 #define IMU_ICM42605_ALIGN      CW270_DEG_FLIP
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define ICM42605_CS_PIN         PC14
+#define ICM42605_EXTI_PIN       PC15
 
 #define USE_IMU_BMI270
 #define IMU_BMI270_ALIGN        CW270_DEG_FLIP
diff --git a/src/main/target/PRINCIPIOTF7/target.h b/src/main/target/PRINCIPIOTF7/target.h
index 0208f55a361..5e241023fde 100644
--- a/src/main/target/PRINCIPIOTF7/target.h
+++ b/src/main/target/PRINCIPIOTF7/target.h
@@ -113,6 +113,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW90_DEG
 #define ICM42605_CS_PIN         PB2
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 // BARO
diff --git a/src/main/target/RADIOLINKF405/target.h b/src/main/target/RADIOLINKF405/target.h
index 9a1afd47739..270a6f6309e 100644
--- a/src/main/target/RADIOLINKF405/target.h
+++ b/src/main/target/RADIOLINKF405/target.h
@@ -39,6 +39,7 @@
 #define IMU_ICM42605_ALIGN      CW180_DEG
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define ICM42605_CS_PIN         SPI1_NSS_PIN
+#define ICM42605_EXTI_PIN       PC4
 
 #define USE_IMU_BMI270
 #define IMU_BMI270_ALIGN        CW90_DEG
diff --git a/src/main/target/RADIOLINKF722/target.c b/src/main/target/RADIOLINKF722/target.c
index 6ebb384b046..8da44a3497c 100644
--- a/src/main/target/RADIOLINKF722/target.c
+++ b/src/main/target/RADIOLINKF722/target.c
@@ -29,7 +29,7 @@
 #include "drivers/sensor.h"
 
 BUSDEV_REGISTER_SPI_TAG(busdev_bmi270,   DEVHW_BMI270,  BMI270_SPI_BUS,   BMI270_CS_PIN,   NONE,   0,  DEVFLAGS_NONE,  IMU_BMI270_ALIGN);
-BUSDEV_REGISTER_SPI_TAG(busdev_icm42688, DEVHW_ICM42605, ICM42688_SPI_BUS, ICM42688_CS_PIN, NONE, 0, DEVFLAGS_NONE, IMU_ICM42605_ALIGN);
+BUSDEV_REGISTER_SPI_TAG(busdev_icm42688, DEVHW_ICM42605, ICM42688_SPI_BUS, ICM42688_CS_PIN, ICM42688_EXTI_PIN, 0, DEVFLAGS_NONE, IMU_ICM42605_ALIGN);
 
 timerHardware_t timerHardware[] = {
 
diff --git a/src/main/target/RADIOLINKF722/target.h b/src/main/target/RADIOLINKF722/target.h
index efa3bdea750..e7345bfee38 100644
--- a/src/main/target/RADIOLINKF722/target.h
+++ b/src/main/target/RADIOLINKF722/target.h
@@ -76,6 +76,7 @@
 #define IMU_ICM42605_ALIGN       CW180_DEG
 #define ICM42688_SPI_BUS         BUS_SPI1
 #define ICM42688_CS_PIN          PB2
+#define ICM42688_EXTI_PIN       PC4
 
 //BMI270
 #define USE_IMU_BMI270
diff --git a/src/main/target/SKYSTARSF405HD/target.h b/src/main/target/SKYSTARSF405HD/target.h
index c3711fcb4c2..65767a4332d 100644
--- a/src/main/target/SKYSTARSF405HD/target.h
+++ b/src/main/target/SKYSTARSF405HD/target.h
@@ -46,6 +46,9 @@
 #define USE_IMU_ICM42605
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define ICM42605_CS_PIN         PA4
+#if defined(SKYSTARSF405AIO)
+#define ICM42605_EXTI_PIN       PC4
+#endif
 
 // *************** M25P256 flash ********************
 #define USE_FLASHFS
diff --git a/src/main/target/SKYSTARSF405V2/target.h b/src/main/target/SKYSTARSF405V2/target.h
index 1fe4e2614c4..1591e4ff3e3 100644
--- a/src/main/target/SKYSTARSF405V2/target.h
+++ b/src/main/target/SKYSTARSF405V2/target.h
@@ -37,6 +37,7 @@
 #define SPI1_MOSI_PIN	        PA7
 
 #define ICM42605_CS_PIN         PA4
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS        BUS_SPI1
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW270_DEG
diff --git a/src/main/target/SOLOGOODF722/target.h b/src/main/target/SOLOGOODF722/target.h
index dd017691ef3..b89527a7b71 100644
--- a/src/main/target/SOLOGOODF722/target.h
+++ b/src/main/target/SOLOGOODF722/target.h
@@ -49,6 +49,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW180_DEG
 #define ICM42605_CS_PIN         SPI1_NSS_PIN
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 // *************** I2C/Baro/Mag *********************
diff --git a/src/main/target/SPEDIXF405/target.h b/src/main/target/SPEDIXF405/target.h
index 3f46890b48d..0140dfebd03 100644
--- a/src/main/target/SPEDIXF405/target.h
+++ b/src/main/target/SPEDIXF405/target.h
@@ -48,6 +48,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW0_DEG
 #define ICM42605_CS_PIN         SPI1_NSS_PIN
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 // *************** I2C/Baro/Mag *********************
diff --git a/src/main/target/SPEDIXF722/target.h b/src/main/target/SPEDIXF722/target.h
index 511381587a0..c6d9ab071c7 100644
--- a/src/main/target/SPEDIXF722/target.h
+++ b/src/main/target/SPEDIXF722/target.h
@@ -49,6 +49,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW0_DEG
 #define ICM42605_CS_PIN         SPI1_NSS_PIN
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 // *************** I2C/Baro/Mag *********************
diff --git a/src/main/target/SPEEDYBEEF405MINI/target.h b/src/main/target/SPEEDYBEEF405MINI/target.h
index c20ee9aa0ff..52541254a31 100644
--- a/src/main/target/SPEEDYBEEF405MINI/target.h
+++ b/src/main/target/SPEEDYBEEF405MINI/target.h
@@ -94,6 +94,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW270_DEG
 #define ICM42605_CS_PIN         PA4
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 /*
diff --git a/src/main/target/SPEEDYBEEF405V4/target.c b/src/main/target/SPEEDYBEEF405V4/target.c
index 2d398bd1bbe..926589f4482 100644
--- a/src/main/target/SPEEDYBEEF405V4/target.c
+++ b/src/main/target/SPEEDYBEEF405V4/target.c
@@ -32,7 +32,7 @@
 #include "drivers/pinio.h"
 #include "drivers/sensor.h"
 
-BUSDEV_REGISTER_SPI_TAG(busdev_icm42688,  DEVHW_ICM42605, ICM42605_SPI_BUS,  ICM42605_CS_PIN,  NONE,  0,  DEVFLAGS_NONE,  IMU_ICM42605_ALIGN);
+BUSDEV_REGISTER_SPI_TAG(busdev_icm42688,  DEVHW_ICM42605, ICM42605_SPI_BUS,  ICM42605_CS_PIN,  ICM42605_EXTI_PIN,  0,  DEVFLAGS_NONE,  IMU_ICM42605_ALIGN);
 
 timerHardware_t timerHardware[] = {
     DEF_TIM(TIM4,   CH1, PB6,  TIM_USE_OUTPUT_AUTO, 1, 0), // S1
diff --git a/src/main/target/SPEEDYBEEF405V4/target.h b/src/main/target/SPEEDYBEEF405V4/target.h
index 1c5c847597f..2130ddde499 100644
--- a/src/main/target/SPEEDYBEEF405V4/target.h
+++ b/src/main/target/SPEEDYBEEF405V4/target.h
@@ -88,6 +88,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW90_DEG
 #define ICM42605_CS_PIN         PA4
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 // *************** I2C(Baro & I2C) **************************
diff --git a/src/main/target/TAKERF722SE/target.h b/src/main/target/TAKERF722SE/target.h
index 599d5610ad4..09007ab930e 100644
--- a/src/main/target/TAKERF722SE/target.h
+++ b/src/main/target/TAKERF722SE/target.h
@@ -104,6 +104,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW0_DEG
 #define ICM42605_CS_PIN         PA4
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 // *************** I2C/Baro/Mag *********************
diff --git a/src/main/target/TMOTORF7/target.h b/src/main/target/TMOTORF7/target.h
index a62b42d0990..109b998f134 100644
--- a/src/main/target/TMOTORF7/target.h
+++ b/src/main/target/TMOTORF7/target.h
@@ -47,6 +47,9 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW0_DEG
 #define ICM42605_CS_PIN         PA4
+#ifdef TMOTORF7
+#define ICM42605_EXTI_PIN       PC4
+#endif
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 #define USE_IMU_BMI270
diff --git a/src/main/target/TMOTORF7V2/target.h b/src/main/target/TMOTORF7V2/target.h
index f5def98a403..2a37231dff3 100644
--- a/src/main/target/TMOTORF7V2/target.h
+++ b/src/main/target/TMOTORF7V2/target.h
@@ -70,6 +70,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW0_DEG
 #define ICM42605_CS_PIN         PA4
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 // OSD -- SPI2
diff --git a/src/main/target/TMOTORVELOXF7V2/target.h b/src/main/target/TMOTORVELOXF7V2/target.h
index 09f30857ec8..9207e5e88e5 100644
--- a/src/main/target/TMOTORVELOXF7V2/target.h
+++ b/src/main/target/TMOTORVELOXF7V2/target.h
@@ -50,6 +50,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN      CW270_DEG
 #define ICM42605_CS_PIN         PB2
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS        BUS_SPI1
 
 
diff --git a/src/main/target/WARPF7/target.h b/src/main/target/WARPF7/target.h
index e06d6e2ae1d..b535af98f33 100644
--- a/src/main/target/WARPF7/target.h
+++ b/src/main/target/WARPF7/target.h
@@ -107,6 +107,7 @@
 #define USE_IMU_ICM42605
 #define IMU_ICM42605_ALIGN          CW270_DEG
 #define ICM42605_CS_PIN             PA4
+#define ICM42605_EXTI_PIN       PC4
 #define ICM42605_SPI_BUS            BUS_SPI1
 
 // BARO
diff --git a/src/main/target/common.h b/src/main/target/common.h
index 5239e5ac65e..1096b56b74a 100644
--- a/src/main/target/common.h
+++ b/src/main/target/common.h
@@ -18,7 +18,7 @@
 #pragma once
 
 // SPI reads started by a device's data-ready interrupt (drivers/bus_spi_data_ready.c)
-#if defined(STM32H7)
+#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
 #define USE_SPI_DATA_READY
 #endif