Apparent clock jumps ?

[jongena]

Sometimes the clock seems to be delayed. I first noticed it when studying circuits with D flip flops, but it generally seems to happen when an input makes a transition at the same moment as the clock signal goes up or down. See e.g. the picture below as an illustration in the minimal case where I have just an input and a clock with no circuit attached. Why does it happen ? What can be done to avoid it ?

[hneemann]

Please see #359

[jongena]

Many thanks for the very quick answer, all is understood !
With best regards,

Jef Ongena