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add bench, small changes
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6 files changed

+68
-10
lines changed

6 files changed

+68
-10
lines changed

Cargo.toml

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,4 +21,5 @@ travis-ci = { repository = "hellow554/logical-rs" }
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chrono = "0.4"
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[dev-dependencies]
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proptest = "0.6"
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proptest = "0.6"
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pretty_assertions = "0.5"

benches/logicvector.rs

Lines changed: 54 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,54 @@
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#![feature(test)]
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extern crate test;
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use logical::Ieee1164;
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use logical::LogicVector;
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use test::black_box as bb;
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use test::Bencher;
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const NITER: u128 = 10_000;
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#[bench]
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fn create_from_int(b: &mut Bencher) {
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b.iter(|| {
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for i in 0..NITER {
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bb(LogicVector::from_int_value(i, 128));
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}
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});
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}
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#[bench]
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fn create_from_vec(b: &mut Bencher) {
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b.iter(|| {
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for i in 0..NITER {
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bb(LogicVector::from(vec![Ieee1164::_U; (i % 128) as usize]));
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}
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})
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}
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#[bench]
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fn create_from_str(b: &mut Bencher) {
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b.iter(|| {
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for i in 0..NITER {
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bb("U".repeat((i % 128) as usize));
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}
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})
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}
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#[bench]
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fn create_width(b: &mut Bencher) {
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b.iter(|| {
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for i in 0..NITER {
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bb(LogicVector::with_width((i % 128) as usize + 1));
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}
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})
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}
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#[bench]
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fn to_u128(b: &mut Bencher) {
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b.iter(|| {
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for i in 0..NITER {
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assert_eq!(Some(i), bb(LogicVector::from_int_value(i, 128)).unwrap().as_u128());
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}
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})
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}

src/lib.rs

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -71,6 +71,10 @@
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//! assert_eq!(Ieee1164::_0, to.value());
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//! ```
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#[cfg(test)]
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#[macro_use]
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extern crate pretty_assertions;
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#[macro_use]
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mod mac;
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mod circuit;

src/logicbit/logicvector.rs

Lines changed: 8 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -264,7 +264,6 @@ mod tests {
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proptest! {
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#[test]
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#[ignore]
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fn atm_ctor_value(value in 0u64..) {
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let v = LogicVector::with_value(value as u128, 128);
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prop_assert!(v.is_some());
@@ -278,14 +277,14 @@ mod tests {
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let v = LogicVector::with_width(width);
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assert_eq!(width, v.width());
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assert!(v.has_U(), "{:?}", v);
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assert!(!v.has_X());
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assert!(!v.has_0());
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assert!(!v.has_1());
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assert!(!v.has_Z());
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assert!(!v.has_W());
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assert!(!v.has_D());
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assert!(!v.has_L());
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assert!(!v.has_H());
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assert!(!v.has_X(), "{:?}", v);
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assert!(!v.has_0(), "{:?}", v);
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assert!(!v.has_1(), "{:?}", v);
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assert!(!v.has_Z(), "{:?}", v);
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assert!(!v.has_W(), "{:?}", v);
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assert!(!v.has_D(), "{:?}", v);
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assert!(!v.has_L(), "{:?}", v);
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assert!(!v.has_H(), "{:?}", v);
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}
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}
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src/models/rtlib/inputs/ivector.rs

Whitespace-only changes.

src/models/rtlib/inputs/mod.rs

Whitespace-only changes.

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