From fde2eb7aea2b169090e8446dc875d019c7bbaf47 Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Tue, 8 May 2018 14:16:12 +0530 Subject: [PATCH] Add mainline kernel device tree support Enabling the mainline kernel support also generate the fixed clocks for the peripherals. Signed-off-by: Venkatesh Yadav Abbarapu Acked-by: Michal Simek --- ams/data/ams.tcl | 13 +-- axi_cdma/data/axi_cdma.tcl | 31 ++++--- axi_dma/data/axi_dma.tcl | 124 ++++++++++++++++++++------- axi_vdma/data/axi_vdma.tcl | 48 ++++++----- cpu_cortexa53/data/cpu_cortexa53.tcl | 8 +- device_tree/data/common_proc.tcl | 70 +++++++++++---- device_tree/data/device_tree.mld | 2 + device_tree/data/device_tree.tcl | 61 +++++++++---- dp/data/dp.tcl | 14 +-- usbps/data/usbps.tcl | 9 +- 10 files changed, 265 insertions(+), 115 deletions(-) diff --git a/ams/data/ams.tcl b/ams/data/ams.tcl index bd48e079..e88200f4 100644 --- a/ams/data/ams.tcl +++ b/ams/data/ams.tcl @@ -20,10 +20,13 @@ proc generate {drv_handle} { break } } - set ams_list "ams_ps ams_pl" - set dts_file [get_property CONFIG.pcw_dts [get_os]] - foreach ams_name ${ams_list} { - set ams_node [add_or_get_dt_node -n "&${ams_name}" -d $dts_file] - hsi::utils::add_new_dts_param "${ams_node}" "status" "okay" string + set mainline_ker [get_property CONFIG.mainline_kernel [get_os]] + if {[string match -nocase $mainline_ker "none"]} { + set ams_list "ams_ps ams_pl" + set dts_file [get_property CONFIG.pcw_dts [get_os]] + foreach ams_name ${ams_list} { + set ams_node [add_or_get_dt_node -n "&${ams_name}" -d $dts_file] + hsi::utils::add_new_dts_param "${ams_node}" "status" "okay" string + } } } diff --git a/axi_cdma/data/axi_cdma.tcl b/axi_cdma/data/axi_cdma.tcl index e3d0d02b..79093c4e 100644 --- a/axi_cdma/data/axi_cdma.tcl +++ b/axi_cdma/data/axi_cdma.tcl @@ -45,19 +45,24 @@ proc generate {drv_handle} { set tx_chan [add_dma_channel $drv_handle $node "axi-cdma" $baseaddr "MM2S" $cdma_count ] incr cdma_count hsi::utils::set_os_parameter_value "cdma_count" $cdma_count - set proc_type [get_sw_proc_prop IP_NAME] - switch $proc_type { - "psu_cortexa53" { - update_clk_node $drv_handle "s_axi_lite_aclk m_axi_aclk" - } "ps7_cortexa9" { - update_zynq_clk_node $drv_handle "s_axi_lite_aclk m_axi_aclk" - } "microblaze" { - gen_dev_ccf_binding $drv_handle "s_axi_lite_aclk m_axi_aclk" - set_drv_prop_if_empty $drv_handle "clock-names" "s_axi_lite_aclk m_axi_aclk" stringlist - } - default { - error "Unknown arch" + set mainline_ker [get_property CONFIG.mainline_kernel [get_os]] + if {[string match -nocase $mainline_ker "none"]} { + set proc_type [get_sw_proc_prop IP_NAME] + switch $proc_type { + "psu_cortexa53" { + update_clk_node $drv_handle "s_axi_lite_aclk m_axi_aclk" + } "ps7_cortexa9" { + update_zynq_clk_node $drv_handle "s_axi_lite_aclk m_axi_aclk" + } "microblaze" { + gen_dev_ccf_binding $drv_handle "s_axi_lite_aclk m_axi_aclk" + set_drv_prop_if_empty $drv_handle "clock-names" "s_axi_lite_aclk m_axi_aclk" stringlist + } + default { + error "Unknown arch" + } } + } else { + generate_clk_nodes $drv_handle } } @@ -113,7 +118,7 @@ proc generate_clk_nodes {drv_handle} { hsi::utils::add_new_dts_param "${misc_clk_node}" "#clock-cells" 0 int hsi::utils::add_new_dts_param "${misc_clk_node}" "clock-frequency" $clk_freq int set clk_refs [lappend clk_refs misc_clk_${bus_clk_cnt}] - set_drv_prop_if_empty $drv_handle "clocks" "$clk_refs &$clk_refs" reference + set_drv_prop_if_empty $drv_handle "clocks" "$clk_refs>, <&$clk_refs" reference set_drv_prop_if_empty $drv_handle "clock-names" "s_axi_lite_aclk m_axi_aclk" stringlist } "microblaze" { gen_dev_ccf_binding $drv_handle "s_axi_lite_aclk m_axi_aclk" diff --git a/axi_dma/data/axi_dma.tcl b/axi_dma/data/axi_dma.tcl index 759bae51..2be7e853 100644 --- a/axi_dma/data/axi_dma.tcl +++ b/axi_dma/data/axi_dma.tcl @@ -101,26 +101,30 @@ proc generate {drv_handle} { } incr dma_count hsi::utils::set_os_parameter_value "dma_count" $dma_count - set proc_type [get_sw_proc_prop IP_NAME] - set clocknames "s_axi_lite_aclk" - if { $axiethernetfound != 1 } { - append clocknames " " "m_axi_sg_aclk" - } - if { $tx_chan ==1 } { - append clocknames " " "m_axi_mm2s_aclk" - } - if { $rx_chan ==1 } { - append clocknames " " "m_axi_s2mm_aclk" - } - set clkname_len [llength $clocknames] - if {[string match -nocase $proc_type "psu_cortexa53"]} { - update_clk_node $drv_handle $clocknames $clkname_len - } elseif {[string match -nocase $proc_type "ps7_cortexa9"]} { - update_zynq_clk_node $drv_handle $clocknames $clkname_len - } elseif {[string match -nocase $proc_type "microblaze"]} { - generate_clk_nodes $drv_handle $axiethernetfound $tx_chan $rx_chan + set mainline_ker [get_property CONFIG.mainline_kernel [get_os]] + if {[string match -nocase $mainline_ker "none"]} { + set proc_type [get_sw_proc_prop IP_NAME] + set clocknames "s_axi_lite_aclk" + if { $axiethernetfound != 1 } { + append clocknames " " "m_axi_sg_aclk" + } + if { $tx_chan ==1 } { + append clocknames " " "m_axi_mm2s_aclk" + } + if { $rx_chan ==1 } { + append clocknames " " "m_axi_s2mm_aclk" + } + set clkname_len [llength $clocknames] + if {[string match -nocase $proc_type "psu_cortexa53"]} { + update_clk_node $drv_handle $clocknames $clkname_len + } elseif {[string match -nocase $proc_type "ps7_cortexa9"]} { + update_zynq_clk_node $drv_handle $clocknames $clkname_len + } elseif {[string match -nocase $proc_type "microblaze"]} { + generate_clk_nodes $drv_handle $axiethernetfound $tx_chan $rx_chan + } + } else { + generate_clk_nodes $drv_handle $axiethernetfound $tx_chan $rx_chan } - } proc add_dma_channel {drv_handle parent_node xdma addr mode devid} { @@ -173,18 +177,80 @@ proc add_dma_coherent_prop {drv_handle intf} { } proc generate_clk_nodes {drv_handle axiethernetfound tx_chan rx_chan} { + set proc_type [get_sw_proc_prop IP_NAME] set clocknames "s_axi_lite_aclk" - if { $axiethernetfound != 1 } { - append clocknames " " "m_axi_sg_aclk" - } - if { $tx_chan ==1 } { - append clocknames " " "m_axi_mm2s_aclk" - } - if { $rx_chan ==1 } { - append clocknames " " "m_axi_s2mm_aclk" + switch $proc_type { + "ps7_cortexa9" { + set clocks "clkc 15" + if { $axiethernetfound != 1 } { + append clocknames " " "m_axi_sg_aclk" + append clocks "" ">, <&clkc 15" + } + if { $tx_chan ==1 } { + append clocknames " " "m_axi_mm2s_aclk" + append clocks "" ">, <&clkc 15" + } + if { $rx_chan ==1 } { + append clocknames " " "m_axi_s2mm_aclk" + append clocks "" ">, <&clkc 15" + } + set_drv_prop_if_empty $drv_handle "clocks" $clocks reference + set_drv_prop_if_empty $drv_handle "clock-names" $clocknames stringlist + } "psu_cortexa53" { + foreach i [get_sw_cores device_tree] { + set common_tcl_file "[get_property "REPOSITORY" $i]/data/common_proc.tcl" + if {[file exists $common_tcl_file]} { + source $common_tcl_file + break + } + } + set clk_freq [get_clock_frequency [get_cells -hier $drv_handle] "s_axi_lite_aclk"] + if {![string equal $clk_freq ""]} { + if {[lsearch $bus_clk_list $clk_freq] < 0} { + set bus_clk_list [lappend bus_clk_list $clk_freq] + } + } + set bus_clk_cnt [lsearch -exact $bus_clk_list $clk_freq] + set dts_file [current_dt_tree] + set bus_node [add_or_get_bus_node $drv_handle $dts_file] + set misc_clk_node [add_or_get_dt_node -n "misc_clk_${bus_clk_cnt}" -l "misc_clk_${bus_clk_cnt}" \ + -d ${dts_file} -p ${bus_node}] + hsi::utils::add_new_dts_param "${misc_clk_node}" "compatible" "fixed-clock" stringlist + hsi::utils::add_new_dts_param "${misc_clk_node}" "#clock-cells" 0 int + hsi::utils::add_new_dts_param "${misc_clk_node}" "clock-frequency" $clk_freq int + set clk_refs [lappend clk_refs misc_clk_${bus_clk_cnt}] + set clocks "$clk_refs" + if { $axiethernetfound != 1 } { + append clocknames " " "m_axi_sg_aclk" + append clocks "" ">, <&$clk_refs" + } + if { $tx_chan ==1 } { + append clocknames " " "m_axi_mm2s_aclk" + append clocks "" ">, <&$clk_refs" + } + if { $rx_chan ==1 } { + append clocknames " " "m_axi_s2mm_aclk" + append clocks "" ">, <&$clk_refs" + } + set_drv_prop_if_empty $drv_handle "clocks" "$clocks" reference + set_drv_prop_if_empty $drv_handle "clock-names" "$clocknames" stringlist + } "microblaze" { + if { $axiethernetfound != 1 } { + append clocknames " " "m_axi_sg_aclk" + } + if { $tx_chan ==1 } { + append clocknames " " "m_axi_mm2s_aclk" + } + if { $rx_chan ==1 } { + append clocknames " " "m_axi_s2mm_aclk" + } + gen_dev_ccf_binding $drv_handle "$clocknames" + set_drv_prop_if_empty $drv_handle "clock-names" "$clocknames" stringlist + } + default { + error "Unknown arch" + } } - gen_dev_ccf_binding $drv_handle "$clocknames" - set_drv_prop_if_empty $drv_handle "clock-names" "$clocknames" stringlist } proc get_connected_ip {drv_handle dma_pin} { diff --git a/axi_vdma/data/axi_vdma.tcl b/axi_vdma/data/axi_vdma.tcl index 0adfd63e..32f06be6 100644 --- a/axi_vdma/data/axi_vdma.tcl +++ b/axi_vdma/data/axi_vdma.tcl @@ -85,30 +85,34 @@ proc generate {drv_handle} { } incr vdma_count hsi::utils::set_os_parameter_value "vdma_count" $vdma_count - generate_clk_nodes $drv_handle $tx_chan $rx_chan - set proc_type [get_sw_proc_prop IP_NAME] - set clocknames "s_axi_lite_aclk" - if { $tx_chan ==1 } { - append clocknames " " "m_axi_mm2s_aclk" - append clocknames " " "m_axi_mm2s_aclk" - } - if { $rx_chan ==1 } { - append clocknames " " "m_axi_s2mm_aclk" - append clocknames " " "m_axi_s2mm_aclk" - } - set clkname_len [llength $clocknames] - switch $proc_type { - "psu_cortexa53" { - update_clk_node $drv_handle $clocknames $clkname_len - } "ps7_cortexa9" { - update_zynq_clk_node $drv_handle $clocknames $clkname_len - } "microblaze" { - gen_dev_ccf_binding $drv_handle "$clocknames" - set_drv_prop_if_empty $drv_handle "clock-names" "$clocknames" stringlist + set mainline_ker [get_property CONFIG.mainline_kernel [get_os]] + if {[string match -nocase $mainline_ker "none"]} { + set proc_type [get_sw_proc_prop IP_NAME] + set clocknames "s_axi_lite_aclk" + if { $tx_chan ==1 } { + append clocknames " " "m_axi_mm2s_aclk" + append clocknames " " "m_axi_mm2s_aclk" + } + if { $rx_chan ==1 } { + append clocknames " " "m_axi_s2mm_aclk" + append clocknames " " "m_axi_s2mm_aclk" } - default { - error "Unknown arch" + set clkname_len [llength $clocknames] + switch $proc_type { + "psu_cortexa53" { + update_clk_node $drv_handle $clocknames $clkname_len + } "ps7_cortexa9" { + update_zynq_clk_node $drv_handle $clocknames $clkname_len + } "microblaze" { + gen_dev_ccf_binding $drv_handle "$clocknames" + set_drv_prop_if_empty $drv_handle "clock-names" "$clocknames" stringlist + } + default { + error "Unknown arch" + } } + } else { + generate_clk_nodes $drv_handle $tx_chan $rx_chan } } diff --git a/cpu_cortexa53/data/cpu_cortexa53.tcl b/cpu_cortexa53/data/cpu_cortexa53.tcl index 921c8d18..6e0fa362 100644 --- a/cpu_cortexa53/data/cpu_cortexa53.tcl +++ b/cpu_cortexa53/data/cpu_cortexa53.tcl @@ -14,8 +14,12 @@ proc generate {drv_handle} { global dtsi_fname - set dtsi_fname "zynqmp/zynqmp.dtsi" - + set mainline_ker [get_property CONFIG.mainline_kernel [get_os]] + if {[string match -nocase "$mainline_ker" "v4.17"]} { + set dtsi_fname "zynqmp/zynqmp.dtsi" + } else { + set dtsi_fname "zynqmp/zynqmp.dtsi" + } foreach i [get_sw_cores device_tree] { set common_tcl_file "[get_property "REPOSITORY" $i]/data/common_proc.tcl" if {[file exists $common_tcl_file]} { diff --git a/device_tree/data/common_proc.tcl b/device_tree/data/common_proc.tcl index 3ad1bd20..b38e06fb 100644 --- a/device_tree/data/common_proc.tcl +++ b/device_tree/data/common_proc.tcl @@ -884,27 +884,48 @@ proc add_driver_prop {drv_handle dt_node prop} { proc create_dt_tree_from_dts_file {} { global def_string dtsi_fname set kernel_dtsi "" + set mainline_dtsi "" set kernel_ver [get_property CONFIG.kernel_version [get_os]] - foreach i [get_sw_cores device_tree] { - set kernel_dtsi [file normalize "[get_property "REPOSITORY" $i]/data/kernel_dtsi/${kernel_ver}/${dtsi_fname}"] - if {[file exists $kernel_dtsi]} { - foreach file [glob [file normalize [file dirname ${kernel_dtsi}]/*]] { - # NOTE: ./ works only if we did not change our directory - file copy -force $file ./ + set mainline_ker [get_property CONFIG.mainline_kernel [get_os]] + if {[string match -nocase $mainline_ker "v4.17"]} { + foreach i [get_sw_cores device_tree] { + set mainline_dtsi [file normalize "[get_property "REPOSITORY" $i]/data/kernel_dtsi/v4.17/${dtsi_fname}"] + if {[file exists $mainline_dtsi]} { + foreach file [glob [file normalize [file dirname ${mainline_dtsi}]/*]] { + # NOTE: ./ works only if we did not change our directory + file copy -force $file ./ + } + break + } + } + } else { + foreach i [get_sw_cores device_tree] { + set kernel_dtsi [file normalize "[get_property "REPOSITORY" $i]/data/kernel_dtsi/${kernel_ver}/${dtsi_fname}"] + if {[file exists $kernel_dtsi]} { + foreach file [glob [file normalize [file dirname ${kernel_dtsi}]/*]] { + # NOTE: ./ works only if we did not change our directory + file copy -force $file ./ + } + break } - break } - } - if {![file exists $kernel_dtsi] || [string_is_empty $kernel_dtsi]} { - error "Unable to find the dts file $kernel_dtsi" + if {![file exists $kernel_dtsi] || [string_is_empty $kernel_dtsi]} { + error "Unable to find the dts file $kernel_dtsi" + } } global zynq_soc_dt_tree set default_dts [create_dt_tree -dts_file $zynq_soc_dt_tree] - set fp [open $kernel_dtsi r] - set file_data [read $fp] - set data [split $file_data "\n"] + if {[string match -nocase $mainline_ker "v4.17"]} { + set fp [open $mainline_dtsi r] + set file_data [read $fp] + set data [split $file_data "\n"] + } else { + set fp [open $kernel_dtsi r] + set file_data [read $fp] + set data [split $file_data "\n"] + } set node_level -1 foreach line $data { @@ -1174,14 +1195,19 @@ proc zynq_gen_pl_clk_binding {drv_handle} { global bus_clk_list set proctype [get_property IP_NAME [get_cells -hier [get_sw_processor]]] # Assuming these device supports the clocks - set valid_ip_list "axi_ethernet axi_ethernet_buffer xadc_wiz" + set mainline_ker [get_property CONFIG.mainline_kernel [get_os]] + if {[string match -nocase $mainline_ker "v4.17"]} { + set valid_ip_list "axi_timer axi_uartlite axi_uart16550 axi_gpio axi_traffic_gen axi_ethernet axi_ethernet_buffer can canfd axi_iic xadc_wiz vcu" + } else { + set valid_ip_list "axi_ethernet axi_ethernet_buffer xadc_wiz" + } set valid_proc_list "ps7_cortexa9 psu_cortexa53" if {[lsearch -nocase $valid_proc_list $proctype] >= 0} { set iptype [get_property IP_NAME [get_cells -hier $drv_handle]] if {[lsearch $valid_ip_list $iptype] >= 0} { # FIXME: this is hardcoded - maybe dynamic detection # Keep the below logic, until we have clock frame work for ZynqMP - if {[string match -nocase $iptype "can"]} { + if {[string match -nocase $iptype "can"] || [string match -nocase $iptype "canfd"]} { set clks "can_clk s_axi_aclk" } elseif {[string match -nocase $iptype "vcu"]} { set clks "pll_ref_clk s_axi_lite_aclk" @@ -1205,12 +1231,14 @@ proc zynq_gen_pl_clk_binding {drv_handle} { hsi::utils::add_new_dts_param "${misc_clk_node}" "compatible" "fixed-clock" stringlist hsi::utils::add_new_dts_param "${misc_clk_node}" "#clock-cells" 0 int hsi::utils::add_new_dts_param "${misc_clk_node}" "clock-frequency" $clk_freq int - if {[string match -nocase $iptype "can"] || [string match -nocase $iptype "vcu"]} { + if {[string match -nocase $iptype "can"] || [string match -nocase $iptype "vcu"] || [string match -nocase $iptype "canfd"]} { set clocks [lindex $clk_refs 0] append clocks ">, <&[lindex $clk_refs 1]" set_drv_prop $drv_handle "clocks" "$clocks" reference + set_drv_prop_if_empty $drv_handle "clock-names" "$clks" stringlist } else { set_drv_prop_if_empty $drv_handle "clocks" $clk_refs reference + set_drv_prop_if_empty $drv_handle "clock-names" "$clks" stringlist } } } else { @@ -1500,6 +1528,10 @@ proc update_clk_node args { set axi 0 set is_clk_wiz 0 set is_pl_clk 0 + set mainline_ker [get_property CONFIG.mainline_kernel [get_os]] + if {[string match -nocase $mainline_ker "v4.17"]} { + return + } set iptype [get_property IP_NAME [get_cells -hier $drv_handle]] if {[string match -nocase $iptype "vcu"] || [string match -nocase $iptype "can"] || [string match -nocase $iptype "canfd"] || [string match -nocase $iptype "axi_cdma"]} { set vcu_clk_count [hsi::utils::get_os_parameter_value "vcu_clk_count"] @@ -2735,6 +2767,12 @@ proc gen_root_node {drv_handle} { "psu_cortexa53" { create_dt_tree_from_dts_file global dtsi_fname + set mainline_ker [get_property CONFIG.mainline_kernel [get_os]] + if {[string match -nocase $mainline_ker "v4.17"]} { + update_system_dts_include [file tail ${dtsi_fname}] + update_system_dts_include [file tail "zynqmp-clk.dtsi"] + return 0 + } update_system_dts_include [file tail ${dtsi_fname}] update_system_dts_include [file tail "zynqmp-clk-ccf.dtsi"] # no root_node required as zynqmp.dtsi diff --git a/device_tree/data/device_tree.mld b/device_tree/data/device_tree.mld index 9760a382..367d011a 100644 --- a/device_tree/data/device_tree.mld +++ b/device_tree/data/device_tree.mld @@ -33,6 +33,8 @@ PARAMETER name = dtg_version, desc = "DTG version", default = "2014.4"; PARAMETER name = dt_overlay, desc = "Enable Device-tree Overlay support", type = bool, default = false; +PARAMETER name = mainline_kernel, desc = "Kernel mainline version", type = enum, ("v4.17" = v4.17), default = none; + PARAMETER name = bootargs, desc = "Booting arguments", type = string, default = ""; PARAMETER name = console_device, desc = "Instance name of IP core for boot console (e.g. RS232_Uart_1, not xps_uart16550)", type = peripheral_instance, range = (axi_uart16550, axi_uartlite, ps7_uart, psu_uart), default = none; diff --git a/device_tree/data/device_tree.tcl b/device_tree/data/device_tree.tcl index f20cc240..56c67192 100644 --- a/device_tree/data/device_tree.tcl +++ b/device_tree/data/device_tree.tcl @@ -295,25 +295,41 @@ proc gen_board_info {} { return } set kernel_ver [get_property CONFIG.kernel_version [get_os]] - set kernel_dtsi [file normalize "[get_property "REPOSITORY" $i]/data/kernel_dtsi/${kernel_ver}/BOARD"] - if {[file exists $kernel_dtsi]} { - foreach file [glob [file normalize [file dirname ${kernel_dtsi}]/*/*]] { - set dtsi_name "$dts_name.dtsi" - # NOTE: ./ works only if we did not change our directory - if {[regexp $dtsi_name $file match]} { - file copy -force $file ./ - update_system_dts_include [file tail $file] + set mainline_ker [get_property CONFIG.mainline_kernel [get_os]] + if {[string match -nocase $mainline_ker "v4.17"]} { + set mainline_dtsi [file normalize "[get_property "REPOSITORY" $i]/data/kernel_dtsi/${mainline_ker}/board"] + if {[file exists $mainline_dtsi]} { + foreach file [glob [file normalize [file dirname ${mainline_dtsi}]/board/*]] { + set dtsi_name "$dts_name.dtsi" + # NOTE: ./ works only if we did not change our directory + if {[regexp $dtsi_name $file match]} { + file copy -force $file ./ + update_system_dts_include [file tail $file] + } } - } - set default_dts [get_property CONFIG.master_dts [get_os]] - set root_node [add_or_get_dt_node -n / -d ${default_dts}] - set valid_axi_list "kc705-full kc705-lite ac701-full ac701-lite" - set valid_no_axi_list "kcu105 zc702 zc706 zc1751-dc1 zc1751-dc2 zedboard" - if {[lsearch -nocase $valid_axi_list $dts_name] >= 0 || [string match -nocase $dts_name "kcu705"]} { - hsi::utils::add_new_dts_param "${root_node}" hard-reset-gpios "reset_gpio 0 1" reference - } + } } else { - puts "File not found\n\r" + set kernel_dtsi [file normalize "[get_property "REPOSITORY" $i]/data/kernel_dtsi/${kernel_ver}/BOARD"] + if {[file exists $kernel_dtsi]} { + foreach file [glob [file normalize [file dirname ${kernel_dtsi}]/BOARD/*]] { + set dtsi_name "$dts_name.dtsi" + puts "file:$file" + # NOTE: ./ works only if we did not change our directory + if {[regexp $dtsi_name $file match]} { + file copy -force $file ./ + update_system_dts_include [file tail $file] + } + } + set default_dts [get_property CONFIG.master_dts [get_os]] + set root_node [add_or_get_dt_node -n / -d ${default_dts}] + set valid_axi_list "kc705-full kc705-lite ac701-full ac701-lite" + set valid_no_axi_list "kcu105 zc702 zc706 zc1751-dc1 zc1751-dc2 zedboard" + if {[lsearch -nocase $valid_axi_list $dts_name] >= 0 || [string match -nocase $dts_name "kcu705"]} { + hsi::utils::add_new_dts_param "${root_node}" hard-reset-gpios "reset_gpio 0 1" reference + } + } else { + puts "File not found\n\r" + } } } } @@ -355,8 +371,11 @@ proc generate {lib_handle} { gen_board_info set proctype [get_property IP_NAME [get_cells -hier [get_sw_processor]]] if {[string match -nocase $proctype "psu_cortexa53"] } { - gen_sata_laneinfo - gen_zynqmp_ccf_clk + set mainline_ker [get_property CONFIG.mainline_kernel [get_os]] + if {[string match -nocase $mainline_ker "none"]} { + gen_sata_laneinfo + gen_zynqmp_ccf_clk + } } gen_ext_axi_interface } @@ -451,6 +470,10 @@ proc update_cpu_node {os_handle} { } proc update_alias {os_handle} { + set mainline_ker [get_property CONFIG.mainline_kernel [get_os]] + if {[string match -nocase $mainline_ker "v4.17"]} { + return + } set default_dts [get_property CONFIG.master_dts [get_os]] set system_root_node [add_or_get_dt_node -n "/" -d ${default_dts}] set all_labels [get_all_dt_labels] diff --git a/dp/data/dp.tcl b/dp/data/dp.tcl index 5d4f5ded..8c6fca5b 100644 --- a/dp/data/dp.tcl +++ b/dp/data/dp.tcl @@ -69,11 +69,13 @@ proc generate_dp_param {drv_handle} { } } } - set dp_list "zynqmp_dp_snd_pcm0 zynqmp_dp_snd_pcm1 zynqmp_dp_snd_card0 zynqmp_dp_snd_codec0" - set dts_file [get_property CONFIG.pcw_dts [get_os]] - foreach dp_name ${dp_list} { - set dp_node [add_or_get_dt_node -n "&${dp_name}" -d $dts_file] - hsi::utils::add_new_dts_param "${dp_node}" "status" "okay" string + set mainline_ker [get_property CONFIG.mainline_kernel [get_os]] + if {[string match -nocase $mainline_ker "none"]} { + set dp_list "zynqmp_dp_snd_pcm0 zynqmp_dp_snd_pcm1 zynqmp_dp_snd_card0 zynqmp_dp_snd_codec0" + set dts_file [get_property CONFIG.pcw_dts [get_os]] + foreach dp_name ${dp_list} { + set dp_node [add_or_get_dt_node -n "&${dp_name}" -d $dts_file] + hsi::utils::add_new_dts_param "${dp_node}" "status" "okay" string + } } - } diff --git a/usbps/data/usbps.tcl b/usbps/data/usbps.tcl index 7de48654..d674da8b 100644 --- a/usbps/data/usbps.tcl +++ b/usbps/data/usbps.tcl @@ -27,8 +27,11 @@ proc generate {drv_handle} { if {[string match -nocase $proctype "ps7_cortexa9"] } { set_drv_prop $drv_handle phy_type ulpi string } else { - set index [string index $drv_handle end] - set rt_node [add_or_get_dt_node -n usb -l usb$index -d $default_dts -auto_ref_parent] - hsi::utils::add_new_dts_param "${rt_node}" "status" "okay" string + set mainline_ker [get_property CONFIG.mainline_kernel [get_os]] + if {[string match -nocase $mainline_ker "none"]} { + set index [string index $drv_handle end] + set rt_node [add_or_get_dt_node -n usb -l usb$index -d $default_dts -auto_ref_parent] + hsi::utils::add_new_dts_param "${rt_node}" "status" "okay" string + } } }