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Block stitching adds instance number suffixes when instantiating blocks. New-style proc codegen might naturally clean this up, but in the interim it's annoying that instance names are fragile.
It would be better if the instance numbers were per-instantiated-block, e.g. instead of
inst A_0, inst B_1, inst A_2
you got
inst A_0
inst B_0
inst A_1
The text was updated successfully, but these errors were encountered:
grebe
added
codegen
Related to emitting (System)Verilog.
stitching
Issues related to stitching, multi-proc codegen, and integration with external verilog modules
labels
Apr 11, 2025
Block stitching adds instance number suffixes when instantiating blocks. New-style proc codegen might naturally clean this up, but in the interim it's annoying that instance names are fragile.
It would be better if the instance numbers were per-instantiated-block, e.g. instead of
you got
The text was updated successfully, but these errors were encountered: