Description
Describe the bug
BinExport will merge basic blocks on unconditional branches, however if these blocks are not in increasing order of address, the UI will simply show the instructions in completely the wrong order. This can cause problems in lots of programs, but specifically causes major issues when combined with plugins like FunctionInliner that add unconditional branches to new segments.
To Reproduce
I have attached (report.zip) two programs to diff against to demonstrate the issue. The programs are compiled with: cc -o a -O0 a.S
. If you diff them with BinDiff in IDA and compare the flow graphs in the BinDiff GUI, you will see that the following instructions appear at the end of the function, instead of their correct place before the ret
:
mov x3, #0x43
mov x4, #0x44
Expected behavior
These two mov
instructions should appear before the ldp x29, x30, [sp], 16
instruction. When the BinDiff backend iterates over the instructions in this function from BinExport, it does indeed iterate over it in the correct order, it is just the GUI that incorrectly sorts the instructions rather than leaving them in the same order from the backend.
Environment (please complete the following information):
- OS and version: Windows 11
- Locale: British English
- Disassembler and version: IDA Pro 8.4
Additional context
N/A