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Currently the way tests are generated and linked causes an issue where in the final binary 'f32-spmm-minmax-test' only the tests present in 'f32-spmm-minmax.cc' get included. I'm building for a RISC-V target but I don't believe target platform affects final output for the test binary.
I've managed to hack my way around this by generating the source code for the code in one file 'f32-spmm-minmax.cc' but this should get fixed properly. Also consider re-evaluating other tests that are split into multiple files.
The text was updated successfully, but these errors were encountered:
oliIMG
changed the title
f32-spmm missing test files
f32-spmm missing tests
Sep 10, 2024
SPMM was only implemented on ARM and WASMSIMD.
Unless there is a real usecase for it, I'd suggest making RISC-V follow what Intel did for this, disabling/skipping SPMM.
SPMM gives roughly 4:1 compression on floats, so 8 bit weights. But the current preferred approach is quantization of float weights to 8 or 4 bits. e.g. qd8_qc4w, which lends itself to more efficient byte dot product (sdot/vnni) or matrix instructions like Intel AMX (which is built upon dotproducts)
If you have a work around that can be done as a PR to disable SPMM on RISC-V that would be good
Currently the way tests are generated and linked causes an issue where in the final binary 'f32-spmm-minmax-test' only the tests present in 'f32-spmm-minmax.cc' get included. I'm building for a RISC-V target but I don't believe target platform affects final output for the test binary.

I've managed to hack my way around this by generating the source code for the code in one file 'f32-spmm-minmax.cc' but this should get fixed properly. Also consider re-evaluating other tests that are split into multiple files.
The text was updated successfully, but these errors were encountered: