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dmidecode.c
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/*
* DMI Decode
*
* Copyright (C) 2000-2002 Alan Cox <[email protected]>
* Copyright (C) 2002-2020 Jean Delvare <[email protected]>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* For the avoidance of doubt the "preferred form" of this code is one which
* is in an open unpatent encumbered format. Where cryptographic key signing
* forms part of the process of creating an executable the information
* including keys needed to generate an equivalently functional executable
* are deemed to be part of the source code.
*
* Unless specified otherwise, all references are aimed at the "System
* Management BIOS Reference Specification, Version 3.2.0" document,
* available from http://www.dmtf.org/standards/smbios.
*
* Note to contributors:
* Please reference every value you add or modify, especially if the
* information does not come from the above mentioned specification.
*
* Additional references:
* - Intel AP-485 revision 36
* "Intel Processor Identification and the CPUID Instruction"
* http://www.intel.com/support/processors/sb/cs-009861.htm
* - DMTF Common Information Model
* CIM Schema version 2.19.1
* http://www.dmtf.org/standards/cim/
* - IPMI 2.0 revision 1.0
* "Intelligent Platform Management Interface Specification"
* http://developer.intel.com/design/servers/ipmi/spec.htm
* - AMD publication #25481 revision 2.28
* "CPUID Specification"
* http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25481.pdf
* - BIOS Integrity Services Application Programming Interface version 1.0
* http://www.intel.com/design/archives/wfm/downloads/bisspec.htm
* - DMTF DSP0239 version 1.1.0
* "Management Component Transport Protocol (MCTP) IDs and Codes"
* http://www.dmtf.org/standards/pmci
* - "TPM Main, Part 2 TPM Structures"
* Specification version 1.2, level 2, revision 116
* https://trustedcomputinggroup.org/tpm-main-specification/
* - "PC Client Platform TPM Profile (PTP) Specification"
* Family "2.0", Level 00, Revision 00.43, January 26, 2015
* https://trustedcomputinggroup.org/pc-client-platform-tpm-profile-ptp-specification/
* - "RedFish Host Interface Specification" (DMTF DSP0270)
* https://www.dmtf.org/sites/default/files/DSP0270_1.0.1.pdf
*/
#include <fcntl.h>
#include <stdio.h>
#include <string.h>
#include <strings.h>
#include <stdlib.h>
#include <unistd.h>
#ifndef __WIN32__
#include <arpa/inet.h>
#include <sys/socket.h>
#endif
#ifdef __FreeBSD__
#include <errno.h>
#include <kenv.h>
#endif
#include "version.h"
#include "config.h"
#include "types.h"
#include "util.h"
#include "dmidecode.h"
#include "dmiopt.h"
#include "dmioem.h"
#include "dmioutput.h"
#ifdef __WIN32__
#include "winsmbios.h"
#endif /* __WIN32__ */
#define out_of_spec "<OUT OF SPEC>"
static const char *bad_index = "<BAD INDEX>";
enum cpuid_type cpuid_type = cpuid_none;
#define SUPPORTED_SMBIOS_VER 0x030500
#define FLAG_NO_FILE_OFFSET (1 << 0)
#define FLAG_STOP_AT_EOT (1 << 1)
#define SYS_FIRMWARE_DIR "/sys/firmware/dmi/tables"
#define SYS_ENTRY_FILE SYS_FIRMWARE_DIR "/smbios_entry_point"
#define SYS_TABLE_FILE SYS_FIRMWARE_DIR "/DMI"
/*
* Type-independant Stuff
*/
/* Returns 1 if the buffer contains only printable ASCII characters */
int is_printable(const u8 *data, int len)
{
int i;
for (i = 0; i < len; i++)
if (data[i] < 32 || data[i] >= 127)
return 0;
return 1;
}
/* Replace non-ASCII characters with dots */
static void ascii_filter(char *bp, size_t len)
{
size_t i;
for (i = 0; i < len; i++)
if (bp[i] < 32 || bp[i] >= 127)
bp[i] = '.';
}
static char *_dmi_string(const struct dmi_header *dm, u8 s, int filter)
{
char *bp = (char *)dm->data;
bp += dm->length;
while (s > 1 && *bp)
{
bp += strlen(bp);
bp++;
s--;
}
if (!*bp)
return NULL;
if (filter)
ascii_filter(bp, strlen(bp));
return bp;
}
const char *dmi_string(const struct dmi_header *dm, u8 s)
{
char *bp;
if (s == 0)
return "Not Specified";
bp = _dmi_string(dm, s, 1);
if (bp == NULL)
return bad_index;
return bp;
}
static const char *dmi_smbios_structure_type(u8 code)
{
static const char *type[] = {
"BIOS", /* 0 */
"System",
"Base Board",
"Chassis",
"Processor",
"Memory Controller",
"Memory Module",
"Cache",
"Port Connector",
"System Slots",
"On Board Devices",
"OEM Strings",
"System Configuration Options",
"BIOS Language",
"Group Associations",
"System Event Log",
"Physical Memory Array",
"Memory Device",
"32-bit Memory Error",
"Memory Array Mapped Address",
"Memory Device Mapped Address",
"Built-in Pointing Device",
"Portable Battery",
"System Reset",
"Hardware Security",
"System Power Controls",
"Voltage Probe",
"Cooling Device",
"Temperature Probe",
"Electrical Current Probe",
"Out-of-band Remote Access",
"Boot Integrity Services",
"System Boot",
"64-bit Memory Error",
"Management Device",
"Management Device Component",
"Management Device Threshold Data",
"Memory Channel",
"IPMI Device",
"Power Supply",
"Additional Information",
"Onboard Device",
"Management Controller Host Interface",
"TPM Device",
"Processor",
"Firmware",
"String Property" /* 46 */
};
if (code >= 128)
return "OEM-specific";
if (code <= 46)
return type[code];
return out_of_spec;
}
static int dmi_bcd_range(u8 value, u8 low, u8 high)
{
if (value > 0x99 || (value & 0x0F) > 0x09)
return 0;
if (value < low || value > high)
return 0;
return 1;
}
static void dmi_dump(const struct dmi_header *h)
{
static char raw_data[48];
int row, i;
unsigned int off;
char *s;
pr_list_start("Header and Data", NULL);
for (row = 0; row < ((h->length - 1) >> 4) + 1; row++)
{
off = 0;
for (i = 0; i < 16 && i < h->length - (row << 4); i++)
off += sprintf(raw_data + off, i ? " %02X" : "%02X",
(h->data)[(row << 4) + i]);
pr_list_item(raw_data);
}
pr_list_end();
if ((h->data)[h->length] || (h->data)[h->length + 1])
{
pr_list_start("Strings", NULL);
i = 1;
while ((s = _dmi_string(h, i++, !(opt.flags & FLAG_DUMP))))
{
if (opt.flags & FLAG_DUMP)
{
int j, l = strlen(s) + 1;
for (row = 0; row < ((l - 1) >> 4) + 1; row++)
{
off = 0;
for (j = 0; j < 16 && j < l - (row << 4); j++)
off += sprintf(raw_data + off,
j ? " %02X" : "%02X",
(unsigned char)s[(row << 4) + j]);
pr_list_item(raw_data);
}
/* String isn't filtered yet so do it now */
ascii_filter(s, l - 1);
}
pr_list_item("%s", s);
}
pr_list_end();
}
}
/* shift is 0 if the value is in bytes, 1 if it is in kilobytes */
void dmi_print_memory_size(const char *attr, u64 code, int shift)
{
unsigned long capacity;
u16 split[7];
static const char *unit[8] = {
"bytes", "kB", "MB", "GB", "TB", "PB", "EB", "ZB"
};
int i;
/*
* We split the overall size in powers of thousand: EB, PB, TB, GB,
* MB, kB and B. In practice, it is expected that only one or two
* (consecutive) of these will be non-zero.
*/
split[0] = code.l & 0x3FFUL;
split[1] = (code.l >> 10) & 0x3FFUL;
split[2] = (code.l >> 20) & 0x3FFUL;
split[3] = ((code.h << 2) & 0x3FCUL) | (code.l >> 30);
split[4] = (code.h >> 8) & 0x3FFUL;
split[5] = (code.h >> 18) & 0x3FFUL;
split[6] = code.h >> 28;
/*
* Now we find the highest unit with a non-zero value. If the following
* is also non-zero, we use that as our base. If the following is zero,
* we simply display the highest unit.
*/
for (i = 6; i > 0; i--)
{
if (split[i])
break;
}
if (i > 0 && split[i - 1])
{
i--;
capacity = split[i] + (split[i + 1] << 10);
}
else
capacity = split[i];
pr_attr(attr, "%lu %s", capacity, unit[i + shift]);
}
/*
* 7.1 BIOS Information (Type 0)
*/
static void dmi_bios_runtime_size(u32 code)
{
const char *format;
if (code & 0x000003FF)
{
format = "%u bytes";
}
else
{
format = "%u kB";
code >>= 10;
}
pr_attr("Runtime Size", format, code);
}
static void dmi_bios_rom_size(u8 code1, u16 code2)
{
static const char *unit[4] = {
"MB", "GB", out_of_spec, out_of_spec
};
if (code1 != 0xFF)
{
u64 s = { .l = (code1 + 1) << 6 };
dmi_print_memory_size("ROM Size", s, 1);
}
else
pr_attr("ROM Size", "%u %s", code2 & 0x3FFF, unit[code2 >> 14]);
}
static void dmi_bios_characteristics(u64 code)
{
/* 7.1.1 */
static const char *characteristics[] = {
"BIOS characteristics not supported", /* 3 */
"ISA is supported",
"MCA is supported",
"EISA is supported",
"PCI is supported",
"PC Card (PCMCIA) is supported",
"PNP is supported",
"APM is supported",
"BIOS is upgradeable",
"BIOS shadowing is allowed",
"VLB is supported",
"ESCD support is available",
"Boot from CD is supported",
"Selectable boot is supported",
"BIOS ROM is socketed",
"Boot from PC Card (PCMCIA) is supported",
"EDD is supported",
"Japanese floppy for NEC 9800 1.2 MB is supported (int 13h)",
"Japanese floppy for Toshiba 1.2 MB is supported (int 13h)",
"5.25\"/360 kB floppy services are supported (int 13h)",
"5.25\"/1.2 MB floppy services are supported (int 13h)",
"3.5\"/720 kB floppy services are supported (int 13h)",
"3.5\"/2.88 MB floppy services are supported (int 13h)",
"Print screen service is supported (int 5h)",
"8042 keyboard services are supported (int 9h)",
"Serial services are supported (int 14h)",
"Printer services are supported (int 17h)",
"CGA/mono video services are supported (int 10h)",
"NEC PC-98" /* 31 */
};
int i;
/*
* This isn't very clear what this bit is supposed to mean
*/
if (code.l & (1 << 3))
{
pr_list_item("%s", characteristics[0]);
return;
}
for (i = 4; i <= 31; i++)
if (code.l & (1 << i))
pr_list_item("%s", characteristics[i - 3]);
}
static void dmi_bios_characteristics_x1(u8 code)
{
/* 7.1.2.1 */
static const char *characteristics[] = {
"ACPI is supported", /* 0 */
"USB legacy is supported",
"AGP is supported",
"I2O boot is supported",
"LS-120 boot is supported",
"ATAPI Zip drive boot is supported",
"IEEE 1394 boot is supported",
"Smart battery is supported" /* 7 */
};
int i;
for (i = 0; i <= 7; i++)
if (code & (1 << i))
pr_list_item("%s", characteristics[i]);
}
static void dmi_bios_characteristics_x2(u8 code)
{
/* 37.1.2.2 */
static const char *characteristics[] = {
"BIOS boot specification is supported", /* 0 */
"Function key-initiated network boot is supported",
"Targeted content distribution is supported",
"UEFI is supported",
"System is a virtual machine",
"Manufacturing mode is supported",
"Manufacturing mode is enabled" /* 6 */
};
int i;
for (i = 0; i <= 6; i++)
if (code & (1 << i))
pr_list_item("%s", characteristics[i]);
}
/*
* 7.2 System Information (Type 1)
*/
static void dmi_system_uuid(void (*print_cb)(const char *name, const char *format, ...),
const char *attr, const u8 *p, u16 __attribute__ ((unused)) ver)
{
int only0xFF = 1, only0x00 = 1;
int i;
for (i = 0; i < 16 && (only0x00 || only0xFF); i++)
{
if (p[i] != 0x00) only0x00 = 0;
if (p[i] != 0xFF) only0xFF = 0;
}
if (only0xFF)
{
if (print_cb)
print_cb(attr, "Not Present");
else
printf("Not Present\n");
return;
}
if (only0x00)
{
if (print_cb)
print_cb(attr, "Not Settable");
else
printf("Not Settable\n");
return;
}
/*
* As of version 2.6 of the SMBIOS specification, the first 3
* fields of the UUID are supposed to be encoded on little-endian.
* The specification says that this is the defacto standard,
* however I've seen systems following RFC 4122 instead and use
* network byte order, so I am reluctant to apply the byte-swapping
* for older versions.
*/
#ifndef __WIN32__
if (ver >= 0x0206)
{
if (print_cb)
print_cb(attr,
"%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x",
p[3], p[2], p[1], p[0], p[5], p[4], p[7], p[6],
p[8], p[9], p[10], p[11], p[12], p[13], p[14], p[15]);
else
printf("%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x\n",
p[3], p[2], p[1], p[0], p[5], p[4], p[7], p[6],
p[8], p[9], p[10], p[11], p[12], p[13], p[14], p[15]);
}
else
{
if (print_cb)
print_cb(attr,
"%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x",
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
p[8], p[9], p[10], p[11], p[12], p[13], p[14], p[15]);
else
printf("%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x\n",
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
p[8], p[9], p[10], p[11], p[12], p[13], p[14], p[15]);
}
#else
/*
* Just follow the SMBIOS specification under windows systems to follow
* the way a wmi read would report the uuid.
*/
if (print_cb)
print_cb(attr,
"%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x",
p[3], p[2], p[1], p[0], p[5], p[4], p[7], p[6],
p[8], p[9], p[10], p[11], p[12], p[13], p[14], p[15]);
else
printf("%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x\n",
p[3], p[2], p[1], p[0], p[5], p[4], p[7], p[6],
p[8], p[9], p[10], p[11], p[12], p[13], p[14], p[15]);
#endif
}
static const char *dmi_system_wake_up_type(u8 code)
{
/* 7.2.2 */
static const char *type[] = {
"Reserved", /* 0x00 */
"Other",
"Unknown",
"APM Timer",
"Modem Ring",
"LAN Remote",
"Power Switch",
"PCI PME#",
"AC Power Restored" /* 0x08 */
};
if (code <= 0x08)
return type[code];
return out_of_spec;
}
/*
* 7.3 Base Board Information (Type 2)
*/
static void dmi_base_board_features(u8 code)
{
/* 7.3.1 */
static const char *features[] = {
"Board is a hosting board", /* 0 */
"Board requires at least one daughter board",
"Board is removable",
"Board is replaceable",
"Board is hot swappable" /* 4 */
};
if ((code & 0x1F) == 0)
pr_list_start("Features", "%s", "None");
else
{
int i;
pr_list_start("Features", NULL);
for (i = 0; i <= 4; i++)
if (code & (1 << i))
pr_list_item("%s", features[i]);
}
pr_list_end();
}
static const char *dmi_base_board_type(u8 code)
{
/* 7.3.2 */
static const char *type[] = {
"Unknown", /* 0x01 */
"Other",
"Server Blade",
"Connectivity Switch",
"System Management Module",
"Processor Module",
"I/O Module",
"Memory Module",
"Daughter Board",
"Motherboard",
"Processor+Memory Module",
"Processor+I/O Module",
"Interconnect Board" /* 0x0D */
};
if (code >= 0x01 && code <= 0x0D)
return type[code - 0x01];
return out_of_spec;
}
static void dmi_base_board_handles(u8 count, const u8 *p)
{
int i;
pr_list_start("Contained Object Handles", "%u", count);
for (i = 0; i < count; i++)
pr_list_item("0x%04X", WORD(p + sizeof(u16) * i));
pr_list_end();
}
/*
* 7.4 Chassis Information (Type 3)
*/
static const char *dmi_chassis_type(u8 code)
{
/* 7.4.1 */
static const char *type[] = {
"Other", /* 0x01 */
"Unknown",
"Desktop",
"Low Profile Desktop",
"Pizza Box",
"Mini Tower",
"Tower",
"Portable",
"Laptop",
"Notebook",
"Hand Held",
"Docking Station",
"All In One",
"Sub Notebook",
"Space-saving",
"Lunch Box",
"Main Server Chassis", /* CIM_Chassis.ChassisPackageType says "Main System Chassis" */
"Expansion Chassis",
"Sub Chassis",
"Bus Expansion Chassis",
"Peripheral Chassis",
"RAID Chassis",
"Rack Mount Chassis",
"Sealed-case PC",
"Multi-system",
"CompactPCI",
"AdvancedTCA",
"Blade",
"Blade Enclosing",
"Tablet",
"Convertible",
"Detachable",
"IoT Gateway",
"Embedded PC",
"Mini PC",
"Stick PC" /* 0x24 */
};
code &= 0x7F; /* bits 6:0 are chassis type, 7th bit is the lock bit */
if (code >= 0x01 && code <= 0x24)
return type[code - 0x01];
return out_of_spec;
}
static const char *dmi_chassis_lock(u8 code)
{
static const char *lock[] = {
"Not Present", /* 0x00 */
"Present" /* 0x01 */
};
return lock[code];
}
static const char *dmi_chassis_state(u8 code)
{
/* 7.4.2 */
static const char *state[] = {
"Other", /* 0x01 */
"Unknown",
"Safe",
"Warning",
"Critical",
"Non-recoverable" /* 0x06 */
};
if (code >= 0x01 && code <= 0x06)
return state[code - 0x01];
return out_of_spec;
}
static const char *dmi_chassis_security_status(u8 code)
{
/* 7.4.3 */
static const char *status[] = {
"Other", /* 0x01 */
"Unknown",
"None",
"External Interface Locked Out",
"External Interface Enabled" /* 0x05 */
};
if (code >= 0x01 && code <= 0x05)
return status[code - 0x01];
return out_of_spec;
}
static void dmi_chassis_height(u8 code)
{
if (code == 0x00)
pr_attr("Height", "Unspecified");
else
pr_attr("Height", "%u U", code);
}
static void dmi_chassis_power_cords(u8 code)
{
if (code == 0x00)
pr_attr("Number Of Power Cords", "Unspecified");
else
pr_attr("Number Of Power Cords", "%u", code);
}
static void dmi_chassis_elements(u8 count, u8 len, const u8 *p)
{
int i;
pr_list_start("Contained Elements", "%u", count);
for (i = 0; i < count; i++)
{
if (len >= 0x03)
{
const char *type;
type = (p[i * len] & 0x80) ?
dmi_smbios_structure_type(p[i * len] & 0x7F) :
dmi_base_board_type(p[i * len] & 0x7F);
if (p[1 + i * len] == p[2 + i * len])
pr_list_item("%s (%u)", type, p[1 + i * len]);
else
pr_list_item("%s (%u-%u)", type, p[1 + i * len],
p[2 + i * len]);
}
}
pr_list_end();
}
/*
* 7.5 Processor Information (Type 4)
*/
static const char *dmi_processor_type(u8 code)
{
/* 7.5.1 */
static const char *type[] = {
"Other", /* 0x01 */
"Unknown",
"Central Processor",
"Math Processor",
"DSP Processor",
"Video Processor" /* 0x06 */
};
if (code >= 0x01 && code <= 0x06)
return type[code - 0x01];
return out_of_spec;
}
static const char *dmi_processor_family(const struct dmi_header *h, u16 ver)
{
const u8 *data = h->data;
unsigned int i, low, high;
u16 code;
/* 7.5.2 */
static struct {
int value;
const char *name;
} family2[] = {
{ 0x01, "Other" },
{ 0x02, "Unknown" },
{ 0x03, "8086" },
{ 0x04, "80286" },
{ 0x05, "80386" },
{ 0x06, "80486" },
{ 0x07, "8087" },
{ 0x08, "80287" },
{ 0x09, "80387" },
{ 0x0A, "80487" },
{ 0x0B, "Pentium" },
{ 0x0C, "Pentium Pro" },
{ 0x0D, "Pentium II" },
{ 0x0E, "Pentium MMX" },
{ 0x0F, "Celeron" },
{ 0x10, "Pentium II Xeon" },
{ 0x11, "Pentium III" },
{ 0x12, "M1" },
{ 0x13, "M2" },
{ 0x14, "Celeron M" },
{ 0x15, "Pentium 4 HT" },
{ 0x18, "Duron" },
{ 0x19, "K5" },
{ 0x1A, "K6" },
{ 0x1B, "K6-2" },
{ 0x1C, "K6-3" },
{ 0x1D, "Athlon" },
{ 0x1E, "AMD29000" },
{ 0x1F, "K6-2+" },
{ 0x20, "Power PC" },
{ 0x21, "Power PC 601" },
{ 0x22, "Power PC 603" },
{ 0x23, "Power PC 603+" },
{ 0x24, "Power PC 604" },
{ 0x25, "Power PC 620" },
{ 0x26, "Power PC x704" },
{ 0x27, "Power PC 750" },
{ 0x28, "Core Duo" },
{ 0x29, "Core Duo Mobile" },
{ 0x2A, "Core Solo Mobile" },
{ 0x2B, "Atom" },
{ 0x2C, "Core M" },
{ 0x2D, "Core m3" },
{ 0x2E, "Core m5" },
{ 0x2F, "Core m7" },
{ 0x30, "Alpha" },
{ 0x31, "Alpha 21064" },
{ 0x32, "Alpha 21066" },
{ 0x33, "Alpha 21164" },
{ 0x34, "Alpha 21164PC" },
{ 0x35, "Alpha 21164a" },
{ 0x36, "Alpha 21264" },
{ 0x37, "Alpha 21364" },
{ 0x38, "Turion II Ultra Dual-Core Mobile M" },
{ 0x39, "Turion II Dual-Core Mobile M" },
{ 0x3A, "Athlon II Dual-Core M" },
{ 0x3B, "Opteron 6100" },
{ 0x3C, "Opteron 4100" },
{ 0x3D, "Opteron 6200" },
{ 0x3E, "Opteron 4200" },
{ 0x3F, "FX" },
{ 0x40, "MIPS" },
{ 0x41, "MIPS R4000" },
{ 0x42, "MIPS R4200" },
{ 0x43, "MIPS R4400" },
{ 0x44, "MIPS R4600" },
{ 0x45, "MIPS R10000" },
{ 0x46, "C-Series" },
{ 0x47, "E-Series" },
{ 0x48, "A-Series" },
{ 0x49, "G-Series" },
{ 0x4A, "Z-Series" },
{ 0x4B, "R-Series" },
{ 0x4C, "Opteron 4300" },
{ 0x4D, "Opteron 6300" },
{ 0x4E, "Opteron 3300" },
{ 0x4F, "FirePro" },
{ 0x50, "SPARC" },
{ 0x51, "SuperSPARC" },
{ 0x52, "MicroSPARC II" },
{ 0x53, "MicroSPARC IIep" },
{ 0x54, "UltraSPARC" },
{ 0x55, "UltraSPARC II" },
{ 0x56, "UltraSPARC IIi" },
{ 0x57, "UltraSPARC III" },
{ 0x58, "UltraSPARC IIIi" },
{ 0x60, "68040" },
{ 0x61, "68xxx" },
{ 0x62, "68000" },
{ 0x63, "68010" },
{ 0x64, "68020" },
{ 0x65, "68030" },
{ 0x66, "Athlon X4" },
{ 0x67, "Opteron X1000" },
{ 0x68, "Opteron X2000" },
{ 0x69, "Opteron A-Series" },
{ 0x6A, "Opteron X3000" },
{ 0x6B, "Zen" },
{ 0x70, "Hobbit" },
{ 0x78, "Crusoe TM5000" },
{ 0x79, "Crusoe TM3000" },
{ 0x7A, "Efficeon TM8000" },
{ 0x80, "Weitek" },
{ 0x82, "Itanium" },
{ 0x83, "Athlon 64" },
{ 0x84, "Opteron" },
{ 0x85, "Sempron" },
{ 0x86, "Turion 64" },
{ 0x87, "Dual-Core Opteron" },
{ 0x88, "Athlon 64 X2" },
{ 0x89, "Turion 64 X2" },
{ 0x8A, "Quad-Core Opteron" },
{ 0x8B, "Third-Generation Opteron" },
{ 0x8C, "Phenom FX" },
{ 0x8D, "Phenom X4" },
{ 0x8E, "Phenom X2" },
{ 0x8F, "Athlon X2" },
{ 0x90, "PA-RISC" },
{ 0x91, "PA-RISC 8500" },
{ 0x92, "PA-RISC 8000" },
{ 0x93, "PA-RISC 7300LC" },
{ 0x94, "PA-RISC 7200" },
{ 0x95, "PA-RISC 7100LC" },
{ 0x96, "PA-RISC 7100" },
{ 0xA0, "V30" },
{ 0xA1, "Quad-Core Xeon 3200" },
{ 0xA2, "Dual-Core Xeon 3000" },
{ 0xA3, "Quad-Core Xeon 5300" },
{ 0xA4, "Dual-Core Xeon 5100" },
{ 0xA5, "Dual-Core Xeon 5000" },
{ 0xA6, "Dual-Core Xeon LV" },
{ 0xA7, "Dual-Core Xeon ULV" },
{ 0xA8, "Dual-Core Xeon 7100" },
{ 0xA9, "Quad-Core Xeon 5400" },
{ 0xAA, "Quad-Core Xeon" },
{ 0xAB, "Dual-Core Xeon 5200" },
{ 0xAC, "Dual-Core Xeon 7200" },
{ 0xAD, "Quad-Core Xeon 7300" },
{ 0xAE, "Quad-Core Xeon 7400" },
{ 0xAF, "Multi-Core Xeon 7400" },
{ 0xB0, "Pentium III Xeon" },
{ 0xB1, "Pentium III Speedstep" },
{ 0xB2, "Pentium 4" },
{ 0xB3, "Xeon" },
{ 0xB4, "AS400" },
{ 0xB5, "Xeon MP" },
{ 0xB6, "Athlon XP" },
{ 0xB7, "Athlon MP" },
{ 0xB8, "Itanium 2" },
{ 0xB9, "Pentium M" },
{ 0xBA, "Celeron D" },
{ 0xBB, "Pentium D" },
{ 0xBC, "Pentium EE" },
{ 0xBD, "Core Solo" },
/* 0xBE handled as a special case */
{ 0xBF, "Core 2 Duo" },
{ 0xC0, "Core 2 Solo" },
{ 0xC1, "Core 2 Extreme" },
{ 0xC2, "Core 2 Quad" },
{ 0xC3, "Core 2 Extreme Mobile" },
{ 0xC4, "Core 2 Duo Mobile" },
{ 0xC5, "Core 2 Solo Mobile" },
{ 0xC6, "Core i7" },
{ 0xC7, "Dual-Core Celeron" },
{ 0xC8, "IBM390" },
{ 0xC9, "G4" },
{ 0xCA, "G5" },
{ 0xCB, "ESA/390 G6" },
{ 0xCC, "z/Architecture" },
{ 0xCD, "Core i5" },
{ 0xCE, "Core i3" },
{ 0xCF, "Core i9" },
{ 0xD2, "C7-M" },
{ 0xD3, "C7-D" },
{ 0xD4, "C7" },
{ 0xD5, "Eden" },
{ 0xD6, "Multi-Core Xeon" },
{ 0xD7, "Dual-Core Xeon 3xxx" },
{ 0xD8, "Quad-Core Xeon 3xxx" },
{ 0xD9, "Nano" },
{ 0xDA, "Dual-Core Xeon 5xxx" },
{ 0xDB, "Quad-Core Xeon 5xxx" },
{ 0xDD, "Dual-Core Xeon 7xxx" },
{ 0xDE, "Quad-Core Xeon 7xxx" },
{ 0xDF, "Multi-Core Xeon 7xxx" },
{ 0xE0, "Multi-Core Xeon 3400" },
{ 0xE4, "Opteron 3000" },
{ 0xE5, "Sempron II" },
{ 0xE6, "Embedded Opteron Quad-Core" },
{ 0xE7, "Phenom Triple-Core" },
{ 0xE8, "Turion Ultra Dual-Core Mobile" },
{ 0xE9, "Turion Dual-Core Mobile" },
{ 0xEA, "Athlon Dual-Core" },
{ 0xEB, "Sempron SI" },
{ 0xEC, "Phenom II" },
{ 0xED, "Athlon II" },
{ 0xEE, "Six-Core Opteron" },
{ 0xEF, "Sempron M" },
{ 0xFA, "i860" },
{ 0xFB, "i960" },
{ 0x100, "ARMv7" },
{ 0x101, "ARMv8" },
{ 0x104, "SH-3" },
{ 0x105, "SH-4" },