FL-501 CSS for both clock domains (#264)

* CSS for both clock domains. Stale LSE detection and RTC domain reset on start.
* migrate to f4

Co-authored-by: aanper <[email protected]>

Author: skotopes

firmware/targets/f3/Inc/stm32wbxx_hal_conf.h

@@ -152,7 +152,7 @@
 #endif /* HSI48_VALUE */
 
 #if !defined  (LSE_STARTUP_TIMEOUT)
-#define LSE_STARTUP_TIMEOUT    5000U      /*!< Time out for LSE start up, in ms */
+#define LSE_STARTUP_TIMEOUT    1000U      /*!< Time out for LSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
 /**

firmware/targets/f3/Inc/stm32wbxx_it.h

@@ -53,6 +53,8 @@ void MemManage_Handler(void);
 void BusFault_Handler(void);
 void UsageFault_Handler(void);
 void DebugMon_Handler(void);
+void TAMP_STAMP_LSECSS_IRQHandler(void);
+void RCC_IRQHandler(void);
 void EXTI1_IRQHandler(void);
 void EXTI2_IRQHandler(void);
 void ADC1_IRQHandler(void);

firmware/targets/f3/Src/main.c

@@ -154,7 +154,7 @@ void SystemClock_Config(void)
   /** Configure LSE Drive Capability
   */
   HAL_PWR_EnableBkUpAccess();
-  __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
+  __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_MEDIUMLOW);
   /** Configure the main internal regulator output voltage
   */
   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
@@ -220,7 +220,11 @@ void SystemClock_Config(void)
     Error_Handler();
   }
   /* USER CODE BEGIN Smps */
-
+  if (!LL_RCC_LSE_IsReady()) {
+    LL_RCC_ForceBackupDomainReset();
+    LL_RCC_ReleaseBackupDomainReset();
+    NVIC_SystemReset();
+  }
   /* USER CODE END Smps */
   /** Enables the Clock Security System
   */

firmware/targets/f3/Src/rtc.c

@@ -86,6 +86,10 @@ void HAL_RTC_MspInit(RTC_HandleTypeDef* rtcHandle)
     /* RTC clock enable */
     __HAL_RCC_RTC_ENABLE();
     __HAL_RCC_RTCAPB_CLK_ENABLE();
+
+    /* RTC interrupt Init */
+    HAL_NVIC_SetPriority(TAMP_STAMP_LSECSS_IRQn, 5, 0);
+    HAL_NVIC_EnableIRQ(TAMP_STAMP_LSECSS_IRQn);
   /* USER CODE BEGIN RTC_MspInit 1 */
 
   /* USER CODE END RTC_MspInit 1 */
@@ -103,6 +107,9 @@ void HAL_RTC_MspDeInit(RTC_HandleTypeDef* rtcHandle)
     /* Peripheral clock disable */
     __HAL_RCC_RTC_DISABLE();
     __HAL_RCC_RTCAPB_CLK_DISABLE();
+
+    /* RTC interrupt Deinit */
+    HAL_NVIC_DisableIRQ(TAMP_STAMP_LSECSS_IRQn);
   /* USER CODE BEGIN RTC_MspDeInit 1 */
 
   /* USER CODE END RTC_MspDeInit 1 */

firmware/targets/f3/Src/stm32wbxx_hal_msp.c

@@ -74,6 +74,9 @@ void HAL_MspInit(void)
   HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
 
   /* Peripheral interrupt init */
+  /* RCC_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(RCC_IRQn, 5, 0);
+  HAL_NVIC_EnableIRQ(RCC_IRQn);
   /* HSEM_IRQn interrupt configuration */
   HAL_NVIC_SetPriority(HSEM_IRQn, 5, 0);
   HAL_NVIC_EnableIRQ(HSEM_IRQn);

firmware/targets/f3/Src/stm32wbxx_it.c

@@ -59,6 +59,7 @@
 extern PCD_HandleTypeDef hpcd_USB_FS;
 extern ADC_HandleTypeDef hadc1;
 extern COMP_HandleTypeDef hcomp1;
+extern RTC_HandleTypeDef hrtc;
 extern TIM_HandleTypeDef htim1;
 extern TIM_HandleTypeDef htim2;
 extern TIM_HandleTypeDef htim17;
@@ -166,6 +167,34 @@ void DebugMon_Handler(void)
 /* please refer to the startup file (startup_stm32wbxx.s).                    */
 /******************************************************************************/
 
+/**
+  * @brief This function handles RTC tamper and time stamp, CSS on LSE interrupts through EXTI line 18.
+  */
+void TAMP_STAMP_LSECSS_IRQHandler(void)
+{
+  /* USER CODE BEGIN TAMP_STAMP_LSECSS_IRQn 0 */
+  HAL_RCC_CSSCallback();
+  /* USER CODE END TAMP_STAMP_LSECSS_IRQn 0 */
+  /* USER CODE BEGIN TAMP_STAMP_LSECSS_IRQn 1 */
+
+  /* USER CODE END TAMP_STAMP_LSECSS_IRQn 1 */
+}
+
+/**
+  * @brief This function handles RCC global interrupt.
+  */
+void RCC_IRQHandler(void)
+{
+  /* USER CODE BEGIN RCC_IRQn 0 */
+  if (!LL_RCC_LSE_IsReady()) {
+    HAL_RCC_CSSCallback();
+  }
+  /* USER CODE END RCC_IRQn 0 */
+  /* USER CODE BEGIN RCC_IRQn 1 */
+
+  /* USER CODE END RCC_IRQn 1 */
+}
+
 /**
   * @brief This function handles EXTI line1 interrupt.
   */

firmware/targets/f3/api-hal/api-hal-power.c

@@ -1,7 +1,14 @@
 #include <api-hal-power.h>
+#include <main.h>
 #include <bq27220.h>
 #include <bq25896.h>
 
+void HAL_RCC_CSSCallback(void) {
+    LL_RCC_ForceBackupDomainReset();
+    LL_RCC_ReleaseBackupDomainReset();
+    NVIC_SystemReset();
+}
+
 void api_hal_power_init() {
     bq27220_init();
     bq25896_init();

firmware/targets/f3/f3-1/Inc/stm32wbxx_hal_conf.h

@@ -152,7 +152,7 @@
 #endif /* HSI48_VALUE */
 
 #if !defined  (LSE_STARTUP_TIMEOUT)
-#define LSE_STARTUP_TIMEOUT    5000U      /*!< Time out for LSE start up, in ms */
+#define LSE_STARTUP_TIMEOUT    1000U      /*!< Time out for LSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
 /**

firmware/targets/f3/f3-1/Inc/stm32wbxx_it.h

@@ -53,6 +53,8 @@ void MemManage_Handler(void);
 void BusFault_Handler(void);
 void UsageFault_Handler(void);
 void DebugMon_Handler(void);
+void TAMP_STAMP_LSECSS_IRQHandler(void);
+void RCC_IRQHandler(void);
 void EXTI1_IRQHandler(void);
 void EXTI3_IRQHandler(void);
 void ADC1_IRQHandler(void);

firmware/targets/f3/f3-1/Src/main.c

@@ -154,7 +154,7 @@ void SystemClock_Config(void)
   /** Configure LSE Drive Capability
   */
   HAL_PWR_EnableBkUpAccess();
-  __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
+  __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_MEDIUMLOW);
   /** Configure the main internal regulator output voltage
   */
   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
@@ -221,6 +221,12 @@ void SystemClock_Config(void)
   }
   /* USER CODE BEGIN Smps */
 
+  if (!LL_RCC_LSE_IsReady()) {
+    LL_RCC_ForceBackupDomainReset();
+    LL_RCC_ReleaseBackupDomainReset();
+    NVIC_SystemReset();
+  }
+
   /* USER CODE END Smps */
   /** Enables the Clock Security System
   */