bas_m5484.bdm

#!/usr/local/bin/bdmctrl -D2 -v9 -d9
#
# firebee board initialization for bdmctrl 
#
open $1
reset
sleep 10

wait

# set VBR
write-ctrl 0x0801 0x00000000
dump-register VBR

# Turn on MBAR at 0xFF00_0000
write-ctrl 0x0C0F 0xFF000000
dump-register MBAR

# Turn on RAMBAR0 at address FF10_0000 
write-ctrl 0x0C04 0xFF100007

# Turn on RAMBAR1 at address FF10_1000 (disabled - not mapped by bdm currently)
write-ctrl 0x0C05 0xFF101001

# Init CS0 (BootFLASH @ E000_0000 - E03F_FFFF 8Mbytes)
write 0xFF000500 0xE0000000 4
write 0xFF000508 0x00041180 4
write 0xFF000504 0x003F0001 4
wait

# SDRAM Initialization @ 0000_0000 - 0400_0000 64 MBytes
write 0xFF000004 0x000002AA 4	# SDRAMDS configuration
write 0xFF000020 0x00000019 4	# SDRAM CS0 configuration (64Mbytes 0000_0000 - 07FF_FFFF)
write 0xFF000024 0x00000000 4	# SDRAM CS1 configuration
write 0xFF000028 0x00000000 4	# SDRAM CS2 configuration
write 0xFF00002C 0x00000000 4	# SDRAM CS3 configuration

write 0xFF000108 0x73711630 4	# SDCFG1
write 0xFF00010C 0x46370000 4	# SDCFG2

write 0xFF000104 0xE10B0002 4	# SDCR + IPALL
write 0xFF000100 0x40010000 4	# SDMR (write to LEMR)
write 0xFF000100 0x058D0000 4	# SDMR (write to LMR)
sleep 100
write 0xFF000104 0xE10D0002 4	# SDCR + IPALL
write 0xFF000104 0xE10D0004 4	# SDCR + IREF (first refresh)
write 0xFF000104 0xE10D0004 4	# SDCR + IREF (first refresh)
write 0xFF000100 0x018D0000 4	# SDMR (write to LMR)
write 0xFF000104 0x710D0F00 4	# SDCR (lock SDMR and enable refresh)
sleep 100

load -v m5484lite/ram.elf
execute
# wait is _needed_ here if using the P&E BDM interface. Otherwise 
# the Coldfire resets after some time!
wait