How do I write the device-tree binding to bring up PCI in Linux

[Blmount]

Hi Eugene,
Thank you for the wonderful project!
We are currently using the Alveo U280 and have successfully booted Linux 6.3 via QDMA and U-Boot. However, after booting, running the "lspci" command does not display any devices. We discovered that the device tree (.dtb) generated from the project lacks PCI bindings. We attempted to add PCI support to the device tree but were unsuccessful.
This is the current dts file:
`/dts-v1/;

/ {
#address-cells = <0x02>;
#size-cells = <0x02>;
compatible = "freechips,rocketchip-vivado-dev";
model = "freechips,rocketchip-vivado";

cpus {
	#address-cells = <0x01>;
	#size-cells = <0x00>;
	timebase-frequency = <0x1312d0>;

	cpu@0 {
		clock-frequency = <0x7735940>;
		compatible = "sifive,rocket0\0riscv";
		d-cache-block-size = <0x40>;
		d-cache-sets = <0x40>;
		d-cache-size = <0x4000>;
		d-tlb-sets = <0x01>;
		d-tlb-size = <0x20>;
		device_type = "cpu";
		hardware-exec-breakpoint-count = <0x08>;
		i-cache-block-size = <0x40>;
		i-cache-sets = <0x40>;
		i-cache-size = <0x4000>;
		i-tlb-sets = <0x01>;
		i-tlb-size = <0x20>;
		mmu-type = "riscv,sv39";
		next-level-cache = <0x01>;
		reg = <0x00>;
		riscv,isa = "rv64imafdc";
		riscv,pmpgranularity = <0x04>;
		riscv,pmpregions = <0x08>;
		status = "okay";
		timebase-frequency = <0x1312d0>;
		tlb-split;

		interrupt-controller {
			#interrupt-cells = <0x01>;
			compatible = "riscv,cpu-intc";
			interrupt-controller;
			phandle = <0x02>;
		};
	};

	cpu@1 {
		clock-frequency = <0x7735940>;
		compatible = "sifive,rocket0\0riscv";
		d-cache-block-size = <0x40>;
		d-cache-sets = <0x40>;
		d-cache-size = <0x4000>;
		d-tlb-sets = <0x01>;
		d-tlb-size = <0x20>;
		device_type = "cpu";
		hardware-exec-breakpoint-count = <0x08>;
		i-cache-block-size = <0x40>;
		i-cache-sets = <0x40>;
		i-cache-size = <0x4000>;
		i-tlb-sets = <0x01>;
		i-tlb-size = <0x20>;
		mmu-type = "riscv,sv39";
		next-level-cache = <0x01>;
		reg = <0x01>;
		riscv,isa = "rv64imafdc";
		riscv,pmpgranularity = <0x04>;
		riscv,pmpregions = <0x08>;
		status = "okay";
		timebase-frequency = <0x1312d0>;
		tlb-split;

		interrupt-controller {
			#interrupt-cells = <0x01>;
			compatible = "riscv,cpu-intc";
			interrupt-controller;
			phandle = <0x03>;
		};
	};
};

memory@80000000 {
	device_type = "memory";
	reg = <0x00 0x80000000 0x00 0x80000000>;
	phandle = <0x01>;
};

soc {
	#address-cells = <0x02>;
	#size-cells = <0x02>;
	compatible = "freechips,rocketchip-vivado-soc\0simple-bus";
	ranges;

	clint@2000000 {
		compatible = "riscv,clint0";
		interrupts-extended = <0x02 0x03 0x02 0x07 0x03 0x03 0x03 0x07>;
		reg = <0x00 0x2000000 0x00 0x10000>;
		reg-names = "control";
	};

	debug-controller@0 {
		compatible = "sifive,debug-013\0riscv,debug-013";
		debug-attach = "dmi";
		reg = <0x00 0x00 0x00 0x1000>;
		reg-names = "control";
	};

	error-device@3000 {
		compatible = "sifive,error0";
		reg = <0x00 0x3000 0x00 0x1000>;
	};

	external-interrupts {
		interrupt-parent = <0x04>;
		interrupts = <0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08>;
	};

	interrupt-controller@c000000 {
		#interrupt-cells = <0x01>;
		compatible = "riscv,plic0";
		interrupt-controller;
		interrupts-extended = <0x02 0x0b 0x02 0x09 0x03 0x0b 0x03 0x09>;
		reg = <0x00 0xc000000 0x00 0x4000000>;
		reg-names = "control";
		riscv,max-priority = <0x07>;
		riscv,ndev = <0x08>;
		phandle = <0x04>;
	};

	mmio-port-axi4@60000000 {
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		compatible = "simple-bus";
		ranges = <0x60000000 0x00 0x60000000 0x20000000>;
	};

	rom@10000 {
		compatible = "sifive,rom0";
		reg = <0x00 0x10000 0x00 0x10000>;
		reg-names = "mem";
	};

	rom@50000000 {
		compatible = "sifive,maskrom0";
		reg = <0x00 0x50000000 0x00 0x90000>;
		reg-names = "mem";
	};

	subsystem_pbus_clock {
		#clock-cells = <0x00>;
		clock-frequency = <0x7735940>;
		clock-output-names = "subsystem_pbus_clock";
		compatible = "fixed-clock";
	};
	
	pci@10000000 {
		compatible = "pci-host-ecam-generic";
		device_type = "pci";
		#address-cells = <3>;
		#size-cells = <2>;
		bus-range = <0x0 0x1>
		ranges = <0x01000000 0x00 0x01000000 0x00 0x01000000 0x00 0x00010000
			  0x02000000 0x00 0x20000000 0x00 0x20000000 0x00 0x30000000>;
		reg = <0x00 0x10000000 0x00 0x10000000>;
		#interrupt-cells = <1>;
		
	};
};

aliases {
	serial0 = "/io-bus/uart@60010000";
};

chosen {
	stdout-path = "serial0";
};

io-bus {
	#address-cells = <0x01>;
	#size-cells = <0x01>;
	compatible = "rocketchip-vivado-io\0simple-bus";
	ranges;

	uart@60010000 {
		compatible = "riscv,axi-uart-1.0";
		reg = <0x60010000 0x10000>;
		interrupt-parent = <0x04>;
		interrupts = <0x01>;
		port-number = <0x00>;
	};

	eth0@60020000 {
		compatible = "riscv,axi-ethernet-1.0";
		reg = <0x60020000 0x10000>;
		phy-mode = "10gbase-r";
		local-mac-address = [00 0a 35 00 00 03];
		interrupt-parent = <0x04>;
		interrupts = <0x03>;
	};

	eth1@60030000 {
		compatible = "riscv,axi-ethernet-1.0";
		reg = <0x60030000 0x10000>;
		phy-mode = "10gbase-r";
		local-mac-address = [00 0a 35 00 00 03];
		interrupt-parent = <0x04>;
		interrupts = <0x05>;
	};
};

};
`
Trying bootup, we got the error below.

Do you have any suggestions? Thanks a lot.