How to use esp-lp-hal?

[Veanir]

Hi,
first of all, I'm new in no_std part of esp-rs.
I'm having hard time started on esp-lp-hal on esp32s3 board. I can't even flash basic example.

I used esp-template to generate esp32s3 project as I'm still not familiar with esp-hal at all. There were no "lp" related options to choose from so my thinking was that I'm just gonna need to change dependencies.

1. First thing that i don't understand is that there's no esp-lp-hal crate on crates.io. Is it meant to access it from elsewhere than esp-lp-hal crate? - I cloned the esp-hal repository and added esp-lp-hal with local path and removed other dependencies (esp32s3-hal, esp-backtrace, esp-println).

Also, i changed target to "riscv32imc-unknown-none-elf as stated in README.

i left main.rs "empty":

#![no_std]
#![no_main]


#[entry]
fn main() -> ! {
    loop{
        // Your code here
    }
}

2. I'm getting errors like:
   no method named `in_` found for reference `&esp32s3_ulp::rtc_io::RegisterBlock` in the current scope method not found in `&RegisterBlock`

I also experimented a bit with adding other dependencies.
I'm not showing every detail, because I think I'm missing big picture rather than some detail.

What I'm trying to achieve in long run is to have code for the main Xtensa core written in esp-idf-hal (as I already have) and use bare metal implementation from esp-lp-hal to manage ulp coprocessor.
But for now I'm just trying to run basic example... without success x)

I have no clue how to tackle this, any help is very much welcome :D

[jessebraham]

Sorry about that, we're still in the early stages of development for the LP HAL (lots has changed there recently), so we have not yet published an initial release, and we don't really have much in the way of documentation. I hope to improve the situation here soon, I just have some other large projects I'm tackling at the moment. You can use esp-lp-hal via a git dependency in your Cargo.toml for the time being.

There will be two separate applications that you build, one for the HP core(s) and one for the LP core. These will use esp-hal and esp-lp-hal respectively.

You can see an example for the HP here, which loads an application to the LP core:
https://github.com/esp-rs/esp-hal/blob/main/esp32s3-hal/examples/ulp_riscv_core_basic.rs

For the LP core on the S2/S3, we currently only support GPIO (with other peripherals being worked on), but you can see a blinky example here:
https://github.com/esp-rs/esp-hal/blob/main/esp-lp-hal/examples/blinky.rs

I'm off work until Tuesday, but I can try to write some documentation next week when I get back which is a bit higher quality than this comment is. I hope this at least helps you get on track for the time being.

What I'm trying to achieve in long run is to have code for the main Xtensa core written in esp-idf-hal (as I already have) and use bare metal implementation from esp-lp-hal to manage ulp coprocessor.

I'm unfortunately not familiar with the IDF Rust ecosystem, but maybe @ivmarkov or @Vollbrecht can help?

[Vollbrecht]

building and producing the project is orthogonal to how it is deployed. I am not sure if there is support in the esp-hal template for the ulp processor? Maybe that is something to look for. If you got your ulp binary you should be able to load them via the esp-idf-hal ulp driver