@@ -176,7 +176,9 @@ inline static int tsl(volatile int* lock)
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" sync \n\t "
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#endif
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" .set pop\n\t "
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- : " =&r" (tmp), " =&r" (val), " =m" (*lock) : " m" (*lock) : " memory"
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+ : " =&r" (tmp), " =&r" (val), " =m" (*lock)
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+ : " m" (*lock)
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+ : " memory"
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);
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#elif defined __CPU_alpha
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long tmp;
@@ -192,7 +194,9 @@ inline static int tsl(volatile int* lock)
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" beq %2, 1b \n\t "
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" mb \n\t "
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" 2: \n\t "
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- :" =&r" (val), " =m" (*lock), " =&r" (tmp) :" m" (*lock) : " memory"
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+ :" =&r" (val), " =m" (*lock), " =&r" (tmp)
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+ :" m" (*lock)
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+ : " memory"
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);
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#else
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#error "unknown architecture"
@@ -280,10 +284,8 @@ inline static void release_lock(fl_lock_t* lock_struct)
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#ifndef NOSMP
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" membar #LoadStore | #StoreStore \n\t " /* is this really needed?*/
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#endif
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- " stb %%g0, [%0] \n\t "
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- : /* no output*/
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- : " r" (lock)
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- : " memory"
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+ " stb %%g0, [%1] \n\t "
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+ : " =m" (*lock) : " r" (lock) : " memory"
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);
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#elif defined(__CPU_arm) || defined(__CPU_arm6) || defined(__CPU_arm7)
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asm volatile (
@@ -294,10 +296,8 @@ inline static void release_lock(fl_lock_t* lock_struct)
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" mcr p15, #0, r1, c7, c10, #5\n\t "
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#endif
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#endif
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- " str %0, [%1] \n\r "
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- : /* no outputs*/
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- : " r" (0 ), " r" (lock)
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- : " memory"
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+ " str %1, [%2] \n\r "
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+ : " =m" (*lock) : " r" (0 ), " r" (lock) : " memory"
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);
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#elif defined(__CPU_ppc) || defined(__CPU_ppc64)
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asm volatile (
@@ -324,7 +324,9 @@ inline static void release_lock(fl_lock_t* lock_struct)
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);
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#elif defined __CPU_alpha
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asm volatile (
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+ #ifndef NOSMP
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" mb \n\t "
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+ #endif
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" stl $31, %0 \n\t "
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: " =m" (*lock) :/* no input*/ : " memory" /* because of the mb */
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);
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