@@ -965,7 +965,7 @@ let emit_atomic instr op (size : Cmm.atomic_bitwidth) addr =
965965let emit_simd_instr op i =
966966 (match Simd_selection.register_behavior op with
967967 | R_to_fst ->
968- assert (arg i 0 = res i 0 );
968+ assert (Reg.same_loc i.arg.(0) i.res.(0) );
969969 assert (Reg.is_reg i.arg.(0))
970970 | R_to_RM ->
971971 assert (Reg.is_reg i.arg.(0))
@@ -974,34 +974,34 @@ let emit_simd_instr op i =
974974 | R_to_R ->
975975 assert (Reg.is_reg i.arg.(0) && Reg.is_reg i.res.(0))
976976 | R_RM_to_fst ->
977- assert (arg i 0 = res i 0 );
977+ assert (Reg.same_loc i.arg.(0) i.res.(0) );
978978 assert (Reg.is_reg i.arg.(0))
979979 | R_RM_to_R ->
980980 assert (Reg.is_reg i.arg.(0));
981981 assert (Reg.is_reg i.res.(0))
982982 | R_RM_xmm0_to_fst ->
983- assert (arg i 0 = res i 0 );
983+ assert (Reg.same_loc i.arg.(0) i.res.(0) );
984984 assert (Reg.is_reg i.arg.(0));
985- assert (i.arg.(2) = phys_xmm0v ())
985+ assert (Reg.same_loc i.arg.(2) ( phys_xmm0v () ))
986986 | R_R_to_fst ->
987- assert (arg i 0 = res i 0 );
987+ assert (Reg.same_loc i.arg.(0) i.res.(0) );
988988 assert (Reg.is_reg i.arg.(0) && Reg.is_reg i.arg.(1))
989989 | R_RM_rax_rdx_to_rcx ->
990990 assert (Reg.is_reg i.arg.(0));
991- assert (i.arg.(2) = phys_rax);
992- assert (i.arg.(3) = phys_rdx);
993- assert (i.res.(0) = phys_rcx)
991+ assert (Reg.same_loc ( i.arg.(2)) phys_rax);
992+ assert (Reg.same_loc ( i.arg.(3)) phys_rdx);
993+ assert (Reg.same_loc i.res.(0) phys_rcx)
994994 | R_RM_to_rcx ->
995995 assert (Reg.is_reg i.arg.(0));
996- assert (i.res.(0) = phys_rcx)
996+ assert (Reg.same_loc ( i.res.(0)) phys_rcx)
997997 | R_RM_rax_rdx_to_xmm0 ->
998998 assert (Reg.is_reg i.arg.(0));
999- assert (i.arg.(2) = phys_rax);
1000- assert (i.arg.(3) = phys_rdx);
1001- assert (i.res.(0) = phys_xmm0v ())
999+ assert (Reg.same_loc ( i.arg.(2)) phys_rax);
1000+ assert (Reg.same_loc ( i.arg.(3)) phys_rdx);
1001+ assert (Reg.same_loc ( i.res.(0)) ( phys_xmm0v () ))
10021002 | R_RM_to_xmm0 ->
10031003 assert (Reg.is_reg i.arg.(0));
1004- assert (i.res.(0) = phys_xmm0v ())
1004+ assert (Reg.same_loc i.res.(0) ( phys_xmm0v () ))
10051005 );
10061006 match (op : Simd.operation) with
10071007 | CLMUL (Clmul_64 n) -> I.pclmulqdq (X86_dsl.int n) (arg i 1) (res i 0)
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