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license and more register use
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‎LICENSE

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,21 @@
1+
MIT License
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Copyright (c) 2023 Karolis Stasaitis
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Permission is hereby granted, free of charge, to any person obtaining a copy
6+
of this software and associated documentation files (the "Software"), to deal
7+
in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in all
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copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.

‎src/gpio.c

Lines changed: 24 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -56,27 +56,26 @@ P1_3 - UL B
5656

5757
void gpio_init()
5858
{
59-
P1CR = (uint8_t)((1 << 1) | (1 << 2) | (1 << 3) | (1 << 5));
60-
P2CR = (uint8_t)((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5));
61-
P3CR = (uint8_t)((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5));
62-
P5CR = (uint8_t)((1 << 0) | (1 << 1) | (1 << 2) | (0 << 3) | (0 << 4) | (1 << 7));
63-
P7CR = (uint8_t)((0 << 1) | (0 << 2) | (0 << 3));
64-
65-
P1PCR = (uint8_t)((1 << 1) | (1 << 2) | (1 << 3) | (1 << 5));
66-
P2PCR = (uint8_t)((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5));
67-
P3PCR = (uint8_t)((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5));
68-
P5PCR = (uint8_t)((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 7));
69-
P7PCR = (uint8_t)((1 << 1) | (1 << 2) | (1 << 3));
59+
P1CR = (uint8_t)(_P1_1 | _P1_2 | _P1_3 | _P1_5);
60+
P2CR = (uint8_t)(_P2_0 | _P2_1 | _P2_2 | _P2_3 | _P2_4 | _P2_5);
61+
P3CR = (uint8_t)(_P3_0 | _P3_1 | _P3_2 | _P3_3 | _P3_4 | _P3_5);
62+
P5CR = (uint8_t)(_P5_0 | _P5_1 | _P5_2 | _P5_7);
63+
64+
P1PCR = (uint8_t)(_P1_1 | _P1_2 | _P1_3 | _P1_5);
65+
P2PCR = (uint8_t)(_P2_0 | _P2_1 | _P2_2 | _P2_3 | _P2_4 | _P2_5);
66+
P3PCR = (uint8_t)(_P3_0 | _P3_1 | _P3_2 | _P3_3 | _P3_4 | _P3_5);
67+
P5PCR = (uint8_t)(_P5_0 | _P5_1 | _P5_2 | _P5_3 | _P5_4 | _P5_7);
68+
P7PCR = (uint8_t)(_P7_1 | _P1_2 | _P1_3);
7069

7170
// P1_1 - UL R
7271
// P1_2 - UL G
7372
// P1_3 - UL B
7473
// P5_7 - R1 B
75-
P1 = (uint8_t)((1 << 1) | (1 << 2) | (1 << 3) | (1 << 5));
76-
P2 = (uint8_t)((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5));
77-
P3 = (uint8_t)((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5));
78-
P5 = (uint8_t)((1 << 0) | (1 << 1) | (1 << 2) | (0 << 3) | (0 << 4) | (1 << 7));
79-
P7 = (uint8_t)((0 << 1) | (0 << 2) | (0 << 3));
74+
P1 = (uint8_t)(_P1_1 | _P1_2 | _P1_3 | _P1_5);
75+
P2 = (uint8_t)(_P2_0 | _P2_1 | _P2_2 | _P2_3 | _P2_4 | _P2_5);
76+
P3 = (uint8_t)(_P4_0 | _P3_1 | _P3_2 | _P3_3 | _P3_4 | _P3_5);
77+
P5 = (uint8_t)(_P5_0 | _P5_1 | _P5_2 | _P5_7);
78+
P7 = (uint8_t)(_P7_1);
8079

8180
// P6_1 - R0 G
8281
// P6_2 - R1 G
@@ -85,24 +84,24 @@ void gpio_init()
8584
// P6_5 - R4 G
8685
// P6_6 - R1 B
8786
// P6_7 - R1 R
88-
P6CR = (uint8_t)((1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7));
89-
P6PCR = (uint8_t)((1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7));
90-
P6 = (uint8_t)((1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7));
87+
P6CR = (uint8_t)(_P6_1 | _P6_2 | _P6_3 | _P6_4 | _P6_5 | _P6_6 | _P6_7);
88+
P6PCR = (uint8_t)(_P6_1 | _P6_2 | _P6_3 | _P6_4 | _P6_5 | _P6_6 | _P6_7);
89+
P6 = (uint8_t)(_P6_1 | _P6_2 | _P6_3 | _P6_4 | _P6_5 | _P6_6 | _P6_7);
9190

9291
// P4_3 - R4 B
9392
// P4_4 - R4 R
9493
// P4_5 - R3 R
9594
// P4_6 - R3 B
96-
P4CR = (uint8_t)((1 << 3) | (1 << 4) | (1 << 5) | (1 << 6));
97-
P4PCR = (uint8_t)((1 << 3) | (1 << 4) | (1 << 5) | (1 << 6));
98-
P4 = (uint8_t)((1 << 3) | (1 << 4) | (1 << 5) | (1 << 6));
95+
P4CR = (uint8_t)(_P4_3 | _P4_4 | _P4_5 | _P4_6);
96+
P4PCR = (uint8_t)(_P4_3 | _P4_4 | _P4_5 | _P4_6);
97+
P4 = (uint8_t)(_P4_3 | _P4_4 | _P4_5 | _P4_6);
9998

10099
// P0_2 - R2 R
101100
// P0_3 - R0 B
102101
// P0_4 - R0 R
103-
P0CR = (uint8_t)((1 << 2) | (1 << 3) | (1 << 4));
104-
P0PCR = (uint8_t)((1 << 2) | (1 << 3) | (1 << 4));
105-
P0 = (uint8_t)((1 << 2) | (1 << 3) | (1 << 4));
102+
P0CR = (uint8_t)(_P0_2 | _P0_3 | _P0_4);
103+
P0PCR = (uint8_t)(_P0_2 | _P0_3 | _P0_4);
104+
P0 = (uint8_t)(_P0_2 | _P0_3 | _P0_4);
106105

107106
// configure driving capabilities
108107
DRVCON = 0x05; // allow P1 to be changed

‎src/matrix.c

Lines changed: 45 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -25,10 +25,11 @@
2525
#define C14 P2_0
2626
#define C15 P1_5
2727

28+
void animation_step(uint8_t current_step);
29+
2830
typedef uint8_t matrix_col_t;
2931

3032
volatile uint8_t current_step;
31-
volatile uint16_t current_cycle;
3233

3334
volatile __xdata matrix_col_t matrix[MATRIX_COLS];
3435
__xdata matrix_col_t matrix_previous[MATRIX_COLS];
@@ -46,8 +47,6 @@ void matrix_init()
4647
matrix[i] = 0;
4748
matrix_previous[i] = 0;
4849
}
49-
50-
current_cycle = 1;
5150
}
5251

5352
inline matrix_col_t matrix_get_col(uint8_t col)
@@ -159,22 +158,22 @@ uint8_t matrix_task()
159158

160159
inline void matrix_scan_step()
161160
{
162-
// set all rgb sinks to low
163-
P0 &= ~((1 << 2) | (1 << 3) | (1 << 4));
164-
P1 &= ~((1 << 1) | (1 << 2) | (1 << 3));
165-
P4 &= ~((1 << 3) | (1 << 4) | (1 << 5) | (1 << 6));
166-
P5 &= ~((1 << 7));
167-
P6 &= ~((1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7));
161+
// set all rgb sinks to low (animation step will enable needed ones)
162+
P0 &= ~(_P0_2 | _P0_3 | _P0_4);
163+
P1 &= ~(_P1_1 | _P1_2 | _P1_3);
164+
P4 &= ~(_P4_3 | _P4_4 | _P4_5 | _P4_6);
165+
P5 &= ~(_P5_7);
166+
P6 &= ~(_P6_1 | _P6_2 | _P6_3 | _P6_4 | _P6_5 | _P6_6 | _P6_7);
168167

169168
pwm_disable();
170169

171170
// ignore until matrix has been read
172171
if (!matrix_updated) {
173172
// set all columns to high
174-
P1 |= (uint8_t)((1 << 5));
175-
P2 |= (uint8_t)((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5));
176-
P3 |= (uint8_t)((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5));
177-
P5 |= (uint8_t)((1 << 0) | (1 << 1) | (1 << 2));
173+
P1 |= (uint8_t)(_P1_5);
174+
P2 |= (uint8_t)(_P2_0 | _P2_1 | _P2_2 | _P2_3 | _P2_4 | _P2_5);
175+
P3 |= (uint8_t)(_P3_0 | _P3_1 | _P3_2 | _P3_3 | _P3_4 | _P3_5);
176+
P5 |= (uint8_t)(_P5_0 | _P5_1 | _P5_2);
178177

179178
// set current (!) column to low
180179
switch (current_step) {
@@ -243,25 +242,50 @@ inline void matrix_scan_step()
243242
break;
244243
}
245244

245+
// grab key for the column state
246246
// P7_1 - R0
247247
// P7_2 - R1
248248
// P7_3 - R2
249249
// P5_3 - R3
250250
// P5_4 - R4
251-
252-
// check rows for pressed keys
253-
uint8_t initial_row_state = (((P7 >> 1) & 0x07) | (P5 & 0x18)) | 0xe0;
251+
uint8_t column_state = (((P7 >> 1) & 0x07) | (P5 & 0x18)) | 0xe0;
254252

255253
// set all columns down to low
256-
P1 &= (uint8_t)~((1 << 5));
257-
P2 &= (uint8_t)~((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5));
258-
P3 &= (uint8_t)~((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5));
259-
P5 &= (uint8_t)~((1 << 0) | (1 << 1) | (1 << 2));
254+
P1 &= (uint8_t)~(_P1_5);
255+
P2 &= (uint8_t)~(_P2_0 | _P2_1 | _P2_2 | _P2_3 | _P2_4 | _P2_5);
256+
P3 &= (uint8_t)~(_P3_0 | _P3_1 | _P3_2 | _P3_3 | _P3_4 | _P3_5);
257+
P5 &= (uint8_t)~(_P5_0 | _P5_1 | _P5_2);
260258

261-
matrix[current_step] = ~initial_row_state;
259+
matrix[current_step] = ~column_state;
262260
}
263261

264262
// rgb led matrix animation
263+
animation_step(current_step);
264+
265+
// move step
266+
if (current_step < MATRIX_COLS - 1) {
267+
current_step++;
268+
} else {
269+
current_step = 0;
270+
matrix_updated = true;
271+
}
272+
273+
// clear pwm isr flag
274+
PWM00CON &= ~(1 << 5);
275+
276+
pwm_enable();
277+
}
278+
279+
void animation_step(uint8_t current_step) {
280+
static uint16_t current_cycle = 0;
281+
if (current_step == 0) {
282+
if (current_cycle < 3072) {
283+
current_cycle++;
284+
} else {
285+
current_cycle = 0;
286+
}
287+
}
288+
265289
uint16_t red_intensity = 0;
266290
uint16_t green_intensity = 0;
267291
uint16_t blue_intensity = 0;
@@ -318,23 +342,4 @@ inline void matrix_scan_step()
318342

319343
// set pwm duty cycles to expected colors
320344
pwm_set_all_columns(color_intensity);
321-
322-
// move step
323-
if (current_step < MATRIX_COLS - 1) {
324-
current_step++;
325-
} else {
326-
current_step = 0;
327-
matrix_updated = true;
328-
329-
if (current_cycle < 3072) {
330-
current_cycle++;
331-
} else {
332-
current_cycle = 0;
333-
}
334-
}
335-
336-
// clear pwm isr flag
337-
PWM00CON &= ~(1 << 5);
338-
339-
pwm_enable();
340345
}

‎src/sh68f90a.h

Lines changed: 106 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -524,6 +524,112 @@ SBIT(PSPIL, 0x88, 6);
524524
#define _ES0 (1u<<6) ///< Bit 6
525525
/**@}*/
526526

527+
/**
528+
* \name Bits from registers P0, P0CR, P0PCR
529+
* @{
530+
*/
531+
#define _P0_0 (1u<<0) ///< Bit 0
532+
#define _P0_1 (1u<<1) ///< Bit 1
533+
#define _P0_2 (1u<<2) ///< Bit 2
534+
#define _P0_3 (1u<<3) ///< Bit 3
535+
#define _P0_4 (1u<<4) ///< Bit 4
536+
#define _P0_5 (1u<<5) ///< Bit 5
537+
#define _P0_6 (1u<<6) ///< Bit 6
538+
#define _P0_7 (1u<<7) ///< Bit 7
539+
/**@}*/
540+
541+
/**
542+
* \name Bits from registers P1, P1CR, P1PCR
543+
* @{
544+
*/
545+
#define _P1_0 (1u<<0) ///< Bit 0
546+
#define _P1_1 (1u<<1) ///< Bit 1
547+
#define _P1_2 (1u<<2) ///< Bit 2
548+
#define _P1_3 (1u<<3) ///< Bit 3
549+
#define _P1_4 (1u<<4) ///< Bit 4
550+
#define _P1_5 (1u<<5) ///< Bit 5
551+
/**@}*/
552+
553+
/**
554+
* \name Bits from registers P2, P2CR, P2PCR
555+
* @{
556+
*/
557+
#define _P2_0 (1u<<0) ///< Bit 0
558+
#define _P2_1 (1u<<1) ///< Bit 1
559+
#define _P2_2 (1u<<2) ///< Bit 2
560+
#define _P2_3 (1u<<3) ///< Bit 3
561+
#define _P2_4 (1u<<4) ///< Bit 4
562+
#define _P2_5 (1u<<5) ///< Bit 5
563+
/**@}*/
564+
565+
/**
566+
* \name Bits from registers P3, P3CR, P3PCR
567+
* @{
568+
*/
569+
#define _P3_0 (1u<<0) ///< Bit 0
570+
#define _P3_1 (1u<<1) ///< Bit 1
571+
#define _P3_2 (1u<<2) ///< Bit 2
572+
#define _P3_3 (1u<<3) ///< Bit 3
573+
#define _P3_4 (1u<<4) ///< Bit 4
574+
#define _P3_5 (1u<<5) ///< Bit 5
575+
/**@}*/
576+
577+
/**
578+
* \name Bits from registers P4, P4CR, P4PCR
579+
* @{
580+
*/
581+
#define _P4_0 (1u<<0) ///< Bit 0
582+
#define _P4_1 (1u<<1) ///< Bit 1
583+
#define _P4_2 (1u<<2) ///< Bit 2
584+
#define _P4_3 (1u<<3) ///< Bit 3
585+
#define _P4_4 (1u<<4) ///< Bit 4
586+
#define _P4_5 (1u<<5) ///< Bit 5
587+
#define _P4_6 (1u<<6) ///< Bit 6
588+
#define _P4_7 (1u<<7) ///< Bit 7
589+
/**@}*/
590+
591+
/**
592+
* \name Bits from registers P5, P5CR, P5PCR
593+
* @{
594+
*/
595+
#define _P5_0 (1u<<0) ///< Bit 0
596+
#define _P5_1 (1u<<1) ///< Bit 1
597+
#define _P5_2 (1u<<2) ///< Bit 2
598+
#define _P5_3 (1u<<3) ///< Bit 3
599+
#define _P5_4 (1u<<4) ///< Bit 4
600+
#define _P5_5 (1u<<5) ///< Bit 5
601+
#define _P5_6 (1u<<6) ///< Bit 6
602+
#define _P5_7 (1u<<7) ///< Bit 7
603+
/**@}*/
604+
605+
/**
606+
* \name Bits from registers P6, P6CR, P6PCR
607+
* @{
608+
*/
609+
#define _P6_0 (1u<<0) ///< Bit 0
610+
#define _P6_1 (1u<<1) ///< Bit 1
611+
#define _P6_2 (1u<<2) ///< Bit 2
612+
#define _P6_3 (1u<<3) ///< Bit 3
613+
#define _P6_4 (1u<<4) ///< Bit 4
614+
#define _P6_5 (1u<<5) ///< Bit 5
615+
#define _P6_6 (1u<<6) ///< Bit 6
616+
#define _P6_7 (1u<<7) ///< Bit 7
617+
/**@}*/
618+
619+
/**
620+
* \name Bits from registers P7, P7CR, P7PCR
621+
* @{
622+
*/
623+
#define _P7_0 (1u<<0) ///< Bit 0
624+
#define _P7_1 (1u<<1) ///< Bit 1
625+
#define _P7_2 (1u<<2) ///< Bit 2
626+
#define _P7_3 (1u<<3) ///< Bit 3
627+
#define _P7_4 (1u<<4) ///< Bit 4
628+
#define _P7_5 (1u<<5) ///< Bit 5
629+
#define _P7_6 (1u<<6) ///< Bit 6
630+
#define _P7_7 (1u<<7) ///< Bit 7
631+
/**@}*/
632+
527633
/**
528634
* \name Bits from register REGCON
529635
* @{

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