Drop MatchByTypeName check in opIsPartOfiPTRPattern#79
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Rot127 merged 1 commit intocapstone-engine:auto-sync-18from May 16, 2025
Merged
Drop MatchByTypeName check in opIsPartOfiPTRPattern#79Rot127 merged 1 commit intocapstone-engine:auto-sync-18from
Rot127 merged 1 commit intocapstone-engine:auto-sync-18from
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Can you please quickly rebase onto the upstream If you have the time it would be awesome if you could regenerate the tables in Capstone again and open a PR there. So we can close the issue. |
Matching by type name can make incorrect assumption of memory operands, when the destnation register and base register share the same type of GPR. Drop this logic for now. This commit fixes the destination register info of load instructions of LoongArch ISA. Fixes capstone-engine/capstone#2700. Co-authored-by: Rot127 <45763064+Rot127@users.noreply.github.com>
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According to capstone-engine#2700, the register info of LoongArch ld/st instructions is wrong. A fix for the issue is proposed for llvm-capstone at capstone-engine/llvm-capstone#79. This commit integrates the fix and regenerates the tables via `ASUpdater -a LoongArch -w -s IncGen`. The case change in LoongArchGenCSOpGroup.inc is also handled. Fixes: capstone-engine#2700
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Done! See capstone-engine/capstone#2701 |
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According to capstone-engine#2700, the register info of LoongArch ld/st instructions is wrong. A fix for the issue is proposed for llvm-capstone at capstone-engine/llvm-capstone#79. This commit integrates the fix and regenerates the tables via `ASUpdater -a LoongArch -w -s IncGen`. The case change in LoongArchGenCSOpGroup.inc is also handled. Fixes: capstone-engine#2700
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According to #2700, the register info of LoongArch ld/st instructions is wrong. A fix for the issue is proposed for llvm-capstone at capstone-engine/llvm-capstone#79. This commit integrates the fix and regenerates the tables via `ASUpdater -a LoongArch -w -s IncGen`. The case change in LoongArchGenCSOpGroup.inc is also handled. Fixes: #2700
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Matching by type name can make incorrect assumption of memory operands, when the destnation register and base register share the same type of GPR. Drop this logic for now. This commit fixes the destination register info of load instructions of LoongArch ISA.
Addresses capstone-engine/capstone#2700.