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ps_hub75_128_BCM.pio
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ps_hub75_128_BCM.pio
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/*****************************************************
*
* LED matrix driver for Raspberry RP2040
* (c) Peter Schulten, Mülheim, Germany
* peter_(at)_pitschu.de
*
* Unmodified reproduction and distribution of this entire
* source code in any form is permitted provided the above
* notice is preserved.
* I make this source code available free of charge and therefore
* offer neither support nor guarantee for its functionality.
* Furthermore, I assume no liability for the consequences of
* its use.
* The source code may only be used and modified for private,
* non-commercial purposes. Any further use requires my consent.
*
* History
* 25.01.2022 pitschu Start of work
*/
; PCB layout V2 pins:
; 26 = LATCH, 27 = OE, side set 28 = CLK
; Data pins are 12..17: R0, G0, B0, R1, G1, B1
; Data pins are 6..11: R2, G2, B2, R3, G3, B3
; Row sel pins are: 18..22: A .. E
.program ps_128_data2
; OUT pins are 12..17: R0, G0, B0, R1, G1, B1
; OUT pins are 6..11: R2, G2, B2, R3, G3, B3
; SET pin is LATCH(26)
; SIDE pin is CLK(28)
.side_set 1
public entry_data:
.wrap_target
set x, 31 side 0 ; init loop counter for 128 columns
irq wait 0 side 0 ; set and wait for IRQ-0 to be reset
loop0:
pull block side 0 ; get cols N..N+3 (triggers data DMA channel))
loox:
out pins, 6 side 0 ; ----------- apply data ----------------------
out y, 2 side 0
jmp !y, noOE side 1 ; enable OE when brightness limit reached
set pins 0 side 1
noOE:
jmp !osre, loox [1] side 1
jmp x--, loop0 side 0
set pins 3 side 0 ; last data block in this row: apply LATCH; disable OE
irq clear 1 side 0 ; LATCH will be released by ctrl state machine
.wrap
% c-sdk {
// this is a raw helper function for use by the user which sets up the GPIO output, and configures the SM to output on a particular pin
static inline void ps_128_data2_program_init(PIO pio, uint sm, uint offset,
int outBase, int outCnt,
int setBase, int setCnt,
int sideBase, int sideCnt)
{
pio_sm_config c = ps_128_data2_program_get_default_config(offset);
if (outCnt > 0)
{
pio_sm_set_consecutive_pindirs(pio, sm, outBase, outCnt, true); // 2*6 RGB pins
for (int i = outBase; i < outBase + outCnt; i++) {
pio_gpio_init(pio, i);
}
sm_config_set_out_pins(&c, outBase, outCnt);
}
if (setCnt > 0)
{
pio_sm_set_consecutive_pindirs(pio, sm, setBase, setCnt, true); // LATCH pin
for (int i = setBase; i < setBase + setCnt; i++) {
pio_gpio_init(pio, i);
}
sm_config_set_set_pins(&c, setBase, setCnt);
}
if (sideCnt > 0)
{
pio_sm_set_consecutive_pindirs(pio, sm, sideBase, sideCnt, true); // CLK pin
for (int i = sideBase; i < sideBase + sideCnt; i++) {
pio_gpio_init(pio, i);
}
sm_config_set_sideset_pins(&c, sideBase);
sm_config_set_sideset(&c, sideCnt, false, false);
}
sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX);
sm_config_set_clkdiv(&c, 1.0f);
sm_config_set_out_shift(&c, true, false, 32);
sm_config_set_in_shift(&c, false, false, 32);
pio_sm_init(pio, sm, offset, &c);
pio_sm_exec(pio, sm, offset + ps_128_data2_offset_entry_data);
pio_sm_set_enabled(pio, sm, true);
}
%}
.program ps_128_ctrl
; OUT pins are Row sel pins: 18..22: A .. E
; SET pins are LATCH(26) and OE(27)
public entry_ctrl:
.wrap_target
irq clear 0 ; starts data state machine
;------------ state machine is running
irq wait 1 [5] ; wait until data state machine is ready
set pins, 2 ; disable LATCH, disable OE
pull block ; get line address
out pins, 5 ; set addr lines
.wrap
% c-sdk {
// ; OUT pins are Row sel pins: 18..22: A .. E
// ; SET pins are LATCH(26) and OE(27)
static inline void ps_128_ctrl_program_init(PIO pio, uint sm, uint offset,
int outBase, int outCnt,
int setBase, int setCnt,
int sideBase, int sideCnt)
{
pio_sm_config c = ps_128_ctrl_program_get_default_config(offset);
if (outCnt > 0)
{
pio_sm_set_consecutive_pindirs(pio, sm, outBase, outCnt, true);
for (int i = outBase; i < outBase+outCnt; i++) {
pio_gpio_init(pio, i);
}
sm_config_set_out_pins(&c, outBase, outCnt);
}
if (setCnt > 0)
{
pio_sm_set_consecutive_pindirs(pio, sm, setBase, setCnt, true); // LATCH and OE
for (int i = setBase; i < setBase + setCnt; i++) {
pio_gpio_init(pio, i);
}
sm_config_set_set_pins(&c, setBase, setCnt);
}
if (sideCnt > 0)
{
pio_sm_set_consecutive_pindirs(pio, sm, sideBase, sideCnt, true); // CLK pin
for (int i = sideBase; i < sideBase + sideCnt; i++) {
pio_gpio_init(pio, i);
}
sm_config_set_sideset_pins(&c, sideBase);
sm_config_set_sideset(&c, sideCnt, false, false);
}
sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX);
sm_config_set_clkdiv(&c, 1.0f);
sm_config_set_out_shift(&c, true, false, 32);
sm_config_set_in_shift(&c, false, false, 32);
pio_sm_init(pio, sm, offset, &c);
pio_sm_exec(pio, sm, offset + ps_128_ctrl_offset_entry_ctrl);
pio_sm_set_enabled(pio, sm, true);
}
%}