@@ -117,14 +117,14 @@ ISR(TIMER2_COMPB_vect, ISR_NAKED) {
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register bool is_beat_2 asm (" r24" ) = F.is_beat_2 ; // 2cy
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if (is_beat_2) tempo_pin.high (); // this compiles to a `sbrc` which doesn't affect the SREG!
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- /* Based on LSB of portb_mask, swap the nibbles of portb val before di
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- * The idea is that portb_val is actually a double buffer, and portb_m
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- * a blend percentage. Once every sample interrupt, it is rotated by 1
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- * So a mask = 0x00 will always show the one half of portb_val, and ma
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- * with mask = 0x55 showing a 50/50 mix. Thus, you can achieve fades a
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+ /* Based on LSB of portb_mask, swap the nibbles of portb val before displaying.
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+ * The idea is that portb_val is actually a double buffer, and portb_mask is effectively
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+ * a blend percentage. Once every sample interrupt, it is rotated by 1 bit.
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+ * So a mask = 0x00 will always show the one half of portb_val, and mask = 0xFF will show the other half,
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+ * with mask = 0x55 showing a 50/50 mix. Thus, you can achieve fades and pulses on the seven seg
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* by periodically updating the val and the mask.
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*
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- * Note that because just saving and restoring SREG takes 6 cycles, we
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+ * Note that because just saving and restoring SREG takes 6 cycles, we're avoiding anything that modifies
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* SREG altogether in order to keep this to 8 cycles total.
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*
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* total: 8 cycles
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