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exit.c
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exit.c
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/*
* ksm - a really simple and fast x64 hypervisor
* Copyright (C) 2016, 2017 Ahmed Samy <[email protected]>
*
* This file handles a VM-exit from guest, if any error occurs,
* it either:
* 1) crashes the system
* 2) injects an exception into guest
* Otherwise it returns execution to guest.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef __linux__
#include <linux/kernel.h>
#else
#include <ntddk.h>
#include <intrin.h>
#endif
#include "ksm.h"
#ifdef NESTED_VMX
/* FIXME: Support these! */
static const u32 nested_unsupported_primary = CPU_BASED_MOV_DR_EXITING;
static const u32 nested_unsupported_secondary = SECONDARY_EXEC_ENABLE_VMFUNC | SECONDARY_EXEC_DESC_TABLE_EXITING;
static inline bool __nested_vmcs_write(uintptr_t vmcs, u32 field, u64 value)
{
u64 *s = (u64 *)vmcs;
u16 off = field_offset(field);
u64 v = s[off];
switch (field_width(field)) {
case FIELD_U16:
v = value & 0xFFFF;
break;
case FIELD_U32:
v = value & 0xFFFFFFFF;
break;
case FIELD_U64:
if (field & 1) { /* _HIGH */
v &= 0xFFFFFFFF;
v |= value << 32;
break;
}
/* fallthrough */
default:
v = value;
break;
}
s[off] = v;
return true;
}
static inline bool __nested_vmcs_write64(uintptr_t vmcs, u32 field, u64 value)
{
#if 0
return __nested_vmcs_write(vmcs, field, (u32)value) &&
__nested_vmcs_write(vmcs, field + 1, (u32)(value >> 32));
#else
return __nested_vmcs_write(vmcs, field, value);
#endif
}
static inline bool nested_vmcs_write(uintptr_t vmcs, u32 field, u64 value)
{
if (!field_supported(field))
return false;
switch (field) {
case CPU_BASED_VM_EXEC_CONTROL:
if (value & nested_unsupported_primary)
return false;
break;
case SECONDARY_VM_EXEC_CONTROL:
if (value & nested_unsupported_secondary)
return false;
break;
}
return __nested_vmcs_write(vmcs, field, value);
}
static inline u64 __nested_vmcs_read(uintptr_t vmcs, u32 field)
{
u64 *s = (u64 *)vmcs;
u64 v = s[field_offset(field)];
switch (field_width(field)) {
case FIELD_U16:
v &= 0xFFFF;
break;
case FIELD_U32:
v &= 0xFFFFFFFF;
break;
case FIELD_U64:
if (field & 1) /* _HIGH */
v >>= 32;
break;
case FIELD_NATURAL:
default:
break;
}
return v;
}
static inline u64 __nested_vmcs_read64(uintptr_t vmcs, u32 field)
{
#if 0
return __nested_vmcs_read(vmcs, field) |
__nested_vmcs_read(vmcs, field + 1) << 32;
#else
return __nested_vmcs_read(vmcs, field);
#endif
}
static inline u32 __nested_vmcs_read32(uintptr_t vmcs, u32 field)
{
return (u32)__nested_vmcs_read(vmcs, field);
}
static inline u16 __nested_vmcs_read16(uintptr_t vmcs, u32 field)
{
return (u16)__nested_vmcs_read(vmcs, field);
}
static inline bool nested_vmcs_read(uintptr_t vmcs, u32 field, u64 *val)
{
if (!field_supported(field))
return false;
*val = __nested_vmcs_read(vmcs, field);
return true;
}
#endif
static inline int vcpu_read_cpl(void)
{
u32 ar = vmcs_read32(GUEST_SS_AR_BYTES);
return VMX_AR_DPL(ar);
}
static inline bool vcpu_probe_cpl(int required)
{
return vcpu_read_cpl() <= required;
}
typedef enum {
EXCEPTION_BENIGN,
EXCEPTION_CONTRIBUTORY,
EXCEPTION_PAGE_FAULT,
} except_class_t;
static inline except_class_t exception_class(u8 vec)
{
switch (vec) {
case X86_TRAP_PF:
return EXCEPTION_PAGE_FAULT;
case X86_TRAP_DE:
case X86_TRAP_TS:
case X86_TRAP_NP:
case X86_TRAP_SS:
case X86_TRAP_GP:
return EXCEPTION_CONTRIBUTORY;
}
return EXCEPTION_BENIGN;
}
static inline void vcpu_pack_irq(struct pending_irq *pirq, u32 instr_len, u16 intr_type,
u8 vector, bool has_err, u32 ec)
{
u32 irq = vector | intr_type | INTR_INFO_VALID_MASK;
if (has_err)
irq |= INTR_INFO_DELIVER_CODE_MASK;
pirq->pending = true;
pirq->err = ec;
pirq->instr_len = instr_len;
pirq->bits = irq & ~INTR_INFO_RESVD_BITS_MASK;
}
static inline void vcpu_inject_irq(struct vcpu *vcpu, u32 instr_len, u16 intr_type,
u8 vector, bool has_err, u32 ec)
{
/*
* Queue the IRQ, no injection happens here.
* In case we have contributory exceptions that follow, then
* we overwrite the previous with the appropriate IRQ.
*/
struct pending_irq *pirq = &vcpu->irq;
if (pirq->pending) {
u8 prev_vec = (u8)pirq->bits;
BREAK_ON(prev_vec == X86_TRAP_DF); /* FIXME: Triple fault */
except_class_t lhs = exception_class(prev_vec);
except_class_t rhs = exception_class(vector);
if ((lhs == EXCEPTION_CONTRIBUTORY && rhs == EXCEPTION_CONTRIBUTORY) ||
(lhs == EXCEPTION_PAGE_FAULT && rhs != EXCEPTION_BENIGN))
return vcpu_pack_irq(pirq, instr_len, INTR_TYPE_HARD_EXCEPTION,
X86_TRAP_DF, true, 0);
}
return vcpu_pack_irq(pirq, instr_len, intr_type, vector, has_err, ec);
}
static inline void vcpu_inject_hardirq_noerr(struct vcpu *vcpu, u8 vector)
{
return vcpu_inject_irq(vcpu, vmcs_read32(VM_EXIT_INSTRUCTION_LEN),
INTR_TYPE_HARD_EXCEPTION, vector, false, 0);
}
static inline void vcpu_inject_hardirq(struct vcpu *vcpu, u8 vector, u32 err)
{
return vcpu_inject_irq(vcpu, vmcs_read32(VM_EXIT_INSTRUCTION_LEN),
INTR_TYPE_HARD_EXCEPTION, vector, true, err);
}
static inline void vcpu_inject_pf(struct vcpu *vcpu, u64 gla, u32 ec)
{
__writecr2(gla);
return vcpu_inject_irq(vcpu, 0, INTR_TYPE_HARD_EXCEPTION,
X86_TRAP_PF, true, ec);
}
static inline bool vcpu_inject_gp_if(struct vcpu *vcpu, bool cond)
{
if (cond)
vcpu_inject_hardirq(vcpu, X86_TRAP_GP, 0);
return cond;
}
static inline void vcpu_advance_rip(struct vcpu *vcpu)
{
if (vcpu->eflags & X86_EFLAGS_TF) {
vcpu_inject_hardirq_noerr(vcpu, X86_TRAP_DB);
if (vcpu_probe_cpl(0)) {
__writedr(6, __readdr(6) | DR6_BS | DR6_RTM);
__writedr(7, __readdr(7) & ~DR7_GD);
u64 dbg = vmcs_read64(GUEST_IA32_DEBUGCTL);
vmcs_write64(GUEST_IA32_DEBUGCTL, dbg & ~DEBUGCTLMSR_LBR);
}
}
u32 instr_len = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
vmcs_write(GUEST_RIP, vcpu->ip + instr_len);
size_t interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
interruptibility & ~(GUEST_INTR_STATE_MOV_SS | GUEST_INTR_STATE_STI));
}
#ifdef NESTED_VMX
static inline bool nested_inject_ve(struct vcpu *vcpu)
{
struct nested_vcpu *nested = &vcpu->nested_vcpu;
uintptr_t vmcs = nested->vmcs;
/*
* First see if nested opt'd in for #VE handling, then
* write the required fields to whatever ve info address points
* to then inject #VE as a normal IDT injection.
*/
u32 secondary_ctl = __nested_vmcs_read32(vmcs, SECONDARY_VM_EXEC_CONTROL);
if (!(secondary_ctl & SECONDARY_EXEC_ENABLE_VE))
return false;
u64 ve_info_addr = __nested_vmcs_read64(vmcs, VE_INFO_ADDRESS);
if (!page_aligned(ve_info_addr))
return false;
u64 hpa;
if (!gpa_to_hpa(vcpu, ve_info_addr, &hpa))
return false;
struct ve_except_info *info = mm_remap(hpa, PAGE_SIZE);
if (!info)
return false;
if (info->except_mask == 0) {
KSM_DEBUG("Trying to inject #VE but guest opted-out.\n");
mm_unmap(info, PAGE_SIZE);
return false;
}
/* Set appropriate data in VE structure */
info->eptp = __nested_vmcs_read16(vmcs, EPTP_INDEX);
info->except_mask = (u32)~0UL;
info->reason = EXIT_REASON_EPT_VIOLATION;
info->gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS);
info->gla = vmcs_read(GUEST_LINEAR_ADDRESS);
info->exit = vmcs_read(EXIT_QUALIFICATION);
mm_unmap(info, PAGE_SIZE);
vcpu_inject_hardirq_noerr(vcpu, X86_TRAP_VE);
return true;
}
#endif
static inline bool vcpu_parse_vmx_addr(struct vcpu *vcpu, u64 disp, u64 inst, u64 *out)
{
/*
* Register access is handled before this call or not
* supported at all.
*
* Register access is only valid in those cases:
* 1) vmwrite
* 2) vmread
*
* Other cases such as vmptrld, vmptrst, vmclear, vmon, etc, must
* be passed through a memory reference, e.g. stack, something
* like:
* pushq phys_add
* vmon 0(%rsp)
*
* or even:
* vmon %cs:some_global_phys_addr
*
* C:
* u64 phys = __pa(vmon);
* __vmxon(&phys);
*
* See also vcpu.c.
*
* So we need to first get the address, then dereference to get the
* actual physical address, note that dereferencing does not happen
* here, here we only validate the address and return the virtual address.
*
* Dereferencing happens in:
* vcpu_read_vmx_addr()
* vcpu_write_vmx_addr()
*/
if ((inst >> 10) & 1) {
vcpu_inject_hardirq_noerr(vcpu, X86_TRAP_UD);
return false;
}
u64 seg_offset = (inst >> 15) & 7;
if (vcpu_inject_gp_if(vcpu, seg_offset > 5))
return false;
uintptr_t base = 0;
if (!((inst >> 27) & 1))
base = ksm_read_reg(vcpu, (inst >> 23) & 15);
uintptr_t index = 0;
if (!((inst >> 22) & 1))
index = ksm_read_reg(vcpu, (inst >> 18) & 15) << (inst & 3);
uintptr_t gva = vmcs_read(GUEST_ES_BASE + (seg_offset << 1)) +
base + index + disp;
if (((inst >> 7) & 7) == 1)
gva &= 0xFFFFFFFF;
if (!is_canonical_addr(gva)) {
vcpu_inject_hardirq(vcpu, seg_offset == 2 ? X86_TRAP_SS : X86_TRAP_GP, 0);
return false;
}
*out = gva;
return true;
}
static bool vcpu_nop(struct vcpu *vcpu)
{
VCPU_TRACER_START();
KSM_DEBUG_RAW("you need to handle the corresponding VM-exit for the handler you set.\n");
KSM_PANIC(KSM_PANIC_CODE, VCPU_BUG_UNHANDLED, vcpu->curr_handler, vcpu->prev_handler);
return false;
}
static bool vcpu_handle_except_nmi(struct vcpu *vcpu)
{
VCPU_TRACER_START();
u32 intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
u16 intr_type = intr_info & INTR_INFO_INTR_TYPE_MASK;
u8 vector = intr_info & INTR_INFO_VECTOR_MASK;
u32 instr_len = 0;
if (intr_type & INTR_TYPE_HARD_EXCEPTION && vector == X86_TRAP_PF)
__writecr2(vmcs_read(EXIT_QUALIFICATION));
else
instr_len = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
bool has_err = intr_info & INTR_INFO_DELIVER_CODE_MASK;
u32 err = vmcs_read32(IDT_VECTORING_ERROR_CODE);
vcpu_inject_irq(vcpu, instr_len, intr_type, vector, has_err, err);
VCPU_TRACER_END();
return true;
}
static bool vcpu_handle_triplefault(struct vcpu *vcpu)
{
/* A triple fault occured during handling of a double fault in guest, bug check. */
VCPU_TRACER_START();
KSM_PANIC(KSM_PANIC_CODE, VCPU_TRIPLEFAULT, vcpu->curr_handler, vcpu->prev_handler);
VCPU_TRACER_END();
return false;
}
static bool vcpu_handle_taskswitch(struct vcpu *vcpu)
{
/* Not really called */
VCPU_TRACER_START();
uintptr_t exit = vmcs_read(EXIT_QUALIFICATION);
u16 selector = (u16)exit;
u8 src = (exit >> 30) & 3;
const char *name;
switch (src) {
case 0:
name = "call";
break;
case 1:
name = "iret";
break;
case 2:
name = "jmp";
break;
case 3:
default:
name = "task gate";
break;
}
const char *table = "gdt";
if (selector & 4)
table = "ldt";
KSM_DEBUG("switching through %s (selector: %d => table: %s index: %d)\n",
name, selector, table, selector >> 3);
VCPU_TRACER_END();
return true;
}
static bool vcpu_handle_cpuid(struct vcpu *vcpu)
{
VCPU_TRACER_START();
int cpuid[4];
int func = ksm_read_reg32(vcpu, STACK_REG_AX);
int subf = ksm_read_reg32(vcpu, STACK_REG_CX);
__cpuidex(cpuid, func, subf);
#ifndef NESTED_VMX
if (func == 1)
cpuid[2] &= ~(1 << (X86_FEATURE_VMX & 31));
#endif
ksm_write_reg32(vcpu, STACK_REG_AX, cpuid[0]);
ksm_write_reg32(vcpu, STACK_REG_BX, cpuid[1]);
ksm_write_reg32(vcpu, STACK_REG_CX, cpuid[2]);
ksm_write_reg32(vcpu, STACK_REG_DX, cpuid[3]);
vcpu_advance_rip(vcpu);
VCPU_TRACER_END();
return true;
}
static bool vcpu_handle_hlt(struct vcpu *vcpu)
{
VCPU_TRACER_START();
__halt();
vcpu_advance_rip(vcpu);
VCPU_TRACER_END();
return true;
}
static bool vcpu_handle_invd(struct vcpu *vcpu)
{
VCPU_TRACER_START();
__invd();
vcpu_advance_rip(vcpu);
VCPU_TRACER_END();
return true;
}
static bool vcpu_handle_invlpg(struct vcpu *vcpu)
{
VCPU_TRACER_START();
uintptr_t addr = vmcs_read(EXIT_QUALIFICATION);
__invlpg((void *)addr);
__invvpid_addr(vpid_nr(), addr);
vcpu_advance_rip(vcpu);
VCPU_TRACER_END();
return true;
}
static bool vcpu_handle_rdtsc(struct vcpu *vcpu)
{
VCPU_TRACER_START();
u64 tsc = __rdtsc();
ksm_write_reg32(vcpu, STACK_REG_AX, (u32)tsc);
ksm_write_reg32(vcpu, STACK_REG_DX, tsc >> 32);
vcpu_advance_rip(vcpu);
VCPU_TRACER_END();
return true;
}
static bool vcpu_handle_vmfunc(struct vcpu *vcpu)
{
/*
* VM functions do not cause VM exit unless:
* 1) funciton is not supported
* 2) EPTP index is too high.
*/
VCPU_TRACER_START();
KSM_DEBUG("vmfunc caused VM-exit! func is %d eptp index is %d\n",
ksm_read_reg32(vcpu, STACK_REG_AX), ksm_read_reg32(vcpu, STACK_REG_CX));
vcpu_inject_hardirq_noerr(vcpu, X86_TRAP_UD);
vcpu_advance_rip(vcpu);
VCPU_TRACER_END()
return true;
}
#ifdef ENABLE_PML
static bool vcpu_dump_pml(struct vcpu *vcpu)
{
/* CPU _decrements_ PML index (i.e. from 511 to 0 then overflows to FFFF),
* make sure we don't have an empty table... */
u16 pml_index = vmcs_read16(GUEST_PML_INDEX);
if (pml_index == PML_MAX_ENTRIES - 1)
return false;
/* PML index always points to next available PML entry. */
if (pml_index >= PML_MAX_ENTRIES)
pml_index = 0;
else
pml_index++;
/* Dump it... */
struct ept *ept = &vcpu->ept;
u16 eptp = vcpu_eptp_idx(vcpu);
for (; pml_index < PML_MAX_ENTRIES; ++pml_index) {
/* CPU guarantees that the lower 12 bits (the offset) are always 0. */
u64 gpa = *((u64 *)vcpu->pml + pml_index);
u64 gva = (u64)__va(gpa);
KSM_DEBUG("On PML %d: GPA %p GVA %p\n", pml_index, gpa, gva);
/* Reset AD bits now otherwise we probably won't get this page again */
u64 *epte = ept_pte(EPT4(ept, eptp), gpa);
*epte &= ~(EPT_ACCESSED | EPT_DIRTY);
}
/* Reset the PML index now... */
vmcs_write16(GUEST_PML_INDEX, pml_index);
/* We're done here */
KSM_DEBUG_RAW("PML dump done\n");
/* We definitely modified AD bits */
__invept_all();
return true;
}
#endif
static bool vcpu_handle_pml_full(struct vcpu *vcpu)
{
#ifdef ENABLE_PML
/* Page Modification Log is now full, dump it. */
KSM_DEBUG_RAW("PML full\n");
return vcpu_dump_pml(vcpu);
#else
KSM_PANIC(KSM_PANIC_CODE, VCPU_BUG_UNHANDLED, 0xDEAFDEAF, 0xBAADF00D);
return false;
#endif
}
static inline void vcpu_vm_succeed(struct vcpu *vcpu)
{
vcpu->eflags &= ~(X86_EFLAGS_CF | X86_EFLAGS_PF | X86_EFLAGS_AF |
X86_EFLAGS_ZF | X86_EFLAGS_SF | X86_EFLAGS_OF);
}
static inline void vcpu_vm_fail_invalid(struct vcpu *vcpu)
{
vcpu->eflags |= X86_EFLAGS_CF;
vcpu->eflags &= ~(X86_EFLAGS_PF | X86_EFLAGS_AF | X86_EFLAGS_ZF | X86_EFLAGS_SF | X86_EFLAGS_OF);
}
#ifdef NESTED_VMX
static inline void vcpu_vm_fail_valid(struct vcpu *vcpu, size_t err)
{
struct nested_vcpu *nested = &vcpu->nested_vcpu;
if (nested_has_vmcs(nested))
__nested_vmcs_write(nested->vmcs, VM_INSTRUCTION_ERROR, err);
vcpu->eflags |= X86_EFLAGS_ZF;
vcpu->eflags &= ~(X86_EFLAGS_CF | X86_EFLAGS_PF | X86_EFLAGS_AF | X86_EFLAGS_SF | X86_EFLAGS_OF);
}
#endif
static inline void vcpu_adjust_rflags(struct vcpu *vcpu, bool success)
{
if (success)
return vcpu_vm_succeed(vcpu);
return vcpu_vm_fail_invalid(vcpu);
}
static inline void vcpu_do_exit(struct vcpu *vcpu)
{
/* Fix GDT */
struct gdtr gdt = {
.limit = (u16)vmcs_read32(GUEST_GDTR_LIMIT),
.base = vmcs_read(GUEST_GDTR_BASE),
};
__lgdt(&gdt);
/* Fix IDT (restore whatever guest last loaded...) */
__lidt(&vcpu->g_idt);
uintptr_t ret = vcpu->ip + vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
vcpu_vm_succeed(vcpu);
uintptr_t cr3 = vmcs_read(GUEST_CR3);
__writecr3(cr3);
/* See __vmx_entrypoint in assembly on how this is used. */
ksm_write_reg(vcpu, STACK_REG_CX, ret);
ksm_write_reg(vcpu, STACK_REG_DX, ksm_read_reg(vcpu, STACK_REG_SP));
ksm_write_reg(vcpu, STACK_REG_AX, vcpu->eflags);
}
#ifdef EPAGE_HOOK
static bool vcpu_handle_hook(struct vcpu *vcpu, struct epage_info *h)
{
KSM_DEBUG("page hook request for %p => %p (%p)\n", h->dpa, h->cpa, h->c_va);
ksm_handle_epage(vcpu, h);
return true;
}
static inline bool vcpu_handle_unhook(struct vcpu *vcpu, uintptr_t dpa)
{
struct ept *ept = &vcpu->ept;
int mt = ept_memory_type(vcpu_to_ksm(vcpu), dpa);
KSM_DEBUG("unhook page %p\n", dpa);
for_each_eptp(ept, i)
ept_alloc_page(EPT4(ept, i), EPT_ACCESS_ALL, mt, dpa, dpa);
__invept_all();
return true;
}
#endif
static inline void vcpu_flush_idt(struct vcpu *vcpu)
{
vmcs_write32(GUEST_IDTR_LIMIT, vcpu->idt.limit);
vmcs_write(GUEST_IDTR_BASE, vcpu->idt.base);
}
static inline bool vcpu_hook_idte(struct vcpu *vcpu, struct shadow_idt_entry *h)
{
u16 cs = vmcs_read16(GUEST_CS_SELECTOR);
vcpu_put_idt(vcpu, cs, h->n, h->h);
vcpu_flush_idt(vcpu);
return true;
}
static inline bool vcpu_unhook_idte(struct vcpu *vcpu, struct shadow_idt_entry *h)
{
struct kidt_entry64 *entry = &vcpu->shadow_idt[h->n];
if (!idte_present(entry))
return false;
put_entry(vcpu->idt.base, h->n, entry);
vcpu_flush_idt(vcpu);
entry->e32.p = 0;
return true;
}
static inline bool vcpu_emulate_vmfunc(struct vcpu *vcpu, struct h_vmfunc *vmfunc)
{
/* Emulate a VMFUNC due it to not being supported natively. */
struct ept *ept = &vcpu->ept;
if (vmfunc->func >= 64 || !(vcpu->vm_func_ctl & (1ULL << vmfunc->func)) ||
(vmfunc->func == 0 && !test_bit(vmfunc->eptp,
(volatile const unsigned long *)&ept->ptr_list[0]))) {
vcpu_inject_hardirq_noerr(vcpu, X86_TRAP_UD);
return false;
}
vcpu_switch_root_eptp(vcpu, (u16)vmfunc->eptp);
return true;
}
#ifdef NESTED_VMX
static inline bool nested_has_pin(const struct nested_vcpu *nested, u32 bits)
{
return (__nested_vmcs_read32(nested->vmcs, PIN_BASED_VM_EXEC_CONTROL) & bits) == bits;
}
static inline bool nested_has_primary(const struct nested_vcpu *nested, u32 bits)
{
return (__nested_vmcs_read32(nested->vmcs, CPU_BASED_VM_EXEC_CONTROL) & bits) == bits;
}
static inline bool nested_has_secondary(const struct nested_vcpu *nested, u32 bits)
{
return (__nested_vmcs_read32(nested->vmcs, SECONDARY_VM_EXEC_CONTROL) & bits) == bits;
}
static inline u32 nested_build_ar_bytes(u32 type, u32 s, u32 dpl, u32 present,
u32 avl, u32 l, u32 db, u32 g)
{
return type | (s << 4) | (dpl << 5) | (present << 7) |
(avl << 12) | (l << 13) | (db << 14) | (g << 15);
}
static inline void nested_save(uintptr_t vmcs, u32 field)
{
BREAK_ON(!__nested_vmcs_write(vmcs, field, vmcs_read(field)));
}
static inline void nested_save16(uintptr_t vmcs, u32 field)
{
BREAK_ON(!__nested_vmcs_write(vmcs, field, vmcs_read16(field)));
}
static inline void nested_save32(uintptr_t vmcs, u32 field)
{
BREAK_ON(!__nested_vmcs_write(vmcs, field, vmcs_read32(field)));
}
static inline void nested_save64(uintptr_t vmcs, u32 field)
{
#if 0
BREAK_ON(!__nested_vmcs_write(vmcs, field, vmcs_read32(field)) ||
!__nested_vmcs_write(vmcs, field + 1, vmcs_read32(field + 1)));
#else
BREAK_ON(!__nested_vmcs_write(vmcs, field, vmcs_read(field)));
#endif
}
static inline void nested_save_guest_state(struct nested_vcpu *nested)
{
uintptr_t vmcs = nested->vmcs;
nested_save(vmcs, GUEST_RSP);
nested_save(vmcs, GUEST_RIP);
nested_save(vmcs, GUEST_RFLAGS);
nested_save(vmcs, GUEST_CR0);
nested_save(vmcs, GUEST_CR3);
nested_save(vmcs, GUEST_CR4);
nested_save64(vmcs, GUEST_PDPTR0);
nested_save64(vmcs, GUEST_PDPTR1);
nested_save64(vmcs, GUEST_PDPTR2);
nested_save64(vmcs, GUEST_PDPTR3);
nested_save16(vmcs, GUEST_ES_SELECTOR);
nested_save16(vmcs, GUEST_FS_SELECTOR);
nested_save16(vmcs, GUEST_CS_SELECTOR);
nested_save16(vmcs, GUEST_SS_SELECTOR);
nested_save16(vmcs, GUEST_GS_SELECTOR);
nested_save16(vmcs, GUEST_DS_SELECTOR);
nested_save16(vmcs, GUEST_LDTR_SELECTOR);
nested_save16(vmcs, GUEST_TR_SELECTOR);
nested_save32(vmcs, GUEST_ES_LIMIT);
nested_save32(vmcs, GUEST_FS_LIMIT);
nested_save32(vmcs, GUEST_CS_LIMIT);
nested_save32(vmcs, GUEST_SS_LIMIT);
nested_save32(vmcs, GUEST_GS_LIMIT);
nested_save32(vmcs, GUEST_DS_LIMIT);
nested_save32(vmcs, GUEST_LDTR_LIMIT);
nested_save32(vmcs, GUEST_TR_LIMIT);
nested_save32(vmcs, GUEST_IDTR_LIMIT);
nested_save32(vmcs, GUEST_GDTR_LIMIT);
nested_save32(vmcs, GUEST_ES_AR_BYTES);
nested_save32(vmcs, GUEST_FS_AR_BYTES);
nested_save32(vmcs, GUEST_CS_AR_BYTES);
nested_save32(vmcs, GUEST_GS_AR_BYTES);
nested_save32(vmcs, GUEST_SS_AR_BYTES);
nested_save32(vmcs, GUEST_LDTR_AR_BYTES);
nested_save32(vmcs, GUEST_TR_AR_BYTES);
nested_save(vmcs, GUEST_ES_BASE);
nested_save(vmcs, GUEST_FS_BASE);
nested_save(vmcs, GUEST_CS_BASE);
nested_save(vmcs, GUEST_SS_BASE);
nested_save(vmcs, GUEST_GS_BASE);
nested_save(vmcs, GUEST_LDTR_BASE);
nested_save(vmcs, GUEST_TR_BASE);
nested_save(vmcs, GUEST_IDTR_BASE);
nested_save(vmcs, GUEST_GDTR_BASE);
nested_save32(vmcs, GUEST_INTERRUPTIBILITY_INFO);
nested_save(vmcs, GUEST_PENDING_DBG_EXCEPTIONS);
nested_save(vmcs, GUEST_SYSENTER_CS);
nested_save(vmcs, GUEST_SYSENTER_EIP);
nested_save(vmcs, GUEST_SYSENTER_ESP);
nested_save64(vmcs, GUEST_BNDCFGS);
u32 exit = __nested_vmcs_read32(vmcs, VM_EXIT_CONTROLS);
if (exit & VM_EXIT_SAVE_DEBUG_CONTROLS) {
nested_save(vmcs, GUEST_DR7);
nested_save64(vmcs, GUEST_IA32_DEBUGCTL);
}
if (exit & VM_EXIT_LOAD_IA32_PAT)
nested_save64(vmcs, GUEST_IA32_PAT);
if (exit & VM_ENTRY_LOAD_IA32_EFER)
nested_save64(vmcs, GUEST_IA32_EFER);
if (nested_has_primary(nested, CPU_BASED_ACTIVATE_SECONDARY_CONTROLS) &&
nested_has_secondary(nested, SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY))
nested_save16(vmcs, GUEST_INTR_STATUS);
}
static inline bool nested_prepare_hypervisor(struct vcpu *vcpu, uintptr_t vmcs)
{
struct ksm *k = vcpu_to_ksm(vcpu);
u8 err = 0;
err |= vmcs_write(GUEST_RIP, __nested_vmcs_read(vmcs, HOST_RIP));
err |= vmcs_write(GUEST_RSP, __nested_vmcs_read(vmcs, HOST_RSP));
err |= vmcs_write(GUEST_RFLAGS, X86_EFLAGS_FIXED);
err |= vmcs_write(CR0_GUEST_HOST_MASK, vcpu->cr0_guest_host_mask);
err |= vmcs_write(CR4_GUEST_HOST_MASK, vcpu->cr4_guest_host_mask);
err |= vmcs_write(CR0_READ_SHADOW, __nested_vmcs_read(vmcs, HOST_CR0) & ~vcpu->cr0_guest_host_mask);
err |= vmcs_write(CR4_READ_SHADOW, __nested_vmcs_read(vmcs, HOST_CR4) & ~vcpu->cr4_guest_host_mask);
err |= vmcs_write(GUEST_CR0, __nested_vmcs_read(vmcs, HOST_CR0));
err |= vmcs_write(GUEST_CR4, __nested_vmcs_read(vmcs, HOST_CR4));
err |= vmcs_write(GUEST_CR3, __nested_vmcs_read(vmcs, HOST_CR3));
err |= vmcs_write(GUEST_SYSENTER_CS, __nested_vmcs_read(vmcs, HOST_IA32_SYSENTER_CS));
err |= vmcs_write(GUEST_SYSENTER_EIP, __nested_vmcs_read(vmcs, HOST_IA32_SYSENTER_EIP));
err |= vmcs_write(GUEST_SYSENTER_ESP, __nested_vmcs_read(vmcs, HOST_IA32_SYSENTER_ESP));
err |= vmcs_write16(GUEST_ES_SELECTOR, __nested_vmcs_read16(vmcs, HOST_ES_SELECTOR));
err |= vmcs_write16(GUEST_CS_SELECTOR, __nested_vmcs_read16(vmcs, HOST_CS_SELECTOR));
err |= vmcs_write16(GUEST_SS_SELECTOR, __nested_vmcs_read16(vmcs, HOST_SS_SELECTOR));
err |= vmcs_write16(GUEST_DS_SELECTOR, __nested_vmcs_read16(vmcs, HOST_DS_SELECTOR));
err |= vmcs_write16(GUEST_FS_SELECTOR, __nested_vmcs_read16(vmcs, HOST_FS_SELECTOR));
err |= vmcs_write16(GUEST_GS_SELECTOR, __nested_vmcs_read16(vmcs, HOST_GS_SELECTOR));
err |= vmcs_write16(GUEST_DS_SELECTOR, __nested_vmcs_read16(vmcs, HOST_DS_SELECTOR));
err |= vmcs_write16(GUEST_TR_SELECTOR, __nested_vmcs_read16(vmcs, HOST_TR_SELECTOR));
err |= vmcs_write(GUEST_IDTR_BASE, __nested_vmcs_read(vmcs, HOST_IDTR_BASE));
err |= vmcs_write(GUEST_GDTR_BASE, __nested_vmcs_read(vmcs, HOST_GDTR_BASE));
err |= vmcs_write(GUEST_CS_BASE, 0);
err |= vmcs_write32(GUEST_CS_LIMIT, 0xFFFFFFFF);
if (__nested_vmcs_read(vmcs, VM_EXIT_CONTROLS) & VM_EXIT_HOST_ADDR_SPACE_SIZE)
err |= vmcs_write32(GUEST_CS_AR_BYTES, nested_build_ar_bytes(11, 1, 0, 1, 0, 1, 0, 1));
else
err |= vmcs_write32(GUEST_CS_AR_BYTES, nested_build_ar_bytes(11, 1, 0, 1, 0, 0, 1, 0));
const u32 ar = nested_build_ar_bytes(3, 1, 0, 1, 0, 0, 1, 1);
err |= vmcs_write32(GUEST_ES_LIMIT, 0xFFFFFFFF);
err |= vmcs_write(GUEST_ES_BASE, 0);
err |= vmcs_write32(GUEST_ES_AR_BYTES, ar);
err |= vmcs_write32(GUEST_DS_LIMIT, 0xFFFFFFFF);
err |= vmcs_write(GUEST_DS_BASE, 0);
err |= vmcs_write32(GUEST_DS_AR_BYTES, ar);
err |= vmcs_write32(GUEST_SS_LIMIT, 0xFFFFFFFF);
err |= vmcs_write(GUEST_SS_BASE, 0);
err |= vmcs_write32(GUEST_SS_AR_BYTES, ar);
err |= vmcs_write32(GUEST_FS_LIMIT, 0xFFFFFFFF);
err |= vmcs_write(GUEST_FS_BASE, __nested_vmcs_read(vmcs, HOST_FS_BASE));
err |= vmcs_write32(GUEST_FS_AR_BYTES, ar);
err |= vmcs_write32(GUEST_GS_LIMIT, 0xFFFFFFFF);
err |= vmcs_write(GUEST_GS_BASE, __nested_vmcs_read(vmcs, HOST_GS_BASE));
err |= vmcs_write32(GUEST_GS_AR_BYTES, ar);
const u32 tar = nested_build_ar_bytes(11, 0, 0, 1, 0, 0, 0, 0);
err |= vmcs_write32(GUEST_TR_AR_BYTES, tar);
err |= vmcs_write(GUEST_TR_BASE, __nested_vmcs_read(vmcs, HOST_TR_BASE));
err |= vmcs_write32(GUEST_TR_LIMIT, 0x67);
err |= vmcs_write(GUEST_DR7, DR7_FIXED_1);
err |= vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
err |= vmcs_write64(VMCS_LINK_POINTER, ~0ULL);
err |= vmcs_write32(VM_ENTRY_CONTROLS, vcpu->entry_ctl);
err |= vmcs_write32(VM_EXIT_CONTROLS, vcpu->exit_ctl);
err |= vmcs_write32(PIN_BASED_VM_EXEC_CONTROL, vcpu->pin_ctl);
err |= vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, vcpu->cpu_ctl);
err |= vmcs_write32(SECONDARY_VM_EXEC_CONTROL, vcpu->secondary_ctl);
err |= vmcs_write64(MSR_BITMAP, __pa(k->msr_bitmap));
err |= vmcs_write64(IO_BITMAP_A, __pa(k->io_bitmap_a));
err |= vmcs_write64(IO_BITMAP_B, __pa(k->io_bitmap_b));
err |= vmcs_write16(VIRTUAL_PROCESSOR_ID, vpid_nr());
vcpu_switch_root_eptp(vcpu, vcpu_eptp_idx(vcpu));
if (err == 0)
__invvpid_all();
return err == 0;
}
static inline bool vcpu_enter_nested_hypervisor(struct vcpu *vcpu, u32 exit_reason)
{
/*
* Here we came from the nested hypervisor's guest, we have received an
* event that we can't help ourselves, so we need to throw it back to the
* nested hypervisor to handle it appropriately.
*
* Do so by setting the appropriate _nested_ VMCS fields and then setting
* "guest's RIP" to that of the nested hypervisor's RIP (Host RIP from their
* VMCS).
*/
struct nested_vcpu *nested = &vcpu->nested_vcpu;
uintptr_t vmcs = nested->vmcs;
/*
* Mark it as left the nested hypervisor' guest, so we can know if the next
* vm-exit came from it and not from it's guest.
*/
nested_leave(nested);
nested_save_guest_state(nested);
if (!nested_prepare_hypervisor(vcpu, vmcs))
return false;
u16 handler = (u16)exit_reason;
if (lapic_in_kernel() && handler == EXIT_REASON_EXTERNAL_INTERRUPT &&
__nested_vmcs_read(vmcs, VM_EXIT_CONTROLS) & VM_EXIT_ACK_INTR_ON_EXIT)
;/* FIXME */
const u32 intr_mask = INTR_INFO_DELIVER_CODE_MASK | INTR_INFO_VALID_MASK;
u32 intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
if ((intr_info & intr_mask) == intr_mask)
nested_save(vmcs, VM_EXIT_INTR_ERROR_CODE);
__nested_vmcs_write(vmcs, VM_EXIT_REASON, (u16)exit_reason);
__nested_vmcs_write(vmcs, VM_EXIT_INTR_INFO, intr_info);
__nested_vmcs_write(vmcs, EXIT_QUALIFICATION, vmcs_read(EXIT_QUALIFICATION));
__nested_vmcs_write(vmcs, VM_EXIT_INSTRUCTION_LEN, vmcs_read32(VM_EXIT_INSTRUCTION_LEN));
if (handler == EXIT_REASON_GDT_IDT_ACCESS || handler == EXIT_REASON_LDT_TR_ACCESS ||
(handler >= EXIT_REASON_VMCLEAR && handler <= EXIT_REASON_VMON))
__nested_vmcs_write(vmcs, VMX_INSTRUCTION_INFO, vmcs_read(VMX_INSTRUCTION_INFO));
__nested_vmcs_write(vmcs, GUEST_LINEAR_ADDRESS, vmcs_read(GUEST_LINEAR_ADDRESS));
__nested_vmcs_write64(vmcs, GUEST_PHYSICAL_ADDRESS, vmcs_read64(GUEST_PHYSICAL_ADDRESS));
return true;
}
#endif
static bool vcpu_handle_vmcall(struct vcpu *vcpu)
{
VCPU_TRACER_START();
/* VMFUNC does not have CPL checks, so emulator shouldn't have too... */
u32 nr = ksm_read_reg32(vcpu, STACK_REG_CX);
if (nr != HCALL_VMFUNC && vcpu_inject_gp_if(vcpu, !vcpu_probe_cpl(0)))
goto out;
uintptr_t arg = ksm_read_reg(vcpu, STACK_REG_DX);
switch (nr) {
case HCALL_STOP:
vcpu_do_exit(vcpu);
VCPU_TRACER_END();
return false;
case HCALL_IDT:
vcpu_adjust_rflags(vcpu, vcpu_hook_idte(vcpu, (struct shadow_idt_entry *)arg));
break;
case HCALL_UIDT:
vcpu_adjust_rflags(vcpu, vcpu_unhook_idte(vcpu, (struct shadow_idt_entry *)arg));
break;
#ifdef EPAGE_HOOK
case HCALL_HOOK:
vcpu_adjust_rflags(vcpu, vcpu_handle_hook(vcpu, (struct epage_info *)arg));
break;
case HCALL_UNHOOK:
vcpu_adjust_rflags(vcpu, vcpu_handle_unhook(vcpu, arg));
break;
#endif
case HCALL_VMFUNC:
vcpu_adjust_rflags(vcpu, vcpu_emulate_vmfunc(vcpu, (struct h_vmfunc *)arg));
break;
#ifdef PMEM_SANDBOX
case HCALL_SA_TASK:
vcpu_adjust_rflags(vcpu, ksm_sandbox_handle_vmcall(vcpu, arg));