{"payload":{"header_redesign_enabled":false,"results":[{"id":"122400962","archived":false,"color":"#b2b7f8","followers":0,"has_funding_file":false,"hl_name":"artvvb/verilog-modules","hl_trunc_description":null,"language":"Verilog","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":122400962,"name":"verilog-modules","owner_id":2454802,"owner_login":"artvvb","updated_at":"2022-10-14T20:13:44.177Z","has_issues":true}},"sponsorable":false,"topics":[],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":74,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Aartvvb%252Fverilog-modules%2B%2Blanguage%253AVerilog","metadata":null,"warn_limited_results":false,"csrf_tokens":{"/artvvb/verilog-modules/star":{"post":"_907lrNtXfRZAcPSfc82ndyQE6iDIfLlIDMpeIfT0y42GyjuvdMUAx4zEHcyf1eVba7BNkLMukGKIJHnB-qaSQ"},"/artvvb/verilog-modules/unstar":{"post":"2il170b5nPxw7UcRR4e5qKU5IBsj-JMYLlaAAz8axLfa59lIZWV87SWhXtF03M019zseB67CrX5hS1RNrHIE_Q"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"xCLTXox8kndnFjPIycifuNsjOsZbifZLBTdLpflTXo-25WvQsWvYueWYNUBfBl6mqgoR0PoS83ArU-RDG3x-gA"}}},"title":"Repository search results"}