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Add support for Emerald Rapids CPUs #121

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xandm opened this issue Sep 16, 2024 · 4 comments
Open

Add support for Emerald Rapids CPUs #121

xandm opened this issue Sep 16, 2024 · 4 comments
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enhancement New feature or request

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@xandm
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xandm commented Sep 16, 2024

Support for Intel Emerald Rapids CPUs would be useful. Here is the lscpu output for one such core; I will attempt to create a PR for adding this if I can determine everything needed.

processor	: 0
vendor_id	: GenuineIntel
cpu family	: 6
model		: 207
model name	: INTEL(R) XEON(R) GOLD 6542Y
stepping	: 2
microcode	: 0x21000240
cpu MHz		: 800.000
cache size	: 61440 KB
physical id	: 0
siblings	: 48
core id		: 0
cpu cores	: 24
apicid		: 0
initial apicid	: 0
fpu		: yes
fpu_exception	: yes
cpuid level	: 32
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cat_l2 cdp_l3 cdp_l2 ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid cqm rdt_a avx512f avx512dq rdseed adx smap avx512ifma clflushopt clwb intel_pt avx512cd sha_ni avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local split_lock_detect user_shstk avx_vnni avx512_bf16 wbnoinvd dtherm ida arat pln pts hfi vnmi avx512vbmi umip pku ospke waitpkg avx512_vbmi2 gfni vaes vpclmulqdq avx512_vnni avx512_bitalg tme avx512_vpopcntdq la57 rdpid bus_lock_detect cldemote movdiri movdir64b enqcmd fsrm md_clear serialize tsxldtrk pconfig arch_lbr ibt amx_bf16 avx512_fp16 amx_tile amx_int8 flush_l1d arch_capabilities
vmx flags	: vnmi preemption_timer posted_intr invvpid ept_x_only ept_ad ept_1gb flexpriority apicv tsc_offset vtpr mtf vapic ept vpid unrestricted_guest vapic_reg vid ple shadow_vmcs pml ept_mode_based_exec tsc_scaling usr_wait_pause notify_vm_exiting ipi_virt
bugs		: spectre_v1 spectre_v2 spec_store_bypass swapgs eibrs_pbrsb bhi
bogomips	: 5800.00
clflush size	: 64
cache_alignment	: 64
address sizes	: 46 bits physical, 57 bits virtual
power management:
@xandm
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xandm commented Sep 16, 2024

Comparing with https://github.com/archspec/archspec-json/blob/master/tests/targets/linux-unknown-sapphirerapids the three flags which are different are: user_shstk, hfi, and ibt.

@alalazo alalazo added the enhancement New feature or request label Sep 21, 2024
@alalazo alalazo self-assigned this Sep 21, 2024
@alalazo
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alalazo commented Sep 21, 2024

Can you please post a snippet (the first core) of:

$ cat /proc/cpuinfo

?

@xandm
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xandm commented Sep 21, 2024

Please see here: #121 (comment)

@alalazo
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alalazo commented Sep 21, 2024

@xandm We use cat /proc/cpuinfo as a format, not lscpu. That's why I was asking 🙂

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