From a96c062abc7fb47d4b80f7514062bb40e1890479 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 25 Oct 2023 13:16:25 -0400 Subject: [PATCH 001/127] SEGFAULT: Added second adder module, results in segfault --- .../example-designs/add_multi/CMakeLists.txt | 33 +++++++ rad-sim/example-designs/add_multi/add.clks | 3 + rad-sim/example-designs/add_multi/add.place | 3 + .../example-designs/add_multi/add_driver.cpp | 63 +++++++++++++ .../example-designs/add_multi/add_driver.hpp | 33 +++++++ .../add_multi/add_multi_system.cpp | 32 +++++++ .../add_multi/add_multi_system.hpp | 26 ++++++ rad-sim/example-designs/add_multi/add_top.cpp | 43 +++++++++ rad-sim/example-designs/add_multi/add_top.hpp | 27 ++++++ rad-sim/example-designs/add_multi/config.yml | 37 ++++++++ .../add_multi/modules/adder.cpp | 67 ++++++++++++++ .../add_multi/modules/adder.hpp | 32 +++++++ .../add_multi/modules/client.cpp | 91 +++++++++++++++++++ .../add_multi/modules/client.hpp | 38 ++++++++ 14 files changed, 528 insertions(+) create mode 100644 rad-sim/example-designs/add_multi/CMakeLists.txt create mode 100644 rad-sim/example-designs/add_multi/add.clks create mode 100644 rad-sim/example-designs/add_multi/add.place create mode 100644 rad-sim/example-designs/add_multi/add_driver.cpp create mode 100644 rad-sim/example-designs/add_multi/add_driver.hpp create mode 100644 rad-sim/example-designs/add_multi/add_multi_system.cpp create mode 100644 rad-sim/example-designs/add_multi/add_multi_system.hpp create mode 100644 rad-sim/example-designs/add_multi/add_top.cpp create mode 100644 rad-sim/example-designs/add_multi/add_top.hpp create mode 100644 rad-sim/example-designs/add_multi/config.yml create mode 100644 rad-sim/example-designs/add_multi/modules/adder.cpp create mode 100644 rad-sim/example-designs/add_multi/modules/adder.hpp create mode 100644 rad-sim/example-designs/add_multi/modules/client.cpp create mode 100644 rad-sim/example-designs/add_multi/modules/client.hpp diff --git a/rad-sim/example-designs/add_multi/CMakeLists.txt b/rad-sim/example-designs/add_multi/CMakeLists.txt new file mode 100644 index 0000000..1e4621f --- /dev/null +++ b/rad-sim/example-designs/add_multi/CMakeLists.txt @@ -0,0 +1,33 @@ +cmake_minimum_required(VERSION 3.16) +find_package(SystemCLanguage CONFIG REQUIRED) + +include_directories( + ./ + modules + ../../sim + ../../sim/noc + ../../sim/noc/booksim + ../../sim/noc/booksim/networks + ../../sim/noc/booksim/routers +) + +set(srcfiles + modules/adder.cpp + modules/client.cpp + add_top.cpp + add_driver.cpp + add_multi_system.cpp +) + +set(hdrfiles + modules/adder.hpp + modules/client.hpp + add_top.hpp + add_driver.hpp + add_multi_system.hpp +) + +add_compile_options(-Wall -Wextra -pedantic) + +add_library(design STATIC ${srcfiles} ${hdrfiles}) +target_link_libraries(design PUBLIC SystemC::systemc booksim noc) diff --git a/rad-sim/example-designs/add_multi/add.clks b/rad-sim/example-designs/add_multi/add.clks new file mode 100644 index 0000000..20cd08c --- /dev/null +++ b/rad-sim/example-designs/add_multi/add.clks @@ -0,0 +1,3 @@ +adder_inst 0 0 +adder_inst2 0 0 +client_inst 0 0 diff --git a/rad-sim/example-designs/add_multi/add.place b/rad-sim/example-designs/add_multi/add.place new file mode 100644 index 0000000..00b186c --- /dev/null +++ b/rad-sim/example-designs/add_multi/add.place @@ -0,0 +1,3 @@ +adder_inst 0 0 axis +adder_inst2 0 0 axis +client_inst 0 3 axis diff --git a/rad-sim/example-designs/add_multi/add_driver.cpp b/rad-sim/example-designs/add_multi/add_driver.cpp new file mode 100644 index 0000000..388f289 --- /dev/null +++ b/rad-sim/example-designs/add_multi/add_driver.cpp @@ -0,0 +1,63 @@ +#include + +#define NUM_ADDENDS 3 + +add_driver::add_driver(const sc_module_name &name) + : sc_module(name) { + + // Random Seed + srand (time(NULL)); + actual_sum = 0; + + // Generate random numbers to be added together by the adder + std::cout << "Generating Random Numbers to be added ..." << std::endl; + for (unsigned int i = 0; i < NUM_ADDENDS; i++) { + unsigned int r_num = std::rand() % 10 + 1; + std::cout << r_num << " "; + numbers_to_send.push(r_num); + actual_sum += r_num; + } + std::cout << std::endl << "----------------------------------------" << std::endl; + + SC_CTHREAD(source, clk.pos()); + SC_CTHREAD(sink, clk.pos()); +} + +add_driver::~add_driver() {} + +void add_driver::source() { + // Reset + rst.write(true); + client_valid.write(false); + wait(); + rst.write(false); + wait(); + + while (!numbers_to_send.empty()) { + client_tdata.write(numbers_to_send.front()); + client_tlast.write(numbers_to_send.size() <= 1); + client_valid.write(true); + + wait(); + + if (client_valid.read() && client_ready.read()) { + numbers_to_send.pop(); + } + } + client_valid.write(false); + std::cout << "Finished sending all numbers to client module!" << std::endl; + wait(); +} + +void add_driver::sink() { + while (!response_valid.read()) { + wait(); + } + std::cout << "Received " << response.read().to_uint64() << " sum from the adder!" << std::endl; + std::cout << "The actual sum is " << actual_sum << std::endl; + + if (response.read() != actual_sum) std::cout << "FAILURE - Output is not matching!" << std::endl; + else std::cout << "SUCCESS - Output is matching!" << std::endl; + + sc_stop(); +} \ No newline at end of file diff --git a/rad-sim/example-designs/add_multi/add_driver.hpp b/rad-sim/example-designs/add_multi/add_driver.hpp new file mode 100644 index 0000000..baae941 --- /dev/null +++ b/rad-sim/example-designs/add_multi/add_driver.hpp @@ -0,0 +1,33 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include + +class add_driver : public sc_module { +private: + std::queue numbers_to_send; + int actual_sum; + +public: + sc_in clk; + sc_out rst; + sc_out> client_tdata; + sc_out client_tlast; + sc_out client_valid; + sc_in client_ready; + sc_in> response; + sc_in response_valid; + + add_driver(const sc_module_name &name); + ~add_driver(); + + void source(); + void sink(); + + SC_HAS_PROCESS(add_driver); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/add_multi/add_multi_system.cpp b/rad-sim/example-designs/add_multi/add_multi_system.cpp new file mode 100644 index 0000000..124126c --- /dev/null +++ b/rad-sim/example-designs/add_multi/add_multi_system.cpp @@ -0,0 +1,32 @@ +#include + +add_multi_system::add_multi_system(const sc_module_name &name, sc_clock *driver_clk_sig) + : sc_module(name) { + + // Instantiate driver + driver_inst = new add_driver("driver"); + driver_inst->clk(*driver_clk_sig); + driver_inst->rst(rst_sig); + driver_inst->client_tdata(client_tdata_sig); + driver_inst->client_tlast(client_tlast_sig); + driver_inst->client_valid(client_valid_sig); + driver_inst->client_ready(client_ready_sig); + driver_inst->response(response_sig); + driver_inst->response_valid(response_valid_sig); + + // Instantiate design top-level + dut_inst = new add_top("dut"); + dut_inst->rst(rst_sig); + dut_inst->client_tdata(client_tdata_sig); + dut_inst->client_tlast(client_tlast_sig); + dut_inst->client_valid(client_valid_sig); + dut_inst->client_ready(client_ready_sig); + dut_inst->response(response_sig); + dut_inst->response_valid(response_valid_sig); +} + +add_multi_system::~add_multi_system() { + delete driver_inst; + delete dut_inst; + delete sysclk; +} diff --git a/rad-sim/example-designs/add_multi/add_multi_system.hpp b/rad-sim/example-designs/add_multi/add_multi_system.hpp new file mode 100644 index 0000000..2f27bd7 --- /dev/null +++ b/rad-sim/example-designs/add_multi/add_multi_system.hpp @@ -0,0 +1,26 @@ +#pragma once + +#include +#include +#include +#include + +class add_multi_system : public sc_module { +private: + sc_signal> client_tdata_sig; + sc_signal client_tlast_sig; + sc_signal client_valid_sig; + sc_signal client_ready_sig; + sc_signal> response_sig; + sc_signal response_valid_sig; + +public: + sc_signal rst_sig; + sc_clock *sysclk; + add_driver *driver_inst; + add_top *dut_inst; + + add_multi_system(const sc_module_name &name, + sc_clock *driver_clk_sig); + ~add_multi_system(); +}; diff --git a/rad-sim/example-designs/add_multi/add_top.cpp b/rad-sim/example-designs/add_multi/add_top.cpp new file mode 100644 index 0000000..c262a01 --- /dev/null +++ b/rad-sim/example-designs/add_multi/add_top.cpp @@ -0,0 +1,43 @@ +#include + +add_top::add_top(const sc_module_name &name) + : sc_module(name) { + + std::string module_name_str; + char module_name[25]; + + module_name_str = "client_inst"; + std::strcpy(module_name, module_name_str.c_str()); + + client_inst = new client(module_name, 16); + client_inst->rst(rst); + client_inst->client_tdata(client_tdata); + client_inst->client_tlast(client_tlast); + client_inst->client_valid(client_valid); + client_inst->client_ready(client_ready); + + module_name_str = "adder_inst"; + std::strcpy(module_name, module_name_str.c_str()); + adder_inst = new adder(module_name); + adder_inst->rst(rst); + adder_inst->response(response); + adder_inst->response_valid(response_valid); + + module_name_str = "adder_inst2"; + std::strcpy(module_name, module_name_str.c_str()); + adder_inst2 = new adder(module_name); + adder_inst2->rst(rst); + adder_inst2->response(response); + adder_inst2->response_valid(response_valid); + + radsim_design.BuildDesignContext("add.place", + "add.clks"); + radsim_design.CreateSystemNoCs(rst); + radsim_design.ConnectModulesToNoC(); +} + +add_top::~add_top() { + delete adder_inst; + delete adder_inst2; + delete client_inst; +} diff --git a/rad-sim/example-designs/add_multi/add_top.hpp b/rad-sim/example-designs/add_multi/add_top.hpp new file mode 100644 index 0000000..3c168d7 --- /dev/null +++ b/rad-sim/example-designs/add_multi/add_top.hpp @@ -0,0 +1,27 @@ +#pragma once + +#include +#include +#include +#include +#include + +class add_top : public sc_module { +private: + adder *adder_inst; + adder *adder_inst2; + client *client_inst; + +public: + sc_in rst; + // Client's interface + sc_in> client_tdata; + sc_in client_tlast; + sc_in client_valid; + sc_out client_ready; + sc_out> response; + sc_out response_valid; + + add_top(const sc_module_name &name); + ~add_top(); +}; diff --git a/rad-sim/example-designs/add_multi/config.yml b/rad-sim/example-designs/add_multi/config.yml new file mode 100644 index 0000000..24749d8 --- /dev/null +++ b/rad-sim/example-designs/add_multi/config.yml @@ -0,0 +1,37 @@ +noc: + type: ['2d'] + num_nocs: 1 + clk_period: [1.0] + payload_width: [166] + topology: ['mesh'] + dim_x: [4] + dim_y: [4] + routing_func: ['dim_order'] + vcs: [5] + vc_buffer_size: [8] + output_buffer_size: [8] + num_packet_types: [5] + router_uarch: ['iq'] + vc_allocator: ['islip'] + sw_allocator: ['islip'] + credit_delay: [1] + routing_delay: [1] + vc_alloc_delay: [1] + sw_alloc_delay: [1] + +noc_adapters: + clk_period: [1.25] + fifo_size: [16] + obuff_size: [2] + in_arbiter: ['fixed_rr'] + out_arbiter: ['priority_rr'] + vc_mapping: ['direct'] + +design: + name: 'add' + noc_placement: ['add.place'] + clk_periods: [5.0] + +telemetry: + log_verbosity: 2 + traces: [] \ No newline at end of file diff --git a/rad-sim/example-designs/add_multi/modules/adder.cpp b/rad-sim/example-designs/add_multi/modules/adder.cpp new file mode 100644 index 0000000..0a8ecf6 --- /dev/null +++ b/rad-sim/example-designs/add_multi/modules/adder.cpp @@ -0,0 +1,67 @@ +#include + +adder::adder(const sc_module_name &name) + : RADSimModule(name) { + + // Combinational logic and its sensitivity list + SC_METHOD(Assign); + sensitive << rst; + // Sequential logic and its clock/reset setup + SC_CTHREAD(Tick, clk.pos()); + reset_signal_is(rst, true); // Reset is active high + + // This function must be defined & called for any RAD-Sim module to register + // its info for automatically connecting to the NoC + this->RegisterModuleInfo(); +} + +adder::~adder() {} + +void adder::Assign() { + if (rst) { + adder_rolling_sum = 0; + axis_adder_interface.tready.write(false); + } else { + // Always ready to accept the transaction + axis_adder_interface.tready.write(true); + } +} + +void adder::Tick() { + response_valid.write(0); + response.write(0); + wait(); + + // Always @ positive edge of the clock + while (true) { + // Receiving transaction from AXI-S interface + if (axis_adder_interface.tvalid.read() && + axis_adder_interface.tready.read()) { + uint64_t current_sum = adder_rolling_sum.to_uint64(); + adder_rolling_sum = current_sum + axis_adder_interface.tdata.read().to_uint64(); + t_finished.write(axis_adder_interface.tlast.read()); + std::cout << module_name << ": Got Transaction (user = " + << axis_adder_interface.tuser.read().to_uint64() << ") (addend = " + << axis_adder_interface.tdata.read().to_uint64() << ")!" + << std::endl; + } + + // Print Sum and Exit + if (t_finished.read()) { + response_valid.write(1); + response.write(adder_rolling_sum); + } + wait(); + } +} + +void adder::RegisterModuleInfo() { + std::string port_name; + _num_noc_axis_slave_ports = 0; + _num_noc_axis_master_ports = 0; + _num_noc_aximm_slave_ports = 0; + _num_noc_aximm_master_ports = 0; + + port_name = module_name + ".axis_adder_interface"; + RegisterAxisSlavePort(port_name, &axis_adder_interface, DATAW, 0); +} \ No newline at end of file diff --git a/rad-sim/example-designs/add_multi/modules/adder.hpp b/rad-sim/example-designs/add_multi/modules/adder.hpp new file mode 100644 index 0000000..364ad05 --- /dev/null +++ b/rad-sim/example-designs/add_multi/modules/adder.hpp @@ -0,0 +1,32 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +class adder : public RADSimModule { +private: + sc_bv adder_rolling_sum; // Sum to store result + sc_signal t_finished; // Signal flagging that the transaction has terminated + +public: + sc_in rst; + sc_out response_valid; + sc_out> response; + // Interface to the NoC + axis_slave_port axis_adder_interface; + + adder(const sc_module_name &name); + ~adder(); + + void Assign(); // Combinational logic process + void Tick(); // Sequential logic process + SC_HAS_PROCESS(adder); + void RegisterModuleInfo(); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/add_multi/modules/client.cpp b/rad-sim/example-designs/add_multi/modules/client.cpp new file mode 100644 index 0000000..24c13e2 --- /dev/null +++ b/rad-sim/example-designs/add_multi/modules/client.cpp @@ -0,0 +1,91 @@ +#include + +client::client(const sc_module_name &name, unsigned int fifo_depth) + : RADSimModule(name) { + + client_fifo_depth = fifo_depth; + + // Combinational logic and its sensitivity list + SC_METHOD(Assign); + sensitive << rst << client_fifo_full; + // Sequential logic and its clock/reset setup + SC_CTHREAD(Tick, clk.pos()); + reset_signal_is(rst, true); // Reset is active high + + // This function must be defined & called for any RAD-Sim module to register + // its info for automatically connecting to the NoC + this->RegisterModuleInfo(); +} + +client::~client() {} + +void client::Assign() { + if (rst) { + client_ready.write(true); // ready to accept requests from driver testbench + } else { + // Ready to accept new addend from driver testbench as long as the addend + // FIFO is not full + client_ready.write(!client_fifo_full.read()); + } +} + +void client::Tick() { + // Reset logic + axis_client_interface.tvalid.write(false); + while (!client_tdata_fifo.empty()) { + client_tdata_fifo.pop(); + } + client_fifo_full.write(false); + wait(); + + std::string src_port_name = module_name + ".axis_client_interface"; + + // Always @ positive edge of the clock + while (true) { + // Interface with testbench driver + if (client_ready.read() && client_valid.read()) { + client_tdata_fifo.push(client_tdata); + testbench_tlast = client_tlast.read(); + std::cout << module_name << ": Pushed request to FIFO" << std::endl; + } + client_fifo_full.write(client_tdata_fifo.size() >= client_fifo_depth); + + // Sending transactions to AXI-S NoC + if (!client_tdata_fifo.empty()) { + sc_bv tdata = client_tdata_fifo.front(); + std::string dst_port_name = "adder_inst.axis_adder_interface"; + uint64_t dst_addr = radsim_design.GetPortDestinationID(dst_port_name); + uint64_t src_addr = radsim_design.GetPortDestinationID(src_port_name); + + axis_client_interface.tdest.write(dst_addr); + axis_client_interface.tid.write(0); + axis_client_interface.tstrb.write(0); + axis_client_interface.tkeep.write(0); + axis_client_interface.tuser.write(src_addr); + axis_client_interface.tlast.write(testbench_tlast && (client_tdata_fifo.size() == 1)); + axis_client_interface.tdata.write(tdata); + + axis_client_interface.tvalid.write(true); + } else { + axis_client_interface.tvalid.write(false); + } + + if (axis_client_interface.tvalid.read() && + axis_client_interface.tready.read()) { + client_tdata_fifo.pop(); + std::cout << module_name << ": Sent Transaction!" << std::endl; + } + wait(); + } +} + +void client::RegisterModuleInfo() { + std::string port_name; + _num_noc_axis_slave_ports = 0; + _num_noc_axis_master_ports = 0; + _num_noc_aximm_slave_ports = 0; + _num_noc_aximm_master_ports = 0; + + port_name = module_name + ".axis_client_interface"; + RegisterAxisMasterPort(port_name, &axis_client_interface, DATAW, 0); +} diff --git a/rad-sim/example-designs/add_multi/modules/client.hpp b/rad-sim/example-designs/add_multi/modules/client.hpp new file mode 100644 index 0000000..c08e0cb --- /dev/null +++ b/rad-sim/example-designs/add_multi/modules/client.hpp @@ -0,0 +1,38 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include +#include + +#define DATAW 128 + +class client : public RADSimModule { +private: + std::queue> client_tdata_fifo; // FIFO to store numbers + unsigned int client_fifo_depth; // MAXIMUM number of addends to store in FIFO + sc_signal client_fifo_full; // Signal flagging addend FIFO is full + bool testbench_tlast; + +public: + sc_in rst; + // Interface to driver logic + sc_in> client_tdata; + sc_in client_tlast; + sc_in client_valid; + sc_out client_ready; + // Interface to the NoC + axis_master_port axis_client_interface; + + client(const sc_module_name &name, unsigned int fifo_depth); + ~client(); + + void Assign(); // Combinational logic process + void Tick(); // Sequential logic process + SC_HAS_PROCESS(client); + void RegisterModuleInfo(); +}; \ No newline at end of file From 3f4d09454825c0fd9a9ffc529cf92686bdc6c872 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sat, 18 Nov 2023 20:02:29 -0500 Subject: [PATCH 002/127] Adding signals and adder select signals for second adder module --- .../example-designs/add_multi/CMakeCache.txt | 379 ++++++++++ .../CMakeFiles/3.16.3/CMakeCCompiler.cmake | 76 ++ .../CMakeFiles/3.16.3/CMakeCXXCompiler.cmake | 88 +++ .../3.16.3/CMakeDetermineCompilerABI_C.bin | Bin 0 -> 16552 bytes .../3.16.3/CMakeDetermineCompilerABI_CXX.bin | Bin 0 -> 16560 bytes .../CMakeFiles/3.16.3/CMakeSystem.cmake | 15 + .../3.16.3/CompilerIdC/CMakeCCompilerId.c | 671 ++++++++++++++++++ .../CMakeFiles/3.16.3/CompilerIdC/a.out | Bin 0 -> 16712 bytes .../CompilerIdCXX/CMakeCXXCompilerId.cpp | 660 +++++++++++++++++ .../CMakeFiles/3.16.3/CompilerIdCXX/a.out | Bin 0 -> 16720 bytes .../add_multi/CMakeFiles/CMakeError.log | 40 ++ .../add_multi/CMakeFiles/CMakeOutput.log | 477 +++++++++++++ .../add_multi/CMakeFiles/cmake.check_cache | 1 + .../example-designs/add_multi/CMakeLists.txt | 2 +- rad-sim/example-designs/add_multi/add.place | 2 +- .../example-designs/add_multi/add_driver.cpp | 24 + .../example-designs/add_multi/add_driver.hpp | 6 + .../add_multi/add_multi_system.cpp | 5 + .../add_multi/add_multi_system.hpp | 3 + rad-sim/example-designs/add_multi/add_top.cpp | 4 +- rad-sim/example-designs/add_multi/add_top.hpp | 3 + .../add_multi/modules/client.cpp | 22 +- .../add_multi/modules/client.hpp | 9 + 23 files changed, 2482 insertions(+), 5 deletions(-) create mode 100644 rad-sim/example-designs/add_multi/CMakeCache.txt create mode 100644 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeCCompiler.cmake create mode 100644 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake create mode 100755 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin create mode 100755 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin create mode 100644 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeSystem.cmake create mode 100644 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c create mode 100755 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdC/a.out create mode 100644 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdCXX/CMakeCXXCompilerId.cpp create mode 100755 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdCXX/a.out create mode 100644 rad-sim/example-designs/add_multi/CMakeFiles/CMakeError.log create mode 100644 rad-sim/example-designs/add_multi/CMakeFiles/CMakeOutput.log create mode 100644 rad-sim/example-designs/add_multi/CMakeFiles/cmake.check_cache diff --git a/rad-sim/example-designs/add_multi/CMakeCache.txt b/rad-sim/example-designs/add_multi/CMakeCache.txt new file mode 100644 index 0000000..acd6ebb --- /dev/null +++ b/rad-sim/example-designs/add_multi/CMakeCache.txt @@ -0,0 +1,379 @@ +# This is the CMakeCache file. +# For build in directory: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add +# It was generated by CMake: /usr/bin/cmake +# You can edit this file to change values found and used by cmake. +# If you do not want to change any of the values, simply exit the editor. +# If you do want to change a value, simply edit, save, and exit the editor. +# The syntax for the file is as follows: +# KEY:TYPE=VALUE +# KEY is the name of a variable in the cache. +# TYPE is a hint to GUIs for the type of VALUE, DO NOT EDIT TYPE!. +# VALUE is the current value for the KEY. + +######################## +# EXTERNAL cache entries +######################## + +//Path to a program. +CMAKE_ADDR2LINE:FILEPATH=/usr/bin/addr2line + +//Path to a program. +CMAKE_AR:FILEPATH=/usr/bin/ar + +//Choose the type of build, options are: None Debug Release RelWithDebInfo +// MinSizeRel ... +CMAKE_BUILD_TYPE:STRING= + +//Enable/Disable color output during build. +CMAKE_COLOR_MAKEFILE:BOOL=ON + +//CXX compiler +CMAKE_CXX_COMPILER:FILEPATH=/usr/bin/c++ + +//A wrapper around 'ar' adding the appropriate '--plugin' option +// for the GCC compiler +CMAKE_CXX_COMPILER_AR:FILEPATH=/usr/bin/gcc-ar-9 + +//A wrapper around 'ranlib' adding the appropriate '--plugin' option +// for the GCC compiler +CMAKE_CXX_COMPILER_RANLIB:FILEPATH=/usr/bin/gcc-ranlib-9 + +//Flags used by the CXX compiler during all build types. +CMAKE_CXX_FLAGS:STRING= + +//Flags used by the CXX compiler during DEBUG builds. +CMAKE_CXX_FLAGS_DEBUG:STRING=-g + +//Flags used by the CXX compiler during MINSIZEREL builds. +CMAKE_CXX_FLAGS_MINSIZEREL:STRING=-Os -DNDEBUG + +//Flags used by the CXX compiler during RELEASE builds. +CMAKE_CXX_FLAGS_RELEASE:STRING=-O3 -DNDEBUG + +//Flags used by the CXX compiler during RELWITHDEBINFO builds. +CMAKE_CXX_FLAGS_RELWITHDEBINFO:STRING=-O2 -g -DNDEBUG + +//C compiler +CMAKE_C_COMPILER:FILEPATH=/usr/bin/cc + +//A wrapper around 'ar' adding the appropriate '--plugin' option +// for the GCC compiler +CMAKE_C_COMPILER_AR:FILEPATH=/usr/bin/gcc-ar-9 + +//A wrapper around 'ranlib' adding the appropriate '--plugin' option +// for the GCC compiler +CMAKE_C_COMPILER_RANLIB:FILEPATH=/usr/bin/gcc-ranlib-9 + +//Flags used by the C compiler during all build types. +CMAKE_C_FLAGS:STRING= + +//Flags used by the C compiler during DEBUG builds. +CMAKE_C_FLAGS_DEBUG:STRING=-g + +//Flags used by the C compiler during MINSIZEREL builds. +CMAKE_C_FLAGS_MINSIZEREL:STRING=-Os -DNDEBUG + +//Flags used by the C compiler during RELEASE builds. +CMAKE_C_FLAGS_RELEASE:STRING=-O3 -DNDEBUG + +//Flags used by the C compiler during RELWITHDEBINFO builds. +CMAKE_C_FLAGS_RELWITHDEBINFO:STRING=-O2 -g -DNDEBUG + +//Path to a program. +CMAKE_DLLTOOL:FILEPATH=CMAKE_DLLTOOL-NOTFOUND + +//Flags used by the linker during all build types. +CMAKE_EXE_LINKER_FLAGS:STRING= + +//Flags used by the linker during DEBUG builds. +CMAKE_EXE_LINKER_FLAGS_DEBUG:STRING= + +//Flags used by the linker during MINSIZEREL builds. +CMAKE_EXE_LINKER_FLAGS_MINSIZEREL:STRING= + +//Flags used by the linker during RELEASE builds. +CMAKE_EXE_LINKER_FLAGS_RELEASE:STRING= + +//Flags used by the linker during RELWITHDEBINFO builds. +CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO:STRING= + +//Enable/Disable output of compile commands during generation. +CMAKE_EXPORT_COMPILE_COMMANDS:BOOL=OFF + +//Install path prefix, prepended onto install directories. +CMAKE_INSTALL_PREFIX:PATH=/usr/local + +//Path to a program. +CMAKE_LINKER:FILEPATH=/usr/bin/ld + +//Path to a program. +CMAKE_MAKE_PROGRAM:FILEPATH=/usr/bin/make + +//Flags used by the linker during the creation of modules during +// all build types. +CMAKE_MODULE_LINKER_FLAGS:STRING= + +//Flags used by the linker during the creation of modules during +// DEBUG builds. +CMAKE_MODULE_LINKER_FLAGS_DEBUG:STRING= + +//Flags used by the linker during the creation of modules during +// MINSIZEREL builds. +CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL:STRING= + +//Flags used by the linker during the creation of modules during +// RELEASE builds. +CMAKE_MODULE_LINKER_FLAGS_RELEASE:STRING= + +//Flags used by the linker during the creation of modules during +// RELWITHDEBINFO builds. +CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO:STRING= + +//Path to a program. +CMAKE_NM:FILEPATH=/usr/bin/nm + +//Path to a program. +CMAKE_OBJCOPY:FILEPATH=/usr/bin/objcopy + +//Path to a program. +CMAKE_OBJDUMP:FILEPATH=/usr/bin/objdump + +//Value Computed by CMake +CMAKE_PROJECT_DESCRIPTION:STATIC= + +//Value Computed by CMake +CMAKE_PROJECT_HOMEPAGE_URL:STATIC= + +//Value Computed by CMake +CMAKE_PROJECT_NAME:STATIC=Project + +//Path to a program. +CMAKE_RANLIB:FILEPATH=/usr/bin/ranlib + +//Path to a program. +CMAKE_READELF:FILEPATH=/usr/bin/readelf + +//Flags used by the linker during the creation of shared libraries +// during all build types. +CMAKE_SHARED_LINKER_FLAGS:STRING= + +//Flags used by the linker during the creation of shared libraries +// during DEBUG builds. +CMAKE_SHARED_LINKER_FLAGS_DEBUG:STRING= + +//Flags used by the linker during the creation of shared libraries +// during MINSIZEREL builds. +CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL:STRING= + +//Flags used by the linker during the creation of shared libraries +// during RELEASE builds. +CMAKE_SHARED_LINKER_FLAGS_RELEASE:STRING= + +//Flags used by the linker during the creation of shared libraries +// during RELWITHDEBINFO builds. +CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO:STRING= + +//If set, runtime paths are not added when installing shared libraries, +// but are added when building. +CMAKE_SKIP_INSTALL_RPATH:BOOL=NO + +//If set, runtime paths are not added when using shared libraries. +CMAKE_SKIP_RPATH:BOOL=NO + +//Flags used by the linker during the creation of static libraries +// during all build types. +CMAKE_STATIC_LINKER_FLAGS:STRING= + +//Flags used by the linker during the creation of static libraries +// during DEBUG builds. +CMAKE_STATIC_LINKER_FLAGS_DEBUG:STRING= + +//Flags used by the linker during the creation of static libraries +// during MINSIZEREL builds. +CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL:STRING= + +//Flags used by the linker during the creation of static libraries +// during RELEASE builds. +CMAKE_STATIC_LINKER_FLAGS_RELEASE:STRING= + +//Flags used by the linker during the creation of static libraries +// during RELWITHDEBINFO builds. +CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO:STRING= + +//Path to a program. +CMAKE_STRIP:FILEPATH=/usr/bin/strip + +//If this value is on, makefiles will be generated without the +// .SILENT directive, and all commands will be echoed to the console +// during the make. This is useful for debugging only. With Visual +// Studio IDE projects all commands are done without /nologo. +CMAKE_VERBOSE_MAKEFILE:BOOL=FALSE + +//Value Computed by CMake +Project_BINARY_DIR:STATIC=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add + +//Value Computed by CMake +Project_SOURCE_DIR:STATIC=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs + +//The directory containing a CMake configuration file for SystemCLanguage. +SystemCLanguage_DIR:PATH=/home/bassiabn/rad-sim/systemc-2.3.4/build + + +######################## +# INTERNAL cache entries +######################## + +//ADVANCED property for variable: CMAKE_ADDR2LINE +CMAKE_ADDR2LINE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_AR +CMAKE_AR-ADVANCED:INTERNAL=1 +//This is the directory where this CMakeCache.txt was created +CMAKE_CACHEFILE_DIR:INTERNAL=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add +//Major version of cmake used to create the current loaded cache +CMAKE_CACHE_MAJOR_VERSION:INTERNAL=3 +//Minor version of cmake used to create the current loaded cache +CMAKE_CACHE_MINOR_VERSION:INTERNAL=16 +//Patch version of cmake used to create the current loaded cache +CMAKE_CACHE_PATCH_VERSION:INTERNAL=3 +//ADVANCED property for variable: CMAKE_COLOR_MAKEFILE +CMAKE_COLOR_MAKEFILE-ADVANCED:INTERNAL=1 +//Path to CMake executable. +CMAKE_COMMAND:INTERNAL=/usr/bin/cmake +//Path to cpack program executable. +CMAKE_CPACK_COMMAND:INTERNAL=/usr/bin/cpack +//Path to ctest program executable. +CMAKE_CTEST_COMMAND:INTERNAL=/usr/bin/ctest +//ADVANCED property for variable: CMAKE_CXX_COMPILER +CMAKE_CXX_COMPILER-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_COMPILER_AR +CMAKE_CXX_COMPILER_AR-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_COMPILER_RANLIB +CMAKE_CXX_COMPILER_RANLIB-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_FLAGS +CMAKE_CXX_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_FLAGS_DEBUG +CMAKE_CXX_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_FLAGS_MINSIZEREL +CMAKE_CXX_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_FLAGS_RELEASE +CMAKE_CXX_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_FLAGS_RELWITHDEBINFO +CMAKE_CXX_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_COMPILER +CMAKE_C_COMPILER-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_COMPILER_AR +CMAKE_C_COMPILER_AR-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_COMPILER_RANLIB +CMAKE_C_COMPILER_RANLIB-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_FLAGS +CMAKE_C_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_FLAGS_DEBUG +CMAKE_C_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_FLAGS_MINSIZEREL +CMAKE_C_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_FLAGS_RELEASE +CMAKE_C_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_FLAGS_RELWITHDEBINFO +CMAKE_C_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_DLLTOOL +CMAKE_DLLTOOL-ADVANCED:INTERNAL=1 +//Path to cache edit program executable. +CMAKE_EDIT_COMMAND:INTERNAL=/usr/bin/ccmake +//Executable file format +CMAKE_EXECUTABLE_FORMAT:INTERNAL=ELF +//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS +CMAKE_EXE_LINKER_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_DEBUG +CMAKE_EXE_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_MINSIZEREL +CMAKE_EXE_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_RELEASE +CMAKE_EXE_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO +CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_EXPORT_COMPILE_COMMANDS +CMAKE_EXPORT_COMPILE_COMMANDS-ADVANCED:INTERNAL=1 +//Name of external makefile project generator. +CMAKE_EXTRA_GENERATOR:INTERNAL= +//Name of generator. +CMAKE_GENERATOR:INTERNAL=Unix Makefiles +//Generator instance identifier. +CMAKE_GENERATOR_INSTANCE:INTERNAL= +//Name of generator platform. +CMAKE_GENERATOR_PLATFORM:INTERNAL= +//Name of generator toolset. +CMAKE_GENERATOR_TOOLSET:INTERNAL= +//Test CMAKE_HAVE_LIBC_PTHREAD +CMAKE_HAVE_LIBC_PTHREAD:INTERNAL= +//Have include pthread.h +CMAKE_HAVE_PTHREAD_H:INTERNAL=1 +//Source directory with the top level CMakeLists.txt file for this +// project +CMAKE_HOME_DIRECTORY:INTERNAL=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs +//Install .so files without execute permission. +CMAKE_INSTALL_SO_NO_EXE:INTERNAL=1 +//ADVANCED property for variable: CMAKE_LINKER +CMAKE_LINKER-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MAKE_PROGRAM +CMAKE_MAKE_PROGRAM-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS +CMAKE_MODULE_LINKER_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_DEBUG +CMAKE_MODULE_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL +CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_RELEASE +CMAKE_MODULE_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO +CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_NM +CMAKE_NM-ADVANCED:INTERNAL=1 +//number of local generators +CMAKE_NUMBER_OF_MAKEFILES:INTERNAL=1 +//ADVANCED property for variable: CMAKE_OBJCOPY +CMAKE_OBJCOPY-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_OBJDUMP +CMAKE_OBJDUMP-ADVANCED:INTERNAL=1 +//Platform information initialized +CMAKE_PLATFORM_INFO_INITIALIZED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_RANLIB +CMAKE_RANLIB-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_READELF +CMAKE_READELF-ADVANCED:INTERNAL=1 +//Path to CMake installation. +CMAKE_ROOT:INTERNAL=/usr/share/cmake-3.16 +//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS +CMAKE_SHARED_LINKER_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_DEBUG +CMAKE_SHARED_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL +CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_RELEASE +CMAKE_SHARED_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO +CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SKIP_INSTALL_RPATH +CMAKE_SKIP_INSTALL_RPATH-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SKIP_RPATH +CMAKE_SKIP_RPATH-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS +CMAKE_STATIC_LINKER_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_DEBUG +CMAKE_STATIC_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL +CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_RELEASE +CMAKE_STATIC_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO +CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STRIP +CMAKE_STRIP-ADVANCED:INTERNAL=1 +//uname command +CMAKE_UNAME:INTERNAL=/usr/bin/uname +//ADVANCED property for variable: CMAKE_VERBOSE_MAKEFILE +CMAKE_VERBOSE_MAKEFILE-ADVANCED:INTERNAL=1 +//Details about finding Threads +FIND_PACKAGE_MESSAGE_DETAILS_Threads:INTERNAL=[TRUE][v()] +//Result of TRY_COMPILE +THREADS_HAVE_PTHREAD_ARG:INTERNAL=TRUE + diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeCCompiler.cmake b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeCCompiler.cmake new file mode 100644 index 0000000..c5ece7b --- /dev/null +++ b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeCCompiler.cmake @@ -0,0 +1,76 @@ +set(CMAKE_C_COMPILER "/usr/bin/cc") +set(CMAKE_C_COMPILER_ARG1 "") +set(CMAKE_C_COMPILER_ID "GNU") +set(CMAKE_C_COMPILER_VERSION "9.4.0") +set(CMAKE_C_COMPILER_VERSION_INTERNAL "") +set(CMAKE_C_COMPILER_WRAPPER "") +set(CMAKE_C_STANDARD_COMPUTED_DEFAULT "11") +set(CMAKE_C_COMPILE_FEATURES "c_std_90;c_function_prototypes;c_std_99;c_restrict;c_variadic_macros;c_std_11;c_static_assert") +set(CMAKE_C90_COMPILE_FEATURES "c_std_90;c_function_prototypes") +set(CMAKE_C99_COMPILE_FEATURES "c_std_99;c_restrict;c_variadic_macros") +set(CMAKE_C11_COMPILE_FEATURES "c_std_11;c_static_assert") + +set(CMAKE_C_PLATFORM_ID "Linux") +set(CMAKE_C_SIMULATE_ID "") +set(CMAKE_C_COMPILER_FRONTEND_VARIANT "") +set(CMAKE_C_SIMULATE_VERSION "") + + + +set(CMAKE_AR "/usr/bin/ar") +set(CMAKE_C_COMPILER_AR "/usr/bin/gcc-ar-9") +set(CMAKE_RANLIB "/usr/bin/ranlib") +set(CMAKE_C_COMPILER_RANLIB "/usr/bin/gcc-ranlib-9") +set(CMAKE_LINKER "/usr/bin/ld") +set(CMAKE_MT "") +set(CMAKE_COMPILER_IS_GNUCC 1) +set(CMAKE_C_COMPILER_LOADED 1) +set(CMAKE_C_COMPILER_WORKS TRUE) +set(CMAKE_C_ABI_COMPILED TRUE) +set(CMAKE_COMPILER_IS_MINGW ) +set(CMAKE_COMPILER_IS_CYGWIN ) +if(CMAKE_COMPILER_IS_CYGWIN) + set(CYGWIN 1) + set(UNIX 1) +endif() + +set(CMAKE_C_COMPILER_ENV_VAR "CC") + +if(CMAKE_COMPILER_IS_MINGW) + set(MINGW 1) +endif() +set(CMAKE_C_COMPILER_ID_RUN 1) +set(CMAKE_C_SOURCE_FILE_EXTENSIONS c;m) +set(CMAKE_C_IGNORE_EXTENSIONS h;H;o;O;obj;OBJ;def;DEF;rc;RC) +set(CMAKE_C_LINKER_PREFERENCE 10) + +# Save compiler ABI information. +set(CMAKE_C_SIZEOF_DATA_PTR "8") +set(CMAKE_C_COMPILER_ABI "ELF") +set(CMAKE_C_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") + +if(CMAKE_C_SIZEOF_DATA_PTR) + set(CMAKE_SIZEOF_VOID_P "${CMAKE_C_SIZEOF_DATA_PTR}") +endif() + +if(CMAKE_C_COMPILER_ABI) + set(CMAKE_INTERNAL_PLATFORM_ABI "${CMAKE_C_COMPILER_ABI}") +endif() + +if(CMAKE_C_LIBRARY_ARCHITECTURE) + set(CMAKE_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") +endif() + +set(CMAKE_C_CL_SHOWINCLUDES_PREFIX "") +if(CMAKE_C_CL_SHOWINCLUDES_PREFIX) + set(CMAKE_CL_SHOWINCLUDES_PREFIX "${CMAKE_C_CL_SHOWINCLUDES_PREFIX}") +endif() + + + + + +set(CMAKE_C_IMPLICIT_INCLUDE_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include") +set(CMAKE_C_IMPLICIT_LINK_LIBRARIES "gcc;gcc_s;c;gcc;gcc_s") +set(CMAKE_C_IMPLICIT_LINK_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib") +set(CMAKE_C_IMPLICIT_LINK_FRAMEWORK_DIRECTORIES "") diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake new file mode 100644 index 0000000..278ef39 --- /dev/null +++ b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake @@ -0,0 +1,88 @@ +set(CMAKE_CXX_COMPILER "/usr/bin/c++") +set(CMAKE_CXX_COMPILER_ARG1 "") +set(CMAKE_CXX_COMPILER_ID "GNU") +set(CMAKE_CXX_COMPILER_VERSION "9.4.0") +set(CMAKE_CXX_COMPILER_VERSION_INTERNAL "") +set(CMAKE_CXX_COMPILER_WRAPPER "") +set(CMAKE_CXX_STANDARD_COMPUTED_DEFAULT "14") +set(CMAKE_CXX_COMPILE_FEATURES "cxx_std_98;cxx_template_template_parameters;cxx_std_11;cxx_alias_templates;cxx_alignas;cxx_alignof;cxx_attributes;cxx_auto_type;cxx_constexpr;cxx_decltype;cxx_decltype_incomplete_return_types;cxx_default_function_template_args;cxx_defaulted_functions;cxx_defaulted_move_initializers;cxx_delegating_constructors;cxx_deleted_functions;cxx_enum_forward_declarations;cxx_explicit_conversions;cxx_extended_friend_declarations;cxx_extern_templates;cxx_final;cxx_func_identifier;cxx_generalized_initializers;cxx_inheriting_constructors;cxx_inline_namespaces;cxx_lambdas;cxx_local_type_template_args;cxx_long_long_type;cxx_noexcept;cxx_nonstatic_member_init;cxx_nullptr;cxx_override;cxx_range_for;cxx_raw_string_literals;cxx_reference_qualified_functions;cxx_right_angle_brackets;cxx_rvalue_references;cxx_sizeof_member;cxx_static_assert;cxx_strong_enums;cxx_thread_local;cxx_trailing_return_types;cxx_unicode_literals;cxx_uniform_initialization;cxx_unrestricted_unions;cxx_user_literals;cxx_variadic_macros;cxx_variadic_templates;cxx_std_14;cxx_aggregate_default_initializers;cxx_attribute_deprecated;cxx_binary_literals;cxx_contextual_conversions;cxx_decltype_auto;cxx_digit_separators;cxx_generic_lambdas;cxx_lambda_init_captures;cxx_relaxed_constexpr;cxx_return_type_deduction;cxx_variable_templates;cxx_std_17;cxx_std_20") +set(CMAKE_CXX98_COMPILE_FEATURES "cxx_std_98;cxx_template_template_parameters") +set(CMAKE_CXX11_COMPILE_FEATURES "cxx_std_11;cxx_alias_templates;cxx_alignas;cxx_alignof;cxx_attributes;cxx_auto_type;cxx_constexpr;cxx_decltype;cxx_decltype_incomplete_return_types;cxx_default_function_template_args;cxx_defaulted_functions;cxx_defaulted_move_initializers;cxx_delegating_constructors;cxx_deleted_functions;cxx_enum_forward_declarations;cxx_explicit_conversions;cxx_extended_friend_declarations;cxx_extern_templates;cxx_final;cxx_func_identifier;cxx_generalized_initializers;cxx_inheriting_constructors;cxx_inline_namespaces;cxx_lambdas;cxx_local_type_template_args;cxx_long_long_type;cxx_noexcept;cxx_nonstatic_member_init;cxx_nullptr;cxx_override;cxx_range_for;cxx_raw_string_literals;cxx_reference_qualified_functions;cxx_right_angle_brackets;cxx_rvalue_references;cxx_sizeof_member;cxx_static_assert;cxx_strong_enums;cxx_thread_local;cxx_trailing_return_types;cxx_unicode_literals;cxx_uniform_initialization;cxx_unrestricted_unions;cxx_user_literals;cxx_variadic_macros;cxx_variadic_templates") +set(CMAKE_CXX14_COMPILE_FEATURES "cxx_std_14;cxx_aggregate_default_initializers;cxx_attribute_deprecated;cxx_binary_literals;cxx_contextual_conversions;cxx_decltype_auto;cxx_digit_separators;cxx_generic_lambdas;cxx_lambda_init_captures;cxx_relaxed_constexpr;cxx_return_type_deduction;cxx_variable_templates") +set(CMAKE_CXX17_COMPILE_FEATURES "cxx_std_17") +set(CMAKE_CXX20_COMPILE_FEATURES "cxx_std_20") + +set(CMAKE_CXX_PLATFORM_ID "Linux") +set(CMAKE_CXX_SIMULATE_ID "") +set(CMAKE_CXX_COMPILER_FRONTEND_VARIANT "") +set(CMAKE_CXX_SIMULATE_VERSION "") + + + +set(CMAKE_AR "/usr/bin/ar") +set(CMAKE_CXX_COMPILER_AR "/usr/bin/gcc-ar-9") +set(CMAKE_RANLIB "/usr/bin/ranlib") +set(CMAKE_CXX_COMPILER_RANLIB "/usr/bin/gcc-ranlib-9") +set(CMAKE_LINKER "/usr/bin/ld") +set(CMAKE_MT "") +set(CMAKE_COMPILER_IS_GNUCXX 1) +set(CMAKE_CXX_COMPILER_LOADED 1) +set(CMAKE_CXX_COMPILER_WORKS TRUE) +set(CMAKE_CXX_ABI_COMPILED TRUE) +set(CMAKE_COMPILER_IS_MINGW ) +set(CMAKE_COMPILER_IS_CYGWIN ) +if(CMAKE_COMPILER_IS_CYGWIN) + set(CYGWIN 1) + set(UNIX 1) +endif() + +set(CMAKE_CXX_COMPILER_ENV_VAR "CXX") + +if(CMAKE_COMPILER_IS_MINGW) + set(MINGW 1) +endif() +set(CMAKE_CXX_COMPILER_ID_RUN 1) +set(CMAKE_CXX_SOURCE_FILE_EXTENSIONS C;M;c++;cc;cpp;cxx;m;mm;CPP) +set(CMAKE_CXX_IGNORE_EXTENSIONS inl;h;hpp;HPP;H;o;O;obj;OBJ;def;DEF;rc;RC) + +foreach (lang C OBJC OBJCXX) + if (CMAKE_${lang}_COMPILER_ID_RUN) + foreach(extension IN LISTS CMAKE_${lang}_SOURCE_FILE_EXTENSIONS) + list(REMOVE_ITEM CMAKE_CXX_SOURCE_FILE_EXTENSIONS ${extension}) + endforeach() + endif() +endforeach() + +set(CMAKE_CXX_LINKER_PREFERENCE 30) +set(CMAKE_CXX_LINKER_PREFERENCE_PROPAGATES 1) + +# Save compiler ABI information. +set(CMAKE_CXX_SIZEOF_DATA_PTR "8") +set(CMAKE_CXX_COMPILER_ABI "ELF") +set(CMAKE_CXX_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") + +if(CMAKE_CXX_SIZEOF_DATA_PTR) + set(CMAKE_SIZEOF_VOID_P "${CMAKE_CXX_SIZEOF_DATA_PTR}") +endif() + +if(CMAKE_CXX_COMPILER_ABI) + set(CMAKE_INTERNAL_PLATFORM_ABI "${CMAKE_CXX_COMPILER_ABI}") +endif() + +if(CMAKE_CXX_LIBRARY_ARCHITECTURE) + set(CMAKE_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") +endif() + +set(CMAKE_CXX_CL_SHOWINCLUDES_PREFIX "") +if(CMAKE_CXX_CL_SHOWINCLUDES_PREFIX) + set(CMAKE_CL_SHOWINCLUDES_PREFIX "${CMAKE_CXX_CL_SHOWINCLUDES_PREFIX}") +endif() + + + + + +set(CMAKE_CXX_IMPLICIT_INCLUDE_DIRECTORIES "/usr/include/c++/9;/usr/include/x86_64-linux-gnu/c++/9;/usr/include/c++/9/backward;/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include") +set(CMAKE_CXX_IMPLICIT_LINK_LIBRARIES "stdc++;m;gcc_s;gcc;c;gcc_s;gcc") +set(CMAKE_CXX_IMPLICIT_LINK_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib") +set(CMAKE_CXX_IMPLICIT_LINK_FRAMEWORK_DIRECTORIES "") diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin new file mode 100755 index 0000000000000000000000000000000000000000..ebea4b340830aee444aab660f7a351e9a05007f2 GIT binary patch literal 16552 zcmeHOeQXrR6`%9jaDchH5R+VihE1BN(A0}@!8H_@JD<;9w+2$M3l$&Rv+rylxew=V zkJyM1B&Vn+;ub}%phb-kRjWwJAI%^AR6h>6O(dkWAhnb>sp>#c-H0S6DV5s**Y{@T zop;w~MG95^=?>a^^M3O_X5Y*%Gv0YmM!MRoTrNh%%|6SJ3;G2TlnsL$WCci&HM7O= z`%$)n%>%xgW1>AM2(*fFsme+{5_bbdy#Q7!&=mp(528>Hk)qyQ<;Z-|LX^q-K)o7l zlDwVXkPe7ad)c3Y%1{*kTc(3jkEmG>V>4AR#{Cd0_bqE7PI-f=4&SRX#O|7!8w#(wv?y8YKqmBVloPg8<;^nn;o z?c@Fv@Qc|Nd^1~z?2I3&*#7sfcx3K z%pbHW4N08Y@aH)mU;!Jx2=E8svX?9X3fQ;Xc^dG$aO4!BLG$YruuGVi4c#U1xFGC+ z#Dj7|t&#W-fcjZrR{uXPC+k&M!;AbgyC;c`LkM<$IOh zXNrvPv<;t-IO*r{R+$l~3 zoCr7(a3bJDz=?npfe$+Z@A~fhk2ZSEqaCaH6Rd5uuM~}{(s^z4*Pe0SmD2h%0KZdu z=(|9CD;dfI_Y2OoG0v}jv$JqvpH{f6js9)wk?yXsnxn9U(#971IB7WxmP$*rpz_b- z+E~lCprVb{JcDGzw6PRiZ^b&eUQn9wtvrH`$0Y^%1eagmi)8g}tuUpXeQUFJcG|7E zUeYeyHtN8@L(+h!G|}%{3H>5{?C+5lY-ag~d$iG(Dy(XSt46JMtYscBldDUm(qs&N zUaGkTyKdKB(6#9Q<8f$2Lp`8Zc;cE?$WOc+xryC87P+RK)W(+n#tYH;QMKRq%c3iC zlhBuK=*_+3XeP9?Ypf*)JA%*`I|~;>J)MOcq3%%OW{);j9|L$t*Xmn1CX@Q@Qb{{| z%WbS&`>KpbSK*zm!dq>HzlTb7f7M3EUD}4f$+2sjaNBH%>8iGULUCjw3coCy4%M8IYF+Q?Yv*7j{1 zP2Y!hH#G0XP;fljo7fHK1rTs8cYg-I5#slf$+t_TA)wPhPXhH!l}h+s>pD>UPS$+A zR5}mzIiLagaRtAPVsRbZ&RoNO*Yeu=p5xGl_zJk516#OLXKnNOmzxKnx(==(z&YUc zw|fJh^DTPZbA)YPw(%36dXRqxMEyN*?IJm-V?mn+TpOTI{F_|F>pxl*UOewGI0hX4 zWWc@w*O#H4fBS3q`oCV)=?#3%9q}q-)e-Nir)%204M*o`-saKy9o}Ht+Z^&XguJU- zy-KS$(CYQKdOh$ZkFnR_`YPC=Z+yTy#fg9u0Ve`Z1e^#s5pW{lM8JuF69FdzA9@7n zd>oyJliRWKnYUW%5#MAnIOi?Oq&!#m5y{iJyXBInGi`W26bqfd!+jSPYQJ&2ltKQq zJTympq?58zKI2=BQj9GWgk6>t&wFAC2r_eCQu1^buPD#k;h9-1MQND&QRJvNJBwAa zcb~*b?!A)eFT{yM@I_YiU)qB&!euEuxAt&jgW9l8ZCowz_jl-qSrw>o<8Jty1D#JdTXDnbXF7jw z#jDw&igs$s^T;X>!I$&LiqB^>&#btI(Rf+$1?;pOM=QRtJfEyM%ue~-Sn*n>RKypv zhKjhioPS}p<74z3T5&L&nlw6^GNx73QCt z-NWelv&zptkB#l_3g@T=PH&qTEBKsMv+Jc9MAY!TRfXrbZSjN?7#u%s!|#_ky$6LA z#y$-dn6>3|-Sk|yb9{CjQqm5+SIN!@m!BO^{QFp?{=dNG{cM#26)4zmEOXuO4|&@X z7Q-8{l}h$EfuSnM60pyoajtv!tnvLl;4U~nPwxeC@jAz6kNX?a4*kDC^0#iZVUyXp{x%~;-x%yVX73zeEp5XZGdAJYoO6Tx1fLF>>H~@I1 zJcw^fc@{J|h3Xl=6)VKK7Xh!7k5B}>Qa-}(KnwE@?0FEUqDZD1- z?Rg5X1FlG2GkFhi{s&ewi1og#ku&me;;4_!q#Wo*O7Fv@gB&InWb}b#rZ<|@V@4*M z)1&!e)|W{QCF4dsrZzV;t*tD?lNt1AHX9v*6aynW!uqq(R9uhcQ>hV9F>yL3B3MMj zTcVG~!(nifNXE0F)=uaj&wYTuVS{e__RyAy9@*NaLwbW%8*>?Axr{y-O~)W%LT~%h z*3g#DuvLs_UjPJYJ9{8d*UHsg_7XQpylh(-|YK4y5zy zP&P9Z&l)2ps5hU0)T=~HLNI>yMs$F2@xf?rkg2heG`J8H(pY%Qfp|8T$fPZd4sF?Z zGKvaJo1}Tw3!R7 ze+g@Xidlb`T#pgO?=$9NUw(B$qgkKUb3_%hGSuz*I|2I_tfi^{w0|JFN9xmZ&EEeg zwBz1^^ve#Uqmvk1DA-4=l0NMVFkcOCne=HLN%S(bnTs@6h8}|&?iEO%)|*5hkdoAY zk|TN;+HvneJgrNKDpKFxe+jcOsNk)VKJACfR0@)R`~9DQcDyHQhyPSWk(Bm<5-o?9 z`0qf)tglEtqGXQbi6?r-rcdi;q9iw${_{5dpj06GJ==iU?Y(Hzr*#xj+9#8L`~3Z} z)Tj6}MM_GF&zHH_{r?IYv5TZn>w2P_%*s%=`+vozKdcA^qEmt`|I+vq@JFcNnp8ga z<$VI>)!OBWCwc{ReI|YS`@nQPfKW(Ia5FsNZ$kslJ@Q}Pcc?<6D8~=yKNixXIDQ{6 z6d`@upA_XnDF|)mLi$9fq0y|*f>OFcQ1TR)5cP-Ne~@%p?z=@_PTYHK#>p?q;_{sCoiL<3 Mn*~>EQ?Rk@zX|n&%K!iX literal 0 HcmV?d00001 diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin new file mode 100755 index 0000000000000000000000000000000000000000..ee268c0505df7bc55aab1046342c263205c720a2 GIT binary patch literal 16560 zcmeHOeQX>@6`%9j$)$1bE^PuP3C&VcVbgkJo5Wl~P3~-;y@tz26Puc*>Gte9+eh!K zcYD+>A&ulV$`K5uLTac)DJh^xMWXxxm5?ZoOcMzys1c$KlnT>O;i4pULW2xVa=bS) z@4UM{t13lEh#hP1&HK&!n0+(5p52}Ia5&Oc<#I79ZuV)0T+lC&plrx)krg087GNvj z_rq)*TLOGF$3%Nj5NH+UY?YOIB<==^dUaT-K-UQvJcvR)M2dQg6>X_#Arz1OG-Lx?oYfL86h0(^*Kx<>`CN-Z?TexfN7y7_C z)xD#Sftg9fWElBatdcyoCsv<&{$!x*C+~DU)A07TUq!xgbn14pfj&_N3+mI9ARc|7 z44(htJHK0_#2=|gY#AIrINHO%J^zJe9WVdv+~fPt#DATt-TK7xAAa`S61w09uQUQN<5xgI8Kl>o_2dzrF#F-6$ zlH+x(&W0}s{1!OuB?^E7_U(4Q1o%oEDMe_|eEJHoH!?5Ft`vA&5QY@-pqxM(CH@_t zepa`j{~wd`4bo1xl)qi#(-Oz=;sxf_AWoxJrt5>FQGFW!hZA`tp6lJ-k<6syz0rXrXvbqwBMK@=gb`qdQ<=21sDt`W zsK*j%y^xQ`%+|rU0T$8-4&?Ksj_xWt>yGracjzr@i@I5yl$fzDhJRK3SJd%W6v5Bm zehX_7Fnz1oi?W^Wk91#BWZdTDeUtEMIWC@{P$ZoAv)crY*9!SYWZHy_-U_)H6HeDI zw#=Gvnlp&cnQ-!rxKo@6I1z9n;6%WQfD-{H0{<%!_?z$Me`@3BJ=&3)-@#f}dvwyM zD!rtQ|I#zXPocE=7{HfHw>|^Jx1OOqa6jid$r>0+W4PmclAalY7W8D zOPg5X_&;tUA$@9SNcF9M1pCLw2S*b9@^LPYEN^yxoCr7(a3bJDz=?np0Ve`Z1e^#s5pW{l zMBx7<0{FegTzYnN?cAD&?@^f{J(e|cdz%9Lu$|-4fy7?eFMxn+t@~5>%@Dt{%)C`9 zWr5BCJqpw_TPorAzDq!#0~)wgD!l~sIM6!zQ3k(_VsSmRo4H2)uC=vGJ&!>f;_Kiz z4z}<~opmndUwk$|brT#}z&YUccX{hR<6Hiq=OEj*X6wg4vEddJNBw)?=qEV@p`c9z zjxEq9{*5l|^&hJ0Sh3^)I0hVE8L)4{aUZnvZ-HH2|JSQ}ymeo5hrP-~b=X_~)tXLk z)1f7rH!!}m+Z#-K10ioy$Xnm;RocCE?OuPo*Mnag*&pCI40g)j{D60g69FdzP6V6? zI1z9n;6%WQfD-{H0!{?}+Yz9Bb+nI8K8}_5%GFYb_(K+hecqzX$o+U9l05C#TPu0m z3y1qfvCzIfeD1Wt5V-LP)HjEWsAB=ZE9>TaIX14OOx8PNo{Em_`5rF z!>p>SaN=%w=Ro_@%~ss7`$<|U&d&h zt@sV)`DDdmcFOCPtMAY4|^O^S7n_Jzm!+Er# z{7sCmYpeXK^7U-R;p(d}|J>{Yi6E&{GdT{H2(YhwO_)eK^NFlXeA z0_->%Wb>&Bx{=ZcF*zZR83`GEIGGuUCiR$+$>sHEVU!JKQrTqOh{x1GQ)_c&A)fT0 zM{~L88001xxiL1Bi>BgwtdL5Lfr^RKF@wP(+Oa))f4rl=zXKd4lJQ)qy+<9)W|@9> zq`5Vb9?IyZm)wX3I0$dJ!E)E`(Dtw%-qEQ;)`ZnIrbxu{8GR(0j$ztG=jV5Xw)b>c z#dr<}K#)Z_xByEu4?#RyeP(e+#vP?~9jJP_SE~wdDCL7Ng zVzkbpd_L`*_3l#NDom~ruuXnusLv9UC`5Y)(tmM_M0`9vmdVRUHA#gkD~U@A|0 zQL{;d;g33;fr=3ygrP|Cuy$24nKCSDBDmHn${$0@icUV(X|LHk`=q{-*m*3@eJeiF`1)m{E zpVo;)4`OhkU>~tc=TFZE3Bd4_NuSn}MCmyNM0kfh$1OH4@#8#qB_!V z!(rA}q#jW+M>@n4J!aFV^)peDTTK61n|@F#5dFSw!0h&ZY}2Q86H$6zCja*N`@Gbr z_%lUHN{ZK)x!C>x0vfT4q)+R6qIZ~;p>Fqo+NM9M2nC|Ef-V2j_!IC7RB#PSk7M+_ zK>4+HdE$wl16`ja(J0EkKP zGEVxpl@U=PeKV!GV-^jPL3v^0b=(XG^@r|%_`ZbtZqb($cZ1D1`6bzvi|EG!LZa5D IU}M?802n@gkpKVy literal 0 HcmV?d00001 diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeSystem.cmake b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeSystem.cmake new file mode 100644 index 0000000..15b4419 --- /dev/null +++ b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeSystem.cmake @@ -0,0 +1,15 @@ +set(CMAKE_HOST_SYSTEM "Linux-5.15.0-69-generic") +set(CMAKE_HOST_SYSTEM_NAME "Linux") +set(CMAKE_HOST_SYSTEM_VERSION "5.15.0-69-generic") +set(CMAKE_HOST_SYSTEM_PROCESSOR "x86_64") + + + +set(CMAKE_SYSTEM "Linux-5.15.0-69-generic") +set(CMAKE_SYSTEM_NAME "Linux") +set(CMAKE_SYSTEM_VERSION "5.15.0-69-generic") +set(CMAKE_SYSTEM_PROCESSOR "x86_64") + +set(CMAKE_CROSSCOMPILING "FALSE") + +set(CMAKE_SYSTEM_LOADED 1) diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c new file mode 100644 index 0000000..d884b50 --- /dev/null +++ b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c @@ -0,0 +1,671 @@ +#ifdef __cplusplus +# error "A C++ compiler has been selected for C." +#endif + +#if defined(__18CXX) +# define ID_VOID_MAIN +#endif +#if defined(__CLASSIC_C__) +/* cv-qualifiers did not exist in K&R C */ +# define const +# define volatile +#endif + + +/* Version number components: V=Version, R=Revision, P=Patch + Version date components: YYYY=Year, MM=Month, DD=Day */ + +#if defined(__INTEL_COMPILER) || defined(__ICC) +# define COMPILER_ID "Intel" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# if defined(__GNUC__) +# define SIMULATE_ID "GNU" +# endif + /* __INTEL_COMPILER = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER/100) +# define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER/10 % 10) +# if defined(__INTEL_COMPILER_UPDATE) +# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER_UPDATE) +# else +# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER % 10) +# endif +# if defined(__INTEL_COMPILER_BUILD_DATE) + /* __INTEL_COMPILER_BUILD_DATE = YYYYMMDD */ +# define COMPILER_VERSION_TWEAK DEC(__INTEL_COMPILER_BUILD_DATE) +# endif +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif +# if defined(__GNUC__) +# define SIMULATE_VERSION_MAJOR DEC(__GNUC__) +# elif defined(__GNUG__) +# define SIMULATE_VERSION_MAJOR DEC(__GNUG__) +# endif +# if defined(__GNUC_MINOR__) +# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__) +# endif +# if defined(__GNUC_PATCHLEVEL__) +# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif + +#elif defined(__PATHCC__) +# define COMPILER_ID "PathScale" +# define COMPILER_VERSION_MAJOR DEC(__PATHCC__) +# define COMPILER_VERSION_MINOR DEC(__PATHCC_MINOR__) +# if defined(__PATHCC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PATHCC_PATCHLEVEL__) +# endif + +#elif defined(__BORLANDC__) && defined(__CODEGEARC_VERSION__) +# define COMPILER_ID "Embarcadero" +# define COMPILER_VERSION_MAJOR HEX(__CODEGEARC_VERSION__>>24 & 0x00FF) +# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF) +# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF) + +#elif defined(__BORLANDC__) +# define COMPILER_ID "Borland" + /* __BORLANDC__ = 0xVRR */ +# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8) +# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF) + +#elif defined(__WATCOMC__) && __WATCOMC__ < 1200 +# define COMPILER_ID "Watcom" + /* __WATCOMC__ = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__WATCOMC__) +# define COMPILER_ID "OpenWatcom" + /* __WATCOMC__ = VVRP + 1100 */ +# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__SUNPRO_C) +# define COMPILER_ID "SunPro" +# if __SUNPRO_C >= 0x5100 + /* __SUNPRO_C = 0xVRRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>12) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF) +# else + /* __SUNPRO_CC = 0xVRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>8) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF) +# endif + +#elif defined(__HP_cc) +# define COMPILER_ID "HP" + /* __HP_cc = VVRRPP */ +# define COMPILER_VERSION_MAJOR DEC(__HP_cc/10000) +# define COMPILER_VERSION_MINOR DEC(__HP_cc/100 % 100) +# define COMPILER_VERSION_PATCH DEC(__HP_cc % 100) + +#elif defined(__DECC) +# define COMPILER_ID "Compaq" + /* __DECC_VER = VVRRTPPPP */ +# define COMPILER_VERSION_MAJOR DEC(__DECC_VER/10000000) +# define COMPILER_VERSION_MINOR DEC(__DECC_VER/100000 % 100) +# define COMPILER_VERSION_PATCH DEC(__DECC_VER % 10000) + +#elif defined(__IBMC__) && defined(__COMPILER_VER__) +# define COMPILER_ID "zOS" + /* __IBMC__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) + +#elif defined(__ibmxl__) && defined(__clang__) +# define COMPILER_ID "XLClang" +# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__) +# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__) +# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__) +# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__) + + +#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ >= 800 +# define COMPILER_ID "XL" + /* __IBMC__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) + +#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ < 800 +# define COMPILER_ID "VisualAge" + /* __IBMC__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) + +#elif defined(__PGI) +# define COMPILER_ID "PGI" +# define COMPILER_VERSION_MAJOR DEC(__PGIC__) +# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__) +# if defined(__PGIC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__) +# endif + +#elif defined(_CRAYC) +# define COMPILER_ID "Cray" +# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR) +# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR) + +#elif defined(__TI_COMPILER_VERSION__) +# define COMPILER_ID "TI" + /* __TI_COMPILER_VERSION__ = VVVRRRPPP */ +# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000) +# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000) +# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000) + +#elif defined(__FUJITSU) || defined(__FCC_VERSION) || defined(__fcc_version) +# define COMPILER_ID "Fujitsu" + +#elif defined(__ghs__) +# define COMPILER_ID "GHS" +/* __GHS_VERSION_NUMBER = VVVVRP */ +# ifdef __GHS_VERSION_NUMBER +# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100) +# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10) +# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10) +# endif + +#elif defined(__TINYC__) +# define COMPILER_ID "TinyCC" + +#elif defined(__BCC__) +# define COMPILER_ID "Bruce" + +#elif defined(__SCO_VERSION__) +# define COMPILER_ID "SCO" + +#elif defined(__ARMCC_VERSION) && !defined(__clang__) +# define COMPILER_ID "ARMCC" +#if __ARMCC_VERSION >= 1000000 + /* __ARMCC_VERSION = VRRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#else + /* __ARMCC_VERSION = VRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#endif + + +#elif defined(__clang__) && defined(__apple_build_version__) +# define COMPILER_ID "AppleClang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif +# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__) + +#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION) +# define COMPILER_ID "ARMClang" + # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION % 10000) +# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION) + +#elif defined(__clang__) +# define COMPILER_ID "Clang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif + +#elif defined(__GNUC__) +# define COMPILER_ID "GNU" +# define COMPILER_VERSION_MAJOR DEC(__GNUC__) +# if defined(__GNUC_MINOR__) +# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__) +# endif +# if defined(__GNUC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif + +#elif defined(_MSC_VER) +# define COMPILER_ID "MSVC" + /* _MSC_VER = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100) +# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100) +# if defined(_MSC_FULL_VER) +# if _MSC_VER >= 1400 + /* _MSC_FULL_VER = VVRRPPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000) +# else + /* _MSC_FULL_VER = VVRRPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000) +# endif +# endif +# if defined(_MSC_BUILD) +# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD) +# endif + +#elif defined(__VISUALDSPVERSION__) || defined(__ADSPBLACKFIN__) || defined(__ADSPTS__) || defined(__ADSP21000__) +# define COMPILER_ID "ADSP" +#if defined(__VISUALDSPVERSION__) + /* __VISUALDSPVERSION__ = 0xVVRRPP00 */ +# define COMPILER_VERSION_MAJOR HEX(__VISUALDSPVERSION__>>24) +# define COMPILER_VERSION_MINOR HEX(__VISUALDSPVERSION__>>16 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__VISUALDSPVERSION__>>8 & 0xFF) +#endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# define COMPILER_ID "IAR" +# if defined(__VER__) && defined(__ICCARM__) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000) +# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000) +# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__)) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100) +# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100)) +# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# endif + +#elif defined(__SDCC_VERSION_MAJOR) || defined(SDCC) +# define COMPILER_ID "SDCC" +# if defined(__SDCC_VERSION_MAJOR) +# define COMPILER_VERSION_MAJOR DEC(__SDCC_VERSION_MAJOR) +# define COMPILER_VERSION_MINOR DEC(__SDCC_VERSION_MINOR) +# define COMPILER_VERSION_PATCH DEC(__SDCC_VERSION_PATCH) +# else + /* SDCC = VRP */ +# define COMPILER_VERSION_MAJOR DEC(SDCC/100) +# define COMPILER_VERSION_MINOR DEC(SDCC/10 % 10) +# define COMPILER_VERSION_PATCH DEC(SDCC % 10) +# endif + + +/* These compilers are either not known or too old to define an + identification macro. Try to identify the platform and guess that + it is the native compiler. */ +#elif defined(__hpux) || defined(__hpua) +# define COMPILER_ID "HP" + +#else /* unknown compiler */ +# define COMPILER_ID "" +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; +#ifdef SIMULATE_ID +char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; +#endif + +#ifdef __QNXNTO__ +char const* qnxnto = "INFO" ":" "qnxnto[]"; +#endif + +#if defined(__CRAYXE) || defined(__CRAYXC) +char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; +#endif + +#define STRINGIFY_HELPER(X) #X +#define STRINGIFY(X) STRINGIFY_HELPER(X) + +/* Identify known platforms by name. */ +#if defined(__linux) || defined(__linux__) || defined(linux) +# define PLATFORM_ID "Linux" + +#elif defined(__CYGWIN__) +# define PLATFORM_ID "Cygwin" + +#elif defined(__MINGW32__) +# define PLATFORM_ID "MinGW" + +#elif defined(__APPLE__) +# define PLATFORM_ID "Darwin" + +#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) +# define PLATFORM_ID "Windows" + +#elif defined(__FreeBSD__) || defined(__FreeBSD) +# define PLATFORM_ID "FreeBSD" + +#elif defined(__NetBSD__) || defined(__NetBSD) +# define PLATFORM_ID "NetBSD" + +#elif defined(__OpenBSD__) || defined(__OPENBSD) +# define PLATFORM_ID "OpenBSD" + +#elif defined(__sun) || defined(sun) +# define PLATFORM_ID "SunOS" + +#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) +# define PLATFORM_ID "AIX" + +#elif defined(__hpux) || defined(__hpux__) +# define PLATFORM_ID "HP-UX" + +#elif defined(__HAIKU__) +# define PLATFORM_ID "Haiku" + +#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) +# define PLATFORM_ID "BeOS" + +#elif defined(__QNX__) || defined(__QNXNTO__) +# define PLATFORM_ID "QNX" + +#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) +# define PLATFORM_ID "Tru64" + +#elif defined(__riscos) || defined(__riscos__) +# define PLATFORM_ID "RISCos" + +#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) +# define PLATFORM_ID "SINIX" + +#elif defined(__UNIX_SV__) +# define PLATFORM_ID "UNIX_SV" + +#elif defined(__bsdos__) +# define PLATFORM_ID "BSDOS" + +#elif defined(_MPRAS) || defined(MPRAS) +# define PLATFORM_ID "MP-RAS" + +#elif defined(__osf) || defined(__osf__) +# define PLATFORM_ID "OSF1" + +#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) +# define PLATFORM_ID "SCO_SV" + +#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) +# define PLATFORM_ID "ULTRIX" + +#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) +# define PLATFORM_ID "Xenix" + +#elif defined(__WATCOMC__) +# if defined(__LINUX__) +# define PLATFORM_ID "Linux" + +# elif defined(__DOS__) +# define PLATFORM_ID "DOS" + +# elif defined(__OS2__) +# define PLATFORM_ID "OS2" + +# elif defined(__WINDOWS__) +# define PLATFORM_ID "Windows3x" + +# else /* unknown platform */ +# define PLATFORM_ID +# endif + +#elif defined(__INTEGRITY) +# if defined(INT_178B) +# define PLATFORM_ID "Integrity178" + +# else /* regular Integrity */ +# define PLATFORM_ID "Integrity" +# endif + +#else /* unknown platform */ +# define PLATFORM_ID + +#endif + +/* For windows compilers MSVC and Intel we can determine + the architecture of the compiler being used. This is because + the compilers do not have flags that can change the architecture, + but rather depend on which compiler is being used +*/ +#if defined(_WIN32) && defined(_MSC_VER) +# if defined(_M_IA64) +# define ARCHITECTURE_ID "IA64" + +# elif defined(_M_X64) || defined(_M_AMD64) +# define ARCHITECTURE_ID "x64" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# elif defined(_M_ARM64) +# define ARCHITECTURE_ID "ARM64" + +# elif defined(_M_ARM) +# if _M_ARM == 4 +# define ARCHITECTURE_ID "ARMV4I" +# elif _M_ARM == 5 +# define ARCHITECTURE_ID "ARMV5I" +# else +# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) +# endif + +# elif defined(_M_MIPS) +# define ARCHITECTURE_ID "MIPS" + +# elif defined(_M_SH) +# define ARCHITECTURE_ID "SHx" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__WATCOMC__) +# if defined(_M_I86) +# define ARCHITECTURE_ID "I86" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# if defined(__ICCARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__ICCRX__) +# define ARCHITECTURE_ID "RX" + +# elif defined(__ICCRH850__) +# define ARCHITECTURE_ID "RH850" + +# elif defined(__ICCRL78__) +# define ARCHITECTURE_ID "RL78" + +# elif defined(__ICCRISCV__) +# define ARCHITECTURE_ID "RISCV" + +# elif defined(__ICCAVR__) +# define ARCHITECTURE_ID "AVR" + +# elif defined(__ICC430__) +# define ARCHITECTURE_ID "MSP430" + +# elif defined(__ICCV850__) +# define ARCHITECTURE_ID "V850" + +# elif defined(__ICC8051__) +# define ARCHITECTURE_ID "8051" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__ghs__) +# if defined(__PPC64__) +# define ARCHITECTURE_ID "PPC64" + +# elif defined(__ppc__) +# define ARCHITECTURE_ID "PPC" + +# elif defined(__ARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__x86_64__) +# define ARCHITECTURE_ID "x64" + +# elif defined(__i386__) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif +#else +# define ARCHITECTURE_ID +#endif + +/* Convert integer to decimal digit literals. */ +#define DEC(n) \ + ('0' + (((n) / 10000000)%10)), \ + ('0' + (((n) / 1000000)%10)), \ + ('0' + (((n) / 100000)%10)), \ + ('0' + (((n) / 10000)%10)), \ + ('0' + (((n) / 1000)%10)), \ + ('0' + (((n) / 100)%10)), \ + ('0' + (((n) / 10)%10)), \ + ('0' + ((n) % 10)) + +/* Convert integer to hex digit literals. */ +#define HEX(n) \ + ('0' + ((n)>>28 & 0xF)), \ + ('0' + ((n)>>24 & 0xF)), \ + ('0' + ((n)>>20 & 0xF)), \ + ('0' + ((n)>>16 & 0xF)), \ + ('0' + ((n)>>12 & 0xF)), \ + ('0' + ((n)>>8 & 0xF)), \ + ('0' + ((n)>>4 & 0xF)), \ + ('0' + ((n) & 0xF)) + +/* Construct a string literal encoding the version number components. */ +#ifdef COMPILER_VERSION_MAJOR +char const info_version[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', + COMPILER_VERSION_MAJOR, +# ifdef COMPILER_VERSION_MINOR + '.', COMPILER_VERSION_MINOR, +# ifdef COMPILER_VERSION_PATCH + '.', COMPILER_VERSION_PATCH, +# ifdef COMPILER_VERSION_TWEAK + '.', COMPILER_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct a string literal encoding the internal version number. */ +#ifdef COMPILER_VERSION_INTERNAL +char const info_version_internal[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', + 'i','n','t','e','r','n','a','l','[', + COMPILER_VERSION_INTERNAL,']','\0'}; +#endif + +/* Construct a string literal encoding the version number components. */ +#ifdef SIMULATE_VERSION_MAJOR +char const info_simulate_version[] = { + 'I', 'N', 'F', 'O', ':', + 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', + SIMULATE_VERSION_MAJOR, +# ifdef SIMULATE_VERSION_MINOR + '.', SIMULATE_VERSION_MINOR, +# ifdef SIMULATE_VERSION_PATCH + '.', SIMULATE_VERSION_PATCH, +# ifdef SIMULATE_VERSION_TWEAK + '.', SIMULATE_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; +char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; + + + + +#if !defined(__STDC__) +# if (defined(_MSC_VER) && !defined(__clang__)) \ + || (defined(__ibmxl__) || defined(__IBMC__)) +# define C_DIALECT "90" +# else +# define C_DIALECT +# endif +#elif __STDC_VERSION__ >= 201000L +# define C_DIALECT "11" +#elif __STDC_VERSION__ >= 199901L +# define C_DIALECT "99" +#else +# define C_DIALECT "90" +#endif +const char* info_language_dialect_default = + "INFO" ":" "dialect_default[" C_DIALECT "]"; + +/*--------------------------------------------------------------------------*/ + +#ifdef ID_VOID_MAIN +void main() {} +#else +# if defined(__CLASSIC_C__) +int main(argc, argv) int argc; char *argv[]; +# else +int main(int argc, char* argv[]) +# endif +{ + int require = 0; + require += info_compiler[argc]; + require += info_platform[argc]; + require += info_arch[argc]; +#ifdef COMPILER_VERSION_MAJOR + require += info_version[argc]; +#endif +#ifdef COMPILER_VERSION_INTERNAL + require += info_version_internal[argc]; +#endif +#ifdef SIMULATE_ID + require += info_simulate[argc]; +#endif +#ifdef SIMULATE_VERSION_MAJOR + require += info_simulate_version[argc]; +#endif +#if defined(__CRAYXE) || defined(__CRAYXC) + require += info_cray[argc]; +#endif + require += info_language_dialect_default[argc]; + (void)argv; + return require; +} +#endif diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdC/a.out b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdC/a.out new file mode 100755 index 0000000000000000000000000000000000000000..b5c91a373fc518990e2aec59df62ee3a3ddb612a GIT binary patch literal 16712 zcmeHOeQX>@6`%9jiPI)$Cv}LMwDpn?$)WY-Y!c(7HNCTa&K|OpHnC}t>n>~G**>@r zbGJwBij+Xo!VwGsB2oT8ii!jX!XM?2ejovkLJO?`H3Eg8f=GcDgF@<-2Dy;tcyH#t z^X~dwB+4HM?MSz8=J!7L&FtRJ?##!deZ5sapWxyb?-kez*DEAUjM_a^0TLD+VhtQ` z7B`6%(5{x4;)fLht|}L*oV1p3KTy!ESR#tyFrh- zmL%Sqa5o{P%rC01oB}dwK?nuR3QprqVs%5I9y`_C;FrN*!Nyiu$`oJ-@ zci*4@GqZ?M8f9NJP#gI#?vB2&W!v2^9*Cd%;uyqyi0l>5h_~4OYn4tZP@HYQhLc5kED`TFGRLR+gC3v}Hwevu5+ zh83T2Zr8hTO;d7>E<8uL=E6Tkc(V)t65$u_6tdu0!1Lj9(T4LmBX7=z^Vmdu-iGrv zhWLUFm-kBqz2arS%Yc^wF9Ti%ybO35@G|g!lYzh0-SQ9p=%rfyc+IbO2%$eTYgLt= z*N^_F_N+X|(ym7Veyz0aYe4Fn1j<9}`?A#|WV`jRvEsS=^y2UJqko*gYoKqY<~%%_ z>N9H$NjlGfrPBHwsJwncpXq!GD*8;#caiK~u-1d?eOL$At4bH^nvS63vqV9@DCKv3 z63O;!dU0MqbNNpF%z|I{J)@tyW;K9;ZDgRfbaAY%3F2aXjQ2=q6xgD0>!5zLvkI$v z@g-}ue!O!9H0HLKN~O6t9G!cp+V3q9=@a(3m1PJy^3M#$Jajx zGxg)qOZp?a@A&H)6xL&!M^QpVjs`dT`QIJGjIB>rq&lIzkS8m z`ihr(ihqif8h)oAJ?qnV|F-ZK?Ej(R$i0!_$bAvx?ATbauIU(_uk3Fe8R%DzoAOAJ zZ13P@z{`M_0WSky2D}V-8SpaTWx&gTmjN#W|Dzf3IleY74KlW`cmJNzYmBgqeM;wPnCk%@~Wnp`_usqR!mQ=hTE>+;v94Tb1 zg0?#d6Z@9df^4-u*cJ+gb_UzFEBxOF5J?OZ>s44D0PrrCa`TBIq zZ-5sfc0|?vaJ7dj;(Rw+)WPepTD)3XL{ts$YgHm3CSCc2^%fF8<-*@dINv9g6(QaO z6&SVUc+ek~UikUoZ4lr0BnSswoR5C_zRUPDRD5D-J|6+RQvA!E*SDpeb>f#8u&Y$E z^OTgiVM(0N0q(=QsjI(!LGpaRXBRKa%F^-khP1P^e;;FyP5+INs3Lr(*(hw;`CX3L6>lYE%Q?G9o;LH6rO zp8xNj1|03UucLEhXFK_o?<&C-uHae=`D}LCc^z>$U$-6TT%m!UyKDq}vm1nVJK&g~ zu%?)8B-1VN4MGbmfa4dVIV*1!U?tM1Slk|BSZQMvH;Ck6b4WaEjHj|AX3B_L*<9W* z3sVB$T&EINA|C7rwYOFl!mTMu!_4K(X(N%ba?@fgXQmTIypT>$gNm(XfTZOR?d~@} zoapYR7v!-xgl8DN2O|AZBf780fL$t1owzW1KCmy+AM18<CYsTFK}P@9+h!7R(=u6Qao~q% z7tC=;xbvMqh{N_DP9yFMs<_$5xxL7FQqn$slu)tYHwGbs`RTM}jsUfCicWAXnSpIb zlOmYOT8ZFzrVyOWWhWCkYuW~l6q2wpEEy*#(iLm5%yA*bC(QhW2*#%~;6hO=r#Kvk z6r+X#yj&t>qJjv@lm#bKmcT=BJPQ>oF$G5)q9B=-JsC_)(4d@%gFd&Ez8alMgX>`2 zOeaSn92^Ki=mZgjPD#UPr_1hb6PyRYtpRTXvhZ^qQ=SJ9Tgq}B=@$6mGcxP*^B+?U zc=l4hFA&%c)UJPso(Gw3wJSrN@5cAVx$y8%OqHg_r0RKBY>vQ}(zhTP$@!J&^ zcl;(`IJaSap8qgCfl5&D95K(V&-0cfV0g-`&(E<;dHw_Dy(m(Ja+7&A0&f1UD$XX-v&R9hwp!@0OQ#0`rpJq1}Ob5>24 & 0x00FF) +# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF) +# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF) + +#elif defined(__BORLANDC__) +# define COMPILER_ID "Borland" + /* __BORLANDC__ = 0xVRR */ +# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8) +# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF) + +#elif defined(__WATCOMC__) && __WATCOMC__ < 1200 +# define COMPILER_ID "Watcom" + /* __WATCOMC__ = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__WATCOMC__) +# define COMPILER_ID "OpenWatcom" + /* __WATCOMC__ = VVRP + 1100 */ +# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__SUNPRO_CC) +# define COMPILER_ID "SunPro" +# if __SUNPRO_CC >= 0x5100 + /* __SUNPRO_CC = 0xVRRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>12) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) +# else + /* __SUNPRO_CC = 0xVRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>8) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) +# endif + +#elif defined(__HP_aCC) +# define COMPILER_ID "HP" + /* __HP_aCC = VVRRPP */ +# define COMPILER_VERSION_MAJOR DEC(__HP_aCC/10000) +# define COMPILER_VERSION_MINOR DEC(__HP_aCC/100 % 100) +# define COMPILER_VERSION_PATCH DEC(__HP_aCC % 100) + +#elif defined(__DECCXX) +# define COMPILER_ID "Compaq" + /* __DECCXX_VER = VVRRTPPPP */ +# define COMPILER_VERSION_MAJOR DEC(__DECCXX_VER/10000000) +# define COMPILER_VERSION_MINOR DEC(__DECCXX_VER/100000 % 100) +# define COMPILER_VERSION_PATCH DEC(__DECCXX_VER % 10000) + +#elif defined(__IBMCPP__) && defined(__COMPILER_VER__) +# define COMPILER_ID "zOS" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__ibmxl__) && defined(__clang__) +# define COMPILER_ID "XLClang" +# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__) +# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__) +# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__) +# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__) + + +#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ >= 800 +# define COMPILER_ID "XL" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ < 800 +# define COMPILER_ID "VisualAge" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__PGI) +# define COMPILER_ID "PGI" +# define COMPILER_VERSION_MAJOR DEC(__PGIC__) +# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__) +# if defined(__PGIC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__) +# endif + +#elif defined(_CRAYC) +# define COMPILER_ID "Cray" +# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR) +# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR) + +#elif defined(__TI_COMPILER_VERSION__) +# define COMPILER_ID "TI" + /* __TI_COMPILER_VERSION__ = VVVRRRPPP */ +# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000) +# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000) +# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000) + +#elif defined(__FUJITSU) || defined(__FCC_VERSION) || defined(__fcc_version) +# define COMPILER_ID "Fujitsu" + +#elif defined(__ghs__) +# define COMPILER_ID "GHS" +/* __GHS_VERSION_NUMBER = VVVVRP */ +# ifdef __GHS_VERSION_NUMBER +# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100) +# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10) +# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10) +# endif + +#elif defined(__SCO_VERSION__) +# define COMPILER_ID "SCO" + +#elif defined(__ARMCC_VERSION) && !defined(__clang__) +# define COMPILER_ID "ARMCC" +#if __ARMCC_VERSION >= 1000000 + /* __ARMCC_VERSION = VRRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#else + /* __ARMCC_VERSION = VRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#endif + + +#elif defined(__clang__) && defined(__apple_build_version__) +# define COMPILER_ID "AppleClang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif +# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__) + +#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION) +# define COMPILER_ID "ARMClang" + # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION % 10000) +# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION) + +#elif defined(__clang__) +# define COMPILER_ID "Clang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif + +#elif defined(__GNUC__) || defined(__GNUG__) +# define COMPILER_ID "GNU" +# if defined(__GNUC__) +# define COMPILER_VERSION_MAJOR DEC(__GNUC__) +# else +# define COMPILER_VERSION_MAJOR DEC(__GNUG__) +# endif +# if defined(__GNUC_MINOR__) +# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__) +# endif +# if defined(__GNUC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif + +#elif defined(_MSC_VER) +# define COMPILER_ID "MSVC" + /* _MSC_VER = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100) +# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100) +# if defined(_MSC_FULL_VER) +# if _MSC_VER >= 1400 + /* _MSC_FULL_VER = VVRRPPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000) +# else + /* _MSC_FULL_VER = VVRRPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000) +# endif +# endif +# if defined(_MSC_BUILD) +# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD) +# endif + +#elif defined(__VISUALDSPVERSION__) || defined(__ADSPBLACKFIN__) || defined(__ADSPTS__) || defined(__ADSP21000__) +# define COMPILER_ID "ADSP" +#if defined(__VISUALDSPVERSION__) + /* __VISUALDSPVERSION__ = 0xVVRRPP00 */ +# define COMPILER_VERSION_MAJOR HEX(__VISUALDSPVERSION__>>24) +# define COMPILER_VERSION_MINOR HEX(__VISUALDSPVERSION__>>16 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__VISUALDSPVERSION__>>8 & 0xFF) +#endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# define COMPILER_ID "IAR" +# if defined(__VER__) && defined(__ICCARM__) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000) +# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000) +# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__)) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100) +# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100)) +# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# endif + + +/* These compilers are either not known or too old to define an + identification macro. Try to identify the platform and guess that + it is the native compiler. */ +#elif defined(__hpux) || defined(__hpua) +# define COMPILER_ID "HP" + +#else /* unknown compiler */ +# define COMPILER_ID "" +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; +#ifdef SIMULATE_ID +char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; +#endif + +#ifdef __QNXNTO__ +char const* qnxnto = "INFO" ":" "qnxnto[]"; +#endif + +#if defined(__CRAYXE) || defined(__CRAYXC) +char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; +#endif + +#define STRINGIFY_HELPER(X) #X +#define STRINGIFY(X) STRINGIFY_HELPER(X) + +/* Identify known platforms by name. */ +#if defined(__linux) || defined(__linux__) || defined(linux) +# define PLATFORM_ID "Linux" + +#elif defined(__CYGWIN__) +# define PLATFORM_ID "Cygwin" + +#elif defined(__MINGW32__) +# define PLATFORM_ID "MinGW" + +#elif defined(__APPLE__) +# define PLATFORM_ID "Darwin" + +#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) +# define PLATFORM_ID "Windows" + +#elif defined(__FreeBSD__) || defined(__FreeBSD) +# define PLATFORM_ID "FreeBSD" + +#elif defined(__NetBSD__) || defined(__NetBSD) +# define PLATFORM_ID "NetBSD" + +#elif defined(__OpenBSD__) || defined(__OPENBSD) +# define PLATFORM_ID "OpenBSD" + +#elif defined(__sun) || defined(sun) +# define PLATFORM_ID "SunOS" + +#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) +# define PLATFORM_ID "AIX" + +#elif defined(__hpux) || defined(__hpux__) +# define PLATFORM_ID "HP-UX" + +#elif defined(__HAIKU__) +# define PLATFORM_ID "Haiku" + +#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) +# define PLATFORM_ID "BeOS" + +#elif defined(__QNX__) || defined(__QNXNTO__) +# define PLATFORM_ID "QNX" + +#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) +# define PLATFORM_ID "Tru64" + +#elif defined(__riscos) || defined(__riscos__) +# define PLATFORM_ID "RISCos" + +#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) +# define PLATFORM_ID "SINIX" + +#elif defined(__UNIX_SV__) +# define PLATFORM_ID "UNIX_SV" + +#elif defined(__bsdos__) +# define PLATFORM_ID "BSDOS" + +#elif defined(_MPRAS) || defined(MPRAS) +# define PLATFORM_ID "MP-RAS" + +#elif defined(__osf) || defined(__osf__) +# define PLATFORM_ID "OSF1" + +#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) +# define PLATFORM_ID "SCO_SV" + +#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) +# define PLATFORM_ID "ULTRIX" + +#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) +# define PLATFORM_ID "Xenix" + +#elif defined(__WATCOMC__) +# if defined(__LINUX__) +# define PLATFORM_ID "Linux" + +# elif defined(__DOS__) +# define PLATFORM_ID "DOS" + +# elif defined(__OS2__) +# define PLATFORM_ID "OS2" + +# elif defined(__WINDOWS__) +# define PLATFORM_ID "Windows3x" + +# else /* unknown platform */ +# define PLATFORM_ID +# endif + +#elif defined(__INTEGRITY) +# if defined(INT_178B) +# define PLATFORM_ID "Integrity178" + +# else /* regular Integrity */ +# define PLATFORM_ID "Integrity" +# endif + +#else /* unknown platform */ +# define PLATFORM_ID + +#endif + +/* For windows compilers MSVC and Intel we can determine + the architecture of the compiler being used. This is because + the compilers do not have flags that can change the architecture, + but rather depend on which compiler is being used +*/ +#if defined(_WIN32) && defined(_MSC_VER) +# if defined(_M_IA64) +# define ARCHITECTURE_ID "IA64" + +# elif defined(_M_X64) || defined(_M_AMD64) +# define ARCHITECTURE_ID "x64" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# elif defined(_M_ARM64) +# define ARCHITECTURE_ID "ARM64" + +# elif defined(_M_ARM) +# if _M_ARM == 4 +# define ARCHITECTURE_ID "ARMV4I" +# elif _M_ARM == 5 +# define ARCHITECTURE_ID "ARMV5I" +# else +# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) +# endif + +# elif defined(_M_MIPS) +# define ARCHITECTURE_ID "MIPS" + +# elif defined(_M_SH) +# define ARCHITECTURE_ID "SHx" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__WATCOMC__) +# if defined(_M_I86) +# define ARCHITECTURE_ID "I86" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# if defined(__ICCARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__ICCRX__) +# define ARCHITECTURE_ID "RX" + +# elif defined(__ICCRH850__) +# define ARCHITECTURE_ID "RH850" + +# elif defined(__ICCRL78__) +# define ARCHITECTURE_ID "RL78" + +# elif defined(__ICCRISCV__) +# define ARCHITECTURE_ID "RISCV" + +# elif defined(__ICCAVR__) +# define ARCHITECTURE_ID "AVR" + +# elif defined(__ICC430__) +# define ARCHITECTURE_ID "MSP430" + +# elif defined(__ICCV850__) +# define ARCHITECTURE_ID "V850" + +# elif defined(__ICC8051__) +# define ARCHITECTURE_ID "8051" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__ghs__) +# if defined(__PPC64__) +# define ARCHITECTURE_ID "PPC64" + +# elif defined(__ppc__) +# define ARCHITECTURE_ID "PPC" + +# elif defined(__ARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__x86_64__) +# define ARCHITECTURE_ID "x64" + +# elif defined(__i386__) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif +#else +# define ARCHITECTURE_ID +#endif + +/* Convert integer to decimal digit literals. */ +#define DEC(n) \ + ('0' + (((n) / 10000000)%10)), \ + ('0' + (((n) / 1000000)%10)), \ + ('0' + (((n) / 100000)%10)), \ + ('0' + (((n) / 10000)%10)), \ + ('0' + (((n) / 1000)%10)), \ + ('0' + (((n) / 100)%10)), \ + ('0' + (((n) / 10)%10)), \ + ('0' + ((n) % 10)) + +/* Convert integer to hex digit literals. */ +#define HEX(n) \ + ('0' + ((n)>>28 & 0xF)), \ + ('0' + ((n)>>24 & 0xF)), \ + ('0' + ((n)>>20 & 0xF)), \ + ('0' + ((n)>>16 & 0xF)), \ + ('0' + ((n)>>12 & 0xF)), \ + ('0' + ((n)>>8 & 0xF)), \ + ('0' + ((n)>>4 & 0xF)), \ + ('0' + ((n) & 0xF)) + +/* Construct a string literal encoding the version number components. */ +#ifdef COMPILER_VERSION_MAJOR +char const info_version[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', + COMPILER_VERSION_MAJOR, +# ifdef COMPILER_VERSION_MINOR + '.', COMPILER_VERSION_MINOR, +# ifdef COMPILER_VERSION_PATCH + '.', COMPILER_VERSION_PATCH, +# ifdef COMPILER_VERSION_TWEAK + '.', COMPILER_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct a string literal encoding the internal version number. */ +#ifdef COMPILER_VERSION_INTERNAL +char const info_version_internal[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', + 'i','n','t','e','r','n','a','l','[', + COMPILER_VERSION_INTERNAL,']','\0'}; +#endif + +/* Construct a string literal encoding the version number components. */ +#ifdef SIMULATE_VERSION_MAJOR +char const info_simulate_version[] = { + 'I', 'N', 'F', 'O', ':', + 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', + SIMULATE_VERSION_MAJOR, +# ifdef SIMULATE_VERSION_MINOR + '.', SIMULATE_VERSION_MINOR, +# ifdef SIMULATE_VERSION_PATCH + '.', SIMULATE_VERSION_PATCH, +# ifdef SIMULATE_VERSION_TWEAK + '.', SIMULATE_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; +char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; + + + + +#if defined(__INTEL_COMPILER) && defined(_MSVC_LANG) && _MSVC_LANG < 201403L +# if defined(__INTEL_CXX11_MODE__) +# if defined(__cpp_aggregate_nsdmi) +# define CXX_STD 201402L +# else +# define CXX_STD 201103L +# endif +# else +# define CXX_STD 199711L +# endif +#elif defined(_MSC_VER) && defined(_MSVC_LANG) +# define CXX_STD _MSVC_LANG +#else +# define CXX_STD __cplusplus +#endif + +const char* info_language_dialect_default = "INFO" ":" "dialect_default[" +#if CXX_STD > 201703L + "20" +#elif CXX_STD >= 201703L + "17" +#elif CXX_STD >= 201402L + "14" +#elif CXX_STD >= 201103L + "11" +#else + "98" +#endif +"]"; + +/*--------------------------------------------------------------------------*/ + +int main(int argc, char* argv[]) +{ + int require = 0; + require += info_compiler[argc]; + require += info_platform[argc]; +#ifdef COMPILER_VERSION_MAJOR + require += info_version[argc]; +#endif +#ifdef COMPILER_VERSION_INTERNAL + require += info_version_internal[argc]; +#endif +#ifdef SIMULATE_ID + require += info_simulate[argc]; +#endif +#ifdef SIMULATE_VERSION_MAJOR + require += info_simulate_version[argc]; +#endif +#if defined(__CRAYXE) || defined(__CRAYXC) + require += info_cray[argc]; +#endif + require += info_language_dialect_default[argc]; + (void)argv; + return require; +} diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdCXX/a.out b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdCXX/a.out new file mode 100755 index 0000000000000000000000000000000000000000..2881803fe1c1315653cec8eead6766e2c9b69693 GIT binary patch literal 16720 zcmeHOe{3699e<9KHtkx+{k4X6TW+P5(v7%ImWH$})K22`jNEo>lP!>C$HjIM3&#%j znI_XZT2h9r5~#FFOai28NC>n_1O6BSX^^U02Z*s%LR(QmM6hZZDqS`h3ed%Tzwf?Z z=kDSTiSZBUp5*(y_xb*K@4oNd`QF`opO3_PsyrUS$tylCuoUu}Oo#;jy_5k6iFUCT zj<<{3#0n@^OU{&sOaQ5wE?3#HmUu59+SOyG0^VlQP=lGcg@|Z(v($(Ug2X83JkYKN z1ypw8ZfYkZ%ggmCXbee_$1+|<1xSomJ8a5)lN5{j4m*aZK9!K|uqaOSN@1VodPYPVsc2VtOez-)YxRc24XjJ4UPn(~+x2;yI(23lmr*e96m7?S&JMes`|;eE#*9SDz@{#Xhi3)WL-IJS4D; zd8`9<%=141IU37=my*94lf+F9?Z7J)WLtn+UxDuhPN~4hZ^GXK{I&}E0^%3PaJ30d zi%;mP-UD6f zY$n;O52ev^WGtH@OU+cRs3_ZGMv-Ibfe2y@d0Z5>q*h^cKSFKi>yxhwWt}NlpzD_T zS#nStGUd#3+3(;L#nh{J@HyfY2mdAF8y)-;#9!VgWWuq4=fi2%!t*(!Y|g^-*hGHb z!t*tT{DOs-_e&(*|9if^XmEQ`_%IbUe$9^y|id-1P43FL2YSvxUK=(#rD|V;~fzYi^AP~>QqM+ zX4T?VV~u*MV+9oEc9u$|xda?8*4z$d&mh>^?B6^JLUhyzcEw}Y)M8=w#mEh8rh01A zFJPvADsoMIQuVx2_pGS<$&4p*1Na|T;!VZrO)vN$n$K4I%i7Fj;Uv}t z;Sb4phaZehciaOrm+%A8;;Z4lXz|@}Z@74)Pn~Ys4)l@O&iAlS=NcAECH4G!UZbJ; z3dJ*4d?!}C-d%hnT-x}1b?Smg-SfM`pRm6N2Ez}92g47CwF|>bb>eB`NI;b1q&zZY zliY(F0XG6}1l$O?5pW~mM!=1L8v!>0ZUo#2{EtMyWBb~;ywTBvJ%{$jvt#3_bTT&p zUnvLeIySlXxnwS%%4P(fbxlyo=(OM z_!Ky-7t+Q+bL*h+Z1sK&zh~mNFXOFJDGhiM@C@J?K>T)jY`#=F2Uz`fsq{-g18^g} zhQM#Jm^_ah7M=;eXX~1kwWo>4H3scqk8cJ<_e%MNZ#!gLu?)NfIa+&M z?Ax;Uu6wp`Loxb&2!3FS8D@yj*czTo34RA2kl%Kg4j#@8P91;f6^PM^~0tMByrJAJkC zd**M!ydV6y-|H}tZgL~wM!=1L8v!>0ZUo#2xDjw8;6{KW!0Q@$9V1MEWMW*yinPvg zEtMN-vFL}W%@P^)yVQ1S0R2z^3^6S zjuGN|Q%v`_JX=Jg)geI{d3e_ z_%bZZ96y+b$?~ft|2vhr9pv`E2fRM~1A653tBPVe;`OP#9+lUh?(gc_t2Fiv6*5La z*%N??eN%HmmYN@H2?m0#ftH;n|L+^*g%zyz++h}VFT9iB_3IWI)<$~;uTQu0)#A~L zern3&%&xzpJihGwO2OmM&esa=PdmR#@HnvZs|AlYI}f9mt}8pgMkp2ewIW!N_m%f& z*!|QAzE15tI8m&OnfHoy<@NVgsTWp;&sEglP~OL2*WXya-t9bGofXEXSKL~@KJEIO zg$P+0Gw+3~Jy?i$A^Eco{!ZfgK52Rp;-ip( zQCn^g)`zJFeja!m#P>Z(!T}fOW4(OeWgg!NdBpN~J_&rK_CF)_{UW4522zU&;G?qs zdEh;_)p$}Bi3`Q_v1e&GFLbGg6RWEb%3tCn9c{m8SD1&@*+=lDDc zykgPg>=VGRtJ*C1zRLVrd+lA|ktei(=CA@*$I zG13pwc-}?gm&m`L^!b1A3h?MBNIa>FH^|RUs#m_l1mQLEFki6))GcG zm)G>dgupk~>7zphO_)i9Q^bg4j+hUk%QeD>|L>YN(im{lLx~G zqFr{0+#~}Oym!|kDtS=54-0L7>`-SorXA|(ITGpBdc&Qu2zr%UYvTEWJg4{HOp{FL zhR!BSyKzDx+jblcwahIypljcMqb2fLZB)-BaBoiZ5NIV*8Lf~{CWJh7e#y_3V7oAY zrj$P_fOIIIrz+%rAZeV|Gb06k1iHcgB>>c6QxJy{cMDbA0%YHGWIrkCA3rt-5y(%D z8Tt^Qku!0WbEypMKN=T-Ox8#SMlyxKcrH7h%o&pwYN(Kc9b%~jQQ^*LlcA3YsXnUb zM@1kpnSm-yG;*edzLMAq8pv|Vw2lTMAfpr*Pa6Ucfsrg^jN}9yajb%7R(4(>IZC5* zGy(QpGVRS_YFcm}oa@EkGDY|rzT6mWRTY|qcLj69D56`9b7 zHGLKeIHzHIe(q)D`60KT^%x%mdz>S2nV*jt6{^hHexk)RWH6>|&(G0}3N@JPcb@;( zz!p_lj(@c>5%PSM*k%3yO%Pb^6|!SwcWlpP#-|+i{QS6e1IDY44s-hZ zzQdm91B^VM=lY%F_lIQ9@fQkd5}uWbm1ur-S@_%KLwv`dnuGBiPni?D=_qp$SMxtY?;%%FMq70vvl>fBCr? z)^}r?q5i}1kBRNLAHNM8s<1u3$C#l9xe&;#iR~E|KxnlWA<_<-NI>LL{Y)%E27Ph; z{5%&VL#~JQ>2$a#yg(r5tcUIIE^C?@wzndW9jof6$)QRYHeScrCEOmq|E&U!+itc0 e4*oGfdcfhF>oukL>{;1 + +void* test_func(void* data) +{ + return data; +} + +int main(void) +{ + pthread_t thread; + pthread_create(&thread, NULL, test_func, NULL); + pthread_detach(thread); + pthread_join(thread, NULL); + pthread_atfork(NULL, NULL, NULL); + pthread_exit(NULL); + + return 0; +} + diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/CMakeOutput.log b/rad-sim/example-designs/add_multi/CMakeFiles/CMakeOutput.log new file mode 100644 index 0000000..71dd668 --- /dev/null +++ b/rad-sim/example-designs/add_multi/CMakeFiles/CMakeOutput.log @@ -0,0 +1,477 @@ +The system is: Linux - 5.15.0-69-generic - x86_64 +Compiling the C compiler identification source file "CMakeCCompilerId.c" succeeded. +Compiler: /usr/bin/cc +Build flags: +Id flags: + +The output was: +0 + + +Compilation of the C compiler identification source "CMakeCCompilerId.c" produced "a.out" + +The C compiler identification is GNU, found in "/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/a.out" + +Compiling the CXX compiler identification source file "CMakeCXXCompilerId.cpp" succeeded. +Compiler: /usr/bin/c++ +Build flags: +Id flags: + +The output was: +0 + + +Compilation of the CXX compiler identification source "CMakeCXXCompilerId.cpp" produced "a.out" + +The CXX compiler identification is GNU, found in "/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdCXX/a.out" + +Determining if the C compiler works passed with the following output: +Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp + +Run Build Command(s):/usr/bin/make cmTC_9f9dc/fast && /usr/bin/make -f CMakeFiles/cmTC_9f9dc.dir/build.make CMakeFiles/cmTC_9f9dc.dir/build +make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' +Building C object CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o +/usr/bin/cc -o CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/testCCompiler.c +Linking C executable cmTC_9f9dc +/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_9f9dc.dir/link.txt --verbose=1 +/usr/bin/cc -rdynamic CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o -o cmTC_9f9dc +make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' + + + +Detecting C compiler ABI info compiled with the following output: +Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp + +Run Build Command(s):/usr/bin/make cmTC_5eca0/fast && /usr/bin/make -f CMakeFiles/cmTC_5eca0.dir/build.make CMakeFiles/cmTC_5eca0.dir/build +make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' +Building C object CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o +/usr/bin/cc -v -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -c /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c +Using built-in specs. +COLLECT_GCC=/usr/bin/cc +OFFLOAD_TARGET_NAMES=nvptx-none:hsa +OFFLOAD_TARGET_DEFAULT=1 +Target: x86_64-linux-gnu +Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu +Thread model: posix +gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' + /usr/lib/gcc/x86_64-linux-gnu/9/cc1 -quiet -v -imultiarch x86_64-linux-gnu /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c -quiet -dumpbase CMakeCCompilerABI.c -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccEZ3Z6E.s +GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) + compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP + +GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 +ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu" +ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed" +ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include" +#include "..." search starts here: +#include <...> search starts here: + /usr/lib/gcc/x86_64-linux-gnu/9/include + /usr/local/include + /usr/include/x86_64-linux-gnu + /usr/include +End of search list. +GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) + compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP + +GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 +Compiler executable checksum: 01da938ff5dc2163489aa33cb3b747a7 +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' + as -v --64 -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o /tmp/ccEZ3Z6E.s +GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34 +COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ +LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' +Linking C executable cmTC_5eca0 +/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_5eca0.dir/link.txt --verbose=1 +/usr/bin/cc -v -rdynamic CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -o cmTC_5eca0 +Using built-in specs. +COLLECT_GCC=/usr/bin/cc +COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper +OFFLOAD_TARGET_NAMES=nvptx-none:hsa +OFFLOAD_TARGET_DEFAULT=1 +Target: x86_64-linux-gnu +Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu +Thread model: posix +gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) +COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ +LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ +COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64' + /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/ccjwqw95.res -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_5eca0 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -lgcc --push-state --as-needed -lgcc_s --pop-state -lc -lgcc --push-state --as-needed -lgcc_s --pop-state /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o +COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64' +make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' + + + +Parsed C implicit include dir info from above output: rv=done + found start of include info + found start of implicit include info + add: [/usr/lib/gcc/x86_64-linux-gnu/9/include] + add: [/usr/local/include] + add: [/usr/include/x86_64-linux-gnu] + add: [/usr/include] + end of search list found + collapse include dir [/usr/lib/gcc/x86_64-linux-gnu/9/include] ==> [/usr/lib/gcc/x86_64-linux-gnu/9/include] + collapse include dir [/usr/local/include] ==> [/usr/local/include] + collapse include dir [/usr/include/x86_64-linux-gnu] ==> [/usr/include/x86_64-linux-gnu] + collapse include dir [/usr/include] ==> [/usr/include] + implicit include dirs: [/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include] + + +Parsed C implicit link information from above output: + link line regex: [^( *|.*[/\])(ld|CMAKE_LINK_STARTFILE-NOTFOUND|([^/\]+-)?ld|collect2)[^/\]*( |$)] + ignore line: [Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp] + ignore line: [] + ignore line: [Run Build Command(s):/usr/bin/make cmTC_5eca0/fast && /usr/bin/make -f CMakeFiles/cmTC_5eca0.dir/build.make CMakeFiles/cmTC_5eca0.dir/build] + ignore line: [make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp'] + ignore line: [Building C object CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o] + ignore line: [/usr/bin/cc -v -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -c /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c] + ignore line: [Using built-in specs.] + ignore line: [COLLECT_GCC=/usr/bin/cc] + ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] + ignore line: [OFFLOAD_TARGET_DEFAULT=1] + ignore line: [Target: x86_64-linux-gnu] + ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] + ignore line: [Thread model: posix] + ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] + ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/cc1 -quiet -v -imultiarch x86_64-linux-gnu /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c -quiet -dumpbase CMakeCCompilerABI.c -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccEZ3Z6E.s] + ignore line: [GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] + ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] + ignore line: [] + ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] + ignore line: [ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu"] + ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed"] + ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include"] + ignore line: [#include "..." search starts here:] + ignore line: [#include <...> search starts here:] + ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/include] + ignore line: [ /usr/local/include] + ignore line: [ /usr/include/x86_64-linux-gnu] + ignore line: [ /usr/include] + ignore line: [End of search list.] + ignore line: [GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] + ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] + ignore line: [] + ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] + ignore line: [Compiler executable checksum: 01da938ff5dc2163489aa33cb3b747a7] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] + ignore line: [ as -v --64 -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o /tmp/ccEZ3Z6E.s] + ignore line: [GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34] + ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] + ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] + ignore line: [Linking C executable cmTC_5eca0] + ignore line: [/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_5eca0.dir/link.txt --verbose=1] + ignore line: [/usr/bin/cc -v -rdynamic CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -o cmTC_5eca0 ] + ignore line: [Using built-in specs.] + ignore line: [COLLECT_GCC=/usr/bin/cc] + ignore line: [COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] + ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] + ignore line: [OFFLOAD_TARGET_DEFAULT=1] + ignore line: [Target: x86_64-linux-gnu] + ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] + ignore line: [Thread model: posix] + ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] + ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] + ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64'] + link line: [ /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/ccjwqw95.res -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_5eca0 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -lgcc --push-state --as-needed -lgcc_s --pop-state -lc -lgcc --push-state --as-needed -lgcc_s --pop-state /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] + arg [/usr/lib/gcc/x86_64-linux-gnu/9/collect2] ==> ignore + arg [-plugin] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so] ==> ignore + arg [-plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] ==> ignore + arg [-plugin-opt=-fresolution=/tmp/ccjwqw95.res] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore + arg [-plugin-opt=-pass-through=-lc] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore + arg [--build-id] ==> ignore + arg [--eh-frame-hdr] ==> ignore + arg [-m] ==> ignore + arg [elf_x86_64] ==> ignore + arg [--hash-style=gnu] ==> ignore + arg [--as-needed] ==> ignore + arg [-export-dynamic] ==> ignore + arg [-dynamic-linker] ==> ignore + arg [/lib64/ld-linux-x86-64.so.2] ==> ignore + arg [-pie] ==> ignore + arg [-znow] ==> ignore + arg [-zrelro] ==> ignore + arg [-o] ==> ignore + arg [cmTC_5eca0] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o] ==> ignore + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] + arg [-L/lib/x86_64-linux-gnu] ==> dir [/lib/x86_64-linux-gnu] + arg [-L/lib/../lib] ==> dir [/lib/../lib] + arg [-L/usr/lib/x86_64-linux-gnu] ==> dir [/usr/lib/x86_64-linux-gnu] + arg [-L/usr/lib/../lib] ==> dir [/usr/lib/../lib] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] + arg [CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o] ==> ignore + arg [-lgcc] ==> lib [gcc] + arg [--push-state] ==> ignore + arg [--as-needed] ==> ignore + arg [-lgcc_s] ==> lib [gcc_s] + arg [--pop-state] ==> ignore + arg [-lc] ==> lib [c] + arg [-lgcc] ==> lib [gcc] + arg [--push-state] ==> ignore + arg [--as-needed] ==> ignore + arg [-lgcc_s] ==> lib [gcc_s] + arg [--pop-state] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] ==> ignore + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9] ==> [/usr/lib/gcc/x86_64-linux-gnu/9] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> [/usr/lib] + collapse library dir [/lib/x86_64-linux-gnu] ==> [/lib/x86_64-linux-gnu] + collapse library dir [/lib/../lib] ==> [/lib] + collapse library dir [/usr/lib/x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] + collapse library dir [/usr/lib/../lib] ==> [/usr/lib] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> [/usr/lib] + implicit libs: [gcc;gcc_s;c;gcc;gcc_s] + implicit dirs: [/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib] + implicit fwks: [] + + +Determining if the CXX compiler works passed with the following output: +Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp + +Run Build Command(s):/usr/bin/make cmTC_8e0c3/fast && /usr/bin/make -f CMakeFiles/cmTC_8e0c3.dir/build.make CMakeFiles/cmTC_8e0c3.dir/build +make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' +Building CXX object CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o +/usr/bin/c++ -o CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/testCXXCompiler.cxx +Linking CXX executable cmTC_8e0c3 +/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_8e0c3.dir/link.txt --verbose=1 +/usr/bin/c++ -rdynamic CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o -o cmTC_8e0c3 +make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' + + + +Detecting CXX compiler ABI info compiled with the following output: +Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp + +Run Build Command(s):/usr/bin/make cmTC_59ff1/fast && /usr/bin/make -f CMakeFiles/cmTC_59ff1.dir/build.make CMakeFiles/cmTC_59ff1.dir/build +make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' +Building CXX object CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o +/usr/bin/c++ -v -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -c /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp +Using built-in specs. +COLLECT_GCC=/usr/bin/c++ +OFFLOAD_TARGET_NAMES=nvptx-none:hsa +OFFLOAD_TARGET_DEFAULT=1 +Target: x86_64-linux-gnu +Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu +Thread model: posix +gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' + /usr/lib/gcc/x86_64-linux-gnu/9/cc1plus -quiet -v -imultiarch x86_64-linux-gnu -D_GNU_SOURCE /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp -quiet -dumpbase CMakeCXXCompilerABI.cpp -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccETTYVz.s +GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) + compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP + +GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 +ignoring duplicate directory "/usr/include/x86_64-linux-gnu/c++/9" +ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu" +ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed" +ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include" +#include "..." search starts here: +#include <...> search starts here: + /usr/include/c++/9 + /usr/include/x86_64-linux-gnu/c++/9 + /usr/include/c++/9/backward + /usr/lib/gcc/x86_64-linux-gnu/9/include + /usr/local/include + /usr/include/x86_64-linux-gnu + /usr/include +End of search list. +GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) + compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP + +GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 +Compiler executable checksum: 3d1eba838554fa2348dba760e4770469 +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' + as -v --64 -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o /tmp/ccETTYVz.s +GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34 +COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ +LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' +Linking CXX executable cmTC_59ff1 +/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_59ff1.dir/link.txt --verbose=1 +/usr/bin/c++ -v -rdynamic CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -o cmTC_59ff1 +Using built-in specs. +COLLECT_GCC=/usr/bin/c++ +COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper +OFFLOAD_TARGET_NAMES=nvptx-none:hsa +OFFLOAD_TARGET_DEFAULT=1 +Target: x86_64-linux-gnu +Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu +Thread model: posix +gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) +COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ +LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ +COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64' + /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/cco0EvR4.res -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_59ff1 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -lstdc++ -lm -lgcc_s -lgcc -lc -lgcc_s -lgcc /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o +COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64' +make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' + + + +Parsed CXX implicit include dir info from above output: rv=done + found start of include info + found start of implicit include info + add: [/usr/include/c++/9] + add: [/usr/include/x86_64-linux-gnu/c++/9] + add: [/usr/include/c++/9/backward] + add: [/usr/lib/gcc/x86_64-linux-gnu/9/include] + add: [/usr/local/include] + add: [/usr/include/x86_64-linux-gnu] + add: [/usr/include] + end of search list found + collapse include dir [/usr/include/c++/9] ==> [/usr/include/c++/9] + collapse include dir [/usr/include/x86_64-linux-gnu/c++/9] ==> [/usr/include/x86_64-linux-gnu/c++/9] + collapse include dir [/usr/include/c++/9/backward] ==> [/usr/include/c++/9/backward] + collapse include dir [/usr/lib/gcc/x86_64-linux-gnu/9/include] ==> [/usr/lib/gcc/x86_64-linux-gnu/9/include] + collapse include dir [/usr/local/include] ==> [/usr/local/include] + collapse include dir [/usr/include/x86_64-linux-gnu] ==> [/usr/include/x86_64-linux-gnu] + collapse include dir [/usr/include] ==> [/usr/include] + implicit include dirs: [/usr/include/c++/9;/usr/include/x86_64-linux-gnu/c++/9;/usr/include/c++/9/backward;/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include] + + +Parsed CXX implicit link information from above output: + link line regex: [^( *|.*[/\])(ld|CMAKE_LINK_STARTFILE-NOTFOUND|([^/\]+-)?ld|collect2)[^/\]*( |$)] + ignore line: [Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp] + ignore line: [] + ignore line: [Run Build Command(s):/usr/bin/make cmTC_59ff1/fast && /usr/bin/make -f CMakeFiles/cmTC_59ff1.dir/build.make CMakeFiles/cmTC_59ff1.dir/build] + ignore line: [make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp'] + ignore line: [Building CXX object CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o] + ignore line: [/usr/bin/c++ -v -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -c /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp] + ignore line: [Using built-in specs.] + ignore line: [COLLECT_GCC=/usr/bin/c++] + ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] + ignore line: [OFFLOAD_TARGET_DEFAULT=1] + ignore line: [Target: x86_64-linux-gnu] + ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] + ignore line: [Thread model: posix] + ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] + ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/cc1plus -quiet -v -imultiarch x86_64-linux-gnu -D_GNU_SOURCE /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp -quiet -dumpbase CMakeCXXCompilerABI.cpp -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccETTYVz.s] + ignore line: [GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] + ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] + ignore line: [] + ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] + ignore line: [ignoring duplicate directory "/usr/include/x86_64-linux-gnu/c++/9"] + ignore line: [ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu"] + ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed"] + ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include"] + ignore line: [#include "..." search starts here:] + ignore line: [#include <...> search starts here:] + ignore line: [ /usr/include/c++/9] + ignore line: [ /usr/include/x86_64-linux-gnu/c++/9] + ignore line: [ /usr/include/c++/9/backward] + ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/include] + ignore line: [ /usr/local/include] + ignore line: [ /usr/include/x86_64-linux-gnu] + ignore line: [ /usr/include] + ignore line: [End of search list.] + ignore line: [GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] + ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] + ignore line: [] + ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] + ignore line: [Compiler executable checksum: 3d1eba838554fa2348dba760e4770469] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] + ignore line: [ as -v --64 -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o /tmp/ccETTYVz.s] + ignore line: [GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34] + ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] + ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] + ignore line: [Linking CXX executable cmTC_59ff1] + ignore line: [/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_59ff1.dir/link.txt --verbose=1] + ignore line: [/usr/bin/c++ -v -rdynamic CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -o cmTC_59ff1 ] + ignore line: [Using built-in specs.] + ignore line: [COLLECT_GCC=/usr/bin/c++] + ignore line: [COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] + ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] + ignore line: [OFFLOAD_TARGET_DEFAULT=1] + ignore line: [Target: x86_64-linux-gnu] + ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] + ignore line: [Thread model: posix] + ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] + ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] + ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] + link line: [ /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/cco0EvR4.res -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_59ff1 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -lstdc++ -lm -lgcc_s -lgcc -lc -lgcc_s -lgcc /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] + arg [/usr/lib/gcc/x86_64-linux-gnu/9/collect2] ==> ignore + arg [-plugin] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so] ==> ignore + arg [-plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] ==> ignore + arg [-plugin-opt=-fresolution=/tmp/cco0EvR4.res] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc] ==> ignore + arg [-plugin-opt=-pass-through=-lc] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc] ==> ignore + arg [--build-id] ==> ignore + arg [--eh-frame-hdr] ==> ignore + arg [-m] ==> ignore + arg [elf_x86_64] ==> ignore + arg [--hash-style=gnu] ==> ignore + arg [--as-needed] ==> ignore + arg [-export-dynamic] ==> ignore + arg [-dynamic-linker] ==> ignore + arg [/lib64/ld-linux-x86-64.so.2] ==> ignore + arg [-pie] ==> ignore + arg [-znow] ==> ignore + arg [-zrelro] ==> ignore + arg [-o] ==> ignore + arg [cmTC_59ff1] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o] ==> ignore + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] + arg [-L/lib/x86_64-linux-gnu] ==> dir [/lib/x86_64-linux-gnu] + arg [-L/lib/../lib] ==> dir [/lib/../lib] + arg [-L/usr/lib/x86_64-linux-gnu] ==> dir [/usr/lib/x86_64-linux-gnu] + arg [-L/usr/lib/../lib] ==> dir [/usr/lib/../lib] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] + arg [CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o] ==> ignore + arg [-lstdc++] ==> lib [stdc++] + arg [-lm] ==> lib [m] + arg [-lgcc_s] ==> lib [gcc_s] + arg [-lgcc] ==> lib [gcc] + arg [-lc] ==> lib [c] + arg [-lgcc_s] ==> lib [gcc_s] + arg [-lgcc] ==> lib [gcc] + arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] ==> ignore + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9] ==> [/usr/lib/gcc/x86_64-linux-gnu/9] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> [/usr/lib] + collapse library dir [/lib/x86_64-linux-gnu] ==> [/lib/x86_64-linux-gnu] + collapse library dir [/lib/../lib] ==> [/lib] + collapse library dir [/usr/lib/x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] + collapse library dir [/usr/lib/../lib] ==> [/usr/lib] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> [/usr/lib] + implicit libs: [stdc++;m;gcc_s;gcc;c;gcc_s;gcc] + implicit dirs: [/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib] + implicit fwks: [] + + +Determining if the include file pthread.h exists passed with the following output: +Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp + +Run Build Command(s):/usr/bin/make cmTC_9b3d4/fast && /usr/bin/make -f CMakeFiles/cmTC_9b3d4.dir/build.make CMakeFiles/cmTC_9b3d4.dir/build +make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' +Building C object CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o +/usr/bin/cc -o CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/CheckIncludeFile.c +Linking C executable cmTC_9b3d4 +/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_9b3d4.dir/link.txt --verbose=1 +/usr/bin/cc CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o -o cmTC_9b3d4 +make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' + + + diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/cmake.check_cache b/rad-sim/example-designs/add_multi/CMakeFiles/cmake.check_cache new file mode 100644 index 0000000..3dccd73 --- /dev/null +++ b/rad-sim/example-designs/add_multi/CMakeFiles/cmake.check_cache @@ -0,0 +1 @@ +# This file is generated by cmake for dependency checking of the CMakeCache.txt file diff --git a/rad-sim/example-designs/add_multi/CMakeLists.txt b/rad-sim/example-designs/add_multi/CMakeLists.txt index 1e4621f..c18e37d 100644 --- a/rad-sim/example-designs/add_multi/CMakeLists.txt +++ b/rad-sim/example-designs/add_multi/CMakeLists.txt @@ -27,7 +27,7 @@ set(hdrfiles add_multi_system.hpp ) -add_compile_options(-Wall -Wextra -pedantic) +add_compile_options(-Wall -Wextra -pedantic -g) add_library(design STATIC ${srcfiles} ${hdrfiles}) target_link_libraries(design PUBLIC SystemC::systemc booksim noc) diff --git a/rad-sim/example-designs/add_multi/add.place b/rad-sim/example-designs/add_multi/add.place index 00b186c..73d0cff 100644 --- a/rad-sim/example-designs/add_multi/add.place +++ b/rad-sim/example-designs/add_multi/add.place @@ -1,3 +1,3 @@ adder_inst 0 0 axis -adder_inst2 0 0 axis +adder_inst2 0 1 axis client_inst 0 3 axis diff --git a/rad-sim/example-designs/add_multi/add_driver.cpp b/rad-sim/example-designs/add_multi/add_driver.cpp index 388f289..cdc2553 100644 --- a/rad-sim/example-designs/add_multi/add_driver.cpp +++ b/rad-sim/example-designs/add_multi/add_driver.cpp @@ -15,6 +15,7 @@ add_driver::add_driver(const sc_module_name &name) unsigned int r_num = std::rand() % 10 + 1; std::cout << r_num << " "; numbers_to_send.push(r_num); + numbers_to_send.push(r_num); //ADDED, push twice (one for each adder inst) actual_sum += r_num; } std::cout << std::endl << "----------------------------------------" << std::endl; @@ -25,6 +26,7 @@ add_driver::add_driver(const sc_module_name &name) add_driver::~add_driver() {} +bool local_sel = 0; //ADDED void add_driver::source() { // Reset rst.write(true); @@ -38,6 +40,18 @@ void add_driver::source() { client_tlast.write(numbers_to_send.size() <= 1); client_valid.write(true); + + //ADDED + client_tsel_data.write(local_sel); + client_tsel_valid.write(true); + if (local_sel == 0) { //flip to adder 2 for next number + local_sel = 1; + } + else { //flip to adder 1 for next number + local_sel = 0; + } + + wait(); if (client_valid.read() && client_ready.read()) { @@ -59,5 +73,15 @@ void add_driver::sink() { if (response.read() != actual_sum) std::cout << "FAILURE - Output is not matching!" << std::endl; else std::cout << "SUCCESS - Output is matching!" << std::endl; + //ADDED: + while (!response_valid2.read()) { + wait(); + } + std::cout << "Received " << response2.read().to_uint64() << " sum from the adder2!" << std::endl; + std::cout << "The actual sum is " << actual_sum << std::endl; + + if (response2.read() != actual_sum) std::cout << "FAILURE - Output2 is not matching!" << std::endl; + else std::cout << "SUCCESS - Output2 is matching!" << std::endl; + sc_stop(); } \ No newline at end of file diff --git a/rad-sim/example-designs/add_multi/add_driver.hpp b/rad-sim/example-designs/add_multi/add_driver.hpp index baae941..9d0dc64 100644 --- a/rad-sim/example-designs/add_multi/add_driver.hpp +++ b/rad-sim/example-designs/add_multi/add_driver.hpp @@ -22,6 +22,12 @@ class add_driver : public sc_module { sc_in client_ready; sc_in> response; sc_in response_valid; + //ADDED: + sc_in> response2; + sc_in response_valid2; + sc_out client_tsel_data; + sc_out client_tsel_valid; + add_driver(const sc_module_name &name); ~add_driver(); diff --git a/rad-sim/example-designs/add_multi/add_multi_system.cpp b/rad-sim/example-designs/add_multi/add_multi_system.cpp index 124126c..a6c4076 100644 --- a/rad-sim/example-designs/add_multi/add_multi_system.cpp +++ b/rad-sim/example-designs/add_multi/add_multi_system.cpp @@ -13,6 +13,8 @@ add_multi_system::add_multi_system(const sc_module_name &name, sc_clock *driver_ driver_inst->client_ready(client_ready_sig); driver_inst->response(response_sig); driver_inst->response_valid(response_valid_sig); + driver_inst->response2(response_sig2); + driver_inst->response_valid2(response_valid_sig2); // Instantiate design top-level dut_inst = new add_top("dut"); @@ -23,6 +25,9 @@ add_multi_system::add_multi_system(const sc_module_name &name, sc_clock *driver_ dut_inst->client_ready(client_ready_sig); dut_inst->response(response_sig); dut_inst->response_valid(response_valid_sig); + //for adder_inst2 + dut_inst->response2(response_sig2); + dut_inst->response_valid2(response_valid_sig2); } add_multi_system::~add_multi_system() { diff --git a/rad-sim/example-designs/add_multi/add_multi_system.hpp b/rad-sim/example-designs/add_multi/add_multi_system.hpp index 2f27bd7..af8916e 100644 --- a/rad-sim/example-designs/add_multi/add_multi_system.hpp +++ b/rad-sim/example-designs/add_multi/add_multi_system.hpp @@ -13,6 +13,9 @@ class add_multi_system : public sc_module { sc_signal client_ready_sig; sc_signal> response_sig; sc_signal response_valid_sig; + //for adder_inst2 + sc_signal> response_sig2; + sc_signal response_valid_sig2; public: sc_signal rst_sig; diff --git a/rad-sim/example-designs/add_multi/add_top.cpp b/rad-sim/example-designs/add_multi/add_top.cpp index c262a01..f309f52 100644 --- a/rad-sim/example-designs/add_multi/add_top.cpp +++ b/rad-sim/example-designs/add_multi/add_top.cpp @@ -27,8 +27,8 @@ add_top::add_top(const sc_module_name &name) std::strcpy(module_name, module_name_str.c_str()); adder_inst2 = new adder(module_name); adder_inst2->rst(rst); - adder_inst2->response(response); - adder_inst2->response_valid(response_valid); + adder_inst2->response(response2); + adder_inst2->response_valid(response_valid2); radsim_design.BuildDesignContext("add.place", "add.clks"); diff --git a/rad-sim/example-designs/add_multi/add_top.hpp b/rad-sim/example-designs/add_multi/add_top.hpp index 3c168d7..23ceb21 100644 --- a/rad-sim/example-designs/add_multi/add_top.hpp +++ b/rad-sim/example-designs/add_multi/add_top.hpp @@ -22,6 +22,9 @@ class add_top : public sc_module { sc_out> response; sc_out response_valid; + sc_out> response2; //for adder_inst2 + sc_out response_valid2; //for adder_inst2 + add_top(const sc_module_name &name); ~add_top(); }; diff --git a/rad-sim/example-designs/add_multi/modules/client.cpp b/rad-sim/example-designs/add_multi/modules/client.cpp index 24c13e2..ec62987 100644 --- a/rad-sim/example-designs/add_multi/modules/client.cpp +++ b/rad-sim/example-designs/add_multi/modules/client.cpp @@ -4,6 +4,7 @@ client::client(const sc_module_name &name, unsigned int fifo_depth) : RADSimModule(name) { client_fifo_depth = fifo_depth; + client_tsel_fifo_depth = fifo_depth; //ADDED // Combinational logic and its sensitivity list SC_METHOD(Assign); @@ -36,6 +37,12 @@ void client::Tick() { client_tdata_fifo.pop(); } client_fifo_full.write(false); + //ADDED: + while (!client_tsel_fifo.empty()) { + client_tsel_fifo.pop(); + } + client_tsel_fifo_full.write(false); + wait(); std::string src_port_name = module_name + ".axis_client_interface"; @@ -47,14 +54,26 @@ void client::Tick() { client_tdata_fifo.push(client_tdata); testbench_tlast = client_tlast.read(); std::cout << module_name << ": Pushed request to FIFO" << std::endl; + client_tsel_fifo.push(client_tsel_data); //ADDED } client_fifo_full.write(client_tdata_fifo.size() >= client_fifo_depth); + client_tsel_fifo_full.write(client_tsel_fifo.size() >= client_tsel_fifo_depth); //ADDED // Sending transactions to AXI-S NoC if (!client_tdata_fifo.empty()) { sc_bv tdata = client_tdata_fifo.front(); + bool tsel_data = client_tsel_fifo.front(); //ADDED std::string dst_port_name = "adder_inst.axis_adder_interface"; - uint64_t dst_addr = radsim_design.GetPortDestinationID(dst_port_name); + //ADDED: + std::string dst_port_name2 = "adder_inst2.axis_adder_interface"; + uint64_t dst_addr; + if (tsel_data == 0) { + dst_addr = radsim_design.GetPortDestinationID(dst_port_name); + } + else if (tsel_data == 1) { + dst_addr = radsim_design.GetPortDestinationID(dst_port_name2); + } + uint64_t src_addr = radsim_design.GetPortDestinationID(src_port_name); axis_client_interface.tdest.write(dst_addr); @@ -73,6 +92,7 @@ void client::Tick() { if (axis_client_interface.tvalid.read() && axis_client_interface.tready.read()) { client_tdata_fifo.pop(); + client_tsel_fifo.pop(); //ADDED std::cout << module_name << ": Sent Transaction!" << std::endl; } wait(); diff --git a/rad-sim/example-designs/add_multi/modules/client.hpp b/rad-sim/example-designs/add_multi/modules/client.hpp index c08e0cb..3c9430a 100644 --- a/rad-sim/example-designs/add_multi/modules/client.hpp +++ b/rad-sim/example-designs/add_multi/modules/client.hpp @@ -18,6 +18,11 @@ class client : public RADSimModule { sc_signal client_fifo_full; // Signal flagging addend FIFO is full bool testbench_tlast; + //ADDED: + std::queue client_tsel_fifo; // FIFO to store which adder inst + unsigned int client_tsel_fifo_depth; // MAXIMUM number of addends to store in FIFO + sc_signal client_tsel_fifo_full; // Signal flagging addend FIFO is full + public: sc_in rst; // Interface to driver logic @@ -28,6 +33,10 @@ class client : public RADSimModule { // Interface to the NoC axis_master_port axis_client_interface; + //ADDED: + sc_in client_tsel_data; + sc_in client_tsel_valid; + client(const sc_module_name &name, unsigned int fifo_depth); ~client(); From c76613ccfd3b928e29fbe1869790c406ce347845 Mon Sep 17 00:00:00 2001 From: Andrew Boutros Date: Mon, 20 Nov 2023 11:01:46 -0500 Subject: [PATCH 003/127] Segfault fixes: (1) design name in config.yml has to match the design directory name, (2) client_tsel_data and client_tsel_valid were left unconnected --- rad-sim/example-designs/add_multi/add_multi_system.cpp | 4 ++++ rad-sim/example-designs/add_multi/add_multi_system.hpp | 2 ++ rad-sim/example-designs/add_multi/add_top.cpp | 2 ++ rad-sim/example-designs/add_multi/add_top.hpp | 2 ++ rad-sim/example-designs/add_multi/config.yml | 2 +- rad-sim/sim/main.cpp | 4 ++-- rad-sim/sim/radsim_knobs | 6 +++--- 7 files changed, 16 insertions(+), 6 deletions(-) diff --git a/rad-sim/example-designs/add_multi/add_multi_system.cpp b/rad-sim/example-designs/add_multi/add_multi_system.cpp index a6c4076..0f37e79 100644 --- a/rad-sim/example-designs/add_multi/add_multi_system.cpp +++ b/rad-sim/example-designs/add_multi/add_multi_system.cpp @@ -11,6 +11,8 @@ add_multi_system::add_multi_system(const sc_module_name &name, sc_clock *driver_ driver_inst->client_tlast(client_tlast_sig); driver_inst->client_valid(client_valid_sig); driver_inst->client_ready(client_ready_sig); + driver_inst->client_tsel_data(client_tsel_data_sig); + driver_inst->client_tsel_valid(client_tsel_valid_sig); driver_inst->response(response_sig); driver_inst->response_valid(response_valid_sig); driver_inst->response2(response_sig2); @@ -23,6 +25,8 @@ add_multi_system::add_multi_system(const sc_module_name &name, sc_clock *driver_ dut_inst->client_tlast(client_tlast_sig); dut_inst->client_valid(client_valid_sig); dut_inst->client_ready(client_ready_sig); + dut_inst->client_tsel_data(client_tsel_data_sig); + dut_inst->client_tsel_valid(client_tsel_valid_sig); dut_inst->response(response_sig); dut_inst->response_valid(response_valid_sig); //for adder_inst2 diff --git a/rad-sim/example-designs/add_multi/add_multi_system.hpp b/rad-sim/example-designs/add_multi/add_multi_system.hpp index af8916e..0236501 100644 --- a/rad-sim/example-designs/add_multi/add_multi_system.hpp +++ b/rad-sim/example-designs/add_multi/add_multi_system.hpp @@ -11,6 +11,8 @@ class add_multi_system : public sc_module { sc_signal client_tlast_sig; sc_signal client_valid_sig; sc_signal client_ready_sig; + sc_signal client_tsel_data_sig; + sc_signal client_tsel_valid_sig; sc_signal> response_sig; sc_signal response_valid_sig; //for adder_inst2 diff --git a/rad-sim/example-designs/add_multi/add_top.cpp b/rad-sim/example-designs/add_multi/add_top.cpp index f309f52..4318939 100644 --- a/rad-sim/example-designs/add_multi/add_top.cpp +++ b/rad-sim/example-designs/add_multi/add_top.cpp @@ -15,6 +15,8 @@ add_top::add_top(const sc_module_name &name) client_inst->client_tlast(client_tlast); client_inst->client_valid(client_valid); client_inst->client_ready(client_ready); + client_inst->client_tsel_data(client_tsel_data); + client_inst->client_tsel_valid(client_tsel_valid); module_name_str = "adder_inst"; std::strcpy(module_name, module_name_str.c_str()); diff --git a/rad-sim/example-designs/add_multi/add_top.hpp b/rad-sim/example-designs/add_multi/add_top.hpp index 23ceb21..cbd5a23 100644 --- a/rad-sim/example-designs/add_multi/add_top.hpp +++ b/rad-sim/example-designs/add_multi/add_top.hpp @@ -19,6 +19,8 @@ class add_top : public sc_module { sc_in client_tlast; sc_in client_valid; sc_out client_ready; + sc_in client_tsel_data; + sc_in client_tsel_valid; sc_out> response; sc_out response_valid; diff --git a/rad-sim/example-designs/add_multi/config.yml b/rad-sim/example-designs/add_multi/config.yml index 24749d8..5025f05 100644 --- a/rad-sim/example-designs/add_multi/config.yml +++ b/rad-sim/example-designs/add_multi/config.yml @@ -28,7 +28,7 @@ noc_adapters: vc_mapping: ['direct'] design: - name: 'add' + name: 'add_multi' # Must match the design directory name under rad-sim/example-designs/ noc_placement: ['add.place'] clk_periods: [5.0] diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index e08ed93..76fba7b 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -5,7 +5,7 @@ #include #include -#include +#include RADSimConfig radsim_config; RADSimDesignContext radsim_design; @@ -24,7 +24,7 @@ int sc_main(int argc, char *argv[]) { sc_clock *driver_clk_sig = new sc_clock( "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); - mlp_system *system = new mlp_system("mlp_system", driver_clk_sig); + add_multi_system *system = new add_multi_system("add_multi_system", driver_clk_sig); sc_start(); delete system; diff --git a/rad-sim/sim/radsim_knobs b/rad-sim/sim/radsim_knobs index 174e2ac..8356548 100644 --- a/rad-sim/sim/radsim_knobs +++ b/rad-sim/sim/radsim_knobs @@ -1,11 +1,11 @@ radsim_root_dir /home/andrew/rad-flow/rad-sim -design_name mlp +design_name add_multi noc_num_nocs 1 noc_clk_period 1.0 noc_vcs 5 noc_payload_width 166 noc_num_nodes 16 -design_noc_placement mlp.place +design_noc_placement add.place noc_adapters_clk_period 1.25 noc_adapters_fifo_size 16 noc_adapters_obuff_size 2 @@ -20,4 +20,4 @@ dram_num_controllers 0 dram_clk_periods 2.0 dram_queue_sizes 64 dram_config_files HBM2_8Gb_x128 -radsim_user_design_root_dir /home/andrew/rad-flow/rad-sim/example-designs/mlp +radsim_user_design_root_dir /home/andrew/rad-flow/rad-sim/example-designs/add_multi From b4f512efdef576d5574cc491c388ba9a21c9a78a Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 28 Nov 2023 00:43:30 -0500 Subject: [PATCH 004/127] Added support for passing in multiple design contexts and creating multiple RAD systems. Modified add example-design to successfully run on multiple systems --- rad-sim/example-designs/add/CMakeCache.txt | 379 ++++++++++ .../CMakeFiles/3.16.3/CMakeCCompiler.cmake | 76 ++ .../CMakeFiles/3.16.3/CMakeCXXCompiler.cmake | 88 +++ .../3.16.3/CMakeDetermineCompilerABI_C.bin | Bin 0 -> 16552 bytes .../3.16.3/CMakeDetermineCompilerABI_CXX.bin | Bin 0 -> 16560 bytes .../add/CMakeFiles/3.16.3/CMakeSystem.cmake | 15 + .../3.16.3/CompilerIdC/CMakeCCompilerId.c | 671 ++++++++++++++++++ .../add/CMakeFiles/3.16.3/CompilerIdC/a.out | Bin 0 -> 16712 bytes .../CompilerIdCXX/CMakeCXXCompilerId.cpp | 660 +++++++++++++++++ .../add/CMakeFiles/3.16.3/CompilerIdCXX/a.out | Bin 0 -> 16720 bytes .../add/CMakeFiles/CMakeError.log | 40 ++ .../add/CMakeFiles/CMakeOutput.log | 477 +++++++++++++ .../add/CMakeFiles/cmake.check_cache | 1 + rad-sim/example-designs/add/add_system.cpp | 4 +- rad-sim/example-designs/add/add_system.hpp | 2 +- rad-sim/example-designs/add/add_top.cpp | 14 +- rad-sim/example-designs/add/add_top.hpp | 2 +- rad-sim/example-designs/add/modules/adder.cpp | 4 +- rad-sim/example-designs/add/modules/adder.hpp | 2 +- .../example-designs/add/modules/client.cpp | 10 +- .../example-designs/add/modules/client.hpp | 4 +- rad-sim/sim/design_context.cpp | 3 +- rad-sim/sim/design_context.hpp | 2 +- rad-sim/sim/dram/mem_controller.cpp | 4 +- rad-sim/sim/dram/mem_controller.hpp | 4 +- rad-sim/sim/dram/mem_controller_test.cpp | 10 +- rad-sim/sim/dram/mem_controller_test.hpp | 6 +- rad-sim/sim/main.cpp | 18 +- rad-sim/sim/noc/radsim_noc.cpp | 27 +- rad-sim/sim/noc/radsim_noc.hpp | 6 +- rad-sim/sim/radsim_defines.hpp | 2 +- rad-sim/sim/radsim_knobs | 6 +- rad-sim/sim/radsim_module.cpp | 6 +- rad-sim/sim/radsim_module.hpp | 6 +- 34 files changed, 2494 insertions(+), 55 deletions(-) create mode 100644 rad-sim/example-designs/add/CMakeCache.txt create mode 100644 rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeCCompiler.cmake create mode 100644 rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake create mode 100755 rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin create mode 100755 rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin create mode 100644 rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeSystem.cmake create mode 100644 rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c create mode 100755 rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/a.out create mode 100644 rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdCXX/CMakeCXXCompilerId.cpp create mode 100755 rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdCXX/a.out create mode 100644 rad-sim/example-designs/add/CMakeFiles/CMakeError.log create mode 100644 rad-sim/example-designs/add/CMakeFiles/CMakeOutput.log create mode 100644 rad-sim/example-designs/add/CMakeFiles/cmake.check_cache diff --git a/rad-sim/example-designs/add/CMakeCache.txt b/rad-sim/example-designs/add/CMakeCache.txt new file mode 100644 index 0000000..acd6ebb --- /dev/null +++ b/rad-sim/example-designs/add/CMakeCache.txt @@ -0,0 +1,379 @@ +# This is the CMakeCache file. +# For build in directory: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add +# It was generated by CMake: /usr/bin/cmake +# You can edit this file to change values found and used by cmake. +# If you do not want to change any of the values, simply exit the editor. +# If you do want to change a value, simply edit, save, and exit the editor. +# The syntax for the file is as follows: +# KEY:TYPE=VALUE +# KEY is the name of a variable in the cache. +# TYPE is a hint to GUIs for the type of VALUE, DO NOT EDIT TYPE!. +# VALUE is the current value for the KEY. + +######################## +# EXTERNAL cache entries +######################## + +//Path to a program. +CMAKE_ADDR2LINE:FILEPATH=/usr/bin/addr2line + +//Path to a program. +CMAKE_AR:FILEPATH=/usr/bin/ar + +//Choose the type of build, options are: None Debug Release RelWithDebInfo +// MinSizeRel ... +CMAKE_BUILD_TYPE:STRING= + +//Enable/Disable color output during build. +CMAKE_COLOR_MAKEFILE:BOOL=ON + +//CXX compiler +CMAKE_CXX_COMPILER:FILEPATH=/usr/bin/c++ + +//A wrapper around 'ar' adding the appropriate '--plugin' option +// for the GCC compiler +CMAKE_CXX_COMPILER_AR:FILEPATH=/usr/bin/gcc-ar-9 + +//A wrapper around 'ranlib' adding the appropriate '--plugin' option +// for the GCC compiler +CMAKE_CXX_COMPILER_RANLIB:FILEPATH=/usr/bin/gcc-ranlib-9 + +//Flags used by the CXX compiler during all build types. +CMAKE_CXX_FLAGS:STRING= + +//Flags used by the CXX compiler during DEBUG builds. +CMAKE_CXX_FLAGS_DEBUG:STRING=-g + +//Flags used by the CXX compiler during MINSIZEREL builds. +CMAKE_CXX_FLAGS_MINSIZEREL:STRING=-Os -DNDEBUG + +//Flags used by the CXX compiler during RELEASE builds. +CMAKE_CXX_FLAGS_RELEASE:STRING=-O3 -DNDEBUG + +//Flags used by the CXX compiler during RELWITHDEBINFO builds. +CMAKE_CXX_FLAGS_RELWITHDEBINFO:STRING=-O2 -g -DNDEBUG + +//C compiler +CMAKE_C_COMPILER:FILEPATH=/usr/bin/cc + +//A wrapper around 'ar' adding the appropriate '--plugin' option +// for the GCC compiler +CMAKE_C_COMPILER_AR:FILEPATH=/usr/bin/gcc-ar-9 + +//A wrapper around 'ranlib' adding the appropriate '--plugin' option +// for the GCC compiler +CMAKE_C_COMPILER_RANLIB:FILEPATH=/usr/bin/gcc-ranlib-9 + +//Flags used by the C compiler during all build types. +CMAKE_C_FLAGS:STRING= + +//Flags used by the C compiler during DEBUG builds. +CMAKE_C_FLAGS_DEBUG:STRING=-g + +//Flags used by the C compiler during MINSIZEREL builds. +CMAKE_C_FLAGS_MINSIZEREL:STRING=-Os -DNDEBUG + +//Flags used by the C compiler during RELEASE builds. +CMAKE_C_FLAGS_RELEASE:STRING=-O3 -DNDEBUG + +//Flags used by the C compiler during RELWITHDEBINFO builds. +CMAKE_C_FLAGS_RELWITHDEBINFO:STRING=-O2 -g -DNDEBUG + +//Path to a program. +CMAKE_DLLTOOL:FILEPATH=CMAKE_DLLTOOL-NOTFOUND + +//Flags used by the linker during all build types. +CMAKE_EXE_LINKER_FLAGS:STRING= + +//Flags used by the linker during DEBUG builds. +CMAKE_EXE_LINKER_FLAGS_DEBUG:STRING= + +//Flags used by the linker during MINSIZEREL builds. +CMAKE_EXE_LINKER_FLAGS_MINSIZEREL:STRING= + +//Flags used by the linker during RELEASE builds. +CMAKE_EXE_LINKER_FLAGS_RELEASE:STRING= + +//Flags used by the linker during RELWITHDEBINFO builds. +CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO:STRING= + +//Enable/Disable output of compile commands during generation. +CMAKE_EXPORT_COMPILE_COMMANDS:BOOL=OFF + +//Install path prefix, prepended onto install directories. +CMAKE_INSTALL_PREFIX:PATH=/usr/local + +//Path to a program. +CMAKE_LINKER:FILEPATH=/usr/bin/ld + +//Path to a program. +CMAKE_MAKE_PROGRAM:FILEPATH=/usr/bin/make + +//Flags used by the linker during the creation of modules during +// all build types. +CMAKE_MODULE_LINKER_FLAGS:STRING= + +//Flags used by the linker during the creation of modules during +// DEBUG builds. +CMAKE_MODULE_LINKER_FLAGS_DEBUG:STRING= + +//Flags used by the linker during the creation of modules during +// MINSIZEREL builds. +CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL:STRING= + +//Flags used by the linker during the creation of modules during +// RELEASE builds. +CMAKE_MODULE_LINKER_FLAGS_RELEASE:STRING= + +//Flags used by the linker during the creation of modules during +// RELWITHDEBINFO builds. +CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO:STRING= + +//Path to a program. +CMAKE_NM:FILEPATH=/usr/bin/nm + +//Path to a program. +CMAKE_OBJCOPY:FILEPATH=/usr/bin/objcopy + +//Path to a program. +CMAKE_OBJDUMP:FILEPATH=/usr/bin/objdump + +//Value Computed by CMake +CMAKE_PROJECT_DESCRIPTION:STATIC= + +//Value Computed by CMake +CMAKE_PROJECT_HOMEPAGE_URL:STATIC= + +//Value Computed by CMake +CMAKE_PROJECT_NAME:STATIC=Project + +//Path to a program. +CMAKE_RANLIB:FILEPATH=/usr/bin/ranlib + +//Path to a program. +CMAKE_READELF:FILEPATH=/usr/bin/readelf + +//Flags used by the linker during the creation of shared libraries +// during all build types. +CMAKE_SHARED_LINKER_FLAGS:STRING= + +//Flags used by the linker during the creation of shared libraries +// during DEBUG builds. +CMAKE_SHARED_LINKER_FLAGS_DEBUG:STRING= + +//Flags used by the linker during the creation of shared libraries +// during MINSIZEREL builds. +CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL:STRING= + +//Flags used by the linker during the creation of shared libraries +// during RELEASE builds. +CMAKE_SHARED_LINKER_FLAGS_RELEASE:STRING= + +//Flags used by the linker during the creation of shared libraries +// during RELWITHDEBINFO builds. +CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO:STRING= + +//If set, runtime paths are not added when installing shared libraries, +// but are added when building. +CMAKE_SKIP_INSTALL_RPATH:BOOL=NO + +//If set, runtime paths are not added when using shared libraries. +CMAKE_SKIP_RPATH:BOOL=NO + +//Flags used by the linker during the creation of static libraries +// during all build types. +CMAKE_STATIC_LINKER_FLAGS:STRING= + +//Flags used by the linker during the creation of static libraries +// during DEBUG builds. +CMAKE_STATIC_LINKER_FLAGS_DEBUG:STRING= + +//Flags used by the linker during the creation of static libraries +// during MINSIZEREL builds. +CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL:STRING= + +//Flags used by the linker during the creation of static libraries +// during RELEASE builds. +CMAKE_STATIC_LINKER_FLAGS_RELEASE:STRING= + +//Flags used by the linker during the creation of static libraries +// during RELWITHDEBINFO builds. +CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO:STRING= + +//Path to a program. +CMAKE_STRIP:FILEPATH=/usr/bin/strip + +//If this value is on, makefiles will be generated without the +// .SILENT directive, and all commands will be echoed to the console +// during the make. This is useful for debugging only. With Visual +// Studio IDE projects all commands are done without /nologo. +CMAKE_VERBOSE_MAKEFILE:BOOL=FALSE + +//Value Computed by CMake +Project_BINARY_DIR:STATIC=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add + +//Value Computed by CMake +Project_SOURCE_DIR:STATIC=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs + +//The directory containing a CMake configuration file for SystemCLanguage. +SystemCLanguage_DIR:PATH=/home/bassiabn/rad-sim/systemc-2.3.4/build + + +######################## +# INTERNAL cache entries +######################## + +//ADVANCED property for variable: CMAKE_ADDR2LINE +CMAKE_ADDR2LINE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_AR +CMAKE_AR-ADVANCED:INTERNAL=1 +//This is the directory where this CMakeCache.txt was created +CMAKE_CACHEFILE_DIR:INTERNAL=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add +//Major version of cmake used to create the current loaded cache +CMAKE_CACHE_MAJOR_VERSION:INTERNAL=3 +//Minor version of cmake used to create the current loaded cache +CMAKE_CACHE_MINOR_VERSION:INTERNAL=16 +//Patch version of cmake used to create the current loaded cache +CMAKE_CACHE_PATCH_VERSION:INTERNAL=3 +//ADVANCED property for variable: CMAKE_COLOR_MAKEFILE +CMAKE_COLOR_MAKEFILE-ADVANCED:INTERNAL=1 +//Path to CMake executable. +CMAKE_COMMAND:INTERNAL=/usr/bin/cmake +//Path to cpack program executable. +CMAKE_CPACK_COMMAND:INTERNAL=/usr/bin/cpack +//Path to ctest program executable. +CMAKE_CTEST_COMMAND:INTERNAL=/usr/bin/ctest +//ADVANCED property for variable: CMAKE_CXX_COMPILER +CMAKE_CXX_COMPILER-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_COMPILER_AR +CMAKE_CXX_COMPILER_AR-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_COMPILER_RANLIB +CMAKE_CXX_COMPILER_RANLIB-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_FLAGS +CMAKE_CXX_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_FLAGS_DEBUG +CMAKE_CXX_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_FLAGS_MINSIZEREL +CMAKE_CXX_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_FLAGS_RELEASE +CMAKE_CXX_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_FLAGS_RELWITHDEBINFO +CMAKE_CXX_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_COMPILER +CMAKE_C_COMPILER-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_COMPILER_AR +CMAKE_C_COMPILER_AR-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_COMPILER_RANLIB +CMAKE_C_COMPILER_RANLIB-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_FLAGS +CMAKE_C_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_FLAGS_DEBUG +CMAKE_C_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_FLAGS_MINSIZEREL +CMAKE_C_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_FLAGS_RELEASE +CMAKE_C_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_FLAGS_RELWITHDEBINFO +CMAKE_C_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_DLLTOOL +CMAKE_DLLTOOL-ADVANCED:INTERNAL=1 +//Path to cache edit program executable. +CMAKE_EDIT_COMMAND:INTERNAL=/usr/bin/ccmake +//Executable file format +CMAKE_EXECUTABLE_FORMAT:INTERNAL=ELF +//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS +CMAKE_EXE_LINKER_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_DEBUG +CMAKE_EXE_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_MINSIZEREL +CMAKE_EXE_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_RELEASE +CMAKE_EXE_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO +CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_EXPORT_COMPILE_COMMANDS +CMAKE_EXPORT_COMPILE_COMMANDS-ADVANCED:INTERNAL=1 +//Name of external makefile project generator. +CMAKE_EXTRA_GENERATOR:INTERNAL= +//Name of generator. +CMAKE_GENERATOR:INTERNAL=Unix Makefiles +//Generator instance identifier. +CMAKE_GENERATOR_INSTANCE:INTERNAL= +//Name of generator platform. +CMAKE_GENERATOR_PLATFORM:INTERNAL= +//Name of generator toolset. +CMAKE_GENERATOR_TOOLSET:INTERNAL= +//Test CMAKE_HAVE_LIBC_PTHREAD +CMAKE_HAVE_LIBC_PTHREAD:INTERNAL= +//Have include pthread.h +CMAKE_HAVE_PTHREAD_H:INTERNAL=1 +//Source directory with the top level CMakeLists.txt file for this +// project +CMAKE_HOME_DIRECTORY:INTERNAL=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs +//Install .so files without execute permission. +CMAKE_INSTALL_SO_NO_EXE:INTERNAL=1 +//ADVANCED property for variable: CMAKE_LINKER +CMAKE_LINKER-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MAKE_PROGRAM +CMAKE_MAKE_PROGRAM-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS +CMAKE_MODULE_LINKER_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_DEBUG +CMAKE_MODULE_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL +CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_RELEASE +CMAKE_MODULE_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO +CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_NM +CMAKE_NM-ADVANCED:INTERNAL=1 +//number of local generators +CMAKE_NUMBER_OF_MAKEFILES:INTERNAL=1 +//ADVANCED property for variable: CMAKE_OBJCOPY +CMAKE_OBJCOPY-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_OBJDUMP +CMAKE_OBJDUMP-ADVANCED:INTERNAL=1 +//Platform information initialized +CMAKE_PLATFORM_INFO_INITIALIZED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_RANLIB +CMAKE_RANLIB-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_READELF +CMAKE_READELF-ADVANCED:INTERNAL=1 +//Path to CMake installation. +CMAKE_ROOT:INTERNAL=/usr/share/cmake-3.16 +//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS +CMAKE_SHARED_LINKER_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_DEBUG +CMAKE_SHARED_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL +CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_RELEASE +CMAKE_SHARED_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO +CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SKIP_INSTALL_RPATH +CMAKE_SKIP_INSTALL_RPATH-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SKIP_RPATH +CMAKE_SKIP_RPATH-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS +CMAKE_STATIC_LINKER_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_DEBUG +CMAKE_STATIC_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL +CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_RELEASE +CMAKE_STATIC_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO +CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STRIP +CMAKE_STRIP-ADVANCED:INTERNAL=1 +//uname command +CMAKE_UNAME:INTERNAL=/usr/bin/uname +//ADVANCED property for variable: CMAKE_VERBOSE_MAKEFILE +CMAKE_VERBOSE_MAKEFILE-ADVANCED:INTERNAL=1 +//Details about finding Threads +FIND_PACKAGE_MESSAGE_DETAILS_Threads:INTERNAL=[TRUE][v()] +//Result of TRY_COMPILE +THREADS_HAVE_PTHREAD_ARG:INTERNAL=TRUE + diff --git a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeCCompiler.cmake b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeCCompiler.cmake new file mode 100644 index 0000000..c5ece7b --- /dev/null +++ b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeCCompiler.cmake @@ -0,0 +1,76 @@ +set(CMAKE_C_COMPILER "/usr/bin/cc") +set(CMAKE_C_COMPILER_ARG1 "") +set(CMAKE_C_COMPILER_ID "GNU") +set(CMAKE_C_COMPILER_VERSION "9.4.0") +set(CMAKE_C_COMPILER_VERSION_INTERNAL "") +set(CMAKE_C_COMPILER_WRAPPER "") +set(CMAKE_C_STANDARD_COMPUTED_DEFAULT "11") +set(CMAKE_C_COMPILE_FEATURES "c_std_90;c_function_prototypes;c_std_99;c_restrict;c_variadic_macros;c_std_11;c_static_assert") +set(CMAKE_C90_COMPILE_FEATURES "c_std_90;c_function_prototypes") +set(CMAKE_C99_COMPILE_FEATURES "c_std_99;c_restrict;c_variadic_macros") +set(CMAKE_C11_COMPILE_FEATURES "c_std_11;c_static_assert") + +set(CMAKE_C_PLATFORM_ID "Linux") +set(CMAKE_C_SIMULATE_ID "") +set(CMAKE_C_COMPILER_FRONTEND_VARIANT "") +set(CMAKE_C_SIMULATE_VERSION "") + + + +set(CMAKE_AR "/usr/bin/ar") +set(CMAKE_C_COMPILER_AR "/usr/bin/gcc-ar-9") +set(CMAKE_RANLIB "/usr/bin/ranlib") +set(CMAKE_C_COMPILER_RANLIB "/usr/bin/gcc-ranlib-9") +set(CMAKE_LINKER "/usr/bin/ld") +set(CMAKE_MT "") +set(CMAKE_COMPILER_IS_GNUCC 1) +set(CMAKE_C_COMPILER_LOADED 1) +set(CMAKE_C_COMPILER_WORKS TRUE) +set(CMAKE_C_ABI_COMPILED TRUE) +set(CMAKE_COMPILER_IS_MINGW ) +set(CMAKE_COMPILER_IS_CYGWIN ) +if(CMAKE_COMPILER_IS_CYGWIN) + set(CYGWIN 1) + set(UNIX 1) +endif() + +set(CMAKE_C_COMPILER_ENV_VAR "CC") + +if(CMAKE_COMPILER_IS_MINGW) + set(MINGW 1) +endif() +set(CMAKE_C_COMPILER_ID_RUN 1) +set(CMAKE_C_SOURCE_FILE_EXTENSIONS c;m) +set(CMAKE_C_IGNORE_EXTENSIONS h;H;o;O;obj;OBJ;def;DEF;rc;RC) +set(CMAKE_C_LINKER_PREFERENCE 10) + +# Save compiler ABI information. +set(CMAKE_C_SIZEOF_DATA_PTR "8") +set(CMAKE_C_COMPILER_ABI "ELF") +set(CMAKE_C_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") + +if(CMAKE_C_SIZEOF_DATA_PTR) + set(CMAKE_SIZEOF_VOID_P "${CMAKE_C_SIZEOF_DATA_PTR}") +endif() + +if(CMAKE_C_COMPILER_ABI) + set(CMAKE_INTERNAL_PLATFORM_ABI "${CMAKE_C_COMPILER_ABI}") +endif() + +if(CMAKE_C_LIBRARY_ARCHITECTURE) + set(CMAKE_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") +endif() + +set(CMAKE_C_CL_SHOWINCLUDES_PREFIX "") +if(CMAKE_C_CL_SHOWINCLUDES_PREFIX) + set(CMAKE_CL_SHOWINCLUDES_PREFIX "${CMAKE_C_CL_SHOWINCLUDES_PREFIX}") +endif() + + + + + +set(CMAKE_C_IMPLICIT_INCLUDE_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include") +set(CMAKE_C_IMPLICIT_LINK_LIBRARIES "gcc;gcc_s;c;gcc;gcc_s") +set(CMAKE_C_IMPLICIT_LINK_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib") +set(CMAKE_C_IMPLICIT_LINK_FRAMEWORK_DIRECTORIES "") diff --git a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake new file mode 100644 index 0000000..278ef39 --- /dev/null +++ b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake @@ -0,0 +1,88 @@ +set(CMAKE_CXX_COMPILER "/usr/bin/c++") +set(CMAKE_CXX_COMPILER_ARG1 "") +set(CMAKE_CXX_COMPILER_ID "GNU") +set(CMAKE_CXX_COMPILER_VERSION "9.4.0") +set(CMAKE_CXX_COMPILER_VERSION_INTERNAL "") +set(CMAKE_CXX_COMPILER_WRAPPER "") +set(CMAKE_CXX_STANDARD_COMPUTED_DEFAULT "14") +set(CMAKE_CXX_COMPILE_FEATURES "cxx_std_98;cxx_template_template_parameters;cxx_std_11;cxx_alias_templates;cxx_alignas;cxx_alignof;cxx_attributes;cxx_auto_type;cxx_constexpr;cxx_decltype;cxx_decltype_incomplete_return_types;cxx_default_function_template_args;cxx_defaulted_functions;cxx_defaulted_move_initializers;cxx_delegating_constructors;cxx_deleted_functions;cxx_enum_forward_declarations;cxx_explicit_conversions;cxx_extended_friend_declarations;cxx_extern_templates;cxx_final;cxx_func_identifier;cxx_generalized_initializers;cxx_inheriting_constructors;cxx_inline_namespaces;cxx_lambdas;cxx_local_type_template_args;cxx_long_long_type;cxx_noexcept;cxx_nonstatic_member_init;cxx_nullptr;cxx_override;cxx_range_for;cxx_raw_string_literals;cxx_reference_qualified_functions;cxx_right_angle_brackets;cxx_rvalue_references;cxx_sizeof_member;cxx_static_assert;cxx_strong_enums;cxx_thread_local;cxx_trailing_return_types;cxx_unicode_literals;cxx_uniform_initialization;cxx_unrestricted_unions;cxx_user_literals;cxx_variadic_macros;cxx_variadic_templates;cxx_std_14;cxx_aggregate_default_initializers;cxx_attribute_deprecated;cxx_binary_literals;cxx_contextual_conversions;cxx_decltype_auto;cxx_digit_separators;cxx_generic_lambdas;cxx_lambda_init_captures;cxx_relaxed_constexpr;cxx_return_type_deduction;cxx_variable_templates;cxx_std_17;cxx_std_20") +set(CMAKE_CXX98_COMPILE_FEATURES "cxx_std_98;cxx_template_template_parameters") +set(CMAKE_CXX11_COMPILE_FEATURES "cxx_std_11;cxx_alias_templates;cxx_alignas;cxx_alignof;cxx_attributes;cxx_auto_type;cxx_constexpr;cxx_decltype;cxx_decltype_incomplete_return_types;cxx_default_function_template_args;cxx_defaulted_functions;cxx_defaulted_move_initializers;cxx_delegating_constructors;cxx_deleted_functions;cxx_enum_forward_declarations;cxx_explicit_conversions;cxx_extended_friend_declarations;cxx_extern_templates;cxx_final;cxx_func_identifier;cxx_generalized_initializers;cxx_inheriting_constructors;cxx_inline_namespaces;cxx_lambdas;cxx_local_type_template_args;cxx_long_long_type;cxx_noexcept;cxx_nonstatic_member_init;cxx_nullptr;cxx_override;cxx_range_for;cxx_raw_string_literals;cxx_reference_qualified_functions;cxx_right_angle_brackets;cxx_rvalue_references;cxx_sizeof_member;cxx_static_assert;cxx_strong_enums;cxx_thread_local;cxx_trailing_return_types;cxx_unicode_literals;cxx_uniform_initialization;cxx_unrestricted_unions;cxx_user_literals;cxx_variadic_macros;cxx_variadic_templates") +set(CMAKE_CXX14_COMPILE_FEATURES "cxx_std_14;cxx_aggregate_default_initializers;cxx_attribute_deprecated;cxx_binary_literals;cxx_contextual_conversions;cxx_decltype_auto;cxx_digit_separators;cxx_generic_lambdas;cxx_lambda_init_captures;cxx_relaxed_constexpr;cxx_return_type_deduction;cxx_variable_templates") +set(CMAKE_CXX17_COMPILE_FEATURES "cxx_std_17") +set(CMAKE_CXX20_COMPILE_FEATURES "cxx_std_20") + +set(CMAKE_CXX_PLATFORM_ID "Linux") +set(CMAKE_CXX_SIMULATE_ID "") +set(CMAKE_CXX_COMPILER_FRONTEND_VARIANT "") +set(CMAKE_CXX_SIMULATE_VERSION "") + + + +set(CMAKE_AR "/usr/bin/ar") +set(CMAKE_CXX_COMPILER_AR "/usr/bin/gcc-ar-9") +set(CMAKE_RANLIB "/usr/bin/ranlib") +set(CMAKE_CXX_COMPILER_RANLIB "/usr/bin/gcc-ranlib-9") +set(CMAKE_LINKER "/usr/bin/ld") +set(CMAKE_MT "") +set(CMAKE_COMPILER_IS_GNUCXX 1) +set(CMAKE_CXX_COMPILER_LOADED 1) +set(CMAKE_CXX_COMPILER_WORKS TRUE) +set(CMAKE_CXX_ABI_COMPILED TRUE) +set(CMAKE_COMPILER_IS_MINGW ) +set(CMAKE_COMPILER_IS_CYGWIN ) +if(CMAKE_COMPILER_IS_CYGWIN) + set(CYGWIN 1) + set(UNIX 1) +endif() + +set(CMAKE_CXX_COMPILER_ENV_VAR "CXX") + +if(CMAKE_COMPILER_IS_MINGW) + set(MINGW 1) +endif() +set(CMAKE_CXX_COMPILER_ID_RUN 1) +set(CMAKE_CXX_SOURCE_FILE_EXTENSIONS C;M;c++;cc;cpp;cxx;m;mm;CPP) +set(CMAKE_CXX_IGNORE_EXTENSIONS inl;h;hpp;HPP;H;o;O;obj;OBJ;def;DEF;rc;RC) + +foreach (lang C OBJC OBJCXX) + if (CMAKE_${lang}_COMPILER_ID_RUN) + foreach(extension IN LISTS CMAKE_${lang}_SOURCE_FILE_EXTENSIONS) + list(REMOVE_ITEM CMAKE_CXX_SOURCE_FILE_EXTENSIONS ${extension}) + endforeach() + endif() +endforeach() + +set(CMAKE_CXX_LINKER_PREFERENCE 30) +set(CMAKE_CXX_LINKER_PREFERENCE_PROPAGATES 1) + +# Save compiler ABI information. +set(CMAKE_CXX_SIZEOF_DATA_PTR "8") +set(CMAKE_CXX_COMPILER_ABI "ELF") +set(CMAKE_CXX_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") + +if(CMAKE_CXX_SIZEOF_DATA_PTR) + set(CMAKE_SIZEOF_VOID_P "${CMAKE_CXX_SIZEOF_DATA_PTR}") +endif() + +if(CMAKE_CXX_COMPILER_ABI) + set(CMAKE_INTERNAL_PLATFORM_ABI "${CMAKE_CXX_COMPILER_ABI}") +endif() + +if(CMAKE_CXX_LIBRARY_ARCHITECTURE) + set(CMAKE_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") +endif() + +set(CMAKE_CXX_CL_SHOWINCLUDES_PREFIX "") +if(CMAKE_CXX_CL_SHOWINCLUDES_PREFIX) + set(CMAKE_CL_SHOWINCLUDES_PREFIX "${CMAKE_CXX_CL_SHOWINCLUDES_PREFIX}") +endif() + + + + + +set(CMAKE_CXX_IMPLICIT_INCLUDE_DIRECTORIES "/usr/include/c++/9;/usr/include/x86_64-linux-gnu/c++/9;/usr/include/c++/9/backward;/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include") +set(CMAKE_CXX_IMPLICIT_LINK_LIBRARIES "stdc++;m;gcc_s;gcc;c;gcc_s;gcc") +set(CMAKE_CXX_IMPLICIT_LINK_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib") +set(CMAKE_CXX_IMPLICIT_LINK_FRAMEWORK_DIRECTORIES "") diff --git a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin new file mode 100755 index 0000000000000000000000000000000000000000..ebea4b340830aee444aab660f7a351e9a05007f2 GIT binary patch literal 16552 zcmeHOeQXrR6`%9jaDchH5R+VihE1BN(A0}@!8H_@JD<;9w+2$M3l$&Rv+rylxew=V zkJyM1B&Vn+;ub}%phb-kRjWwJAI%^AR6h>6O(dkWAhnb>sp>#c-H0S6DV5s**Y{@T zop;w~MG95^=?>a^^M3O_X5Y*%Gv0YmM!MRoTrNh%%|6SJ3;G2TlnsL$WCci&HM7O= z`%$)n%>%xgW1>AM2(*fFsme+{5_bbdy#Q7!&=mp(528>Hk)qyQ<;Z-|LX^q-K)o7l zlDwVXkPe7ad)c3Y%1{*kTc(3jkEmG>V>4AR#{Cd0_bqE7PI-f=4&SRX#O|7!8w#(wv?y8YKqmBVloPg8<;^nn;o z?c@Fv@Qc|Nd^1~z?2I3&*#7sfcx3K z%pbHW4N08Y@aH)mU;!Jx2=E8svX?9X3fQ;Xc^dG$aO4!BLG$YruuGVi4c#U1xFGC+ z#Dj7|t&#W-fcjZrR{uXPC+k&M!;AbgyC;c`LkM<$IOh zXNrvPv<;t-IO*r{R+$l~3 zoCr7(a3bJDz=?npfe$+Z@A~fhk2ZSEqaCaH6Rd5uuM~}{(s^z4*Pe0SmD2h%0KZdu z=(|9CD;dfI_Y2OoG0v}jv$JqvpH{f6js9)wk?yXsnxn9U(#971IB7WxmP$*rpz_b- z+E~lCprVb{JcDGzw6PRiZ^b&eUQn9wtvrH`$0Y^%1eagmi)8g}tuUpXeQUFJcG|7E zUeYeyHtN8@L(+h!G|}%{3H>5{?C+5lY-ag~d$iG(Dy(XSt46JMtYscBldDUm(qs&N zUaGkTyKdKB(6#9Q<8f$2Lp`8Zc;cE?$WOc+xryC87P+RK)W(+n#tYH;QMKRq%c3iC zlhBuK=*_+3XeP9?Ypf*)JA%*`I|~;>J)MOcq3%%OW{);j9|L$t*Xmn1CX@Q@Qb{{| z%WbS&`>KpbSK*zm!dq>HzlTb7f7M3EUD}4f$+2sjaNBH%>8iGULUCjw3coCy4%M8IYF+Q?Yv*7j{1 zP2Y!hH#G0XP;fljo7fHK1rTs8cYg-I5#slf$+t_TA)wPhPXhH!l}h+s>pD>UPS$+A zR5}mzIiLagaRtAPVsRbZ&RoNO*Yeu=p5xGl_zJk516#OLXKnNOmzxKnx(==(z&YUc zw|fJh^DTPZbA)YPw(%36dXRqxMEyN*?IJm-V?mn+TpOTI{F_|F>pxl*UOewGI0hX4 zWWc@w*O#H4fBS3q`oCV)=?#3%9q}q-)e-Nir)%204M*o`-saKy9o}Ht+Z^&XguJU- zy-KS$(CYQKdOh$ZkFnR_`YPC=Z+yTy#fg9u0Ve`Z1e^#s5pW{lM8JuF69FdzA9@7n zd>oyJliRWKnYUW%5#MAnIOi?Oq&!#m5y{iJyXBInGi`W26bqfd!+jSPYQJ&2ltKQq zJTympq?58zKI2=BQj9GWgk6>t&wFAC2r_eCQu1^buPD#k;h9-1MQND&QRJvNJBwAa zcb~*b?!A)eFT{yM@I_YiU)qB&!euEuxAt&jgW9l8ZCowz_jl-qSrw>o<8Jty1D#JdTXDnbXF7jw z#jDw&igs$s^T;X>!I$&LiqB^>&#btI(Rf+$1?;pOM=QRtJfEyM%ue~-Sn*n>RKypv zhKjhioPS}p<74z3T5&L&nlw6^GNx73QCt z-NWelv&zptkB#l_3g@T=PH&qTEBKsMv+Jc9MAY!TRfXrbZSjN?7#u%s!|#_ky$6LA z#y$-dn6>3|-Sk|yb9{CjQqm5+SIN!@m!BO^{QFp?{=dNG{cM#26)4zmEOXuO4|&@X z7Q-8{l}h$EfuSnM60pyoajtv!tnvLl;4U~nPwxeC@jAz6kNX?a4*kDC^0#iZVUyXp{x%~;-x%yVX73zeEp5XZGdAJYoO6Tx1fLF>>H~@I1 zJcw^fc@{J|h3Xl=6)VKK7Xh!7k5B}>Qa-}(KnwE@?0FEUqDZD1- z?Rg5X1FlG2GkFhi{s&ewi1og#ku&me;;4_!q#Wo*O7Fv@gB&InWb}b#rZ<|@V@4*M z)1&!e)|W{QCF4dsrZzV;t*tD?lNt1AHX9v*6aynW!uqq(R9uhcQ>hV9F>yL3B3MMj zTcVG~!(nifNXE0F)=uaj&wYTuVS{e__RyAy9@*NaLwbW%8*>?Axr{y-O~)W%LT~%h z*3g#DuvLs_UjPJYJ9{8d*UHsg_7XQpylh(-|YK4y5zy zP&P9Z&l)2ps5hU0)T=~HLNI>yMs$F2@xf?rkg2heG`J8H(pY%Qfp|8T$fPZd4sF?Z zGKvaJo1}Tw3!R7 ze+g@Xidlb`T#pgO?=$9NUw(B$qgkKUb3_%hGSuz*I|2I_tfi^{w0|JFN9xmZ&EEeg zwBz1^^ve#Uqmvk1DA-4=l0NMVFkcOCne=HLN%S(bnTs@6h8}|&?iEO%)|*5hkdoAY zk|TN;+HvneJgrNKDpKFxe+jcOsNk)VKJACfR0@)R`~9DQcDyHQhyPSWk(Bm<5-o?9 z`0qf)tglEtqGXQbi6?r-rcdi;q9iw${_{5dpj06GJ==iU?Y(Hzr*#xj+9#8L`~3Z} z)Tj6}MM_GF&zHH_{r?IYv5TZn>w2P_%*s%=`+vozKdcA^qEmt`|I+vq@JFcNnp8ga z<$VI>)!OBWCwc{ReI|YS`@nQPfKW(Ia5FsNZ$kslJ@Q}Pcc?<6D8~=yKNixXIDQ{6 z6d`@upA_XnDF|)mLi$9fq0y|*f>OFcQ1TR)5cP-Ne~@%p?z=@_PTYHK#>p?q;_{sCoiL<3 Mn*~>EQ?Rk@zX|n&%K!iX literal 0 HcmV?d00001 diff --git a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin new file mode 100755 index 0000000000000000000000000000000000000000..ee268c0505df7bc55aab1046342c263205c720a2 GIT binary patch literal 16560 zcmeHOeQX>@6`%9j$)$1bE^PuP3C&VcVbgkJo5Wl~P3~-;y@tz26Puc*>Gte9+eh!K zcYD+>A&ulV$`K5uLTac)DJh^xMWXxxm5?ZoOcMzys1c$KlnT>O;i4pULW2xVa=bS) z@4UM{t13lEh#hP1&HK&!n0+(5p52}Ia5&Oc<#I79ZuV)0T+lC&plrx)krg087GNvj z_rq)*TLOGF$3%Nj5NH+UY?YOIB<==^dUaT-K-UQvJcvR)M2dQg6>X_#Arz1OG-Lx?oYfL86h0(^*Kx<>`CN-Z?TexfN7y7_C z)xD#Sftg9fWElBatdcyoCsv<&{$!x*C+~DU)A07TUq!xgbn14pfj&_N3+mI9ARc|7 z44(htJHK0_#2=|gY#AIrINHO%J^zJe9WVdv+~fPt#DATt-TK7xAAa`S61w09uQUQN<5xgI8Kl>o_2dzrF#F-6$ zlH+x(&W0}s{1!OuB?^E7_U(4Q1o%oEDMe_|eEJHoH!?5Ft`vA&5QY@-pqxM(CH@_t zepa`j{~wd`4bo1xl)qi#(-Oz=;sxf_AWoxJrt5>FQGFW!hZA`tp6lJ-k<6syz0rXrXvbqwBMK@=gb`qdQ<=21sDt`W zsK*j%y^xQ`%+|rU0T$8-4&?Ksj_xWt>yGracjzr@i@I5yl$fzDhJRK3SJd%W6v5Bm zehX_7Fnz1oi?W^Wk91#BWZdTDeUtEMIWC@{P$ZoAv)crY*9!SYWZHy_-U_)H6HeDI zw#=Gvnlp&cnQ-!rxKo@6I1z9n;6%WQfD-{H0{<%!_?z$Me`@3BJ=&3)-@#f}dvwyM zD!rtQ|I#zXPocE=7{HfHw>|^Jx1OOqa6jid$r>0+W4PmclAalY7W8D zOPg5X_&;tUA$@9SNcF9M1pCLw2S*b9@^LPYEN^yxoCr7(a3bJDz=?np0Ve`Z1e^#s5pW{l zMBx7<0{FegTzYnN?cAD&?@^f{J(e|cdz%9Lu$|-4fy7?eFMxn+t@~5>%@Dt{%)C`9 zWr5BCJqpw_TPorAzDq!#0~)wgD!l~sIM6!zQ3k(_VsSmRo4H2)uC=vGJ&!>f;_Kiz z4z}<~opmndUwk$|brT#}z&YUccX{hR<6Hiq=OEj*X6wg4vEddJNBw)?=qEV@p`c9z zjxEq9{*5l|^&hJ0Sh3^)I0hVE8L)4{aUZnvZ-HH2|JSQ}ymeo5hrP-~b=X_~)tXLk z)1f7rH!!}m+Z#-K10ioy$Xnm;RocCE?OuPo*Mnag*&pCI40g)j{D60g69FdzP6V6? zI1z9n;6%WQfD-{H0!{?}+Yz9Bb+nI8K8}_5%GFYb_(K+hecqzX$o+U9l05C#TPu0m z3y1qfvCzIfeD1Wt5V-LP)HjEWsAB=ZE9>TaIX14OOx8PNo{Em_`5rF z!>p>SaN=%w=Ro_@%~ss7`$<|U&d&h zt@sV)`DDdmcFOCPtMAY4|^O^S7n_Jzm!+Er# z{7sCmYpeXK^7U-R;p(d}|J>{Yi6E&{GdT{H2(YhwO_)eK^NFlXeA z0_->%Wb>&Bx{=ZcF*zZR83`GEIGGuUCiR$+$>sHEVU!JKQrTqOh{x1GQ)_c&A)fT0 zM{~L88001xxiL1Bi>BgwtdL5Lfr^RKF@wP(+Oa))f4rl=zXKd4lJQ)qy+<9)W|@9> zq`5Vb9?IyZm)wX3I0$dJ!E)E`(Dtw%-qEQ;)`ZnIrbxu{8GR(0j$ztG=jV5Xw)b>c z#dr<}K#)Z_xByEu4?#RyeP(e+#vP?~9jJP_SE~wdDCL7Ng zVzkbpd_L`*_3l#NDom~ruuXnusLv9UC`5Y)(tmM_M0`9vmdVRUHA#gkD~U@A|0 zQL{;d;g33;fr=3ygrP|Cuy$24nKCSDBDmHn${$0@icUV(X|LHk`=q{-*m*3@eJeiF`1)m{E zpVo;)4`OhkU>~tc=TFZE3Bd4_NuSn}MCmyNM0kfh$1OH4@#8#qB_!V z!(rA}q#jW+M>@n4J!aFV^)peDTTK61n|@F#5dFSw!0h&ZY}2Q86H$6zCja*N`@Gbr z_%lUHN{ZK)x!C>x0vfT4q)+R6qIZ~;p>Fqo+NM9M2nC|Ef-V2j_!IC7RB#PSk7M+_ zK>4+HdE$wl16`ja(J0EkKP zGEVxpl@U=PeKV!GV-^jPL3v^0b=(XG^@r|%_`ZbtZqb($cZ1D1`6bzvi|EG!LZa5D IU}M?802n@gkpKVy literal 0 HcmV?d00001 diff --git a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeSystem.cmake b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeSystem.cmake new file mode 100644 index 0000000..15b4419 --- /dev/null +++ b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeSystem.cmake @@ -0,0 +1,15 @@ +set(CMAKE_HOST_SYSTEM "Linux-5.15.0-69-generic") +set(CMAKE_HOST_SYSTEM_NAME "Linux") +set(CMAKE_HOST_SYSTEM_VERSION "5.15.0-69-generic") +set(CMAKE_HOST_SYSTEM_PROCESSOR "x86_64") + + + +set(CMAKE_SYSTEM "Linux-5.15.0-69-generic") +set(CMAKE_SYSTEM_NAME "Linux") +set(CMAKE_SYSTEM_VERSION "5.15.0-69-generic") +set(CMAKE_SYSTEM_PROCESSOR "x86_64") + +set(CMAKE_CROSSCOMPILING "FALSE") + +set(CMAKE_SYSTEM_LOADED 1) diff --git a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c new file mode 100644 index 0000000..d884b50 --- /dev/null +++ b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c @@ -0,0 +1,671 @@ +#ifdef __cplusplus +# error "A C++ compiler has been selected for C." +#endif + +#if defined(__18CXX) +# define ID_VOID_MAIN +#endif +#if defined(__CLASSIC_C__) +/* cv-qualifiers did not exist in K&R C */ +# define const +# define volatile +#endif + + +/* Version number components: V=Version, R=Revision, P=Patch + Version date components: YYYY=Year, MM=Month, DD=Day */ + +#if defined(__INTEL_COMPILER) || defined(__ICC) +# define COMPILER_ID "Intel" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# if defined(__GNUC__) +# define SIMULATE_ID "GNU" +# endif + /* __INTEL_COMPILER = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER/100) +# define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER/10 % 10) +# if defined(__INTEL_COMPILER_UPDATE) +# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER_UPDATE) +# else +# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER % 10) +# endif +# if defined(__INTEL_COMPILER_BUILD_DATE) + /* __INTEL_COMPILER_BUILD_DATE = YYYYMMDD */ +# define COMPILER_VERSION_TWEAK DEC(__INTEL_COMPILER_BUILD_DATE) +# endif +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif +# if defined(__GNUC__) +# define SIMULATE_VERSION_MAJOR DEC(__GNUC__) +# elif defined(__GNUG__) +# define SIMULATE_VERSION_MAJOR DEC(__GNUG__) +# endif +# if defined(__GNUC_MINOR__) +# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__) +# endif +# if defined(__GNUC_PATCHLEVEL__) +# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif + +#elif defined(__PATHCC__) +# define COMPILER_ID "PathScale" +# define COMPILER_VERSION_MAJOR DEC(__PATHCC__) +# define COMPILER_VERSION_MINOR DEC(__PATHCC_MINOR__) +# if defined(__PATHCC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PATHCC_PATCHLEVEL__) +# endif + +#elif defined(__BORLANDC__) && defined(__CODEGEARC_VERSION__) +# define COMPILER_ID "Embarcadero" +# define COMPILER_VERSION_MAJOR HEX(__CODEGEARC_VERSION__>>24 & 0x00FF) +# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF) +# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF) + +#elif defined(__BORLANDC__) +# define COMPILER_ID "Borland" + /* __BORLANDC__ = 0xVRR */ +# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8) +# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF) + +#elif defined(__WATCOMC__) && __WATCOMC__ < 1200 +# define COMPILER_ID "Watcom" + /* __WATCOMC__ = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__WATCOMC__) +# define COMPILER_ID "OpenWatcom" + /* __WATCOMC__ = VVRP + 1100 */ +# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__SUNPRO_C) +# define COMPILER_ID "SunPro" +# if __SUNPRO_C >= 0x5100 + /* __SUNPRO_C = 0xVRRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>12) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF) +# else + /* __SUNPRO_CC = 0xVRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>8) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF) +# endif + +#elif defined(__HP_cc) +# define COMPILER_ID "HP" + /* __HP_cc = VVRRPP */ +# define COMPILER_VERSION_MAJOR DEC(__HP_cc/10000) +# define COMPILER_VERSION_MINOR DEC(__HP_cc/100 % 100) +# define COMPILER_VERSION_PATCH DEC(__HP_cc % 100) + +#elif defined(__DECC) +# define COMPILER_ID "Compaq" + /* __DECC_VER = VVRRTPPPP */ +# define COMPILER_VERSION_MAJOR DEC(__DECC_VER/10000000) +# define COMPILER_VERSION_MINOR DEC(__DECC_VER/100000 % 100) +# define COMPILER_VERSION_PATCH DEC(__DECC_VER % 10000) + +#elif defined(__IBMC__) && defined(__COMPILER_VER__) +# define COMPILER_ID "zOS" + /* __IBMC__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) + +#elif defined(__ibmxl__) && defined(__clang__) +# define COMPILER_ID "XLClang" +# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__) +# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__) +# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__) +# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__) + + +#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ >= 800 +# define COMPILER_ID "XL" + /* __IBMC__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) + +#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ < 800 +# define COMPILER_ID "VisualAge" + /* __IBMC__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) + +#elif defined(__PGI) +# define COMPILER_ID "PGI" +# define COMPILER_VERSION_MAJOR DEC(__PGIC__) +# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__) +# if defined(__PGIC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__) +# endif + +#elif defined(_CRAYC) +# define COMPILER_ID "Cray" +# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR) +# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR) + +#elif defined(__TI_COMPILER_VERSION__) +# define COMPILER_ID "TI" + /* __TI_COMPILER_VERSION__ = VVVRRRPPP */ +# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000) +# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000) +# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000) + +#elif defined(__FUJITSU) || defined(__FCC_VERSION) || defined(__fcc_version) +# define COMPILER_ID "Fujitsu" + +#elif defined(__ghs__) +# define COMPILER_ID "GHS" +/* __GHS_VERSION_NUMBER = VVVVRP */ +# ifdef __GHS_VERSION_NUMBER +# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100) +# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10) +# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10) +# endif + +#elif defined(__TINYC__) +# define COMPILER_ID "TinyCC" + +#elif defined(__BCC__) +# define COMPILER_ID "Bruce" + +#elif defined(__SCO_VERSION__) +# define COMPILER_ID "SCO" + +#elif defined(__ARMCC_VERSION) && !defined(__clang__) +# define COMPILER_ID "ARMCC" +#if __ARMCC_VERSION >= 1000000 + /* __ARMCC_VERSION = VRRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#else + /* __ARMCC_VERSION = VRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#endif + + +#elif defined(__clang__) && defined(__apple_build_version__) +# define COMPILER_ID "AppleClang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif +# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__) + +#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION) +# define COMPILER_ID "ARMClang" + # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION % 10000) +# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION) + +#elif defined(__clang__) +# define COMPILER_ID "Clang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif + +#elif defined(__GNUC__) +# define COMPILER_ID "GNU" +# define COMPILER_VERSION_MAJOR DEC(__GNUC__) +# if defined(__GNUC_MINOR__) +# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__) +# endif +# if defined(__GNUC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif + +#elif defined(_MSC_VER) +# define COMPILER_ID "MSVC" + /* _MSC_VER = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100) +# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100) +# if defined(_MSC_FULL_VER) +# if _MSC_VER >= 1400 + /* _MSC_FULL_VER = VVRRPPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000) +# else + /* _MSC_FULL_VER = VVRRPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000) +# endif +# endif +# if defined(_MSC_BUILD) +# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD) +# endif + +#elif defined(__VISUALDSPVERSION__) || defined(__ADSPBLACKFIN__) || defined(__ADSPTS__) || defined(__ADSP21000__) +# define COMPILER_ID "ADSP" +#if defined(__VISUALDSPVERSION__) + /* __VISUALDSPVERSION__ = 0xVVRRPP00 */ +# define COMPILER_VERSION_MAJOR HEX(__VISUALDSPVERSION__>>24) +# define COMPILER_VERSION_MINOR HEX(__VISUALDSPVERSION__>>16 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__VISUALDSPVERSION__>>8 & 0xFF) +#endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# define COMPILER_ID "IAR" +# if defined(__VER__) && defined(__ICCARM__) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000) +# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000) +# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__)) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100) +# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100)) +# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# endif + +#elif defined(__SDCC_VERSION_MAJOR) || defined(SDCC) +# define COMPILER_ID "SDCC" +# if defined(__SDCC_VERSION_MAJOR) +# define COMPILER_VERSION_MAJOR DEC(__SDCC_VERSION_MAJOR) +# define COMPILER_VERSION_MINOR DEC(__SDCC_VERSION_MINOR) +# define COMPILER_VERSION_PATCH DEC(__SDCC_VERSION_PATCH) +# else + /* SDCC = VRP */ +# define COMPILER_VERSION_MAJOR DEC(SDCC/100) +# define COMPILER_VERSION_MINOR DEC(SDCC/10 % 10) +# define COMPILER_VERSION_PATCH DEC(SDCC % 10) +# endif + + +/* These compilers are either not known or too old to define an + identification macro. Try to identify the platform and guess that + it is the native compiler. */ +#elif defined(__hpux) || defined(__hpua) +# define COMPILER_ID "HP" + +#else /* unknown compiler */ +# define COMPILER_ID "" +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; +#ifdef SIMULATE_ID +char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; +#endif + +#ifdef __QNXNTO__ +char const* qnxnto = "INFO" ":" "qnxnto[]"; +#endif + +#if defined(__CRAYXE) || defined(__CRAYXC) +char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; +#endif + +#define STRINGIFY_HELPER(X) #X +#define STRINGIFY(X) STRINGIFY_HELPER(X) + +/* Identify known platforms by name. */ +#if defined(__linux) || defined(__linux__) || defined(linux) +# define PLATFORM_ID "Linux" + +#elif defined(__CYGWIN__) +# define PLATFORM_ID "Cygwin" + +#elif defined(__MINGW32__) +# define PLATFORM_ID "MinGW" + +#elif defined(__APPLE__) +# define PLATFORM_ID "Darwin" + +#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) +# define PLATFORM_ID "Windows" + +#elif defined(__FreeBSD__) || defined(__FreeBSD) +# define PLATFORM_ID "FreeBSD" + +#elif defined(__NetBSD__) || defined(__NetBSD) +# define PLATFORM_ID "NetBSD" + +#elif defined(__OpenBSD__) || defined(__OPENBSD) +# define PLATFORM_ID "OpenBSD" + +#elif defined(__sun) || defined(sun) +# define PLATFORM_ID "SunOS" + +#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) +# define PLATFORM_ID "AIX" + +#elif defined(__hpux) || defined(__hpux__) +# define PLATFORM_ID "HP-UX" + +#elif defined(__HAIKU__) +# define PLATFORM_ID "Haiku" + +#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) +# define PLATFORM_ID "BeOS" + +#elif defined(__QNX__) || defined(__QNXNTO__) +# define PLATFORM_ID "QNX" + +#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) +# define PLATFORM_ID "Tru64" + +#elif defined(__riscos) || defined(__riscos__) +# define PLATFORM_ID "RISCos" + +#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) +# define PLATFORM_ID "SINIX" + +#elif defined(__UNIX_SV__) +# define PLATFORM_ID "UNIX_SV" + +#elif defined(__bsdos__) +# define PLATFORM_ID "BSDOS" + +#elif defined(_MPRAS) || defined(MPRAS) +# define PLATFORM_ID "MP-RAS" + +#elif defined(__osf) || defined(__osf__) +# define PLATFORM_ID "OSF1" + +#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) +# define PLATFORM_ID "SCO_SV" + +#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) +# define PLATFORM_ID "ULTRIX" + +#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) +# define PLATFORM_ID "Xenix" + +#elif defined(__WATCOMC__) +# if defined(__LINUX__) +# define PLATFORM_ID "Linux" + +# elif defined(__DOS__) +# define PLATFORM_ID "DOS" + +# elif defined(__OS2__) +# define PLATFORM_ID "OS2" + +# elif defined(__WINDOWS__) +# define PLATFORM_ID "Windows3x" + +# else /* unknown platform */ +# define PLATFORM_ID +# endif + +#elif defined(__INTEGRITY) +# if defined(INT_178B) +# define PLATFORM_ID "Integrity178" + +# else /* regular Integrity */ +# define PLATFORM_ID "Integrity" +# endif + +#else /* unknown platform */ +# define PLATFORM_ID + +#endif + +/* For windows compilers MSVC and Intel we can determine + the architecture of the compiler being used. This is because + the compilers do not have flags that can change the architecture, + but rather depend on which compiler is being used +*/ +#if defined(_WIN32) && defined(_MSC_VER) +# if defined(_M_IA64) +# define ARCHITECTURE_ID "IA64" + +# elif defined(_M_X64) || defined(_M_AMD64) +# define ARCHITECTURE_ID "x64" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# elif defined(_M_ARM64) +# define ARCHITECTURE_ID "ARM64" + +# elif defined(_M_ARM) +# if _M_ARM == 4 +# define ARCHITECTURE_ID "ARMV4I" +# elif _M_ARM == 5 +# define ARCHITECTURE_ID "ARMV5I" +# else +# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) +# endif + +# elif defined(_M_MIPS) +# define ARCHITECTURE_ID "MIPS" + +# elif defined(_M_SH) +# define ARCHITECTURE_ID "SHx" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__WATCOMC__) +# if defined(_M_I86) +# define ARCHITECTURE_ID "I86" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# if defined(__ICCARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__ICCRX__) +# define ARCHITECTURE_ID "RX" + +# elif defined(__ICCRH850__) +# define ARCHITECTURE_ID "RH850" + +# elif defined(__ICCRL78__) +# define ARCHITECTURE_ID "RL78" + +# elif defined(__ICCRISCV__) +# define ARCHITECTURE_ID "RISCV" + +# elif defined(__ICCAVR__) +# define ARCHITECTURE_ID "AVR" + +# elif defined(__ICC430__) +# define ARCHITECTURE_ID "MSP430" + +# elif defined(__ICCV850__) +# define ARCHITECTURE_ID "V850" + +# elif defined(__ICC8051__) +# define ARCHITECTURE_ID "8051" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__ghs__) +# if defined(__PPC64__) +# define ARCHITECTURE_ID "PPC64" + +# elif defined(__ppc__) +# define ARCHITECTURE_ID "PPC" + +# elif defined(__ARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__x86_64__) +# define ARCHITECTURE_ID "x64" + +# elif defined(__i386__) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif +#else +# define ARCHITECTURE_ID +#endif + +/* Convert integer to decimal digit literals. */ +#define DEC(n) \ + ('0' + (((n) / 10000000)%10)), \ + ('0' + (((n) / 1000000)%10)), \ + ('0' + (((n) / 100000)%10)), \ + ('0' + (((n) / 10000)%10)), \ + ('0' + (((n) / 1000)%10)), \ + ('0' + (((n) / 100)%10)), \ + ('0' + (((n) / 10)%10)), \ + ('0' + ((n) % 10)) + +/* Convert integer to hex digit literals. */ +#define HEX(n) \ + ('0' + ((n)>>28 & 0xF)), \ + ('0' + ((n)>>24 & 0xF)), \ + ('0' + ((n)>>20 & 0xF)), \ + ('0' + ((n)>>16 & 0xF)), \ + ('0' + ((n)>>12 & 0xF)), \ + ('0' + ((n)>>8 & 0xF)), \ + ('0' + ((n)>>4 & 0xF)), \ + ('0' + ((n) & 0xF)) + +/* Construct a string literal encoding the version number components. */ +#ifdef COMPILER_VERSION_MAJOR +char const info_version[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', + COMPILER_VERSION_MAJOR, +# ifdef COMPILER_VERSION_MINOR + '.', COMPILER_VERSION_MINOR, +# ifdef COMPILER_VERSION_PATCH + '.', COMPILER_VERSION_PATCH, +# ifdef COMPILER_VERSION_TWEAK + '.', COMPILER_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct a string literal encoding the internal version number. */ +#ifdef COMPILER_VERSION_INTERNAL +char const info_version_internal[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', + 'i','n','t','e','r','n','a','l','[', + COMPILER_VERSION_INTERNAL,']','\0'}; +#endif + +/* Construct a string literal encoding the version number components. */ +#ifdef SIMULATE_VERSION_MAJOR +char const info_simulate_version[] = { + 'I', 'N', 'F', 'O', ':', + 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', + SIMULATE_VERSION_MAJOR, +# ifdef SIMULATE_VERSION_MINOR + '.', SIMULATE_VERSION_MINOR, +# ifdef SIMULATE_VERSION_PATCH + '.', SIMULATE_VERSION_PATCH, +# ifdef SIMULATE_VERSION_TWEAK + '.', SIMULATE_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; +char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; + + + + +#if !defined(__STDC__) +# if (defined(_MSC_VER) && !defined(__clang__)) \ + || (defined(__ibmxl__) || defined(__IBMC__)) +# define C_DIALECT "90" +# else +# define C_DIALECT +# endif +#elif __STDC_VERSION__ >= 201000L +# define C_DIALECT "11" +#elif __STDC_VERSION__ >= 199901L +# define C_DIALECT "99" +#else +# define C_DIALECT "90" +#endif +const char* info_language_dialect_default = + "INFO" ":" "dialect_default[" C_DIALECT "]"; + +/*--------------------------------------------------------------------------*/ + +#ifdef ID_VOID_MAIN +void main() {} +#else +# if defined(__CLASSIC_C__) +int main(argc, argv) int argc; char *argv[]; +# else +int main(int argc, char* argv[]) +# endif +{ + int require = 0; + require += info_compiler[argc]; + require += info_platform[argc]; + require += info_arch[argc]; +#ifdef COMPILER_VERSION_MAJOR + require += info_version[argc]; +#endif +#ifdef COMPILER_VERSION_INTERNAL + require += info_version_internal[argc]; +#endif +#ifdef SIMULATE_ID + require += info_simulate[argc]; +#endif +#ifdef SIMULATE_VERSION_MAJOR + require += info_simulate_version[argc]; +#endif +#if defined(__CRAYXE) || defined(__CRAYXC) + require += info_cray[argc]; +#endif + require += info_language_dialect_default[argc]; + (void)argv; + return require; +} +#endif diff --git a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/a.out b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/a.out new file mode 100755 index 0000000000000000000000000000000000000000..b5c91a373fc518990e2aec59df62ee3a3ddb612a GIT binary patch literal 16712 zcmeHOeQX>@6`%9jiPI)$Cv}LMwDpn?$)WY-Y!c(7HNCTa&K|OpHnC}t>n>~G**>@r zbGJwBij+Xo!VwGsB2oT8ii!jX!XM?2ejovkLJO?`H3Eg8f=GcDgF@<-2Dy;tcyH#t z^X~dwB+4HM?MSz8=J!7L&FtRJ?##!deZ5sapWxyb?-kez*DEAUjM_a^0TLD+VhtQ` z7B`6%(5{x4;)fLht|}L*oV1p3KTy!ESR#tyFrh- zmL%Sqa5o{P%rC01oB}dwK?nuR3QprqVs%5I9y`_C;FrN*!Nyiu$`oJ-@ zci*4@GqZ?M8f9NJP#gI#?vB2&W!v2^9*Cd%;uyqyi0l>5h_~4OYn4tZP@HYQhLc5kED`TFGRLR+gC3v}Hwevu5+ zh83T2Zr8hTO;d7>E<8uL=E6Tkc(V)t65$u_6tdu0!1Lj9(T4LmBX7=z^Vmdu-iGrv zhWLUFm-kBqz2arS%Yc^wF9Ti%ybO35@G|g!lYzh0-SQ9p=%rfyc+IbO2%$eTYgLt= z*N^_F_N+X|(ym7Veyz0aYe4Fn1j<9}`?A#|WV`jRvEsS=^y2UJqko*gYoKqY<~%%_ z>N9H$NjlGfrPBHwsJwncpXq!GD*8;#caiK~u-1d?eOL$At4bH^nvS63vqV9@DCKv3 z63O;!dU0MqbNNpF%z|I{J)@tyW;K9;ZDgRfbaAY%3F2aXjQ2=q6xgD0>!5zLvkI$v z@g-}ue!O!9H0HLKN~O6t9G!cp+V3q9=@a(3m1PJy^3M#$Jajx zGxg)qOZp?a@A&H)6xL&!M^QpVjs`dT`QIJGjIB>rq&lIzkS8m z`ihr(ihqif8h)oAJ?qnV|F-ZK?Ej(R$i0!_$bAvx?ATbauIU(_uk3Fe8R%DzoAOAJ zZ13P@z{`M_0WSky2D}V-8SpaTWx&gTmjN#W|Dzf3IleY74KlW`cmJNzYmBgqeM;wPnCk%@~Wnp`_usqR!mQ=hTE>+;v94Tb1 zg0?#d6Z@9df^4-u*cJ+gb_UzFEBxOF5J?OZ>s44D0PrrCa`TBIq zZ-5sfc0|?vaJ7dj;(Rw+)WPepTD)3XL{ts$YgHm3CSCc2^%fF8<-*@dINv9g6(QaO z6&SVUc+ek~UikUoZ4lr0BnSswoR5C_zRUPDRD5D-J|6+RQvA!E*SDpeb>f#8u&Y$E z^OTgiVM(0N0q(=QsjI(!LGpaRXBRKa%F^-khP1P^e;;FyP5+INs3Lr(*(hw;`CX3L6>lYE%Q?G9o;LH6rO zp8xNj1|03UucLEhXFK_o?<&C-uHae=`D}LCc^z>$U$-6TT%m!UyKDq}vm1nVJK&g~ zu%?)8B-1VN4MGbmfa4dVIV*1!U?tM1Slk|BSZQMvH;Ck6b4WaEjHj|AX3B_L*<9W* z3sVB$T&EINA|C7rwYOFl!mTMu!_4K(X(N%ba?@fgXQmTIypT>$gNm(XfTZOR?d~@} zoapYR7v!-xgl8DN2O|AZBf780fL$t1owzW1KCmy+AM18<CYsTFK}P@9+h!7R(=u6Qao~q% z7tC=;xbvMqh{N_DP9yFMs<_$5xxL7FQqn$slu)tYHwGbs`RTM}jsUfCicWAXnSpIb zlOmYOT8ZFzrVyOWWhWCkYuW~l6q2wpEEy*#(iLm5%yA*bC(QhW2*#%~;6hO=r#Kvk z6r+X#yj&t>qJjv@lm#bKmcT=BJPQ>oF$G5)q9B=-JsC_)(4d@%gFd&Ez8alMgX>`2 zOeaSn92^Ki=mZgjPD#UPr_1hb6PyRYtpRTXvhZ^qQ=SJ9Tgq}B=@$6mGcxP*^B+?U zc=l4hFA&%c)UJPso(Gw3wJSrN@5cAVx$y8%OqHg_r0RKBY>vQ}(zhTP$@!J&^ zcl;(`IJaSap8qgCfl5&D95K(V&-0cfV0g-`&(E<;dHw_Dy(m(Ja+7&A0&f1UD$XX-v&R9hwp!@0OQ#0`rpJq1}Ob5>24 & 0x00FF) +# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF) +# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF) + +#elif defined(__BORLANDC__) +# define COMPILER_ID "Borland" + /* __BORLANDC__ = 0xVRR */ +# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8) +# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF) + +#elif defined(__WATCOMC__) && __WATCOMC__ < 1200 +# define COMPILER_ID "Watcom" + /* __WATCOMC__ = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__WATCOMC__) +# define COMPILER_ID "OpenWatcom" + /* __WATCOMC__ = VVRP + 1100 */ +# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__SUNPRO_CC) +# define COMPILER_ID "SunPro" +# if __SUNPRO_CC >= 0x5100 + /* __SUNPRO_CC = 0xVRRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>12) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) +# else + /* __SUNPRO_CC = 0xVRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>8) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) +# endif + +#elif defined(__HP_aCC) +# define COMPILER_ID "HP" + /* __HP_aCC = VVRRPP */ +# define COMPILER_VERSION_MAJOR DEC(__HP_aCC/10000) +# define COMPILER_VERSION_MINOR DEC(__HP_aCC/100 % 100) +# define COMPILER_VERSION_PATCH DEC(__HP_aCC % 100) + +#elif defined(__DECCXX) +# define COMPILER_ID "Compaq" + /* __DECCXX_VER = VVRRTPPPP */ +# define COMPILER_VERSION_MAJOR DEC(__DECCXX_VER/10000000) +# define COMPILER_VERSION_MINOR DEC(__DECCXX_VER/100000 % 100) +# define COMPILER_VERSION_PATCH DEC(__DECCXX_VER % 10000) + +#elif defined(__IBMCPP__) && defined(__COMPILER_VER__) +# define COMPILER_ID "zOS" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__ibmxl__) && defined(__clang__) +# define COMPILER_ID "XLClang" +# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__) +# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__) +# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__) +# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__) + + +#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ >= 800 +# define COMPILER_ID "XL" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ < 800 +# define COMPILER_ID "VisualAge" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__PGI) +# define COMPILER_ID "PGI" +# define COMPILER_VERSION_MAJOR DEC(__PGIC__) +# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__) +# if defined(__PGIC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__) +# endif + +#elif defined(_CRAYC) +# define COMPILER_ID "Cray" +# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR) +# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR) + +#elif defined(__TI_COMPILER_VERSION__) +# define COMPILER_ID "TI" + /* __TI_COMPILER_VERSION__ = VVVRRRPPP */ +# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000) +# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000) +# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000) + +#elif defined(__FUJITSU) || defined(__FCC_VERSION) || defined(__fcc_version) +# define COMPILER_ID "Fujitsu" + +#elif defined(__ghs__) +# define COMPILER_ID "GHS" +/* __GHS_VERSION_NUMBER = VVVVRP */ +# ifdef __GHS_VERSION_NUMBER +# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100) +# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10) +# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10) +# endif + +#elif defined(__SCO_VERSION__) +# define COMPILER_ID "SCO" + +#elif defined(__ARMCC_VERSION) && !defined(__clang__) +# define COMPILER_ID "ARMCC" +#if __ARMCC_VERSION >= 1000000 + /* __ARMCC_VERSION = VRRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#else + /* __ARMCC_VERSION = VRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#endif + + +#elif defined(__clang__) && defined(__apple_build_version__) +# define COMPILER_ID "AppleClang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif +# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__) + +#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION) +# define COMPILER_ID "ARMClang" + # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION % 10000) +# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION) + +#elif defined(__clang__) +# define COMPILER_ID "Clang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif + +#elif defined(__GNUC__) || defined(__GNUG__) +# define COMPILER_ID "GNU" +# if defined(__GNUC__) +# define COMPILER_VERSION_MAJOR DEC(__GNUC__) +# else +# define COMPILER_VERSION_MAJOR DEC(__GNUG__) +# endif +# if defined(__GNUC_MINOR__) +# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__) +# endif +# if defined(__GNUC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif + +#elif defined(_MSC_VER) +# define COMPILER_ID "MSVC" + /* _MSC_VER = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100) +# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100) +# if defined(_MSC_FULL_VER) +# if _MSC_VER >= 1400 + /* _MSC_FULL_VER = VVRRPPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000) +# else + /* _MSC_FULL_VER = VVRRPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000) +# endif +# endif +# if defined(_MSC_BUILD) +# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD) +# endif + +#elif defined(__VISUALDSPVERSION__) || defined(__ADSPBLACKFIN__) || defined(__ADSPTS__) || defined(__ADSP21000__) +# define COMPILER_ID "ADSP" +#if defined(__VISUALDSPVERSION__) + /* __VISUALDSPVERSION__ = 0xVVRRPP00 */ +# define COMPILER_VERSION_MAJOR HEX(__VISUALDSPVERSION__>>24) +# define COMPILER_VERSION_MINOR HEX(__VISUALDSPVERSION__>>16 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__VISUALDSPVERSION__>>8 & 0xFF) +#endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# define COMPILER_ID "IAR" +# if defined(__VER__) && defined(__ICCARM__) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000) +# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000) +# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__)) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100) +# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100)) +# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# endif + + +/* These compilers are either not known or too old to define an + identification macro. Try to identify the platform and guess that + it is the native compiler. */ +#elif defined(__hpux) || defined(__hpua) +# define COMPILER_ID "HP" + +#else /* unknown compiler */ +# define COMPILER_ID "" +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; +#ifdef SIMULATE_ID +char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; +#endif + +#ifdef __QNXNTO__ +char const* qnxnto = "INFO" ":" "qnxnto[]"; +#endif + +#if defined(__CRAYXE) || defined(__CRAYXC) +char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; +#endif + +#define STRINGIFY_HELPER(X) #X +#define STRINGIFY(X) STRINGIFY_HELPER(X) + +/* Identify known platforms by name. */ +#if defined(__linux) || defined(__linux__) || defined(linux) +# define PLATFORM_ID "Linux" + +#elif defined(__CYGWIN__) +# define PLATFORM_ID "Cygwin" + +#elif defined(__MINGW32__) +# define PLATFORM_ID "MinGW" + +#elif defined(__APPLE__) +# define PLATFORM_ID "Darwin" + +#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) +# define PLATFORM_ID "Windows" + +#elif defined(__FreeBSD__) || defined(__FreeBSD) +# define PLATFORM_ID "FreeBSD" + +#elif defined(__NetBSD__) || defined(__NetBSD) +# define PLATFORM_ID "NetBSD" + +#elif defined(__OpenBSD__) || defined(__OPENBSD) +# define PLATFORM_ID "OpenBSD" + +#elif defined(__sun) || defined(sun) +# define PLATFORM_ID "SunOS" + +#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) +# define PLATFORM_ID "AIX" + +#elif defined(__hpux) || defined(__hpux__) +# define PLATFORM_ID "HP-UX" + +#elif defined(__HAIKU__) +# define PLATFORM_ID "Haiku" + +#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) +# define PLATFORM_ID "BeOS" + +#elif defined(__QNX__) || defined(__QNXNTO__) +# define PLATFORM_ID "QNX" + +#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) +# define PLATFORM_ID "Tru64" + +#elif defined(__riscos) || defined(__riscos__) +# define PLATFORM_ID "RISCos" + +#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) +# define PLATFORM_ID "SINIX" + +#elif defined(__UNIX_SV__) +# define PLATFORM_ID "UNIX_SV" + +#elif defined(__bsdos__) +# define PLATFORM_ID "BSDOS" + +#elif defined(_MPRAS) || defined(MPRAS) +# define PLATFORM_ID "MP-RAS" + +#elif defined(__osf) || defined(__osf__) +# define PLATFORM_ID "OSF1" + +#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) +# define PLATFORM_ID "SCO_SV" + +#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) +# define PLATFORM_ID "ULTRIX" + +#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) +# define PLATFORM_ID "Xenix" + +#elif defined(__WATCOMC__) +# if defined(__LINUX__) +# define PLATFORM_ID "Linux" + +# elif defined(__DOS__) +# define PLATFORM_ID "DOS" + +# elif defined(__OS2__) +# define PLATFORM_ID "OS2" + +# elif defined(__WINDOWS__) +# define PLATFORM_ID "Windows3x" + +# else /* unknown platform */ +# define PLATFORM_ID +# endif + +#elif defined(__INTEGRITY) +# if defined(INT_178B) +# define PLATFORM_ID "Integrity178" + +# else /* regular Integrity */ +# define PLATFORM_ID "Integrity" +# endif + +#else /* unknown platform */ +# define PLATFORM_ID + +#endif + +/* For windows compilers MSVC and Intel we can determine + the architecture of the compiler being used. This is because + the compilers do not have flags that can change the architecture, + but rather depend on which compiler is being used +*/ +#if defined(_WIN32) && defined(_MSC_VER) +# if defined(_M_IA64) +# define ARCHITECTURE_ID "IA64" + +# elif defined(_M_X64) || defined(_M_AMD64) +# define ARCHITECTURE_ID "x64" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# elif defined(_M_ARM64) +# define ARCHITECTURE_ID "ARM64" + +# elif defined(_M_ARM) +# if _M_ARM == 4 +# define ARCHITECTURE_ID "ARMV4I" +# elif _M_ARM == 5 +# define ARCHITECTURE_ID "ARMV5I" +# else +# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) +# endif + +# elif defined(_M_MIPS) +# define ARCHITECTURE_ID "MIPS" + +# elif defined(_M_SH) +# define ARCHITECTURE_ID "SHx" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__WATCOMC__) +# if defined(_M_I86) +# define ARCHITECTURE_ID "I86" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# if defined(__ICCARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__ICCRX__) +# define ARCHITECTURE_ID "RX" + +# elif defined(__ICCRH850__) +# define ARCHITECTURE_ID "RH850" + +# elif defined(__ICCRL78__) +# define ARCHITECTURE_ID "RL78" + +# elif defined(__ICCRISCV__) +# define ARCHITECTURE_ID "RISCV" + +# elif defined(__ICCAVR__) +# define ARCHITECTURE_ID "AVR" + +# elif defined(__ICC430__) +# define ARCHITECTURE_ID "MSP430" + +# elif defined(__ICCV850__) +# define ARCHITECTURE_ID "V850" + +# elif defined(__ICC8051__) +# define ARCHITECTURE_ID "8051" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__ghs__) +# if defined(__PPC64__) +# define ARCHITECTURE_ID "PPC64" + +# elif defined(__ppc__) +# define ARCHITECTURE_ID "PPC" + +# elif defined(__ARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__x86_64__) +# define ARCHITECTURE_ID "x64" + +# elif defined(__i386__) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif +#else +# define ARCHITECTURE_ID +#endif + +/* Convert integer to decimal digit literals. */ +#define DEC(n) \ + ('0' + (((n) / 10000000)%10)), \ + ('0' + (((n) / 1000000)%10)), \ + ('0' + (((n) / 100000)%10)), \ + ('0' + (((n) / 10000)%10)), \ + ('0' + (((n) / 1000)%10)), \ + ('0' + (((n) / 100)%10)), \ + ('0' + (((n) / 10)%10)), \ + ('0' + ((n) % 10)) + +/* Convert integer to hex digit literals. */ +#define HEX(n) \ + ('0' + ((n)>>28 & 0xF)), \ + ('0' + ((n)>>24 & 0xF)), \ + ('0' + ((n)>>20 & 0xF)), \ + ('0' + ((n)>>16 & 0xF)), \ + ('0' + ((n)>>12 & 0xF)), \ + ('0' + ((n)>>8 & 0xF)), \ + ('0' + ((n)>>4 & 0xF)), \ + ('0' + ((n) & 0xF)) + +/* Construct a string literal encoding the version number components. */ +#ifdef COMPILER_VERSION_MAJOR +char const info_version[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', + COMPILER_VERSION_MAJOR, +# ifdef COMPILER_VERSION_MINOR + '.', COMPILER_VERSION_MINOR, +# ifdef COMPILER_VERSION_PATCH + '.', COMPILER_VERSION_PATCH, +# ifdef COMPILER_VERSION_TWEAK + '.', COMPILER_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct a string literal encoding the internal version number. */ +#ifdef COMPILER_VERSION_INTERNAL +char const info_version_internal[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', + 'i','n','t','e','r','n','a','l','[', + COMPILER_VERSION_INTERNAL,']','\0'}; +#endif + +/* Construct a string literal encoding the version number components. */ +#ifdef SIMULATE_VERSION_MAJOR +char const info_simulate_version[] = { + 'I', 'N', 'F', 'O', ':', + 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', + SIMULATE_VERSION_MAJOR, +# ifdef SIMULATE_VERSION_MINOR + '.', SIMULATE_VERSION_MINOR, +# ifdef SIMULATE_VERSION_PATCH + '.', SIMULATE_VERSION_PATCH, +# ifdef SIMULATE_VERSION_TWEAK + '.', SIMULATE_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; +char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; + + + + +#if defined(__INTEL_COMPILER) && defined(_MSVC_LANG) && _MSVC_LANG < 201403L +# if defined(__INTEL_CXX11_MODE__) +# if defined(__cpp_aggregate_nsdmi) +# define CXX_STD 201402L +# else +# define CXX_STD 201103L +# endif +# else +# define CXX_STD 199711L +# endif +#elif defined(_MSC_VER) && defined(_MSVC_LANG) +# define CXX_STD _MSVC_LANG +#else +# define CXX_STD __cplusplus +#endif + +const char* info_language_dialect_default = "INFO" ":" "dialect_default[" +#if CXX_STD > 201703L + "20" +#elif CXX_STD >= 201703L + "17" +#elif CXX_STD >= 201402L + "14" +#elif CXX_STD >= 201103L + "11" +#else + "98" +#endif +"]"; + +/*--------------------------------------------------------------------------*/ + +int main(int argc, char* argv[]) +{ + int require = 0; + require += info_compiler[argc]; + require += info_platform[argc]; +#ifdef COMPILER_VERSION_MAJOR + require += info_version[argc]; +#endif +#ifdef COMPILER_VERSION_INTERNAL + require += info_version_internal[argc]; +#endif +#ifdef SIMULATE_ID + require += info_simulate[argc]; +#endif +#ifdef SIMULATE_VERSION_MAJOR + require += info_simulate_version[argc]; +#endif +#if defined(__CRAYXE) || defined(__CRAYXC) + require += info_cray[argc]; +#endif + require += info_language_dialect_default[argc]; + (void)argv; + return require; +} diff --git a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdCXX/a.out b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdCXX/a.out new file mode 100755 index 0000000000000000000000000000000000000000..2881803fe1c1315653cec8eead6766e2c9b69693 GIT binary patch literal 16720 zcmeHOe{3699e<9KHtkx+{k4X6TW+P5(v7%ImWH$})K22`jNEo>lP!>C$HjIM3&#%j znI_XZT2h9r5~#FFOai28NC>n_1O6BSX^^U02Z*s%LR(QmM6hZZDqS`h3ed%Tzwf?Z z=kDSTiSZBUp5*(y_xb*K@4oNd`QF`opO3_PsyrUS$tylCuoUu}Oo#;jy_5k6iFUCT zj<<{3#0n@^OU{&sOaQ5wE?3#HmUu59+SOyG0^VlQP=lGcg@|Z(v($(Ug2X83JkYKN z1ypw8ZfYkZ%ggmCXbee_$1+|<1xSomJ8a5)lN5{j4m*aZK9!K|uqaOSN@1VodPYPVsc2VtOez-)YxRc24XjJ4UPn(~+x2;yI(23lmr*e96m7?S&JMes`|;eE#*9SDz@{#Xhi3)WL-IJS4D; zd8`9<%=141IU37=my*94lf+F9?Z7J)WLtn+UxDuhPN~4hZ^GXK{I&}E0^%3PaJ30d zi%;mP-UD6f zY$n;O52ev^WGtH@OU+cRs3_ZGMv-Ibfe2y@d0Z5>q*h^cKSFKi>yxhwWt}NlpzD_T zS#nStGUd#3+3(;L#nh{J@HyfY2mdAF8y)-;#9!VgWWuq4=fi2%!t*(!Y|g^-*hGHb z!t*tT{DOs-_e&(*|9if^XmEQ`_%IbUe$9^y|id-1P43FL2YSvxUK=(#rD|V;~fzYi^AP~>QqM+ zX4T?VV~u*MV+9oEc9u$|xda?8*4z$d&mh>^?B6^JLUhyzcEw}Y)M8=w#mEh8rh01A zFJPvADsoMIQuVx2_pGS<$&4p*1Na|T;!VZrO)vN$n$K4I%i7Fj;Uv}t z;Sb4phaZehciaOrm+%A8;;Z4lXz|@}Z@74)Pn~Ys4)l@O&iAlS=NcAECH4G!UZbJ; z3dJ*4d?!}C-d%hnT-x}1b?Smg-SfM`pRm6N2Ez}92g47CwF|>bb>eB`NI;b1q&zZY zliY(F0XG6}1l$O?5pW~mM!=1L8v!>0ZUo#2{EtMyWBb~;ywTBvJ%{$jvt#3_bTT&p zUnvLeIySlXxnwS%%4P(fbxlyo=(OM z_!Ky-7t+Q+bL*h+Z1sK&zh~mNFXOFJDGhiM@C@J?K>T)jY`#=F2Uz`fsq{-g18^g} zhQM#Jm^_ah7M=;eXX~1kwWo>4H3scqk8cJ<_e%MNZ#!gLu?)NfIa+&M z?Ax;Uu6wp`Loxb&2!3FS8D@yj*czTo34RA2kl%Kg4j#@8P91;f6^PM^~0tMByrJAJkC zd**M!ydV6y-|H}tZgL~wM!=1L8v!>0ZUo#2xDjw8;6{KW!0Q@$9V1MEWMW*yinPvg zEtMN-vFL}W%@P^)yVQ1S0R2z^3^6S zjuGN|Q%v`_JX=Jg)geI{d3e_ z_%bZZ96y+b$?~ft|2vhr9pv`E2fRM~1A653tBPVe;`OP#9+lUh?(gc_t2Fiv6*5La z*%N??eN%HmmYN@H2?m0#ftH;n|L+^*g%zyz++h}VFT9iB_3IWI)<$~;uTQu0)#A~L zern3&%&xzpJihGwO2OmM&esa=PdmR#@HnvZs|AlYI}f9mt}8pgMkp2ewIW!N_m%f& z*!|QAzE15tI8m&OnfHoy<@NVgsTWp;&sEglP~OL2*WXya-t9bGofXEXSKL~@KJEIO zg$P+0Gw+3~Jy?i$A^Eco{!ZfgK52Rp;-ip( zQCn^g)`zJFeja!m#P>Z(!T}fOW4(OeWgg!NdBpN~J_&rK_CF)_{UW4522zU&;G?qs zdEh;_)p$}Bi3`Q_v1e&GFLbGg6RWEb%3tCn9c{m8SD1&@*+=lDDc zykgPg>=VGRtJ*C1zRLVrd+lA|ktei(=CA@*$I zG13pwc-}?gm&m`L^!b1A3h?MBNIa>FH^|RUs#m_l1mQLEFki6))GcG zm)G>dgupk~>7zphO_)i9Q^bg4j+hUk%QeD>|L>YN(im{lLx~G zqFr{0+#~}Oym!|kDtS=54-0L7>`-SorXA|(ITGpBdc&Qu2zr%UYvTEWJg4{HOp{FL zhR!BSyKzDx+jblcwahIypljcMqb2fLZB)-BaBoiZ5NIV*8Lf~{CWJh7e#y_3V7oAY zrj$P_fOIIIrz+%rAZeV|Gb06k1iHcgB>>c6QxJy{cMDbA0%YHGWIrkCA3rt-5y(%D z8Tt^Qku!0WbEypMKN=T-Ox8#SMlyxKcrH7h%o&pwYN(Kc9b%~jQQ^*LlcA3YsXnUb zM@1kpnSm-yG;*edzLMAq8pv|Vw2lTMAfpr*Pa6Ucfsrg^jN}9yajb%7R(4(>IZC5* zGy(QpGVRS_YFcm}oa@EkGDY|rzT6mWRTY|qcLj69D56`9b7 zHGLKeIHzHIe(q)D`60KT^%x%mdz>S2nV*jt6{^hHexk)RWH6>|&(G0}3N@JPcb@;( zz!p_lj(@c>5%PSM*k%3yO%Pb^6|!SwcWlpP#-|+i{QS6e1IDY44s-hZ zzQdm91B^VM=lY%F_lIQ9@fQkd5}uWbm1ur-S@_%KLwv`dnuGBiPni?D=_qp$SMxtY?;%%FMq70vvl>fBCr? z)^}r?q5i}1kBRNLAHNM8s<1u3$C#l9xe&;#iR~E|KxnlWA<_<-NI>LL{Y)%E27Ph; z{5%&VL#~JQ>2$a#yg(r5tcUIIE^C?@wzndW9jof6$)QRYHeScrCEOmq|E&U!+itc0 e4*oGfdcfhF>oukL>{;1 + +void* test_func(void* data) +{ + return data; +} + +int main(void) +{ + pthread_t thread; + pthread_create(&thread, NULL, test_func, NULL); + pthread_detach(thread); + pthread_join(thread, NULL); + pthread_atfork(NULL, NULL, NULL); + pthread_exit(NULL); + + return 0; +} + diff --git a/rad-sim/example-designs/add/CMakeFiles/CMakeOutput.log b/rad-sim/example-designs/add/CMakeFiles/CMakeOutput.log new file mode 100644 index 0000000..71dd668 --- /dev/null +++ b/rad-sim/example-designs/add/CMakeFiles/CMakeOutput.log @@ -0,0 +1,477 @@ +The system is: Linux - 5.15.0-69-generic - x86_64 +Compiling the C compiler identification source file "CMakeCCompilerId.c" succeeded. +Compiler: /usr/bin/cc +Build flags: +Id flags: + +The output was: +0 + + +Compilation of the C compiler identification source "CMakeCCompilerId.c" produced "a.out" + +The C compiler identification is GNU, found in "/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/a.out" + +Compiling the CXX compiler identification source file "CMakeCXXCompilerId.cpp" succeeded. +Compiler: /usr/bin/c++ +Build flags: +Id flags: + +The output was: +0 + + +Compilation of the CXX compiler identification source "CMakeCXXCompilerId.cpp" produced "a.out" + +The CXX compiler identification is GNU, found in "/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdCXX/a.out" + +Determining if the C compiler works passed with the following output: +Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp + +Run Build Command(s):/usr/bin/make cmTC_9f9dc/fast && /usr/bin/make -f CMakeFiles/cmTC_9f9dc.dir/build.make CMakeFiles/cmTC_9f9dc.dir/build +make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' +Building C object CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o +/usr/bin/cc -o CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/testCCompiler.c +Linking C executable cmTC_9f9dc +/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_9f9dc.dir/link.txt --verbose=1 +/usr/bin/cc -rdynamic CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o -o cmTC_9f9dc +make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' + + + +Detecting C compiler ABI info compiled with the following output: +Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp + +Run Build Command(s):/usr/bin/make cmTC_5eca0/fast && /usr/bin/make -f CMakeFiles/cmTC_5eca0.dir/build.make CMakeFiles/cmTC_5eca0.dir/build +make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' +Building C object CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o +/usr/bin/cc -v -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -c /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c +Using built-in specs. +COLLECT_GCC=/usr/bin/cc +OFFLOAD_TARGET_NAMES=nvptx-none:hsa +OFFLOAD_TARGET_DEFAULT=1 +Target: x86_64-linux-gnu +Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu +Thread model: posix +gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' + /usr/lib/gcc/x86_64-linux-gnu/9/cc1 -quiet -v -imultiarch x86_64-linux-gnu /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c -quiet -dumpbase CMakeCCompilerABI.c -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccEZ3Z6E.s +GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) + compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP + +GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 +ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu" +ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed" +ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include" +#include "..." search starts here: +#include <...> search starts here: + /usr/lib/gcc/x86_64-linux-gnu/9/include + /usr/local/include + /usr/include/x86_64-linux-gnu + /usr/include +End of search list. +GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) + compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP + +GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 +Compiler executable checksum: 01da938ff5dc2163489aa33cb3b747a7 +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' + as -v --64 -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o /tmp/ccEZ3Z6E.s +GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34 +COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ +LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' +Linking C executable cmTC_5eca0 +/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_5eca0.dir/link.txt --verbose=1 +/usr/bin/cc -v -rdynamic CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -o cmTC_5eca0 +Using built-in specs. +COLLECT_GCC=/usr/bin/cc +COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper +OFFLOAD_TARGET_NAMES=nvptx-none:hsa +OFFLOAD_TARGET_DEFAULT=1 +Target: x86_64-linux-gnu +Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu +Thread model: posix +gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) +COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ +LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ +COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64' + /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/ccjwqw95.res -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_5eca0 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -lgcc --push-state --as-needed -lgcc_s --pop-state -lc -lgcc --push-state --as-needed -lgcc_s --pop-state /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o +COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64' +make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' + + + +Parsed C implicit include dir info from above output: rv=done + found start of include info + found start of implicit include info + add: [/usr/lib/gcc/x86_64-linux-gnu/9/include] + add: [/usr/local/include] + add: [/usr/include/x86_64-linux-gnu] + add: [/usr/include] + end of search list found + collapse include dir [/usr/lib/gcc/x86_64-linux-gnu/9/include] ==> [/usr/lib/gcc/x86_64-linux-gnu/9/include] + collapse include dir [/usr/local/include] ==> [/usr/local/include] + collapse include dir [/usr/include/x86_64-linux-gnu] ==> [/usr/include/x86_64-linux-gnu] + collapse include dir [/usr/include] ==> [/usr/include] + implicit include dirs: [/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include] + + +Parsed C implicit link information from above output: + link line regex: [^( *|.*[/\])(ld|CMAKE_LINK_STARTFILE-NOTFOUND|([^/\]+-)?ld|collect2)[^/\]*( |$)] + ignore line: [Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp] + ignore line: [] + ignore line: [Run Build Command(s):/usr/bin/make cmTC_5eca0/fast && /usr/bin/make -f CMakeFiles/cmTC_5eca0.dir/build.make CMakeFiles/cmTC_5eca0.dir/build] + ignore line: [make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp'] + ignore line: [Building C object CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o] + ignore line: [/usr/bin/cc -v -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -c /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c] + ignore line: [Using built-in specs.] + ignore line: [COLLECT_GCC=/usr/bin/cc] + ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] + ignore line: [OFFLOAD_TARGET_DEFAULT=1] + ignore line: [Target: x86_64-linux-gnu] + ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] + ignore line: [Thread model: posix] + ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] + ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/cc1 -quiet -v -imultiarch x86_64-linux-gnu /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c -quiet -dumpbase CMakeCCompilerABI.c -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccEZ3Z6E.s] + ignore line: [GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] + ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] + ignore line: [] + ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] + ignore line: [ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu"] + ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed"] + ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include"] + ignore line: [#include "..." search starts here:] + ignore line: [#include <...> search starts here:] + ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/include] + ignore line: [ /usr/local/include] + ignore line: [ /usr/include/x86_64-linux-gnu] + ignore line: [ /usr/include] + ignore line: [End of search list.] + ignore line: [GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] + ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] + ignore line: [] + ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] + ignore line: [Compiler executable checksum: 01da938ff5dc2163489aa33cb3b747a7] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] + ignore line: [ as -v --64 -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o /tmp/ccEZ3Z6E.s] + ignore line: [GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34] + ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] + ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] + ignore line: [Linking C executable cmTC_5eca0] + ignore line: [/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_5eca0.dir/link.txt --verbose=1] + ignore line: [/usr/bin/cc -v -rdynamic CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -o cmTC_5eca0 ] + ignore line: [Using built-in specs.] + ignore line: [COLLECT_GCC=/usr/bin/cc] + ignore line: [COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] + ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] + ignore line: [OFFLOAD_TARGET_DEFAULT=1] + ignore line: [Target: x86_64-linux-gnu] + ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] + ignore line: [Thread model: posix] + ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] + ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] + ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64'] + link line: [ /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/ccjwqw95.res -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_5eca0 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -lgcc --push-state --as-needed -lgcc_s --pop-state -lc -lgcc --push-state --as-needed -lgcc_s --pop-state /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] + arg [/usr/lib/gcc/x86_64-linux-gnu/9/collect2] ==> ignore + arg [-plugin] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so] ==> ignore + arg [-plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] ==> ignore + arg [-plugin-opt=-fresolution=/tmp/ccjwqw95.res] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore + arg [-plugin-opt=-pass-through=-lc] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore + arg [--build-id] ==> ignore + arg [--eh-frame-hdr] ==> ignore + arg [-m] ==> ignore + arg [elf_x86_64] ==> ignore + arg [--hash-style=gnu] ==> ignore + arg [--as-needed] ==> ignore + arg [-export-dynamic] ==> ignore + arg [-dynamic-linker] ==> ignore + arg [/lib64/ld-linux-x86-64.so.2] ==> ignore + arg [-pie] ==> ignore + arg [-znow] ==> ignore + arg [-zrelro] ==> ignore + arg [-o] ==> ignore + arg [cmTC_5eca0] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o] ==> ignore + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] + arg [-L/lib/x86_64-linux-gnu] ==> dir [/lib/x86_64-linux-gnu] + arg [-L/lib/../lib] ==> dir [/lib/../lib] + arg [-L/usr/lib/x86_64-linux-gnu] ==> dir [/usr/lib/x86_64-linux-gnu] + arg [-L/usr/lib/../lib] ==> dir [/usr/lib/../lib] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] + arg [CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o] ==> ignore + arg [-lgcc] ==> lib [gcc] + arg [--push-state] ==> ignore + arg [--as-needed] ==> ignore + arg [-lgcc_s] ==> lib [gcc_s] + arg [--pop-state] ==> ignore + arg [-lc] ==> lib [c] + arg [-lgcc] ==> lib [gcc] + arg [--push-state] ==> ignore + arg [--as-needed] ==> ignore + arg [-lgcc_s] ==> lib [gcc_s] + arg [--pop-state] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] ==> ignore + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9] ==> [/usr/lib/gcc/x86_64-linux-gnu/9] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> [/usr/lib] + collapse library dir [/lib/x86_64-linux-gnu] ==> [/lib/x86_64-linux-gnu] + collapse library dir [/lib/../lib] ==> [/lib] + collapse library dir [/usr/lib/x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] + collapse library dir [/usr/lib/../lib] ==> [/usr/lib] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> [/usr/lib] + implicit libs: [gcc;gcc_s;c;gcc;gcc_s] + implicit dirs: [/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib] + implicit fwks: [] + + +Determining if the CXX compiler works passed with the following output: +Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp + +Run Build Command(s):/usr/bin/make cmTC_8e0c3/fast && /usr/bin/make -f CMakeFiles/cmTC_8e0c3.dir/build.make CMakeFiles/cmTC_8e0c3.dir/build +make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' +Building CXX object CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o +/usr/bin/c++ -o CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/testCXXCompiler.cxx +Linking CXX executable cmTC_8e0c3 +/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_8e0c3.dir/link.txt --verbose=1 +/usr/bin/c++ -rdynamic CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o -o cmTC_8e0c3 +make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' + + + +Detecting CXX compiler ABI info compiled with the following output: +Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp + +Run Build Command(s):/usr/bin/make cmTC_59ff1/fast && /usr/bin/make -f CMakeFiles/cmTC_59ff1.dir/build.make CMakeFiles/cmTC_59ff1.dir/build +make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' +Building CXX object CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o +/usr/bin/c++ -v -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -c /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp +Using built-in specs. +COLLECT_GCC=/usr/bin/c++ +OFFLOAD_TARGET_NAMES=nvptx-none:hsa +OFFLOAD_TARGET_DEFAULT=1 +Target: x86_64-linux-gnu +Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu +Thread model: posix +gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' + /usr/lib/gcc/x86_64-linux-gnu/9/cc1plus -quiet -v -imultiarch x86_64-linux-gnu -D_GNU_SOURCE /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp -quiet -dumpbase CMakeCXXCompilerABI.cpp -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccETTYVz.s +GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) + compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP + +GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 +ignoring duplicate directory "/usr/include/x86_64-linux-gnu/c++/9" +ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu" +ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed" +ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include" +#include "..." search starts here: +#include <...> search starts here: + /usr/include/c++/9 + /usr/include/x86_64-linux-gnu/c++/9 + /usr/include/c++/9/backward + /usr/lib/gcc/x86_64-linux-gnu/9/include + /usr/local/include + /usr/include/x86_64-linux-gnu + /usr/include +End of search list. +GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) + compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP + +GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 +Compiler executable checksum: 3d1eba838554fa2348dba760e4770469 +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' + as -v --64 -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o /tmp/ccETTYVz.s +GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34 +COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ +LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' +Linking CXX executable cmTC_59ff1 +/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_59ff1.dir/link.txt --verbose=1 +/usr/bin/c++ -v -rdynamic CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -o cmTC_59ff1 +Using built-in specs. +COLLECT_GCC=/usr/bin/c++ +COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper +OFFLOAD_TARGET_NAMES=nvptx-none:hsa +OFFLOAD_TARGET_DEFAULT=1 +Target: x86_64-linux-gnu +Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu +Thread model: posix +gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) +COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ +LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ +COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64' + /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/cco0EvR4.res -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_59ff1 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -lstdc++ -lm -lgcc_s -lgcc -lc -lgcc_s -lgcc /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o +COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64' +make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' + + + +Parsed CXX implicit include dir info from above output: rv=done + found start of include info + found start of implicit include info + add: [/usr/include/c++/9] + add: [/usr/include/x86_64-linux-gnu/c++/9] + add: [/usr/include/c++/9/backward] + add: [/usr/lib/gcc/x86_64-linux-gnu/9/include] + add: [/usr/local/include] + add: [/usr/include/x86_64-linux-gnu] + add: [/usr/include] + end of search list found + collapse include dir [/usr/include/c++/9] ==> [/usr/include/c++/9] + collapse include dir [/usr/include/x86_64-linux-gnu/c++/9] ==> [/usr/include/x86_64-linux-gnu/c++/9] + collapse include dir [/usr/include/c++/9/backward] ==> [/usr/include/c++/9/backward] + collapse include dir [/usr/lib/gcc/x86_64-linux-gnu/9/include] ==> [/usr/lib/gcc/x86_64-linux-gnu/9/include] + collapse include dir [/usr/local/include] ==> [/usr/local/include] + collapse include dir [/usr/include/x86_64-linux-gnu] ==> [/usr/include/x86_64-linux-gnu] + collapse include dir [/usr/include] ==> [/usr/include] + implicit include dirs: [/usr/include/c++/9;/usr/include/x86_64-linux-gnu/c++/9;/usr/include/c++/9/backward;/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include] + + +Parsed CXX implicit link information from above output: + link line regex: [^( *|.*[/\])(ld|CMAKE_LINK_STARTFILE-NOTFOUND|([^/\]+-)?ld|collect2)[^/\]*( |$)] + ignore line: [Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp] + ignore line: [] + ignore line: [Run Build Command(s):/usr/bin/make cmTC_59ff1/fast && /usr/bin/make -f CMakeFiles/cmTC_59ff1.dir/build.make CMakeFiles/cmTC_59ff1.dir/build] + ignore line: [make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp'] + ignore line: [Building CXX object CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o] + ignore line: [/usr/bin/c++ -v -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -c /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp] + ignore line: [Using built-in specs.] + ignore line: [COLLECT_GCC=/usr/bin/c++] + ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] + ignore line: [OFFLOAD_TARGET_DEFAULT=1] + ignore line: [Target: x86_64-linux-gnu] + ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] + ignore line: [Thread model: posix] + ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] + ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/cc1plus -quiet -v -imultiarch x86_64-linux-gnu -D_GNU_SOURCE /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp -quiet -dumpbase CMakeCXXCompilerABI.cpp -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccETTYVz.s] + ignore line: [GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] + ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] + ignore line: [] + ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] + ignore line: [ignoring duplicate directory "/usr/include/x86_64-linux-gnu/c++/9"] + ignore line: [ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu"] + ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed"] + ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include"] + ignore line: [#include "..." search starts here:] + ignore line: [#include <...> search starts here:] + ignore line: [ /usr/include/c++/9] + ignore line: [ /usr/include/x86_64-linux-gnu/c++/9] + ignore line: [ /usr/include/c++/9/backward] + ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/include] + ignore line: [ /usr/local/include] + ignore line: [ /usr/include/x86_64-linux-gnu] + ignore line: [ /usr/include] + ignore line: [End of search list.] + ignore line: [GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] + ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] + ignore line: [] + ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] + ignore line: [Compiler executable checksum: 3d1eba838554fa2348dba760e4770469] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] + ignore line: [ as -v --64 -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o /tmp/ccETTYVz.s] + ignore line: [GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34] + ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] + ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] + ignore line: [Linking CXX executable cmTC_59ff1] + ignore line: [/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_59ff1.dir/link.txt --verbose=1] + ignore line: [/usr/bin/c++ -v -rdynamic CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -o cmTC_59ff1 ] + ignore line: [Using built-in specs.] + ignore line: [COLLECT_GCC=/usr/bin/c++] + ignore line: [COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] + ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] + ignore line: [OFFLOAD_TARGET_DEFAULT=1] + ignore line: [Target: x86_64-linux-gnu] + ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] + ignore line: [Thread model: posix] + ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] + ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] + ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] + link line: [ /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/cco0EvR4.res -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_59ff1 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -lstdc++ -lm -lgcc_s -lgcc -lc -lgcc_s -lgcc /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] + arg [/usr/lib/gcc/x86_64-linux-gnu/9/collect2] ==> ignore + arg [-plugin] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so] ==> ignore + arg [-plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] ==> ignore + arg [-plugin-opt=-fresolution=/tmp/cco0EvR4.res] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc] ==> ignore + arg [-plugin-opt=-pass-through=-lc] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc] ==> ignore + arg [--build-id] ==> ignore + arg [--eh-frame-hdr] ==> ignore + arg [-m] ==> ignore + arg [elf_x86_64] ==> ignore + arg [--hash-style=gnu] ==> ignore + arg [--as-needed] ==> ignore + arg [-export-dynamic] ==> ignore + arg [-dynamic-linker] ==> ignore + arg [/lib64/ld-linux-x86-64.so.2] ==> ignore + arg [-pie] ==> ignore + arg [-znow] ==> ignore + arg [-zrelro] ==> ignore + arg [-o] ==> ignore + arg [cmTC_59ff1] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o] ==> ignore + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] + arg [-L/lib/x86_64-linux-gnu] ==> dir [/lib/x86_64-linux-gnu] + arg [-L/lib/../lib] ==> dir [/lib/../lib] + arg [-L/usr/lib/x86_64-linux-gnu] ==> dir [/usr/lib/x86_64-linux-gnu] + arg [-L/usr/lib/../lib] ==> dir [/usr/lib/../lib] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] + arg [CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o] ==> ignore + arg [-lstdc++] ==> lib [stdc++] + arg [-lm] ==> lib [m] + arg [-lgcc_s] ==> lib [gcc_s] + arg [-lgcc] ==> lib [gcc] + arg [-lc] ==> lib [c] + arg [-lgcc_s] ==> lib [gcc_s] + arg [-lgcc] ==> lib [gcc] + arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] ==> ignore + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9] ==> [/usr/lib/gcc/x86_64-linux-gnu/9] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> [/usr/lib] + collapse library dir [/lib/x86_64-linux-gnu] ==> [/lib/x86_64-linux-gnu] + collapse library dir [/lib/../lib] ==> [/lib] + collapse library dir [/usr/lib/x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] + collapse library dir [/usr/lib/../lib] ==> [/usr/lib] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> [/usr/lib] + implicit libs: [stdc++;m;gcc_s;gcc;c;gcc_s;gcc] + implicit dirs: [/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib] + implicit fwks: [] + + +Determining if the include file pthread.h exists passed with the following output: +Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp + +Run Build Command(s):/usr/bin/make cmTC_9b3d4/fast && /usr/bin/make -f CMakeFiles/cmTC_9b3d4.dir/build.make CMakeFiles/cmTC_9b3d4.dir/build +make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' +Building C object CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o +/usr/bin/cc -o CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/CheckIncludeFile.c +Linking C executable cmTC_9b3d4 +/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_9b3d4.dir/link.txt --verbose=1 +/usr/bin/cc CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o -o cmTC_9b3d4 +make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' + + + diff --git a/rad-sim/example-designs/add/CMakeFiles/cmake.check_cache b/rad-sim/example-designs/add/CMakeFiles/cmake.check_cache new file mode 100644 index 0000000..3dccd73 --- /dev/null +++ b/rad-sim/example-designs/add/CMakeFiles/cmake.check_cache @@ -0,0 +1 @@ +# This file is generated by cmake for dependency checking of the CMakeCache.txt file diff --git a/rad-sim/example-designs/add/add_system.cpp b/rad-sim/example-designs/add/add_system.cpp index faec250..543ea54 100644 --- a/rad-sim/example-designs/add/add_system.cpp +++ b/rad-sim/example-designs/add/add_system.cpp @@ -1,6 +1,6 @@ #include -add_system::add_system(const sc_module_name &name, sc_clock *driver_clk_sig) +add_system::add_system(const sc_module_name &name, sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design) // AKB: added last arg : sc_module(name) { // Instantiate driver @@ -15,7 +15,7 @@ add_system::add_system(const sc_module_name &name, sc_clock *driver_clk_sig) driver_inst->response_valid(response_valid_sig); // Instantiate design top-level - dut_inst = new add_top("dut"); + dut_inst = new add_top("dut", radsim_design); //AKB added last arg dut_inst->rst(rst_sig); dut_inst->client_tdata(client_tdata_sig); dut_inst->client_tlast(client_tlast_sig); diff --git a/rad-sim/example-designs/add/add_system.hpp b/rad-sim/example-designs/add/add_system.hpp index 6911498..597369a 100644 --- a/rad-sim/example-designs/add/add_system.hpp +++ b/rad-sim/example-designs/add/add_system.hpp @@ -21,6 +21,6 @@ class add_system : public sc_module { add_top *dut_inst; add_system(const sc_module_name &name, - sc_clock *driver_clk_sig); + sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design); ////AKB added last arg ~add_system(); }; \ No newline at end of file diff --git a/rad-sim/example-designs/add/add_top.cpp b/rad-sim/example-designs/add/add_top.cpp index d20fe63..67a9baa 100644 --- a/rad-sim/example-designs/add/add_top.cpp +++ b/rad-sim/example-designs/add/add_top.cpp @@ -1,6 +1,6 @@ #include -add_top::add_top(const sc_module_name &name) +add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : sc_module(name) { std::string module_name_str; @@ -9,7 +9,7 @@ add_top::add_top(const sc_module_name &name) module_name_str = "client_inst"; std::strcpy(module_name, module_name_str.c_str()); - client_inst = new client(module_name, 16); + client_inst = new client(module_name, 16, radsim_design); //AKB added last arg client_inst->rst(rst); client_inst->client_tdata(client_tdata); client_inst->client_tlast(client_tlast); @@ -18,15 +18,15 @@ add_top::add_top(const sc_module_name &name) module_name_str = "adder_inst"; std::strcpy(module_name, module_name_str.c_str()); - adder_inst = new adder(module_name); + adder_inst = new adder(module_name, radsim_design); //AKB added last arg adder_inst->rst(rst); adder_inst->response(response); adder_inst->response_valid(response_valid); - radsim_design.BuildDesignContext("add.place", - "add.clks"); - radsim_design.CreateSystemNoCs(rst); - radsim_design.ConnectModulesToNoC(); + radsim_design->BuildDesignContext("add.place", + "add.clks"); //AKB changed to ptr deref + radsim_design->CreateSystemNoCs(rst); //AKB changed to ptr deref + radsim_design->ConnectModulesToNoC(); //AKB changed to ptr deref } add_top::~add_top() { diff --git a/rad-sim/example-designs/add/add_top.hpp b/rad-sim/example-designs/add/add_top.hpp index 23a51fb..280c855 100644 --- a/rad-sim/example-designs/add/add_top.hpp +++ b/rad-sim/example-designs/add/add_top.hpp @@ -21,6 +21,6 @@ class add_top : public sc_module { sc_out> response; sc_out response_valid; - add_top(const sc_module_name &name); + add_top(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB ADDED last arg ~add_top(); }; \ No newline at end of file diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index 0a8ecf6..1d84ed7 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -1,7 +1,7 @@ #include -adder::adder(const sc_module_name &name) - : RADSimModule(name) { +adder::adder(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg + : RADSimModule(name, radsim_design) { // Combinational logic and its sensitivity list SC_METHOD(Assign); diff --git a/rad-sim/example-designs/add/modules/adder.hpp b/rad-sim/example-designs/add/modules/adder.hpp index 364ad05..b563cee 100644 --- a/rad-sim/example-designs/add/modules/adder.hpp +++ b/rad-sim/example-designs/add/modules/adder.hpp @@ -22,7 +22,7 @@ class adder : public RADSimModule { // Interface to the NoC axis_slave_port axis_adder_interface; - adder(const sc_module_name &name); + adder(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg ~adder(); void Assign(); // Combinational logic process diff --git a/rad-sim/example-designs/add/modules/client.cpp b/rad-sim/example-designs/add/modules/client.cpp index 24c13e2..d059710 100644 --- a/rad-sim/example-designs/add/modules/client.cpp +++ b/rad-sim/example-designs/add/modules/client.cpp @@ -1,7 +1,9 @@ #include -client::client(const sc_module_name &name, unsigned int fifo_depth) - : RADSimModule(name) { +client::client(const sc_module_name &name, unsigned int fifo_depth, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design) { + + this->radsim_design = radsim_design; //AKB ADDED client_fifo_depth = fifo_depth; @@ -54,8 +56,8 @@ void client::Tick() { if (!client_tdata_fifo.empty()) { sc_bv tdata = client_tdata_fifo.front(); std::string dst_port_name = "adder_inst.axis_adder_interface"; - uint64_t dst_addr = radsim_design.GetPortDestinationID(dst_port_name); - uint64_t src_addr = radsim_design.GetPortDestinationID(src_port_name); + uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref + uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref axis_client_interface.tdest.write(dst_addr); axis_client_interface.tid.write(0); diff --git a/rad-sim/example-designs/add/modules/client.hpp b/rad-sim/example-designs/add/modules/client.hpp index c08e0cb..fd60655 100644 --- a/rad-sim/example-designs/add/modules/client.hpp +++ b/rad-sim/example-designs/add/modules/client.hpp @@ -27,8 +27,10 @@ class client : public RADSimModule { sc_out client_ready; // Interface to the NoC axis_master_port axis_client_interface; + //AKB added bc used in functions outside of constructor: + RADSimDesignContext* radsim_design; - client(const sc_module_name &name, unsigned int fifo_depth); + client(const sc_module_name &name, unsigned int fifo_depth, RADSimDesignContext* radsim_design); //AKB added last arg ~client(); void Assign(); // Combinational logic process diff --git a/rad-sim/sim/design_context.cpp b/rad-sim/sim/design_context.cpp index c2e292e..b3d44d7 100644 --- a/rad-sim/sim/design_context.cpp +++ b/rad-sim/sim/design_context.cpp @@ -468,7 +468,8 @@ void RADSimDesignContext::CreateSystemNoCs(sc_in &rst) { _noc_axis_master_adapter_info[noc_id], _noc_axis_slave_adapter_info[noc_id], _noc_aximm_master_adapter_info[noc_id], - _noc_aximm_slave_adapter_info[noc_id]); + _noc_aximm_slave_adapter_info[noc_id], + this); //AKB ADDED to pass in an instance of this class noc_inst->noc_clk(*_noc_clks[noc_id]); noc_inst->rst(rst); diff --git a/rad-sim/sim/design_context.hpp b/rad-sim/sim/design_context.hpp index 3a32abb..a3c54f9 100644 --- a/rad-sim/sim/design_context.hpp +++ b/rad-sim/sim/design_context.hpp @@ -98,4 +98,4 @@ class RADSimDesignContext { uint64_t GetPortBaseAddress(std::string &port_name); }; -extern RADSimDesignContext radsim_design; \ No newline at end of file +//extern RADSimDesignContext radsim_design; //AKB: commented out \ No newline at end of file diff --git a/rad-sim/sim/dram/mem_controller.cpp b/rad-sim/sim/dram/mem_controller.cpp index 7d82535..00b6712 100644 --- a/rad-sim/sim/dram/mem_controller.cpp +++ b/rad-sim/sim/dram/mem_controller.cpp @@ -30,8 +30,8 @@ void mem_controller::InitializeMemoryContents(std::string &init_filename) { } mem_controller::mem_controller(const sc_module_name &name, unsigned int dram_id, - std::string init_filename) - : RADSimModule(name), mem_clk("mem_clk"), rst("rst") { + RADSimDesignContext* radsim_design, std::string init_filename) //AKB added radsim_design + : RADSimModule(name, radsim_design), mem_clk("mem_clk"), rst("rst") { //AKB added radsim_design std::string config_file = radsim_config.GetStringKnob("radsim_root_dir") + diff --git a/rad-sim/sim/dram/mem_controller.hpp b/rad-sim/sim/dram/mem_controller.hpp index 7495ece..34cd26b 100644 --- a/rad-sim/sim/dram/mem_controller.hpp +++ b/rad-sim/sim/dram/mem_controller.hpp @@ -82,9 +82,11 @@ class mem_controller : public RADSimModule { sc_in mem_clk; sc_in rst; sc_vector mem_channels; + RADSimDesignContext* radsim_design; mem_controller(const sc_module_name &name, unsigned int dram_id, - std::string init_filename = ""); + RADSimDesignContext* radsim_design, + std::string init_filename = ""); //AKB: added radsim_design, note that argument(s) with defaults must be at end ~mem_controller(); void MemReadCallback(uint64_t addr); diff --git a/rad-sim/sim/dram/mem_controller_test.cpp b/rad-sim/sim/dram/mem_controller_test.cpp index 62dd6c5..02ab9c1 100644 --- a/rad-sim/sim/dram/mem_controller_test.cpp +++ b/rad-sim/sim/dram/mem_controller_test.cpp @@ -4,9 +4,11 @@ mem_controller_test::mem_controller_test( const sc_module_name &name, unsigned int num_cmds, unsigned int test_mode, unsigned int burst_size, unsigned int num_channels, unsigned int mem_capacity_mb, unsigned int num_used_channels, - unsigned int addressable_word_size_bytes, double clk_period) + unsigned int addressable_word_size_bytes, double clk_period, RADSimDesignContext* radsim_design) //AKB added last arg : sc_module(name) { + this -> radsim_design = radsim_design; //AKB ADDED + tx_interface.init(num_channels); _burst_size = burst_size; @@ -316,7 +318,7 @@ void mem_controller_test::assign() { } } -mem_controller_system::mem_controller_system(const sc_module_name &name) +mem_controller_system::mem_controller_system(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg : sc_module(name) { double clk_period = 2.0; double mem_clk_period = 1.0; @@ -328,7 +330,7 @@ mem_controller_system::mem_controller_system(const sc_module_name &name) clk_sig = new sc_clock("clk0", clk_period, SC_NS); mem_clk_sig = new sc_clock("mem_clk", mem_clk_period, SC_NS); - dut_inst = new mem_controller("mem_controller", 0); + dut_inst = new mem_controller("mem_controller", 0, radsim_design); //AKB added last arg dut_inst->clk(*clk_sig); dut_inst->mem_clk(*mem_clk_sig); dut_inst->rst(rst_sig); @@ -339,7 +341,7 @@ mem_controller_system::mem_controller_system(const sc_module_name &name) test_inst = new mem_controller_test( "mem_controller_test", total_cmds, mode, burst_size, num_channels, dut_inst->GetMemCapacity(), num_used_channels, - dut_inst->GetAddressableWordSize(), clk_period); + dut_inst->GetAddressableWordSize(), clk_period, radsim_design); //AKB added radsim_design test_inst->clk(*clk_sig); test_inst->rst(rst_sig); diff --git a/rad-sim/sim/dram/mem_controller_test.hpp b/rad-sim/sim/dram/mem_controller_test.hpp index f2d3bdc..e62b7c8 100644 --- a/rad-sim/sim/dram/mem_controller_test.hpp +++ b/rad-sim/sim/dram/mem_controller_test.hpp @@ -28,13 +28,15 @@ class mem_controller_test : public sc_module { sc_in clk; sc_out rst; sc_vector tx_interface; + RADSimDesignContext* radsim_design; //AKB ADDED mem_controller_test(const sc_module_name &name, unsigned int num_cmds, unsigned int test_mode, unsigned int burst_size, unsigned int num_channels, unsigned int mem_capacity_mb, unsigned int num_used_channels, unsigned int addressable_word_size_bytes, - double clk_peiod); + double clk_peiod, + RADSimDesignContext* radsim_design); //AKB ADDED last arg ~mem_controller_test(); void aw_source(); @@ -57,6 +59,6 @@ class mem_controller_system : public sc_module { sc_clock *clk_sig; sc_clock *mem_clk_sig; - mem_controller_system(const sc_module_name &name); + mem_controller_system(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB ADDED last arg ~mem_controller_system(); }; \ No newline at end of file diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 76fba7b..27da4cb 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -5,15 +5,17 @@ #include #include -#include +#include RADSimConfig radsim_config; -RADSimDesignContext radsim_design; +//RADSimDesignContext radsim_design; //AKB: commented out std::ostream *gWatchOut; SimLog sim_log; SimTraceRecording sim_trace_probe; int sc_main(int argc, char *argv[]) { + RADSimDesignContext* radsim_design1 = new RADSimDesignContext(); //AKB: added + RADSimDesignContext* radsim_design2 = new RADSimDesignContext(); //AKB: added gWatchOut = &cout; int log_verbosity = radsim_config.GetIntKnob("telemetry_log_verbosity"); sim_log.SetLogSettings(log_verbosity, "sim.log"); @@ -24,11 +26,21 @@ int sc_main(int argc, char *argv[]) { sc_clock *driver_clk_sig = new sc_clock( "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); - add_multi_system *system = new add_multi_system("add_multi_system", driver_clk_sig); + add_system *system = new add_system("add_system", driver_clk_sig, radsim_design1); //AKB ADDED + + sc_clock *driver_clk_sig2 = new sc_clock( + "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED + + add_system *system2 = new add_system("add_system", driver_clk_sig2, radsim_design2); //AKB ADDED + sc_start(); delete system; + delete system2; //AKB ADDED delete driver_clk_sig; + delete driver_clk_sig2; //AKB ADDED + delete radsim_design1; //AKB ADDED + delete radsim_design2; //AKB ADDED sc_flit scf; scf.FreeAllFlits(); Flit *f = Flit::New(); diff --git a/rad-sim/sim/noc/radsim_noc.cpp b/rad-sim/sim/noc/radsim_noc.cpp index baf7c24..dc791ef 100644 --- a/rad-sim/sim/noc/radsim_noc.cpp +++ b/rad-sim/sim/noc/radsim_noc.cpp @@ -1,4 +1,4 @@ -#include +#include //AKB: moved to header file #include radsim_noc::radsim_noc(const sc_module_name &name, int noc_id, @@ -7,7 +7,8 @@ radsim_noc::radsim_noc(const sc_module_name &name, int noc_id, std::vector &axis_master_adapter_info, std::vector &axis_slave_adapter_info, std::vector &aximm_master_adapter_info, - std::vector &aximm_slave_adapter_info) + std::vector &aximm_slave_adapter_info, + RADSimDesignContext* radsim_design) //AKB: ADDED : sc_module(name), noc_clk("noc_clk"), rst("rst") { _noc_id = noc_id; @@ -56,12 +57,12 @@ radsim_noc::radsim_noc(const sc_module_name &name, int noc_id, // Create NoC AXI-S Master adapters _num_axis_master_endpoints = - radsim_design.GetNumNoCMasterAdapters(_noc_id, false); + radsim_design->GetNumNoCMasterAdapters(_noc_id, false); //AKB to ptr noc_axis_master_ports.init(_num_axis_master_endpoints); for (unsigned int adapter_id = 0; adapter_id < _num_axis_master_endpoints; adapter_id++) { unsigned int num_adapter_ports = - radsim_design.GetNumAxisMasterAdapterPorts(_noc_id, adapter_id); + radsim_design->GetNumAxisMasterAdapterPorts(_noc_id, adapter_id); //AKB to ptr noc_axis_master_ports[adapter_id].init(num_adapter_ports); // Prepare adapter information @@ -94,7 +95,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, int noc_id, axis_master_adapter_info[adapter_id]._port_names[port_id]; master_adapter->axis_interfaces[port_id].ConnectToPort( noc_axis_master_ports[adapter_id][port_id]); - radsim_design.RegisterNoCMasterPort( + radsim_design->RegisterNoCMasterPort( //AKB to ptr _noc_id, port_name, &noc_axis_master_ports[adapter_id][port_id]); } @@ -103,12 +104,12 @@ radsim_noc::radsim_noc(const sc_module_name &name, int noc_id, // Create NoC AXI-S Slave adapters _num_axis_slave_endpoints = - radsim_design.GetNumNoCSlaveAdapters(_noc_id, false); + radsim_design->GetNumNoCSlaveAdapters(_noc_id, false); //AKB to ptr noc_axis_slave_ports.init(_num_axis_slave_endpoints); for (unsigned int adapter_id = 0; adapter_id < _num_axis_slave_endpoints; adapter_id++) { unsigned int num_adapter_ports = - radsim_design.GetNumAxisSlaveAdapterPorts(_noc_id, adapter_id); + radsim_design->GetNumAxisSlaveAdapterPorts(_noc_id, adapter_id); //AKB to ptr noc_axis_slave_ports[adapter_id].init(num_adapter_ports); // Prepare adapter information @@ -144,7 +145,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, int noc_id, axis_slave_adapter_info[adapter_id]._port_names[port_id]; slave_adapter->axis_interfaces[port_id].ConnectToPort( noc_axis_slave_ports[adapter_id][port_id]); - radsim_design.RegisterNoCSlavePort( + radsim_design->RegisterNoCSlavePort( //AKB to ptr _noc_id, port_name, &noc_axis_slave_ports[adapter_id][port_id]); } @@ -153,7 +154,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, int noc_id, // Create NoC AXI-MM Master adapters _num_aximm_slave_endpoints = - radsim_design.GetNumNoCMasterAdapters(_noc_id, true); + radsim_design->GetNumNoCMasterAdapters(_noc_id, true); //AKB to ptr noc_aximm_master_ports.init(_num_aximm_slave_endpoints); for (unsigned int adapter_id = 0; adapter_id < _num_aximm_slave_endpoints; adapter_id++) { @@ -188,7 +189,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, int noc_id, noc_aximm_master_ports[adapter_id]); std::string port_name = aximm_master_adapter_info[adapter_id]._port_names[0]; - radsim_design.RegisterNoCMasterPort(_noc_id, port_name, + radsim_design->RegisterNoCMasterPort(_noc_id, port_name, //AKB to ptr &noc_aximm_master_ports[adapter_id]); _aximm_master_adapters.push_back(master_adapter); @@ -196,7 +197,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, int noc_id, // Create NoC AXI-MM Slave adapters _num_aximm_master_endpoints = - radsim_design.GetNumNoCSlaveAdapters(_noc_id, true); + radsim_design->GetNumNoCSlaveAdapters(_noc_id, true); //AKB to ptr noc_aximm_slave_ports.init(_num_aximm_master_endpoints); for (unsigned int adapter_id = 0; adapter_id < _num_aximm_master_endpoints; adapter_id++) { @@ -230,8 +231,8 @@ radsim_noc::radsim_noc(const sc_module_name &name, int noc_id, slave_adapter->aximm_interface.ConnectToPort( noc_aximm_slave_ports[adapter_id]); std::string port_name = aximm_slave_adapter_info[adapter_id]._port_names[0]; - radsim_design.RegisterNoCSlavePort(_noc_id, port_name, - &noc_aximm_slave_ports[adapter_id]); + radsim_design->RegisterNoCSlavePort(_noc_id, port_name, + &noc_aximm_slave_ports[adapter_id]); //AKB to ptr _aximm_slave_adapters.push_back(slave_adapter); } diff --git a/rad-sim/sim/noc/radsim_noc.hpp b/rad-sim/sim/noc/radsim_noc.hpp index 9e8b0dc..6d16006 100644 --- a/rad-sim/sim/noc/radsim_noc.hpp +++ b/rad-sim/sim/noc/radsim_noc.hpp @@ -15,6 +15,9 @@ #include #include +//#include //AKB ADDED +class RADSimDesignContext; //AKB ADDED + // NoC SystemC wrapper around all Booksim-related datastructures class radsim_noc : public sc_module { private: @@ -50,7 +53,8 @@ class radsim_noc : public sc_module { std::vector &axis_master_adapter_info, std::vector &axis_slave_adapter_info, std::vector &aximm_master_adapter_info, - std::vector &aximm_slave_adapter_info); + std::vector &aximm_slave_adapter_info, + RADSimDesignContext* radsim_design); //AKB: added last argument ~radsim_noc(); Network *GetNetwork(); diff --git a/rad-sim/sim/radsim_defines.hpp b/rad-sim/sim/radsim_defines.hpp index 56f0320..99491ad 100644 --- a/rad-sim/sim/radsim_defines.hpp +++ b/rad-sim/sim/radsim_defines.hpp @@ -1,7 +1,7 @@ #pragma once // clang-format off -#define RADSIM_ROOT_DIR "/home/andrew/rad-flow/rad-sim" +#define RADSIM_ROOT_DIR "/home/bassiabn/rad-sim/rad-flow/rad-sim" // NoC-related Parameters #define NOC_LINKS_PAYLOAD_WIDTH 166 diff --git a/rad-sim/sim/radsim_knobs b/rad-sim/sim/radsim_knobs index 8356548..a57796d 100644 --- a/rad-sim/sim/radsim_knobs +++ b/rad-sim/sim/radsim_knobs @@ -1,5 +1,5 @@ -radsim_root_dir /home/andrew/rad-flow/rad-sim -design_name add_multi +radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim +design_name add noc_num_nocs 1 noc_clk_period 1.0 noc_vcs 5 @@ -20,4 +20,4 @@ dram_num_controllers 0 dram_clk_periods 2.0 dram_queue_sizes 64 dram_config_files HBM2_8Gb_x128 -radsim_user_design_root_dir /home/andrew/rad-flow/rad-sim/example-designs/add_multi +radsim_user_design_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add diff --git a/rad-sim/sim/radsim_module.cpp b/rad-sim/sim/radsim_module.cpp index f5fa763..85869d6 100644 --- a/rad-sim/sim/radsim_module.cpp +++ b/rad-sim/sim/radsim_module.cpp @@ -1,10 +1,10 @@ -#include +#include //AKB: moved to header file #include -RADSimModule::RADSimModule(const sc_module_name &name) : sc_module(name) { +RADSimModule::RADSimModule(const sc_module_name &name, RADSimDesignContext* radsim_design) : sc_module(name) { //AKB radsim_design module_name = name; std::string name_str(static_cast(name)); - radsim_design.RegisterModule(name_str, this); + radsim_design->RegisterModule(name_str, this); //AKB to ptr _num_noc_axis_slave_ports = 0; _num_noc_axis_master_ports = 0; _num_noc_aximm_slave_ports = 0; diff --git a/rad-sim/sim/radsim_module.hpp b/rad-sim/sim/radsim_module.hpp index 99251a5..804584b 100644 --- a/rad-sim/sim/radsim_module.hpp +++ b/rad-sim/sim/radsim_module.hpp @@ -1,11 +1,15 @@ #pragma once +//#include //AKB: added + #include #include #include #include #include +class RADSimDesignContext; //AKB ADDED + class RADSimModule : public sc_module { public: std::string module_name; @@ -25,7 +29,7 @@ class RADSimModule : public sc_module { sc_in clk; - RADSimModule(const sc_module_name &name); + RADSimModule(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB: added last argument ~RADSimModule(); virtual void RegisterModuleInfo() = 0; void RegisterAxisSlavePort(std::string &port_name, axis_slave_port *port_ptr, From 19d3447ab2aa2309336b705cc58fc280d750c964 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sat, 30 Dec 2023 01:48:50 -0500 Subject: [PATCH 005/127] Fixed multiple calls to sc_stop --- rad-sim/example-designs/add/add_driver.cpp | 9 +++++++-- rad-sim/example-designs/add/add_driver.hpp | 3 ++- rad-sim/example-designs/add/add_system.cpp | 2 +- rad-sim/sim/design_context.cpp | 13 +++++++++++++ rad-sim/sim/design_context.hpp | 6 ++++++ rad-sim/sim/main.cpp | 8 +++++++- 6 files changed, 36 insertions(+), 5 deletions(-) diff --git a/rad-sim/example-designs/add/add_driver.cpp b/rad-sim/example-designs/add/add_driver.cpp index 388f289..38dfd1c 100644 --- a/rad-sim/example-designs/add/add_driver.cpp +++ b/rad-sim/example-designs/add/add_driver.cpp @@ -2,8 +2,10 @@ #define NUM_ADDENDS 3 -add_driver::add_driver(const sc_module_name &name) +add_driver::add_driver(const sc_module_name &name, RADSimDesignContext* radsim_design) : sc_module(name) { + + this->radsim_design_ = radsim_design; //AKB ADDED: update member for later use // Random Seed srand (time(NULL)); @@ -59,5 +61,8 @@ void add_driver::sink() { if (response.read() != actual_sum) std::cout << "FAILURE - Output is not matching!" << std::endl; else std::cout << "SUCCESS - Output is matching!" << std::endl; - sc_stop(); + //sc_stop(); //AKB: replaced with setting flag + this->radsim_design_->set_rad_done(); //AKB ADDED: flag to replace sc_stop calls + return; //AKB ADDED + } \ No newline at end of file diff --git a/rad-sim/example-designs/add/add_driver.hpp b/rad-sim/example-designs/add/add_driver.hpp index baae941..2898491 100644 --- a/rad-sim/example-designs/add/add_driver.hpp +++ b/rad-sim/example-designs/add/add_driver.hpp @@ -12,6 +12,7 @@ class add_driver : public sc_module { private: std::queue numbers_to_send; int actual_sum; + RADSimDesignContext* radsim_design_; //AKB ADDED: store ptr passed into constructor for use in source() and sink() public: sc_in clk; @@ -23,7 +24,7 @@ class add_driver : public sc_module { sc_in> response; sc_in response_valid; - add_driver(const sc_module_name &name); + add_driver(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB ADDED last arg ~add_driver(); void source(); diff --git a/rad-sim/example-designs/add/add_system.cpp b/rad-sim/example-designs/add/add_system.cpp index 543ea54..78cee81 100644 --- a/rad-sim/example-designs/add/add_system.cpp +++ b/rad-sim/example-designs/add/add_system.cpp @@ -4,7 +4,7 @@ add_system::add_system(const sc_module_name &name, sc_clock *driver_clk_sig, RAD : sc_module(name) { // Instantiate driver - driver_inst = new add_driver("driver"); + driver_inst = new add_driver("driver", radsim_design); driver_inst->clk(*driver_clk_sig); driver_inst->rst(rst_sig); driver_inst->client_tdata(client_tdata_sig); diff --git a/rad-sim/sim/design_context.cpp b/rad-sim/sim/design_context.cpp index b3d44d7..7971b20 100644 --- a/rad-sim/sim/design_context.cpp +++ b/rad-sim/sim/design_context.cpp @@ -42,6 +42,8 @@ RADSimDesignContext::RADSimDesignContext() { int num_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", noc_id); _node_module_names[noc_id].resize(num_nodes); } + //AKB ADDED: + rad_done = false; //initially this RAD is not done its simulation design } RADSimDesignContext::~RADSimDesignContext() {} @@ -680,4 +682,15 @@ uint64_t RADSimDesignContext::GetPortBaseAddress(std::string &port_name) { assert(_aximm_port_base_addresses.find(port_name) != _aximm_port_base_addresses.end()); return _aximm_port_base_addresses[port_name]; +} + +//AKB ADDED: returns info (because private member) of if the RAD is done simulation +bool +RADSimDesignContext::is_rad_done() { + return this->rad_done; +} + +void +RADSimDesignContext::set_rad_done() { + this->rad_done = true; } \ No newline at end of file diff --git a/rad-sim/sim/design_context.hpp b/rad-sim/sim/design_context.hpp index a3c54f9..a2992db 100644 --- a/rad-sim/sim/design_context.hpp +++ b/rad-sim/sim/design_context.hpp @@ -52,6 +52,9 @@ class RADSimDesignContext { _noc_aximm_master_ports; std::vector _aximm_signals; + //AKB ADDED: flag to indicate if this device done + bool rad_done; + public: RADSimDesignContext(); ~RADSimDesignContext(); @@ -96,6 +99,9 @@ class RADSimDesignContext { void DumpDesignContext(); std::vector>> &GetNodeModuleNames(); uint64_t GetPortBaseAddress(std::string &port_name); + //AKB ADDED: + bool is_rad_done(); + void set_rad_done(); }; //extern RADSimDesignContext radsim_design; //AKB: commented out \ No newline at end of file diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 27da4cb..c2c88ee 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -33,7 +33,13 @@ int sc_main(int argc, char *argv[]) { add_system *system2 = new add_system("add_system", driver_clk_sig2, radsim_design2); //AKB ADDED - sc_start(); + //sc_start(); //AKB commented out + + //AKB ADDED this code blk: checking for flag to be set for both RADs before calling sc_stop(); + while (!radsim_design1->is_rad_done() && !radsim_design2->is_rad_done()) { + sc_start(1, SC_NS); + } + sc_stop(); delete system; delete system2; //AKB ADDED From 632c3e32a1cc9be2852fa9d31d2bd7f8c6ff4adc Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sun, 31 Dec 2023 02:26:53 -0500 Subject: [PATCH 006/127] Added two approaches of interface between RADs using a new portal module --- rad-sim/example-designs/add/CMakeLists.txt | 2 + rad-sim/example-designs/add/add_system.cpp | 5 ++- rad-sim/example-designs/add/add_system.hpp | 7 +++- rad-sim/example-designs/add/add_top.cpp | 7 ++++ rad-sim/example-designs/add/add_top.hpp | 5 +++ .../example-designs/add/modules/portal.cpp | 40 +++++++++++++++++++ .../example-designs/add/modules/portal.hpp | 26 ++++++++++++ rad-sim/sim/main.cpp | 20 ++++++++++ 8 files changed, 110 insertions(+), 2 deletions(-) create mode 100644 rad-sim/example-designs/add/modules/portal.cpp create mode 100644 rad-sim/example-designs/add/modules/portal.hpp diff --git a/rad-sim/example-designs/add/CMakeLists.txt b/rad-sim/example-designs/add/CMakeLists.txt index 955071a..999b579 100644 --- a/rad-sim/example-designs/add/CMakeLists.txt +++ b/rad-sim/example-designs/add/CMakeLists.txt @@ -14,6 +14,7 @@ include_directories( set(srcfiles modules/adder.cpp modules/client.cpp + modules/portal.cpp add_top.cpp add_driver.cpp add_system.cpp @@ -22,6 +23,7 @@ set(srcfiles set(hdrfiles modules/adder.hpp modules/client.hpp + modules/portal.hpp add_top.hpp add_driver.hpp add_system.hpp diff --git a/rad-sim/example-designs/add/add_system.cpp b/rad-sim/example-designs/add/add_system.cpp index 78cee81..0d7060a 100644 --- a/rad-sim/example-designs/add/add_system.cpp +++ b/rad-sim/example-designs/add/add_system.cpp @@ -1,6 +1,6 @@ #include -add_system::add_system(const sc_module_name &name, sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design) // AKB: added last arg +add_system::add_system(const sc_module_name &name, sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design) // AKB: added last 3 args : sc_module(name) { // Instantiate driver @@ -23,6 +23,9 @@ add_system::add_system(const sc_module_name &name, sc_clock *driver_clk_sig, RAD dut_inst->client_ready(client_ready_sig); dut_inst->response(response_sig); dut_inst->response_valid(response_valid_sig); + //AKB added: + //dut_inst->portal_in(portal_in_sig); + //dut_inst->portal_out(portal_out_sig); } add_system::~add_system() { diff --git a/rad-sim/example-designs/add/add_system.hpp b/rad-sim/example-designs/add/add_system.hpp index 597369a..5df5f09 100644 --- a/rad-sim/example-designs/add/add_system.hpp +++ b/rad-sim/example-designs/add/add_system.hpp @@ -19,8 +19,13 @@ class add_system : public sc_module { sc_clock *sysclk; add_driver *driver_inst; add_top *dut_inst; + //AKB added: + //sc_signal portal_in_sig; + //sc_signal portal_out_sig; + //sc_in portal_in; + //sc_out portal_out; add_system(const sc_module_name &name, - sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design); ////AKB added last arg + sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design); //AKB added last arg ~add_system(); }; \ No newline at end of file diff --git a/rad-sim/example-designs/add/add_top.cpp b/rad-sim/example-designs/add/add_top.cpp index 67a9baa..531bed9 100644 --- a/rad-sim/example-designs/add/add_top.cpp +++ b/rad-sim/example-designs/add/add_top.cpp @@ -23,6 +23,13 @@ add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) adder_inst->response(response); adder_inst->response_valid(response_valid); + //AKB: added code block for portal module + module_name_str = "portal_inst"; + std::strcpy(module_name, module_name_str.c_str()); + portal_inst = new portal(module_name, radsim_design); + portal_inst->portal_in(portal_in); + portal_inst->portal_out(portal_out); + radsim_design->BuildDesignContext("add.place", "add.clks"); //AKB changed to ptr deref radsim_design->CreateSystemNoCs(rst); //AKB changed to ptr deref diff --git a/rad-sim/example-designs/add/add_top.hpp b/rad-sim/example-designs/add/add_top.hpp index 280c855..f8deddd 100644 --- a/rad-sim/example-designs/add/add_top.hpp +++ b/rad-sim/example-designs/add/add_top.hpp @@ -3,6 +3,7 @@ #include #include #include +#include //AKB ADDED #include #include @@ -10,6 +11,7 @@ class add_top : public sc_module { private: adder *adder_inst; client *client_inst; + portal *portal_inst; //AKB added public: sc_in rst; @@ -20,6 +22,9 @@ class add_top : public sc_module { sc_out client_ready; sc_out> response; sc_out response_valid; + //AKB ADDED for portal module: + sc_in portal_in; + sc_out portal_out; add_top(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB ADDED last arg ~add_top(); diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp new file mode 100644 index 0000000..579c5e6 --- /dev/null +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -0,0 +1,40 @@ +#include + +portal::portal(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg + : RADSimModule(name, radsim_design) { + + //maybe add combinational logic if applicable later + SC_CTHREAD(Tick, clk.pos()); + //not connecting to NoC +} + + +portal::~portal() {} + +/*void portal::Assign() { //combinational logic + //maybe add reset signal later +}*/ + +bool counter = 0; +void portal::Tick() { //sequential logic + portal_out.write(counter); + wait(); + //Always @ positive edge of clock + while (true) { + if (counter == 0) { + counter = 1; + } + else { + counter = 0; + } + portal_out.write(counter); + //std::cout << module_name << ": Wire in is showing " << portal_in.read() << std::endl; + //std::cout << counter << std::endl; + wait(); + } +} + +void portal::RegisterModuleInfo() { + //I don't think this is needed unless I add AXI Interface -- nvm, need bc is virtual fn in derived class + +} \ No newline at end of file diff --git a/rad-sim/example-designs/add/modules/portal.hpp b/rad-sim/example-designs/add/modules/portal.hpp new file mode 100644 index 0000000..3ab410f --- /dev/null +++ b/rad-sim/example-designs/add/modules/portal.hpp @@ -0,0 +1,26 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +class portal : public RADSimModule { + private: + public: + sc_in portal_in; + sc_out portal_out; + + portal(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg + ~portal(); + + //void Assign(); // Combinational logic process + void Tick(); // Sequential logic process + SC_HAS_PROCESS(portal); + void RegisterModuleInfo(); //even tho did not add AXI Interface, need because is virtual fn in derived class +}; \ No newline at end of file diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index c2c88ee..78711a5 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -23,6 +23,7 @@ int sc_main(int argc, char *argv[]) { int num_traces = radsim_config.GetIntKnob("telemetry_num_traces"); sim_trace_probe.SetTraceRecordingSettings("sim.trace", num_traces); + sc_clock *driver_clk_sig = new sc_clock( "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); @@ -33,12 +34,31 @@ int sc_main(int argc, char *argv[]) { add_system *system2 = new add_system("add_system", driver_clk_sig2, radsim_design2); //AKB ADDED + //AKB ADDED signals + sc_signal in_1_out_2; + sc_signal in_2_out_1; + system->dut_inst->portal_in(in_1_out_2); + system->dut_inst->portal_out(in_2_out_1); + system2->dut_inst->portal_in(in_2_out_1); + system2->dut_inst->portal_out(in_1_out_2); + //sc_start(); //AKB commented out //AKB ADDED this code blk: checking for flag to be set for both RADs before calling sc_stop(); + //bool signal1 = 0; + //bool signal2 = 1; while (!radsim_design1->is_rad_done() && !radsim_design2->is_rad_done()) { sc_start(1, SC_NS); + /*in_1_out_2.write(signal1); + in_2_out_1.write(signal2); + signal1 = !(signal1 & signal1); + signal2 = !(signal2 & signal2); + std::cout << signal1 << std::endl; + std::cout << signal2 << std::endl;*/ + std::cout << "read system portal_in: " << system->dut_inst->portal_in.read() << std::endl; + std::cout << "read system2 portal_in: " << system2->dut_inst->portal_in.read() << std::endl; } + //std::cout << "stopping" << std::endl; sc_stop(); delete system; From 3ab85b1afe78708db2f34bb1e02f7d131070040d Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 1 Jan 2024 19:57:17 -0500 Subject: [PATCH 007/127] Added first implementation of RADSimCluster class --- rad-sim/sim/CMakeLists.txt | 2 ++ rad-sim/sim/main.cpp | 19 ++++++++------ rad-sim/sim/radsim_cluster.cpp | 45 ++++++++++++++++++++++++++++++++++ rad-sim/sim/radsim_cluster.hpp | 32 ++++++++++++++++++++++++ 4 files changed, 91 insertions(+), 7 deletions(-) create mode 100644 rad-sim/sim/radsim_cluster.cpp create mode 100644 rad-sim/sim/radsim_cluster.hpp diff --git a/rad-sim/sim/CMakeLists.txt b/rad-sim/sim/CMakeLists.txt index 9492556..2188eb4 100644 --- a/rad-sim/sim/CMakeLists.txt +++ b/rad-sim/sim/CMakeLists.txt @@ -28,6 +28,7 @@ set(srcfiles radsim_module.cpp radsim_telemetry.cpp radsim_utils.cpp + radsim_cluster.cpp ) set(hdrfiles @@ -37,6 +38,7 @@ set(hdrfiles radsim_module.hpp radsim_telemetry.hpp radsim_utils.hpp + radsim_cluster.hpp ) add_compile_options(-Wall -Wextra -pedantic) diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 78711a5..187ce3a 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -4,6 +4,7 @@ #include #include #include +#include //AKB ADDED #include @@ -14,8 +15,12 @@ SimLog sim_log; SimTraceRecording sim_trace_probe; int sc_main(int argc, char *argv[]) { - RADSimDesignContext* radsim_design1 = new RADSimDesignContext(); //AKB: added - RADSimDesignContext* radsim_design2 = new RADSimDesignContext(); //AKB: added + //RADSimDesignContext* radsim_design1 = new RADSimDesignContext(); //AKB: added + //RADSimDesignContext* radsim_design2 = new RADSimDesignContext(); //AKB: added + + //AKB: using RADSimCluster class instead of creating new above + RADSimCluster* cluster = new RADSimCluster(2); + gWatchOut = &cout; int log_verbosity = radsim_config.GetIntKnob("telemetry_log_verbosity"); sim_log.SetLogSettings(log_verbosity, "sim.log"); @@ -27,12 +32,12 @@ int sc_main(int argc, char *argv[]) { sc_clock *driver_clk_sig = new sc_clock( "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); - add_system *system = new add_system("add_system", driver_clk_sig, radsim_design1); //AKB ADDED + add_system *system = new add_system("add_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED sc_clock *driver_clk_sig2 = new sc_clock( "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED - add_system *system2 = new add_system("add_system", driver_clk_sig2, radsim_design2); //AKB ADDED + add_system *system2 = new add_system("add_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED //AKB ADDED signals sc_signal in_1_out_2; @@ -47,7 +52,7 @@ int sc_main(int argc, char *argv[]) { //AKB ADDED this code blk: checking for flag to be set for both RADs before calling sc_stop(); //bool signal1 = 0; //bool signal2 = 1; - while (!radsim_design1->is_rad_done() && !radsim_design2->is_rad_done()) { + while (cluster->AllRADsNotDone()) { sc_start(1, SC_NS); /*in_1_out_2.write(signal1); in_2_out_1.write(signal2); @@ -65,8 +70,8 @@ int sc_main(int argc, char *argv[]) { delete system2; //AKB ADDED delete driver_clk_sig; delete driver_clk_sig2; //AKB ADDED - delete radsim_design1; //AKB ADDED - delete radsim_design2; //AKB ADDED + //delete radsim_design1; //AKB ADDED -- later removed bc have cluster destructor now + //delete radsim_design2; //AKB ADDED -- later removed bc have cluster destructor now sc_flit scf; scf.FreeAllFlits(); Flit *f = Flit::New(); diff --git a/rad-sim/sim/radsim_cluster.cpp b/rad-sim/sim/radsim_cluster.cpp new file mode 100644 index 0000000..e6ebbc2 --- /dev/null +++ b/rad-sim/sim/radsim_cluster.cpp @@ -0,0 +1,45 @@ +#include + +RADSimCluster::RADSimCluster(int num_rads) { + this->num_rads = num_rads; + for (int i = 0; i < num_rads; i++) { + RADSimDesignContext* new_rad = new RADSimDesignContext(); + all_rads.push_back(new_rad); + } + inter_rad_topo = ALL_TO_ALL; + inter_rad_conn_model = WIRE; +} + +RADSimCluster::~RADSimCluster() { + for (int i = 0; i < num_rads; i++) { + delete all_rads[i]; //free the RADs allocated + } +} + +RADSimDesignContext* +RADSimCluster::CreateNewRAD() { + RADSimDesignContext* new_rad = new RADSimDesignContext(); + num_rads++; + all_rads.push_back(new_rad); + return new_rad; +} + +void +RADSimCluster::SetTopo(inter_rad_topo_type inter_rad_topo) { + this->inter_rad_topo = inter_rad_topo; +} + +void +RADSimCluster::SetConnModel(inter_rad_conn_model_type inter_rad_conn_model) { + this->inter_rad_conn_model = inter_rad_conn_model; +} + +bool +RADSimCluster::AllRADsNotDone() { + for (int i = 0; i < num_rads; i++) { + if (!(all_rads[i]->is_rad_done())) { + return true; + } + } + return false; +} diff --git a/rad-sim/sim/radsim_cluster.hpp b/rad-sim/sim/radsim_cluster.hpp new file mode 100644 index 0000000..aae3a3d --- /dev/null +++ b/rad-sim/sim/radsim_cluster.hpp @@ -0,0 +1,32 @@ +#pragma once + +#include +#include +#include +#include + +class RADSimCluster { + private: + public: + int num_rads; + std::vector all_rads; + enum inter_rad_topo_type { + ALL_TO_ALL = 0, + SWITCH = 1, + RING = 2 + }; + enum inter_rad_conn_model_type { + WIRE = 0, + STAT = 1, + SIM = 2 + }; + inter_rad_topo_type inter_rad_topo; + inter_rad_conn_model_type inter_rad_conn_model; + + RADSimCluster(int num_rads); + ~RADSimCluster(); + RADSimDesignContext* CreateNewRAD(); //returns ptr to the newly added RAD + void SetTopo(inter_rad_topo_type inter_rad_topo); + void SetConnModel(inter_rad_conn_model_type inter_rad_topo); + bool AllRADsNotDone(); +}; \ No newline at end of file From 0381ad69d9867c1bc0d83f62d4f54c0d1a0b20bb Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sun, 7 Jan 2024 22:49:53 -0500 Subject: [PATCH 008/127] Manually supporting different designs on multiple RADs --- rad-sim/example-designs/CMakeLists.txt | 3 +- rad-sim/example-designs/add/CMakeLists.txt | 4 +- rad-sim/example-designs/add/add_top.cpp | 4 +- .../example-designs/add/modules/client.cpp | 1 + rad-sim/example-designs/mult/CMakeCache.txt | 379 ++++++++++ .../CMakeFiles/3.16.3/CMakeCCompiler.cmake | 76 ++ .../CMakeFiles/3.16.3/CMakeCXXCompiler.cmake | 88 +++ .../3.16.3/CMakeDetermineCompilerABI_C.bin | Bin 0 -> 16552 bytes .../3.16.3/CMakeDetermineCompilerABI_CXX.bin | Bin 0 -> 16560 bytes .../mult/CMakeFiles/3.16.3/CMakeSystem.cmake | 15 + .../3.16.3/CompilerIdC/CMakeCCompilerId.c | 671 ++++++++++++++++++ .../mult/CMakeFiles/3.16.3/CompilerIdC/a.out | Bin 0 -> 16712 bytes .../CompilerIdCXX/CMakeCXXCompilerId.cpp | 660 +++++++++++++++++ .../CMakeFiles/3.16.3/CompilerIdCXX/a.out | Bin 0 -> 16720 bytes .../mult/CMakeFiles/CMakeError.log | 40 ++ .../mult/CMakeFiles/CMakeOutput.log | 477 +++++++++++++ .../mult/CMakeFiles/cmake.check_cache | 1 + rad-sim/example-designs/mult/CMakeLists.txt | 35 + rad-sim/example-designs/mult/config.yml | 37 + .../mult/modules/client_mult.cpp | 93 +++ .../mult/modules/client_mult.hpp | 40 ++ rad-sim/example-designs/mult/modules/mult.cpp | 67 ++ rad-sim/example-designs/mult/modules/mult.hpp | 32 + .../example-designs/mult/modules/portal.cpp | 40 ++ .../example-designs/mult/modules/portal.hpp | 26 + rad-sim/example-designs/mult/mult.clks | 2 + rad-sim/example-designs/mult/mult.place | 2 + rad-sim/example-designs/mult/mult_driver.cpp | 68 ++ rad-sim/example-designs/mult/mult_driver.hpp | 34 + rad-sim/example-designs/mult/mult_system.cpp | 35 + rad-sim/example-designs/mult/mult_system.hpp | 31 + rad-sim/example-designs/mult/mult_top.cpp | 42 ++ rad-sim/example-designs/mult/mult_top.hpp | 31 + rad-sim/sim/CMakeLists.txt | 10 +- rad-sim/sim/design_context.cpp | 17 +- rad-sim/sim/design_context.hpp | 8 +- rad-sim/sim/main.cpp | 7 +- rad-sim/sim/radsim_knobs | 6 +- 38 files changed, 3057 insertions(+), 25 deletions(-) create mode 100644 rad-sim/example-designs/mult/CMakeCache.txt create mode 100644 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeCCompiler.cmake create mode 100644 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake create mode 100755 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin create mode 100755 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin create mode 100644 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeSystem.cmake create mode 100644 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c create mode 100755 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdC/a.out create mode 100644 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdCXX/CMakeCXXCompilerId.cpp create mode 100755 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdCXX/a.out create mode 100644 rad-sim/example-designs/mult/CMakeFiles/CMakeError.log create mode 100644 rad-sim/example-designs/mult/CMakeFiles/CMakeOutput.log create mode 100644 rad-sim/example-designs/mult/CMakeFiles/cmake.check_cache create mode 100644 rad-sim/example-designs/mult/CMakeLists.txt create mode 100644 rad-sim/example-designs/mult/config.yml create mode 100644 rad-sim/example-designs/mult/modules/client_mult.cpp create mode 100644 rad-sim/example-designs/mult/modules/client_mult.hpp create mode 100644 rad-sim/example-designs/mult/modules/mult.cpp create mode 100644 rad-sim/example-designs/mult/modules/mult.hpp create mode 100644 rad-sim/example-designs/mult/modules/portal.cpp create mode 100644 rad-sim/example-designs/mult/modules/portal.hpp create mode 100644 rad-sim/example-designs/mult/mult.clks create mode 100644 rad-sim/example-designs/mult/mult.place create mode 100644 rad-sim/example-designs/mult/mult_driver.cpp create mode 100644 rad-sim/example-designs/mult/mult_driver.hpp create mode 100644 rad-sim/example-designs/mult/mult_system.cpp create mode 100644 rad-sim/example-designs/mult/mult_system.hpp create mode 100644 rad-sim/example-designs/mult/mult_top.cpp create mode 100644 rad-sim/example-designs/mult/mult_top.hpp diff --git a/rad-sim/example-designs/CMakeLists.txt b/rad-sim/example-designs/CMakeLists.txt index 192bfb9..a8d080a 100644 --- a/rad-sim/example-designs/CMakeLists.txt +++ b/rad-sim/example-designs/CMakeLists.txt @@ -1,4 +1,5 @@ cmake_minimum_required(VERSION 3.16) find_package(SystemCLanguage CONFIG REQUIRED) -add_subdirectory(${DESIGN}) +add_subdirectory(add) +add_subdirectory(mult) \ No newline at end of file diff --git a/rad-sim/example-designs/add/CMakeLists.txt b/rad-sim/example-designs/add/CMakeLists.txt index 999b579..16f0691 100644 --- a/rad-sim/example-designs/add/CMakeLists.txt +++ b/rad-sim/example-designs/add/CMakeLists.txt @@ -31,5 +31,5 @@ set(hdrfiles add_compile_options(-Wall -Wextra -pedantic) -add_library(design STATIC ${srcfiles} ${hdrfiles}) -target_link_libraries(design PUBLIC SystemC::systemc booksim noc) \ No newline at end of file +add_library(design_add STATIC ${srcfiles} ${hdrfiles}) +target_link_libraries(design_add PUBLIC SystemC::systemc booksim noc) \ No newline at end of file diff --git a/rad-sim/example-designs/add/add_top.cpp b/rad-sim/example-designs/add/add_top.cpp index 531bed9..0874476 100644 --- a/rad-sim/example-designs/add/add_top.cpp +++ b/rad-sim/example-designs/add/add_top.cpp @@ -30,8 +30,8 @@ add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) portal_inst->portal_in(portal_in); portal_inst->portal_out(portal_out); - radsim_design->BuildDesignContext("add.place", - "add.clks"); //AKB changed to ptr deref + radsim_design->BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add", "add.place", + "add.clks"); //AKB changed to ptr deref and added first arg radsim_design->CreateSystemNoCs(rst); //AKB changed to ptr deref radsim_design->ConnectModulesToNoC(); //AKB changed to ptr deref } diff --git a/rad-sim/example-designs/add/modules/client.cpp b/rad-sim/example-designs/add/modules/client.cpp index d059710..c717b73 100644 --- a/rad-sim/example-designs/add/modules/client.cpp +++ b/rad-sim/example-designs/add/modules/client.cpp @@ -56,6 +56,7 @@ void client::Tick() { if (!client_tdata_fifo.empty()) { sc_bv tdata = client_tdata_fifo.front(); std::string dst_port_name = "adder_inst.axis_adder_interface"; + cout << dst_port_name << endl; uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref diff --git a/rad-sim/example-designs/mult/CMakeCache.txt b/rad-sim/example-designs/mult/CMakeCache.txt new file mode 100644 index 0000000..acd6ebb --- /dev/null +++ b/rad-sim/example-designs/mult/CMakeCache.txt @@ -0,0 +1,379 @@ +# This is the CMakeCache file. +# For build in directory: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add +# It was generated by CMake: /usr/bin/cmake +# You can edit this file to change values found and used by cmake. +# If you do not want to change any of the values, simply exit the editor. +# If you do want to change a value, simply edit, save, and exit the editor. +# The syntax for the file is as follows: +# KEY:TYPE=VALUE +# KEY is the name of a variable in the cache. +# TYPE is a hint to GUIs for the type of VALUE, DO NOT EDIT TYPE!. +# VALUE is the current value for the KEY. + +######################## +# EXTERNAL cache entries +######################## + +//Path to a program. +CMAKE_ADDR2LINE:FILEPATH=/usr/bin/addr2line + +//Path to a program. +CMAKE_AR:FILEPATH=/usr/bin/ar + +//Choose the type of build, options are: None Debug Release RelWithDebInfo +// MinSizeRel ... +CMAKE_BUILD_TYPE:STRING= + +//Enable/Disable color output during build. +CMAKE_COLOR_MAKEFILE:BOOL=ON + +//CXX compiler +CMAKE_CXX_COMPILER:FILEPATH=/usr/bin/c++ + +//A wrapper around 'ar' adding the appropriate '--plugin' option +// for the GCC compiler +CMAKE_CXX_COMPILER_AR:FILEPATH=/usr/bin/gcc-ar-9 + +//A wrapper around 'ranlib' adding the appropriate '--plugin' option +// for the GCC compiler +CMAKE_CXX_COMPILER_RANLIB:FILEPATH=/usr/bin/gcc-ranlib-9 + +//Flags used by the CXX compiler during all build types. +CMAKE_CXX_FLAGS:STRING= + +//Flags used by the CXX compiler during DEBUG builds. +CMAKE_CXX_FLAGS_DEBUG:STRING=-g + +//Flags used by the CXX compiler during MINSIZEREL builds. +CMAKE_CXX_FLAGS_MINSIZEREL:STRING=-Os -DNDEBUG + +//Flags used by the CXX compiler during RELEASE builds. +CMAKE_CXX_FLAGS_RELEASE:STRING=-O3 -DNDEBUG + +//Flags used by the CXX compiler during RELWITHDEBINFO builds. +CMAKE_CXX_FLAGS_RELWITHDEBINFO:STRING=-O2 -g -DNDEBUG + +//C compiler +CMAKE_C_COMPILER:FILEPATH=/usr/bin/cc + +//A wrapper around 'ar' adding the appropriate '--plugin' option +// for the GCC compiler +CMAKE_C_COMPILER_AR:FILEPATH=/usr/bin/gcc-ar-9 + +//A wrapper around 'ranlib' adding the appropriate '--plugin' option +// for the GCC compiler +CMAKE_C_COMPILER_RANLIB:FILEPATH=/usr/bin/gcc-ranlib-9 + +//Flags used by the C compiler during all build types. +CMAKE_C_FLAGS:STRING= + +//Flags used by the C compiler during DEBUG builds. +CMAKE_C_FLAGS_DEBUG:STRING=-g + +//Flags used by the C compiler during MINSIZEREL builds. +CMAKE_C_FLAGS_MINSIZEREL:STRING=-Os -DNDEBUG + +//Flags used by the C compiler during RELEASE builds. +CMAKE_C_FLAGS_RELEASE:STRING=-O3 -DNDEBUG + +//Flags used by the C compiler during RELWITHDEBINFO builds. +CMAKE_C_FLAGS_RELWITHDEBINFO:STRING=-O2 -g -DNDEBUG + +//Path to a program. +CMAKE_DLLTOOL:FILEPATH=CMAKE_DLLTOOL-NOTFOUND + +//Flags used by the linker during all build types. +CMAKE_EXE_LINKER_FLAGS:STRING= + +//Flags used by the linker during DEBUG builds. +CMAKE_EXE_LINKER_FLAGS_DEBUG:STRING= + +//Flags used by the linker during MINSIZEREL builds. +CMAKE_EXE_LINKER_FLAGS_MINSIZEREL:STRING= + +//Flags used by the linker during RELEASE builds. +CMAKE_EXE_LINKER_FLAGS_RELEASE:STRING= + +//Flags used by the linker during RELWITHDEBINFO builds. +CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO:STRING= + +//Enable/Disable output of compile commands during generation. +CMAKE_EXPORT_COMPILE_COMMANDS:BOOL=OFF + +//Install path prefix, prepended onto install directories. +CMAKE_INSTALL_PREFIX:PATH=/usr/local + +//Path to a program. +CMAKE_LINKER:FILEPATH=/usr/bin/ld + +//Path to a program. +CMAKE_MAKE_PROGRAM:FILEPATH=/usr/bin/make + +//Flags used by the linker during the creation of modules during +// all build types. +CMAKE_MODULE_LINKER_FLAGS:STRING= + +//Flags used by the linker during the creation of modules during +// DEBUG builds. +CMAKE_MODULE_LINKER_FLAGS_DEBUG:STRING= + +//Flags used by the linker during the creation of modules during +// MINSIZEREL builds. +CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL:STRING= + +//Flags used by the linker during the creation of modules during +// RELEASE builds. +CMAKE_MODULE_LINKER_FLAGS_RELEASE:STRING= + +//Flags used by the linker during the creation of modules during +// RELWITHDEBINFO builds. +CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO:STRING= + +//Path to a program. +CMAKE_NM:FILEPATH=/usr/bin/nm + +//Path to a program. +CMAKE_OBJCOPY:FILEPATH=/usr/bin/objcopy + +//Path to a program. +CMAKE_OBJDUMP:FILEPATH=/usr/bin/objdump + +//Value Computed by CMake +CMAKE_PROJECT_DESCRIPTION:STATIC= + +//Value Computed by CMake +CMAKE_PROJECT_HOMEPAGE_URL:STATIC= + +//Value Computed by CMake +CMAKE_PROJECT_NAME:STATIC=Project + +//Path to a program. +CMAKE_RANLIB:FILEPATH=/usr/bin/ranlib + +//Path to a program. +CMAKE_READELF:FILEPATH=/usr/bin/readelf + +//Flags used by the linker during the creation of shared libraries +// during all build types. +CMAKE_SHARED_LINKER_FLAGS:STRING= + +//Flags used by the linker during the creation of shared libraries +// during DEBUG builds. +CMAKE_SHARED_LINKER_FLAGS_DEBUG:STRING= + +//Flags used by the linker during the creation of shared libraries +// during MINSIZEREL builds. +CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL:STRING= + +//Flags used by the linker during the creation of shared libraries +// during RELEASE builds. +CMAKE_SHARED_LINKER_FLAGS_RELEASE:STRING= + +//Flags used by the linker during the creation of shared libraries +// during RELWITHDEBINFO builds. +CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO:STRING= + +//If set, runtime paths are not added when installing shared libraries, +// but are added when building. +CMAKE_SKIP_INSTALL_RPATH:BOOL=NO + +//If set, runtime paths are not added when using shared libraries. +CMAKE_SKIP_RPATH:BOOL=NO + +//Flags used by the linker during the creation of static libraries +// during all build types. +CMAKE_STATIC_LINKER_FLAGS:STRING= + +//Flags used by the linker during the creation of static libraries +// during DEBUG builds. +CMAKE_STATIC_LINKER_FLAGS_DEBUG:STRING= + +//Flags used by the linker during the creation of static libraries +// during MINSIZEREL builds. +CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL:STRING= + +//Flags used by the linker during the creation of static libraries +// during RELEASE builds. +CMAKE_STATIC_LINKER_FLAGS_RELEASE:STRING= + +//Flags used by the linker during the creation of static libraries +// during RELWITHDEBINFO builds. +CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO:STRING= + +//Path to a program. +CMAKE_STRIP:FILEPATH=/usr/bin/strip + +//If this value is on, makefiles will be generated without the +// .SILENT directive, and all commands will be echoed to the console +// during the make. This is useful for debugging only. With Visual +// Studio IDE projects all commands are done without /nologo. +CMAKE_VERBOSE_MAKEFILE:BOOL=FALSE + +//Value Computed by CMake +Project_BINARY_DIR:STATIC=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add + +//Value Computed by CMake +Project_SOURCE_DIR:STATIC=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs + +//The directory containing a CMake configuration file for SystemCLanguage. +SystemCLanguage_DIR:PATH=/home/bassiabn/rad-sim/systemc-2.3.4/build + + +######################## +# INTERNAL cache entries +######################## + +//ADVANCED property for variable: CMAKE_ADDR2LINE +CMAKE_ADDR2LINE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_AR +CMAKE_AR-ADVANCED:INTERNAL=1 +//This is the directory where this CMakeCache.txt was created +CMAKE_CACHEFILE_DIR:INTERNAL=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add +//Major version of cmake used to create the current loaded cache +CMAKE_CACHE_MAJOR_VERSION:INTERNAL=3 +//Minor version of cmake used to create the current loaded cache +CMAKE_CACHE_MINOR_VERSION:INTERNAL=16 +//Patch version of cmake used to create the current loaded cache +CMAKE_CACHE_PATCH_VERSION:INTERNAL=3 +//ADVANCED property for variable: CMAKE_COLOR_MAKEFILE +CMAKE_COLOR_MAKEFILE-ADVANCED:INTERNAL=1 +//Path to CMake executable. +CMAKE_COMMAND:INTERNAL=/usr/bin/cmake +//Path to cpack program executable. +CMAKE_CPACK_COMMAND:INTERNAL=/usr/bin/cpack +//Path to ctest program executable. +CMAKE_CTEST_COMMAND:INTERNAL=/usr/bin/ctest +//ADVANCED property for variable: CMAKE_CXX_COMPILER +CMAKE_CXX_COMPILER-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_COMPILER_AR +CMAKE_CXX_COMPILER_AR-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_COMPILER_RANLIB +CMAKE_CXX_COMPILER_RANLIB-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_FLAGS +CMAKE_CXX_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_FLAGS_DEBUG +CMAKE_CXX_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_FLAGS_MINSIZEREL +CMAKE_CXX_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_FLAGS_RELEASE +CMAKE_CXX_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_CXX_FLAGS_RELWITHDEBINFO +CMAKE_CXX_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_COMPILER +CMAKE_C_COMPILER-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_COMPILER_AR +CMAKE_C_COMPILER_AR-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_COMPILER_RANLIB +CMAKE_C_COMPILER_RANLIB-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_FLAGS +CMAKE_C_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_FLAGS_DEBUG +CMAKE_C_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_FLAGS_MINSIZEREL +CMAKE_C_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_FLAGS_RELEASE +CMAKE_C_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_C_FLAGS_RELWITHDEBINFO +CMAKE_C_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_DLLTOOL +CMAKE_DLLTOOL-ADVANCED:INTERNAL=1 +//Path to cache edit program executable. +CMAKE_EDIT_COMMAND:INTERNAL=/usr/bin/ccmake +//Executable file format +CMAKE_EXECUTABLE_FORMAT:INTERNAL=ELF +//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS +CMAKE_EXE_LINKER_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_DEBUG +CMAKE_EXE_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_MINSIZEREL +CMAKE_EXE_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_RELEASE +CMAKE_EXE_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO +CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_EXPORT_COMPILE_COMMANDS +CMAKE_EXPORT_COMPILE_COMMANDS-ADVANCED:INTERNAL=1 +//Name of external makefile project generator. +CMAKE_EXTRA_GENERATOR:INTERNAL= +//Name of generator. +CMAKE_GENERATOR:INTERNAL=Unix Makefiles +//Generator instance identifier. +CMAKE_GENERATOR_INSTANCE:INTERNAL= +//Name of generator platform. +CMAKE_GENERATOR_PLATFORM:INTERNAL= +//Name of generator toolset. +CMAKE_GENERATOR_TOOLSET:INTERNAL= +//Test CMAKE_HAVE_LIBC_PTHREAD +CMAKE_HAVE_LIBC_PTHREAD:INTERNAL= +//Have include pthread.h +CMAKE_HAVE_PTHREAD_H:INTERNAL=1 +//Source directory with the top level CMakeLists.txt file for this +// project +CMAKE_HOME_DIRECTORY:INTERNAL=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs +//Install .so files without execute permission. +CMAKE_INSTALL_SO_NO_EXE:INTERNAL=1 +//ADVANCED property for variable: CMAKE_LINKER +CMAKE_LINKER-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MAKE_PROGRAM +CMAKE_MAKE_PROGRAM-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS +CMAKE_MODULE_LINKER_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_DEBUG +CMAKE_MODULE_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL +CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_RELEASE +CMAKE_MODULE_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO +CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_NM +CMAKE_NM-ADVANCED:INTERNAL=1 +//number of local generators +CMAKE_NUMBER_OF_MAKEFILES:INTERNAL=1 +//ADVANCED property for variable: CMAKE_OBJCOPY +CMAKE_OBJCOPY-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_OBJDUMP +CMAKE_OBJDUMP-ADVANCED:INTERNAL=1 +//Platform information initialized +CMAKE_PLATFORM_INFO_INITIALIZED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_RANLIB +CMAKE_RANLIB-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_READELF +CMAKE_READELF-ADVANCED:INTERNAL=1 +//Path to CMake installation. +CMAKE_ROOT:INTERNAL=/usr/share/cmake-3.16 +//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS +CMAKE_SHARED_LINKER_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_DEBUG +CMAKE_SHARED_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL +CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_RELEASE +CMAKE_SHARED_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO +CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SKIP_INSTALL_RPATH +CMAKE_SKIP_INSTALL_RPATH-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_SKIP_RPATH +CMAKE_SKIP_RPATH-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS +CMAKE_STATIC_LINKER_FLAGS-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_DEBUG +CMAKE_STATIC_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL +CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_RELEASE +CMAKE_STATIC_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO +CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 +//ADVANCED property for variable: CMAKE_STRIP +CMAKE_STRIP-ADVANCED:INTERNAL=1 +//uname command +CMAKE_UNAME:INTERNAL=/usr/bin/uname +//ADVANCED property for variable: CMAKE_VERBOSE_MAKEFILE +CMAKE_VERBOSE_MAKEFILE-ADVANCED:INTERNAL=1 +//Details about finding Threads +FIND_PACKAGE_MESSAGE_DETAILS_Threads:INTERNAL=[TRUE][v()] +//Result of TRY_COMPILE +THREADS_HAVE_PTHREAD_ARG:INTERNAL=TRUE + diff --git a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeCCompiler.cmake b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeCCompiler.cmake new file mode 100644 index 0000000..c5ece7b --- /dev/null +++ b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeCCompiler.cmake @@ -0,0 +1,76 @@ +set(CMAKE_C_COMPILER "/usr/bin/cc") +set(CMAKE_C_COMPILER_ARG1 "") +set(CMAKE_C_COMPILER_ID "GNU") +set(CMAKE_C_COMPILER_VERSION "9.4.0") +set(CMAKE_C_COMPILER_VERSION_INTERNAL "") +set(CMAKE_C_COMPILER_WRAPPER "") +set(CMAKE_C_STANDARD_COMPUTED_DEFAULT "11") +set(CMAKE_C_COMPILE_FEATURES "c_std_90;c_function_prototypes;c_std_99;c_restrict;c_variadic_macros;c_std_11;c_static_assert") +set(CMAKE_C90_COMPILE_FEATURES "c_std_90;c_function_prototypes") +set(CMAKE_C99_COMPILE_FEATURES "c_std_99;c_restrict;c_variadic_macros") +set(CMAKE_C11_COMPILE_FEATURES "c_std_11;c_static_assert") + +set(CMAKE_C_PLATFORM_ID "Linux") +set(CMAKE_C_SIMULATE_ID "") +set(CMAKE_C_COMPILER_FRONTEND_VARIANT "") +set(CMAKE_C_SIMULATE_VERSION "") + + + +set(CMAKE_AR "/usr/bin/ar") +set(CMAKE_C_COMPILER_AR "/usr/bin/gcc-ar-9") +set(CMAKE_RANLIB "/usr/bin/ranlib") +set(CMAKE_C_COMPILER_RANLIB "/usr/bin/gcc-ranlib-9") +set(CMAKE_LINKER "/usr/bin/ld") +set(CMAKE_MT "") +set(CMAKE_COMPILER_IS_GNUCC 1) +set(CMAKE_C_COMPILER_LOADED 1) +set(CMAKE_C_COMPILER_WORKS TRUE) +set(CMAKE_C_ABI_COMPILED TRUE) +set(CMAKE_COMPILER_IS_MINGW ) +set(CMAKE_COMPILER_IS_CYGWIN ) +if(CMAKE_COMPILER_IS_CYGWIN) + set(CYGWIN 1) + set(UNIX 1) +endif() + +set(CMAKE_C_COMPILER_ENV_VAR "CC") + +if(CMAKE_COMPILER_IS_MINGW) + set(MINGW 1) +endif() +set(CMAKE_C_COMPILER_ID_RUN 1) +set(CMAKE_C_SOURCE_FILE_EXTENSIONS c;m) +set(CMAKE_C_IGNORE_EXTENSIONS h;H;o;O;obj;OBJ;def;DEF;rc;RC) +set(CMAKE_C_LINKER_PREFERENCE 10) + +# Save compiler ABI information. +set(CMAKE_C_SIZEOF_DATA_PTR "8") +set(CMAKE_C_COMPILER_ABI "ELF") +set(CMAKE_C_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") + +if(CMAKE_C_SIZEOF_DATA_PTR) + set(CMAKE_SIZEOF_VOID_P "${CMAKE_C_SIZEOF_DATA_PTR}") +endif() + +if(CMAKE_C_COMPILER_ABI) + set(CMAKE_INTERNAL_PLATFORM_ABI "${CMAKE_C_COMPILER_ABI}") +endif() + +if(CMAKE_C_LIBRARY_ARCHITECTURE) + set(CMAKE_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") +endif() + +set(CMAKE_C_CL_SHOWINCLUDES_PREFIX "") +if(CMAKE_C_CL_SHOWINCLUDES_PREFIX) + set(CMAKE_CL_SHOWINCLUDES_PREFIX "${CMAKE_C_CL_SHOWINCLUDES_PREFIX}") +endif() + + + + + +set(CMAKE_C_IMPLICIT_INCLUDE_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include") +set(CMAKE_C_IMPLICIT_LINK_LIBRARIES "gcc;gcc_s;c;gcc;gcc_s") +set(CMAKE_C_IMPLICIT_LINK_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib") +set(CMAKE_C_IMPLICIT_LINK_FRAMEWORK_DIRECTORIES "") diff --git a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake new file mode 100644 index 0000000..278ef39 --- /dev/null +++ b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake @@ -0,0 +1,88 @@ +set(CMAKE_CXX_COMPILER "/usr/bin/c++") +set(CMAKE_CXX_COMPILER_ARG1 "") +set(CMAKE_CXX_COMPILER_ID "GNU") +set(CMAKE_CXX_COMPILER_VERSION "9.4.0") +set(CMAKE_CXX_COMPILER_VERSION_INTERNAL "") +set(CMAKE_CXX_COMPILER_WRAPPER "") +set(CMAKE_CXX_STANDARD_COMPUTED_DEFAULT "14") +set(CMAKE_CXX_COMPILE_FEATURES "cxx_std_98;cxx_template_template_parameters;cxx_std_11;cxx_alias_templates;cxx_alignas;cxx_alignof;cxx_attributes;cxx_auto_type;cxx_constexpr;cxx_decltype;cxx_decltype_incomplete_return_types;cxx_default_function_template_args;cxx_defaulted_functions;cxx_defaulted_move_initializers;cxx_delegating_constructors;cxx_deleted_functions;cxx_enum_forward_declarations;cxx_explicit_conversions;cxx_extended_friend_declarations;cxx_extern_templates;cxx_final;cxx_func_identifier;cxx_generalized_initializers;cxx_inheriting_constructors;cxx_inline_namespaces;cxx_lambdas;cxx_local_type_template_args;cxx_long_long_type;cxx_noexcept;cxx_nonstatic_member_init;cxx_nullptr;cxx_override;cxx_range_for;cxx_raw_string_literals;cxx_reference_qualified_functions;cxx_right_angle_brackets;cxx_rvalue_references;cxx_sizeof_member;cxx_static_assert;cxx_strong_enums;cxx_thread_local;cxx_trailing_return_types;cxx_unicode_literals;cxx_uniform_initialization;cxx_unrestricted_unions;cxx_user_literals;cxx_variadic_macros;cxx_variadic_templates;cxx_std_14;cxx_aggregate_default_initializers;cxx_attribute_deprecated;cxx_binary_literals;cxx_contextual_conversions;cxx_decltype_auto;cxx_digit_separators;cxx_generic_lambdas;cxx_lambda_init_captures;cxx_relaxed_constexpr;cxx_return_type_deduction;cxx_variable_templates;cxx_std_17;cxx_std_20") +set(CMAKE_CXX98_COMPILE_FEATURES "cxx_std_98;cxx_template_template_parameters") +set(CMAKE_CXX11_COMPILE_FEATURES "cxx_std_11;cxx_alias_templates;cxx_alignas;cxx_alignof;cxx_attributes;cxx_auto_type;cxx_constexpr;cxx_decltype;cxx_decltype_incomplete_return_types;cxx_default_function_template_args;cxx_defaulted_functions;cxx_defaulted_move_initializers;cxx_delegating_constructors;cxx_deleted_functions;cxx_enum_forward_declarations;cxx_explicit_conversions;cxx_extended_friend_declarations;cxx_extern_templates;cxx_final;cxx_func_identifier;cxx_generalized_initializers;cxx_inheriting_constructors;cxx_inline_namespaces;cxx_lambdas;cxx_local_type_template_args;cxx_long_long_type;cxx_noexcept;cxx_nonstatic_member_init;cxx_nullptr;cxx_override;cxx_range_for;cxx_raw_string_literals;cxx_reference_qualified_functions;cxx_right_angle_brackets;cxx_rvalue_references;cxx_sizeof_member;cxx_static_assert;cxx_strong_enums;cxx_thread_local;cxx_trailing_return_types;cxx_unicode_literals;cxx_uniform_initialization;cxx_unrestricted_unions;cxx_user_literals;cxx_variadic_macros;cxx_variadic_templates") +set(CMAKE_CXX14_COMPILE_FEATURES "cxx_std_14;cxx_aggregate_default_initializers;cxx_attribute_deprecated;cxx_binary_literals;cxx_contextual_conversions;cxx_decltype_auto;cxx_digit_separators;cxx_generic_lambdas;cxx_lambda_init_captures;cxx_relaxed_constexpr;cxx_return_type_deduction;cxx_variable_templates") +set(CMAKE_CXX17_COMPILE_FEATURES "cxx_std_17") +set(CMAKE_CXX20_COMPILE_FEATURES "cxx_std_20") + +set(CMAKE_CXX_PLATFORM_ID "Linux") +set(CMAKE_CXX_SIMULATE_ID "") +set(CMAKE_CXX_COMPILER_FRONTEND_VARIANT "") +set(CMAKE_CXX_SIMULATE_VERSION "") + + + +set(CMAKE_AR "/usr/bin/ar") +set(CMAKE_CXX_COMPILER_AR "/usr/bin/gcc-ar-9") +set(CMAKE_RANLIB "/usr/bin/ranlib") +set(CMAKE_CXX_COMPILER_RANLIB "/usr/bin/gcc-ranlib-9") +set(CMAKE_LINKER "/usr/bin/ld") +set(CMAKE_MT "") +set(CMAKE_COMPILER_IS_GNUCXX 1) +set(CMAKE_CXX_COMPILER_LOADED 1) +set(CMAKE_CXX_COMPILER_WORKS TRUE) +set(CMAKE_CXX_ABI_COMPILED TRUE) +set(CMAKE_COMPILER_IS_MINGW ) +set(CMAKE_COMPILER_IS_CYGWIN ) +if(CMAKE_COMPILER_IS_CYGWIN) + set(CYGWIN 1) + set(UNIX 1) +endif() + +set(CMAKE_CXX_COMPILER_ENV_VAR "CXX") + +if(CMAKE_COMPILER_IS_MINGW) + set(MINGW 1) +endif() +set(CMAKE_CXX_COMPILER_ID_RUN 1) +set(CMAKE_CXX_SOURCE_FILE_EXTENSIONS C;M;c++;cc;cpp;cxx;m;mm;CPP) +set(CMAKE_CXX_IGNORE_EXTENSIONS inl;h;hpp;HPP;H;o;O;obj;OBJ;def;DEF;rc;RC) + +foreach (lang C OBJC OBJCXX) + if (CMAKE_${lang}_COMPILER_ID_RUN) + foreach(extension IN LISTS CMAKE_${lang}_SOURCE_FILE_EXTENSIONS) + list(REMOVE_ITEM CMAKE_CXX_SOURCE_FILE_EXTENSIONS ${extension}) + endforeach() + endif() +endforeach() + +set(CMAKE_CXX_LINKER_PREFERENCE 30) +set(CMAKE_CXX_LINKER_PREFERENCE_PROPAGATES 1) + +# Save compiler ABI information. +set(CMAKE_CXX_SIZEOF_DATA_PTR "8") +set(CMAKE_CXX_COMPILER_ABI "ELF") +set(CMAKE_CXX_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") + +if(CMAKE_CXX_SIZEOF_DATA_PTR) + set(CMAKE_SIZEOF_VOID_P "${CMAKE_CXX_SIZEOF_DATA_PTR}") +endif() + +if(CMAKE_CXX_COMPILER_ABI) + set(CMAKE_INTERNAL_PLATFORM_ABI "${CMAKE_CXX_COMPILER_ABI}") +endif() + +if(CMAKE_CXX_LIBRARY_ARCHITECTURE) + set(CMAKE_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") +endif() + +set(CMAKE_CXX_CL_SHOWINCLUDES_PREFIX "") +if(CMAKE_CXX_CL_SHOWINCLUDES_PREFIX) + set(CMAKE_CL_SHOWINCLUDES_PREFIX "${CMAKE_CXX_CL_SHOWINCLUDES_PREFIX}") +endif() + + + + + +set(CMAKE_CXX_IMPLICIT_INCLUDE_DIRECTORIES "/usr/include/c++/9;/usr/include/x86_64-linux-gnu/c++/9;/usr/include/c++/9/backward;/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include") +set(CMAKE_CXX_IMPLICIT_LINK_LIBRARIES "stdc++;m;gcc_s;gcc;c;gcc_s;gcc") +set(CMAKE_CXX_IMPLICIT_LINK_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib") +set(CMAKE_CXX_IMPLICIT_LINK_FRAMEWORK_DIRECTORIES "") diff --git a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin new file mode 100755 index 0000000000000000000000000000000000000000..ebea4b340830aee444aab660f7a351e9a05007f2 GIT binary patch literal 16552 zcmeHOeQXrR6`%9jaDchH5R+VihE1BN(A0}@!8H_@JD<;9w+2$M3l$&Rv+rylxew=V zkJyM1B&Vn+;ub}%phb-kRjWwJAI%^AR6h>6O(dkWAhnb>sp>#c-H0S6DV5s**Y{@T zop;w~MG95^=?>a^^M3O_X5Y*%Gv0YmM!MRoTrNh%%|6SJ3;G2TlnsL$WCci&HM7O= z`%$)n%>%xgW1>AM2(*fFsme+{5_bbdy#Q7!&=mp(528>Hk)qyQ<;Z-|LX^q-K)o7l zlDwVXkPe7ad)c3Y%1{*kTc(3jkEmG>V>4AR#{Cd0_bqE7PI-f=4&SRX#O|7!8w#(wv?y8YKqmBVloPg8<;^nn;o z?c@Fv@Qc|Nd^1~z?2I3&*#7sfcx3K z%pbHW4N08Y@aH)mU;!Jx2=E8svX?9X3fQ;Xc^dG$aO4!BLG$YruuGVi4c#U1xFGC+ z#Dj7|t&#W-fcjZrR{uXPC+k&M!;AbgyC;c`LkM<$IOh zXNrvPv<;t-IO*r{R+$l~3 zoCr7(a3bJDz=?npfe$+Z@A~fhk2ZSEqaCaH6Rd5uuM~}{(s^z4*Pe0SmD2h%0KZdu z=(|9CD;dfI_Y2OoG0v}jv$JqvpH{f6js9)wk?yXsnxn9U(#971IB7WxmP$*rpz_b- z+E~lCprVb{JcDGzw6PRiZ^b&eUQn9wtvrH`$0Y^%1eagmi)8g}tuUpXeQUFJcG|7E zUeYeyHtN8@L(+h!G|}%{3H>5{?C+5lY-ag~d$iG(Dy(XSt46JMtYscBldDUm(qs&N zUaGkTyKdKB(6#9Q<8f$2Lp`8Zc;cE?$WOc+xryC87P+RK)W(+n#tYH;QMKRq%c3iC zlhBuK=*_+3XeP9?Ypf*)JA%*`I|~;>J)MOcq3%%OW{);j9|L$t*Xmn1CX@Q@Qb{{| z%WbS&`>KpbSK*zm!dq>HzlTb7f7M3EUD}4f$+2sjaNBH%>8iGULUCjw3coCy4%M8IYF+Q?Yv*7j{1 zP2Y!hH#G0XP;fljo7fHK1rTs8cYg-I5#slf$+t_TA)wPhPXhH!l}h+s>pD>UPS$+A zR5}mzIiLagaRtAPVsRbZ&RoNO*Yeu=p5xGl_zJk516#OLXKnNOmzxKnx(==(z&YUc zw|fJh^DTPZbA)YPw(%36dXRqxMEyN*?IJm-V?mn+TpOTI{F_|F>pxl*UOewGI0hX4 zWWc@w*O#H4fBS3q`oCV)=?#3%9q}q-)e-Nir)%204M*o`-saKy9o}Ht+Z^&XguJU- zy-KS$(CYQKdOh$ZkFnR_`YPC=Z+yTy#fg9u0Ve`Z1e^#s5pW{lM8JuF69FdzA9@7n zd>oyJliRWKnYUW%5#MAnIOi?Oq&!#m5y{iJyXBInGi`W26bqfd!+jSPYQJ&2ltKQq zJTympq?58zKI2=BQj9GWgk6>t&wFAC2r_eCQu1^buPD#k;h9-1MQND&QRJvNJBwAa zcb~*b?!A)eFT{yM@I_YiU)qB&!euEuxAt&jgW9l8ZCowz_jl-qSrw>o<8Jty1D#JdTXDnbXF7jw z#jDw&igs$s^T;X>!I$&LiqB^>&#btI(Rf+$1?;pOM=QRtJfEyM%ue~-Sn*n>RKypv zhKjhioPS}p<74z3T5&L&nlw6^GNx73QCt z-NWelv&zptkB#l_3g@T=PH&qTEBKsMv+Jc9MAY!TRfXrbZSjN?7#u%s!|#_ky$6LA z#y$-dn6>3|-Sk|yb9{CjQqm5+SIN!@m!BO^{QFp?{=dNG{cM#26)4zmEOXuO4|&@X z7Q-8{l}h$EfuSnM60pyoajtv!tnvLl;4U~nPwxeC@jAz6kNX?a4*kDC^0#iZVUyXp{x%~;-x%yVX73zeEp5XZGdAJYoO6Tx1fLF>>H~@I1 zJcw^fc@{J|h3Xl=6)VKK7Xh!7k5B}>Qa-}(KnwE@?0FEUqDZD1- z?Rg5X1FlG2GkFhi{s&ewi1og#ku&me;;4_!q#Wo*O7Fv@gB&InWb}b#rZ<|@V@4*M z)1&!e)|W{QCF4dsrZzV;t*tD?lNt1AHX9v*6aynW!uqq(R9uhcQ>hV9F>yL3B3MMj zTcVG~!(nifNXE0F)=uaj&wYTuVS{e__RyAy9@*NaLwbW%8*>?Axr{y-O~)W%LT~%h z*3g#DuvLs_UjPJYJ9{8d*UHsg_7XQpylh(-|YK4y5zy zP&P9Z&l)2ps5hU0)T=~HLNI>yMs$F2@xf?rkg2heG`J8H(pY%Qfp|8T$fPZd4sF?Z zGKvaJo1}Tw3!R7 ze+g@Xidlb`T#pgO?=$9NUw(B$qgkKUb3_%hGSuz*I|2I_tfi^{w0|JFN9xmZ&EEeg zwBz1^^ve#Uqmvk1DA-4=l0NMVFkcOCne=HLN%S(bnTs@6h8}|&?iEO%)|*5hkdoAY zk|TN;+HvneJgrNKDpKFxe+jcOsNk)VKJACfR0@)R`~9DQcDyHQhyPSWk(Bm<5-o?9 z`0qf)tglEtqGXQbi6?r-rcdi;q9iw${_{5dpj06GJ==iU?Y(Hzr*#xj+9#8L`~3Z} z)Tj6}MM_GF&zHH_{r?IYv5TZn>w2P_%*s%=`+vozKdcA^qEmt`|I+vq@JFcNnp8ga z<$VI>)!OBWCwc{ReI|YS`@nQPfKW(Ia5FsNZ$kslJ@Q}Pcc?<6D8~=yKNixXIDQ{6 z6d`@upA_XnDF|)mLi$9fq0y|*f>OFcQ1TR)5cP-Ne~@%p?z=@_PTYHK#>p?q;_{sCoiL<3 Mn*~>EQ?Rk@zX|n&%K!iX literal 0 HcmV?d00001 diff --git a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin new file mode 100755 index 0000000000000000000000000000000000000000..ee268c0505df7bc55aab1046342c263205c720a2 GIT binary patch literal 16560 zcmeHOeQX>@6`%9j$)$1bE^PuP3C&VcVbgkJo5Wl~P3~-;y@tz26Puc*>Gte9+eh!K zcYD+>A&ulV$`K5uLTac)DJh^xMWXxxm5?ZoOcMzys1c$KlnT>O;i4pULW2xVa=bS) z@4UM{t13lEh#hP1&HK&!n0+(5p52}Ia5&Oc<#I79ZuV)0T+lC&plrx)krg087GNvj z_rq)*TLOGF$3%Nj5NH+UY?YOIB<==^dUaT-K-UQvJcvR)M2dQg6>X_#Arz1OG-Lx?oYfL86h0(^*Kx<>`CN-Z?TexfN7y7_C z)xD#Sftg9fWElBatdcyoCsv<&{$!x*C+~DU)A07TUq!xgbn14pfj&_N3+mI9ARc|7 z44(htJHK0_#2=|gY#AIrINHO%J^zJe9WVdv+~fPt#DATt-TK7xAAa`S61w09uQUQN<5xgI8Kl>o_2dzrF#F-6$ zlH+x(&W0}s{1!OuB?^E7_U(4Q1o%oEDMe_|eEJHoH!?5Ft`vA&5QY@-pqxM(CH@_t zepa`j{~wd`4bo1xl)qi#(-Oz=;sxf_AWoxJrt5>FQGFW!hZA`tp6lJ-k<6syz0rXrXvbqwBMK@=gb`qdQ<=21sDt`W zsK*j%y^xQ`%+|rU0T$8-4&?Ksj_xWt>yGracjzr@i@I5yl$fzDhJRK3SJd%W6v5Bm zehX_7Fnz1oi?W^Wk91#BWZdTDeUtEMIWC@{P$ZoAv)crY*9!SYWZHy_-U_)H6HeDI zw#=Gvnlp&cnQ-!rxKo@6I1z9n;6%WQfD-{H0{<%!_?z$Me`@3BJ=&3)-@#f}dvwyM zD!rtQ|I#zXPocE=7{HfHw>|^Jx1OOqa6jid$r>0+W4PmclAalY7W8D zOPg5X_&;tUA$@9SNcF9M1pCLw2S*b9@^LPYEN^yxoCr7(a3bJDz=?np0Ve`Z1e^#s5pW{l zMBx7<0{FegTzYnN?cAD&?@^f{J(e|cdz%9Lu$|-4fy7?eFMxn+t@~5>%@Dt{%)C`9 zWr5BCJqpw_TPorAzDq!#0~)wgD!l~sIM6!zQ3k(_VsSmRo4H2)uC=vGJ&!>f;_Kiz z4z}<~opmndUwk$|brT#}z&YUccX{hR<6Hiq=OEj*X6wg4vEddJNBw)?=qEV@p`c9z zjxEq9{*5l|^&hJ0Sh3^)I0hVE8L)4{aUZnvZ-HH2|JSQ}ymeo5hrP-~b=X_~)tXLk z)1f7rH!!}m+Z#-K10ioy$Xnm;RocCE?OuPo*Mnag*&pCI40g)j{D60g69FdzP6V6? zI1z9n;6%WQfD-{H0!{?}+Yz9Bb+nI8K8}_5%GFYb_(K+hecqzX$o+U9l05C#TPu0m z3y1qfvCzIfeD1Wt5V-LP)HjEWsAB=ZE9>TaIX14OOx8PNo{Em_`5rF z!>p>SaN=%w=Ro_@%~ss7`$<|U&d&h zt@sV)`DDdmcFOCPtMAY4|^O^S7n_Jzm!+Er# z{7sCmYpeXK^7U-R;p(d}|J>{Yi6E&{GdT{H2(YhwO_)eK^NFlXeA z0_->%Wb>&Bx{=ZcF*zZR83`GEIGGuUCiR$+$>sHEVU!JKQrTqOh{x1GQ)_c&A)fT0 zM{~L88001xxiL1Bi>BgwtdL5Lfr^RKF@wP(+Oa))f4rl=zXKd4lJQ)qy+<9)W|@9> zq`5Vb9?IyZm)wX3I0$dJ!E)E`(Dtw%-qEQ;)`ZnIrbxu{8GR(0j$ztG=jV5Xw)b>c z#dr<}K#)Z_xByEu4?#RyeP(e+#vP?~9jJP_SE~wdDCL7Ng zVzkbpd_L`*_3l#NDom~ruuXnusLv9UC`5Y)(tmM_M0`9vmdVRUHA#gkD~U@A|0 zQL{;d;g33;fr=3ygrP|Cuy$24nKCSDBDmHn${$0@icUV(X|LHk`=q{-*m*3@eJeiF`1)m{E zpVo;)4`OhkU>~tc=TFZE3Bd4_NuSn}MCmyNM0kfh$1OH4@#8#qB_!V z!(rA}q#jW+M>@n4J!aFV^)peDTTK61n|@F#5dFSw!0h&ZY}2Q86H$6zCja*N`@Gbr z_%lUHN{ZK)x!C>x0vfT4q)+R6qIZ~;p>Fqo+NM9M2nC|Ef-V2j_!IC7RB#PSk7M+_ zK>4+HdE$wl16`ja(J0EkKP zGEVxpl@U=PeKV!GV-^jPL3v^0b=(XG^@r|%_`ZbtZqb($cZ1D1`6bzvi|EG!LZa5D IU}M?802n@gkpKVy literal 0 HcmV?d00001 diff --git a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeSystem.cmake b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeSystem.cmake new file mode 100644 index 0000000..15b4419 --- /dev/null +++ b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeSystem.cmake @@ -0,0 +1,15 @@ +set(CMAKE_HOST_SYSTEM "Linux-5.15.0-69-generic") +set(CMAKE_HOST_SYSTEM_NAME "Linux") +set(CMAKE_HOST_SYSTEM_VERSION "5.15.0-69-generic") +set(CMAKE_HOST_SYSTEM_PROCESSOR "x86_64") + + + +set(CMAKE_SYSTEM "Linux-5.15.0-69-generic") +set(CMAKE_SYSTEM_NAME "Linux") +set(CMAKE_SYSTEM_VERSION "5.15.0-69-generic") +set(CMAKE_SYSTEM_PROCESSOR "x86_64") + +set(CMAKE_CROSSCOMPILING "FALSE") + +set(CMAKE_SYSTEM_LOADED 1) diff --git a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c new file mode 100644 index 0000000..d884b50 --- /dev/null +++ b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c @@ -0,0 +1,671 @@ +#ifdef __cplusplus +# error "A C++ compiler has been selected for C." +#endif + +#if defined(__18CXX) +# define ID_VOID_MAIN +#endif +#if defined(__CLASSIC_C__) +/* cv-qualifiers did not exist in K&R C */ +# define const +# define volatile +#endif + + +/* Version number components: V=Version, R=Revision, P=Patch + Version date components: YYYY=Year, MM=Month, DD=Day */ + +#if defined(__INTEL_COMPILER) || defined(__ICC) +# define COMPILER_ID "Intel" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# if defined(__GNUC__) +# define SIMULATE_ID "GNU" +# endif + /* __INTEL_COMPILER = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER/100) +# define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER/10 % 10) +# if defined(__INTEL_COMPILER_UPDATE) +# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER_UPDATE) +# else +# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER % 10) +# endif +# if defined(__INTEL_COMPILER_BUILD_DATE) + /* __INTEL_COMPILER_BUILD_DATE = YYYYMMDD */ +# define COMPILER_VERSION_TWEAK DEC(__INTEL_COMPILER_BUILD_DATE) +# endif +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif +# if defined(__GNUC__) +# define SIMULATE_VERSION_MAJOR DEC(__GNUC__) +# elif defined(__GNUG__) +# define SIMULATE_VERSION_MAJOR DEC(__GNUG__) +# endif +# if defined(__GNUC_MINOR__) +# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__) +# endif +# if defined(__GNUC_PATCHLEVEL__) +# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif + +#elif defined(__PATHCC__) +# define COMPILER_ID "PathScale" +# define COMPILER_VERSION_MAJOR DEC(__PATHCC__) +# define COMPILER_VERSION_MINOR DEC(__PATHCC_MINOR__) +# if defined(__PATHCC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PATHCC_PATCHLEVEL__) +# endif + +#elif defined(__BORLANDC__) && defined(__CODEGEARC_VERSION__) +# define COMPILER_ID "Embarcadero" +# define COMPILER_VERSION_MAJOR HEX(__CODEGEARC_VERSION__>>24 & 0x00FF) +# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF) +# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF) + +#elif defined(__BORLANDC__) +# define COMPILER_ID "Borland" + /* __BORLANDC__ = 0xVRR */ +# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8) +# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF) + +#elif defined(__WATCOMC__) && __WATCOMC__ < 1200 +# define COMPILER_ID "Watcom" + /* __WATCOMC__ = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__WATCOMC__) +# define COMPILER_ID "OpenWatcom" + /* __WATCOMC__ = VVRP + 1100 */ +# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__SUNPRO_C) +# define COMPILER_ID "SunPro" +# if __SUNPRO_C >= 0x5100 + /* __SUNPRO_C = 0xVRRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>12) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF) +# else + /* __SUNPRO_CC = 0xVRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>8) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF) +# endif + +#elif defined(__HP_cc) +# define COMPILER_ID "HP" + /* __HP_cc = VVRRPP */ +# define COMPILER_VERSION_MAJOR DEC(__HP_cc/10000) +# define COMPILER_VERSION_MINOR DEC(__HP_cc/100 % 100) +# define COMPILER_VERSION_PATCH DEC(__HP_cc % 100) + +#elif defined(__DECC) +# define COMPILER_ID "Compaq" + /* __DECC_VER = VVRRTPPPP */ +# define COMPILER_VERSION_MAJOR DEC(__DECC_VER/10000000) +# define COMPILER_VERSION_MINOR DEC(__DECC_VER/100000 % 100) +# define COMPILER_VERSION_PATCH DEC(__DECC_VER % 10000) + +#elif defined(__IBMC__) && defined(__COMPILER_VER__) +# define COMPILER_ID "zOS" + /* __IBMC__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) + +#elif defined(__ibmxl__) && defined(__clang__) +# define COMPILER_ID "XLClang" +# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__) +# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__) +# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__) +# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__) + + +#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ >= 800 +# define COMPILER_ID "XL" + /* __IBMC__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) + +#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ < 800 +# define COMPILER_ID "VisualAge" + /* __IBMC__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) + +#elif defined(__PGI) +# define COMPILER_ID "PGI" +# define COMPILER_VERSION_MAJOR DEC(__PGIC__) +# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__) +# if defined(__PGIC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__) +# endif + +#elif defined(_CRAYC) +# define COMPILER_ID "Cray" +# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR) +# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR) + +#elif defined(__TI_COMPILER_VERSION__) +# define COMPILER_ID "TI" + /* __TI_COMPILER_VERSION__ = VVVRRRPPP */ +# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000) +# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000) +# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000) + +#elif defined(__FUJITSU) || defined(__FCC_VERSION) || defined(__fcc_version) +# define COMPILER_ID "Fujitsu" + +#elif defined(__ghs__) +# define COMPILER_ID "GHS" +/* __GHS_VERSION_NUMBER = VVVVRP */ +# ifdef __GHS_VERSION_NUMBER +# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100) +# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10) +# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10) +# endif + +#elif defined(__TINYC__) +# define COMPILER_ID "TinyCC" + +#elif defined(__BCC__) +# define COMPILER_ID "Bruce" + +#elif defined(__SCO_VERSION__) +# define COMPILER_ID "SCO" + +#elif defined(__ARMCC_VERSION) && !defined(__clang__) +# define COMPILER_ID "ARMCC" +#if __ARMCC_VERSION >= 1000000 + /* __ARMCC_VERSION = VRRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#else + /* __ARMCC_VERSION = VRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#endif + + +#elif defined(__clang__) && defined(__apple_build_version__) +# define COMPILER_ID "AppleClang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif +# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__) + +#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION) +# define COMPILER_ID "ARMClang" + # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION % 10000) +# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION) + +#elif defined(__clang__) +# define COMPILER_ID "Clang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif + +#elif defined(__GNUC__) +# define COMPILER_ID "GNU" +# define COMPILER_VERSION_MAJOR DEC(__GNUC__) +# if defined(__GNUC_MINOR__) +# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__) +# endif +# if defined(__GNUC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif + +#elif defined(_MSC_VER) +# define COMPILER_ID "MSVC" + /* _MSC_VER = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100) +# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100) +# if defined(_MSC_FULL_VER) +# if _MSC_VER >= 1400 + /* _MSC_FULL_VER = VVRRPPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000) +# else + /* _MSC_FULL_VER = VVRRPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000) +# endif +# endif +# if defined(_MSC_BUILD) +# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD) +# endif + +#elif defined(__VISUALDSPVERSION__) || defined(__ADSPBLACKFIN__) || defined(__ADSPTS__) || defined(__ADSP21000__) +# define COMPILER_ID "ADSP" +#if defined(__VISUALDSPVERSION__) + /* __VISUALDSPVERSION__ = 0xVVRRPP00 */ +# define COMPILER_VERSION_MAJOR HEX(__VISUALDSPVERSION__>>24) +# define COMPILER_VERSION_MINOR HEX(__VISUALDSPVERSION__>>16 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__VISUALDSPVERSION__>>8 & 0xFF) +#endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# define COMPILER_ID "IAR" +# if defined(__VER__) && defined(__ICCARM__) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000) +# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000) +# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__)) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100) +# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100)) +# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# endif + +#elif defined(__SDCC_VERSION_MAJOR) || defined(SDCC) +# define COMPILER_ID "SDCC" +# if defined(__SDCC_VERSION_MAJOR) +# define COMPILER_VERSION_MAJOR DEC(__SDCC_VERSION_MAJOR) +# define COMPILER_VERSION_MINOR DEC(__SDCC_VERSION_MINOR) +# define COMPILER_VERSION_PATCH DEC(__SDCC_VERSION_PATCH) +# else + /* SDCC = VRP */ +# define COMPILER_VERSION_MAJOR DEC(SDCC/100) +# define COMPILER_VERSION_MINOR DEC(SDCC/10 % 10) +# define COMPILER_VERSION_PATCH DEC(SDCC % 10) +# endif + + +/* These compilers are either not known or too old to define an + identification macro. Try to identify the platform and guess that + it is the native compiler. */ +#elif defined(__hpux) || defined(__hpua) +# define COMPILER_ID "HP" + +#else /* unknown compiler */ +# define COMPILER_ID "" +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; +#ifdef SIMULATE_ID +char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; +#endif + +#ifdef __QNXNTO__ +char const* qnxnto = "INFO" ":" "qnxnto[]"; +#endif + +#if defined(__CRAYXE) || defined(__CRAYXC) +char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; +#endif + +#define STRINGIFY_HELPER(X) #X +#define STRINGIFY(X) STRINGIFY_HELPER(X) + +/* Identify known platforms by name. */ +#if defined(__linux) || defined(__linux__) || defined(linux) +# define PLATFORM_ID "Linux" + +#elif defined(__CYGWIN__) +# define PLATFORM_ID "Cygwin" + +#elif defined(__MINGW32__) +# define PLATFORM_ID "MinGW" + +#elif defined(__APPLE__) +# define PLATFORM_ID "Darwin" + +#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) +# define PLATFORM_ID "Windows" + +#elif defined(__FreeBSD__) || defined(__FreeBSD) +# define PLATFORM_ID "FreeBSD" + +#elif defined(__NetBSD__) || defined(__NetBSD) +# define PLATFORM_ID "NetBSD" + +#elif defined(__OpenBSD__) || defined(__OPENBSD) +# define PLATFORM_ID "OpenBSD" + +#elif defined(__sun) || defined(sun) +# define PLATFORM_ID "SunOS" + +#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) +# define PLATFORM_ID "AIX" + +#elif defined(__hpux) || defined(__hpux__) +# define PLATFORM_ID "HP-UX" + +#elif defined(__HAIKU__) +# define PLATFORM_ID "Haiku" + +#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) +# define PLATFORM_ID "BeOS" + +#elif defined(__QNX__) || defined(__QNXNTO__) +# define PLATFORM_ID "QNX" + +#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) +# define PLATFORM_ID "Tru64" + +#elif defined(__riscos) || defined(__riscos__) +# define PLATFORM_ID "RISCos" + +#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) +# define PLATFORM_ID "SINIX" + +#elif defined(__UNIX_SV__) +# define PLATFORM_ID "UNIX_SV" + +#elif defined(__bsdos__) +# define PLATFORM_ID "BSDOS" + +#elif defined(_MPRAS) || defined(MPRAS) +# define PLATFORM_ID "MP-RAS" + +#elif defined(__osf) || defined(__osf__) +# define PLATFORM_ID "OSF1" + +#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) +# define PLATFORM_ID "SCO_SV" + +#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) +# define PLATFORM_ID "ULTRIX" + +#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) +# define PLATFORM_ID "Xenix" + +#elif defined(__WATCOMC__) +# if defined(__LINUX__) +# define PLATFORM_ID "Linux" + +# elif defined(__DOS__) +# define PLATFORM_ID "DOS" + +# elif defined(__OS2__) +# define PLATFORM_ID "OS2" + +# elif defined(__WINDOWS__) +# define PLATFORM_ID "Windows3x" + +# else /* unknown platform */ +# define PLATFORM_ID +# endif + +#elif defined(__INTEGRITY) +# if defined(INT_178B) +# define PLATFORM_ID "Integrity178" + +# else /* regular Integrity */ +# define PLATFORM_ID "Integrity" +# endif + +#else /* unknown platform */ +# define PLATFORM_ID + +#endif + +/* For windows compilers MSVC and Intel we can determine + the architecture of the compiler being used. This is because + the compilers do not have flags that can change the architecture, + but rather depend on which compiler is being used +*/ +#if defined(_WIN32) && defined(_MSC_VER) +# if defined(_M_IA64) +# define ARCHITECTURE_ID "IA64" + +# elif defined(_M_X64) || defined(_M_AMD64) +# define ARCHITECTURE_ID "x64" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# elif defined(_M_ARM64) +# define ARCHITECTURE_ID "ARM64" + +# elif defined(_M_ARM) +# if _M_ARM == 4 +# define ARCHITECTURE_ID "ARMV4I" +# elif _M_ARM == 5 +# define ARCHITECTURE_ID "ARMV5I" +# else +# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) +# endif + +# elif defined(_M_MIPS) +# define ARCHITECTURE_ID "MIPS" + +# elif defined(_M_SH) +# define ARCHITECTURE_ID "SHx" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__WATCOMC__) +# if defined(_M_I86) +# define ARCHITECTURE_ID "I86" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# if defined(__ICCARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__ICCRX__) +# define ARCHITECTURE_ID "RX" + +# elif defined(__ICCRH850__) +# define ARCHITECTURE_ID "RH850" + +# elif defined(__ICCRL78__) +# define ARCHITECTURE_ID "RL78" + +# elif defined(__ICCRISCV__) +# define ARCHITECTURE_ID "RISCV" + +# elif defined(__ICCAVR__) +# define ARCHITECTURE_ID "AVR" + +# elif defined(__ICC430__) +# define ARCHITECTURE_ID "MSP430" + +# elif defined(__ICCV850__) +# define ARCHITECTURE_ID "V850" + +# elif defined(__ICC8051__) +# define ARCHITECTURE_ID "8051" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__ghs__) +# if defined(__PPC64__) +# define ARCHITECTURE_ID "PPC64" + +# elif defined(__ppc__) +# define ARCHITECTURE_ID "PPC" + +# elif defined(__ARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__x86_64__) +# define ARCHITECTURE_ID "x64" + +# elif defined(__i386__) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif +#else +# define ARCHITECTURE_ID +#endif + +/* Convert integer to decimal digit literals. */ +#define DEC(n) \ + ('0' + (((n) / 10000000)%10)), \ + ('0' + (((n) / 1000000)%10)), \ + ('0' + (((n) / 100000)%10)), \ + ('0' + (((n) / 10000)%10)), \ + ('0' + (((n) / 1000)%10)), \ + ('0' + (((n) / 100)%10)), \ + ('0' + (((n) / 10)%10)), \ + ('0' + ((n) % 10)) + +/* Convert integer to hex digit literals. */ +#define HEX(n) \ + ('0' + ((n)>>28 & 0xF)), \ + ('0' + ((n)>>24 & 0xF)), \ + ('0' + ((n)>>20 & 0xF)), \ + ('0' + ((n)>>16 & 0xF)), \ + ('0' + ((n)>>12 & 0xF)), \ + ('0' + ((n)>>8 & 0xF)), \ + ('0' + ((n)>>4 & 0xF)), \ + ('0' + ((n) & 0xF)) + +/* Construct a string literal encoding the version number components. */ +#ifdef COMPILER_VERSION_MAJOR +char const info_version[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', + COMPILER_VERSION_MAJOR, +# ifdef COMPILER_VERSION_MINOR + '.', COMPILER_VERSION_MINOR, +# ifdef COMPILER_VERSION_PATCH + '.', COMPILER_VERSION_PATCH, +# ifdef COMPILER_VERSION_TWEAK + '.', COMPILER_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct a string literal encoding the internal version number. */ +#ifdef COMPILER_VERSION_INTERNAL +char const info_version_internal[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', + 'i','n','t','e','r','n','a','l','[', + COMPILER_VERSION_INTERNAL,']','\0'}; +#endif + +/* Construct a string literal encoding the version number components. */ +#ifdef SIMULATE_VERSION_MAJOR +char const info_simulate_version[] = { + 'I', 'N', 'F', 'O', ':', + 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', + SIMULATE_VERSION_MAJOR, +# ifdef SIMULATE_VERSION_MINOR + '.', SIMULATE_VERSION_MINOR, +# ifdef SIMULATE_VERSION_PATCH + '.', SIMULATE_VERSION_PATCH, +# ifdef SIMULATE_VERSION_TWEAK + '.', SIMULATE_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; +char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; + + + + +#if !defined(__STDC__) +# if (defined(_MSC_VER) && !defined(__clang__)) \ + || (defined(__ibmxl__) || defined(__IBMC__)) +# define C_DIALECT "90" +# else +# define C_DIALECT +# endif +#elif __STDC_VERSION__ >= 201000L +# define C_DIALECT "11" +#elif __STDC_VERSION__ >= 199901L +# define C_DIALECT "99" +#else +# define C_DIALECT "90" +#endif +const char* info_language_dialect_default = + "INFO" ":" "dialect_default[" C_DIALECT "]"; + +/*--------------------------------------------------------------------------*/ + +#ifdef ID_VOID_MAIN +void main() {} +#else +# if defined(__CLASSIC_C__) +int main(argc, argv) int argc; char *argv[]; +# else +int main(int argc, char* argv[]) +# endif +{ + int require = 0; + require += info_compiler[argc]; + require += info_platform[argc]; + require += info_arch[argc]; +#ifdef COMPILER_VERSION_MAJOR + require += info_version[argc]; +#endif +#ifdef COMPILER_VERSION_INTERNAL + require += info_version_internal[argc]; +#endif +#ifdef SIMULATE_ID + require += info_simulate[argc]; +#endif +#ifdef SIMULATE_VERSION_MAJOR + require += info_simulate_version[argc]; +#endif +#if defined(__CRAYXE) || defined(__CRAYXC) + require += info_cray[argc]; +#endif + require += info_language_dialect_default[argc]; + (void)argv; + return require; +} +#endif diff --git a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdC/a.out b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdC/a.out new file mode 100755 index 0000000000000000000000000000000000000000..b5c91a373fc518990e2aec59df62ee3a3ddb612a GIT binary patch literal 16712 zcmeHOeQX>@6`%9jiPI)$Cv}LMwDpn?$)WY-Y!c(7HNCTa&K|OpHnC}t>n>~G**>@r zbGJwBij+Xo!VwGsB2oT8ii!jX!XM?2ejovkLJO?`H3Eg8f=GcDgF@<-2Dy;tcyH#t z^X~dwB+4HM?MSz8=J!7L&FtRJ?##!deZ5sapWxyb?-kez*DEAUjM_a^0TLD+VhtQ` z7B`6%(5{x4;)fLht|}L*oV1p3KTy!ESR#tyFrh- zmL%Sqa5o{P%rC01oB}dwK?nuR3QprqVs%5I9y`_C;FrN*!Nyiu$`oJ-@ zci*4@GqZ?M8f9NJP#gI#?vB2&W!v2^9*Cd%;uyqyi0l>5h_~4OYn4tZP@HYQhLc5kED`TFGRLR+gC3v}Hwevu5+ zh83T2Zr8hTO;d7>E<8uL=E6Tkc(V)t65$u_6tdu0!1Lj9(T4LmBX7=z^Vmdu-iGrv zhWLUFm-kBqz2arS%Yc^wF9Ti%ybO35@G|g!lYzh0-SQ9p=%rfyc+IbO2%$eTYgLt= z*N^_F_N+X|(ym7Veyz0aYe4Fn1j<9}`?A#|WV`jRvEsS=^y2UJqko*gYoKqY<~%%_ z>N9H$NjlGfrPBHwsJwncpXq!GD*8;#caiK~u-1d?eOL$At4bH^nvS63vqV9@DCKv3 z63O;!dU0MqbNNpF%z|I{J)@tyW;K9;ZDgRfbaAY%3F2aXjQ2=q6xgD0>!5zLvkI$v z@g-}ue!O!9H0HLKN~O6t9G!cp+V3q9=@a(3m1PJy^3M#$Jajx zGxg)qOZp?a@A&H)6xL&!M^QpVjs`dT`QIJGjIB>rq&lIzkS8m z`ihr(ihqif8h)oAJ?qnV|F-ZK?Ej(R$i0!_$bAvx?ATbauIU(_uk3Fe8R%DzoAOAJ zZ13P@z{`M_0WSky2D}V-8SpaTWx&gTmjN#W|Dzf3IleY74KlW`cmJNzYmBgqeM;wPnCk%@~Wnp`_usqR!mQ=hTE>+;v94Tb1 zg0?#d6Z@9df^4-u*cJ+gb_UzFEBxOF5J?OZ>s44D0PrrCa`TBIq zZ-5sfc0|?vaJ7dj;(Rw+)WPepTD)3XL{ts$YgHm3CSCc2^%fF8<-*@dINv9g6(QaO z6&SVUc+ek~UikUoZ4lr0BnSswoR5C_zRUPDRD5D-J|6+RQvA!E*SDpeb>f#8u&Y$E z^OTgiVM(0N0q(=QsjI(!LGpaRXBRKa%F^-khP1P^e;;FyP5+INs3Lr(*(hw;`CX3L6>lYE%Q?G9o;LH6rO zp8xNj1|03UucLEhXFK_o?<&C-uHae=`D}LCc^z>$U$-6TT%m!UyKDq}vm1nVJK&g~ zu%?)8B-1VN4MGbmfa4dVIV*1!U?tM1Slk|BSZQMvH;Ck6b4WaEjHj|AX3B_L*<9W* z3sVB$T&EINA|C7rwYOFl!mTMu!_4K(X(N%ba?@fgXQmTIypT>$gNm(XfTZOR?d~@} zoapYR7v!-xgl8DN2O|AZBf780fL$t1owzW1KCmy+AM18<CYsTFK}P@9+h!7R(=u6Qao~q% z7tC=;xbvMqh{N_DP9yFMs<_$5xxL7FQqn$slu)tYHwGbs`RTM}jsUfCicWAXnSpIb zlOmYOT8ZFzrVyOWWhWCkYuW~l6q2wpEEy*#(iLm5%yA*bC(QhW2*#%~;6hO=r#Kvk z6r+X#yj&t>qJjv@lm#bKmcT=BJPQ>oF$G5)q9B=-JsC_)(4d@%gFd&Ez8alMgX>`2 zOeaSn92^Ki=mZgjPD#UPr_1hb6PyRYtpRTXvhZ^qQ=SJ9Tgq}B=@$6mGcxP*^B+?U zc=l4hFA&%c)UJPso(Gw3wJSrN@5cAVx$y8%OqHg_r0RKBY>vQ}(zhTP$@!J&^ zcl;(`IJaSap8qgCfl5&D95K(V&-0cfV0g-`&(E<;dHw_Dy(m(Ja+7&A0&f1UD$XX-v&R9hwp!@0OQ#0`rpJq1}Ob5>24 & 0x00FF) +# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF) +# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF) + +#elif defined(__BORLANDC__) +# define COMPILER_ID "Borland" + /* __BORLANDC__ = 0xVRR */ +# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8) +# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF) + +#elif defined(__WATCOMC__) && __WATCOMC__ < 1200 +# define COMPILER_ID "Watcom" + /* __WATCOMC__ = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__WATCOMC__) +# define COMPILER_ID "OpenWatcom" + /* __WATCOMC__ = VVRP + 1100 */ +# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__SUNPRO_CC) +# define COMPILER_ID "SunPro" +# if __SUNPRO_CC >= 0x5100 + /* __SUNPRO_CC = 0xVRRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>12) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) +# else + /* __SUNPRO_CC = 0xVRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>8) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) +# endif + +#elif defined(__HP_aCC) +# define COMPILER_ID "HP" + /* __HP_aCC = VVRRPP */ +# define COMPILER_VERSION_MAJOR DEC(__HP_aCC/10000) +# define COMPILER_VERSION_MINOR DEC(__HP_aCC/100 % 100) +# define COMPILER_VERSION_PATCH DEC(__HP_aCC % 100) + +#elif defined(__DECCXX) +# define COMPILER_ID "Compaq" + /* __DECCXX_VER = VVRRTPPPP */ +# define COMPILER_VERSION_MAJOR DEC(__DECCXX_VER/10000000) +# define COMPILER_VERSION_MINOR DEC(__DECCXX_VER/100000 % 100) +# define COMPILER_VERSION_PATCH DEC(__DECCXX_VER % 10000) + +#elif defined(__IBMCPP__) && defined(__COMPILER_VER__) +# define COMPILER_ID "zOS" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__ibmxl__) && defined(__clang__) +# define COMPILER_ID "XLClang" +# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__) +# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__) +# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__) +# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__) + + +#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ >= 800 +# define COMPILER_ID "XL" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ < 800 +# define COMPILER_ID "VisualAge" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__PGI) +# define COMPILER_ID "PGI" +# define COMPILER_VERSION_MAJOR DEC(__PGIC__) +# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__) +# if defined(__PGIC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__) +# endif + +#elif defined(_CRAYC) +# define COMPILER_ID "Cray" +# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR) +# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR) + +#elif defined(__TI_COMPILER_VERSION__) +# define COMPILER_ID "TI" + /* __TI_COMPILER_VERSION__ = VVVRRRPPP */ +# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000) +# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000) +# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000) + +#elif defined(__FUJITSU) || defined(__FCC_VERSION) || defined(__fcc_version) +# define COMPILER_ID "Fujitsu" + +#elif defined(__ghs__) +# define COMPILER_ID "GHS" +/* __GHS_VERSION_NUMBER = VVVVRP */ +# ifdef __GHS_VERSION_NUMBER +# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100) +# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10) +# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10) +# endif + +#elif defined(__SCO_VERSION__) +# define COMPILER_ID "SCO" + +#elif defined(__ARMCC_VERSION) && !defined(__clang__) +# define COMPILER_ID "ARMCC" +#if __ARMCC_VERSION >= 1000000 + /* __ARMCC_VERSION = VRRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#else + /* __ARMCC_VERSION = VRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#endif + + +#elif defined(__clang__) && defined(__apple_build_version__) +# define COMPILER_ID "AppleClang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif +# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__) + +#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION) +# define COMPILER_ID "ARMClang" + # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION % 10000) +# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION) + +#elif defined(__clang__) +# define COMPILER_ID "Clang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif + +#elif defined(__GNUC__) || defined(__GNUG__) +# define COMPILER_ID "GNU" +# if defined(__GNUC__) +# define COMPILER_VERSION_MAJOR DEC(__GNUC__) +# else +# define COMPILER_VERSION_MAJOR DEC(__GNUG__) +# endif +# if defined(__GNUC_MINOR__) +# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__) +# endif +# if defined(__GNUC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif + +#elif defined(_MSC_VER) +# define COMPILER_ID "MSVC" + /* _MSC_VER = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100) +# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100) +# if defined(_MSC_FULL_VER) +# if _MSC_VER >= 1400 + /* _MSC_FULL_VER = VVRRPPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000) +# else + /* _MSC_FULL_VER = VVRRPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000) +# endif +# endif +# if defined(_MSC_BUILD) +# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD) +# endif + +#elif defined(__VISUALDSPVERSION__) || defined(__ADSPBLACKFIN__) || defined(__ADSPTS__) || defined(__ADSP21000__) +# define COMPILER_ID "ADSP" +#if defined(__VISUALDSPVERSION__) + /* __VISUALDSPVERSION__ = 0xVVRRPP00 */ +# define COMPILER_VERSION_MAJOR HEX(__VISUALDSPVERSION__>>24) +# define COMPILER_VERSION_MINOR HEX(__VISUALDSPVERSION__>>16 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__VISUALDSPVERSION__>>8 & 0xFF) +#endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# define COMPILER_ID "IAR" +# if defined(__VER__) && defined(__ICCARM__) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000) +# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000) +# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__)) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100) +# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100)) +# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# endif + + +/* These compilers are either not known or too old to define an + identification macro. Try to identify the platform and guess that + it is the native compiler. */ +#elif defined(__hpux) || defined(__hpua) +# define COMPILER_ID "HP" + +#else /* unknown compiler */ +# define COMPILER_ID "" +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; +#ifdef SIMULATE_ID +char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; +#endif + +#ifdef __QNXNTO__ +char const* qnxnto = "INFO" ":" "qnxnto[]"; +#endif + +#if defined(__CRAYXE) || defined(__CRAYXC) +char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; +#endif + +#define STRINGIFY_HELPER(X) #X +#define STRINGIFY(X) STRINGIFY_HELPER(X) + +/* Identify known platforms by name. */ +#if defined(__linux) || defined(__linux__) || defined(linux) +# define PLATFORM_ID "Linux" + +#elif defined(__CYGWIN__) +# define PLATFORM_ID "Cygwin" + +#elif defined(__MINGW32__) +# define PLATFORM_ID "MinGW" + +#elif defined(__APPLE__) +# define PLATFORM_ID "Darwin" + +#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) +# define PLATFORM_ID "Windows" + +#elif defined(__FreeBSD__) || defined(__FreeBSD) +# define PLATFORM_ID "FreeBSD" + +#elif defined(__NetBSD__) || defined(__NetBSD) +# define PLATFORM_ID "NetBSD" + +#elif defined(__OpenBSD__) || defined(__OPENBSD) +# define PLATFORM_ID "OpenBSD" + +#elif defined(__sun) || defined(sun) +# define PLATFORM_ID "SunOS" + +#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) +# define PLATFORM_ID "AIX" + +#elif defined(__hpux) || defined(__hpux__) +# define PLATFORM_ID "HP-UX" + +#elif defined(__HAIKU__) +# define PLATFORM_ID "Haiku" + +#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) +# define PLATFORM_ID "BeOS" + +#elif defined(__QNX__) || defined(__QNXNTO__) +# define PLATFORM_ID "QNX" + +#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) +# define PLATFORM_ID "Tru64" + +#elif defined(__riscos) || defined(__riscos__) +# define PLATFORM_ID "RISCos" + +#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) +# define PLATFORM_ID "SINIX" + +#elif defined(__UNIX_SV__) +# define PLATFORM_ID "UNIX_SV" + +#elif defined(__bsdos__) +# define PLATFORM_ID "BSDOS" + +#elif defined(_MPRAS) || defined(MPRAS) +# define PLATFORM_ID "MP-RAS" + +#elif defined(__osf) || defined(__osf__) +# define PLATFORM_ID "OSF1" + +#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) +# define PLATFORM_ID "SCO_SV" + +#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) +# define PLATFORM_ID "ULTRIX" + +#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) +# define PLATFORM_ID "Xenix" + +#elif defined(__WATCOMC__) +# if defined(__LINUX__) +# define PLATFORM_ID "Linux" + +# elif defined(__DOS__) +# define PLATFORM_ID "DOS" + +# elif defined(__OS2__) +# define PLATFORM_ID "OS2" + +# elif defined(__WINDOWS__) +# define PLATFORM_ID "Windows3x" + +# else /* unknown platform */ +# define PLATFORM_ID +# endif + +#elif defined(__INTEGRITY) +# if defined(INT_178B) +# define PLATFORM_ID "Integrity178" + +# else /* regular Integrity */ +# define PLATFORM_ID "Integrity" +# endif + +#else /* unknown platform */ +# define PLATFORM_ID + +#endif + +/* For windows compilers MSVC and Intel we can determine + the architecture of the compiler being used. This is because + the compilers do not have flags that can change the architecture, + but rather depend on which compiler is being used +*/ +#if defined(_WIN32) && defined(_MSC_VER) +# if defined(_M_IA64) +# define ARCHITECTURE_ID "IA64" + +# elif defined(_M_X64) || defined(_M_AMD64) +# define ARCHITECTURE_ID "x64" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# elif defined(_M_ARM64) +# define ARCHITECTURE_ID "ARM64" + +# elif defined(_M_ARM) +# if _M_ARM == 4 +# define ARCHITECTURE_ID "ARMV4I" +# elif _M_ARM == 5 +# define ARCHITECTURE_ID "ARMV5I" +# else +# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) +# endif + +# elif defined(_M_MIPS) +# define ARCHITECTURE_ID "MIPS" + +# elif defined(_M_SH) +# define ARCHITECTURE_ID "SHx" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__WATCOMC__) +# if defined(_M_I86) +# define ARCHITECTURE_ID "I86" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# if defined(__ICCARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__ICCRX__) +# define ARCHITECTURE_ID "RX" + +# elif defined(__ICCRH850__) +# define ARCHITECTURE_ID "RH850" + +# elif defined(__ICCRL78__) +# define ARCHITECTURE_ID "RL78" + +# elif defined(__ICCRISCV__) +# define ARCHITECTURE_ID "RISCV" + +# elif defined(__ICCAVR__) +# define ARCHITECTURE_ID "AVR" + +# elif defined(__ICC430__) +# define ARCHITECTURE_ID "MSP430" + +# elif defined(__ICCV850__) +# define ARCHITECTURE_ID "V850" + +# elif defined(__ICC8051__) +# define ARCHITECTURE_ID "8051" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__ghs__) +# if defined(__PPC64__) +# define ARCHITECTURE_ID "PPC64" + +# elif defined(__ppc__) +# define ARCHITECTURE_ID "PPC" + +# elif defined(__ARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__x86_64__) +# define ARCHITECTURE_ID "x64" + +# elif defined(__i386__) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif +#else +# define ARCHITECTURE_ID +#endif + +/* Convert integer to decimal digit literals. */ +#define DEC(n) \ + ('0' + (((n) / 10000000)%10)), \ + ('0' + (((n) / 1000000)%10)), \ + ('0' + (((n) / 100000)%10)), \ + ('0' + (((n) / 10000)%10)), \ + ('0' + (((n) / 1000)%10)), \ + ('0' + (((n) / 100)%10)), \ + ('0' + (((n) / 10)%10)), \ + ('0' + ((n) % 10)) + +/* Convert integer to hex digit literals. */ +#define HEX(n) \ + ('0' + ((n)>>28 & 0xF)), \ + ('0' + ((n)>>24 & 0xF)), \ + ('0' + ((n)>>20 & 0xF)), \ + ('0' + ((n)>>16 & 0xF)), \ + ('0' + ((n)>>12 & 0xF)), \ + ('0' + ((n)>>8 & 0xF)), \ + ('0' + ((n)>>4 & 0xF)), \ + ('0' + ((n) & 0xF)) + +/* Construct a string literal encoding the version number components. */ +#ifdef COMPILER_VERSION_MAJOR +char const info_version[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', + COMPILER_VERSION_MAJOR, +# ifdef COMPILER_VERSION_MINOR + '.', COMPILER_VERSION_MINOR, +# ifdef COMPILER_VERSION_PATCH + '.', COMPILER_VERSION_PATCH, +# ifdef COMPILER_VERSION_TWEAK + '.', COMPILER_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct a string literal encoding the internal version number. */ +#ifdef COMPILER_VERSION_INTERNAL +char const info_version_internal[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', + 'i','n','t','e','r','n','a','l','[', + COMPILER_VERSION_INTERNAL,']','\0'}; +#endif + +/* Construct a string literal encoding the version number components. */ +#ifdef SIMULATE_VERSION_MAJOR +char const info_simulate_version[] = { + 'I', 'N', 'F', 'O', ':', + 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', + SIMULATE_VERSION_MAJOR, +# ifdef SIMULATE_VERSION_MINOR + '.', SIMULATE_VERSION_MINOR, +# ifdef SIMULATE_VERSION_PATCH + '.', SIMULATE_VERSION_PATCH, +# ifdef SIMULATE_VERSION_TWEAK + '.', SIMULATE_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; +char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; + + + + +#if defined(__INTEL_COMPILER) && defined(_MSVC_LANG) && _MSVC_LANG < 201403L +# if defined(__INTEL_CXX11_MODE__) +# if defined(__cpp_aggregate_nsdmi) +# define CXX_STD 201402L +# else +# define CXX_STD 201103L +# endif +# else +# define CXX_STD 199711L +# endif +#elif defined(_MSC_VER) && defined(_MSVC_LANG) +# define CXX_STD _MSVC_LANG +#else +# define CXX_STD __cplusplus +#endif + +const char* info_language_dialect_default = "INFO" ":" "dialect_default[" +#if CXX_STD > 201703L + "20" +#elif CXX_STD >= 201703L + "17" +#elif CXX_STD >= 201402L + "14" +#elif CXX_STD >= 201103L + "11" +#else + "98" +#endif +"]"; + +/*--------------------------------------------------------------------------*/ + +int main(int argc, char* argv[]) +{ + int require = 0; + require += info_compiler[argc]; + require += info_platform[argc]; +#ifdef COMPILER_VERSION_MAJOR + require += info_version[argc]; +#endif +#ifdef COMPILER_VERSION_INTERNAL + require += info_version_internal[argc]; +#endif +#ifdef SIMULATE_ID + require += info_simulate[argc]; +#endif +#ifdef SIMULATE_VERSION_MAJOR + require += info_simulate_version[argc]; +#endif +#if defined(__CRAYXE) || defined(__CRAYXC) + require += info_cray[argc]; +#endif + require += info_language_dialect_default[argc]; + (void)argv; + return require; +} diff --git a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdCXX/a.out b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdCXX/a.out new file mode 100755 index 0000000000000000000000000000000000000000..2881803fe1c1315653cec8eead6766e2c9b69693 GIT binary patch literal 16720 zcmeHOe{3699e<9KHtkx+{k4X6TW+P5(v7%ImWH$})K22`jNEo>lP!>C$HjIM3&#%j znI_XZT2h9r5~#FFOai28NC>n_1O6BSX^^U02Z*s%LR(QmM6hZZDqS`h3ed%Tzwf?Z z=kDSTiSZBUp5*(y_xb*K@4oNd`QF`opO3_PsyrUS$tylCuoUu}Oo#;jy_5k6iFUCT zj<<{3#0n@^OU{&sOaQ5wE?3#HmUu59+SOyG0^VlQP=lGcg@|Z(v($(Ug2X83JkYKN z1ypw8ZfYkZ%ggmCXbee_$1+|<1xSomJ8a5)lN5{j4m*aZK9!K|uqaOSN@1VodPYPVsc2VtOez-)YxRc24XjJ4UPn(~+x2;yI(23lmr*e96m7?S&JMes`|;eE#*9SDz@{#Xhi3)WL-IJS4D; zd8`9<%=141IU37=my*94lf+F9?Z7J)WLtn+UxDuhPN~4hZ^GXK{I&}E0^%3PaJ30d zi%;mP-UD6f zY$n;O52ev^WGtH@OU+cRs3_ZGMv-Ibfe2y@d0Z5>q*h^cKSFKi>yxhwWt}NlpzD_T zS#nStGUd#3+3(;L#nh{J@HyfY2mdAF8y)-;#9!VgWWuq4=fi2%!t*(!Y|g^-*hGHb z!t*tT{DOs-_e&(*|9if^XmEQ`_%IbUe$9^y|id-1P43FL2YSvxUK=(#rD|V;~fzYi^AP~>QqM+ zX4T?VV~u*MV+9oEc9u$|xda?8*4z$d&mh>^?B6^JLUhyzcEw}Y)M8=w#mEh8rh01A zFJPvADsoMIQuVx2_pGS<$&4p*1Na|T;!VZrO)vN$n$K4I%i7Fj;Uv}t z;Sb4phaZehciaOrm+%A8;;Z4lXz|@}Z@74)Pn~Ys4)l@O&iAlS=NcAECH4G!UZbJ; z3dJ*4d?!}C-d%hnT-x}1b?Smg-SfM`pRm6N2Ez}92g47CwF|>bb>eB`NI;b1q&zZY zliY(F0XG6}1l$O?5pW~mM!=1L8v!>0ZUo#2{EtMyWBb~;ywTBvJ%{$jvt#3_bTT&p zUnvLeIySlXxnwS%%4P(fbxlyo=(OM z_!Ky-7t+Q+bL*h+Z1sK&zh~mNFXOFJDGhiM@C@J?K>T)jY`#=F2Uz`fsq{-g18^g} zhQM#Jm^_ah7M=;eXX~1kwWo>4H3scqk8cJ<_e%MNZ#!gLu?)NfIa+&M z?Ax;Uu6wp`Loxb&2!3FS8D@yj*czTo34RA2kl%Kg4j#@8P91;f6^PM^~0tMByrJAJkC zd**M!ydV6y-|H}tZgL~wM!=1L8v!>0ZUo#2xDjw8;6{KW!0Q@$9V1MEWMW*yinPvg zEtMN-vFL}W%@P^)yVQ1S0R2z^3^6S zjuGN|Q%v`_JX=Jg)geI{d3e_ z_%bZZ96y+b$?~ft|2vhr9pv`E2fRM~1A653tBPVe;`OP#9+lUh?(gc_t2Fiv6*5La z*%N??eN%HmmYN@H2?m0#ftH;n|L+^*g%zyz++h}VFT9iB_3IWI)<$~;uTQu0)#A~L zern3&%&xzpJihGwO2OmM&esa=PdmR#@HnvZs|AlYI}f9mt}8pgMkp2ewIW!N_m%f& z*!|QAzE15tI8m&OnfHoy<@NVgsTWp;&sEglP~OL2*WXya-t9bGofXEXSKL~@KJEIO zg$P+0Gw+3~Jy?i$A^Eco{!ZfgK52Rp;-ip( zQCn^g)`zJFeja!m#P>Z(!T}fOW4(OeWgg!NdBpN~J_&rK_CF)_{UW4522zU&;G?qs zdEh;_)p$}Bi3`Q_v1e&GFLbGg6RWEb%3tCn9c{m8SD1&@*+=lDDc zykgPg>=VGRtJ*C1zRLVrd+lA|ktei(=CA@*$I zG13pwc-}?gm&m`L^!b1A3h?MBNIa>FH^|RUs#m_l1mQLEFki6))GcG zm)G>dgupk~>7zphO_)i9Q^bg4j+hUk%QeD>|L>YN(im{lLx~G zqFr{0+#~}Oym!|kDtS=54-0L7>`-SorXA|(ITGpBdc&Qu2zr%UYvTEWJg4{HOp{FL zhR!BSyKzDx+jblcwahIypljcMqb2fLZB)-BaBoiZ5NIV*8Lf~{CWJh7e#y_3V7oAY zrj$P_fOIIIrz+%rAZeV|Gb06k1iHcgB>>c6QxJy{cMDbA0%YHGWIrkCA3rt-5y(%D z8Tt^Qku!0WbEypMKN=T-Ox8#SMlyxKcrH7h%o&pwYN(Kc9b%~jQQ^*LlcA3YsXnUb zM@1kpnSm-yG;*edzLMAq8pv|Vw2lTMAfpr*Pa6Ucfsrg^jN}9yajb%7R(4(>IZC5* zGy(QpGVRS_YFcm}oa@EkGDY|rzT6mWRTY|qcLj69D56`9b7 zHGLKeIHzHIe(q)D`60KT^%x%mdz>S2nV*jt6{^hHexk)RWH6>|&(G0}3N@JPcb@;( zz!p_lj(@c>5%PSM*k%3yO%Pb^6|!SwcWlpP#-|+i{QS6e1IDY44s-hZ zzQdm91B^VM=lY%F_lIQ9@fQkd5}uWbm1ur-S@_%KLwv`dnuGBiPni?D=_qp$SMxtY?;%%FMq70vvl>fBCr? z)^}r?q5i}1kBRNLAHNM8s<1u3$C#l9xe&;#iR~E|KxnlWA<_<-NI>LL{Y)%E27Ph; z{5%&VL#~JQ>2$a#yg(r5tcUIIE^C?@wzndW9jof6$)QRYHeScrCEOmq|E&U!+itc0 e4*oGfdcfhF>oukL>{;1 + +void* test_func(void* data) +{ + return data; +} + +int main(void) +{ + pthread_t thread; + pthread_create(&thread, NULL, test_func, NULL); + pthread_detach(thread); + pthread_join(thread, NULL); + pthread_atfork(NULL, NULL, NULL); + pthread_exit(NULL); + + return 0; +} + diff --git a/rad-sim/example-designs/mult/CMakeFiles/CMakeOutput.log b/rad-sim/example-designs/mult/CMakeFiles/CMakeOutput.log new file mode 100644 index 0000000..71dd668 --- /dev/null +++ b/rad-sim/example-designs/mult/CMakeFiles/CMakeOutput.log @@ -0,0 +1,477 @@ +The system is: Linux - 5.15.0-69-generic - x86_64 +Compiling the C compiler identification source file "CMakeCCompilerId.c" succeeded. +Compiler: /usr/bin/cc +Build flags: +Id flags: + +The output was: +0 + + +Compilation of the C compiler identification source "CMakeCCompilerId.c" produced "a.out" + +The C compiler identification is GNU, found in "/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/a.out" + +Compiling the CXX compiler identification source file "CMakeCXXCompilerId.cpp" succeeded. +Compiler: /usr/bin/c++ +Build flags: +Id flags: + +The output was: +0 + + +Compilation of the CXX compiler identification source "CMakeCXXCompilerId.cpp" produced "a.out" + +The CXX compiler identification is GNU, found in "/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdCXX/a.out" + +Determining if the C compiler works passed with the following output: +Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp + +Run Build Command(s):/usr/bin/make cmTC_9f9dc/fast && /usr/bin/make -f CMakeFiles/cmTC_9f9dc.dir/build.make CMakeFiles/cmTC_9f9dc.dir/build +make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' +Building C object CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o +/usr/bin/cc -o CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/testCCompiler.c +Linking C executable cmTC_9f9dc +/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_9f9dc.dir/link.txt --verbose=1 +/usr/bin/cc -rdynamic CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o -o cmTC_9f9dc +make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' + + + +Detecting C compiler ABI info compiled with the following output: +Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp + +Run Build Command(s):/usr/bin/make cmTC_5eca0/fast && /usr/bin/make -f CMakeFiles/cmTC_5eca0.dir/build.make CMakeFiles/cmTC_5eca0.dir/build +make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' +Building C object CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o +/usr/bin/cc -v -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -c /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c +Using built-in specs. +COLLECT_GCC=/usr/bin/cc +OFFLOAD_TARGET_NAMES=nvptx-none:hsa +OFFLOAD_TARGET_DEFAULT=1 +Target: x86_64-linux-gnu +Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu +Thread model: posix +gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' + /usr/lib/gcc/x86_64-linux-gnu/9/cc1 -quiet -v -imultiarch x86_64-linux-gnu /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c -quiet -dumpbase CMakeCCompilerABI.c -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccEZ3Z6E.s +GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) + compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP + +GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 +ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu" +ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed" +ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include" +#include "..." search starts here: +#include <...> search starts here: + /usr/lib/gcc/x86_64-linux-gnu/9/include + /usr/local/include + /usr/include/x86_64-linux-gnu + /usr/include +End of search list. +GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) + compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP + +GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 +Compiler executable checksum: 01da938ff5dc2163489aa33cb3b747a7 +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' + as -v --64 -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o /tmp/ccEZ3Z6E.s +GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34 +COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ +LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' +Linking C executable cmTC_5eca0 +/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_5eca0.dir/link.txt --verbose=1 +/usr/bin/cc -v -rdynamic CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -o cmTC_5eca0 +Using built-in specs. +COLLECT_GCC=/usr/bin/cc +COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper +OFFLOAD_TARGET_NAMES=nvptx-none:hsa +OFFLOAD_TARGET_DEFAULT=1 +Target: x86_64-linux-gnu +Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu +Thread model: posix +gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) +COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ +LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ +COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64' + /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/ccjwqw95.res -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_5eca0 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -lgcc --push-state --as-needed -lgcc_s --pop-state -lc -lgcc --push-state --as-needed -lgcc_s --pop-state /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o +COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64' +make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' + + + +Parsed C implicit include dir info from above output: rv=done + found start of include info + found start of implicit include info + add: [/usr/lib/gcc/x86_64-linux-gnu/9/include] + add: [/usr/local/include] + add: [/usr/include/x86_64-linux-gnu] + add: [/usr/include] + end of search list found + collapse include dir [/usr/lib/gcc/x86_64-linux-gnu/9/include] ==> [/usr/lib/gcc/x86_64-linux-gnu/9/include] + collapse include dir [/usr/local/include] ==> [/usr/local/include] + collapse include dir [/usr/include/x86_64-linux-gnu] ==> [/usr/include/x86_64-linux-gnu] + collapse include dir [/usr/include] ==> [/usr/include] + implicit include dirs: [/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include] + + +Parsed C implicit link information from above output: + link line regex: [^( *|.*[/\])(ld|CMAKE_LINK_STARTFILE-NOTFOUND|([^/\]+-)?ld|collect2)[^/\]*( |$)] + ignore line: [Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp] + ignore line: [] + ignore line: [Run Build Command(s):/usr/bin/make cmTC_5eca0/fast && /usr/bin/make -f CMakeFiles/cmTC_5eca0.dir/build.make CMakeFiles/cmTC_5eca0.dir/build] + ignore line: [make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp'] + ignore line: [Building C object CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o] + ignore line: [/usr/bin/cc -v -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -c /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c] + ignore line: [Using built-in specs.] + ignore line: [COLLECT_GCC=/usr/bin/cc] + ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] + ignore line: [OFFLOAD_TARGET_DEFAULT=1] + ignore line: [Target: x86_64-linux-gnu] + ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] + ignore line: [Thread model: posix] + ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] + ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/cc1 -quiet -v -imultiarch x86_64-linux-gnu /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c -quiet -dumpbase CMakeCCompilerABI.c -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccEZ3Z6E.s] + ignore line: [GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] + ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] + ignore line: [] + ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] + ignore line: [ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu"] + ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed"] + ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include"] + ignore line: [#include "..." search starts here:] + ignore line: [#include <...> search starts here:] + ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/include] + ignore line: [ /usr/local/include] + ignore line: [ /usr/include/x86_64-linux-gnu] + ignore line: [ /usr/include] + ignore line: [End of search list.] + ignore line: [GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] + ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] + ignore line: [] + ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] + ignore line: [Compiler executable checksum: 01da938ff5dc2163489aa33cb3b747a7] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] + ignore line: [ as -v --64 -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o /tmp/ccEZ3Z6E.s] + ignore line: [GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34] + ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] + ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] + ignore line: [Linking C executable cmTC_5eca0] + ignore line: [/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_5eca0.dir/link.txt --verbose=1] + ignore line: [/usr/bin/cc -v -rdynamic CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -o cmTC_5eca0 ] + ignore line: [Using built-in specs.] + ignore line: [COLLECT_GCC=/usr/bin/cc] + ignore line: [COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] + ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] + ignore line: [OFFLOAD_TARGET_DEFAULT=1] + ignore line: [Target: x86_64-linux-gnu] + ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] + ignore line: [Thread model: posix] + ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] + ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] + ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64'] + link line: [ /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/ccjwqw95.res -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_5eca0 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -lgcc --push-state --as-needed -lgcc_s --pop-state -lc -lgcc --push-state --as-needed -lgcc_s --pop-state /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] + arg [/usr/lib/gcc/x86_64-linux-gnu/9/collect2] ==> ignore + arg [-plugin] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so] ==> ignore + arg [-plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] ==> ignore + arg [-plugin-opt=-fresolution=/tmp/ccjwqw95.res] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore + arg [-plugin-opt=-pass-through=-lc] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore + arg [--build-id] ==> ignore + arg [--eh-frame-hdr] ==> ignore + arg [-m] ==> ignore + arg [elf_x86_64] ==> ignore + arg [--hash-style=gnu] ==> ignore + arg [--as-needed] ==> ignore + arg [-export-dynamic] ==> ignore + arg [-dynamic-linker] ==> ignore + arg [/lib64/ld-linux-x86-64.so.2] ==> ignore + arg [-pie] ==> ignore + arg [-znow] ==> ignore + arg [-zrelro] ==> ignore + arg [-o] ==> ignore + arg [cmTC_5eca0] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o] ==> ignore + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] + arg [-L/lib/x86_64-linux-gnu] ==> dir [/lib/x86_64-linux-gnu] + arg [-L/lib/../lib] ==> dir [/lib/../lib] + arg [-L/usr/lib/x86_64-linux-gnu] ==> dir [/usr/lib/x86_64-linux-gnu] + arg [-L/usr/lib/../lib] ==> dir [/usr/lib/../lib] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] + arg [CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o] ==> ignore + arg [-lgcc] ==> lib [gcc] + arg [--push-state] ==> ignore + arg [--as-needed] ==> ignore + arg [-lgcc_s] ==> lib [gcc_s] + arg [--pop-state] ==> ignore + arg [-lc] ==> lib [c] + arg [-lgcc] ==> lib [gcc] + arg [--push-state] ==> ignore + arg [--as-needed] ==> ignore + arg [-lgcc_s] ==> lib [gcc_s] + arg [--pop-state] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] ==> ignore + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9] ==> [/usr/lib/gcc/x86_64-linux-gnu/9] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> [/usr/lib] + collapse library dir [/lib/x86_64-linux-gnu] ==> [/lib/x86_64-linux-gnu] + collapse library dir [/lib/../lib] ==> [/lib] + collapse library dir [/usr/lib/x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] + collapse library dir [/usr/lib/../lib] ==> [/usr/lib] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> [/usr/lib] + implicit libs: [gcc;gcc_s;c;gcc;gcc_s] + implicit dirs: [/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib] + implicit fwks: [] + + +Determining if the CXX compiler works passed with the following output: +Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp + +Run Build Command(s):/usr/bin/make cmTC_8e0c3/fast && /usr/bin/make -f CMakeFiles/cmTC_8e0c3.dir/build.make CMakeFiles/cmTC_8e0c3.dir/build +make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' +Building CXX object CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o +/usr/bin/c++ -o CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/testCXXCompiler.cxx +Linking CXX executable cmTC_8e0c3 +/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_8e0c3.dir/link.txt --verbose=1 +/usr/bin/c++ -rdynamic CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o -o cmTC_8e0c3 +make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' + + + +Detecting CXX compiler ABI info compiled with the following output: +Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp + +Run Build Command(s):/usr/bin/make cmTC_59ff1/fast && /usr/bin/make -f CMakeFiles/cmTC_59ff1.dir/build.make CMakeFiles/cmTC_59ff1.dir/build +make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' +Building CXX object CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o +/usr/bin/c++ -v -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -c /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp +Using built-in specs. +COLLECT_GCC=/usr/bin/c++ +OFFLOAD_TARGET_NAMES=nvptx-none:hsa +OFFLOAD_TARGET_DEFAULT=1 +Target: x86_64-linux-gnu +Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu +Thread model: posix +gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' + /usr/lib/gcc/x86_64-linux-gnu/9/cc1plus -quiet -v -imultiarch x86_64-linux-gnu -D_GNU_SOURCE /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp -quiet -dumpbase CMakeCXXCompilerABI.cpp -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccETTYVz.s +GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) + compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP + +GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 +ignoring duplicate directory "/usr/include/x86_64-linux-gnu/c++/9" +ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu" +ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed" +ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include" +#include "..." search starts here: +#include <...> search starts here: + /usr/include/c++/9 + /usr/include/x86_64-linux-gnu/c++/9 + /usr/include/c++/9/backward + /usr/lib/gcc/x86_64-linux-gnu/9/include + /usr/local/include + /usr/include/x86_64-linux-gnu + /usr/include +End of search list. +GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) + compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP + +GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 +Compiler executable checksum: 3d1eba838554fa2348dba760e4770469 +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' + as -v --64 -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o /tmp/ccETTYVz.s +GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34 +COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ +LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ +COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' +Linking CXX executable cmTC_59ff1 +/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_59ff1.dir/link.txt --verbose=1 +/usr/bin/c++ -v -rdynamic CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -o cmTC_59ff1 +Using built-in specs. +COLLECT_GCC=/usr/bin/c++ +COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper +OFFLOAD_TARGET_NAMES=nvptx-none:hsa +OFFLOAD_TARGET_DEFAULT=1 +Target: x86_64-linux-gnu +Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu +Thread model: posix +gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) +COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ +LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ +COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64' + /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/cco0EvR4.res -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_59ff1 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -lstdc++ -lm -lgcc_s -lgcc -lc -lgcc_s -lgcc /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o +COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64' +make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' + + + +Parsed CXX implicit include dir info from above output: rv=done + found start of include info + found start of implicit include info + add: [/usr/include/c++/9] + add: [/usr/include/x86_64-linux-gnu/c++/9] + add: [/usr/include/c++/9/backward] + add: [/usr/lib/gcc/x86_64-linux-gnu/9/include] + add: [/usr/local/include] + add: [/usr/include/x86_64-linux-gnu] + add: [/usr/include] + end of search list found + collapse include dir [/usr/include/c++/9] ==> [/usr/include/c++/9] + collapse include dir [/usr/include/x86_64-linux-gnu/c++/9] ==> [/usr/include/x86_64-linux-gnu/c++/9] + collapse include dir [/usr/include/c++/9/backward] ==> [/usr/include/c++/9/backward] + collapse include dir [/usr/lib/gcc/x86_64-linux-gnu/9/include] ==> [/usr/lib/gcc/x86_64-linux-gnu/9/include] + collapse include dir [/usr/local/include] ==> [/usr/local/include] + collapse include dir [/usr/include/x86_64-linux-gnu] ==> [/usr/include/x86_64-linux-gnu] + collapse include dir [/usr/include] ==> [/usr/include] + implicit include dirs: [/usr/include/c++/9;/usr/include/x86_64-linux-gnu/c++/9;/usr/include/c++/9/backward;/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include] + + +Parsed CXX implicit link information from above output: + link line regex: [^( *|.*[/\])(ld|CMAKE_LINK_STARTFILE-NOTFOUND|([^/\]+-)?ld|collect2)[^/\]*( |$)] + ignore line: [Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp] + ignore line: [] + ignore line: [Run Build Command(s):/usr/bin/make cmTC_59ff1/fast && /usr/bin/make -f CMakeFiles/cmTC_59ff1.dir/build.make CMakeFiles/cmTC_59ff1.dir/build] + ignore line: [make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp'] + ignore line: [Building CXX object CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o] + ignore line: [/usr/bin/c++ -v -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -c /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp] + ignore line: [Using built-in specs.] + ignore line: [COLLECT_GCC=/usr/bin/c++] + ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] + ignore line: [OFFLOAD_TARGET_DEFAULT=1] + ignore line: [Target: x86_64-linux-gnu] + ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] + ignore line: [Thread model: posix] + ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] + ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/cc1plus -quiet -v -imultiarch x86_64-linux-gnu -D_GNU_SOURCE /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp -quiet -dumpbase CMakeCXXCompilerABI.cpp -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccETTYVz.s] + ignore line: [GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] + ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] + ignore line: [] + ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] + ignore line: [ignoring duplicate directory "/usr/include/x86_64-linux-gnu/c++/9"] + ignore line: [ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu"] + ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed"] + ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include"] + ignore line: [#include "..." search starts here:] + ignore line: [#include <...> search starts here:] + ignore line: [ /usr/include/c++/9] + ignore line: [ /usr/include/x86_64-linux-gnu/c++/9] + ignore line: [ /usr/include/c++/9/backward] + ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/include] + ignore line: [ /usr/local/include] + ignore line: [ /usr/include/x86_64-linux-gnu] + ignore line: [ /usr/include] + ignore line: [End of search list.] + ignore line: [GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] + ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] + ignore line: [] + ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] + ignore line: [Compiler executable checksum: 3d1eba838554fa2348dba760e4770469] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] + ignore line: [ as -v --64 -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o /tmp/ccETTYVz.s] + ignore line: [GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34] + ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] + ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] + ignore line: [Linking CXX executable cmTC_59ff1] + ignore line: [/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_59ff1.dir/link.txt --verbose=1] + ignore line: [/usr/bin/c++ -v -rdynamic CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -o cmTC_59ff1 ] + ignore line: [Using built-in specs.] + ignore line: [COLLECT_GCC=/usr/bin/c++] + ignore line: [COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] + ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] + ignore line: [OFFLOAD_TARGET_DEFAULT=1] + ignore line: [Target: x86_64-linux-gnu] + ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] + ignore line: [Thread model: posix] + ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] + ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] + ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] + ignore line: [COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] + link line: [ /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/cco0EvR4.res -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_59ff1 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -lstdc++ -lm -lgcc_s -lgcc -lc -lgcc_s -lgcc /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] + arg [/usr/lib/gcc/x86_64-linux-gnu/9/collect2] ==> ignore + arg [-plugin] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so] ==> ignore + arg [-plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] ==> ignore + arg [-plugin-opt=-fresolution=/tmp/cco0EvR4.res] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc] ==> ignore + arg [-plugin-opt=-pass-through=-lc] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore + arg [-plugin-opt=-pass-through=-lgcc] ==> ignore + arg [--build-id] ==> ignore + arg [--eh-frame-hdr] ==> ignore + arg [-m] ==> ignore + arg [elf_x86_64] ==> ignore + arg [--hash-style=gnu] ==> ignore + arg [--as-needed] ==> ignore + arg [-export-dynamic] ==> ignore + arg [-dynamic-linker] ==> ignore + arg [/lib64/ld-linux-x86-64.so.2] ==> ignore + arg [-pie] ==> ignore + arg [-znow] ==> ignore + arg [-zrelro] ==> ignore + arg [-o] ==> ignore + arg [cmTC_59ff1] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o] ==> ignore + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] + arg [-L/lib/x86_64-linux-gnu] ==> dir [/lib/x86_64-linux-gnu] + arg [-L/lib/../lib] ==> dir [/lib/../lib] + arg [-L/usr/lib/x86_64-linux-gnu] ==> dir [/usr/lib/x86_64-linux-gnu] + arg [-L/usr/lib/../lib] ==> dir [/usr/lib/../lib] + arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] + arg [CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o] ==> ignore + arg [-lstdc++] ==> lib [stdc++] + arg [-lm] ==> lib [m] + arg [-lgcc_s] ==> lib [gcc_s] + arg [-lgcc] ==> lib [gcc] + arg [-lc] ==> lib [c] + arg [-lgcc_s] ==> lib [gcc_s] + arg [-lgcc] ==> lib [gcc] + arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o] ==> ignore + arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] ==> ignore + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9] ==> [/usr/lib/gcc/x86_64-linux-gnu/9] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> [/usr/lib] + collapse library dir [/lib/x86_64-linux-gnu] ==> [/lib/x86_64-linux-gnu] + collapse library dir [/lib/../lib] ==> [/lib] + collapse library dir [/usr/lib/x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] + collapse library dir [/usr/lib/../lib] ==> [/usr/lib] + collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> [/usr/lib] + implicit libs: [stdc++;m;gcc_s;gcc;c;gcc_s;gcc] + implicit dirs: [/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib] + implicit fwks: [] + + +Determining if the include file pthread.h exists passed with the following output: +Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp + +Run Build Command(s):/usr/bin/make cmTC_9b3d4/fast && /usr/bin/make -f CMakeFiles/cmTC_9b3d4.dir/build.make CMakeFiles/cmTC_9b3d4.dir/build +make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' +Building C object CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o +/usr/bin/cc -o CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/CheckIncludeFile.c +Linking C executable cmTC_9b3d4 +/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_9b3d4.dir/link.txt --verbose=1 +/usr/bin/cc CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o -o cmTC_9b3d4 +make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' + + + diff --git a/rad-sim/example-designs/mult/CMakeFiles/cmake.check_cache b/rad-sim/example-designs/mult/CMakeFiles/cmake.check_cache new file mode 100644 index 0000000..3dccd73 --- /dev/null +++ b/rad-sim/example-designs/mult/CMakeFiles/cmake.check_cache @@ -0,0 +1 @@ +# This file is generated by cmake for dependency checking of the CMakeCache.txt file diff --git a/rad-sim/example-designs/mult/CMakeLists.txt b/rad-sim/example-designs/mult/CMakeLists.txt new file mode 100644 index 0000000..a22c332 --- /dev/null +++ b/rad-sim/example-designs/mult/CMakeLists.txt @@ -0,0 +1,35 @@ +cmake_minimum_required(VERSION 3.16) +find_package(SystemCLanguage CONFIG REQUIRED) + +include_directories( + ./ + modules + ../../sim + ../../sim/noc + ../../sim/noc/booksim + ../../sim/noc/booksim/networks + ../../sim/noc/booksim/routers +) + +set(srcfiles + modules/mult.cpp + modules/client_mult.cpp + modules/portal.cpp + mult_top.cpp + mult_driver.cpp + mult_system.cpp +) + +set(hdrfiles + modules/mult.hpp + modules/client_mult.hpp + modules/portal.hpp + mult_top.hpp + mult_driver.hpp + mult_system.hpp +) + +add_compile_options(-Wall -Wextra -pedantic) + +add_library(design_mult STATIC ${srcfiles} ${hdrfiles}) +target_link_libraries(design_mult PUBLIC SystemC::systemc booksim noc) \ No newline at end of file diff --git a/rad-sim/example-designs/mult/config.yml b/rad-sim/example-designs/mult/config.yml new file mode 100644 index 0000000..8acd4b1 --- /dev/null +++ b/rad-sim/example-designs/mult/config.yml @@ -0,0 +1,37 @@ +noc: + type: ['2d'] + num_nocs: 1 + clk_period: [1.0] + payload_width: [166] + topology: ['mesh'] + dim_x: [4] + dim_y: [4] + routing_func: ['dim_order'] + vcs: [5] + vc_buffer_size: [8] + output_buffer_size: [8] + num_packet_types: [5] + router_uarch: ['iq'] + vc_allocator: ['islip'] + sw_allocator: ['islip'] + credit_delay: [1] + routing_delay: [1] + vc_alloc_delay: [1] + sw_alloc_delay: [1] + +noc_adapters: + clk_period: [1.25] + fifo_size: [16] + obuff_size: [2] + in_arbiter: ['fixed_rr'] + out_arbiter: ['priority_rr'] + vc_mapping: ['direct'] + +design: + name: 'mult' + noc_placement: ['mult.place'] + clk_periods: [5.0] + +telemetry: + log_verbosity: 2 + traces: [] \ No newline at end of file diff --git a/rad-sim/example-designs/mult/modules/client_mult.cpp b/rad-sim/example-designs/mult/modules/client_mult.cpp new file mode 100644 index 0000000..488109b --- /dev/null +++ b/rad-sim/example-designs/mult/modules/client_mult.cpp @@ -0,0 +1,93 @@ +#include + +client_mult::client_mult(const sc_module_name &name, unsigned int fifo_depth, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design) { + + this->radsim_design = radsim_design; //AKB ADDED + + client_fifo_depth = fifo_depth; + + // Combinational logic and its sensitivity list + SC_METHOD(Assign); + sensitive << rst << client_fifo_full; + // Sequential logic and its clock/reset setup + SC_CTHREAD(Tick, clk.pos()); + reset_signal_is(rst, true); // Reset is active high + + // This function must be defined & called for any RAD-Sim module to register + // its info for automatically connecting to the NoC + this->RegisterModuleInfo(); +} + +client_mult::~client_mult() {} + +void client_mult::Assign() { + if (rst) { + client_ready.write(true); // ready to accept requests from driver testbench + } else { + // Ready to accept new factor from driver testbench as long as the factor + // FIFO is not full + client_ready.write(!client_fifo_full.read()); + } +} + +void client_mult::Tick() { + // Reset logic + axis_client_interface.tvalid.write(false); + while (!client_tdata_fifo.empty()) { + client_tdata_fifo.pop(); + } + client_fifo_full.write(false); + wait(); + + std::string src_port_name = module_name + ".axis_client_interface"; + + // Always @ positive edge of the clock + while (true) { + // Interface with testbench driver + if (client_ready.read() && client_valid.read()) { + client_tdata_fifo.push(client_tdata); + testbench_tlast = client_tlast.read(); + std::cout << module_name << ": Pushed request to FIFO" << std::endl; + } + client_fifo_full.write(client_tdata_fifo.size() >= client_fifo_depth); + + // Sending transactions to AXI-S NoC + if (!client_tdata_fifo.empty()) { + sc_bv tdata = client_tdata_fifo.front(); + std::string dst_port_name = "mult_inst.axis_mult_interface"; + uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref + uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref + + axis_client_interface.tdest.write(dst_addr); + axis_client_interface.tid.write(0); + axis_client_interface.tstrb.write(0); + axis_client_interface.tkeep.write(0); + axis_client_interface.tuser.write(src_addr); + axis_client_interface.tlast.write(testbench_tlast && (client_tdata_fifo.size() == 1)); + axis_client_interface.tdata.write(tdata); + + axis_client_interface.tvalid.write(true); + } else { + axis_client_interface.tvalid.write(false); + } + + if (axis_client_interface.tvalid.read() && + axis_client_interface.tready.read()) { + client_tdata_fifo.pop(); + std::cout << module_name << ": Sent Transaction!" << std::endl; + } + wait(); + } +} + +void client_mult::RegisterModuleInfo() { + std::string port_name; + _num_noc_axis_slave_ports = 0; + _num_noc_axis_master_ports = 0; + _num_noc_aximm_slave_ports = 0; + _num_noc_aximm_master_ports = 0; + + port_name = module_name + ".axis_client_interface"; + RegisterAxisMasterPort(port_name, &axis_client_interface, DATAW, 0); +} diff --git a/rad-sim/example-designs/mult/modules/client_mult.hpp b/rad-sim/example-designs/mult/modules/client_mult.hpp new file mode 100644 index 0000000..28e9a7c --- /dev/null +++ b/rad-sim/example-designs/mult/modules/client_mult.hpp @@ -0,0 +1,40 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include +#include + +#define DATAW 128 + +class client_mult : public RADSimModule { +private: + std::queue> client_tdata_fifo; // FIFO to store numbers + unsigned int client_fifo_depth; // MAXIMUM number of factors to store in FIFO + sc_signal client_fifo_full; // Signal flagging factor FIFO is full + bool testbench_tlast; + +public: + sc_in rst; + // Interface to driver logic + sc_in> client_tdata; + sc_in client_tlast; + sc_in client_valid; + sc_out client_ready; + // Interface to the NoC + axis_master_port axis_client_interface; + //AKB added bc used in functions outside of constructor: + RADSimDesignContext* radsim_design; + + client_mult(const sc_module_name &name, unsigned int fifo_depth, RADSimDesignContext* radsim_design); //AKB added last arg + ~client_mult(); + + void Assign(); // Combinational logic process + void Tick(); // Sequential logic process + SC_HAS_PROCESS(client_mult); + void RegisterModuleInfo(); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/mult/modules/mult.cpp b/rad-sim/example-designs/mult/modules/mult.cpp new file mode 100644 index 0000000..67b9dd7 --- /dev/null +++ b/rad-sim/example-designs/mult/modules/mult.cpp @@ -0,0 +1,67 @@ +#include + +mult::mult(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg + : RADSimModule(name, radsim_design) { + + // Combinational logic and its sensitivity list + SC_METHOD(Assign); + sensitive << rst; + // Sequential logic and its clock/reset setup + SC_CTHREAD(Tick, clk.pos()); + reset_signal_is(rst, true); // Reset is active high + + // This function must be defined & called for any RAD-Sim module to register + // its info for automatically connecting to the NoC + this->RegisterModuleInfo(); +} + +mult::~mult() {} + +void mult::Assign() { + if (rst) { + mult_rolling_product = 1; + axis_mult_interface.tready.write(false); + } else { + // Always ready to accept the transaction + axis_mult_interface.tready.write(true); + } +} + +void mult::Tick() { + response_valid.write(0); + response.write(0); + wait(); + + // Always @ positive edge of the clock + while (true) { + // Receiving transaction from AXI-S interface + if (axis_mult_interface.tvalid.read() && + axis_mult_interface.tready.read()) { + uint64_t current_product = mult_rolling_product.to_uint64(); + mult_rolling_product = current_product * axis_mult_interface.tdata.read().to_uint64(); + t_finished.write(axis_mult_interface.tlast.read()); + std::cout << module_name << ": Got Transaction (user = " + << axis_mult_interface.tuser.read().to_uint64() << ") (factor = " + << axis_mult_interface.tdata.read().to_uint64() << ")!" + << std::endl; + } + + // Print Sum and Exit + if (t_finished.read()) { + response_valid.write(1); + response.write(mult_rolling_product); + } + wait(); + } +} + +void mult::RegisterModuleInfo() { + std::string port_name; + _num_noc_axis_slave_ports = 0; + _num_noc_axis_master_ports = 0; + _num_noc_aximm_slave_ports = 0; + _num_noc_aximm_master_ports = 0; + + port_name = module_name + ".axis_mult_interface"; + RegisterAxisSlavePort(port_name, &axis_mult_interface, DATAW, 0); +} \ No newline at end of file diff --git a/rad-sim/example-designs/mult/modules/mult.hpp b/rad-sim/example-designs/mult/modules/mult.hpp new file mode 100644 index 0000000..77cd7d6 --- /dev/null +++ b/rad-sim/example-designs/mult/modules/mult.hpp @@ -0,0 +1,32 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +class mult : public RADSimModule { +private: + sc_bv mult_rolling_product; // Product to store result + sc_signal t_finished; // Signal flagging that the transaction has terminated + +public: + sc_in rst; + sc_out response_valid; + sc_out> response; + // Interface to the NoC + axis_slave_port axis_mult_interface; + + mult(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg + ~mult(); + + void Assign(); // Combinational logic process + void Tick(); // Sequential logic process + SC_HAS_PROCESS(mult); + void RegisterModuleInfo(); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/mult/modules/portal.cpp b/rad-sim/example-designs/mult/modules/portal.cpp new file mode 100644 index 0000000..579c5e6 --- /dev/null +++ b/rad-sim/example-designs/mult/modules/portal.cpp @@ -0,0 +1,40 @@ +#include + +portal::portal(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg + : RADSimModule(name, radsim_design) { + + //maybe add combinational logic if applicable later + SC_CTHREAD(Tick, clk.pos()); + //not connecting to NoC +} + + +portal::~portal() {} + +/*void portal::Assign() { //combinational logic + //maybe add reset signal later +}*/ + +bool counter = 0; +void portal::Tick() { //sequential logic + portal_out.write(counter); + wait(); + //Always @ positive edge of clock + while (true) { + if (counter == 0) { + counter = 1; + } + else { + counter = 0; + } + portal_out.write(counter); + //std::cout << module_name << ": Wire in is showing " << portal_in.read() << std::endl; + //std::cout << counter << std::endl; + wait(); + } +} + +void portal::RegisterModuleInfo() { + //I don't think this is needed unless I add AXI Interface -- nvm, need bc is virtual fn in derived class + +} \ No newline at end of file diff --git a/rad-sim/example-designs/mult/modules/portal.hpp b/rad-sim/example-designs/mult/modules/portal.hpp new file mode 100644 index 0000000..0d79d25 --- /dev/null +++ b/rad-sim/example-designs/mult/modules/portal.hpp @@ -0,0 +1,26 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +class portal : public RADSimModule { + private: + public: + sc_in portal_in; + sc_out portal_out; + + portal(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg + ~portal(); + + //void Assign(); // Combinational logic process + void Tick(); // Sequential logic process + SC_HAS_PROCESS(portal); + void RegisterModuleInfo(); //even tho did not add AXI Interface, need because is virtual fn in derived class +}; \ No newline at end of file diff --git a/rad-sim/example-designs/mult/mult.clks b/rad-sim/example-designs/mult/mult.clks new file mode 100644 index 0000000..3e3efd6 --- /dev/null +++ b/rad-sim/example-designs/mult/mult.clks @@ -0,0 +1,2 @@ +mult_inst 0 0 +client_inst 0 0 \ No newline at end of file diff --git a/rad-sim/example-designs/mult/mult.place b/rad-sim/example-designs/mult/mult.place new file mode 100644 index 0000000..f7e1ad0 --- /dev/null +++ b/rad-sim/example-designs/mult/mult.place @@ -0,0 +1,2 @@ +mult_inst 0 0 axis +client_inst 0 3 axis \ No newline at end of file diff --git a/rad-sim/example-designs/mult/mult_driver.cpp b/rad-sim/example-designs/mult/mult_driver.cpp new file mode 100644 index 0000000..42d421c --- /dev/null +++ b/rad-sim/example-designs/mult/mult_driver.cpp @@ -0,0 +1,68 @@ +#include + +#define NUM_ADDENDS 3 + +mult_driver::mult_driver(const sc_module_name &name, RADSimDesignContext* radsim_design) + : sc_module(name) { + + this->radsim_design_ = radsim_design; //AKB ADDED: update member for later use + + // Random Seed + srand (time(NULL)); + actual_product = 1; + + // Generate random numbers to be multiplied together by the multiplier + std::cout << "Generating Random Numbers to be multiplied ..." << std::endl; + for (unsigned int i = 0; i < NUM_ADDENDS; i++) { + unsigned int r_num = std::rand() % 10 + 1; + std::cout << r_num << " "; + numbers_to_send.push(r_num); + actual_product *= r_num; + } + std::cout << std::endl << "----------------------------------------" << std::endl; + + SC_CTHREAD(source, clk.pos()); + SC_CTHREAD(sink, clk.pos()); +} + +mult_driver::~mult_driver() {} + +void mult_driver::source() { + // Reset + rst.write(true); + client_valid.write(false); + wait(); + rst.write(false); + wait(); + + while (!numbers_to_send.empty()) { + client_tdata.write(numbers_to_send.front()); + client_tlast.write(numbers_to_send.size() <= 1); + client_valid.write(true); + + wait(); + + if (client_valid.read() && client_ready.read()) { + numbers_to_send.pop(); + } + } + client_valid.write(false); + std::cout << "Finished sending all numbers to client module!" << std::endl; + wait(); +} + +void mult_driver::sink() { + while (!response_valid.read()) { + wait(); + } + std::cout << "Received " << response.read().to_uint64() << " product from the multiplier!" << std::endl; + std::cout << "The actual product is " << actual_product << std::endl; + + if (response.read() != actual_product) std::cout << "FAILURE - Output is not matching!" << std::endl; + else std::cout << "SUCCESS - Output is matching!" << std::endl; + + //sc_stop(); //AKB: replaced with setting flag + this->radsim_design_->set_rad_done(); //AKB ADDED: flag to replace sc_stop calls + return; //AKB ADDED + +} \ No newline at end of file diff --git a/rad-sim/example-designs/mult/mult_driver.hpp b/rad-sim/example-designs/mult/mult_driver.hpp new file mode 100644 index 0000000..d417c0d --- /dev/null +++ b/rad-sim/example-designs/mult/mult_driver.hpp @@ -0,0 +1,34 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include + +class mult_driver : public sc_module { +private: + std::queue numbers_to_send; + int actual_product; + RADSimDesignContext* radsim_design_; //AKB ADDED: store ptr passed into constructor for use in source() and sink() + +public: + sc_in clk; + sc_out rst; + sc_out> client_tdata; + sc_out client_tlast; + sc_out client_valid; + sc_in client_ready; + sc_in> response; + sc_in response_valid; + + mult_driver(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB ADDED last arg + ~mult_driver(); + + void source(); + void sink(); + + SC_HAS_PROCESS(mult_driver); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/mult/mult_system.cpp b/rad-sim/example-designs/mult/mult_system.cpp new file mode 100644 index 0000000..89392ba --- /dev/null +++ b/rad-sim/example-designs/mult/mult_system.cpp @@ -0,0 +1,35 @@ +#include + +mult_system::mult_system(const sc_module_name &name, sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design) // AKB: added last 3 args + : sc_module(name) { + + // Instantiate driver + driver_inst = new mult_driver("driver", radsim_design); + driver_inst->clk(*driver_clk_sig); + driver_inst->rst(rst_sig); + driver_inst->client_tdata(client_tdata_sig); + driver_inst->client_tlast(client_tlast_sig); + driver_inst->client_valid(client_valid_sig); + driver_inst->client_ready(client_ready_sig); + driver_inst->response(response_sig); + driver_inst->response_valid(response_valid_sig); + + // Instantiate design top-level + dut_inst = new mult_top("dut", radsim_design); //AKB added last arg + dut_inst->rst(rst_sig); + dut_inst->client_tdata(client_tdata_sig); + dut_inst->client_tlast(client_tlast_sig); + dut_inst->client_valid(client_valid_sig); + dut_inst->client_ready(client_ready_sig); + dut_inst->response(response_sig); + dut_inst->response_valid(response_valid_sig); + //AKB added: + //dut_inst->portal_in(portal_in_sig); + //dut_inst->portal_out(portal_out_sig); +} + +mult_system::~mult_system() { + delete driver_inst; + delete dut_inst; + delete sysclk; +} \ No newline at end of file diff --git a/rad-sim/example-designs/mult/mult_system.hpp b/rad-sim/example-designs/mult/mult_system.hpp new file mode 100644 index 0000000..87fd730 --- /dev/null +++ b/rad-sim/example-designs/mult/mult_system.hpp @@ -0,0 +1,31 @@ +#pragma once + +#include +#include +#include +#include + +class mult_system : public sc_module { +private: + sc_signal> client_tdata_sig; + sc_signal client_tlast_sig; + sc_signal client_valid_sig; + sc_signal client_ready_sig; + sc_signal> response_sig; + sc_signal response_valid_sig; + +public: + sc_signal rst_sig; + sc_clock *sysclk; + mult_driver *driver_inst; + mult_top *dut_inst; + //AKB added: + //sc_signal portal_in_sig; + //sc_signal portal_out_sig; + //sc_in portal_in; + //sc_out portal_out; + + mult_system(const sc_module_name &name, + sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design); //AKB added last arg + ~mult_system(); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/mult/mult_top.cpp b/rad-sim/example-designs/mult/mult_top.cpp new file mode 100644 index 0000000..ea85299 --- /dev/null +++ b/rad-sim/example-designs/mult/mult_top.cpp @@ -0,0 +1,42 @@ +#include + +mult_top::mult_top(const sc_module_name &name, RADSimDesignContext* radsim_design) + : sc_module(name) { + + std::string module_name_str; + char module_name[25]; + + module_name_str = "client_inst"; + std::strcpy(module_name, module_name_str.c_str()); + + client_inst = new client_mult(module_name, 16, radsim_design); //AKB added last arg + client_inst->rst(rst); + client_inst->client_tdata(client_tdata); + client_inst->client_tlast(client_tlast); + client_inst->client_valid(client_valid); + client_inst->client_ready(client_ready); + + module_name_str = "mult_inst"; + std::strcpy(module_name, module_name_str.c_str()); + mult_inst = new mult(module_name, radsim_design); //AKB added last arg + mult_inst->rst(rst); + mult_inst->response(response); + mult_inst->response_valid(response_valid); + + //AKB: added code block for portal module + module_name_str = "portal_inst"; + std::strcpy(module_name, module_name_str.c_str()); + portal_inst = new portal(module_name, radsim_design); + portal_inst->portal_in(portal_in); + portal_inst->portal_out(portal_out); + + radsim_design->BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/mult", "mult.place", + "mult.clks"); //AKB changed to ptr deref, added first arg + radsim_design->CreateSystemNoCs(rst); //AKB changed to ptr deref + radsim_design->ConnectModulesToNoC(); //AKB changed to ptr deref +} + + mult_top::~mult_top() { + delete mult_inst; + delete client_inst; +} \ No newline at end of file diff --git a/rad-sim/example-designs/mult/mult_top.hpp b/rad-sim/example-designs/mult/mult_top.hpp new file mode 100644 index 0000000..642ebbc --- /dev/null +++ b/rad-sim/example-designs/mult/mult_top.hpp @@ -0,0 +1,31 @@ +#pragma once + +#include +#include +#include +#include //AKB ADDED +#include +#include + +class mult_top : public sc_module { +private: + mult *mult_inst; + client_mult *client_inst; + portal *portal_inst; //AKB added + +public: + sc_in rst; + // Client's interface + sc_in> client_tdata; + sc_in client_tlast; + sc_in client_valid; + sc_out client_ready; + sc_out> response; + sc_out response_valid; + //AKB ADDED for portal module: + sc_in portal_in; + sc_out portal_out; + + mult_top(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB ADDED last arg + ~mult_top(); +}; \ No newline at end of file diff --git a/rad-sim/sim/CMakeLists.txt b/rad-sim/sim/CMakeLists.txt index 2188eb4..ceb1458 100644 --- a/rad-sim/sim/CMakeLists.txt +++ b/rad-sim/sim/CMakeLists.txt @@ -18,8 +18,10 @@ include_directories( dram dram/DRAMsim3 dram/DRAMsim3/src - ../example-designs/${DESIGN} - ../example-designs/${DESIGN}/modules + ../example-designs/add + ../example-designs/add/modules + ../example-designs/mult + ../example-designs/mult/modules ) set(srcfiles @@ -46,10 +48,10 @@ set(CMAKE_CXX_FLAGS_DEBUG "-g") set(CMAKE_CXX_FLAGS_RELEASE "-O3") add_library(radsim STATIC ${srcfiles} ${hdrfiles}) -target_link_libraries(radsim PUBLIC SystemC::systemc booksim noc dram design) +target_link_libraries(radsim PUBLIC SystemC::systemc booksim noc dram design_add design_mult) add_executable(system main.cpp ${srcfiles} ${hdrfiles}) -target_link_libraries(system PUBLIC radsim SystemC::systemc booksim noc dram design) +target_link_libraries(system PUBLIC radsim SystemC::systemc booksim noc dram design_add design_mult) add_custom_target(run COMMAND system WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} diff --git a/rad-sim/sim/design_context.cpp b/rad-sim/sim/design_context.cpp index 7971b20..c36e8ea 100644 --- a/rad-sim/sim/design_context.cpp +++ b/rad-sim/sim/design_context.cpp @@ -88,10 +88,11 @@ uint64_t DeterminedBaseAddress(int noc_id, int node_id) { return base_addr; } -void RADSimDesignContext::ParseNoCPlacement( +void RADSimDesignContext::ParseNoCPlacement(const std::string &design_path, //AKB ADDED first arg const std::string &placement_filename) { std::string placement_filepath = - radsim_config.GetStringKnob("radsim_user_design_root_dir") + "/" + + //radsim_config.GetStringKnob("radsim_user_design_root_dir") + "/" + + design_path + "/" + placement_filename; std::ifstream placement_file(placement_filepath); @@ -293,9 +294,11 @@ void RADSimDesignContext::ParseNoCPlacement( } } -void RADSimDesignContext::ParseClockSettings(const std::string &clks_filename) { +void RADSimDesignContext::ParseClockSettings(const std::string &design_path, //AKB ADDED first arg + const std::string &clks_filename) { std::string clks_filepath = - radsim_config.GetStringKnob("radsim_user_design_root_dir") + "/" + + //radsim_config.GetStringKnob("radsim_user_design_root_dir") + "/" + + design_path + "/" + clks_filename; std::ifstream clks_file(clks_filepath); @@ -324,7 +327,7 @@ void RADSimDesignContext::RegisterModule(std::string module_name, _design_modules[module_name] = module_ptr; } -void RADSimDesignContext::BuildDesignContext( +void RADSimDesignContext::BuildDesignContext(const std::string &design_path, //AKB ADDED first arg const std::string &placement_filename, const std::string &clks_filename) { unsigned int num_nocs = radsim_config.GetIntKnob("noc_num_nocs"); _node_id_is_aximm.resize(num_nocs); @@ -342,8 +345,8 @@ void RADSimDesignContext::BuildDesignContext( _num_noc_aximm_slave_ports.resize(num_nocs); _num_noc_aximm_master_ports.resize(num_nocs); - ParseNoCPlacement(placement_filename); - ParseClockSettings(clks_filename); + ParseNoCPlacement(design_path, placement_filename); //AKB ADDED first arg + ParseClockSettings(design_path, clks_filename); for (unsigned int noc_id = 0; noc_id < num_nocs; noc_id++) { for (auto node_it = _node_id_ports_list[noc_id].begin(); diff --git a/rad-sim/sim/design_context.hpp b/rad-sim/sim/design_context.hpp index a2992db..ce5d6e9 100644 --- a/rad-sim/sim/design_context.hpp +++ b/rad-sim/sim/design_context.hpp @@ -58,11 +58,11 @@ class RADSimDesignContext { public: RADSimDesignContext(); ~RADSimDesignContext(); - void ParseNoCPlacement(const std::string &placement_filename); - void ParseClockSettings(const std::string &clks_filename); + void ParseNoCPlacement(const std::string &design_path, const std::string &placement_filename); //AKB added first arg + void ParseClockSettings(const std::string &design_path, const std::string &clks_filename); //AKB added first arg void RegisterModule(std::string module_name, RADSimModule *module_ptr); - void BuildDesignContext(const std::string &placement_filename, - const std::string &clks_filename); + void BuildDesignContext(const std::string &design_path, const std::string &placement_filename, + const std::string &clks_filename); //AKB added first arg void CreateSystemNoCs(sc_in &rst); void ConnectModulesToNoC(); diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 187ce3a..806d084 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -7,6 +7,7 @@ #include //AKB ADDED #include +#include //AKB ADDED to test multi-design RADSimConfig radsim_config; //RADSimDesignContext radsim_design; //AKB: commented out @@ -33,12 +34,14 @@ int sc_main(int argc, char *argv[]) { "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); add_system *system = new add_system("add_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED + //mult_system *system = new mult_system("mult_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED sc_clock *driver_clk_sig2 = new sc_clock( "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED - add_system *system2 = new add_system("add_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED - + //add_system *system2 = new add_system("add_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED + mult_system *system2 = new mult_system("mult_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED + //npu_system *system3 = new npu_system("npu_system", driver_clk_sig2); //AKB ADDED to test design paths //AKB ADDED signals sc_signal in_1_out_2; sc_signal in_2_out_1; diff --git a/rad-sim/sim/radsim_knobs b/rad-sim/sim/radsim_knobs index a57796d..3081f43 100644 --- a/rad-sim/sim/radsim_knobs +++ b/rad-sim/sim/radsim_knobs @@ -1,11 +1,11 @@ radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim -design_name add +design_name mult noc_num_nocs 1 noc_clk_period 1.0 noc_vcs 5 noc_payload_width 166 noc_num_nodes 16 -design_noc_placement add.place +design_noc_placement mult.place noc_adapters_clk_period 1.25 noc_adapters_fifo_size 16 noc_adapters_obuff_size 2 @@ -20,4 +20,4 @@ dram_num_controllers 0 dram_clk_periods 2.0 dram_queue_sizes 64 dram_config_files HBM2_8Gb_x128 -radsim_user_design_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add +radsim_user_design_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/mult From 31e255f9455b43a248a2f41a84cc7625ba7900b7 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Thu, 18 Jan 2024 23:45:36 -0500 Subject: [PATCH 009/127] Temp commit trying ways to pass system from main to new blackbox module inter-rad communication --- rad-sim/sim/CMakeLists.txt | 2 ++ rad-sim/sim/main.cpp | 14 ++++++++++++-- rad-sim/sim/radsim_cluster.cpp | 10 ++++++++++ rad-sim/sim/radsim_cluster.hpp | 6 ++++++ 4 files changed, 30 insertions(+), 2 deletions(-) diff --git a/rad-sim/sim/CMakeLists.txt b/rad-sim/sim/CMakeLists.txt index ceb1458..111f58a 100644 --- a/rad-sim/sim/CMakeLists.txt +++ b/rad-sim/sim/CMakeLists.txt @@ -31,6 +31,7 @@ set(srcfiles radsim_telemetry.cpp radsim_utils.cpp radsim_cluster.cpp + radsim_inter_rad.cpp ) set(hdrfiles @@ -41,6 +42,7 @@ set(hdrfiles radsim_telemetry.hpp radsim_utils.hpp radsim_cluster.hpp + radsim_inter_rad.hpp ) add_compile_options(-Wall -Wextra -pedantic) diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 806d084..6eb3eb9 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -5,6 +5,7 @@ #include #include #include //AKB ADDED +#include //AKB ADDED #include #include //AKB ADDED to test multi-design @@ -41,14 +42,23 @@ int sc_main(int argc, char *argv[]) { //add_system *system2 = new add_system("add_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED mult_system *system2 = new mult_system("mult_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED + cluster->StoreSystemIn(system->dut_inst->portal_out); //AKB ADDED + cluster->StoreSystemOut(system->dut_inst->portal_in); //AKB ADDED + cluster->StoreSystemIn(system2->dut_inst->portal_out); //AKB ADDED + cluster->StoreSystemOut(system2->dut_inst->portal_in); //AKB ADDED //npu_system *system3 = new npu_system("npu_system", driver_clk_sig2); //AKB ADDED to test design paths + + //AKB ADDED: + RADSimInterRad* blackbox = new RADSimInterRad(cluster); + //blackbox->ConnectRadPair(0, 1); + //AKB ADDED signals - sc_signal in_1_out_2; + /*sc_signal in_1_out_2; sc_signal in_2_out_1; system->dut_inst->portal_in(in_1_out_2); system->dut_inst->portal_out(in_2_out_1); system2->dut_inst->portal_in(in_2_out_1); - system2->dut_inst->portal_out(in_1_out_2); + system2->dut_inst->portal_out(in_1_out_2);*/ //sc_start(); //AKB commented out diff --git a/rad-sim/sim/radsim_cluster.cpp b/rad-sim/sim/radsim_cluster.cpp index e6ebbc2..227921e 100644 --- a/rad-sim/sim/radsim_cluster.cpp +++ b/rad-sim/sim/radsim_cluster.cpp @@ -43,3 +43,13 @@ RADSimCluster::AllRADsNotDone() { } return false; } + +void +RADSimCluster::StoreSystemIn(sc_in system_in) { + all_systems_in.push_back(system_in); +} + +void +RADSimCluster::StoreSystemOut(sc_out system_out) { + all_systems_out.push_back(system_out); +} \ No newline at end of file diff --git a/rad-sim/sim/radsim_cluster.hpp b/rad-sim/sim/radsim_cluster.hpp index aae3a3d..269231c 100644 --- a/rad-sim/sim/radsim_cluster.hpp +++ b/rad-sim/sim/radsim_cluster.hpp @@ -4,12 +4,16 @@ #include #include #include +#include class RADSimCluster { private: public: int num_rads; std::vector all_rads; + //std::vector all_systems; //nth system should be on the nth RAD. also tried std::any, auto + std::vector> all_systems_in; //nth system should be on the nth RAD + std::vector> all_systems_out; //nth system should be on the nth RAD enum inter_rad_topo_type { ALL_TO_ALL = 0, SWITCH = 1, @@ -29,4 +33,6 @@ class RADSimCluster { void SetTopo(inter_rad_topo_type inter_rad_topo); void SetConnModel(inter_rad_conn_model_type inter_rad_topo); bool AllRADsNotDone(); + void StoreSystemIn(sc_in system_in); + void StoreSystemOut(sc_out system_out); }; \ No newline at end of file From cafd8c645a761a0b5972938ae1236ea4cda99ef0 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 24 Jan 2024 23:46:51 -0500 Subject: [PATCH 010/127] Added and used parent class design_top for add_top --- rad-sim/example-designs/add/add_top.hpp | 8 +++++--- rad-sim/sim/CMakeLists.txt | 1 + rad-sim/sim/design_system.hpp | 0 rad-sim/sim/design_top.hpp | 9 +++++++++ rad-sim/sim/main.cpp | 8 ++++---- rad-sim/sim/radsim_cluster.cpp | 4 ++-- rad-sim/sim/radsim_cluster.hpp | 9 +++++---- rad-sim/sim/radsim_inter_rad.cpp | 21 +++++++++++++++++++++ rad-sim/sim/radsim_inter_rad.hpp | 18 ++++++++++++++++++ 9 files changed, 65 insertions(+), 13 deletions(-) create mode 100644 rad-sim/sim/design_system.hpp create mode 100644 rad-sim/sim/design_top.hpp create mode 100644 rad-sim/sim/radsim_inter_rad.cpp create mode 100644 rad-sim/sim/radsim_inter_rad.hpp diff --git a/rad-sim/example-designs/add/add_top.hpp b/rad-sim/example-designs/add/add_top.hpp index f8deddd..a9cc223 100644 --- a/rad-sim/example-designs/add/add_top.hpp +++ b/rad-sim/example-designs/add/add_top.hpp @@ -6,8 +6,10 @@ #include //AKB ADDED #include #include +#include //AKB ADDED -class add_top : public sc_module { +class add_top : public design_top { +//class add_top : public sc_module { private: adder *adder_inst; client *client_inst; @@ -23,8 +25,8 @@ class add_top : public sc_module { sc_out> response; sc_out response_valid; //AKB ADDED for portal module: - sc_in portal_in; - sc_out portal_out; + //sc_in portal_in; + //sc_out portal_out; add_top(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB ADDED last arg ~add_top(); diff --git a/rad-sim/sim/CMakeLists.txt b/rad-sim/sim/CMakeLists.txt index 111f58a..32dd43d 100644 --- a/rad-sim/sim/CMakeLists.txt +++ b/rad-sim/sim/CMakeLists.txt @@ -43,6 +43,7 @@ set(hdrfiles radsim_utils.hpp radsim_cluster.hpp radsim_inter_rad.hpp + design_top.hpp ) add_compile_options(-Wall -Wextra -pedantic) diff --git a/rad-sim/sim/design_system.hpp b/rad-sim/sim/design_system.hpp new file mode 100644 index 0000000..e69de29 diff --git a/rad-sim/sim/design_top.hpp b/rad-sim/sim/design_top.hpp new file mode 100644 index 0000000..98757e6 --- /dev/null +++ b/rad-sim/sim/design_top.hpp @@ -0,0 +1,9 @@ +#pragma once + +#include + +class design_top : virtual public sc_module { + public: + sc_in portal_in; + sc_out portal_out; +}; \ No newline at end of file diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 6eb3eb9..ef5dafc 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -42,10 +42,10 @@ int sc_main(int argc, char *argv[]) { //add_system *system2 = new add_system("add_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED mult_system *system2 = new mult_system("mult_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED - cluster->StoreSystemIn(system->dut_inst->portal_out); //AKB ADDED + /*cluster->StoreSystemIn(system->dut_inst->portal_out); //AKB ADDED cluster->StoreSystemOut(system->dut_inst->portal_in); //AKB ADDED cluster->StoreSystemIn(system2->dut_inst->portal_out); //AKB ADDED - cluster->StoreSystemOut(system2->dut_inst->portal_in); //AKB ADDED + cluster->StoreSystemOut(system2->dut_inst->portal_in);*/ //AKB ADDED //npu_system *system3 = new npu_system("npu_system", driver_clk_sig2); //AKB ADDED to test design paths //AKB ADDED: @@ -53,12 +53,12 @@ int sc_main(int argc, char *argv[]) { //blackbox->ConnectRadPair(0, 1); //AKB ADDED signals - /*sc_signal in_1_out_2; + sc_signal in_1_out_2; sc_signal in_2_out_1; system->dut_inst->portal_in(in_1_out_2); system->dut_inst->portal_out(in_2_out_1); system2->dut_inst->portal_in(in_2_out_1); - system2->dut_inst->portal_out(in_1_out_2);*/ + system2->dut_inst->portal_out(in_1_out_2); //sc_start(); //AKB commented out diff --git a/rad-sim/sim/radsim_cluster.cpp b/rad-sim/sim/radsim_cluster.cpp index 227921e..787cdde 100644 --- a/rad-sim/sim/radsim_cluster.cpp +++ b/rad-sim/sim/radsim_cluster.cpp @@ -44,7 +44,7 @@ RADSimCluster::AllRADsNotDone() { return false; } -void +/*void RADSimCluster::StoreSystemIn(sc_in system_in) { all_systems_in.push_back(system_in); } @@ -52,4 +52,4 @@ RADSimCluster::StoreSystemIn(sc_in system_in) { void RADSimCluster::StoreSystemOut(sc_out system_out) { all_systems_out.push_back(system_out); -} \ No newline at end of file +}*/ \ No newline at end of file diff --git a/rad-sim/sim/radsim_cluster.hpp b/rad-sim/sim/radsim_cluster.hpp index 269231c..2f97a51 100644 --- a/rad-sim/sim/radsim_cluster.hpp +++ b/rad-sim/sim/radsim_cluster.hpp @@ -11,9 +11,10 @@ class RADSimCluster { public: int num_rads; std::vector all_rads; + //std::vector all_systems; //TODO: add support for this, ignore commented lines below //std::vector all_systems; //nth system should be on the nth RAD. also tried std::any, auto - std::vector> all_systems_in; //nth system should be on the nth RAD - std::vector> all_systems_out; //nth system should be on the nth RAD + //std::vector> all_systems_in; //nth system should be on the nth RAD + //std::vector> all_systems_out; //nth system should be on the nth RAD enum inter_rad_topo_type { ALL_TO_ALL = 0, SWITCH = 1, @@ -33,6 +34,6 @@ class RADSimCluster { void SetTopo(inter_rad_topo_type inter_rad_topo); void SetConnModel(inter_rad_conn_model_type inter_rad_topo); bool AllRADsNotDone(); - void StoreSystemIn(sc_in system_in); - void StoreSystemOut(sc_out system_out); + /*void StoreSystemIn(sc_in system_in); + void StoreSystemOut(sc_out system_out); */ }; \ No newline at end of file diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp new file mode 100644 index 0000000..a23bd64 --- /dev/null +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -0,0 +1,21 @@ +#include + +RADSimInterRad::RADSimInterRad(RADSimCluster* cluster) { + this->cluster = cluster; +} + +RADSimInterRad::~RADSimInterRad() {} + +/*void +RADSimInterRad::ConnectRadPair(int i, int j) { + sc_signal in_i_out_j; + sc_signal in_j_out_i; + + all_signals.push_back(in_i_out_j); + all_signals.push_back(in_j_out_i); + + cluster->all_systems_in[i](in_i_out_j); + cluster->all_systems_out[i](in_j_out_i); + cluster->all_systems_in[j](in_j_out_i); + cluster->all_systems_out[j](in_i_out_j); +}*/ \ No newline at end of file diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp new file mode 100644 index 0000000..f0fcb0b --- /dev/null +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -0,0 +1,18 @@ +#pragma once + +#include +#include +#include +#include +#include +#include + +class RADSimInterRad { + private: + RADSimCluster* cluster; + //std::vector> all_signals; + public: + RADSimInterRad(RADSimCluster* cluster); + ~RADSimInterRad(); + //void ConnectRadPair(int i, int j); +}; \ No newline at end of file From 5792039dc29c3b7e47338d5fbff71de64474749a Mon Sep 17 00:00:00 2001 From: abnashkb Date: Thu, 25 Jan 2024 01:57:55 -0500 Subject: [PATCH 011/127] Used class changes to create and use new interrad comm class --- rad-sim/example-designs/add/add_system.cpp | 1 + rad-sim/example-designs/add/add_system.hpp | 3 ++- rad-sim/example-designs/mult/mult_system.cpp | 1 + rad-sim/example-designs/mult/mult_system.hpp | 3 ++- rad-sim/example-designs/mult/mult_top.hpp | 7 +++--- rad-sim/sim/CMakeLists.txt | 1 + rad-sim/sim/design_system.hpp | 9 ++++++++ rad-sim/sim/main.cpp | 19 ++++++++++++---- rad-sim/sim/radsim_cluster.cpp | 8 +++---- rad-sim/sim/radsim_cluster.hpp | 6 ++--- rad-sim/sim/radsim_inter_rad.cpp | 24 ++++++++++++-------- rad-sim/sim/radsim_inter_rad.hpp | 7 ++++-- 12 files changed, 62 insertions(+), 27 deletions(-) diff --git a/rad-sim/example-designs/add/add_system.cpp b/rad-sim/example-designs/add/add_system.cpp index 0d7060a..adbe681 100644 --- a/rad-sim/example-designs/add/add_system.cpp +++ b/rad-sim/example-designs/add/add_system.cpp @@ -24,6 +24,7 @@ add_system::add_system(const sc_module_name &name, sc_clock *driver_clk_sig, RAD dut_inst->response(response_sig); dut_inst->response_valid(response_valid_sig); //AKB added: + this->design_dut_inst = dut_inst; //dut_inst->portal_in(portal_in_sig); //dut_inst->portal_out(portal_out_sig); } diff --git a/rad-sim/example-designs/add/add_system.hpp b/rad-sim/example-designs/add/add_system.hpp index 5df5f09..5cae6b9 100644 --- a/rad-sim/example-designs/add/add_system.hpp +++ b/rad-sim/example-designs/add/add_system.hpp @@ -4,8 +4,9 @@ #include #include #include +#include -class add_system : public sc_module { +class add_system : public design_system { private: sc_signal> client_tdata_sig; sc_signal client_tlast_sig; diff --git a/rad-sim/example-designs/mult/mult_system.cpp b/rad-sim/example-designs/mult/mult_system.cpp index 89392ba..52c1c4a 100644 --- a/rad-sim/example-designs/mult/mult_system.cpp +++ b/rad-sim/example-designs/mult/mult_system.cpp @@ -24,6 +24,7 @@ mult_system::mult_system(const sc_module_name &name, sc_clock *driver_clk_sig, R dut_inst->response(response_sig); dut_inst->response_valid(response_valid_sig); //AKB added: + this->design_dut_inst = dut_inst; //dut_inst->portal_in(portal_in_sig); //dut_inst->portal_out(portal_out_sig); } diff --git a/rad-sim/example-designs/mult/mult_system.hpp b/rad-sim/example-designs/mult/mult_system.hpp index 87fd730..e43a658 100644 --- a/rad-sim/example-designs/mult/mult_system.hpp +++ b/rad-sim/example-designs/mult/mult_system.hpp @@ -4,8 +4,9 @@ #include #include #include +#include -class mult_system : public sc_module { +class mult_system : public design_system { private: sc_signal> client_tdata_sig; sc_signal client_tlast_sig; diff --git a/rad-sim/example-designs/mult/mult_top.hpp b/rad-sim/example-designs/mult/mult_top.hpp index 642ebbc..42d0185 100644 --- a/rad-sim/example-designs/mult/mult_top.hpp +++ b/rad-sim/example-designs/mult/mult_top.hpp @@ -6,8 +6,9 @@ #include //AKB ADDED #include #include +#include //AKB ADDED -class mult_top : public sc_module { +class mult_top : public design_top { private: mult *mult_inst; client_mult *client_inst; @@ -23,8 +24,8 @@ class mult_top : public sc_module { sc_out> response; sc_out response_valid; //AKB ADDED for portal module: - sc_in portal_in; - sc_out portal_out; + //sc_in portal_in; + //sc_out portal_out; mult_top(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB ADDED last arg ~mult_top(); diff --git a/rad-sim/sim/CMakeLists.txt b/rad-sim/sim/CMakeLists.txt index 32dd43d..d17428b 100644 --- a/rad-sim/sim/CMakeLists.txt +++ b/rad-sim/sim/CMakeLists.txt @@ -44,6 +44,7 @@ set(hdrfiles radsim_cluster.hpp radsim_inter_rad.hpp design_top.hpp + design_system.hpp ) add_compile_options(-Wall -Wextra -pedantic) diff --git a/rad-sim/sim/design_system.hpp b/rad-sim/sim/design_system.hpp index e69de29..6667e83 100644 --- a/rad-sim/sim/design_system.hpp +++ b/rad-sim/sim/design_system.hpp @@ -0,0 +1,9 @@ +#pragma once + +#include +#include + +class design_system : virtual public sc_module { + public: + design_top* design_dut_inst; +}; \ No newline at end of file diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index ef5dafc..dee23d2 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -49,16 +49,27 @@ int sc_main(int argc, char *argv[]) { //npu_system *system3 = new npu_system("npu_system", driver_clk_sig2); //AKB ADDED to test design paths //AKB ADDED: + cluster->StoreSystem(system); + cluster->StoreSystem(system2); RADSimInterRad* blackbox = new RADSimInterRad(cluster); - //blackbox->ConnectRadPair(0, 1); + blackbox->ConnectRadPair(0, 1); - //AKB ADDED signals - sc_signal in_1_out_2; + //AKB ADDED signals -- this works + /*sc_signal in_1_out_2; sc_signal in_2_out_1; system->dut_inst->portal_in(in_1_out_2); system->dut_inst->portal_out(in_2_out_1); system2->dut_inst->portal_in(in_2_out_1); - system2->dut_inst->portal_out(in_1_out_2); + system2->dut_inst->portal_out(in_1_out_2);*/ + + //AKB experimenting with new classes + //design_system* design_system_inst = system; + /*sc_signal in_1_out_2; + sc_signal in_2_out_1; + cluster->all_systems[0]->design_dut_inst->portal_in(in_1_out_2); + cluster->all_systems[0]->design_dut_inst->portal_out(in_2_out_1); + cluster->all_systems[1]->design_dut_inst->portal_in(in_2_out_1); + cluster->all_systems[1]->design_dut_inst->portal_out(in_1_out_2);*/ //sc_start(); //AKB commented out diff --git a/rad-sim/sim/radsim_cluster.cpp b/rad-sim/sim/radsim_cluster.cpp index 787cdde..fd8ab98 100644 --- a/rad-sim/sim/radsim_cluster.cpp +++ b/rad-sim/sim/radsim_cluster.cpp @@ -44,12 +44,12 @@ RADSimCluster::AllRADsNotDone() { return false; } -/*void -RADSimCluster::StoreSystemIn(sc_in system_in) { - all_systems_in.push_back(system_in); +void +RADSimCluster::StoreSystem(design_system* system) { + all_systems.push_back(system); } -void +/*void RADSimCluster::StoreSystemOut(sc_out system_out) { all_systems_out.push_back(system_out); }*/ \ No newline at end of file diff --git a/rad-sim/sim/radsim_cluster.hpp b/rad-sim/sim/radsim_cluster.hpp index 2f97a51..b38b2be 100644 --- a/rad-sim/sim/radsim_cluster.hpp +++ b/rad-sim/sim/radsim_cluster.hpp @@ -5,13 +5,14 @@ #include #include #include +#include class RADSimCluster { private: public: int num_rads; std::vector all_rads; - //std::vector all_systems; //TODO: add support for this, ignore commented lines below + std::vector all_systems; //added support for this, ignore commented lines below //std::vector all_systems; //nth system should be on the nth RAD. also tried std::any, auto //std::vector> all_systems_in; //nth system should be on the nth RAD //std::vector> all_systems_out; //nth system should be on the nth RAD @@ -34,6 +35,5 @@ class RADSimCluster { void SetTopo(inter_rad_topo_type inter_rad_topo); void SetConnModel(inter_rad_conn_model_type inter_rad_topo); bool AllRADsNotDone(); - /*void StoreSystemIn(sc_in system_in); - void StoreSystemOut(sc_out system_out); */ + void StoreSystem(design_system* system); }; \ No newline at end of file diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index a23bd64..6a9da37 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -2,20 +2,26 @@ RADSimInterRad::RADSimInterRad(RADSimCluster* cluster) { this->cluster = cluster; + all_signals.init(cluster->num_rads); } RADSimInterRad::~RADSimInterRad() {} -/*void +void RADSimInterRad::ConnectRadPair(int i, int j) { - sc_signal in_i_out_j; + /*sc_signal in_i_out_j; sc_signal in_j_out_i; - all_signals.push_back(in_i_out_j); - all_signals.push_back(in_j_out_i); + this->all_signals.push_back(&in_i_out_j); + this->all_signals.push_back(&in_j_out_i); - cluster->all_systems_in[i](in_i_out_j); - cluster->all_systems_out[i](in_j_out_i); - cluster->all_systems_in[j](in_j_out_i); - cluster->all_systems_out[j](in_i_out_j); -}*/ \ No newline at end of file + cluster->all_systems[i]->design_dut_inst->portal_in(in_i_out_j); + cluster->all_systems[i]->design_dut_inst->portal_out(in_j_out_i); + cluster->all_systems[j]->design_dut_inst->portal_in(in_j_out_i); + cluster->all_systems[j]->design_dut_inst->portal_out(in_i_out_j); */ + + cluster->all_systems[i]->design_dut_inst->portal_in(all_signals[0]); + cluster->all_systems[i]->design_dut_inst->portal_out(all_signals[1]); + cluster->all_systems[j]->design_dut_inst->portal_in(all_signals[1]); + cluster->all_systems[j]->design_dut_inst->portal_out(all_signals[0]); +} \ No newline at end of file diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index f0fcb0b..00f5f89 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -7,12 +7,15 @@ #include #include -class RADSimInterRad { +class RADSimInterRad { //: public sc_module { private: RADSimCluster* cluster; //std::vector> all_signals; + sc_vector> all_signals{"all_signals"}; public: RADSimInterRad(RADSimCluster* cluster); ~RADSimInterRad(); - //void ConnectRadPair(int i, int j); + void ConnectRadPair(int i, int j); + /*sc_signal in_i_out_j; + sc_signal in_j_out_i; */ }; \ No newline at end of file From 2ce7bda9e78e67cf1d0e6983a7b6689cdc19c445 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Thu, 25 Jan 2024 16:57:45 -0500 Subject: [PATCH 012/127] Change config.py to parse unified yaml and add cluster parameters as config knobs --- rad-sim/config.py | 125 ++++++++++++++++++++++++++++------------- rad-sim/uni_config.yml | 83 +++++++++++++++++++++++++++ 2 files changed, 168 insertions(+), 40 deletions(-) create mode 100644 rad-sim/uni_config.yml diff --git a/rad-sim/config.py b/rad-sim/config.py index 84234b3..91f1745 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -7,26 +7,51 @@ def parse_config_file(config_filename, booksim_params, radsim_header_params, radsim_knobs): with open(config_filename, 'r') as yaml_config: config = yaml.safe_load(yaml_config) - - for param_category in config: - for param, param_value in config[param_category].items(): - param_name = param_category + '_' + param - invalid_param = True - if param_name in booksim_params: - booksim_params[param_name] = param_value - invalid_param = False - if param_name in radsim_header_params: - radsim_header_params[param_name] = param_value - invalid_param = False - if param_name in radsim_knobs: - radsim_knobs[param_name] = param_value - invalid_param = False - - if invalid_param: - print("Config Error: Parameter " + param_name + " is invalid!") - exit(1) - - noc_num_nodes = [] + + for config_section in config: + #print(config_section + ':') + for param_category, param in config[config_section].items(): + if (isinstance(param, dict)): + #print(' ' + param_category + ':') + for param, param_value in param.items(): + #print(' ' + param, param_value) + param_name = param_category + '_' + param + invalid_param = True + if param_name in booksim_params: + booksim_params[param_name] = param_value + invalid_param = False + if param_name in radsim_header_params: + radsim_header_params[param_name] = param_value + invalid_param = False + if param_name in radsim_knobs: + radsim_knobs[param_name] = param_value + invalid_param = False + + if invalid_param: + print("Config Error: Parameter " + param_name + " is invalid!") + exit(1) + elif config_section == "cluster": + param_value = param #bc no subsection, so correction + param = param_category #bc no subsection, so correction + #print(' ' + param, param_value) + param_name = 'cluster_' + param + #print(param_name) + invalid_param = True + if param_name in booksim_params: + booksim_params[param_name] = param_value + invalid_param = False + if param_name in radsim_header_params: + radsim_header_params[param_name] = param_value + invalid_param = False + if param_name in radsim_knobs: + radsim_knobs[param_name] = param_value + invalid_param = False + + if invalid_param: + print("Config Error: Parameter " + param_name + " is invalid!") + exit(1) + + '''noc_num_nodes = [] for n in range(radsim_knobs["noc_num_nocs"]): noc_num_nodes.append(0) radsim_knobs["noc_num_nodes"] = noc_num_nodes @@ -38,7 +63,7 @@ def parse_config_file(config_filename, booksim_params, radsim_header_params, rad for p in radsim_knobs["design_clk_periods"]: if p > longest_clk_period: longest_clk_period = p - radsim_knobs["sim_driver_period"] = longest_clk_period + radsim_knobs["sim_driver_period"] = longest_clk_period''' def print_config(booksim_params, radsim_header_params, radsim_knobs): @@ -55,7 +80,7 @@ def print_config(booksim_params, radsim_header_params, radsim_knobs): def generate_booksim_config_files(booksim_params, radsim_header_params, radsim_knobs): for i in range(booksim_params["noc_num_nocs"]): - booksim_config_file = open(booksim_params["radsim_root_dir"] + "/sim/noc/noc" + str(i) + "_config", "w") + booksim_config_file = open(booksim_params["radsim_root_dir"] + "/sim/noc/noc" + str(i) + "_config_akb_test", "w") #AKB created temp file to test # Booksim topology configuration booksim_config_file.write("// Topology\n") @@ -148,7 +173,7 @@ def generate_booksim_config_files(booksim_params, radsim_header_params, radsim_k def generate_radsim_params_header(radsim_header_params): - radsim_params_header_file = open(radsim_header_params["radsim_root_dir"] + "/sim/radsim_defines.hpp", "w") + radsim_params_header_file = open(radsim_header_params["radsim_root_dir"] + "/sim/radsim_defines_akb_test.hpp", "w") #AKB created temp file to test radsim_params_header_file.write("#pragma once\n\n") radsim_params_header_file.write("// clang-format off\n") radsim_params_header_file.write('#define RADSIM_ROOT_DIR "' + radsim_header_params["radsim_root_dir"] + '"\n\n') @@ -248,7 +273,7 @@ def generate_radsim_params_header(radsim_header_params): def generate_radsim_config_file(radsim_knobs): - radsim_config_file = open(radsim_header_params["radsim_root_dir"] + "/sim/radsim_knobs", "w") + radsim_config_file = open(radsim_header_params["radsim_root_dir"] + "/sim/radsim_knobs_akb_test", "w") #AKB created temp file to test for param in radsim_knobs: radsim_config_file.write(param + " ") if isinstance(radsim_knobs[param], list): @@ -260,7 +285,7 @@ def generate_radsim_config_file(radsim_knobs): radsim_config_file.close() def generate_radsim_main(design_name): - main_cpp_file = open(radsim_header_params["radsim_root_dir"] + "/sim/main.cpp", "w") + main_cpp_file = open(radsim_header_params["radsim_root_dir"] + "/sim/main_akb_test.cpp", "w") #AKB created temp file to test main_cpp_file.write("#include \n") main_cpp_file.write("#include \n") main_cpp_file.write("#include \n") @@ -297,25 +322,40 @@ def generate_radsim_main(design_name): main_cpp_file.write("\treturn 0;\n") main_cpp_file.write("}\n") -def prepare_build_dir(design_name): - if os.path.isdir("build"): - shutil.rmtree("build", ignore_errors=True) - os.makedirs("build") - os.system("cd build; cmake -DDESIGN:STRING=" + design_name + " ..; cd ..;") +def prepare_build_dir(design_names): + if os.path.isdir("build_akb_test"): + shutil.rmtree("build_akb_test", ignore_errors=True) + os.makedirs("build_akb_test") + #os.system("cd build_akb_test; cmake -DDESIGN:STRING=" + design_name + " ..; cd ..;") + os.system("cd build_akb_test;") + semicol_sep_design_names = '' + flag_first_design = True + for design_name in design_names: + semicol_sep_design_names += design_name + if not flag_first_design: + semicol_sep_design_names += ';' + flag_first_design = False + os.system("cmake -DDESIGN_NAMES=" + semicol_sep_design_names + " ..;") + os.system("cd ..;") # Get design name from command line argument if len(sys.argv) < 2: print("Invalid arguments: python config.py ") exit(1) -design_name = sys.argv[1] +design_names = set() #No duplicating design include statements and cmake commands +for i in range(1, len(sys.argv)): #skip 0th argument (that is current program name) + design_names.add(sys.argv[i]) + print(sys.argv[i]) # Check if design directory exists -if not(os.path.isdir(os.getcwd() + "/example-designs/" + design_name)): - print("Cannot find design directory under rad-sim/example-designs/") - exit(1) +for design_name in design_names: + if not(os.path.isdir(os.getcwd() + "/example-designs/" + design_name)): + print("Cannot find design directory under rad-sim/example-designs/") + exit(1) # Point to YAML configuration file -config_filename = "example-designs/" + design_name + "/config.yml" +#config_filename = "example-designs/" + design_name + "/config.yml" +config_filename = "uni_config.yml" # List default parameter values booksim_params = { @@ -355,7 +395,7 @@ def prepare_build_dir(design_name): "interfaces_axi_user_width": 64, "interfaces_max_axi_data_width": 512, } -radsim_knobs = { +radsim_knobs = { #includes cluster config "radsim_root_dir": os.getcwd(), "design_name": design_name, "noc_num_nocs": 1, @@ -378,17 +418,22 @@ def prepare_build_dir(design_name): "dram_clk_periods": [2.0], "dram_queue_sizes": [64], "dram_config_files": ["HBM2_8Gb_x128"], + "cluster_num_rads":[1], + "cluster_configs":["config_0"], + "cluster_topology":["all-to-all"], + "cluster_connection_model":["wire"] + } # Parse configuration file parse_config_file(config_filename, booksim_params, radsim_header_params, radsim_knobs) -#print_config(booksim_params, radsim_header_params, radsim_knobs) +print_config(booksim_params, radsim_header_params, radsim_knobs) # Generate RAD-Sim input files -generate_booksim_config_files(booksim_params, radsim_header_params, radsim_knobs) +'''generate_booksim_config_files(booksim_params, radsim_header_params, radsim_knobs) generate_radsim_params_header(radsim_header_params) generate_radsim_config_file(radsim_knobs) generate_radsim_main(design_name) -prepare_build_dir(design_name) +prepare_build_dir(design_names) -print("RAD-Sim was configured successfully!") \ No newline at end of file +print("RAD-Sim was configured successfully!")''' \ No newline at end of file diff --git a/rad-sim/uni_config.yml b/rad-sim/uni_config.yml new file mode 100644 index 0000000..698ee22 --- /dev/null +++ b/rad-sim/uni_config.yml @@ -0,0 +1,83 @@ +config0: + noc: + type: ['2d'] + num_nocs: 1 + clk_period: [1.0] + payload_width: [166] + topology: ['mesh'] + dim_x: [4] + dim_y: [4] + routing_func: ['dim_order'] + vcs: [5] + vc_buffer_size: [8] + output_buffer_size: [8] + num_packet_types: [5] + router_uarch: ['iq'] + vc_allocator: ['islip'] + sw_allocator: ['islip'] + credit_delay: [1] + routing_delay: [1] + vc_alloc_delay: [1] + sw_alloc_delay: [1] + + noc_adapters: + clk_period: [1.25] + fifo_size: [16] + obuff_size: [2] + in_arbiter: ['fixed_rr'] + out_arbiter: ['priority_rr'] + vc_mapping: ['direct'] + + design: + name: 'add' + noc_placement: ['add.place'] + clk_periods: [5.0] + + telemetry: + log_verbosity: 2 + traces: [] + +config1: + noc: + type: ['2d'] + num_nocs: 1 + clk_period: [1.0] + payload_width: [166] + topology: ['mesh'] + dim_x: [4] + dim_y: [4] + routing_func: ['dim_order'] + vcs: [5] + vc_buffer_size: [8] + output_buffer_size: [8] + num_packet_types: [5] + router_uarch: ['iq'] + vc_allocator: ['islip'] + sw_allocator: ['islip'] + credit_delay: [1] + routing_delay: [1] + vc_alloc_delay: [1] + sw_alloc_delay: [1] + + noc_adapters: + clk_period: [1.25] + fifo_size: [16] + obuff_size: [2] + in_arbiter: ['fixed_rr'] + out_arbiter: ['priority_rr'] + vc_mapping: ['direct'] + + design: + name: 'mult' + noc_placement: ['mult.place'] + clk_periods: [5.0] + + telemetry: + log_verbosity: 2 + traces: [] + +cluster: + num_rads: 2 + configs: ["config_0", "config_1"] + topology: "all-to-all" + connection_model: "wire" \ No newline at end of file From c0ed2289e9cd1816bb20c37849d420ed139b9609 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 6 Feb 2024 11:16:32 -0500 Subject: [PATCH 013/127] Added NoC interface for add portal module and cleaned up main --- rad-sim/example-designs/add/add.clks | 3 +- rad-sim/example-designs/add/add.place | 3 +- rad-sim/example-designs/add/add_top.cpp | 4 +- .../example-designs/add/modules/portal.cpp | 29 +++++++++++-- .../example-designs/add/modules/portal.hpp | 3 ++ rad-sim/example-designs/mult/CMakeLists.txt | 4 +- .../modules/{portal.cpp => portal_mult.cpp} | 22 +++++----- .../modules/{portal.hpp => portal_mult.hpp} | 8 ++-- rad-sim/example-designs/mult/mult_top.cpp | 6 +-- rad-sim/example-designs/mult/mult_top.hpp | 4 +- rad-sim/sim/design_context.cpp | 25 ++++++----- rad-sim/sim/main.cpp | 41 +------------------ rad-sim/sim/noc/axis_interface.hpp | 3 ++ rad-sim/sim/radsim_module.cpp | 2 + 14 files changed, 78 insertions(+), 79 deletions(-) rename rad-sim/example-designs/mult/modules/{portal.cpp => portal_mult.cpp} (58%) rename rad-sim/example-designs/mult/modules/{portal.hpp => portal_mult.hpp} (72%) diff --git a/rad-sim/example-designs/add/add.clks b/rad-sim/example-designs/add/add.clks index a5df186..067766d 100644 --- a/rad-sim/example-designs/add/add.clks +++ b/rad-sim/example-designs/add/add.clks @@ -1,2 +1,3 @@ adder_inst 0 0 -client_inst 0 0 \ No newline at end of file +client_inst 0 0 +portal_inst 0 0 \ No newline at end of file diff --git a/rad-sim/example-designs/add/add.place b/rad-sim/example-designs/add/add.place index ca746f7..66ed13e 100644 --- a/rad-sim/example-designs/add/add.place +++ b/rad-sim/example-designs/add/add.place @@ -1,2 +1,3 @@ adder_inst 0 0 axis -client_inst 0 3 axis \ No newline at end of file +client_inst 0 3 axis +portal_inst 0 1 axis \ No newline at end of file diff --git a/rad-sim/example-designs/add/add_top.cpp b/rad-sim/example-designs/add/add_top.cpp index 0874476..fb081a0 100644 --- a/rad-sim/example-designs/add/add_top.cpp +++ b/rad-sim/example-designs/add/add_top.cpp @@ -27,8 +27,8 @@ add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) module_name_str = "portal_inst"; std::strcpy(module_name, module_name_str.c_str()); portal_inst = new portal(module_name, radsim_design); - portal_inst->portal_in(portal_in); - portal_inst->portal_out(portal_out); + portal_inst->portal_in(this->portal_in); //connecting portal's portal_in to the parent class system_top's portal_in + portal_inst->portal_out(this->portal_out); radsim_design->BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add", "add.place", "add.clks"); //AKB changed to ptr deref and added first arg diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 579c5e6..8811151 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -5,15 +5,17 @@ portal::portal(const sc_module_name &name, RADSimDesignContext* radsim_design) / //maybe add combinational logic if applicable later SC_CTHREAD(Tick, clk.pos()); - //not connecting to NoC + // This function must be defined & called for any RAD-Sim module to register + // its info for automatically connecting to the NoC + this->RegisterModuleInfo(); //can comment out if not connecting to NoC } portal::~portal() {} -/*void portal::Assign() { //combinational logic +//void portal::Assign() { //combinational logic //maybe add reset signal later -}*/ +//} bool counter = 0; void portal::Tick() { //sequential logic @@ -36,5 +38,24 @@ void portal::Tick() { //sequential logic void portal::RegisterModuleInfo() { //I don't think this is needed unless I add AXI Interface -- nvm, need bc is virtual fn in derived class - + //now adding AXI slave interface + std::string port_name; + _num_noc_axis_slave_ports = 0; + _num_noc_axis_master_ports = 0; + _num_noc_aximm_slave_ports = 0; + _num_noc_aximm_master_ports = 0; + + port_name = module_name + ".axis_add_portal_slave_interface"; + //std::cout << port_name << std::endl; + RegisterAxisSlavePort(port_name, &axis_add_portal_slave_interface, DATAW, 0); + + /*_num_noc_axis_slave_ports = 0; + _num_noc_axis_master_ports = 0; + _num_noc_aximm_slave_ports = 0; + _num_noc_aximm_master_ports = 0; + + port_name = module_name + ".axis_add_portal_master_interface"; + std::cout << port_name << std::endl; + RegisterAxisMasterPort(port_name, &axis_add_portal_master_interface, DATAW, 0); + */ } \ No newline at end of file diff --git a/rad-sim/example-designs/add/modules/portal.hpp b/rad-sim/example-designs/add/modules/portal.hpp index 3ab410f..10dab22 100644 --- a/rad-sim/example-designs/add/modules/portal.hpp +++ b/rad-sim/example-designs/add/modules/portal.hpp @@ -15,6 +15,9 @@ class portal : public RADSimModule { public: sc_in portal_in; sc_out portal_out; + //Interfaces to the NoC + axis_slave_port axis_add_portal_slave_interface; + //axis_master_port axis_add_portal_master_interface; portal(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg ~portal(); diff --git a/rad-sim/example-designs/mult/CMakeLists.txt b/rad-sim/example-designs/mult/CMakeLists.txt index a22c332..5758451 100644 --- a/rad-sim/example-designs/mult/CMakeLists.txt +++ b/rad-sim/example-designs/mult/CMakeLists.txt @@ -14,7 +14,7 @@ include_directories( set(srcfiles modules/mult.cpp modules/client_mult.cpp - modules/portal.cpp + modules/portal_mult.cpp mult_top.cpp mult_driver.cpp mult_system.cpp @@ -23,7 +23,7 @@ set(srcfiles set(hdrfiles modules/mult.hpp modules/client_mult.hpp - modules/portal.hpp + modules/portal_mult.hpp mult_top.hpp mult_driver.hpp mult_system.hpp diff --git a/rad-sim/example-designs/mult/modules/portal.cpp b/rad-sim/example-designs/mult/modules/portal_mult.cpp similarity index 58% rename from rad-sim/example-designs/mult/modules/portal.cpp rename to rad-sim/example-designs/mult/modules/portal_mult.cpp index 579c5e6..9780a40 100644 --- a/rad-sim/example-designs/mult/modules/portal.cpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.cpp @@ -1,6 +1,6 @@ -#include +#include -portal::portal(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg +portal_mult::portal_mult(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg : RADSimModule(name, radsim_design) { //maybe add combinational logic if applicable later @@ -9,32 +9,32 @@ portal::portal(const sc_module_name &name, RADSimDesignContext* radsim_design) / } -portal::~portal() {} +portal_mult::~portal_mult() {} /*void portal::Assign() { //combinational logic //maybe add reset signal later }*/ -bool counter = 0; -void portal::Tick() { //sequential logic - portal_out.write(counter); +bool counter_mult = 0; +void portal_mult::Tick() { //sequential logic + portal_out.write(counter_mult); wait(); //Always @ positive edge of clock while (true) { - if (counter == 0) { - counter = 1; + if (counter_mult == 0) { + counter_mult = 1; } else { - counter = 0; + counter_mult = 0; } - portal_out.write(counter); + portal_out.write(counter_mult); //std::cout << module_name << ": Wire in is showing " << portal_in.read() << std::endl; //std::cout << counter << std::endl; wait(); } } -void portal::RegisterModuleInfo() { +void portal_mult::RegisterModuleInfo() { //I don't think this is needed unless I add AXI Interface -- nvm, need bc is virtual fn in derived class } \ No newline at end of file diff --git a/rad-sim/example-designs/mult/modules/portal.hpp b/rad-sim/example-designs/mult/modules/portal_mult.hpp similarity index 72% rename from rad-sim/example-designs/mult/modules/portal.hpp rename to rad-sim/example-designs/mult/modules/portal_mult.hpp index 0d79d25..fa091c6 100644 --- a/rad-sim/example-designs/mult/modules/portal.hpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.hpp @@ -10,17 +10,17 @@ #include #include -class portal : public RADSimModule { +class portal_mult : public RADSimModule { private: public: sc_in portal_in; sc_out portal_out; - portal(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg - ~portal(); + portal_mult(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg + ~portal_mult(); //void Assign(); // Combinational logic process void Tick(); // Sequential logic process - SC_HAS_PROCESS(portal); + SC_HAS_PROCESS(portal_mult); void RegisterModuleInfo(); //even tho did not add AXI Interface, need because is virtual fn in derived class }; \ No newline at end of file diff --git a/rad-sim/example-designs/mult/mult_top.cpp b/rad-sim/example-designs/mult/mult_top.cpp index ea85299..27d4bf3 100644 --- a/rad-sim/example-designs/mult/mult_top.cpp +++ b/rad-sim/example-designs/mult/mult_top.cpp @@ -26,9 +26,9 @@ mult_top::mult_top(const sc_module_name &name, RADSimDesignContext* radsim_desig //AKB: added code block for portal module module_name_str = "portal_inst"; std::strcpy(module_name, module_name_str.c_str()); - portal_inst = new portal(module_name, radsim_design); - portal_inst->portal_in(portal_in); - portal_inst->portal_out(portal_out); + portal_inst = new portal_mult(module_name, radsim_design); + portal_inst->portal_in(this->portal_in); //connecting portal's portal_in to the parent class system_top's portal_in + portal_inst->portal_out(this->portal_out); radsim_design->BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/mult", "mult.place", "mult.clks"); //AKB changed to ptr deref, added first arg diff --git a/rad-sim/example-designs/mult/mult_top.hpp b/rad-sim/example-designs/mult/mult_top.hpp index 42d0185..8deadf8 100644 --- a/rad-sim/example-designs/mult/mult_top.hpp +++ b/rad-sim/example-designs/mult/mult_top.hpp @@ -3,7 +3,7 @@ #include #include #include -#include //AKB ADDED +#include //AKB ADDED #include #include #include //AKB ADDED @@ -12,7 +12,7 @@ class mult_top : public design_top { private: mult *mult_inst; client_mult *client_inst; - portal *portal_inst; //AKB added + portal_mult *portal_inst; //AKB added public: sc_in rst; diff --git a/rad-sim/sim/design_context.cpp b/rad-sim/sim/design_context.cpp index c36e8ea..e50fb3c 100644 --- a/rad-sim/sim/design_context.cpp +++ b/rad-sim/sim/design_context.cpp @@ -489,29 +489,34 @@ void RADSimDesignContext::ConnectModulesToNoC() { for (auto module_it = _design_modules.begin(); module_it != _design_modules.end(); module_it++) { RADSimModule *module_ptr = module_it->second; - // std::cout << "MODULE " << module_ptr->name() << std::endl; + std::cout << "MODULE " << module_ptr->name() << std::endl; // Connect AXI-S Slave ports of the module - // std::cout << "AXI-S slave ports: " << std::endl; + std::cout << "AXI-S slave ports: " << std::endl; + //std::cout << module_ptr->_axis_slave_ports.begin()->first<< std::endl; for (auto slave_port_it = module_ptr->_axis_slave_ports.begin(); slave_port_it != module_ptr->_axis_slave_ports.end(); slave_port_it++) { + //std::cout << "here" << std::endl; std::string port_name = slave_port_it->first; - // std::cout << port_name << ", "; + std::cout << port_name << ", "; unsigned int noc_id = std::get<0>(_port_placement[port_name]); + //std::cout << _noc_axis_master_ports[noc_id][port_name] << std::endl; _axis_signals[axis_signal_id].Connect( *(_noc_axis_master_ports[noc_id][port_name]), *(slave_port_it->second)); + //std::cout << "here3" << std::endl; axis_signal_id++; + //std::cout << axis_signal_id << std::endl; } // Connect AXI-S Master ports of the module - // std::cout << "\nAXI-S master ports: "; + std::cout << "\nAXI-S master ports: "; for (auto master_port_it = module_ptr->_axis_master_ports.begin(); master_port_it != module_ptr->_axis_master_ports.end(); master_port_it++) { std::string port_name = master_port_it->first; - // std::cout << port_name << ", "; + std::cout << port_name << ", "; unsigned int noc_id = std::get<0>(_port_placement[port_name]); _axis_signals[axis_signal_id].Connect( *(master_port_it->second), @@ -520,12 +525,12 @@ void RADSimDesignContext::ConnectModulesToNoC() { } // Connect AXI-MM Slave ports of the module - // std::cout << "\nAXI-MM slave ports: "; + std::cout << "\nAXI-MM slave ports: "; for (auto slave_port_it = module_ptr->_aximm_slave_ports.begin(); slave_port_it != module_ptr->_aximm_slave_ports.end(); slave_port_it++) { std::string port_name = slave_port_it->first; - // std::cout << port_name << ", "; + std::cout << port_name << ", "; unsigned int noc_id = std::get<0>(_port_placement[port_name]); _aximm_signals[aximm_signal_id].Connect( *(_noc_aximm_master_ports[noc_id][port_name]), @@ -534,19 +539,19 @@ void RADSimDesignContext::ConnectModulesToNoC() { } // Connect AXI-MM Master ports of the module - // std::cout << "\nAXI-MM master ports: "; + std::cout << "\nAXI-MM master ports: "; for (auto master_port_it = module_ptr->_aximm_master_ports.begin(); master_port_it != module_ptr->_aximm_master_ports.end(); master_port_it++) { std::string port_name = master_port_it->first; - // std::cout << port_name << ", "; + std::cout << port_name << ", "; unsigned int noc_id = std::get<0>(_port_placement[port_name]); _aximm_signals[aximm_signal_id].Connect( *(master_port_it->second), *(_noc_aximm_slave_ports[noc_id][port_name])); aximm_signal_id++; } - // std::cout << "\n"; + std::cout << "\n"; } } diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index dee23d2..6d08d88 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -17,9 +17,6 @@ SimLog sim_log; SimTraceRecording sim_trace_probe; int sc_main(int argc, char *argv[]) { - //RADSimDesignContext* radsim_design1 = new RADSimDesignContext(); //AKB: added - //RADSimDesignContext* radsim_design2 = new RADSimDesignContext(); //AKB: added - //AKB: using RADSimCluster class instead of creating new above RADSimCluster* cluster = new RADSimCluster(2); @@ -42,48 +39,16 @@ int sc_main(int argc, char *argv[]) { //add_system *system2 = new add_system("add_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED mult_system *system2 = new mult_system("mult_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED - /*cluster->StoreSystemIn(system->dut_inst->portal_out); //AKB ADDED - cluster->StoreSystemOut(system->dut_inst->portal_in); //AKB ADDED - cluster->StoreSystemIn(system2->dut_inst->portal_out); //AKB ADDED - cluster->StoreSystemOut(system2->dut_inst->portal_in);*/ //AKB ADDED - //npu_system *system3 = new npu_system("npu_system", driver_clk_sig2); //AKB ADDED to test design paths - + //AKB ADDED: cluster->StoreSystem(system); cluster->StoreSystem(system2); RADSimInterRad* blackbox = new RADSimInterRad(cluster); blackbox->ConnectRadPair(0, 1); - //AKB ADDED signals -- this works - /*sc_signal in_1_out_2; - sc_signal in_2_out_1; - system->dut_inst->portal_in(in_1_out_2); - system->dut_inst->portal_out(in_2_out_1); - system2->dut_inst->portal_in(in_2_out_1); - system2->dut_inst->portal_out(in_1_out_2);*/ - - //AKB experimenting with new classes - //design_system* design_system_inst = system; - /*sc_signal in_1_out_2; - sc_signal in_2_out_1; - cluster->all_systems[0]->design_dut_inst->portal_in(in_1_out_2); - cluster->all_systems[0]->design_dut_inst->portal_out(in_2_out_1); - cluster->all_systems[1]->design_dut_inst->portal_in(in_2_out_1); - cluster->all_systems[1]->design_dut_inst->portal_out(in_1_out_2);*/ - - //sc_start(); //AKB commented out - - //AKB ADDED this code blk: checking for flag to be set for both RADs before calling sc_stop(); - //bool signal1 = 0; - //bool signal2 = 1; + while (cluster->AllRADsNotDone()) { sc_start(1, SC_NS); - /*in_1_out_2.write(signal1); - in_2_out_1.write(signal2); - signal1 = !(signal1 & signal1); - signal2 = !(signal2 & signal2); - std::cout << signal1 << std::endl; - std::cout << signal2 << std::endl;*/ std::cout << "read system portal_in: " << system->dut_inst->portal_in.read() << std::endl; std::cout << "read system2 portal_in: " << system2->dut_inst->portal_in.read() << std::endl; } @@ -94,8 +59,6 @@ int sc_main(int argc, char *argv[]) { delete system2; //AKB ADDED delete driver_clk_sig; delete driver_clk_sig2; //AKB ADDED - //delete radsim_design1; //AKB ADDED -- later removed bc have cluster destructor now - //delete radsim_design2; //AKB ADDED -- later removed bc have cluster destructor now sc_flit scf; scf.FreeAllFlits(); Flit *f = Flit::New(); diff --git a/rad-sim/sim/noc/axis_interface.hpp b/rad-sim/sim/noc/axis_interface.hpp index 40b4ec4..997264a 100644 --- a/rad-sim/sim/noc/axis_interface.hpp +++ b/rad-sim/sim/noc/axis_interface.hpp @@ -128,6 +128,9 @@ struct axis_signal { // Helper function for connecting the AXI-stream master and slave ports of two // modules void Connect(axis_master_port &m, axis_slave_port &s) { + //AKB ADDED few lines below TO TEST + //std::cout << "Here in Connect in axis_interface.hpp" << endl; + //std::cout << "master " << &m << " and slave " << &s << endl; // Connect signal to master port m.tvalid(tvalid); m.tready(tready); diff --git a/rad-sim/sim/radsim_module.cpp b/rad-sim/sim/radsim_module.cpp index 85869d6..bab5035 100644 --- a/rad-sim/sim/radsim_module.cpp +++ b/rad-sim/sim/radsim_module.cpp @@ -17,12 +17,14 @@ void RADSimModule::RegisterAxisSlavePort(std::string &port_name, axis_slave_port *port_ptr, unsigned int port_dataw, unsigned int port_type) { + //std::cout << "Adding AxisSlavePort named: " << port_name << endl; //AKB ADDED TO TEST, remove after _ordered_axis_slave_ports.push_back(port_name); _axis_slave_ports[port_name] = port_ptr; _ports_dataw[port_name] = port_dataw; _ports_types[port_name] = port_type; _ports_is_aximm[port_name] = false; _num_noc_axis_slave_ports++; + //std::cout << "Added AxisSlavePort named: " << _axis_slave_ports[port_name] << endl; //AKB ADDED TO TEST, remove after } void RADSimModule::RegisterAxisMasterPort(std::string &port_name, From 7222d2fcddc66f179c4411dbb0f81487969cde2b Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 6 Feb 2024 11:23:02 -0500 Subject: [PATCH 014/127] Added master port to add design portal module --- rad-sim/example-designs/add/modules/portal.cpp | 5 ++--- rad-sim/example-designs/add/modules/portal.hpp | 2 +- rad-sim/example-designs/mult/modules/portal_mult.cpp | 10 +++++++++- rad-sim/example-designs/mult/modules/portal_mult.hpp | 2 ++ 4 files changed, 14 insertions(+), 5 deletions(-) diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 8811151..3aa0d0e 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -49,13 +49,12 @@ void portal::RegisterModuleInfo() { //std::cout << port_name << std::endl; RegisterAxisSlavePort(port_name, &axis_add_portal_slave_interface, DATAW, 0); - /*_num_noc_axis_slave_ports = 0; + _num_noc_axis_slave_ports = 0; _num_noc_axis_master_ports = 0; _num_noc_aximm_slave_ports = 0; _num_noc_aximm_master_ports = 0; port_name = module_name + ".axis_add_portal_master_interface"; - std::cout << port_name << std::endl; RegisterAxisMasterPort(port_name, &axis_add_portal_master_interface, DATAW, 0); - */ + } \ No newline at end of file diff --git a/rad-sim/example-designs/add/modules/portal.hpp b/rad-sim/example-designs/add/modules/portal.hpp index 10dab22..1dbed44 100644 --- a/rad-sim/example-designs/add/modules/portal.hpp +++ b/rad-sim/example-designs/add/modules/portal.hpp @@ -17,7 +17,7 @@ class portal : public RADSimModule { sc_out portal_out; //Interfaces to the NoC axis_slave_port axis_add_portal_slave_interface; - //axis_master_port axis_add_portal_master_interface; + axis_master_port axis_add_portal_master_interface; portal(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg ~portal(); diff --git a/rad-sim/example-designs/mult/modules/portal_mult.cpp b/rad-sim/example-designs/mult/modules/portal_mult.cpp index 9780a40..65b20f0 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.cpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.cpp @@ -36,5 +36,13 @@ void portal_mult::Tick() { //sequential logic void portal_mult::RegisterModuleInfo() { //I don't think this is needed unless I add AXI Interface -- nvm, need bc is virtual fn in derived class - + /*std::string port_name; + _num_noc_axis_slave_ports = 0; + _num_noc_axis_master_ports = 0; + _num_noc_aximm_slave_ports = 0; + _num_noc_aximm_master_ports = 0; + + port_name = module_name + ".axis_mult_portal_slave_interface"; + //std::cout << port_name << std::endl; + RegisterAxisSlavePort(port_name, &axis_mult_portal_slave_interface, DATAW, 0);*/ } \ No newline at end of file diff --git a/rad-sim/example-designs/mult/modules/portal_mult.hpp b/rad-sim/example-designs/mult/modules/portal_mult.hpp index fa091c6..3258b1d 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.hpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.hpp @@ -15,6 +15,8 @@ class portal_mult : public RADSimModule { public: sc_in portal_in; sc_out portal_out; + //Interfaces to the NoC + //axis_slave_port axis_mult_portal_slave_interface; portal_mult(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg ~portal_mult(); From 8feeaa71d27d7b5f30b0c43d8ff2cce26581df7b Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 6 Feb 2024 11:39:11 -0500 Subject: [PATCH 015/127] Changed interrad connection from single-bit wire to multi-bit --- rad-sim/example-designs/add/modules/portal.cpp | 2 +- rad-sim/example-designs/add/modules/portal.hpp | 4 ++-- rad-sim/example-designs/mult/modules/portal_mult.cpp | 2 +- rad-sim/example-designs/mult/modules/portal_mult.hpp | 4 ++-- rad-sim/sim/design_top.hpp | 7 +++++-- rad-sim/sim/radsim_inter_rad.hpp | 4 +++- 6 files changed, 14 insertions(+), 9 deletions(-) diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 3aa0d0e..844a484 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -17,7 +17,7 @@ portal::~portal() {} //maybe add reset signal later //} -bool counter = 0; +int counter = 0; void portal::Tick() { //sequential logic portal_out.write(counter); wait(); diff --git a/rad-sim/example-designs/add/modules/portal.hpp b/rad-sim/example-designs/add/modules/portal.hpp index 1dbed44..2acbcc1 100644 --- a/rad-sim/example-designs/add/modules/portal.hpp +++ b/rad-sim/example-designs/add/modules/portal.hpp @@ -13,8 +13,8 @@ class portal : public RADSimModule { private: public: - sc_in portal_in; - sc_out portal_out; + sc_in> portal_in; + sc_out> portal_out; //Interfaces to the NoC axis_slave_port axis_add_portal_slave_interface; axis_master_port axis_add_portal_master_interface; diff --git a/rad-sim/example-designs/mult/modules/portal_mult.cpp b/rad-sim/example-designs/mult/modules/portal_mult.cpp index 65b20f0..8b58831 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.cpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.cpp @@ -15,7 +15,7 @@ portal_mult::~portal_mult() {} //maybe add reset signal later }*/ -bool counter_mult = 0; +int counter_mult = 0; void portal_mult::Tick() { //sequential logic portal_out.write(counter_mult); wait(); diff --git a/rad-sim/example-designs/mult/modules/portal_mult.hpp b/rad-sim/example-designs/mult/modules/portal_mult.hpp index 3258b1d..5e3be44 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.hpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.hpp @@ -13,8 +13,8 @@ class portal_mult : public RADSimModule { private: public: - sc_in portal_in; - sc_out portal_out; + sc_in> portal_in; + sc_out> portal_out; //Interfaces to the NoC //axis_slave_port axis_mult_portal_slave_interface; diff --git a/rad-sim/sim/design_top.hpp b/rad-sim/sim/design_top.hpp index 98757e6..3a5a229 100644 --- a/rad-sim/sim/design_top.hpp +++ b/rad-sim/sim/design_top.hpp @@ -1,9 +1,12 @@ #pragma once #include +#include + +#define DATAW 128 class design_top : virtual public sc_module { public: - sc_in portal_in; - sc_out portal_out; + sc_in> portal_in; + sc_out> portal_out; }; \ No newline at end of file diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index 00f5f89..ec71944 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -7,11 +7,13 @@ #include #include +#define DATAW 128 + class RADSimInterRad { //: public sc_module { private: RADSimCluster* cluster; //std::vector> all_signals; - sc_vector> all_signals{"all_signals"}; + sc_vector>> all_signals{"all_signals"}; public: RADSimInterRad(RADSimCluster* cluster); ~RADSimInterRad(); From 75e9945dd1010f169fcffb3797e6e8753892d07b Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 6 Feb 2024 12:18:08 -0500 Subject: [PATCH 016/127] Added NoC interfaces for mult design and connected into parent system_top class --- rad-sim/example-designs/add/add_top.cpp | 1 + rad-sim/example-designs/mult/modules/portal_mult.cpp | 6 +++--- rad-sim/example-designs/mult/modules/portal_mult.hpp | 2 +- rad-sim/example-designs/mult/mult.clks | 3 ++- rad-sim/example-designs/mult/mult.place | 3 ++- rad-sim/example-designs/mult/mult_top.cpp | 1 + rad-sim/example-designs/mult/mult_top.hpp | 1 + rad-sim/sim/design_top.hpp | 1 + 8 files changed, 12 insertions(+), 6 deletions(-) diff --git a/rad-sim/example-designs/add/add_top.cpp b/rad-sim/example-designs/add/add_top.cpp index fb081a0..e3e2e93 100644 --- a/rad-sim/example-designs/add/add_top.cpp +++ b/rad-sim/example-designs/add/add_top.cpp @@ -29,6 +29,7 @@ add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) portal_inst = new portal(module_name, radsim_design); portal_inst->portal_in(this->portal_in); //connecting portal's portal_in to the parent class system_top's portal_in portal_inst->portal_out(this->portal_out); + this->top_axis_portal_interface = &(portal_inst->axis_add_portal_slave_interface); radsim_design->BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add", "add.place", "add.clks"); //AKB changed to ptr deref and added first arg diff --git a/rad-sim/example-designs/mult/modules/portal_mult.cpp b/rad-sim/example-designs/mult/modules/portal_mult.cpp index 8b58831..6ba64df 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.cpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.cpp @@ -5,7 +5,7 @@ portal_mult::portal_mult(const sc_module_name &name, RADSimDesignContext* radsim //maybe add combinational logic if applicable later SC_CTHREAD(Tick, clk.pos()); - //not connecting to NoC + this->RegisterModuleInfo(); //can comment out if not connecting to NoC } @@ -36,7 +36,7 @@ void portal_mult::Tick() { //sequential logic void portal_mult::RegisterModuleInfo() { //I don't think this is needed unless I add AXI Interface -- nvm, need bc is virtual fn in derived class - /*std::string port_name; + std::string port_name; _num_noc_axis_slave_ports = 0; _num_noc_axis_master_ports = 0; _num_noc_aximm_slave_ports = 0; @@ -44,5 +44,5 @@ void portal_mult::RegisterModuleInfo() { port_name = module_name + ".axis_mult_portal_slave_interface"; //std::cout << port_name << std::endl; - RegisterAxisSlavePort(port_name, &axis_mult_portal_slave_interface, DATAW, 0);*/ + RegisterAxisSlavePort(port_name, &axis_mult_portal_slave_interface, DATAW, 0); } \ No newline at end of file diff --git a/rad-sim/example-designs/mult/modules/portal_mult.hpp b/rad-sim/example-designs/mult/modules/portal_mult.hpp index 5e3be44..dca5fda 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.hpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.hpp @@ -16,7 +16,7 @@ class portal_mult : public RADSimModule { sc_in> portal_in; sc_out> portal_out; //Interfaces to the NoC - //axis_slave_port axis_mult_portal_slave_interface; + axis_slave_port axis_mult_portal_slave_interface; portal_mult(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg ~portal_mult(); diff --git a/rad-sim/example-designs/mult/mult.clks b/rad-sim/example-designs/mult/mult.clks index 3e3efd6..873208a 100644 --- a/rad-sim/example-designs/mult/mult.clks +++ b/rad-sim/example-designs/mult/mult.clks @@ -1,2 +1,3 @@ mult_inst 0 0 -client_inst 0 0 \ No newline at end of file +client_inst 0 0 +portal_inst 0 0 \ No newline at end of file diff --git a/rad-sim/example-designs/mult/mult.place b/rad-sim/example-designs/mult/mult.place index f7e1ad0..d98b32d 100644 --- a/rad-sim/example-designs/mult/mult.place +++ b/rad-sim/example-designs/mult/mult.place @@ -1,2 +1,3 @@ mult_inst 0 0 axis -client_inst 0 3 axis \ No newline at end of file +client_inst 0 3 axis +portal_inst 0 1 axis \ No newline at end of file diff --git a/rad-sim/example-designs/mult/mult_top.cpp b/rad-sim/example-designs/mult/mult_top.cpp index 27d4bf3..edd3faa 100644 --- a/rad-sim/example-designs/mult/mult_top.cpp +++ b/rad-sim/example-designs/mult/mult_top.cpp @@ -29,6 +29,7 @@ mult_top::mult_top(const sc_module_name &name, RADSimDesignContext* radsim_desig portal_inst = new portal_mult(module_name, radsim_design); portal_inst->portal_in(this->portal_in); //connecting portal's portal_in to the parent class system_top's portal_in portal_inst->portal_out(this->portal_out); + this->top_axis_portal_interface = &(portal_inst->axis_mult_portal_slave_interface); radsim_design->BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/mult", "mult.place", "mult.clks"); //AKB changed to ptr deref, added first arg diff --git a/rad-sim/example-designs/mult/mult_top.hpp b/rad-sim/example-designs/mult/mult_top.hpp index 8deadf8..6a473d7 100644 --- a/rad-sim/example-designs/mult/mult_top.hpp +++ b/rad-sim/example-designs/mult/mult_top.hpp @@ -7,6 +7,7 @@ #include #include #include //AKB ADDED +#include class mult_top : public design_top { private: diff --git a/rad-sim/sim/design_top.hpp b/rad-sim/sim/design_top.hpp index 3a5a229..483bcc1 100644 --- a/rad-sim/sim/design_top.hpp +++ b/rad-sim/sim/design_top.hpp @@ -9,4 +9,5 @@ class design_top : virtual public sc_module { public: sc_in> portal_in; sc_out> portal_out; + axis_slave_port* top_axis_portal_interface; }; \ No newline at end of file From 7da130460a57b35fc6da09a4b4863a40cdb95f2d Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 6 Feb 2024 21:26:42 -0500 Subject: [PATCH 017/127] Added sim cycle metric to add_driver using mlp to learn --- rad-sim/example-designs/add/add_driver.cpp | 8 ++++++++ rad-sim/example-designs/add/add_driver.hpp | 1 + rad-sim/sim/main.cpp | 4 ++-- 3 files changed, 11 insertions(+), 2 deletions(-) diff --git a/rad-sim/example-designs/add/add_driver.cpp b/rad-sim/example-designs/add/add_driver.cpp index 38dfd1c..0f07b9d 100644 --- a/rad-sim/example-designs/add/add_driver.cpp +++ b/rad-sim/example-designs/add/add_driver.cpp @@ -7,6 +7,10 @@ add_driver::add_driver(const sc_module_name &name, RADSimDesignContext* radsim_d this->radsim_design_ = radsim_design; //AKB ADDED: update member for later use + //for simulation cycle count + start_cycle = 0; + end_cycle = 0; + // Random Seed srand (time(NULL)); actual_sum = 0; @@ -33,6 +37,7 @@ void add_driver::source() { client_valid.write(false); wait(); rst.write(false); + start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); wait(); while (!numbers_to_send.empty()) { @@ -61,6 +66,9 @@ void add_driver::sink() { if (response.read() != actual_sum) std::cout << "FAILURE - Output is not matching!" << std::endl; else std::cout << "SUCCESS - Output is matching!" << std::endl; + end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + std::cout << "Simulation Cycles for Just Adder Portion = " << end_cycle - start_cycle << std::endl; + //sc_stop(); //AKB: replaced with setting flag this->radsim_design_->set_rad_done(); //AKB ADDED: flag to replace sc_stop calls return; //AKB ADDED diff --git a/rad-sim/example-designs/add/add_driver.hpp b/rad-sim/example-designs/add/add_driver.hpp index 2898491..b7be3a5 100644 --- a/rad-sim/example-designs/add/add_driver.hpp +++ b/rad-sim/example-designs/add/add_driver.hpp @@ -10,6 +10,7 @@ class add_driver : public sc_module { private: + int start_cycle, end_cycle; std::queue numbers_to_send; int actual_sum; RADSimDesignContext* radsim_design_; //AKB ADDED: store ptr passed into constructor for use in source() and sink() diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 6d08d88..8879ada 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -49,8 +49,8 @@ int sc_main(int argc, char *argv[]) { while (cluster->AllRADsNotDone()) { sc_start(1, SC_NS); - std::cout << "read system portal_in: " << system->dut_inst->portal_in.read() << std::endl; - std::cout << "read system2 portal_in: " << system2->dut_inst->portal_in.read() << std::endl; + //std::cout << "read system portal_in: " << system->dut_inst->portal_in.read() << std::endl; + //std::cout << "read system2 portal_in: " << system2->dut_inst->portal_in.read() << std::endl; } //std::cout << "stopping" << std::endl; sc_stop(); From fc25ab1db48552994df3c36e63fe59563f04e1d7 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 6 Feb 2024 21:47:08 -0500 Subject: [PATCH 018/127] Added sim cycle counts to mult and main --- rad-sim/example-designs/mult/mult_driver.cpp | 9 +++++++++ rad-sim/example-designs/mult/mult_driver.hpp | 1 + rad-sim/sim/main.cpp | 5 ++++- 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/rad-sim/example-designs/mult/mult_driver.cpp b/rad-sim/example-designs/mult/mult_driver.cpp index 42d421c..43e6271 100644 --- a/rad-sim/example-designs/mult/mult_driver.cpp +++ b/rad-sim/example-designs/mult/mult_driver.cpp @@ -7,6 +7,10 @@ mult_driver::mult_driver(const sc_module_name &name, RADSimDesignContext* radsim this->radsim_design_ = radsim_design; //AKB ADDED: update member for later use + //for simulation cycle count + start_cycle = 0; + end_cycle = 0; + // Random Seed srand (time(NULL)); actual_product = 1; @@ -33,6 +37,7 @@ void mult_driver::source() { client_valid.write(false); wait(); rst.write(false); + start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); wait(); while (!numbers_to_send.empty()) { @@ -61,6 +66,10 @@ void mult_driver::sink() { if (response.read() != actual_product) std::cout << "FAILURE - Output is not matching!" << std::endl; else std::cout << "SUCCESS - Output is matching!" << std::endl; + end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + std::cout << "Simulation Cycles for Just Mult Portion = " << end_cycle - start_cycle << std::endl; + + //sc_stop(); //AKB: replaced with setting flag this->radsim_design_->set_rad_done(); //AKB ADDED: flag to replace sc_stop calls return; //AKB ADDED diff --git a/rad-sim/example-designs/mult/mult_driver.hpp b/rad-sim/example-designs/mult/mult_driver.hpp index d417c0d..f788bc9 100644 --- a/rad-sim/example-designs/mult/mult_driver.hpp +++ b/rad-sim/example-designs/mult/mult_driver.hpp @@ -10,6 +10,7 @@ class mult_driver : public sc_module { private: + int start_cycle, end_cycle; std::queue numbers_to_send; int actual_product; RADSimDesignContext* radsim_design_; //AKB ADDED: store ptr passed into constructor for use in source() and sink() diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 8879ada..ae6bbf8 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -46,14 +46,17 @@ int sc_main(int argc, char *argv[]) { RADSimInterRad* blackbox = new RADSimInterRad(cluster); blackbox->ConnectRadPair(0, 1); - + int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); while (cluster->AllRADsNotDone()) { sc_start(1, SC_NS); //std::cout << "read system portal_in: " << system->dut_inst->portal_in.read() << std::endl; //std::cout << "read system2 portal_in: " << system2->dut_inst->portal_in.read() << std::endl; } //std::cout << "stopping" << std::endl; + int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); sc_stop(); + //int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + std::cout << "Simulation Cycles from main.cpp = " << end_cycle - start_cycle << std::endl; delete system; delete system2; //AKB ADDED From 657eeb04101bc0c084a0a30fc501aa01c8e6c09c Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 7 Feb 2024 03:08:30 -0500 Subject: [PATCH 019/127] Added buffering support at portal module --- rad-sim/example-designs/add/add_driver.cpp | 2 +- rad-sim/example-designs/add/add_driver.hpp | 1 + rad-sim/example-designs/add/add_system.cpp | 2 + rad-sim/example-designs/add/add_system.hpp | 1 + rad-sim/example-designs/add/add_top.cpp | 1 + rad-sim/example-designs/add/add_top.hpp | 1 + rad-sim/example-designs/add/modules/adder.cpp | 32 ++++++++++++++ rad-sim/example-designs/add/modules/adder.hpp | 2 + .../example-designs/add/modules/portal.cpp | 43 ++++++++++++++++--- .../example-designs/add/modules/portal.hpp | 4 +- rad-sim/sim/design_context.cpp | 18 ++++---- rad-sim/sim/main.cpp | 9 +++- 12 files changed, 99 insertions(+), 17 deletions(-) diff --git a/rad-sim/example-designs/add/add_driver.cpp b/rad-sim/example-designs/add/add_driver.cpp index 0f07b9d..3f60f2a 100644 --- a/rad-sim/example-designs/add/add_driver.cpp +++ b/rad-sim/example-designs/add/add_driver.cpp @@ -57,7 +57,7 @@ void add_driver::source() { } void add_driver::sink() { - while (!response_valid.read()) { + while (!(response_valid.read() && portal_recvd.read())) { wait(); } std::cout << "Received " << response.read().to_uint64() << " sum from the adder!" << std::endl; diff --git a/rad-sim/example-designs/add/add_driver.hpp b/rad-sim/example-designs/add/add_driver.hpp index b7be3a5..8d8f8b2 100644 --- a/rad-sim/example-designs/add/add_driver.hpp +++ b/rad-sim/example-designs/add/add_driver.hpp @@ -24,6 +24,7 @@ class add_driver : public sc_module { sc_in client_ready; sc_in> response; sc_in response_valid; + sc_in portal_recvd; add_driver(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB ADDED last arg ~add_driver(); diff --git a/rad-sim/example-designs/add/add_system.cpp b/rad-sim/example-designs/add/add_system.cpp index adbe681..ca007ac 100644 --- a/rad-sim/example-designs/add/add_system.cpp +++ b/rad-sim/example-designs/add/add_system.cpp @@ -13,6 +13,7 @@ add_system::add_system(const sc_module_name &name, sc_clock *driver_clk_sig, RAD driver_inst->client_ready(client_ready_sig); driver_inst->response(response_sig); driver_inst->response_valid(response_valid_sig); + driver_inst->portal_recvd(portal_recvd_sig); // Instantiate design top-level dut_inst = new add_top("dut", radsim_design); //AKB added last arg @@ -23,6 +24,7 @@ add_system::add_system(const sc_module_name &name, sc_clock *driver_clk_sig, RAD dut_inst->client_ready(client_ready_sig); dut_inst->response(response_sig); dut_inst->response_valid(response_valid_sig); + dut_inst->portal_recvd(portal_recvd_sig); //AKB added: this->design_dut_inst = dut_inst; //dut_inst->portal_in(portal_in_sig); diff --git a/rad-sim/example-designs/add/add_system.hpp b/rad-sim/example-designs/add/add_system.hpp index 5cae6b9..5085ed8 100644 --- a/rad-sim/example-designs/add/add_system.hpp +++ b/rad-sim/example-designs/add/add_system.hpp @@ -14,6 +14,7 @@ class add_system : public design_system { sc_signal client_ready_sig; sc_signal> response_sig; sc_signal response_valid_sig; + sc_signal portal_recvd_sig; public: sc_signal rst_sig; diff --git a/rad-sim/example-designs/add/add_top.cpp b/rad-sim/example-designs/add/add_top.cpp index e3e2e93..930fef0 100644 --- a/rad-sim/example-designs/add/add_top.cpp +++ b/rad-sim/example-designs/add/add_top.cpp @@ -30,6 +30,7 @@ add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) portal_inst->portal_in(this->portal_in); //connecting portal's portal_in to the parent class system_top's portal_in portal_inst->portal_out(this->portal_out); this->top_axis_portal_interface = &(portal_inst->axis_add_portal_slave_interface); + portal_inst->portal_recvd(this->portal_recvd); radsim_design->BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add", "add.place", "add.clks"); //AKB changed to ptr deref and added first arg diff --git a/rad-sim/example-designs/add/add_top.hpp b/rad-sim/example-designs/add/add_top.hpp index a9cc223..f36b8dd 100644 --- a/rad-sim/example-designs/add/add_top.hpp +++ b/rad-sim/example-designs/add/add_top.hpp @@ -27,6 +27,7 @@ class add_top : public design_top { //AKB ADDED for portal module: //sc_in portal_in; //sc_out portal_out; + sc_out portal_recvd; add_top(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB ADDED last arg ~add_top(); diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index 1d84ed7..bdc7d14 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -3,6 +3,8 @@ adder::adder(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg : RADSimModule(name, radsim_design) { + this->radsim_design = radsim_design; + // Combinational logic and its sensitivity list SC_METHOD(Assign); sensitive << rst; @@ -32,6 +34,7 @@ void adder::Tick() { response.write(0); wait(); + bool sent_first_addend = false; // Always @ positive edge of the clock while (true) { // Receiving transaction from AXI-S interface @@ -44,6 +47,27 @@ void adder::Tick() { << axis_adder_interface.tuser.read().to_uint64() << ") (addend = " << axis_adder_interface.tdata.read().to_uint64() << ")!" << std::endl; + if (!sent_first_addend) { + std::cout << "Got here" << std::endl; + sent_first_addend = true; + std::string src_port_name = module_name + ".axis_adder_master_interface"; + std::string dst_port_name = "portal_inst.axis_add_portal_slave_interface"; + cout << axis_adder_interface.tdata.read().to_uint64() << endl; + uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref + uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref + + axis_adder_master_interface.tdest.write(dst_addr); + axis_adder_master_interface.tid.write(0); + axis_adder_master_interface.tstrb.write(0); + axis_adder_master_interface.tkeep.write(0); + axis_adder_master_interface.tuser.write(src_addr); + axis_adder_master_interface.tlast.write(true); //true bc only writing first addend + axis_adder_master_interface.tdata.write(axis_adder_interface.tdata.read().to_uint64()); + + axis_adder_master_interface.tvalid.write(true); + } else { + axis_adder_master_interface.tvalid.write(false); + } } // Print Sum and Exit @@ -64,4 +88,12 @@ void adder::RegisterModuleInfo() { port_name = module_name + ".axis_adder_interface"; RegisterAxisSlavePort(port_name, &axis_adder_interface, DATAW, 0); + + _num_noc_axis_slave_ports = 0; + _num_noc_axis_master_ports = 0; + _num_noc_aximm_slave_ports = 0; + _num_noc_aximm_master_ports = 0; + + port_name = module_name + ".axis_adder_master_interface"; + RegisterAxisMasterPort(port_name, &axis_adder_master_interface, DATAW, 0); } \ No newline at end of file diff --git a/rad-sim/example-designs/add/modules/adder.hpp b/rad-sim/example-designs/add/modules/adder.hpp index b563cee..38e9c47 100644 --- a/rad-sim/example-designs/add/modules/adder.hpp +++ b/rad-sim/example-designs/add/modules/adder.hpp @@ -16,11 +16,13 @@ class adder : public RADSimModule { sc_signal t_finished; // Signal flagging that the transaction has terminated public: + RADSimDesignContext* radsim_design; sc_in rst; sc_out response_valid; sc_out> response; // Interface to the NoC axis_slave_port axis_adder_interface; + axis_master_port axis_adder_master_interface; adder(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg ~adder(); diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 844a484..8d6fade 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -3,7 +3,11 @@ portal::portal(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg : RADSimModule(name, radsim_design) { - //maybe add combinational logic if applicable later + this->radsim_design = radsim_design; + + //combinational logic + SC_METHOD(Assign); + //sequential logic SC_CTHREAD(Tick, clk.pos()); // This function must be defined & called for any RAD-Sim module to register // its info for automatically connecting to the NoC @@ -13,25 +17,54 @@ portal::portal(const sc_module_name &name, RADSimDesignContext* radsim_design) / portal::~portal() {} -//void portal::Assign() { //combinational logic +void portal::Assign() { //combinational logic //maybe add reset signal later -//} + axis_add_portal_slave_interface.tready.write(true); +} int counter = 0; +sc_bv data_to_buffer = 0; +bool got_data = false; void portal::Tick() { //sequential logic portal_out.write(counter); + portal_recvd.write(0); wait(); //Always @ positive edge of clock while (true) { - if (counter == 0) { + /*if (counter == 0) { counter = 1; } else { counter = 0; } - portal_out.write(counter); + portal_out.write(counter);*/ //std::cout << module_name << ": Wire in is showing " << portal_in.read() << std::endl; //std::cout << counter << std::endl; + + /*std::cout << axis_add_portal_slave_interface.tvalid.read() << std::endl; + std::cout << axis_add_portal_slave_interface.tready.read() << std::endl;*/ + if (axis_add_portal_slave_interface.tvalid.read() && + axis_add_portal_slave_interface.tready.read()) { + std::cout << "Also got here" << std:: endl; + std::cout << "Add design " << module_name << ": Got Transaction (user = " + << axis_add_portal_slave_interface.tuser.read().to_uint64() << ") (addend = " + << axis_add_portal_slave_interface.tdata.read().to_uint64() << ")!" + << std::endl; + data_to_buffer = axis_add_portal_slave_interface.tdata.read(); + got_data = true; + } + if (got_data) { + std::cout << "counter : " << counter << std::endl; + if (counter == 3) { + counter = 0; + portal_out.write(data_to_buffer); + portal_recvd.write(1); + } + else { + counter++; + } + } + wait(); } } diff --git a/rad-sim/example-designs/add/modules/portal.hpp b/rad-sim/example-designs/add/modules/portal.hpp index 2acbcc1..bdc0494 100644 --- a/rad-sim/example-designs/add/modules/portal.hpp +++ b/rad-sim/example-designs/add/modules/portal.hpp @@ -13,8 +13,10 @@ class portal : public RADSimModule { private: public: + RADSimDesignContext* radsim_design; sc_in> portal_in; sc_out> portal_out; + sc_out portal_recvd; //Interfaces to the NoC axis_slave_port axis_add_portal_slave_interface; axis_master_port axis_add_portal_master_interface; @@ -22,7 +24,7 @@ class portal : public RADSimModule { portal(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg ~portal(); - //void Assign(); // Combinational logic process + void Assign(); // Combinational logic process void Tick(); // Sequential logic process SC_HAS_PROCESS(portal); void RegisterModuleInfo(); //even tho did not add AXI Interface, need because is virtual fn in derived class diff --git a/rad-sim/sim/design_context.cpp b/rad-sim/sim/design_context.cpp index e50fb3c..2f2208f 100644 --- a/rad-sim/sim/design_context.cpp +++ b/rad-sim/sim/design_context.cpp @@ -489,10 +489,10 @@ void RADSimDesignContext::ConnectModulesToNoC() { for (auto module_it = _design_modules.begin(); module_it != _design_modules.end(); module_it++) { RADSimModule *module_ptr = module_it->second; - std::cout << "MODULE " << module_ptr->name() << std::endl; + //std::cout << "MODULE " << module_ptr->name() << std::endl; // Connect AXI-S Slave ports of the module - std::cout << "AXI-S slave ports: " << std::endl; + //std::cout << "AXI-S slave ports: " << std::endl; //std::cout << module_ptr->_axis_slave_ports.begin()->first<< std::endl; for (auto slave_port_it = module_ptr->_axis_slave_ports.begin(); slave_port_it != module_ptr->_axis_slave_ports.end(); @@ -511,12 +511,12 @@ void RADSimDesignContext::ConnectModulesToNoC() { } // Connect AXI-S Master ports of the module - std::cout << "\nAXI-S master ports: "; + //std::cout << "\nAXI-S master ports: "; for (auto master_port_it = module_ptr->_axis_master_ports.begin(); master_port_it != module_ptr->_axis_master_ports.end(); master_port_it++) { std::string port_name = master_port_it->first; - std::cout << port_name << ", "; + //std::cout << port_name << ", "; unsigned int noc_id = std::get<0>(_port_placement[port_name]); _axis_signals[axis_signal_id].Connect( *(master_port_it->second), @@ -525,12 +525,12 @@ void RADSimDesignContext::ConnectModulesToNoC() { } // Connect AXI-MM Slave ports of the module - std::cout << "\nAXI-MM slave ports: "; + //std::cout << "\nAXI-MM slave ports: "; for (auto slave_port_it = module_ptr->_aximm_slave_ports.begin(); slave_port_it != module_ptr->_aximm_slave_ports.end(); slave_port_it++) { std::string port_name = slave_port_it->first; - std::cout << port_name << ", "; + //std::cout << port_name << ", "; unsigned int noc_id = std::get<0>(_port_placement[port_name]); _aximm_signals[aximm_signal_id].Connect( *(_noc_aximm_master_ports[noc_id][port_name]), @@ -539,19 +539,19 @@ void RADSimDesignContext::ConnectModulesToNoC() { } // Connect AXI-MM Master ports of the module - std::cout << "\nAXI-MM master ports: "; + //std::cout << "\nAXI-MM master ports: "; for (auto master_port_it = module_ptr->_aximm_master_ports.begin(); master_port_it != module_ptr->_aximm_master_ports.end(); master_port_it++) { std::string port_name = master_port_it->first; - std::cout << port_name << ", "; + //std::cout << port_name << ", "; unsigned int noc_id = std::get<0>(_port_placement[port_name]); _aximm_signals[aximm_signal_id].Connect( *(master_port_it->second), *(_noc_aximm_slave_ports[noc_id][port_name])); aximm_signal_id++; } - std::cout << "\n"; + //std::cout << "\n"; } } diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index ae6bbf8..d32444d 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -47,10 +47,17 @@ int sc_main(int argc, char *argv[]) { blackbox->ConnectRadPair(0, 1); int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + sc_bv<128> new_val; + sc_bv<128> old_val = system2->dut_inst->portal_in.read(); while (cluster->AllRADsNotDone()) { sc_start(1, SC_NS); //std::cout << "read system portal_in: " << system->dut_inst->portal_in.read() << std::endl; - //std::cout << "read system2 portal_in: " << system2->dut_inst->portal_in.read() << std::endl; + new_val = system2->dut_inst->portal_in.read(); + //if (val != 0) { + if (new_val != old_val) { //to ensure only displayed once + std::cout << "read system2 portal_in: " << new_val << std::endl; + old_val = new_val; + } } //std::cout << "stopping" << std::endl; int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); From f6463a0f584d4a0dfe6ad378ee41f920f8883d98 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 21 Feb 2024 03:11:41 -0500 Subject: [PATCH 020/127] Switch: added fifo-based data movement from rad 1 to 2, dynamic creation of multiple fifos --- rad-sim/sim/main.cpp | 4 +- rad-sim/sim/radsim_inter_rad.cpp | 71 +++++++++++++++++++++++++------- rad-sim/sim/radsim_inter_rad.hpp | 13 +++++- 3 files changed, 70 insertions(+), 18 deletions(-) diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index d32444d..77532a2 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -43,7 +43,9 @@ int sc_main(int argc, char *argv[]) { //AKB ADDED: cluster->StoreSystem(system); cluster->StoreSystem(system2); - RADSimInterRad* blackbox = new RADSimInterRad(cluster); + sc_clock *inter_rad_clk_sig = new sc_clock( + "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED, use same period as sim driver + RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); blackbox->ConnectRadPair(0, 1); int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 6a9da37..28bcc5f 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -1,27 +1,68 @@ #include -RADSimInterRad::RADSimInterRad(RADSimCluster* cluster) { +RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_clk, RADSimCluster* cluster) : sc_module(name) { this->cluster = cluster; - all_signals.init(cluster->num_rads); -} + this->clk(*inter_rad_clk); + all_signals.init(cluster->num_rads + 1); -RADSimInterRad::~RADSimInterRad() {} + for (int v = 0; v < cluster->num_rads; v++) { //width of vector = num of rads bc want fifo per rad + sc_fifo>* new_fifo_ptr = new sc_fifo>(NUM_SLOTS); + fifos.push_back(new_fifo_ptr); + } -void -RADSimInterRad::ConnectRadPair(int i, int j) { - /*sc_signal in_i_out_j; - sc_signal in_j_out_i; + SC_THREAD(writeFifo); + SC_THREAD(readFifo); - this->all_signals.push_back(&in_i_out_j); - this->all_signals.push_back(&in_j_out_i); +} - cluster->all_systems[i]->design_dut_inst->portal_in(in_i_out_j); - cluster->all_systems[i]->design_dut_inst->portal_out(in_j_out_i); - cluster->all_systems[j]->design_dut_inst->portal_in(in_j_out_i); - cluster->all_systems[j]->design_dut_inst->portal_out(in_i_out_j); */ +RADSimInterRad::~RADSimInterRad() { + for (int v = 0; v < this->cluster->num_rads; v++) { + delete fifos[v]; + } +} +void +RADSimInterRad::ConnectRadPair(int i, int j) { + //this works, commenting out to try manually writing to port cluster->all_systems[i]->design_dut_inst->portal_in(all_signals[0]); - cluster->all_systems[i]->design_dut_inst->portal_out(all_signals[1]); + //cluster->all_systems[i]->design_dut_inst->portal_out(all_signals[1]); + cluster->all_systems[i]->design_dut_inst->portal_out(all_signals[2]); //temp added extra signal just to bind cluster->all_systems[j]->design_dut_inst->portal_in(all_signals[1]); cluster->all_systems[j]->design_dut_inst->portal_out(all_signals[0]); +} + +bool wrote_yet = false; +void +RADSimInterRad::writeFifo() { + // Always @ positive edge of the clock + //wait(); + while (true) { + //testing fifo + //std::cout << "reached inter_rad " << std::endl; + //sc_bv curr_val = cluster->all_systems[0]->design_dut_inst->portal_out.read(); //this works, but try using signal instead + sc_bv curr_val = all_signals[2]; + std::cout << "inter_rad fifo free before write is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; + if ((curr_val != 0) && (!wrote_yet)) { + this->fifos[0]->write(curr_val); + std::cout << "inter_rad fifo free after write is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; + wrote_yet = true; + } + wait(1, SC_NS); //eventually change to 1.3, SC_US -- assuming 2.6 us / 2 latency for one piece of data + } +} + +void +RADSimInterRad::readFifo() { + // Always @ positive edge of the clock + while (true) { + std::cout << "inter_rad fifo free before READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; + + sc_bv val = this->fifos[0]->read(); + //std::cout << "inter_rad fifo data READ is " << this->fifos[0]->read() << std::endl; + std::cout << "inter_rad fifo data READ is " << val << std::endl; + all_signals[1].write(val); + + std::cout << "inter_rad fifo free after READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; + wait(1, SC_NS); //eventually change to 1.3, SC_US -- assuming 2.6 us / 2 latency for one piece of data + } } \ No newline at end of file diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index ec71944..9bbbf0f 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -6,18 +6,27 @@ #include #include #include +#include #define DATAW 128 +#define NUM_SLOTS 2 //number of fifo slots -class RADSimInterRad { //: public sc_module { +class RADSimInterRad : public sc_module { private: RADSimCluster* cluster; //std::vector> all_signals; sc_vector>> all_signals{"all_signals"}; + //sc_fifo> data_in_rad1 = sc_fifo>(2); //2 slots for now + //sc_vector>> switch_port_fifos{"switch_port_fifos"}; public: - RADSimInterRad(RADSimCluster* cluster); + sc_in clk; + std::vector>*> fifos; + RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_clk, RADSimCluster* cluster); ~RADSimInterRad(); void ConnectRadPair(int i, int j); /*sc_signal in_i_out_j; sc_signal in_j_out_i; */ + void writeFifo(); + void readFifo(); + SC_HAS_PROCESS(RADSimInterRad); }; \ No newline at end of file From cff094590a7615db0beda0aa078f7a55d25381da Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 21 Feb 2024 03:24:47 -0500 Subject: [PATCH 021/127] Switch: replaced blocking fifo read/write with non-blocking --- rad-sim/sim/radsim_inter_rad.cpp | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 28bcc5f..cf9fd1d 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -43,9 +43,11 @@ RADSimInterRad::writeFifo() { sc_bv curr_val = all_signals[2]; std::cout << "inter_rad fifo free before write is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; if ((curr_val != 0) && (!wrote_yet)) { - this->fifos[0]->write(curr_val); - std::cout << "inter_rad fifo free after write is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; - wrote_yet = true; + //this->fifos[0]->nb_write(curr_val); + if (this->fifos[0]->nb_write(curr_val) != false) { //there was an available slot to write to + std::cout << "inter_rad fifo free after write is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; + wrote_yet = true; + } } wait(1, SC_NS); //eventually change to 1.3, SC_US -- assuming 2.6 us / 2 latency for one piece of data } @@ -57,12 +59,18 @@ RADSimInterRad::readFifo() { while (true) { std::cout << "inter_rad fifo free before READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; - sc_bv val = this->fifos[0]->read(); + //sc_bv val = this->fifos[0]->read(); + + sc_bv val; + this->fifos[0]->nb_read(val); + //std::cout << "inter_rad fifo data READ is " << this->fifos[0]->read() << std::endl; - std::cout << "inter_rad fifo data READ is " << val << std::endl; - all_signals[1].write(val); + if (val != false) { + std::cout << "inter_rad fifo data READ is " << val << std::endl; + all_signals[1].write(val); + std::cout << "inter_rad fifo free after READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; + } - std::cout << "inter_rad fifo free after READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; wait(1, SC_NS); //eventually change to 1.3, SC_US -- assuming 2.6 us / 2 latency for one piece of data } } \ No newline at end of file From 296f219b3a2e9fa085b52ba7af4f9e1b42b23100 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 5 Mar 2024 22:25:37 -0500 Subject: [PATCH 022/127] Added and connected axi interfaces btween portal and add_top --- rad-sim/example-designs/add/add_top.cpp | 35 ++++++++++++++++++- rad-sim/example-designs/add/add_top.hpp | 6 ++++ .../example-designs/add/modules/portal.cpp | 15 ++++++-- .../example-designs/add/modules/portal.hpp | 5 ++- rad-sim/example-designs/mult/mult_top.cpp | 2 +- rad-sim/sim/design_top.hpp | 3 +- rad-sim/sim/radsim_inter_rad.cpp | 4 +-- 7 files changed, 61 insertions(+), 9 deletions(-) diff --git a/rad-sim/example-designs/add/add_top.cpp b/rad-sim/example-designs/add/add_top.cpp index 930fef0..9f6c040 100644 --- a/rad-sim/example-designs/add/add_top.cpp +++ b/rad-sim/example-designs/add/add_top.cpp @@ -29,9 +29,42 @@ add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) portal_inst = new portal(module_name, radsim_design); portal_inst->portal_in(this->portal_in); //connecting portal's portal_in to the parent class system_top's portal_in portal_inst->portal_out(this->portal_out); - this->top_axis_portal_interface = &(portal_inst->axis_add_portal_slave_interface); + //this->top_axis_portal_interface = &(portal_inst->axis_add_portal_slave_interface); portal_inst->portal_recvd(this->portal_recvd); + sig_portal_master_design_slave.Connect(portal_inst->portal_axis_master, this->design_top_portal_axis_slave); //Connect(axis_master_port &m, axis_slave_port &s) + sig_design_master_portal_slave.Connect(this->design_top_portal_axis_master, portal_inst->portal_axis_slave); + //master to slave port connections + /*portal_inst->portal_axis_master.tvalid(sig_portal_master_design_slave.tvalid); + portal_inst->portal_axis_master.tready(sig_portal_master_design_slave.tready); + portal_inst->portal_axis_master.tdata(sig_portal_master_design_slave.tdata); + portal_inst->portal_axis_master.tstrb(sig_portal_master_design_slave.tstrb); + portal_inst->portal_axis_master.tkeep(sig_portal_master_design_slave.tkeep); + portal_inst->portal_axis_master.tlast(sig_portal_master_design_slave.tlast); + portal_inst->portal_axis_master.tid(sig_portal_master_design_slave.tid); + portal_inst->portal_axis_master.tdest(sig_portal_master_design_slave.tdest); + portal_inst->portal_axis_master.tuser(sig_portal_master_design_slave.tuser);*/ + /*this->design_top_portal_axis_master.tvalid(sig_portal_master_design_slave.tvalid); + this->design_top_portal_axis_master.tready(sig_portal_master_design_slave.tready); + this->design_top_portal_axis_master.tdata(sig_portal_master_design_slave.tdata); + this->design_top_portal_axis_master.tstrb(sig_portal_master_design_slave.tstrb); + this->design_top_portal_axis_master.tkeep(sig_portal_master_design_slave.tkeep); + this->design_top_portal_axis_master.tlast(sig_portal_master_design_slave.tlast); + this->design_top_portal_axis_master.tid(sig_portal_master_design_slave.tid); + this->design_top_portal_axis_master.tdest(sig_portal_master_design_slave.tdest); + this->design_top_portal_axis_master.tuser(sig_portal_master_design_slave.tuser); + //slave to master port connections + this->design_top_portal_axis_slave.tvalid(sig_portal_master_design_slave.tvalid); + this->design_top_portal_axis_slave.tready(sig_portal_master_design_slave.tready); + this->design_top_portal_axis_slave.tdata(sig_portal_master_design_slave.tdata); + this->design_top_portal_axis_slave.tstrb(sig_portal_master_design_slave.tstrb); + this->design_top_portal_axis_slave.tkeep(sig_portal_master_design_slave.tkeep); + this->design_top_portal_axis_slave.tlast(sig_portal_master_design_slave.tlast); + this->design_top_portal_axis_slave.tid(sig_portal_master_design_slave.tid); + this->design_top_portal_axis_slave.tdest(sig_portal_master_design_slave.tdest); + this->design_top_portal_axis_slave.tuser(sig_portal_master_design_slave.tuser);*/ + //would need to repeat for other slave/master pair + radsim_design->BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add", "add.place", "add.clks"); //AKB changed to ptr deref and added first arg radsim_design->CreateSystemNoCs(rst); //AKB changed to ptr deref diff --git a/rad-sim/example-designs/add/add_top.hpp b/rad-sim/example-designs/add/add_top.hpp index f36b8dd..96688ff 100644 --- a/rad-sim/example-designs/add/add_top.hpp +++ b/rad-sim/example-designs/add/add_top.hpp @@ -7,6 +7,7 @@ #include #include #include //AKB ADDED +#include //AKB ADDED class add_top : public design_top { //class add_top : public sc_module { @@ -28,6 +29,11 @@ class add_top : public design_top { //sc_in portal_in; //sc_out portal_out; sc_out portal_recvd; + axis_slave_port design_top_portal_axis_slave; + axis_master_port design_top_portal_axis_master; + //adding axis connections to portal module + axis_signal sig_portal_master_design_slave; + axis_signal sig_design_master_portal_slave; add_top(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB ADDED last arg ~add_top(); diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 8d6fade..67c5ae7 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -27,6 +27,7 @@ sc_bv data_to_buffer = 0; bool got_data = false; void portal::Tick() { //sequential logic portal_out.write(counter); + //portal_out_axi.tdata.write(counter); portal_recvd.write(0); wait(); //Always @ positive edge of clock @@ -55,9 +56,11 @@ void portal::Tick() { //sequential logic } if (got_data) { std::cout << "counter : " << counter << std::endl; - if (counter == 3) { + //if (counter == 3) { + if (counter == 0) { //always send, do not buffer in portal module bc moved that to interrad now counter = 0; portal_out.write(data_to_buffer); + //portal_out_axi.tdata.write(data_to_buffer); portal_recvd.write(1); } else { @@ -82,12 +85,18 @@ void portal::RegisterModuleInfo() { //std::cout << port_name << std::endl; RegisterAxisSlavePort(port_name, &axis_add_portal_slave_interface, DATAW, 0); - _num_noc_axis_slave_ports = 0; + /*_num_noc_axis_slave_ports = 0; _num_noc_axis_master_ports = 0; _num_noc_aximm_slave_ports = 0; - _num_noc_aximm_master_ports = 0; + _num_noc_aximm_master_ports = 0;*/ port_name = module_name + ".axis_add_portal_master_interface"; RegisterAxisMasterPort(port_name, &axis_add_portal_master_interface, DATAW, 0); + /*port_name = module_name + ".portal_axis_master"; + RegisterAxisMasterPort(port_name, &portal_axis_master, DATAW, 0); + + port_name = module_name + ".portal_axis_slave"; + RegisterAxisSlavePort(port_name, &portal_axis_slave, DATAW, 0);*/ + } \ No newline at end of file diff --git a/rad-sim/example-designs/add/modules/portal.hpp b/rad-sim/example-designs/add/modules/portal.hpp index bdc0494..26b72c5 100644 --- a/rad-sim/example-designs/add/modules/portal.hpp +++ b/rad-sim/example-designs/add/modules/portal.hpp @@ -16,7 +16,10 @@ class portal : public RADSimModule { RADSimDesignContext* radsim_design; sc_in> portal_in; sc_out> portal_out; - sc_out portal_recvd; + //try adding axis_master_port for portal_out + axis_master_port portal_axis_master; + axis_slave_port portal_axis_slave; + sc_out portal_recvd; //for testing: flag so add_driver keeps simulation going until data is sent to mult module //Interfaces to the NoC axis_slave_port axis_add_portal_slave_interface; axis_master_port axis_add_portal_master_interface; diff --git a/rad-sim/example-designs/mult/mult_top.cpp b/rad-sim/example-designs/mult/mult_top.cpp index edd3faa..13e3b46 100644 --- a/rad-sim/example-designs/mult/mult_top.cpp +++ b/rad-sim/example-designs/mult/mult_top.cpp @@ -29,7 +29,7 @@ mult_top::mult_top(const sc_module_name &name, RADSimDesignContext* radsim_desig portal_inst = new portal_mult(module_name, radsim_design); portal_inst->portal_in(this->portal_in); //connecting portal's portal_in to the parent class system_top's portal_in portal_inst->portal_out(this->portal_out); - this->top_axis_portal_interface = &(portal_inst->axis_mult_portal_slave_interface); + //this->top_axis_portal_interface = &(portal_inst->axis_mult_portal_slave_interface); radsim_design->BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/mult", "mult.place", "mult.clks"); //AKB changed to ptr deref, added first arg diff --git a/rad-sim/sim/design_top.hpp b/rad-sim/sim/design_top.hpp index 483bcc1..b053466 100644 --- a/rad-sim/sim/design_top.hpp +++ b/rad-sim/sim/design_top.hpp @@ -9,5 +9,6 @@ class design_top : virtual public sc_module { public: sc_in> portal_in; sc_out> portal_out; - axis_slave_port* top_axis_portal_interface; + //axis_slave_port design_top_portal_axis_slave; //TODO: add back here, for now just directly putting into child class add_top + //axis_master_port design_top_portal_axis_master; }; \ No newline at end of file diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index cf9fd1d..d691d62 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -25,8 +25,8 @@ void RADSimInterRad::ConnectRadPair(int i, int j) { //this works, commenting out to try manually writing to port cluster->all_systems[i]->design_dut_inst->portal_in(all_signals[0]); - //cluster->all_systems[i]->design_dut_inst->portal_out(all_signals[1]); - cluster->all_systems[i]->design_dut_inst->portal_out(all_signals[2]); //temp added extra signal just to bind + cluster->all_systems[i]->design_dut_inst->portal_out(all_signals[1]); + //cluster->all_systems[i]->design_dut_inst->portal_out(all_signals[2]); //temp added extra signal just to bind cluster->all_systems[j]->design_dut_inst->portal_in(all_signals[1]); cluster->all_systems[j]->design_dut_inst->portal_out(all_signals[0]); } From f6e23aca5469b0795dd1b9266b66270fa1496eba Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 5 Mar 2024 23:30:50 -0500 Subject: [PATCH 023/127] Connected new axi interfaces between inter_rad, add design, mult design --- rad-sim/example-designs/add/add_top.cpp | 7 ++- rad-sim/example-designs/add/add_top.hpp | 6 +-- .../mult/modules/portal_mult.hpp | 3 ++ rad-sim/example-designs/mult/mult_top.cpp | 4 ++ rad-sim/sim/design_top.hpp | 4 +- rad-sim/sim/radsim_inter_rad.cpp | 43 +++++++++++++++++-- rad-sim/sim/radsim_inter_rad.hpp | 8 ++++ 7 files changed, 64 insertions(+), 11 deletions(-) diff --git a/rad-sim/example-designs/add/add_top.cpp b/rad-sim/example-designs/add/add_top.cpp index 9f6c040..844202e 100644 --- a/rad-sim/example-designs/add/add_top.cpp +++ b/rad-sim/example-designs/add/add_top.cpp @@ -32,8 +32,11 @@ add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) //this->top_axis_portal_interface = &(portal_inst->axis_add_portal_slave_interface); portal_inst->portal_recvd(this->portal_recvd); - sig_portal_master_design_slave.Connect(portal_inst->portal_axis_master, this->design_top_portal_axis_slave); //Connect(axis_master_port &m, axis_slave_port &s) - sig_design_master_portal_slave.Connect(this->design_top_portal_axis_master, portal_inst->portal_axis_slave); + //sig_portal_master_design_slave.Connect(portal_inst->portal_axis_master, this->design_top_portal_axis_slave); //Connect(axis_master_port &m, axis_slave_port &s) + //sig_design_master_portal_slave.Connect(this->design_top_portal_axis_master, portal_inst->portal_axis_slave); + //connect master to master instead, to expose to top + portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); + portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); //master to slave port connections /*portal_inst->portal_axis_master.tvalid(sig_portal_master_design_slave.tvalid); portal_inst->portal_axis_master.tready(sig_portal_master_design_slave.tready); diff --git a/rad-sim/example-designs/add/add_top.hpp b/rad-sim/example-designs/add/add_top.hpp index 96688ff..5ff561f 100644 --- a/rad-sim/example-designs/add/add_top.hpp +++ b/rad-sim/example-designs/add/add_top.hpp @@ -29,9 +29,9 @@ class add_top : public design_top { //sc_in portal_in; //sc_out portal_out; sc_out portal_recvd; - axis_slave_port design_top_portal_axis_slave; - axis_master_port design_top_portal_axis_master; - //adding axis connections to portal module + //axis_slave_port design_top_portal_axis_slave; + //axis_master_port design_top_portal_axis_master; + //adding axis connections to portal module -- no longer needed axis_signal sig_portal_master_design_slave; axis_signal sig_design_master_portal_slave; diff --git a/rad-sim/example-designs/mult/modules/portal_mult.hpp b/rad-sim/example-designs/mult/modules/portal_mult.hpp index dca5fda..f54a37f 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.hpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.hpp @@ -15,6 +15,9 @@ class portal_mult : public RADSimModule { public: sc_in> portal_in; sc_out> portal_out; + //try adding axis_master_port for portal_out + axis_master_port portal_axis_master; + axis_slave_port portal_axis_slave; //Interfaces to the NoC axis_slave_port axis_mult_portal_slave_interface; diff --git a/rad-sim/example-designs/mult/mult_top.cpp b/rad-sim/example-designs/mult/mult_top.cpp index 13e3b46..859b17f 100644 --- a/rad-sim/example-designs/mult/mult_top.cpp +++ b/rad-sim/example-designs/mult/mult_top.cpp @@ -31,6 +31,10 @@ mult_top::mult_top(const sc_module_name &name, RADSimDesignContext* radsim_desig portal_inst->portal_out(this->portal_out); //this->top_axis_portal_interface = &(portal_inst->axis_mult_portal_slave_interface); + //connect master to master instead, to expose to top + portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); + portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); + radsim_design->BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/mult", "mult.place", "mult.clks"); //AKB changed to ptr deref, added first arg radsim_design->CreateSystemNoCs(rst); //AKB changed to ptr deref diff --git a/rad-sim/sim/design_top.hpp b/rad-sim/sim/design_top.hpp index b053466..15a5188 100644 --- a/rad-sim/sim/design_top.hpp +++ b/rad-sim/sim/design_top.hpp @@ -9,6 +9,6 @@ class design_top : virtual public sc_module { public: sc_in> portal_in; sc_out> portal_out; - //axis_slave_port design_top_portal_axis_slave; //TODO: add back here, for now just directly putting into child class add_top - //axis_master_port design_top_portal_axis_master; + axis_slave_port design_top_portal_axis_slave; //TODO: add back here, for now just directly putting into child class add_top + axis_master_port design_top_portal_axis_master; }; \ No newline at end of file diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index d691d62..66790a9 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -8,7 +8,25 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c for (int v = 0; v < cluster->num_rads; v++) { //width of vector = num of rads bc want fifo per rad sc_fifo>* new_fifo_ptr = new sc_fifo>(NUM_SLOTS); fifos.push_back(new_fifo_ptr); + //adding to axi vectors + axis_signal* new_axis_signal = new axis_signal; + all_axis_master_signals.push_back(new_axis_signal); + new_axis_signal = new axis_signal; //second signal (one for master, one for slave) + all_axis_slave_signals.push_back(new_axis_signal); + axis_slave_port* new_axis_slave_port = new axis_slave_port; + all_axis_slave_ports.push_back(new_axis_slave_port); + axis_master_port* new_axis_master_port = new axis_master_port; + all_axis_master_ports.push_back(new_axis_master_port); } + //temp: doing outside of loop bc not ready yet + /*axis_signal* new_axis_signal = new axis_signal; + all_axis_signals.push_back(new_axis_signal); + new_axis_signal = new axis_signal; //second signal (one for master, one for slave) + all_axis_signals.push_back(new_axis_signal); + axis_slave_port* new_axis_slave_port = new axis_slave_port; + all_axis_slave_ports.push_back(new_axis_slave_port); + axis_master_port* new_axis_master_port = new axis_master_port; + all_axis_master_ports.push_back(new_axis_master_port);*/ SC_THREAD(writeFifo); SC_THREAD(readFifo); @@ -16,19 +34,36 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c } RADSimInterRad::~RADSimInterRad() { - for (int v = 0; v < this->cluster->num_rads; v++) { + int v; + for (v = 0; v < this->cluster->num_rads; v++) { delete fifos[v]; + delete all_axis_master_signals[v]; + delete all_axis_slave_signals[v]; + delete all_axis_slave_ports[v]; + delete all_axis_master_ports[v]; } + + //temp do manually + /*delete all_axis_signals[0]; + delete all_axis_signals[1]; + delete all_axis_slave_ports[0]; + delete all_axis_master_ports[0];*/ } void RADSimInterRad::ConnectRadPair(int i, int j) { - //this works, commenting out to try manually writing to port + //this works cluster->all_systems[i]->design_dut_inst->portal_in(all_signals[0]); - cluster->all_systems[i]->design_dut_inst->portal_out(all_signals[1]); - //cluster->all_systems[i]->design_dut_inst->portal_out(all_signals[2]); //temp added extra signal just to bind + //cluster->all_systems[i]->design_dut_inst->portal_out(all_signals[1]); //commenting out to demo sending data through fifo instead + cluster->all_systems[i]->design_dut_inst->portal_out(all_signals[2]); cluster->all_systems[j]->design_dut_inst->portal_in(all_signals[1]); cluster->all_systems[j]->design_dut_inst->portal_out(all_signals[0]); + //axi interfaces for adder design + all_axis_master_signals[i]->Connect(*(all_axis_master_ports[i]), cluster->all_systems[i]->design_dut_inst->design_top_portal_axis_slave); //Connect(axis_master_port &m, axis_slave_port &s) + all_axis_slave_signals[i]->Connect(cluster->all_systems[i]->design_dut_inst->design_top_portal_axis_master, *(all_axis_slave_ports[i])); //Connect(axis_master_port &m, axis_slave_port &s) + //axi interfaces for mult design + all_axis_master_signals[j]->Connect(*(all_axis_master_ports[j]), cluster->all_systems[j]->design_dut_inst->design_top_portal_axis_slave); //Connect(axis_master_port &m, axis_slave_port &s) + all_axis_slave_signals[j]->Connect(cluster->all_systems[j]->design_dut_inst->design_top_portal_axis_master, *(all_axis_slave_ports[j])); //Connect(axis_master_port &m, axis_slave_port &s) } bool wrote_yet = false; diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index 9bbbf0f..fd39120 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -7,6 +7,7 @@ #include #include #include +#include #define DATAW 128 #define NUM_SLOTS 2 //number of fifo slots @@ -21,6 +22,13 @@ class RADSimInterRad : public sc_module { public: sc_in clk; std::vector>*> fifos; + + //for axi interfaces + std::vector all_axis_master_signals; + std::vector all_axis_slave_signals; + std::vector all_axis_slave_ports; + std::vector all_axis_master_ports; + RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_clk, RADSimCluster* cluster); ~RADSimInterRad(); void ConnectRadPair(int i, int j); From a4f3f00f81247c0d3c7b0cc957a4c25cc3d3eb04 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 5 Mar 2024 23:33:38 -0500 Subject: [PATCH 024/127] Moved code to connect to axi into new function in radsim_inter_rad and call in main --- rad-sim/sim/main.cpp | 2 ++ rad-sim/sim/radsim_inter_rad.cpp | 8 ++++---- rad-sim/sim/radsim_inter_rad.hpp | 1 + 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 77532a2..e6f5871 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -47,6 +47,8 @@ int sc_main(int argc, char *argv[]) { "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED, use same period as sim driver RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); blackbox->ConnectRadPair(0, 1); + blackbox->ConnectRadAxi(0); + blackbox->ConnectRadAxi(1); int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); sc_bv<128> new_val; diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 66790a9..520e256 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -58,12 +58,12 @@ RADSimInterRad::ConnectRadPair(int i, int j) { cluster->all_systems[i]->design_dut_inst->portal_out(all_signals[2]); cluster->all_systems[j]->design_dut_inst->portal_in(all_signals[1]); cluster->all_systems[j]->design_dut_inst->portal_out(all_signals[0]); - //axi interfaces for adder design +} + +void +RADSimInterRad::ConnectRadAxi(int i) { all_axis_master_signals[i]->Connect(*(all_axis_master_ports[i]), cluster->all_systems[i]->design_dut_inst->design_top_portal_axis_slave); //Connect(axis_master_port &m, axis_slave_port &s) all_axis_slave_signals[i]->Connect(cluster->all_systems[i]->design_dut_inst->design_top_portal_axis_master, *(all_axis_slave_ports[i])); //Connect(axis_master_port &m, axis_slave_port &s) - //axi interfaces for mult design - all_axis_master_signals[j]->Connect(*(all_axis_master_ports[j]), cluster->all_systems[j]->design_dut_inst->design_top_portal_axis_slave); //Connect(axis_master_port &m, axis_slave_port &s) - all_axis_slave_signals[j]->Connect(cluster->all_systems[j]->design_dut_inst->design_top_portal_axis_master, *(all_axis_slave_ports[j])); //Connect(axis_master_port &m, axis_slave_port &s) } bool wrote_yet = false; diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index fd39120..72456e4 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -32,6 +32,7 @@ class RADSimInterRad : public sc_module { RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_clk, RADSimCluster* cluster); ~RADSimInterRad(); void ConnectRadPair(int i, int j); + void ConnectRadAxi(int i); /*sc_signal in_i_out_j; sc_signal in_j_out_i; */ void writeFifo(); From 2d03e27e5574f0c680a2755ca9312002923c65e3 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 6 Mar 2024 02:53:24 -0500 Subject: [PATCH 025/127] Using tuser to select destination for data, changed fifo to use new struct axis_fields --- rad-sim/example-designs/add/add_top.cpp | 33 +------------- .../example-designs/add/modules/portal.cpp | 8 +++- rad-sim/sim/main.cpp | 9 ++-- rad-sim/sim/radsim_inter_rad.cpp | 45 +++++++++++++------ rad-sim/sim/radsim_inter_rad.hpp | 16 ++++++- 5 files changed, 59 insertions(+), 52 deletions(-) diff --git a/rad-sim/example-designs/add/add_top.cpp b/rad-sim/example-designs/add/add_top.cpp index 844202e..3a6ccec 100644 --- a/rad-sim/example-designs/add/add_top.cpp +++ b/rad-sim/example-designs/add/add_top.cpp @@ -36,37 +36,8 @@ add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) //sig_design_master_portal_slave.Connect(this->design_top_portal_axis_master, portal_inst->portal_axis_slave); //connect master to master instead, to expose to top portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); - portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); - //master to slave port connections - /*portal_inst->portal_axis_master.tvalid(sig_portal_master_design_slave.tvalid); - portal_inst->portal_axis_master.tready(sig_portal_master_design_slave.tready); - portal_inst->portal_axis_master.tdata(sig_portal_master_design_slave.tdata); - portal_inst->portal_axis_master.tstrb(sig_portal_master_design_slave.tstrb); - portal_inst->portal_axis_master.tkeep(sig_portal_master_design_slave.tkeep); - portal_inst->portal_axis_master.tlast(sig_portal_master_design_slave.tlast); - portal_inst->portal_axis_master.tid(sig_portal_master_design_slave.tid); - portal_inst->portal_axis_master.tdest(sig_portal_master_design_slave.tdest); - portal_inst->portal_axis_master.tuser(sig_portal_master_design_slave.tuser);*/ - /*this->design_top_portal_axis_master.tvalid(sig_portal_master_design_slave.tvalid); - this->design_top_portal_axis_master.tready(sig_portal_master_design_slave.tready); - this->design_top_portal_axis_master.tdata(sig_portal_master_design_slave.tdata); - this->design_top_portal_axis_master.tstrb(sig_portal_master_design_slave.tstrb); - this->design_top_portal_axis_master.tkeep(sig_portal_master_design_slave.tkeep); - this->design_top_portal_axis_master.tlast(sig_portal_master_design_slave.tlast); - this->design_top_portal_axis_master.tid(sig_portal_master_design_slave.tid); - this->design_top_portal_axis_master.tdest(sig_portal_master_design_slave.tdest); - this->design_top_portal_axis_master.tuser(sig_portal_master_design_slave.tuser); - //slave to master port connections - this->design_top_portal_axis_slave.tvalid(sig_portal_master_design_slave.tvalid); - this->design_top_portal_axis_slave.tready(sig_portal_master_design_slave.tready); - this->design_top_portal_axis_slave.tdata(sig_portal_master_design_slave.tdata); - this->design_top_portal_axis_slave.tstrb(sig_portal_master_design_slave.tstrb); - this->design_top_portal_axis_slave.tkeep(sig_portal_master_design_slave.tkeep); - this->design_top_portal_axis_slave.tlast(sig_portal_master_design_slave.tlast); - this->design_top_portal_axis_slave.tid(sig_portal_master_design_slave.tid); - this->design_top_portal_axis_slave.tdest(sig_portal_master_design_slave.tdest); - this->design_top_portal_axis_slave.tuser(sig_portal_master_design_slave.tuser);*/ - //would need to repeat for other slave/master pair + //this->design_top_portal_axis_master.ConnectToPort(portal_inst->portal_axis_master); //portal module drives top + portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); //top drives portal bc top receives slave inputs radsim_design->BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add", "add.place", "add.clks"); //AKB changed to ptr deref and added first arg diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 67c5ae7..3bd9824 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -24,6 +24,7 @@ void portal::Assign() { //combinational logic int counter = 0; sc_bv data_to_buffer = 0; +sc_bv dest_device; //#define AXIS_USERW 66 bool got_data = false; void portal::Tick() { //sequential logic portal_out.write(counter); @@ -52,6 +53,7 @@ void portal::Tick() { //sequential logic << axis_add_portal_slave_interface.tdata.read().to_uint64() << ")!" << std::endl; data_to_buffer = axis_add_portal_slave_interface.tdata.read(); + dest_device = 1; got_data = true; } if (got_data) { @@ -59,8 +61,10 @@ void portal::Tick() { //sequential logic //if (counter == 3) { if (counter == 0) { //always send, do not buffer in portal module bc moved that to interrad now counter = 0; - portal_out.write(data_to_buffer); - //portal_out_axi.tdata.write(data_to_buffer); + //portal_out.write(data_to_buffer); //works but replace with axi + portal_axis_master.tdata.write(data_to_buffer); + portal_axis_master.tuser.write(dest_device); + std::cout << "portal.cpp in add design sent dest_device: " << dest_device.to_int64() << std::endl; portal_recvd.write(1); } else { diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index e6f5871..ddd7e51 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -56,14 +56,15 @@ int sc_main(int argc, char *argv[]) { while (cluster->AllRADsNotDone()) { sc_start(1, SC_NS); //std::cout << "read system portal_in: " << system->dut_inst->portal_in.read() << std::endl; - new_val = system2->dut_inst->portal_in.read(); + //new_val = system2->dut_inst->portal_in.read(); //works but replacing to test axi + new_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); //TODO: use handshaking properly //if (val != 0) { - if (new_val != old_val) { //to ensure only displayed once + //if (new_val != old_val) { //to ensure only displayed once std::cout << "read system2 portal_in: " << new_val << std::endl; old_val = new_val; - } + //} } - //std::cout << "stopping" << std::endl; + std::cout << "stopping" << std::endl; int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); sc_stop(); //int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 520e256..09419b8 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -1,12 +1,16 @@ #include +std::ostream& operator<<(std::ostream& os, const axis_fields& I) { + return os; +} + RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_clk, RADSimCluster* cluster) : sc_module(name) { this->cluster = cluster; this->clk(*inter_rad_clk); all_signals.init(cluster->num_rads + 1); for (int v = 0; v < cluster->num_rads; v++) { //width of vector = num of rads bc want fifo per rad - sc_fifo>* new_fifo_ptr = new sc_fifo>(NUM_SLOTS); + sc_fifo* new_fifo_ptr = new sc_fifo(NUM_SLOTS); fifos.push_back(new_fifo_ptr); //adding to axi vectors axis_signal* new_axis_signal = new axis_signal; @@ -75,12 +79,15 @@ RADSimInterRad::writeFifo() { //testing fifo //std::cout << "reached inter_rad " << std::endl; //sc_bv curr_val = cluster->all_systems[0]->design_dut_inst->portal_out.read(); //this works, but try using signal instead - sc_bv curr_val = all_signals[2]; - std::cout << "inter_rad fifo free before write is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; - if ((curr_val != 0) && (!wrote_yet)) { - //this->fifos[0]->nb_write(curr_val); - if (this->fifos[0]->nb_write(curr_val) != false) { //there was an available slot to write to - std::cout << "inter_rad fifo free after write is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; + //sc_bv curr_val = all_signals[2]; //works but replacing with axi + struct axis_fields curr_transaction; + curr_transaction.tdata = all_axis_slave_ports[0]->tdata.read(); //0 bc adder + curr_transaction.tuser = all_axis_slave_ports[0]->tuser.read(); + //std::cout << "inter_rad fifo free before write is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; + //if ((curr_val != 0) && (!wrote_yet)) { + if ((curr_transaction.tdata != 0) && (!wrote_yet)) { + if (this->fifos[0]->nb_write(curr_transaction) != false) { //there was an available slot to write to + //std::cout << "inter_rad fifo free after write is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; wrote_yet = true; } } @@ -92,20 +99,30 @@ void RADSimInterRad::readFifo() { // Always @ positive edge of the clock while (true) { - std::cout << "inter_rad fifo free before READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; + //std::cout << "inter_rad fifo free before READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; //sc_bv val = this->fifos[0]->read(); - sc_bv val; - this->fifos[0]->nb_read(val); + struct axis_fields read_from_fifo; + this->fifos[0]->nb_read(read_from_fifo); + sc_bv val = read_from_fifo.tdata; + int dest_device = read_from_fifo.tuser.to_int64(); //#define AXIS_USERW 66 + std::cout << "dest_device: " << dest_device << std::endl; //std::cout << "inter_rad fifo data READ is " << this->fifos[0]->read() << std::endl; if (val != false) { - std::cout << "inter_rad fifo data READ is " << val << std::endl; - all_signals[1].write(val); - std::cout << "inter_rad fifo free after READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; + //std::cout << "inter_rad fifo data READ is " << val << std::endl; + //all_signals[1].write(val); //works but replacing with axi + //all_axis_master_ports[1]->tdata.write(val); //1 bc sending to mult design + all_axis_master_signals[dest_device]->tdata.write(val); //works if write to either this or line above + //std::cout << "inter_rad fifo free after READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; } - + std::cout << "radsim_inter_rad value is (val): " << val << std::endl; + /*std::cout << "radsim_inter_rad value is (master_ports): " << all_axis_master_ports[1]->tdata.read() << std::endl; + std::cout << "radsim_inter_rad value is (master_signals): " << all_axis_master_signals[1]->tdata.read() << std::endl; + std::cout << "radsim_inter_rad value is (dut_inst): " << cluster->all_systems[1]->design_dut_inst->design_top_portal_axis_slave.tdata.read() << std::endl; + */ + wait(1, SC_NS); //eventually change to 1.3, SC_US -- assuming 2.6 us / 2 latency for one piece of data } } \ No newline at end of file diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index 72456e4..3f9b742 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -12,6 +12,19 @@ #define DATAW 128 #define NUM_SLOTS 2 //number of fifo slots +struct axis_fields { + bool tvalid; + bool tready; + sc_bv tdata; + sc_bv tstrb; + sc_bv tkeep; + bool tlast; + sc_bv tid; + sc_bv tdest; + sc_bv tuser; + friend std::ostream& operator<<(std::ostream& os, const axis_fields& I); +}; + class RADSimInterRad : public sc_module { private: RADSimCluster* cluster; @@ -21,7 +34,8 @@ class RADSimInterRad : public sc_module { //sc_vector>> switch_port_fifos{"switch_port_fifos"}; public: sc_in clk; - std::vector>*> fifos; + //std::vector>*> fifos; //works but replacing with struct elems + std::vector*> fifos; //for axi interfaces std::vector all_axis_master_signals; From ab63db574f0b35a02fcd22a6bdba4887731e0e23 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 6 Mar 2024 02:57:49 -0500 Subject: [PATCH 026/127] Commented to explain struct friend function --- rad-sim/sim/radsim_inter_rad.cpp | 18 +----------------- rad-sim/sim/radsim_inter_rad.hpp | 1 + 2 files changed, 2 insertions(+), 17 deletions(-) diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 09419b8..2d2ab71 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -1,7 +1,7 @@ #include std::ostream& operator<<(std::ostream& os, const axis_fields& I) { - return os; + return os; //needed to create sc_fifo of custom struct type } RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_clk, RADSimCluster* cluster) : sc_module(name) { @@ -22,16 +22,6 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c axis_master_port* new_axis_master_port = new axis_master_port; all_axis_master_ports.push_back(new_axis_master_port); } - //temp: doing outside of loop bc not ready yet - /*axis_signal* new_axis_signal = new axis_signal; - all_axis_signals.push_back(new_axis_signal); - new_axis_signal = new axis_signal; //second signal (one for master, one for slave) - all_axis_signals.push_back(new_axis_signal); - axis_slave_port* new_axis_slave_port = new axis_slave_port; - all_axis_slave_ports.push_back(new_axis_slave_port); - axis_master_port* new_axis_master_port = new axis_master_port; - all_axis_master_ports.push_back(new_axis_master_port);*/ - SC_THREAD(writeFifo); SC_THREAD(readFifo); @@ -46,12 +36,6 @@ RADSimInterRad::~RADSimInterRad() { delete all_axis_slave_ports[v]; delete all_axis_master_ports[v]; } - - //temp do manually - /*delete all_axis_signals[0]; - delete all_axis_signals[1]; - delete all_axis_slave_ports[0]; - delete all_axis_master_ports[0];*/ } void diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index 3f9b742..7a5648d 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -22,6 +22,7 @@ struct axis_fields { sc_bv tid; sc_bv tdest; sc_bv tuser; + //needed to create sc_fifo of custom struct type friend std::ostream& operator<<(std::ostream& os, const axis_fields& I); }; From e49ebbde9340329713938d214feab8bb590bb2da Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 13 Mar 2024 00:40:55 -0400 Subject: [PATCH 027/127] Substantial reworking to receive addends from add RAD and multiply on mult RAD through add module -> RAD0 NoC -> Portal -> interRAD -> portal_mult -> RAD1 NoC -> mult, plus handshaking, rising edge detect, etc --- rad-sim/CMakeLists.txt | 7 +- rad-sim/config.py | 41 +- rad-sim/example-designs/CMakeLists.txt | 9 +- rad-sim/example-designs/add/add_driver.cpp | 2 +- rad-sim/example-designs/add/modules/adder.cpp | 18 +- .../example-designs/add/modules/portal.cpp | 21 +- .../mult/modules/client_mult.cpp | 6 +- rad-sim/example-designs/mult/modules/mult.cpp | 7 +- rad-sim/example-designs/mult/modules/mult.hpp | 2 + .../mult/modules/portal_mult.cpp | 52 +- .../mult/modules/portal_mult.hpp | 5 +- rad-sim/example-designs/mult/mult_driver.cpp | 5 +- rad-sim/example-designs/mult/mult_driver.hpp | 1 + rad-sim/example-designs/mult/mult_system.cpp | 2 + rad-sim/example-designs/mult/mult_system.hpp | 1 + rad-sim/example-designs/mult/mult_top.cpp | 2 + rad-sim/example-designs/mult/mult_top.hpp | 1 + rad-sim/sim/dram/DRAMsim3/Makefile | 523 +++++++++++++++++- rad-sim/sim/main.cpp | 6 +- rad-sim/sim/radsim_inter_rad.cpp | 42 +- rad-sim/sim/radsim_inter_rad.hpp | 2 +- 21 files changed, 659 insertions(+), 96 deletions(-) diff --git a/rad-sim/CMakeLists.txt b/rad-sim/CMakeLists.txt index 1bd5738..c5a86b2 100644 --- a/rad-sim/CMakeLists.txt +++ b/rad-sim/CMakeLists.txt @@ -5,8 +5,11 @@ project(RADSim) set(CMAKE_BINARY_DIR "./build/") set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}) -SET(DESIGN "dlrm" CACHE STRING "Design directory to be compiled. Must be under rad-flow/rad-sim/example-designs") -message(STATUS "Compiling the ${DESIGN} design") +#SET(DESIGN "dlrm" CACHE STRING "Design directory to be compiled. Must be under rad-flow/rad-sim/example-designs") +FOREACH(DESIGN_NAME ${DESIGN_NAMES}) + #MESSAGE("<<${DESIGN_NAME}>>") + message(STATUS "Compiling the ${DESIGN_NAME} design") +ENDFOREACH() add_subdirectory(sim) add_subdirectory(example-designs) diff --git a/rad-sim/config.py b/rad-sim/config.py index 91f1745..8aa4490 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -323,20 +323,23 @@ def generate_radsim_main(design_name): main_cpp_file.write("}\n") def prepare_build_dir(design_names): - if os.path.isdir("build_akb_test"): - shutil.rmtree("build_akb_test", ignore_errors=True) - os.makedirs("build_akb_test") - #os.system("cd build_akb_test; cmake -DDESIGN:STRING=" + design_name + " ..; cd ..;") - os.system("cd build_akb_test;") + if os.path.isdir("build"): + shutil.rmtree("build", ignore_errors=True) + os.makedirs("build") + #os.system("cd build; cmake -DDESIGN:STRING=" + design_name + " ..; cd ..;") + #os.system("cd build;") semicol_sep_design_names = '' - flag_first_design = True + count = 0 + count_max = len(design_names) for design_name in design_names: semicol_sep_design_names += design_name - if not flag_first_design: + if count < count_max-1: semicol_sep_design_names += ';' - flag_first_design = False - os.system("cmake -DDESIGN_NAMES=" + semicol_sep_design_names + " ..;") - os.system("cd ..;") + count = count+1 + #print("cmake -DDESIGN_NAMES=\"" + semicol_sep_design_names + "\" ..;") + os.system("cd build; cmake -DDESIGN_NAMES=\"" + semicol_sep_design_names + "\" ..; cd .;") + #os.system("cd build; cmake -DDESIGN:STRING=\"" + 'add' + "\" ..; cd .;") + #os.system("cd ..;") # Get design name from command line argument if len(sys.argv) < 2: @@ -358,7 +361,7 @@ def prepare_build_dir(design_names): config_filename = "uni_config.yml" # List default parameter values -booksim_params = { +'''booksim_params = { "radsim_root_dir": os.getcwd(), "noc_type": "2d", "noc_num_nocs": 1, @@ -423,17 +426,17 @@ def prepare_build_dir(design_names): "cluster_topology":["all-to-all"], "cluster_connection_model":["wire"] -} +}''' # Parse configuration file -parse_config_file(config_filename, booksim_params, radsim_header_params, radsim_knobs) -print_config(booksim_params, radsim_header_params, radsim_knobs) +#parse_config_file(config_filename, booksim_params, radsim_header_params, radsim_knobs) +#print_config(booksim_params, radsim_header_params, radsim_knobs) # Generate RAD-Sim input files -'''generate_booksim_config_files(booksim_params, radsim_header_params, radsim_knobs) -generate_radsim_params_header(radsim_header_params) -generate_radsim_config_file(radsim_knobs) -generate_radsim_main(design_name) +#generate_booksim_config_files(booksim_params, radsim_header_params, radsim_knobs) +#generate_radsim_params_header(radsim_header_params) +#generate_radsim_config_file(radsim_knobs) +#generate_radsim_main(design_name) prepare_build_dir(design_names) -print("RAD-Sim was configured successfully!")''' \ No newline at end of file +print("RAD-Sim was configured successfully!") \ No newline at end of file diff --git a/rad-sim/example-designs/CMakeLists.txt b/rad-sim/example-designs/CMakeLists.txt index a8d080a..3274304 100644 --- a/rad-sim/example-designs/CMakeLists.txt +++ b/rad-sim/example-designs/CMakeLists.txt @@ -1,5 +1,10 @@ cmake_minimum_required(VERSION 3.16) find_package(SystemCLanguage CONFIG REQUIRED) -add_subdirectory(add) -add_subdirectory(mult) \ No newline at end of file +#add_subdirectory(add) +#add_subdirectory(mult) + +FOREACH(DESIGN_NAME ${DESIGN_NAMES}) + MESSAGE("<<${DESIGN_NAME}>>") + add_subdirectory(${DESIGN_NAME}) +ENDFOREACH() \ No newline at end of file diff --git a/rad-sim/example-designs/add/add_driver.cpp b/rad-sim/example-designs/add/add_driver.cpp index 3f60f2a..0c53bfa 100644 --- a/rad-sim/example-designs/add/add_driver.cpp +++ b/rad-sim/example-designs/add/add_driver.cpp @@ -1,6 +1,6 @@ #include -#define NUM_ADDENDS 3 +#define NUM_ADDENDS 5 //3 add_driver::add_driver(const sc_module_name &name, RADSimDesignContext* radsim_design) : sc_module(name) { diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index bdc7d14..9d14e90 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -34,7 +34,8 @@ void adder::Tick() { response.write(0); wait(); - bool sent_first_addend = false; + int count_sent_addends = 0; + int total_num_addends = 10; // Always @ positive edge of the clock while (true) { // Receiving transaction from AXI-S interface @@ -47,27 +48,24 @@ void adder::Tick() { << axis_adder_interface.tuser.read().to_uint64() << ") (addend = " << axis_adder_interface.tdata.read().to_uint64() << ")!" << std::endl; - if (!sent_first_addend) { - std::cout << "Got here" << std::endl; - sent_first_addend = true; + std::cout << "Sending the " << count_sent_addends << "th addend over NoC to portal module " << std::endl; + count_sent_addends++; std::string src_port_name = module_name + ".axis_adder_master_interface"; std::string dst_port_name = "portal_inst.axis_add_portal_slave_interface"; cout << axis_adder_interface.tdata.read().to_uint64() << endl; uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref - axis_adder_master_interface.tdest.write(dst_addr); axis_adder_master_interface.tid.write(0); axis_adder_master_interface.tstrb.write(0); axis_adder_master_interface.tkeep.write(0); axis_adder_master_interface.tuser.write(src_addr); - axis_adder_master_interface.tlast.write(true); //true bc only writing first addend + axis_adder_master_interface.tlast.write(axis_adder_interface.tlast.read()); //true only for last addend axis_adder_master_interface.tdata.write(axis_adder_interface.tdata.read().to_uint64()); - axis_adder_master_interface.tvalid.write(true); - } else { - axis_adder_master_interface.tvalid.write(false); - } + } + else { + axis_adder_master_interface.tvalid.write(false); } // Print Sum and Exit diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 3bd9824..ea2a650 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -48,29 +48,32 @@ void portal::Tick() { //sequential logic if (axis_add_portal_slave_interface.tvalid.read() && axis_add_portal_slave_interface.tready.read()) { std::cout << "Also got here" << std:: endl; - std::cout << "Add design " << module_name << ": Got Transaction (user = " + std::cout << "Add design sending data over portal module " << module_name << ": Got Transaction (user = " << axis_add_portal_slave_interface.tuser.read().to_uint64() << ") (addend = " << axis_add_portal_slave_interface.tdata.read().to_uint64() << ")!" << std::endl; data_to_buffer = axis_add_portal_slave_interface.tdata.read(); - dest_device = 1; + dest_device = 1; //for testing, fixed at 1 to send to RAD1 which has mult design got_data = true; - } - if (got_data) { - std::cout << "counter : " << counter << std::endl; + //} + //if (got_data) { + //std::cout << "counter : " << counter << std::endl; //if (counter == 3) { - if (counter == 0) { //always send, do not buffer in portal module bc moved that to interrad now - counter = 0; + //if (counter == 0) { //always send, do not buffer in portal module bc moved that to interrad now + // counter = 0; //portal_out.write(data_to_buffer); //works but replace with axi portal_axis_master.tdata.write(data_to_buffer); portal_axis_master.tuser.write(dest_device); + portal_axis_master.tvalid.write(true); + portal_axis_master.tlast.write(axis_add_portal_slave_interface.tlast.read()); std::cout << "portal.cpp in add design sent dest_device: " << dest_device.to_int64() << std::endl; portal_recvd.write(1); } else { - counter++; + //counter++; + portal_axis_master.tvalid.write(false); } - } + //} wait(); } diff --git a/rad-sim/example-designs/mult/modules/client_mult.cpp b/rad-sim/example-designs/mult/modules/client_mult.cpp index 488109b..c4acfed 100644 --- a/rad-sim/example-designs/mult/modules/client_mult.cpp +++ b/rad-sim/example-designs/mult/modules/client_mult.cpp @@ -55,7 +55,7 @@ void client_mult::Tick() { // Sending transactions to AXI-S NoC if (!client_tdata_fifo.empty()) { sc_bv tdata = client_tdata_fifo.front(); - std::string dst_port_name = "mult_inst.axis_mult_interface"; + /*std::string dst_port_name = "mult_inst.axis_mult_interface"; uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref @@ -73,9 +73,9 @@ void client_mult::Tick() { } if (axis_client_interface.tvalid.read() && - axis_client_interface.tready.read()) { + axis_client_interface.tready.read()) {*/ client_tdata_fifo.pop(); - std::cout << module_name << ": Sent Transaction!" << std::endl; + //std::cout << module_name << ": Sent Transaction!" << std::endl; } wait(); } diff --git a/rad-sim/example-designs/mult/modules/mult.cpp b/rad-sim/example-designs/mult/modules/mult.cpp index 67b9dd7..61ab8f7 100644 --- a/rad-sim/example-designs/mult/modules/mult.cpp +++ b/rad-sim/example-designs/mult/modules/mult.cpp @@ -2,6 +2,8 @@ mult::mult(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg : RADSimModule(name, radsim_design) { + + this->radsim_design = radsim_design; // Combinational logic and its sensitivity list SC_METHOD(Assign); @@ -37,8 +39,8 @@ void mult::Tick() { // Receiving transaction from AXI-S interface if (axis_mult_interface.tvalid.read() && axis_mult_interface.tready.read()) { - uint64_t current_product = mult_rolling_product.to_uint64(); - mult_rolling_product = current_product * axis_mult_interface.tdata.read().to_uint64(); + uint64_t current_product = mult_rolling_product.to_uint64(); //removing for experiment + mult_rolling_product = current_product * axis_mult_interface.tdata.read().to_uint64(); //removing for experiment t_finished.write(axis_mult_interface.tlast.read()); std::cout << module_name << ": Got Transaction (user = " << axis_mult_interface.tuser.read().to_uint64() << ") (factor = " @@ -50,6 +52,7 @@ void mult::Tick() { if (t_finished.read()) { response_valid.write(1); response.write(mult_rolling_product); + //mult_inter_rad_recvd.write(1); //maybe not needed if using the } wait(); } diff --git a/rad-sim/example-designs/mult/modules/mult.hpp b/rad-sim/example-designs/mult/modules/mult.hpp index 77cd7d6..9e44525 100644 --- a/rad-sim/example-designs/mult/modules/mult.hpp +++ b/rad-sim/example-designs/mult/modules/mult.hpp @@ -16,9 +16,11 @@ class mult : public RADSimModule { sc_signal t_finished; // Signal flagging that the transaction has terminated public: + RADSimDesignContext* radsim_design; sc_in rst; sc_out response_valid; sc_out> response; + sc_out mult_inter_rad_recvd; // Interface to the NoC axis_slave_port axis_mult_interface; diff --git a/rad-sim/example-designs/mult/modules/portal_mult.cpp b/rad-sim/example-designs/mult/modules/portal_mult.cpp index 6ba64df..dd8f76d 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.cpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.cpp @@ -3,17 +3,31 @@ portal_mult::portal_mult(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg : RADSimModule(name, radsim_design) { + this->radsim_design = radsim_design; + + // Combinational logic and its sensitivity list + SC_METHOD(Assign); + sensitive << rst; + //maybe add combinational logic if applicable later SC_CTHREAD(Tick, clk.pos()); + reset_signal_is(rst, true); // Reset is active high this->RegisterModuleInfo(); //can comment out if not connecting to NoC } portal_mult::~portal_mult() {} -/*void portal::Assign() { //combinational logic - //maybe add reset signal later -}*/ +void portal_mult::Assign() { //combinational logic + if (rst) { + portal_axis_slave.tready.write(false); + axis_mult_portal_slave_interface.tready.write(false); + } else { + // Always ready to accept the transaction + portal_axis_slave.tready.write(true); + axis_mult_portal_slave_interface.tready.write(true); + } +} int counter_mult = 0; void portal_mult::Tick() { //sequential logic @@ -21,6 +35,34 @@ void portal_mult::Tick() { //sequential logic wait(); //Always @ positive edge of clock while (true) { + // Receiving transaction from AXI-S interface + if (portal_axis_slave.tvalid.read() && + portal_axis_slave.tready.read()) { + //read + std::cout << module_name << ": Portal_Mult Module Got Transaction (user (in this case, this device ID) = " + << portal_axis_slave.tuser.read().to_uint64() << ") (addend = " + << portal_axis_slave.tdata.read().to_uint64() << ")!" + << std::endl; + //TODO: write the addend into the mult module and that will flag when received all values and can end simulation + std::string src_port_name = module_name + ".axis_mult_portal_master_interface"; + std::string dst_port_name = "mult_inst.axis_mult_interface"; + uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref + uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref + axis_mult_portal_master_interface.tdest.write(dst_addr); + axis_mult_portal_master_interface.tid.write(0); + axis_mult_portal_master_interface.tstrb.write(0); + axis_mult_portal_master_interface.tkeep.write(0); + axis_mult_portal_master_interface.tuser.write(src_addr); + axis_mult_portal_master_interface.tlast.write(portal_axis_slave.tlast.read()); + axis_mult_portal_master_interface.tdata.write(portal_axis_slave.tdata.read()); + axis_mult_portal_master_interface.tvalid.write(true); + } + else { + axis_mult_portal_master_interface.tvalid.write(false); + } + + + //added earlier for testing: writing alternating 0s and 1s to send data directly back to RAD0 with add design if (counter_mult == 0) { counter_mult = 1; } @@ -45,4 +87,8 @@ void portal_mult::RegisterModuleInfo() { port_name = module_name + ".axis_mult_portal_slave_interface"; //std::cout << port_name << std::endl; RegisterAxisSlavePort(port_name, &axis_mult_portal_slave_interface, DATAW, 0); + + port_name = module_name + ".axis_mult_portal_master_interface"; + //std::cout << port_name << std::endl; + RegisterAxisMasterPort(port_name, &axis_mult_portal_master_interface, DATAW, 0); } \ No newline at end of file diff --git a/rad-sim/example-designs/mult/modules/portal_mult.hpp b/rad-sim/example-designs/mult/modules/portal_mult.hpp index f54a37f..cf78075 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.hpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.hpp @@ -13,6 +13,8 @@ class portal_mult : public RADSimModule { private: public: + RADSimDesignContext* radsim_design; + sc_in rst; sc_in> portal_in; sc_out> portal_out; //try adding axis_master_port for portal_out @@ -20,11 +22,12 @@ class portal_mult : public RADSimModule { axis_slave_port portal_axis_slave; //Interfaces to the NoC axis_slave_port axis_mult_portal_slave_interface; + axis_master_port axis_mult_portal_master_interface; portal_mult(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg ~portal_mult(); - //void Assign(); // Combinational logic process + void Assign(); // Combinational logic process void Tick(); // Sequential logic process SC_HAS_PROCESS(portal_mult); void RegisterModuleInfo(); //even tho did not add AXI Interface, need because is virtual fn in derived class diff --git a/rad-sim/example-designs/mult/mult_driver.cpp b/rad-sim/example-designs/mult/mult_driver.cpp index 43e6271..fa0fad1 100644 --- a/rad-sim/example-designs/mult/mult_driver.cpp +++ b/rad-sim/example-designs/mult/mult_driver.cpp @@ -1,6 +1,6 @@ #include -#define NUM_ADDENDS 3 +#define NUM_ADDENDS 5 mult_driver::mult_driver(const sc_module_name &name, RADSimDesignContext* radsim_design) : sc_module(name) { @@ -57,7 +57,8 @@ void mult_driver::source() { } void mult_driver::sink() { - while (!response_valid.read()) { + //works, temp commented out to test, returned now + while (!(response_valid.read())) { //&& mult_inter_rad_recvd.read())) { wait(); } std::cout << "Received " << response.read().to_uint64() << " product from the multiplier!" << std::endl; diff --git a/rad-sim/example-designs/mult/mult_driver.hpp b/rad-sim/example-designs/mult/mult_driver.hpp index f788bc9..e254df3 100644 --- a/rad-sim/example-designs/mult/mult_driver.hpp +++ b/rad-sim/example-designs/mult/mult_driver.hpp @@ -24,6 +24,7 @@ class mult_driver : public sc_module { sc_in client_ready; sc_in> response; sc_in response_valid; + sc_in mult_inter_rad_recvd; mult_driver(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB ADDED last arg ~mult_driver(); diff --git a/rad-sim/example-designs/mult/mult_system.cpp b/rad-sim/example-designs/mult/mult_system.cpp index 52c1c4a..f17a3f7 100644 --- a/rad-sim/example-designs/mult/mult_system.cpp +++ b/rad-sim/example-designs/mult/mult_system.cpp @@ -13,6 +13,7 @@ mult_system::mult_system(const sc_module_name &name, sc_clock *driver_clk_sig, R driver_inst->client_ready(client_ready_sig); driver_inst->response(response_sig); driver_inst->response_valid(response_valid_sig); + driver_inst->mult_inter_rad_recvd(mult_inter_rad_recvd_sig); // Instantiate design top-level dut_inst = new mult_top("dut", radsim_design); //AKB added last arg @@ -25,6 +26,7 @@ mult_system::mult_system(const sc_module_name &name, sc_clock *driver_clk_sig, R dut_inst->response_valid(response_valid_sig); //AKB added: this->design_dut_inst = dut_inst; + dut_inst->mult_inter_rad_recvd(mult_inter_rad_recvd_sig); //dut_inst->portal_in(portal_in_sig); //dut_inst->portal_out(portal_out_sig); } diff --git a/rad-sim/example-designs/mult/mult_system.hpp b/rad-sim/example-designs/mult/mult_system.hpp index e43a658..7561f85 100644 --- a/rad-sim/example-designs/mult/mult_system.hpp +++ b/rad-sim/example-designs/mult/mult_system.hpp @@ -14,6 +14,7 @@ class mult_system : public design_system { sc_signal client_ready_sig; sc_signal> response_sig; sc_signal response_valid_sig; + sc_signal mult_inter_rad_recvd_sig; public: sc_signal rst_sig; diff --git a/rad-sim/example-designs/mult/mult_top.cpp b/rad-sim/example-designs/mult/mult_top.cpp index 859b17f..81e2bea 100644 --- a/rad-sim/example-designs/mult/mult_top.cpp +++ b/rad-sim/example-designs/mult/mult_top.cpp @@ -22,6 +22,7 @@ mult_top::mult_top(const sc_module_name &name, RADSimDesignContext* radsim_desig mult_inst->rst(rst); mult_inst->response(response); mult_inst->response_valid(response_valid); + mult_inst->mult_inter_rad_recvd(this->mult_inter_rad_recvd); //AKB: added code block for portal module module_name_str = "portal_inst"; @@ -29,6 +30,7 @@ mult_top::mult_top(const sc_module_name &name, RADSimDesignContext* radsim_desig portal_inst = new portal_mult(module_name, radsim_design); portal_inst->portal_in(this->portal_in); //connecting portal's portal_in to the parent class system_top's portal_in portal_inst->portal_out(this->portal_out); + portal_inst->rst(rst); //this->top_axis_portal_interface = &(portal_inst->axis_mult_portal_slave_interface); //connect master to master instead, to expose to top diff --git a/rad-sim/example-designs/mult/mult_top.hpp b/rad-sim/example-designs/mult/mult_top.hpp index 6a473d7..6c25fb8 100644 --- a/rad-sim/example-designs/mult/mult_top.hpp +++ b/rad-sim/example-designs/mult/mult_top.hpp @@ -27,6 +27,7 @@ class mult_top : public design_top { //AKB ADDED for portal module: //sc_in portal_in; //sc_out portal_out; + sc_out mult_inter_rad_recvd; mult_top(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB ADDED last arg ~mult_top(); diff --git a/rad-sim/sim/dram/DRAMsim3/Makefile b/rad-sim/sim/dram/DRAMsim3/Makefile index 130f7b5..0cec52b 100644 --- a/rad-sim/sim/dram/DRAMsim3/Makefile +++ b/rad-sim/sim/dram/DRAMsim3/Makefile @@ -1,43 +1,510 @@ -# ONLY use this makefile if you do NOT have a cmake 3.0+ version +# CMAKE generated file: DO NOT EDIT! +# Generated by "Unix Makefiles" Generator, CMake Version 3.16 -CC=gcc -CXX=g++ +# Default target executed when no arguments are given to make. +default_target: all -FMT_LIB_DIR=ext/fmt/include -INI_LIB_DIR=ext/headers -JSON_LIB_DIR=ext/headers -ARGS_LIB_DIR=ext/headers +.PHONY : default_target -INC=-Isrc/ -I$(FMT_LIB_DIR) -I$(INI_LIB_DIR) -I$(ARGS_LIB_DIR) -I$(JSON_LIB_DIR) -CXXFLAGS=-Wall -O3 -fPIC -std=c++11 $(INC) -DFMT_HEADER_ONLY=1 +# Allow only one "make -f Makefile2" at a time, but pass parallelism. +.NOTPARALLEL: -LIB_NAME=libdramsim3.so -EXE_NAME=dramsim3main.out -SRCS = src/bankstate.cc src/channel_state.cc src/command_queue.cc src/common.cc \ - src/configuration.cc src/controller.cc src/dram_system.cc src/hmc.cc \ - src/memory_system.cc src/refresh.cc src/simple_stats.cc src/timing.cc +#============================================================================= +# Special targets provided by cmake. -EXE_SRCS = src/cpu.cc src/main.cc +# Disable implicit rules so canonical targets will work. +.SUFFIXES: -OBJECTS = $(addsuffix .o, $(basename $(SRCS))) -EXE_OBJS = $(addsuffix .o, $(basename $(EXE_SRCS))) -EXE_OBJS := $(EXE_OBJS) $(OBJECTS) +# Remove some rules from gmake that .SUFFIXES does not remove. +SUFFIXES = -all: $(LIB_NAME) $(EXE_NAME) +.SUFFIXES: .hpux_make_needs_suffix_list -$(EXE_NAME): $(EXE_OBJS) - $(CXX) $(CXXFLAGS) -o $@ $^ -$(LIB_NAME): $(OBJECTS) - $(CXX) -g -shared -Wl,-soname,$@ -o $@ $^ +# Suppress display of executed commands. +$(VERBOSE).SILENT: -%.o : %.cc - $(CXX) $(CXXFLAGS) -o $@ -c $< -%.o : %.c - $(CC) -fPIC -O2 -o $@ -c $< +# A target that is always out of date. +cmake_force: +.PHONY : cmake_force + +#============================================================================= +# Set environment variables for the build. + +# The shell in which to execute make rules. +SHELL = /bin/sh + +# The CMake executable. +CMAKE_COMMAND = /usr/bin/cmake + +# The command to remove a file. +RM = /usr/bin/cmake -E remove -f + +# Escaping for special characters. +EQUALS = = + +# The top-level source directory on which CMake was run. +CMAKE_SOURCE_DIR = /home/bassiabn/rad-sim/rad-flow/rad-sim + +# The top-level build directory on which CMake was run. +CMAKE_BINARY_DIR = /home/bassiabn/rad-sim/rad-flow/rad-sim + +#============================================================================= +# Targets provided globally by CMake. + +# Special rule for the target edit_cache +edit_cache: + @$(CMAKE_COMMAND) -E cmake_echo_color --switch=$(COLOR) --cyan "Running CMake cache editor..." + /usr/bin/ccmake -S$(CMAKE_SOURCE_DIR) -B$(CMAKE_BINARY_DIR) +.PHONY : edit_cache + +# Special rule for the target edit_cache +edit_cache/fast: edit_cache + +.PHONY : edit_cache/fast + +# Special rule for the target rebuild_cache +rebuild_cache: + @$(CMAKE_COMMAND) -E cmake_echo_color --switch=$(COLOR) --cyan "Running CMake to regenerate build system..." + /usr/bin/cmake -S$(CMAKE_SOURCE_DIR) -B$(CMAKE_BINARY_DIR) +.PHONY : rebuild_cache + +# Special rule for the target rebuild_cache +rebuild_cache/fast: rebuild_cache + +.PHONY : rebuild_cache/fast + +# The main all target +all: cmake_check_build_system + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(CMAKE_COMMAND) -E cmake_progress_start /home/bassiabn/rad-sim/rad-flow/rad-sim/CMakeFiles /home/bassiabn/rad-sim/rad-flow/rad-sim/sim/dram/DRAMsim3/CMakeFiles/progress.marks + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f CMakeFiles/Makefile2 sim/dram/DRAMsim3/all + $(CMAKE_COMMAND) -E cmake_progress_start /home/bassiabn/rad-sim/rad-flow/rad-sim/CMakeFiles 0 +.PHONY : all + +# The main clean target clean: - -rm -f $(EXE_OBJS) $(LIB_NAME) $(EXE_NAME) \ No newline at end of file + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f CMakeFiles/Makefile2 sim/dram/DRAMsim3/clean +.PHONY : clean + +# The main clean target +clean/fast: clean + +.PHONY : clean/fast + +# Prepare targets for installation. +preinstall: all + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f CMakeFiles/Makefile2 sim/dram/DRAMsim3/preinstall +.PHONY : preinstall + +# Prepare targets for installation. +preinstall/fast: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f CMakeFiles/Makefile2 sim/dram/DRAMsim3/preinstall +.PHONY : preinstall/fast + +# clear depends +depend: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(CMAKE_COMMAND) -S$(CMAKE_SOURCE_DIR) -B$(CMAKE_BINARY_DIR) --check-build-system CMakeFiles/Makefile.cmake 1 +.PHONY : depend + +# Convenience name for target. +sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/rule: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f CMakeFiles/Makefile2 sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/rule +.PHONY : sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/rule + +# Convenience name for target. +dramsim3: sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/rule + +.PHONY : dramsim3 + +# fast build rule for target. +dramsim3/fast: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build +.PHONY : dramsim3/fast + +src/bankstate.o: src/bankstate.cc.o + +.PHONY : src/bankstate.o + +# target to build an object file +src/bankstate.cc.o: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/bankstate.cc.o +.PHONY : src/bankstate.cc.o + +src/bankstate.i: src/bankstate.cc.i + +.PHONY : src/bankstate.i + +# target to preprocess a source file +src/bankstate.cc.i: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/bankstate.cc.i +.PHONY : src/bankstate.cc.i + +src/bankstate.s: src/bankstate.cc.s + +.PHONY : src/bankstate.s + +# target to generate assembly for a file +src/bankstate.cc.s: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/bankstate.cc.s +.PHONY : src/bankstate.cc.s + +src/channel_state.o: src/channel_state.cc.o + +.PHONY : src/channel_state.o + +# target to build an object file +src/channel_state.cc.o: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/channel_state.cc.o +.PHONY : src/channel_state.cc.o + +src/channel_state.i: src/channel_state.cc.i + +.PHONY : src/channel_state.i + +# target to preprocess a source file +src/channel_state.cc.i: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/channel_state.cc.i +.PHONY : src/channel_state.cc.i + +src/channel_state.s: src/channel_state.cc.s + +.PHONY : src/channel_state.s + +# target to generate assembly for a file +src/channel_state.cc.s: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/channel_state.cc.s +.PHONY : src/channel_state.cc.s + +src/command_queue.o: src/command_queue.cc.o + +.PHONY : src/command_queue.o + +# target to build an object file +src/command_queue.cc.o: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/command_queue.cc.o +.PHONY : src/command_queue.cc.o + +src/command_queue.i: src/command_queue.cc.i + +.PHONY : src/command_queue.i + +# target to preprocess a source file +src/command_queue.cc.i: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/command_queue.cc.i +.PHONY : src/command_queue.cc.i + +src/command_queue.s: src/command_queue.cc.s + +.PHONY : src/command_queue.s + +# target to generate assembly for a file +src/command_queue.cc.s: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/command_queue.cc.s +.PHONY : src/command_queue.cc.s + +src/common.o: src/common.cc.o + +.PHONY : src/common.o + +# target to build an object file +src/common.cc.o: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/common.cc.o +.PHONY : src/common.cc.o + +src/common.i: src/common.cc.i + +.PHONY : src/common.i + +# target to preprocess a source file +src/common.cc.i: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/common.cc.i +.PHONY : src/common.cc.i + +src/common.s: src/common.cc.s + +.PHONY : src/common.s + +# target to generate assembly for a file +src/common.cc.s: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/common.cc.s +.PHONY : src/common.cc.s + +src/configuration.o: src/configuration.cc.o + +.PHONY : src/configuration.o + +# target to build an object file +src/configuration.cc.o: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/configuration.cc.o +.PHONY : src/configuration.cc.o + +src/configuration.i: src/configuration.cc.i + +.PHONY : src/configuration.i + +# target to preprocess a source file +src/configuration.cc.i: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/configuration.cc.i +.PHONY : src/configuration.cc.i + +src/configuration.s: src/configuration.cc.s + +.PHONY : src/configuration.s + +# target to generate assembly for a file +src/configuration.cc.s: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/configuration.cc.s +.PHONY : src/configuration.cc.s + +src/controller.o: src/controller.cc.o + +.PHONY : src/controller.o + +# target to build an object file +src/controller.cc.o: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/controller.cc.o +.PHONY : src/controller.cc.o + +src/controller.i: src/controller.cc.i + +.PHONY : src/controller.i + +# target to preprocess a source file +src/controller.cc.i: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/controller.cc.i +.PHONY : src/controller.cc.i + +src/controller.s: src/controller.cc.s + +.PHONY : src/controller.s + +# target to generate assembly for a file +src/controller.cc.s: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/controller.cc.s +.PHONY : src/controller.cc.s + +src/dram_system.o: src/dram_system.cc.o + +.PHONY : src/dram_system.o + +# target to build an object file +src/dram_system.cc.o: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/dram_system.cc.o +.PHONY : src/dram_system.cc.o + +src/dram_system.i: src/dram_system.cc.i + +.PHONY : src/dram_system.i + +# target to preprocess a source file +src/dram_system.cc.i: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/dram_system.cc.i +.PHONY : src/dram_system.cc.i + +src/dram_system.s: src/dram_system.cc.s + +.PHONY : src/dram_system.s + +# target to generate assembly for a file +src/dram_system.cc.s: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/dram_system.cc.s +.PHONY : src/dram_system.cc.s + +src/hmc.o: src/hmc.cc.o + +.PHONY : src/hmc.o + +# target to build an object file +src/hmc.cc.o: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/hmc.cc.o +.PHONY : src/hmc.cc.o + +src/hmc.i: src/hmc.cc.i + +.PHONY : src/hmc.i + +# target to preprocess a source file +src/hmc.cc.i: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/hmc.cc.i +.PHONY : src/hmc.cc.i + +src/hmc.s: src/hmc.cc.s + +.PHONY : src/hmc.s + +# target to generate assembly for a file +src/hmc.cc.s: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/hmc.cc.s +.PHONY : src/hmc.cc.s + +src/memory_system.o: src/memory_system.cc.o + +.PHONY : src/memory_system.o + +# target to build an object file +src/memory_system.cc.o: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/memory_system.cc.o +.PHONY : src/memory_system.cc.o + +src/memory_system.i: src/memory_system.cc.i + +.PHONY : src/memory_system.i + +# target to preprocess a source file +src/memory_system.cc.i: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/memory_system.cc.i +.PHONY : src/memory_system.cc.i + +src/memory_system.s: src/memory_system.cc.s + +.PHONY : src/memory_system.s + +# target to generate assembly for a file +src/memory_system.cc.s: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/memory_system.cc.s +.PHONY : src/memory_system.cc.s + +src/refresh.o: src/refresh.cc.o + +.PHONY : src/refresh.o + +# target to build an object file +src/refresh.cc.o: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/refresh.cc.o +.PHONY : src/refresh.cc.o + +src/refresh.i: src/refresh.cc.i + +.PHONY : src/refresh.i + +# target to preprocess a source file +src/refresh.cc.i: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/refresh.cc.i +.PHONY : src/refresh.cc.i + +src/refresh.s: src/refresh.cc.s + +.PHONY : src/refresh.s + +# target to generate assembly for a file +src/refresh.cc.s: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/refresh.cc.s +.PHONY : src/refresh.cc.s + +src/simple_stats.o: src/simple_stats.cc.o + +.PHONY : src/simple_stats.o + +# target to build an object file +src/simple_stats.cc.o: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/simple_stats.cc.o +.PHONY : src/simple_stats.cc.o + +src/simple_stats.i: src/simple_stats.cc.i + +.PHONY : src/simple_stats.i + +# target to preprocess a source file +src/simple_stats.cc.i: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/simple_stats.cc.i +.PHONY : src/simple_stats.cc.i + +src/simple_stats.s: src/simple_stats.cc.s + +.PHONY : src/simple_stats.s + +# target to generate assembly for a file +src/simple_stats.cc.s: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/simple_stats.cc.s +.PHONY : src/simple_stats.cc.s + +src/timing.o: src/timing.cc.o + +.PHONY : src/timing.o + +# target to build an object file +src/timing.cc.o: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/timing.cc.o +.PHONY : src/timing.cc.o + +src/timing.i: src/timing.cc.i + +.PHONY : src/timing.i + +# target to preprocess a source file +src/timing.cc.i: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/timing.cc.i +.PHONY : src/timing.cc.i + +src/timing.s: src/timing.cc.s + +.PHONY : src/timing.s + +# target to generate assembly for a file +src/timing.cc.s: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/timing.cc.s +.PHONY : src/timing.cc.s + +# Help Target +help: + @echo "The following are some of the valid targets for this Makefile:" + @echo "... all (the default if no target is provided)" + @echo "... clean" + @echo "... depend" + @echo "... edit_cache" + @echo "... dramsim3" + @echo "... rebuild_cache" + @echo "... src/bankstate.o" + @echo "... src/bankstate.i" + @echo "... src/bankstate.s" + @echo "... src/channel_state.o" + @echo "... src/channel_state.i" + @echo "... src/channel_state.s" + @echo "... src/command_queue.o" + @echo "... src/command_queue.i" + @echo "... src/command_queue.s" + @echo "... src/common.o" + @echo "... src/common.i" + @echo "... src/common.s" + @echo "... src/configuration.o" + @echo "... src/configuration.i" + @echo "... src/configuration.s" + @echo "... src/controller.o" + @echo "... src/controller.i" + @echo "... src/controller.s" + @echo "... src/dram_system.o" + @echo "... src/dram_system.i" + @echo "... src/dram_system.s" + @echo "... src/hmc.o" + @echo "... src/hmc.i" + @echo "... src/hmc.s" + @echo "... src/memory_system.o" + @echo "... src/memory_system.i" + @echo "... src/memory_system.s" + @echo "... src/refresh.o" + @echo "... src/refresh.i" + @echo "... src/refresh.s" + @echo "... src/simple_stats.o" + @echo "... src/simple_stats.i" + @echo "... src/simple_stats.s" + @echo "... src/timing.o" + @echo "... src/timing.i" + @echo "... src/timing.s" +.PHONY : help + + + +#============================================================================= +# Special targets to cleanup operation of make. + +# Special rule to run CMake to check the build system integrity. +# No rule that depends on this can have commands that come from listfiles +# because they might be regenerated. +cmake_check_build_system: + cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(CMAKE_COMMAND) -S$(CMAKE_SOURCE_DIR) -B$(CMAKE_BINARY_DIR) --check-build-system CMakeFiles/Makefile.cmake 0 +.PHONY : cmake_check_build_system + diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index ddd7e51..e3f562d 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -59,10 +59,10 @@ int sc_main(int argc, char *argv[]) { //new_val = system2->dut_inst->portal_in.read(); //works but replacing to test axi new_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); //TODO: use handshaking properly //if (val != 0) { - //if (new_val != old_val) { //to ensure only displayed once - std::cout << "read system2 portal_in: " << new_val << std::endl; + if (new_val != old_val) { //to ensure only displayed once + std::cout << "read system2 portal_in: " << new_val.to_uint64() << std::endl; old_val = new_val; - //} + } } std::cout << "stopping" << std::endl; int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 2d2ab71..0203fc4 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -57,8 +57,16 @@ RADSimInterRad::ConnectRadAxi(int i) { bool wrote_yet = false; void RADSimInterRad::writeFifo() { - // Always @ positive edge of the clock + /* + Always @ positive edge of the clock + Writes into fifo + TODO: iterate over all_axis_slave_ports entries, + TODO: check if the data is valid and only write into fifo then + TODO: write into the fifo corresponding to the dest. + TODO: automating adding all fields to curr_transaction + */ //wait(); + bool prev_valid = 0; while (true) { //testing fifo //std::cout << "reached inter_rad " << std::endl; @@ -67,21 +75,33 @@ RADSimInterRad::writeFifo() { struct axis_fields curr_transaction; curr_transaction.tdata = all_axis_slave_ports[0]->tdata.read(); //0 bc adder curr_transaction.tuser = all_axis_slave_ports[0]->tuser.read(); + curr_transaction.tvalid = all_axis_slave_ports[0]->tvalid.read(); + curr_transaction.tlast = all_axis_slave_ports[0]->tlast.read(); //std::cout << "inter_rad fifo free before write is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; //if ((curr_val != 0) && (!wrote_yet)) { - if ((curr_transaction.tdata != 0) && (!wrote_yet)) { + //std::cout << "curr_transaction.tvalid: " << curr_transaction.tvalid << "prev_valid: " << prev_valid << std::endl; + if (curr_transaction.tvalid && !prev_valid) { //detect rising edge bc operating at higher clk freq than modules if (this->fifos[0]->nb_write(curr_transaction) != false) { //there was an available slot to write to + std::cout << "inter_rad fifo data WRITTEN is " << curr_transaction.tdata.to_uint64() << std::endl; //std::cout << "inter_rad fifo free after write is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; - wrote_yet = true; + //wrote_yet = true; } } + prev_valid = curr_transaction.tvalid; wait(1, SC_NS); //eventually change to 1.3, SC_US -- assuming 2.6 us / 2 latency for one piece of data } } void RADSimInterRad::readFifo() { - // Always @ positive edge of the clock + /* + Always @ positive edge of the clock + Read from fifo slot + TODO: iterate thru all fifos + TODO: match the dest index of fifo to the dest rad + TODO: automating adding all fields to curr_transaction + currently hardcoded to pull from same fifo that we use in writeFifo + */ while (true) { //std::cout << "inter_rad fifo free before READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; @@ -90,18 +110,20 @@ RADSimInterRad::readFifo() { struct axis_fields read_from_fifo; this->fifos[0]->nb_read(read_from_fifo); sc_bv val = read_from_fifo.tdata; - int dest_device = read_from_fifo.tuser.to_int64(); //#define AXIS_USERW 66 - std::cout << "dest_device: " << dest_device << std::endl; - + int dest_device = read_from_fifo.tuser.to_uint64(); //#define AXIS_USERW 66 + //std::cout << "inter_rad fifo data READ is " << this->fifos[0]->read() << std::endl; - if (val != false) { - //std::cout << "inter_rad fifo data READ is " << val << std::endl; + if (read_from_fifo.tvalid) { + std::cout << "inter_rad fifo data READ is " << val.to_uint64() << std::endl; + std::cout << "dest_device: " << dest_device << std::endl; //all_signals[1].write(val); //works but replacing with axi //all_axis_master_ports[1]->tdata.write(val); //1 bc sending to mult design all_axis_master_signals[dest_device]->tdata.write(val); //works if write to either this or line above + all_axis_master_signals[dest_device]->tvalid.write(read_from_fifo.tvalid); + all_axis_master_signals[dest_device]->tlast.write(read_from_fifo.tlast); //std::cout << "inter_rad fifo free after READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; } - std::cout << "radsim_inter_rad value is (val): " << val << std::endl; + //std::cout << "radsim_inter_rad value is (val): " << val << std::endl; //used for testing /*std::cout << "radsim_inter_rad value is (master_ports): " << all_axis_master_ports[1]->tdata.read() << std::endl; std::cout << "radsim_inter_rad value is (master_signals): " << all_axis_master_signals[1]->tdata.read() << std::endl; std::cout << "radsim_inter_rad value is (dut_inst): " << cluster->all_systems[1]->design_dut_inst->design_top_portal_axis_slave.tdata.read() << std::endl; diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index 7a5648d..a0ddbcd 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -10,7 +10,7 @@ #include #define DATAW 128 -#define NUM_SLOTS 2 //number of fifo slots +#define NUM_SLOTS 5 //number of fifo slots struct axis_fields { bool tvalid; From d4671b148af2b5e9279a0515142d4f91acb9e5bc Mon Sep 17 00:00:00 2001 From: abnashkb Date: Thu, 14 Mar 2024 01:17:46 -0400 Subject: [PATCH 028/127] Fixed inter_rad latency support and handshaking --- .../example-designs/add/modules/portal.cpp | 4 + .../example-designs/add/modules/portal.hpp | 1 + rad-sim/example-designs/mult/modules/mult.cpp | 7 ++ rad-sim/example-designs/mult/modules/mult.hpp | 1 + rad-sim/sim/radsim_inter_rad.cpp | 79 ++++++++++++------- rad-sim/sim/radsim_inter_rad.hpp | 1 + 6 files changed, 65 insertions(+), 28 deletions(-) diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index ea2a650..7f6a874 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -68,6 +68,10 @@ void portal::Tick() { //sequential logic portal_axis_master.tlast.write(axis_add_portal_slave_interface.tlast.read()); std::cout << "portal.cpp in add design sent dest_device: " << dest_device.to_int64() << std::endl; portal_recvd.write(1); + if (axis_add_portal_slave_interface.tlast.read()) { + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + std::cout << "Add design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; + } } else { //counter++; diff --git a/rad-sim/example-designs/add/modules/portal.hpp b/rad-sim/example-designs/add/modules/portal.hpp index 26b72c5..13bd593 100644 --- a/rad-sim/example-designs/add/modules/portal.hpp +++ b/rad-sim/example-designs/add/modules/portal.hpp @@ -9,6 +9,7 @@ #include #include #include +#include class portal : public RADSimModule { private: diff --git a/rad-sim/example-designs/mult/modules/mult.cpp b/rad-sim/example-designs/mult/modules/mult.cpp index 61ab8f7..1f854be 100644 --- a/rad-sim/example-designs/mult/modules/mult.cpp +++ b/rad-sim/example-designs/mult/modules/mult.cpp @@ -33,6 +33,8 @@ void mult::Tick() { response_valid.write(0); response.write(0); wait(); + bool printed_end_cycle = false; + // Always @ positive edge of the clock while (true) { @@ -53,6 +55,11 @@ void mult::Tick() { response_valid.write(1); response.write(mult_rolling_product); //mult_inter_rad_recvd.write(1); //maybe not needed if using the + if (!printed_end_cycle) { + int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + std::cout << "mult.cpp received all factors from add RAD at cycle " << end_cycle << std::endl; + printed_end_cycle = true; + } } wait(); } diff --git a/rad-sim/example-designs/mult/modules/mult.hpp b/rad-sim/example-designs/mult/modules/mult.hpp index 9e44525..8d679b8 100644 --- a/rad-sim/example-designs/mult/modules/mult.hpp +++ b/rad-sim/example-designs/mult/modules/mult.hpp @@ -9,6 +9,7 @@ #include #include #include +#include class mult : public RADSimModule { private: diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 0203fc4..88e3ec6 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -1,5 +1,7 @@ #include +int num_wait = 1; //7; + std::ostream& operator<<(std::ostream& os, const axis_fields& I) { return os; //needed to create sc_fifo of custom struct type } @@ -7,9 +9,11 @@ std::ostream& operator<<(std::ostream& os, const axis_fields& I) { RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_clk, RADSimCluster* cluster) : sc_module(name) { this->cluster = cluster; this->clk(*inter_rad_clk); - all_signals.init(cluster->num_rads + 1); + num_rads = cluster->num_rads; + all_signals.init(num_rads + 1); + std::cout << num_rads << std::endl; - for (int v = 0; v < cluster->num_rads; v++) { //width of vector = num of rads bc want fifo per rad + for (int v = 0; v < num_rads; v++) { //width of vector = num of rads bc want fifo per rad sc_fifo* new_fifo_ptr = new sc_fifo(NUM_SLOTS); fifos.push_back(new_fifo_ptr); //adding to axi vectors @@ -22,14 +26,15 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c axis_master_port* new_axis_master_port = new axis_master_port; all_axis_master_ports.push_back(new_axis_master_port); } - SC_THREAD(writeFifo); - SC_THREAD(readFifo); - + //SC_THREAD(writeFifo); + //SC_THREAD(readFifo); + SC_CTHREAD(writeFifo, clk.pos()); + SC_CTHREAD(readFifo, clk.pos()); } RADSimInterRad::~RADSimInterRad() { int v; - for (v = 0; v < this->cluster->num_rads; v++) { + for (v = 0; v < num_rads; v++) { delete fifos[v]; delete all_axis_master_signals[v]; delete all_axis_slave_signals[v]; @@ -72,6 +77,7 @@ RADSimInterRad::writeFifo() { //std::cout << "reached inter_rad " << std::endl; //sc_bv curr_val = cluster->all_systems[0]->design_dut_inst->portal_out.read(); //this works, but try using signal instead //sc_bv curr_val = all_signals[2]; //works but replacing with axi + //for (int i = 0; i < num_rads; i++) struct axis_fields curr_transaction; curr_transaction.tdata = all_axis_slave_ports[0]->tdata.read(); //0 bc adder curr_transaction.tuser = all_axis_slave_ports[0]->tuser.read(); @@ -88,10 +94,16 @@ RADSimInterRad::writeFifo() { } } prev_valid = curr_transaction.tvalid; - wait(1, SC_NS); //eventually change to 1.3, SC_US -- assuming 2.6 us / 2 latency for one piece of data + //wait(num_wait, SC_NS); //SC_NS); //eventually change to 1.3, SC_US -- assuming 2.6 us / 2 latency for one piece of data + wait(); } } +int counter_delay = 0; //to delay X number of cycles +float latency_sec = 2.6 * pow(10, -6); +float period_sec = 5.0 * pow(10, -9); +int target_delay = ceil(latency_sec/period_sec); //number of cycles to delay + void RADSimInterRad::readFifo() { /* @@ -107,28 +119,39 @@ RADSimInterRad::readFifo() { //sc_bv val = this->fifos[0]->read(); - struct axis_fields read_from_fifo; - this->fifos[0]->nb_read(read_from_fifo); - sc_bv val = read_from_fifo.tdata; - int dest_device = read_from_fifo.tuser.to_uint64(); //#define AXIS_USERW 66 - - //std::cout << "inter_rad fifo data READ is " << this->fifos[0]->read() << std::endl; - if (read_from_fifo.tvalid) { - std::cout << "inter_rad fifo data READ is " << val.to_uint64() << std::endl; - std::cout << "dest_device: " << dest_device << std::endl; - //all_signals[1].write(val); //works but replacing with axi - //all_axis_master_ports[1]->tdata.write(val); //1 bc sending to mult design - all_axis_master_signals[dest_device]->tdata.write(val); //works if write to either this or line above - all_axis_master_signals[dest_device]->tvalid.write(read_from_fifo.tvalid); - all_axis_master_signals[dest_device]->tlast.write(read_from_fifo.tlast); - //std::cout << "inter_rad fifo free after READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; + if ((this->fifos[0]->num_available() != 0) && (counter_delay == target_delay)){ //check that fifo is not empty + counter_delay = 0; //reset counter + struct axis_fields read_from_fifo; + this->fifos[0]->nb_read(read_from_fifo); + sc_bv val = read_from_fifo.tdata; + int dest_device = read_from_fifo.tuser.to_uint64(); //#define AXIS_USERW 66 + + //std::cout << "inter_rad fifo data READ is " << this->fifos[0]->read() << std::endl; + if (read_from_fifo.tvalid) { + std::cout << "inter_rad fifo data READ is " << val.to_uint64() << std::endl; + std::cout << "dest_device: " << dest_device << std::endl; + //all_signals[1].write(val); //works but replacing with axi + //all_axis_master_ports[1]->tdata.write(val); //1 bc sending to mult design + all_axis_master_signals[dest_device]->tdata.write(val); //works if write to either this or line above + all_axis_master_signals[dest_device]->tvalid.write(read_from_fifo.tvalid); + all_axis_master_signals[dest_device]->tlast.write(read_from_fifo.tlast); + //std::cout << "inter_rad fifo free after READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; + } + //std::cout << "radsim_inter_rad value is (val): " << val << std::endl; //used for testing + /*std::cout << "radsim_inter_rad value is (master_ports): " << all_axis_master_ports[1]->tdata.read() << std::endl; + std::cout << "radsim_inter_rad value is (master_signals): " << all_axis_master_signals[1]->tdata.read() << std::endl; + std::cout << "radsim_inter_rad value is (dut_inst): " << cluster->all_systems[1]->design_dut_inst->design_top_portal_axis_slave.tdata.read() << std::endl; + */ + } + else { + //no data to be written to any RAD's portal module + //all_axis_master_signals[0]->tvalid.write(false); + all_axis_master_signals[1]->tvalid.write(false); } - //std::cout << "radsim_inter_rad value is (val): " << val << std::endl; //used for testing - /*std::cout << "radsim_inter_rad value is (master_ports): " << all_axis_master_ports[1]->tdata.read() << std::endl; - std::cout << "radsim_inter_rad value is (master_signals): " << all_axis_master_signals[1]->tdata.read() << std::endl; - std::cout << "radsim_inter_rad value is (dut_inst): " << cluster->all_systems[1]->design_dut_inst->design_top_portal_axis_slave.tdata.read() << std::endl; - */ + counter_delay++; - wait(1, SC_NS); //eventually change to 1.3, SC_US -- assuming 2.6 us / 2 latency for one piece of data + //wait(num_wait, SC_NS); //eventually change to 1.3, SC_US -- assuming 2.6 us / 2 latency for one piece of data + wait(); + //wait(2); } } \ No newline at end of file diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index a0ddbcd..8ddc3b1 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -34,6 +34,7 @@ class RADSimInterRad : public sc_module { //sc_fifo> data_in_rad1 = sc_fifo>(2); //2 slots for now //sc_vector>> switch_port_fifos{"switch_port_fifos"}; public: + int num_rads; sc_in clk; //std::vector>*> fifos; //works but replacing with struct elems std::vector*> fifos; From 590fd521ad44f7c9ce574b94e04d14ddd2f90a02 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Thu, 14 Mar 2024 03:48:00 -0400 Subject: [PATCH 029/127] Added latency counters for inter_rad axi for arbitrary number and pairings of RADs --- rad-sim/sim/radsim_inter_rad.cpp | 125 ++++++++++++++++++------------- rad-sim/sim/radsim_inter_rad.hpp | 14 ++++ 2 files changed, 88 insertions(+), 51 deletions(-) diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 88e3ec6..85b0f0c 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -11,7 +11,12 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c this->clk(*inter_rad_clk); num_rads = cluster->num_rads; all_signals.init(num_rads + 1); - std::cout << num_rads << std::endl; + std::cout << "num_rads is " << num_rads << std::endl; + + //for latency counters, elems zero-initialized to int 0 bc of {} + //std::array each_fifo_arr_latency_counters = {}; + fifos_latency_counters.resize(num_rads); + //std::cout << "fifos_latency_counters[0].size() " << fifos_latency_counters[0].size() << std::endl; for (int v = 0; v < num_rads; v++) { //width of vector = num of rads bc want fifo per rad sc_fifo* new_fifo_ptr = new sc_fifo(NUM_SLOTS); @@ -25,11 +30,22 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c all_axis_slave_ports.push_back(new_axis_slave_port); axis_master_port* new_axis_master_port = new axis_master_port; all_axis_master_ports.push_back(new_axis_master_port); + //for rising edge detection + prev_valid.push_back(0); + //for latency counters + //fifos_latency_counters.push_back(each_fifo_arr_latency_counters); } //SC_THREAD(writeFifo); //SC_THREAD(readFifo); SC_CTHREAD(writeFifo, clk.pos()); SC_CTHREAD(readFifo, clk.pos()); + + //testing + /*for (int i = 0; i < num_rads; i++) { + for (int j = 0; j < NUM_SLOTS; j++) { + std::cout << fifos_latency_counters[i][j] << std::endl; + } + }*/ } RADSimInterRad::~RADSimInterRad() { @@ -71,39 +87,38 @@ RADSimInterRad::writeFifo() { TODO: automating adding all fields to curr_transaction */ //wait(); - bool prev_valid = 0; while (true) { //testing fifo //std::cout << "reached inter_rad " << std::endl; //sc_bv curr_val = cluster->all_systems[0]->design_dut_inst->portal_out.read(); //this works, but try using signal instead //sc_bv curr_val = all_signals[2]; //works but replacing with axi - //for (int i = 0; i < num_rads; i++) - struct axis_fields curr_transaction; - curr_transaction.tdata = all_axis_slave_ports[0]->tdata.read(); //0 bc adder - curr_transaction.tuser = all_axis_slave_ports[0]->tuser.read(); - curr_transaction.tvalid = all_axis_slave_ports[0]->tvalid.read(); - curr_transaction.tlast = all_axis_slave_ports[0]->tlast.read(); - //std::cout << "inter_rad fifo free before write is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; - //if ((curr_val != 0) && (!wrote_yet)) { - //std::cout << "curr_transaction.tvalid: " << curr_transaction.tvalid << "prev_valid: " << prev_valid << std::endl; - if (curr_transaction.tvalid && !prev_valid) { //detect rising edge bc operating at higher clk freq than modules - if (this->fifos[0]->nb_write(curr_transaction) != false) { //there was an available slot to write to - std::cout << "inter_rad fifo data WRITTEN is " << curr_transaction.tdata.to_uint64() << std::endl; - //std::cout << "inter_rad fifo free after write is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; - //wrote_yet = true; + for (int i = 0; i < num_rads; i++) { + struct axis_fields curr_transaction; + curr_transaction.tdata = all_axis_slave_ports[i]->tdata.read(); //0 bc adder + curr_transaction.tuser = all_axis_slave_ports[i]->tuser.read(); + curr_transaction.tvalid = all_axis_slave_ports[i]->tvalid.read(); + curr_transaction.tlast = all_axis_slave_ports[i]->tlast.read(); + //uint64_t dest_rad = curr_transaction.tuser.range(1, 0).to_uint64(); //for later, adding src rad too vs dest rad. currently just dest rad. + //std::cout << "inter_rad fifo free before write is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; + //if ((curr_val != 0) && (!wrote_yet)) { + //std::cout << "curr_transaction.tvalid: " << curr_transaction.tvalid << "prev_valid: " << prev_valid << std::endl; + if (curr_transaction.tvalid && !prev_valid[i]) { //detect rising edge bc operating at higher clk freq than modules + int dest_rad = curr_transaction.tuser.to_int64(); + std::cout << dest_rad << std::endl; + if (this->fifos[dest_rad]->nb_write(curr_transaction) != false) { //there was an available slot to write to + std::cout << "inter_rad fifo data WRITTEN is " << curr_transaction.tdata.to_uint64() << std::endl; + //std::cout << "inter_rad fifo free after write is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; + //wrote_yet = true; + fifos_latency_counters[dest_rad].push_back(0); //for latency counters + } } + prev_valid[i] = curr_transaction.tvalid; } - prev_valid = curr_transaction.tvalid; //wait(num_wait, SC_NS); //SC_NS); //eventually change to 1.3, SC_US -- assuming 2.6 us / 2 latency for one piece of data wait(); } } -int counter_delay = 0; //to delay X number of cycles -float latency_sec = 2.6 * pow(10, -6); -float period_sec = 5.0 * pow(10, -9); -int target_delay = ceil(latency_sec/period_sec); //number of cycles to delay - void RADSimInterRad::readFifo() { /* @@ -118,37 +133,45 @@ RADSimInterRad::readFifo() { //std::cout << "inter_rad fifo free before READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; //sc_bv val = this->fifos[0]->read(); - - if ((this->fifos[0]->num_available() != 0) && (counter_delay == target_delay)){ //check that fifo is not empty - counter_delay = 0; //reset counter - struct axis_fields read_from_fifo; - this->fifos[0]->nb_read(read_from_fifo); - sc_bv val = read_from_fifo.tdata; - int dest_device = read_from_fifo.tuser.to_uint64(); //#define AXIS_USERW 66 - - //std::cout << "inter_rad fifo data READ is " << this->fifos[0]->read() << std::endl; - if (read_from_fifo.tvalid) { - std::cout << "inter_rad fifo data READ is " << val.to_uint64() << std::endl; - std::cout << "dest_device: " << dest_device << std::endl; - //all_signals[1].write(val); //works but replacing with axi - //all_axis_master_ports[1]->tdata.write(val); //1 bc sending to mult design - all_axis_master_signals[dest_device]->tdata.write(val); //works if write to either this or line above - all_axis_master_signals[dest_device]->tvalid.write(read_from_fifo.tvalid); - all_axis_master_signals[dest_device]->tlast.write(read_from_fifo.tlast); - //std::cout << "inter_rad fifo free after READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; + for (int i = 0; i < num_rads; i++) { //iterate through all rad's fifos + //increment delay on all counters + for (int j = 0; j < fifos_latency_counters[i].size(); j++) { + //std::cout << "i " << i << " j " << j << std::endl; + fifos_latency_counters[i][j]++; } - //std::cout << "radsim_inter_rad value is (val): " << val << std::endl; //used for testing - /*std::cout << "radsim_inter_rad value is (master_ports): " << all_axis_master_ports[1]->tdata.read() << std::endl; - std::cout << "radsim_inter_rad value is (master_signals): " << all_axis_master_signals[1]->tdata.read() << std::endl; - std::cout << "radsim_inter_rad value is (dut_inst): " << cluster->all_systems[1]->design_dut_inst->design_top_portal_axis_slave.tdata.read() << std::endl; - */ - } - else { - //no data to be written to any RAD's portal module - //all_axis_master_signals[0]->tvalid.write(false); - all_axis_master_signals[1]->tvalid.write(false); + //try reading from front of fifo + if ((this->fifos[i]->num_available() != 0) && (fifos_latency_counters[i][0] == target_delay)){ //check that fifo is not empty + //counter_delay = 0; //reset counter + fifos_latency_counters[i].erase(fifos_latency_counters[i].begin()); //to reset counter, remove first elem + struct axis_fields read_from_fifo; + this->fifos[i]->nb_read(read_from_fifo); + sc_bv val = read_from_fifo.tdata; + int dest_device = read_from_fifo.tuser.to_uint64(); //#define AXIS_USERW 66 + + //std::cout << "inter_rad fifo data READ is " << this->fifos[0]->read() << std::endl; + if (read_from_fifo.tvalid) { + std::cout << "inter_rad fifo data READ is " << val.to_uint64() << std::endl; + std::cout << "dest_device: " << dest_device << std::endl; + //all_signals[1].write(val); //works but replacing with axi + //all_axis_master_ports[1]->tdata.write(val); //1 bc sending to mult design + all_axis_master_signals[dest_device]->tdata.write(val); //works if write to either this or line above + all_axis_master_signals[dest_device]->tvalid.write(read_from_fifo.tvalid); + all_axis_master_signals[dest_device]->tlast.write(read_from_fifo.tlast); + //std::cout << "inter_rad fifo free after READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; + } + //std::cout << "radsim_inter_rad value is (val): " << val << std::endl; //used for testing + /*std::cout << "radsim_inter_rad value is (master_ports): " << all_axis_master_ports[1]->tdata.read() << std::endl; + std::cout << "radsim_inter_rad value is (master_signals): " << all_axis_master_signals[1]->tdata.read() << std::endl; + std::cout << "radsim_inter_rad value is (dut_inst): " << cluster->all_systems[1]->design_dut_inst->design_top_portal_axis_slave.tdata.read() << std::endl; + */ + } + else { + //no data to be written to any RAD's portal module + //all_axis_master_signals[0]->tvalid.write(false); + all_axis_master_signals[i]->tvalid.write(false); + } + } - counter_delay++; //wait(num_wait, SC_NS); //eventually change to 1.3, SC_US -- assuming 2.6 us / 2 latency for one piece of data wait(); diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index 8ddc3b1..c4134ec 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -11,6 +11,8 @@ #define DATAW 128 #define NUM_SLOTS 5 //number of fifo slots +#define DEST_RAD_LSB 0 +#define DEST_RAD_MSB 7 struct axis_fields { bool tvalid; @@ -33,6 +35,10 @@ class RADSimInterRad : public sc_module { sc_vector>> all_signals{"all_signals"}; //sc_fifo> data_in_rad1 = sc_fifo>(2); //2 slots for now //sc_vector>> switch_port_fifos{"switch_port_fifos"}; + //for latency + float latency_sec = 5.0*2 * pow(10, -9); //2.6 * pow(10, -6); + float period_sec = 5.0 * pow(10, -9); + int target_delay = ceil(latency_sec/period_sec); //number of cycles to delay public: int num_rads; sc_in clk; @@ -45,6 +51,14 @@ class RADSimInterRad : public sc_module { std::vector all_axis_slave_ports; std::vector all_axis_master_ports; + //for rising edge detection on each interface + std::vector prev_valid; + + //for latency counter + //std::vector> fifos_latency_counters; + //using vector of vectors bc dynamic sizing based on num_rads, allows pushback and erase, and faster incrementing (we increment more often than erase from front) than std::deque + std::vector> fifos_latency_counters; + RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_clk, RADSimCluster* cluster); ~RADSimInterRad(); void ConnectRadPair(int i, int j); From c7527add54561a3bd5db2f604f9e9c8d89277f5b Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 19 Mar 2024 22:09:12 -0400 Subject: [PATCH 030/127] Commit of last week's latency experiment work before changes --- rad-sim/example-designs/mult/modules/portal_mult.cpp | 7 ++++++- rad-sim/example-designs/mult/modules/portal_mult.hpp | 1 + rad-sim/sim/radsim_inter_rad.hpp | 2 +- 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/rad-sim/example-designs/mult/modules/portal_mult.cpp b/rad-sim/example-designs/mult/modules/portal_mult.cpp index dd8f76d..403dc60 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.cpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.cpp @@ -43,7 +43,7 @@ void portal_mult::Tick() { //sequential logic << portal_axis_slave.tuser.read().to_uint64() << ") (addend = " << portal_axis_slave.tdata.read().to_uint64() << ")!" << std::endl; - //TODO: write the addend into the mult module and that will flag when received all values and can end simulation + //write the addend into the mult module and that will flag when received all values and can end simulation std::string src_port_name = module_name + ".axis_mult_portal_master_interface"; std::string dst_port_name = "mult_inst.axis_mult_interface"; uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref @@ -56,6 +56,11 @@ void portal_mult::Tick() { //sequential logic axis_mult_portal_master_interface.tlast.write(portal_axis_slave.tlast.read()); axis_mult_portal_master_interface.tdata.write(portal_axis_slave.tdata.read()); axis_mult_portal_master_interface.tvalid.write(true); + //checking if last transaction and if so, printing current simulation cycle count + if (portal_axis_slave.tlast.read()) { + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + std::cout << "Mult design portal_mult.cpp received last data via inter_rad at cycle " << curr_cycle << std::endl; + } } else { axis_mult_portal_master_interface.tvalid.write(false); diff --git a/rad-sim/example-designs/mult/modules/portal_mult.hpp b/rad-sim/example-designs/mult/modules/portal_mult.hpp index cf78075..f8242c8 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.hpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.hpp @@ -9,6 +9,7 @@ #include #include #include +#include class portal_mult : public RADSimModule { private: diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index c4134ec..fc75b1a 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -36,7 +36,7 @@ class RADSimInterRad : public sc_module { //sc_fifo> data_in_rad1 = sc_fifo>(2); //2 slots for now //sc_vector>> switch_port_fifos{"switch_port_fifos"}; //for latency - float latency_sec = 5.0*2 * pow(10, -9); //2.6 * pow(10, -6); + float latency_sec = 5.0*100 * pow(10, -9); //2.6 * pow(10, -6); float period_sec = 5.0 * pow(10, -9); int target_delay = ceil(latency_sec/period_sec); //number of cycles to delay public: From 6d61f2a3c95a56cdc94c6b14bb38e3254f9e9279 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 19 Mar 2024 23:24:32 -0400 Subject: [PATCH 031/127] Experimented with delaying data acceptance from NoC on adder.cpp --- rad-sim/example-designs/add/modules/adder.cpp | 23 ++++++++++++++++--- rad-sim/example-designs/add/modules/adder.hpp | 1 + .../example-designs/add/modules/client.cpp | 3 ++- .../example-designs/add/modules/client.hpp | 1 + 4 files changed, 24 insertions(+), 4 deletions(-) diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index 9d14e90..b57c346 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -22,29 +22,46 @@ adder::~adder() {} void adder::Assign() { if (rst) { adder_rolling_sum = 0; - axis_adder_interface.tready.write(false); + //axis_adder_interface.tready.write(false); //moving to Tick() bc needs to toggle with clock cycles } else { // Always ready to accept the transaction - axis_adder_interface.tready.write(true); + //axis_adder_interface.tready.write(true); } } void adder::Tick() { response_valid.write(0); response.write(0); + axis_adder_interface.tready.write(false); wait(); int count_sent_addends = 0; int total_num_addends = 10; + //bool accept_data = true; + int accept_data = 0; + int accept_delay = 0; //change this to experiment with delaying acceptance of data from NoC // Always @ positive edge of the clock + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + std::cout << "adder.cpp while loop at cycle " << curr_cycle << std::endl; while (true) { + //Toggle ready signal + if (accept_data == accept_delay) { + axis_adder_interface.tready.write(true); + accept_data = 0; + } + else { + axis_adder_interface.tready.write(false); + accept_data++; + } + //accept_data = !accept_data; // Receiving transaction from AXI-S interface if (axis_adder_interface.tvalid.read() && axis_adder_interface.tready.read()) { uint64_t current_sum = adder_rolling_sum.to_uint64(); adder_rolling_sum = current_sum + axis_adder_interface.tdata.read().to_uint64(); t_finished.write(axis_adder_interface.tlast.read()); - std::cout << module_name << ": Got Transaction (user = " + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + std::cout << module_name << ": Got Transaction " << count_sent_addends << " on cycle " << curr_cycle <<" (user = " << axis_adder_interface.tuser.read().to_uint64() << ") (addend = " << axis_adder_interface.tdata.read().to_uint64() << ")!" << std::endl; diff --git a/rad-sim/example-designs/add/modules/adder.hpp b/rad-sim/example-designs/add/modules/adder.hpp index 38e9c47..451f637 100644 --- a/rad-sim/example-designs/add/modules/adder.hpp +++ b/rad-sim/example-designs/add/modules/adder.hpp @@ -9,6 +9,7 @@ #include #include #include +#include class adder : public RADSimModule { private: diff --git a/rad-sim/example-designs/add/modules/client.cpp b/rad-sim/example-designs/add/modules/client.cpp index c717b73..eabbcbb 100644 --- a/rad-sim/example-designs/add/modules/client.cpp +++ b/rad-sim/example-designs/add/modules/client.cpp @@ -76,7 +76,8 @@ void client::Tick() { if (axis_client_interface.tvalid.read() && axis_client_interface.tready.read()) { client_tdata_fifo.pop(); - std::cout << module_name << ": Sent Transaction!" << std::endl; + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + std::cout << module_name << ": Sent Transaction! on cycle " << curr_cycle << std::endl; } wait(); } diff --git a/rad-sim/example-designs/add/modules/client.hpp b/rad-sim/example-designs/add/modules/client.hpp index fd60655..6dad61b 100644 --- a/rad-sim/example-designs/add/modules/client.hpp +++ b/rad-sim/example-designs/add/modules/client.hpp @@ -8,6 +8,7 @@ #include #include #include +#include #define DATAW 128 From 56b84309181e6984e6027f04fb0bcb717e7533d0 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 20 Mar 2024 01:57:58 -0400 Subject: [PATCH 032/127] Added backpressure from portal to adder on add design plus other fixes --- rad-sim/example-designs/add/modules/adder.cpp | 40 ++++++++++++++----- rad-sim/example-designs/add/modules/adder.hpp | 2 + .../example-designs/add/modules/client.cpp | 2 +- .../example-designs/add/modules/portal.cpp | 25 ++---------- rad-sim/sim/design_context.cpp | 2 +- rad-sim/sim/radsim_inter_rad.cpp | 40 +++++-------------- rad-sim/sim/radsim_inter_rad.hpp | 2 +- 7 files changed, 49 insertions(+), 64 deletions(-) diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index b57c346..b4d4624 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -36,7 +36,7 @@ void adder::Tick() { wait(); int count_sent_addends = 0; - int total_num_addends = 10; + //int total_num_addends = 10; //bool accept_data = true; int accept_data = 0; int accept_delay = 0; //change this to experiment with delaying acceptance of data from NoC @@ -53,10 +53,17 @@ void adder::Tick() { axis_adder_interface.tready.write(false); accept_data++; } + + //std::cout << "tready: " << axis_adder_master_interface.tready.read() << std::endl; + //accept_data = !accept_data; // Receiving transaction from AXI-S interface if (axis_adder_interface.tvalid.read() && - axis_adder_interface.tready.read()) { + axis_adder_interface.tready.read() + //also check master since sending on master in same cycle + //in future if needed, could decouple receiving and sending using a fifo + //&& axis_adder_master_interface.tready.read() //this is input from NoC + ){ uint64_t current_sum = adder_rolling_sum.to_uint64(); adder_rolling_sum = current_sum + axis_adder_interface.tdata.read().to_uint64(); t_finished.write(axis_adder_interface.tlast.read()); @@ -65,8 +72,12 @@ void adder::Tick() { << axis_adder_interface.tuser.read().to_uint64() << ") (addend = " << axis_adder_interface.tdata.read().to_uint64() << ")!" << std::endl; - std::cout << "Sending the " << count_sent_addends << "th addend over NoC to portal module " << std::endl; - count_sent_addends++; + + adder_tdata_tlast_fifo.push(std::make_tuple(axis_adder_interface.tdata.read(), axis_adder_interface.tlast.read())); + } + + if (adder_tdata_tlast_fifo.size() > 0) { //fifo not empty + //TODO: restrict fifo size, not doing so for now std::string src_port_name = module_name + ".axis_adder_master_interface"; std::string dst_port_name = "portal_inst.axis_add_portal_slave_interface"; cout << axis_adder_interface.tdata.read().to_uint64() << endl; @@ -77,14 +88,21 @@ void adder::Tick() { axis_adder_master_interface.tstrb.write(0); axis_adder_master_interface.tkeep.write(0); axis_adder_master_interface.tuser.write(src_addr); - axis_adder_master_interface.tlast.write(axis_adder_interface.tlast.read()); //true only for last addend - axis_adder_master_interface.tdata.write(axis_adder_interface.tdata.read().to_uint64()); + axis_adder_master_interface.tlast.write(std::get<1>(adder_tdata_tlast_fifo.front())); //true only for last addend + axis_adder_master_interface.tdata.write(std::get<0>(adder_tdata_tlast_fifo.front())); axis_adder_master_interface.tvalid.write(true); } else { axis_adder_master_interface.tvalid.write(false); } + //sent to portal module + if (axis_adder_master_interface.tvalid.read() && axis_adder_master_interface.tready.read()) { + count_sent_addends++; + std::cout << "Sent the " << count_sent_addends << "th addend over NoC to portal module " << std::endl; + adder_tdata_tlast_fifo.pop(); + } + // Print Sum and Exit if (t_finished.read()) { response_valid.write(1); @@ -105,10 +123,10 @@ void adder::RegisterModuleInfo() { RegisterAxisSlavePort(port_name, &axis_adder_interface, DATAW, 0); _num_noc_axis_slave_ports = 0; - _num_noc_axis_master_ports = 0; - _num_noc_aximm_slave_ports = 0; - _num_noc_aximm_master_ports = 0; + _num_noc_axis_master_ports = 0; + _num_noc_aximm_slave_ports = 0; + _num_noc_aximm_master_ports = 0; - port_name = module_name + ".axis_adder_master_interface"; - RegisterAxisMasterPort(port_name, &axis_adder_master_interface, DATAW, 0); + port_name = module_name + ".axis_adder_master_interface"; + RegisterAxisMasterPort(port_name, &axis_adder_master_interface, DATAW, 0); } \ No newline at end of file diff --git a/rad-sim/example-designs/add/modules/adder.hpp b/rad-sim/example-designs/add/modules/adder.hpp index 451f637..ff03075 100644 --- a/rad-sim/example-designs/add/modules/adder.hpp +++ b/rad-sim/example-designs/add/modules/adder.hpp @@ -10,11 +10,13 @@ #include #include #include +#include class adder : public RADSimModule { private: sc_bv adder_rolling_sum; // Sum to store result sc_signal t_finished; // Signal flagging that the transaction has terminated + std::queue, bool>> adder_tdata_tlast_fifo; public: RADSimDesignContext* radsim_design; diff --git a/rad-sim/example-designs/add/modules/client.cpp b/rad-sim/example-designs/add/modules/client.cpp index eabbcbb..f7906bf 100644 --- a/rad-sim/example-designs/add/modules/client.cpp +++ b/rad-sim/example-designs/add/modules/client.cpp @@ -56,7 +56,7 @@ void client::Tick() { if (!client_tdata_fifo.empty()) { sc_bv tdata = client_tdata_fifo.front(); std::string dst_port_name = "adder_inst.axis_adder_interface"; - cout << dst_port_name << endl; + //cout << dst_port_name << endl; uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 7f6a874..5d89898 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -33,18 +33,7 @@ void portal::Tick() { //sequential logic wait(); //Always @ positive edge of clock while (true) { - /*if (counter == 0) { - counter = 1; - } - else { - counter = 0; - } - portal_out.write(counter);*/ - //std::cout << module_name << ": Wire in is showing " << portal_in.read() << std::endl; - //std::cout << counter << std::endl; - - /*std::cout << axis_add_portal_slave_interface.tvalid.read() << std::endl; - std::cout << axis_add_portal_slave_interface.tready.read() << std::endl;*/ + if (axis_add_portal_slave_interface.tvalid.read() && axis_add_portal_slave_interface.tready.read()) { std::cout << "Also got here" << std:: endl; @@ -55,13 +44,7 @@ void portal::Tick() { //sequential logic data_to_buffer = axis_add_portal_slave_interface.tdata.read(); dest_device = 1; //for testing, fixed at 1 to send to RAD1 which has mult design got_data = true; - //} - //if (got_data) { - //std::cout << "counter : " << counter << std::endl; - //if (counter == 3) { - //if (counter == 0) { //always send, do not buffer in portal module bc moved that to interrad now - // counter = 0; - //portal_out.write(data_to_buffer); //works but replace with axi + portal_axis_master.tdata.write(data_to_buffer); portal_axis_master.tuser.write(dest_device); portal_axis_master.tvalid.write(true); @@ -96,10 +79,10 @@ void portal::RegisterModuleInfo() { //std::cout << port_name << std::endl; RegisterAxisSlavePort(port_name, &axis_add_portal_slave_interface, DATAW, 0); - /*_num_noc_axis_slave_ports = 0; + _num_noc_axis_slave_ports = 0; _num_noc_axis_master_ports = 0; _num_noc_aximm_slave_ports = 0; - _num_noc_aximm_master_ports = 0;*/ + _num_noc_aximm_master_ports = 0; port_name = module_name + ".axis_add_portal_master_interface"; RegisterAxisMasterPort(port_name, &axis_add_portal_master_interface, DATAW, 0); diff --git a/rad-sim/sim/design_context.cpp b/rad-sim/sim/design_context.cpp index 2f2208f..6079e8d 100644 --- a/rad-sim/sim/design_context.cpp +++ b/rad-sim/sim/design_context.cpp @@ -499,7 +499,7 @@ void RADSimDesignContext::ConnectModulesToNoC() { slave_port_it++) { //std::cout << "here" << std::endl; std::string port_name = slave_port_it->first; - std::cout << port_name << ", "; + //std::cout << port_name << ", "; unsigned int noc_id = std::get<0>(_port_placement[port_name]); //std::cout << _noc_axis_master_ports[noc_id][port_name] << std::endl; _axis_signals[axis_signal_id].Connect( diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 85b0f0c..ddae906 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -13,8 +13,6 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c all_signals.init(num_rads + 1); std::cout << "num_rads is " << num_rads << std::endl; - //for latency counters, elems zero-initialized to int 0 bc of {} - //std::array each_fifo_arr_latency_counters = {}; fifos_latency_counters.resize(num_rads); //std::cout << "fifos_latency_counters[0].size() " << fifos_latency_counters[0].size() << std::endl; @@ -27,16 +25,13 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c new_axis_signal = new axis_signal; //second signal (one for master, one for slave) all_axis_slave_signals.push_back(new_axis_signal); axis_slave_port* new_axis_slave_port = new axis_slave_port; + //new_axis_slave_port->tready.write(true); //initialize ready to true all_axis_slave_ports.push_back(new_axis_slave_port); axis_master_port* new_axis_master_port = new axis_master_port; all_axis_master_ports.push_back(new_axis_master_port); //for rising edge detection prev_valid.push_back(0); - //for latency counters - //fifos_latency_counters.push_back(each_fifo_arr_latency_counters); } - //SC_THREAD(writeFifo); - //SC_THREAD(readFifo); SC_CTHREAD(writeFifo, clk.pos()); SC_CTHREAD(readFifo, clk.pos()); @@ -80,35 +75,26 @@ void RADSimInterRad::writeFifo() { /* Always @ positive edge of the clock - Writes into fifo - TODO: iterate over all_axis_slave_ports entries, - TODO: check if the data is valid and only write into fifo then - TODO: write into the fifo corresponding to the dest. + Writes into fifo from axi interface + Iterates over all_axis_slave_ports entries, + Checks if the data is valid and only write into fifo then + Writes into the fifo corresponding to the dest. + TODO: use tdest instead of tuser TODO: automating adding all fields to curr_transaction */ //wait(); while (true) { - //testing fifo - //std::cout << "reached inter_rad " << std::endl; - //sc_bv curr_val = cluster->all_systems[0]->design_dut_inst->portal_out.read(); //this works, but try using signal instead - //sc_bv curr_val = all_signals[2]; //works but replacing with axi for (int i = 0; i < num_rads; i++) { struct axis_fields curr_transaction; curr_transaction.tdata = all_axis_slave_ports[i]->tdata.read(); //0 bc adder curr_transaction.tuser = all_axis_slave_ports[i]->tuser.read(); curr_transaction.tvalid = all_axis_slave_ports[i]->tvalid.read(); curr_transaction.tlast = all_axis_slave_ports[i]->tlast.read(); - //uint64_t dest_rad = curr_transaction.tuser.range(1, 0).to_uint64(); //for later, adding src rad too vs dest rad. currently just dest rad. - //std::cout << "inter_rad fifo free before write is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; - //if ((curr_val != 0) && (!wrote_yet)) { - //std::cout << "curr_transaction.tvalid: " << curr_transaction.tvalid << "prev_valid: " << prev_valid << std::endl; if (curr_transaction.tvalid && !prev_valid[i]) { //detect rising edge bc operating at higher clk freq than modules int dest_rad = curr_transaction.tuser.to_int64(); - std::cout << dest_rad << std::endl; + //std::cout << dest_rad << std::endl; if (this->fifos[dest_rad]->nb_write(curr_transaction) != false) { //there was an available slot to write to std::cout << "inter_rad fifo data WRITTEN is " << curr_transaction.tdata.to_uint64() << std::endl; - //std::cout << "inter_rad fifo free after write is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; - //wrote_yet = true; fifos_latency_counters[dest_rad].push_back(0); //for latency counters } } @@ -124,8 +110,9 @@ RADSimInterRad::readFifo() { /* Always @ positive edge of the clock Read from fifo slot - TODO: iterate thru all fifos - TODO: match the dest index of fifo to the dest rad + Iterates thru all fifos + Matches the dest index of fifo to the dest rad + TODO: use tdest instead of tuser TODO: automating adding all fields to curr_transaction currently hardcoded to pull from same fifo that we use in writeFifo */ @@ -151,7 +138,7 @@ RADSimInterRad::readFifo() { //std::cout << "inter_rad fifo data READ is " << this->fifos[0]->read() << std::endl; if (read_from_fifo.tvalid) { std::cout << "inter_rad fifo data READ is " << val.to_uint64() << std::endl; - std::cout << "dest_device: " << dest_device << std::endl; + //std::cout << "dest_device: " << dest_device << std::endl; //all_signals[1].write(val); //works but replacing with axi //all_axis_master_ports[1]->tdata.write(val); //1 bc sending to mult design all_axis_master_signals[dest_device]->tdata.write(val); //works if write to either this or line above @@ -159,11 +146,6 @@ RADSimInterRad::readFifo() { all_axis_master_signals[dest_device]->tlast.write(read_from_fifo.tlast); //std::cout << "inter_rad fifo free after READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; } - //std::cout << "radsim_inter_rad value is (val): " << val << std::endl; //used for testing - /*std::cout << "radsim_inter_rad value is (master_ports): " << all_axis_master_ports[1]->tdata.read() << std::endl; - std::cout << "radsim_inter_rad value is (master_signals): " << all_axis_master_signals[1]->tdata.read() << std::endl; - std::cout << "radsim_inter_rad value is (dut_inst): " << cluster->all_systems[1]->design_dut_inst->design_top_portal_axis_slave.tdata.read() << std::endl; - */ } else { //no data to be written to any RAD's portal module diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index fc75b1a..f818ef4 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -10,7 +10,7 @@ #include #define DATAW 128 -#define NUM_SLOTS 5 //number of fifo slots +#define NUM_SLOTS 5 //number of fifo slots, for now = NUM_ADDENDS #define DEST_RAD_LSB 0 #define DEST_RAD_MSB 7 From e04a26d6d3b05ca8efffbd8a90fb667f5a05be71 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 20 Mar 2024 10:59:13 -0400 Subject: [PATCH 033/127] SEGFAULT: temp commit working on bandwidth experiment --- .../example-designs/add/modules/portal.cpp | 57 ++++++++++++------- .../example-designs/add/modules/portal.hpp | 47 +++++++++------ rad-sim/sim/main.cpp | 2 +- rad-sim/sim/radsim_inter_rad.cpp | 11 +++- 4 files changed, 80 insertions(+), 37 deletions(-) diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 5d89898..95c66da 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -24,8 +24,8 @@ void portal::Assign() { //combinational logic int counter = 0; sc_bv data_to_buffer = 0; -sc_bv dest_device; //#define AXIS_USERW 66 -bool got_data = false; +sc_bv dest_device = 1; //for testing, fixed at 1 to send to RAD1 which has mult design; //#define AXIS_USERW 66 +//bool got_data = false; void portal::Tick() { //sequential logic portal_out.write(counter); //portal_out_axi.tdata.write(counter); @@ -36,31 +36,50 @@ void portal::Tick() { //sequential logic if (axis_add_portal_slave_interface.tvalid.read() && axis_add_portal_slave_interface.tready.read()) { - std::cout << "Also got here" << std:: endl; + //std::cout << "Also got here" << std:: endl; std::cout << "Add design sending data over portal module " << module_name << ": Got Transaction (user = " << axis_add_portal_slave_interface.tuser.read().to_uint64() << ") (addend = " << axis_add_portal_slave_interface.tdata.read().to_uint64() << ")!" << std::endl; data_to_buffer = axis_add_portal_slave_interface.tdata.read(); - dest_device = 1; //for testing, fixed at 1 to send to RAD1 which has mult design - got_data = true; - - portal_axis_master.tdata.write(data_to_buffer); + //got_data = true; + portal_axis_fields curr_transaction = { + axis_add_portal_slave_interface.tvalid.read(), + axis_add_portal_slave_interface.tready.read(), + axis_add_portal_slave_interface.tdata.read(), + axis_add_portal_slave_interface.tstrb.read(), + axis_add_portal_slave_interface.tkeep.read(), + axis_add_portal_slave_interface.tlast.read(), + axis_add_portal_slave_interface.tid.read(), + axis_add_portal_slave_interface.tdest.read(), + dest_device //tuser field + }; + + portal_axis_fifo.push(curr_transaction); + } + + if (portal_axis_fifo.size() > 0) { + portal_axis_fields curr_transaction = portal_axis_fifo.front(); + portal_axis_master.tdata.write(curr_transaction.tdata); portal_axis_master.tuser.write(dest_device); portal_axis_master.tvalid.write(true); - portal_axis_master.tlast.write(axis_add_portal_slave_interface.tlast.read()); - std::cout << "portal.cpp in add design sent dest_device: " << dest_device.to_int64() << std::endl; - portal_recvd.write(1); - if (axis_add_portal_slave_interface.tlast.read()) { - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - std::cout << "Add design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; - } - } - else { - //counter++; - portal_axis_master.tvalid.write(false); + portal_axis_master.tlast.write(curr_transaction.tlast); + } + else { + //counter++; + portal_axis_master.tvalid.write(false); + } + + if (portal_axis_master.tvalid.read() && portal_axis_master.tready.read()) { + //pop out of fifo + portal_axis_fifo.pop(); + std::cout << "portal.cpp in add design sent to dest_device: " << dest_device.to_int64() << std::endl; + portal_recvd.write(1); + if (portal_axis_master.tlast.read()) { + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + std::cout << "Add design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; } - //} + } wait(); } diff --git a/rad-sim/example-designs/add/modules/portal.hpp b/rad-sim/example-designs/add/modules/portal.hpp index 13bd593..4be6c78 100644 --- a/rad-sim/example-designs/add/modules/portal.hpp +++ b/rad-sim/example-designs/add/modules/portal.hpp @@ -12,24 +12,39 @@ #include class portal : public RADSimModule { + public: + struct portal_axis_fields { + bool tvalid; + bool tready; + sc_bv tdata; + sc_bv tstrb; + sc_bv tkeep; + bool tlast; + sc_bv tid; + sc_bv tdest; + sc_bv tuser; + }; + private: + std::queue portal_axis_fifo; + public: - RADSimDesignContext* radsim_design; - sc_in> portal_in; - sc_out> portal_out; - //try adding axis_master_port for portal_out - axis_master_port portal_axis_master; - axis_slave_port portal_axis_slave; - sc_out portal_recvd; //for testing: flag so add_driver keeps simulation going until data is sent to mult module - //Interfaces to the NoC - axis_slave_port axis_add_portal_slave_interface; - axis_master_port axis_add_portal_master_interface; + RADSimDesignContext* radsim_design; + sc_in> portal_in; + sc_out> portal_out; + //try adding axis_master_port for portal_out + axis_master_port portal_axis_master; + axis_slave_port portal_axis_slave; + sc_out portal_recvd; //for testing: flag so add_driver keeps simulation going until data is sent to mult module + //Interfaces to the NoC + axis_slave_port axis_add_portal_slave_interface; + axis_master_port axis_add_portal_master_interface; - portal(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg - ~portal(); + portal(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg + ~portal(); - void Assign(); // Combinational logic process - void Tick(); // Sequential logic process - SC_HAS_PROCESS(portal); - void RegisterModuleInfo(); //even tho did not add AXI Interface, need because is virtual fn in derived class + void Assign(); // Combinational logic process + void Tick(); // Sequential logic process + SC_HAS_PROCESS(portal); + void RegisterModuleInfo(); //even tho did not add AXI Interface, need because is virtual fn in derived class }; \ No newline at end of file diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index e3f562d..1250662 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -46,7 +46,7 @@ int sc_main(int argc, char *argv[]) { sc_clock *inter_rad_clk_sig = new sc_clock( "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED, use same period as sim driver RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); - blackbox->ConnectRadPair(0, 1); + blackbox->ConnectRadPair(0, 1); //TODO: comment out bc not using this blackbox->ConnectRadAxi(0); blackbox->ConnectRadAxi(1); diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index ddae906..d44be6e 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -82,7 +82,12 @@ RADSimInterRad::writeFifo() { TODO: use tdest instead of tuser TODO: automating adding all fields to curr_transaction */ - //wait(); + /*wait(); + for (int i = 0; i < num_rads; i++) { + all_axis_slave_signals[i]->tready.write(true); + }*/ + + wait(); while (true) { for (int i = 0; i < num_rads; i++) { struct axis_fields curr_transaction; @@ -90,6 +95,10 @@ RADSimInterRad::writeFifo() { curr_transaction.tuser = all_axis_slave_ports[i]->tuser.read(); curr_transaction.tvalid = all_axis_slave_ports[i]->tvalid.read(); curr_transaction.tlast = all_axis_slave_ports[i]->tlast.read(); + all_axis_slave_signals[i]->tready.write(true); + if (all_axis_slave_signals[i]->tready.read()) { + std::cout << "valid" << std::endl; + } if (curr_transaction.tvalid && !prev_valid[i]) { //detect rising edge bc operating at higher clk freq than modules int dest_rad = curr_transaction.tuser.to_int64(); //std::cout << dest_rad << std::endl; From e1b155077d219ed90401af392906712cecf3a363 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Fri, 22 Mar 2024 11:03:07 -0400 Subject: [PATCH 034/127] Temp commit: fifo in portal.cpp and handshaking works with test_ready_toggle workaround, need to solve without this hack --- .../example-designs/add/modules/portal.cpp | 42 +++++++++++++------ .../example-designs/add/modules/portal.hpp | 5 +-- rad-sim/sim/radsim_inter_rad.cpp | 8 ++-- 3 files changed, 35 insertions(+), 20 deletions(-) diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 95c66da..4672978 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -30,6 +30,8 @@ void portal::Tick() { //sequential logic portal_out.write(counter); //portal_out_axi.tdata.write(counter); portal_recvd.write(0); + portal_axis_master.tvalid.write(false); + bool test_ready_toggle = false; wait(); //Always @ positive edge of clock while (true) { @@ -58,26 +60,40 @@ void portal::Tick() { //sequential logic portal_axis_fifo.push(curr_transaction); } - if (portal_axis_fifo.size() > 0) { - portal_axis_fields curr_transaction = portal_axis_fifo.front(); - portal_axis_master.tdata.write(curr_transaction.tdata); - portal_axis_master.tuser.write(dest_device); - portal_axis_master.tvalid.write(true); - portal_axis_master.tlast.write(curr_transaction.tlast); + if ((portal_axis_fifo.size() > 0) && test_ready_toggle) { + portal_axis_fields curr_transaction = portal_axis_fifo.front(); + portal_axis_master.tdata.write(curr_transaction.tdata); + portal_axis_master.tuser.write(dest_device); + portal_axis_master.tvalid.write(true); + portal_axis_master.tlast.write(curr_transaction.tlast); + test_ready_toggle = false; } else { //counter++; + portal_axis_master.tdata.write(0); + portal_axis_master.tuser.write(dest_device); portal_axis_master.tvalid.write(false); + test_ready_toggle = true; } + + /*if (portal_axis_master.tvalid.read()) { + test_ready_toggle = !test_ready_toggle; + }*/ - if (portal_axis_master.tvalid.read() && portal_axis_master.tready.read()) { + if (portal_axis_master.tvalid.read() && portal_axis_master.tready.read()) { // && test_ready_toggle){ //pop out of fifo - portal_axis_fifo.pop(); - std::cout << "portal.cpp in add design sent to dest_device: " << dest_device.to_int64() << std::endl; - portal_recvd.write(1); - if (portal_axis_master.tlast.read()) { - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - std::cout << "Add design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; + if (!portal_axis_fifo.empty()) { + //test_ready_toggle = false; + portal_axis_fifo.pop(); + std::cout << "portal.cpp in add design sent to dest_device: " << dest_device.to_int64() << std::endl; + portal_recvd.write(1); + if (portal_axis_master.tlast.read()) { + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + std::cout << "Add design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; + } + } + else { //should never reach here because valid should be false if fifo is empty + std::cout << "reached here but why? portal_axis_fifo.size(): " << portal_axis_fifo.size() << std::endl; } } diff --git a/rad-sim/example-designs/add/modules/portal.hpp b/rad-sim/example-designs/add/modules/portal.hpp index 4be6c78..0b073ef 100644 --- a/rad-sim/example-designs/add/modules/portal.hpp +++ b/rad-sim/example-designs/add/modules/portal.hpp @@ -11,9 +11,7 @@ #include #include -class portal : public RADSimModule { - public: - struct portal_axis_fields { +struct portal_axis_fields { bool tvalid; bool tready; sc_bv tdata; @@ -25,6 +23,7 @@ class portal : public RADSimModule { sc_bv tuser; }; +class portal : public RADSimModule { private: std::queue portal_axis_fifo; diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index d44be6e..d1836c0 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -95,11 +95,11 @@ RADSimInterRad::writeFifo() { curr_transaction.tuser = all_axis_slave_ports[i]->tuser.read(); curr_transaction.tvalid = all_axis_slave_ports[i]->tvalid.read(); curr_transaction.tlast = all_axis_slave_ports[i]->tlast.read(); - all_axis_slave_signals[i]->tready.write(true); - if (all_axis_slave_signals[i]->tready.read()) { - std::cout << "valid" << std::endl; + all_axis_slave_ports[i]->tready.write(true); + if (all_axis_slave_ports[i]->tready.read()) { + //std::cout << "valid" << std::endl; } - if (curr_transaction.tvalid && !prev_valid[i]) { //detect rising edge bc operating at higher clk freq than modules + if (curr_transaction.tvalid) { //&& !prev_valid[i]) { //detect rising edge bc operating at higher clk freq than modules int dest_rad = curr_transaction.tuser.to_int64(); //std::cout << dest_rad << std::endl; if (this->fifos[dest_rad]->nb_write(curr_transaction) != false) { //there was an available slot to write to From 5f7ed5e1585538c9050b96a0838129bbc5c788a3 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Fri, 22 Mar 2024 11:05:58 -0400 Subject: [PATCH 035/127] TO DEBUG: simulation hangs with fifo in porta.cpp handshaking with inter_rad and some data is skipped --- rad-sim/example-designs/add/modules/portal.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 4672978..dda0f01 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -31,7 +31,7 @@ void portal::Tick() { //sequential logic //portal_out_axi.tdata.write(counter); portal_recvd.write(0); portal_axis_master.tvalid.write(false); - bool test_ready_toggle = false; + //bool test_ready_toggle = false; wait(); //Always @ positive edge of clock while (true) { @@ -60,20 +60,20 @@ void portal::Tick() { //sequential logic portal_axis_fifo.push(curr_transaction); } - if ((portal_axis_fifo.size() > 0) && test_ready_toggle) { + if ((portal_axis_fifo.size() > 0) ) { //&& test_ready_toggle) { portal_axis_fields curr_transaction = portal_axis_fifo.front(); portal_axis_master.tdata.write(curr_transaction.tdata); portal_axis_master.tuser.write(dest_device); portal_axis_master.tvalid.write(true); portal_axis_master.tlast.write(curr_transaction.tlast); - test_ready_toggle = false; + //test_ready_toggle = false; } else { //counter++; portal_axis_master.tdata.write(0); portal_axis_master.tuser.write(dest_device); portal_axis_master.tvalid.write(false); - test_ready_toggle = true; + //test_ready_toggle = true; } /*if (portal_axis_master.tvalid.read()) { From 8d4ec8d36c85221c6f9d1c78496034d0b5ccf9f0 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Fri, 22 Mar 2024 15:53:22 -0400 Subject: [PATCH 036/127] Fixed handshaking between portal.cpp and radsim_inter_rad.cpp but limited by data send every 2 clk cycles here and upstream --- rad-sim/example-designs/add/modules/adder.cpp | 6 ++++++ rad-sim/example-designs/add/modules/portal.cpp | 5 ++++- rad-sim/sim/radsim_inter_rad.cpp | 10 +++++++--- 3 files changed, 17 insertions(+), 4 deletions(-) diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index b4d4624..38e6be2 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -96,6 +96,12 @@ void adder::Tick() { axis_adder_master_interface.tvalid.write(false); } + //for testing: checking handshaking + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + if (curr_cycle < 200) { + std::cout << "axis_adder_master_interface.tvalid.read() " << axis_adder_master_interface.tvalid.read() << " on cycle " << curr_cycle << std::endl; + std::cout << "axis_adder_master_interface.tready.read() " << axis_adder_master_interface.tready.read() << " on cycle " << curr_cycle << std::endl; + } //sent to portal module if (axis_adder_master_interface.tvalid.read() && axis_adder_master_interface.tready.read()) { count_sent_addends++; diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index dda0f01..df118b3 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -80,7 +80,7 @@ void portal::Tick() { //sequential logic test_ready_toggle = !test_ready_toggle; }*/ - if (portal_axis_master.tvalid.read() && portal_axis_master.tready.read()) { // && test_ready_toggle){ + if (portal_axis_master.tvalid.read() && portal_axis_master.tready.read()) { // && test_ready_toggle) { //pop out of fifo if (!portal_axis_fifo.empty()) { //test_ready_toggle = false; @@ -96,6 +96,9 @@ void portal::Tick() { //sequential logic std::cout << "reached here but why? portal_axis_fifo.size(): " << portal_axis_fifo.size() << std::endl; } } + /*else if (!test_ready_toggle) { + test_ready_toggle = true; + }*/ wait(); } diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index d1836c0..fd235fa 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -96,16 +96,20 @@ RADSimInterRad::writeFifo() { curr_transaction.tvalid = all_axis_slave_ports[i]->tvalid.read(); curr_transaction.tlast = all_axis_slave_ports[i]->tlast.read(); all_axis_slave_ports[i]->tready.write(true); - if (all_axis_slave_ports[i]->tready.read()) { + /*if (all_axis_slave_ports[i]->tready.read()) { //std::cout << "valid" << std::endl; - } - if (curr_transaction.tvalid) { //&& !prev_valid[i]) { //detect rising edge bc operating at higher clk freq than modules + }*/ + if (curr_transaction.tvalid && all_axis_slave_ports[i]->tready.read()) { //&& !prev_valid[i]) { //detect rising edge bc operating at higher clk freq than modules int dest_rad = curr_transaction.tuser.to_int64(); //std::cout << dest_rad << std::endl; if (this->fifos[dest_rad]->nb_write(curr_transaction) != false) { //there was an available slot to write to std::cout << "inter_rad fifo data WRITTEN is " << curr_transaction.tdata.to_uint64() << std::endl; fifos_latency_counters[dest_rad].push_back(0); //for latency counters } + all_axis_slave_ports[i]->tready.write(false); + } + else if (!all_axis_slave_ports[i]->tready.read()) { + all_axis_slave_ports[i]->tready.write(true); } prev_valid[i] = curr_transaction.tvalid; } From 7f506b7aaaa6dfc188fd9eca87f90854a4a5b88f Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 25 Mar 2024 13:31:37 -0400 Subject: [PATCH 037/127] Updating naming on add portal.cpp to be generic, and removing remnants of sc_in/sc_out based older code for inter_rad and portal --- rad-sim/example-designs/add/add_top.cpp | 4 +- rad-sim/example-designs/add/modules/adder.cpp | 2 +- .../example-designs/add/modules/portal.cpp | 55 +++++++------------ .../example-designs/add/modules/portal.hpp | 12 ++-- .../mult/modules/portal_mult.cpp | 6 +- .../mult/modules/portal_mult.hpp | 4 +- rad-sim/example-designs/mult/mult_top.cpp | 4 +- rad-sim/sim/design_top.hpp | 4 +- rad-sim/sim/main.cpp | 6 +- rad-sim/sim/radsim_inter_rad.cpp | 4 +- 10 files changed, 43 insertions(+), 58 deletions(-) diff --git a/rad-sim/example-designs/add/add_top.cpp b/rad-sim/example-designs/add/add_top.cpp index 3a6ccec..58362e5 100644 --- a/rad-sim/example-designs/add/add_top.cpp +++ b/rad-sim/example-designs/add/add_top.cpp @@ -27,8 +27,8 @@ add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) module_name_str = "portal_inst"; std::strcpy(module_name, module_name_str.c_str()); portal_inst = new portal(module_name, radsim_design); - portal_inst->portal_in(this->portal_in); //connecting portal's portal_in to the parent class system_top's portal_in - portal_inst->portal_out(this->portal_out); + //portal_inst->portal_in(this->portal_in); //connecting portal's portal_in to the parent class system_top's portal_in + //portal_inst->portal_out(this->portal_out); //this->top_axis_portal_interface = &(portal_inst->axis_add_portal_slave_interface); portal_inst->portal_recvd(this->portal_recvd); diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index 38e6be2..19c30fd 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -79,7 +79,7 @@ void adder::Tick() { if (adder_tdata_tlast_fifo.size() > 0) { //fifo not empty //TODO: restrict fifo size, not doing so for now std::string src_port_name = module_name + ".axis_adder_master_interface"; - std::string dst_port_name = "portal_inst.axis_add_portal_slave_interface"; + std::string dst_port_name = "portal_inst.axis_portal_slave_interface"; cout << axis_adder_interface.tdata.read().to_uint64() << endl; uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index df118b3..a756ea6 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -1,6 +1,6 @@ #include -portal::portal(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg +portal::portal(const sc_module_name &name, RADSimDesignContext* radsim_design) : RADSimModule(name, radsim_design) { this->radsim_design = radsim_design; @@ -19,7 +19,7 @@ portal::~portal() {} void portal::Assign() { //combinational logic //maybe add reset signal later - axis_add_portal_slave_interface.tready.write(true); + axis_portal_slave_interface.tready.write(true); } int counter = 0; @@ -27,7 +27,7 @@ sc_bv data_to_buffer = 0; sc_bv dest_device = 1; //for testing, fixed at 1 to send to RAD1 which has mult design; //#define AXIS_USERW 66 //bool got_data = false; void portal::Tick() { //sequential logic - portal_out.write(counter); + //portal_out.write(counter); //portal_out_axi.tdata.write(counter); portal_recvd.write(0); portal_axis_master.tvalid.write(false); @@ -36,24 +36,24 @@ void portal::Tick() { //sequential logic //Always @ positive edge of clock while (true) { - if (axis_add_portal_slave_interface.tvalid.read() && - axis_add_portal_slave_interface.tready.read()) { + if (axis_portal_slave_interface.tvalid.read() && + axis_portal_slave_interface.tready.read()) { //std::cout << "Also got here" << std:: endl; std::cout << "Add design sending data over portal module " << module_name << ": Got Transaction (user = " - << axis_add_portal_slave_interface.tuser.read().to_uint64() << ") (addend = " - << axis_add_portal_slave_interface.tdata.read().to_uint64() << ")!" + << axis_portal_slave_interface.tuser.read().to_uint64() << ") (addend = " + << axis_portal_slave_interface.tdata.read().to_uint64() << ")!" << std::endl; - data_to_buffer = axis_add_portal_slave_interface.tdata.read(); + data_to_buffer = axis_portal_slave_interface.tdata.read(); //got_data = true; portal_axis_fields curr_transaction = { - axis_add_portal_slave_interface.tvalid.read(), - axis_add_portal_slave_interface.tready.read(), - axis_add_portal_slave_interface.tdata.read(), - axis_add_portal_slave_interface.tstrb.read(), - axis_add_portal_slave_interface.tkeep.read(), - axis_add_portal_slave_interface.tlast.read(), - axis_add_portal_slave_interface.tid.read(), - axis_add_portal_slave_interface.tdest.read(), + axis_portal_slave_interface.tvalid.read(), + axis_portal_slave_interface.tready.read(), + axis_portal_slave_interface.tdata.read(), + axis_portal_slave_interface.tstrb.read(), + axis_portal_slave_interface.tkeep.read(), + axis_portal_slave_interface.tlast.read(), + axis_portal_slave_interface.tid.read(), + axis_portal_slave_interface.tdest.read(), dest_device //tuser field }; @@ -105,30 +105,15 @@ void portal::Tick() { //sequential logic } void portal::RegisterModuleInfo() { - //I don't think this is needed unless I add AXI Interface -- nvm, need bc is virtual fn in derived class - //now adding AXI slave interface std::string port_name; _num_noc_axis_slave_ports = 0; _num_noc_axis_master_ports = 0; _num_noc_aximm_slave_ports = 0; _num_noc_aximm_master_ports = 0; - port_name = module_name + ".axis_add_portal_slave_interface"; - //std::cout << port_name << std::endl; - RegisterAxisSlavePort(port_name, &axis_add_portal_slave_interface, DATAW, 0); - - _num_noc_axis_slave_ports = 0; - _num_noc_axis_master_ports = 0; - _num_noc_aximm_slave_ports = 0; - _num_noc_aximm_master_ports = 0; - - port_name = module_name + ".axis_add_portal_master_interface"; - RegisterAxisMasterPort(port_name, &axis_add_portal_master_interface, DATAW, 0); - - /*port_name = module_name + ".portal_axis_master"; - RegisterAxisMasterPort(port_name, &portal_axis_master, DATAW, 0); - - port_name = module_name + ".portal_axis_slave"; - RegisterAxisSlavePort(port_name, &portal_axis_slave, DATAW, 0);*/ + port_name = module_name + ".axis_portal_slave_interface"; + RegisterAxisSlavePort(port_name, &axis_portal_slave_interface, DATAW, 0); + port_name = module_name + ".axis_portal_master_interface"; + RegisterAxisMasterPort(port_name, &axis_portal_master_interface, DATAW, 0); } \ No newline at end of file diff --git a/rad-sim/example-designs/add/modules/portal.hpp b/rad-sim/example-designs/add/modules/portal.hpp index 0b073ef..f373d20 100644 --- a/rad-sim/example-designs/add/modules/portal.hpp +++ b/rad-sim/example-designs/add/modules/portal.hpp @@ -29,17 +29,17 @@ class portal : public RADSimModule { public: RADSimDesignContext* radsim_design; - sc_in> portal_in; - sc_out> portal_out; - //try adding axis_master_port for portal_out + //sc_in> portal_in; + //sc_out> portal_out; + //axis ports for external access to inter_rad axis_master_port portal_axis_master; axis_slave_port portal_axis_slave; sc_out portal_recvd; //for testing: flag so add_driver keeps simulation going until data is sent to mult module //Interfaces to the NoC - axis_slave_port axis_add_portal_slave_interface; - axis_master_port axis_add_portal_master_interface; + axis_slave_port axis_portal_slave_interface; + axis_master_port axis_portal_master_interface; - portal(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg + portal(const sc_module_name &name, RADSimDesignContext* radsim_design); ~portal(); void Assign(); // Combinational logic process diff --git a/rad-sim/example-designs/mult/modules/portal_mult.cpp b/rad-sim/example-designs/mult/modules/portal_mult.cpp index 403dc60..f4c5829 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.cpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.cpp @@ -31,7 +31,7 @@ void portal_mult::Assign() { //combinational logic int counter_mult = 0; void portal_mult::Tick() { //sequential logic - portal_out.write(counter_mult); + //portal_out.write(counter_mult); wait(); //Always @ positive edge of clock while (true) { @@ -68,13 +68,13 @@ void portal_mult::Tick() { //sequential logic //added earlier for testing: writing alternating 0s and 1s to send data directly back to RAD0 with add design - if (counter_mult == 0) { + /*if (counter_mult == 0) { counter_mult = 1; } else { counter_mult = 0; } - portal_out.write(counter_mult); + portal_out.write(counter_mult);*/ //std::cout << module_name << ": Wire in is showing " << portal_in.read() << std::endl; //std::cout << counter << std::endl; wait(); diff --git a/rad-sim/example-designs/mult/modules/portal_mult.hpp b/rad-sim/example-designs/mult/modules/portal_mult.hpp index f8242c8..b5cb484 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.hpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.hpp @@ -16,8 +16,8 @@ class portal_mult : public RADSimModule { public: RADSimDesignContext* radsim_design; sc_in rst; - sc_in> portal_in; - sc_out> portal_out; + //sc_in> portal_in; + //sc_out> portal_out; //try adding axis_master_port for portal_out axis_master_port portal_axis_master; axis_slave_port portal_axis_slave; diff --git a/rad-sim/example-designs/mult/mult_top.cpp b/rad-sim/example-designs/mult/mult_top.cpp index 81e2bea..4dfd44d 100644 --- a/rad-sim/example-designs/mult/mult_top.cpp +++ b/rad-sim/example-designs/mult/mult_top.cpp @@ -28,8 +28,8 @@ mult_top::mult_top(const sc_module_name &name, RADSimDesignContext* radsim_desig module_name_str = "portal_inst"; std::strcpy(module_name, module_name_str.c_str()); portal_inst = new portal_mult(module_name, radsim_design); - portal_inst->portal_in(this->portal_in); //connecting portal's portal_in to the parent class system_top's portal_in - portal_inst->portal_out(this->portal_out); + //portal_inst->portal_in(this->portal_in); //connecting portal's portal_in to the parent class system_top's portal_in + //portal_inst->portal_out(this->portal_out); portal_inst->rst(rst); //this->top_axis_portal_interface = &(portal_inst->axis_mult_portal_slave_interface); diff --git a/rad-sim/sim/design_top.hpp b/rad-sim/sim/design_top.hpp index 15a5188..49c0cc5 100644 --- a/rad-sim/sim/design_top.hpp +++ b/rad-sim/sim/design_top.hpp @@ -7,8 +7,8 @@ class design_top : virtual public sc_module { public: - sc_in> portal_in; - sc_out> portal_out; + //sc_in> portal_in; + //sc_out> portal_out; axis_slave_port design_top_portal_axis_slave; //TODO: add back here, for now just directly putting into child class add_top axis_master_port design_top_portal_axis_master; }; \ No newline at end of file diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 1250662..ccfeb47 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -46,13 +46,13 @@ int sc_main(int argc, char *argv[]) { sc_clock *inter_rad_clk_sig = new sc_clock( "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED, use same period as sim driver RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); - blackbox->ConnectRadPair(0, 1); //TODO: comment out bc not using this + //blackbox->ConnectRadPair(0, 1); //TODO: comment out bc not using this blackbox->ConnectRadAxi(0); blackbox->ConnectRadAxi(1); int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); sc_bv<128> new_val; - sc_bv<128> old_val = system2->dut_inst->portal_in.read(); + sc_bv<128> old_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); while (cluster->AllRADsNotDone()) { sc_start(1, SC_NS); //std::cout << "read system portal_in: " << system->dut_inst->portal_in.read() << std::endl; @@ -60,7 +60,7 @@ int sc_main(int argc, char *argv[]) { new_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); //TODO: use handshaking properly //if (val != 0) { if (new_val != old_val) { //to ensure only displayed once - std::cout << "read system2 portal_in: " << new_val.to_uint64() << std::endl; + std::cout << "read system2 design_top_portal_axis_slave: " << new_val.to_uint64() << std::endl; old_val = new_val; } } diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index fd235fa..7936bd4 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -57,11 +57,11 @@ RADSimInterRad::~RADSimInterRad() { void RADSimInterRad::ConnectRadPair(int i, int j) { //this works - cluster->all_systems[i]->design_dut_inst->portal_in(all_signals[0]); + /*cluster->all_systems[i]->design_dut_inst->portal_in(all_signals[0]); //cluster->all_systems[i]->design_dut_inst->portal_out(all_signals[1]); //commenting out to demo sending data through fifo instead cluster->all_systems[i]->design_dut_inst->portal_out(all_signals[2]); cluster->all_systems[j]->design_dut_inst->portal_in(all_signals[1]); - cluster->all_systems[j]->design_dut_inst->portal_out(all_signals[0]); + cluster->all_systems[j]->design_dut_inst->portal_out(all_signals[0]);*/ } void From d6a9ef10a98073d8ddb8599abff7859be59edf9e Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 25 Mar 2024 13:41:30 -0400 Subject: [PATCH 038/127] Some code cleanup: removing old code, fixing comments --- rad-sim/example-designs/add/add_driver.cpp | 5 ++--- rad-sim/example-designs/add/add_system.cpp | 6 ++---- rad-sim/example-designs/add/add_system.hpp | 7 +------ rad-sim/example-designs/add/add_top.cpp | 18 ++++++------------ rad-sim/example-designs/add/add_top.hpp | 19 +++++-------------- .../example-designs/add/modules/portal.cpp | 2 -- rad-sim/example-designs/mult/mult_driver.cpp | 10 ++++------ rad-sim/example-designs/mult/mult_driver.hpp | 4 ++-- rad-sim/example-designs/mult/mult_system.cpp | 6 ++---- rad-sim/example-designs/mult/mult_system.hpp | 7 +------ rad-sim/example-designs/mult/mult_top.cpp | 11 ++++------- rad-sim/example-designs/mult/mult_top.hpp | 11 ++++------- 12 files changed, 33 insertions(+), 73 deletions(-) diff --git a/rad-sim/example-designs/add/add_driver.cpp b/rad-sim/example-designs/add/add_driver.cpp index 0c53bfa..0976a6e 100644 --- a/rad-sim/example-designs/add/add_driver.cpp +++ b/rad-sim/example-designs/add/add_driver.cpp @@ -69,8 +69,7 @@ void add_driver::sink() { end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); std::cout << "Simulation Cycles for Just Adder Portion = " << end_cycle - start_cycle << std::endl; - //sc_stop(); //AKB: replaced with setting flag - this->radsim_design_->set_rad_done(); //AKB ADDED: flag to replace sc_stop calls - return; //AKB ADDED + this->radsim_design_->set_rad_done(); //flag to replace sc_stop calls + return; } \ No newline at end of file diff --git a/rad-sim/example-designs/add/add_system.cpp b/rad-sim/example-designs/add/add_system.cpp index ca007ac..8b69f2c 100644 --- a/rad-sim/example-designs/add/add_system.cpp +++ b/rad-sim/example-designs/add/add_system.cpp @@ -16,7 +16,7 @@ add_system::add_system(const sc_module_name &name, sc_clock *driver_clk_sig, RAD driver_inst->portal_recvd(portal_recvd_sig); // Instantiate design top-level - dut_inst = new add_top("dut", radsim_design); //AKB added last arg + dut_inst = new add_top("dut", radsim_design); dut_inst->rst(rst_sig); dut_inst->client_tdata(client_tdata_sig); dut_inst->client_tlast(client_tlast_sig); @@ -25,10 +25,8 @@ add_system::add_system(const sc_module_name &name, sc_clock *driver_clk_sig, RAD dut_inst->response(response_sig); dut_inst->response_valid(response_valid_sig); dut_inst->portal_recvd(portal_recvd_sig); - //AKB added: + //add add_top as dut instance for parent class design_system this->design_dut_inst = dut_inst; - //dut_inst->portal_in(portal_in_sig); - //dut_inst->portal_out(portal_out_sig); } add_system::~add_system() { diff --git a/rad-sim/example-designs/add/add_system.hpp b/rad-sim/example-designs/add/add_system.hpp index 5085ed8..1509af8 100644 --- a/rad-sim/example-designs/add/add_system.hpp +++ b/rad-sim/example-designs/add/add_system.hpp @@ -21,13 +21,8 @@ class add_system : public design_system { sc_clock *sysclk; add_driver *driver_inst; add_top *dut_inst; - //AKB added: - //sc_signal portal_in_sig; - //sc_signal portal_out_sig; - //sc_in portal_in; - //sc_out portal_out; add_system(const sc_module_name &name, - sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design); //AKB added last arg + sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design); ~add_system(); }; \ No newline at end of file diff --git a/rad-sim/example-designs/add/add_top.cpp b/rad-sim/example-designs/add/add_top.cpp index 58362e5..81ba4cf 100644 --- a/rad-sim/example-designs/add/add_top.cpp +++ b/rad-sim/example-designs/add/add_top.cpp @@ -9,7 +9,7 @@ add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) module_name_str = "client_inst"; std::strcpy(module_name, module_name_str.c_str()); - client_inst = new client(module_name, 16, radsim_design); //AKB added last arg + client_inst = new client(module_name, 16, radsim_design); client_inst->rst(rst); client_inst->client_tdata(client_tdata); client_inst->client_tlast(client_tlast); @@ -18,31 +18,25 @@ add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) module_name_str = "adder_inst"; std::strcpy(module_name, module_name_str.c_str()); - adder_inst = new adder(module_name, radsim_design); //AKB added last arg + adder_inst = new adder(module_name, radsim_design); adder_inst->rst(rst); adder_inst->response(response); adder_inst->response_valid(response_valid); - //AKB: added code block for portal module + //create portal module module_name_str = "portal_inst"; std::strcpy(module_name, module_name_str.c_str()); portal_inst = new portal(module_name, radsim_design); - //portal_inst->portal_in(this->portal_in); //connecting portal's portal_in to the parent class system_top's portal_in - //portal_inst->portal_out(this->portal_out); - //this->top_axis_portal_interface = &(portal_inst->axis_add_portal_slave_interface); portal_inst->portal_recvd(this->portal_recvd); - //sig_portal_master_design_slave.Connect(portal_inst->portal_axis_master, this->design_top_portal_axis_slave); //Connect(axis_master_port &m, axis_slave_port &s) - //sig_design_master_portal_slave.Connect(this->design_top_portal_axis_master, portal_inst->portal_axis_slave); //connect master to master instead, to expose to top portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); - //this->design_top_portal_axis_master.ConnectToPort(portal_inst->portal_axis_master); //portal module drives top portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); //top drives portal bc top receives slave inputs radsim_design->BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add", "add.place", - "add.clks"); //AKB changed to ptr deref and added first arg - radsim_design->CreateSystemNoCs(rst); //AKB changed to ptr deref - radsim_design->ConnectModulesToNoC(); //AKB changed to ptr deref + "add.clks"); + radsim_design->CreateSystemNoCs(rst); + radsim_design->ConnectModulesToNoC(); } add_top::~add_top() { diff --git a/rad-sim/example-designs/add/add_top.hpp b/rad-sim/example-designs/add/add_top.hpp index 5ff561f..907ca19 100644 --- a/rad-sim/example-designs/add/add_top.hpp +++ b/rad-sim/example-designs/add/add_top.hpp @@ -3,18 +3,17 @@ #include #include #include -#include //AKB ADDED +#include #include #include -#include //AKB ADDED -#include //AKB ADDED +#include +#include class add_top : public design_top { -//class add_top : public sc_module { private: adder *adder_inst; client *client_inst; - portal *portal_inst; //AKB added + portal *portal_inst; public: sc_in rst; @@ -25,16 +24,8 @@ class add_top : public design_top { sc_out client_ready; sc_out> response; sc_out response_valid; - //AKB ADDED for portal module: - //sc_in portal_in; - //sc_out portal_out; sc_out portal_recvd; - //axis_slave_port design_top_portal_axis_slave; - //axis_master_port design_top_portal_axis_master; - //adding axis connections to portal module -- no longer needed - axis_signal sig_portal_master_design_slave; - axis_signal sig_design_master_portal_slave; - add_top(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB ADDED last arg + add_top(const sc_module_name &name, RADSimDesignContext* radsim_design); ~add_top(); }; \ No newline at end of file diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index a756ea6..1e2a2a6 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -27,8 +27,6 @@ sc_bv data_to_buffer = 0; sc_bv dest_device = 1; //for testing, fixed at 1 to send to RAD1 which has mult design; //#define AXIS_USERW 66 //bool got_data = false; void portal::Tick() { //sequential logic - //portal_out.write(counter); - //portal_out_axi.tdata.write(counter); portal_recvd.write(0); portal_axis_master.tvalid.write(false); //bool test_ready_toggle = false; diff --git a/rad-sim/example-designs/mult/mult_driver.cpp b/rad-sim/example-designs/mult/mult_driver.cpp index fa0fad1..fb6dad7 100644 --- a/rad-sim/example-designs/mult/mult_driver.cpp +++ b/rad-sim/example-designs/mult/mult_driver.cpp @@ -5,7 +5,7 @@ mult_driver::mult_driver(const sc_module_name &name, RADSimDesignContext* radsim_design) : sc_module(name) { - this->radsim_design_ = radsim_design; //AKB ADDED: update member for later use + this->radsim_design_ = radsim_design; //for simulation cycle count start_cycle = 0; @@ -57,7 +57,7 @@ void mult_driver::source() { } void mult_driver::sink() { - //works, temp commented out to test, returned now + while (!(response_valid.read())) { //&& mult_inter_rad_recvd.read())) { wait(); } @@ -70,9 +70,7 @@ void mult_driver::sink() { end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); std::cout << "Simulation Cycles for Just Mult Portion = " << end_cycle - start_cycle << std::endl; - - //sc_stop(); //AKB: replaced with setting flag - this->radsim_design_->set_rad_done(); //AKB ADDED: flag to replace sc_stop calls - return; //AKB ADDED + this->radsim_design_->set_rad_done(); //flag to replace sc_stop calls + return; } \ No newline at end of file diff --git a/rad-sim/example-designs/mult/mult_driver.hpp b/rad-sim/example-designs/mult/mult_driver.hpp index e254df3..f48ce86 100644 --- a/rad-sim/example-designs/mult/mult_driver.hpp +++ b/rad-sim/example-designs/mult/mult_driver.hpp @@ -13,7 +13,7 @@ class mult_driver : public sc_module { int start_cycle, end_cycle; std::queue numbers_to_send; int actual_product; - RADSimDesignContext* radsim_design_; //AKB ADDED: store ptr passed into constructor for use in source() and sink() + RADSimDesignContext* radsim_design_; //store ptr passed into constructor for use in source() and sink() public: sc_in clk; @@ -26,7 +26,7 @@ class mult_driver : public sc_module { sc_in response_valid; sc_in mult_inter_rad_recvd; - mult_driver(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB ADDED last arg + mult_driver(const sc_module_name &name, RADSimDesignContext* radsim_design); ~mult_driver(); void source(); diff --git a/rad-sim/example-designs/mult/mult_system.cpp b/rad-sim/example-designs/mult/mult_system.cpp index f17a3f7..811d083 100644 --- a/rad-sim/example-designs/mult/mult_system.cpp +++ b/rad-sim/example-designs/mult/mult_system.cpp @@ -16,7 +16,7 @@ mult_system::mult_system(const sc_module_name &name, sc_clock *driver_clk_sig, R driver_inst->mult_inter_rad_recvd(mult_inter_rad_recvd_sig); // Instantiate design top-level - dut_inst = new mult_top("dut", radsim_design); //AKB added last arg + dut_inst = new mult_top("dut", radsim_design); dut_inst->rst(rst_sig); dut_inst->client_tdata(client_tdata_sig); dut_inst->client_tlast(client_tlast_sig); @@ -24,11 +24,9 @@ mult_system::mult_system(const sc_module_name &name, sc_clock *driver_clk_sig, R dut_inst->client_ready(client_ready_sig); dut_inst->response(response_sig); dut_inst->response_valid(response_valid_sig); - //AKB added: + //add mult_top as dut instance for parent class design_system this->design_dut_inst = dut_inst; dut_inst->mult_inter_rad_recvd(mult_inter_rad_recvd_sig); - //dut_inst->portal_in(portal_in_sig); - //dut_inst->portal_out(portal_out_sig); } mult_system::~mult_system() { diff --git a/rad-sim/example-designs/mult/mult_system.hpp b/rad-sim/example-designs/mult/mult_system.hpp index 7561f85..eb02374 100644 --- a/rad-sim/example-designs/mult/mult_system.hpp +++ b/rad-sim/example-designs/mult/mult_system.hpp @@ -21,13 +21,8 @@ class mult_system : public design_system { sc_clock *sysclk; mult_driver *driver_inst; mult_top *dut_inst; - //AKB added: - //sc_signal portal_in_sig; - //sc_signal portal_out_sig; - //sc_in portal_in; - //sc_out portal_out; mult_system(const sc_module_name &name, - sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design); //AKB added last arg + sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design); ~mult_system(); }; \ No newline at end of file diff --git a/rad-sim/example-designs/mult/mult_top.cpp b/rad-sim/example-designs/mult/mult_top.cpp index 4dfd44d..ba55a2b 100644 --- a/rad-sim/example-designs/mult/mult_top.cpp +++ b/rad-sim/example-designs/mult/mult_top.cpp @@ -18,7 +18,7 @@ mult_top::mult_top(const sc_module_name &name, RADSimDesignContext* radsim_desig module_name_str = "mult_inst"; std::strcpy(module_name, module_name_str.c_str()); - mult_inst = new mult(module_name, radsim_design); //AKB added last arg + mult_inst = new mult(module_name, radsim_design); mult_inst->rst(rst); mult_inst->response(response); mult_inst->response_valid(response_valid); @@ -28,19 +28,16 @@ mult_top::mult_top(const sc_module_name &name, RADSimDesignContext* radsim_desig module_name_str = "portal_inst"; std::strcpy(module_name, module_name_str.c_str()); portal_inst = new portal_mult(module_name, radsim_design); - //portal_inst->portal_in(this->portal_in); //connecting portal's portal_in to the parent class system_top's portal_in - //portal_inst->portal_out(this->portal_out); portal_inst->rst(rst); - //this->top_axis_portal_interface = &(portal_inst->axis_mult_portal_slave_interface); //connect master to master instead, to expose to top portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); radsim_design->BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/mult", "mult.place", - "mult.clks"); //AKB changed to ptr deref, added first arg - radsim_design->CreateSystemNoCs(rst); //AKB changed to ptr deref - radsim_design->ConnectModulesToNoC(); //AKB changed to ptr deref + "mult.clks"); + radsim_design->CreateSystemNoCs(rst); + radsim_design->ConnectModulesToNoC(); } mult_top::~mult_top() { diff --git a/rad-sim/example-designs/mult/mult_top.hpp b/rad-sim/example-designs/mult/mult_top.hpp index 6c25fb8..b7d6532 100644 --- a/rad-sim/example-designs/mult/mult_top.hpp +++ b/rad-sim/example-designs/mult/mult_top.hpp @@ -3,17 +3,17 @@ #include #include #include -#include //AKB ADDED +#include #include #include -#include //AKB ADDED +#include #include class mult_top : public design_top { private: mult *mult_inst; client_mult *client_inst; - portal_mult *portal_inst; //AKB added + portal_mult *portal_inst; public: sc_in rst; @@ -24,11 +24,8 @@ class mult_top : public design_top { sc_out client_ready; sc_out> response; sc_out response_valid; - //AKB ADDED for portal module: - //sc_in portal_in; - //sc_out portal_out; sc_out mult_inter_rad_recvd; - mult_top(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB ADDED last arg + mult_top(const sc_module_name &name, RADSimDesignContext* radsim_design); ~mult_top(); }; \ No newline at end of file From 4f66e68be14cd0551c4cfcd04e6cbdc2d92cc1f7 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 25 Mar 2024 13:57:27 -0400 Subject: [PATCH 039/127] Add bw_counter based bandwidth contraint in radsim_inter_rad --- rad-sim/example-designs/add/modules/adder.cpp | 5 +++-- .../mult/modules/portal_mult.cpp | 5 +++-- rad-sim/sim/radsim_inter_rad.cpp | 20 ++++++++++++------- 3 files changed, 19 insertions(+), 11 deletions(-) diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index 19c30fd..4ca7f60 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -97,11 +97,12 @@ void adder::Tick() { } //for testing: checking handshaking - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + /*int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); if (curr_cycle < 200) { std::cout << "axis_adder_master_interface.tvalid.read() " << axis_adder_master_interface.tvalid.read() << " on cycle " << curr_cycle << std::endl; std::cout << "axis_adder_master_interface.tready.read() " << axis_adder_master_interface.tready.read() << " on cycle " << curr_cycle << std::endl; - } + }*/ + //sent to portal module if (axis_adder_master_interface.tvalid.read() && axis_adder_master_interface.tready.read()) { count_sent_addends++; diff --git a/rad-sim/example-designs/mult/modules/portal_mult.cpp b/rad-sim/example-designs/mult/modules/portal_mult.cpp index f4c5829..9c6e9a4 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.cpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.cpp @@ -38,8 +38,10 @@ void portal_mult::Tick() { //sequential logic // Receiving transaction from AXI-S interface if (portal_axis_slave.tvalid.read() && portal_axis_slave.tready.read()) { + //get current cycle + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //read - std::cout << module_name << ": Portal_Mult Module Got Transaction (user (in this case, this device ID) = " + std::cout << module_name << ": Portal_Mult Module Got Transaction on cycle " << curr_cycle << " (user (in this case, this device ID) = " << portal_axis_slave.tuser.read().to_uint64() << ") (addend = " << portal_axis_slave.tdata.read().to_uint64() << ")!" << std::endl; @@ -58,7 +60,6 @@ void portal_mult::Tick() { //sequential logic axis_mult_portal_master_interface.tvalid.write(true); //checking if last transaction and if so, printing current simulation cycle count if (portal_axis_slave.tlast.read()) { - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); std::cout << "Mult design portal_mult.cpp received last data via inter_rad at cycle " << curr_cycle << std::endl; } } diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 7936bd4..ef2980c 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -25,7 +25,7 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c new_axis_signal = new axis_signal; //second signal (one for master, one for slave) all_axis_slave_signals.push_back(new_axis_signal); axis_slave_port* new_axis_slave_port = new axis_slave_port; - //new_axis_slave_port->tready.write(true); //initialize ready to true + //new_axis_slave_port->tready.write(false); //initialize ready to false all_axis_slave_ports.push_back(new_axis_slave_port); axis_master_port* new_axis_master_port = new axis_master_port; all_axis_master_ports.push_back(new_axis_master_port); @@ -82,11 +82,11 @@ RADSimInterRad::writeFifo() { TODO: use tdest instead of tuser TODO: automating adding all fields to curr_transaction */ - /*wait(); + //wait(); for (int i = 0; i < num_rads; i++) { - all_axis_slave_signals[i]->tready.write(true); - }*/ - + all_axis_slave_signals[i]->tready.write(false); + } + int bw_counter = 0; wait(); while (true) { for (int i = 0; i < num_rads; i++) { @@ -95,7 +95,7 @@ RADSimInterRad::writeFifo() { curr_transaction.tuser = all_axis_slave_ports[i]->tuser.read(); curr_transaction.tvalid = all_axis_slave_ports[i]->tvalid.read(); curr_transaction.tlast = all_axis_slave_ports[i]->tlast.read(); - all_axis_slave_ports[i]->tready.write(true); + //all_axis_slave_ports[i]->tready.write(true); /*if (all_axis_slave_ports[i]->tready.read()) { //std::cout << "valid" << std::endl; }*/ @@ -109,7 +109,13 @@ RADSimInterRad::writeFifo() { all_axis_slave_ports[i]->tready.write(false); } else if (!all_axis_slave_ports[i]->tready.read()) { - all_axis_slave_ports[i]->tready.write(true); + if (bw_counter == 0) { + all_axis_slave_ports[i]->tready.write(true); + bw_counter = 0; + } + else { + bw_counter++; + } } prev_valid[i] = curr_transaction.tvalid; } From f1de03802f36955d85b79d760869f1a6f181f41a Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 25 Mar 2024 17:27:53 -0400 Subject: [PATCH 040/127] Snapshot of setup used for bandwidth experiments --- rad-sim/example-designs/add/modules/portal.cpp | 7 ++++--- rad-sim/sim/radsim_inter_rad.cpp | 15 +++++++++++---- rad-sim/sim/radsim_inter_rad.hpp | 4 +++- 3 files changed, 18 insertions(+), 8 deletions(-) diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 1e2a2a6..90bc902 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -34,10 +34,12 @@ void portal::Tick() { //sequential logic //Always @ positive edge of clock while (true) { + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + if (axis_portal_slave_interface.tvalid.read() && axis_portal_slave_interface.tready.read()) { //std::cout << "Also got here" << std:: endl; - std::cout << "Add design sending data over portal module " << module_name << ": Got Transaction (user = " + std::cout << "Add design raising valid data to send over portal module on cycle " << curr_cycle << " , will see valid high next clk cycle " << module_name << ": Got Transaction (user = " << axis_portal_slave_interface.tuser.read().to_uint64() << ") (addend = " << axis_portal_slave_interface.tdata.read().to_uint64() << ")!" << std::endl; @@ -83,10 +85,9 @@ void portal::Tick() { //sequential logic if (!portal_axis_fifo.empty()) { //test_ready_toggle = false; portal_axis_fifo.pop(); - std::cout << "portal.cpp in add design sent to dest_device: " << dest_device.to_int64() << std::endl; + std::cout << "portal.cpp in add design sent to dest_device " << dest_device.to_int64() << " on cycle " << curr_cycle << std::endl; portal_recvd.write(1); if (portal_axis_master.tlast.read()) { - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); std::cout << "Add design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; } } diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index ef2980c..c04b846 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -89,6 +89,10 @@ RADSimInterRad::writeFifo() { int bw_counter = 0; wait(); while (true) { + //get current cycle for experiments + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + + //iterate thru all RADs for (int i = 0; i < num_rads; i++) { struct axis_fields curr_transaction; curr_transaction.tdata = all_axis_slave_ports[i]->tdata.read(); //0 bc adder @@ -103,13 +107,13 @@ RADSimInterRad::writeFifo() { int dest_rad = curr_transaction.tuser.to_int64(); //std::cout << dest_rad << std::endl; if (this->fifos[dest_rad]->nb_write(curr_transaction) != false) { //there was an available slot to write to - std::cout << "inter_rad fifo data WRITTEN is " << curr_transaction.tdata.to_uint64() << std::endl; + std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << curr_transaction.tdata.to_uint64() << std::endl; fifos_latency_counters[dest_rad].push_back(0); //for latency counters } all_axis_slave_ports[i]->tready.write(false); } else if (!all_axis_slave_ports[i]->tready.read()) { - if (bw_counter == 0) { + if (bw_counter >= bw_limit) { all_axis_slave_ports[i]->tready.write(true); bw_counter = 0; } @@ -138,6 +142,9 @@ RADSimInterRad::readFifo() { while (true) { //std::cout << "inter_rad fifo free before READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; + //get current cycle for experiments + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + //sc_bv val = this->fifos[0]->read(); for (int i = 0; i < num_rads; i++) { //iterate through all rad's fifos //increment delay on all counters @@ -146,7 +153,7 @@ RADSimInterRad::readFifo() { fifos_latency_counters[i][j]++; } //try reading from front of fifo - if ((this->fifos[i]->num_available() != 0) && (fifos_latency_counters[i][0] == target_delay)){ //check that fifo is not empty + if ((this->fifos[i]->num_available() != 0) && (fifos_latency_counters[i][0] >= target_delay)){ //check that fifo is not empty //counter_delay = 0; //reset counter fifos_latency_counters[i].erase(fifos_latency_counters[i].begin()); //to reset counter, remove first elem struct axis_fields read_from_fifo; @@ -156,7 +163,7 @@ RADSimInterRad::readFifo() { //std::cout << "inter_rad fifo data READ is " << this->fifos[0]->read() << std::endl; if (read_from_fifo.tvalid) { - std::cout << "inter_rad fifo data READ is " << val.to_uint64() << std::endl; + std::cout << "inter_rad fifo data READ is " << val.to_uint64() << " on cycle " << curr_cycle << std::endl; //std::cout << "dest_device: " << dest_device << std::endl; //all_signals[1].write(val); //works but replacing with axi //all_axis_master_ports[1]->tdata.write(val); //1 bc sending to mult design diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index f818ef4..e1682b7 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -8,6 +8,7 @@ #include #include #include +#include #define DATAW 128 #define NUM_SLOTS 5 //number of fifo slots, for now = NUM_ADDENDS @@ -36,9 +37,10 @@ class RADSimInterRad : public sc_module { //sc_fifo> data_in_rad1 = sc_fifo>(2); //2 slots for now //sc_vector>> switch_port_fifos{"switch_port_fifos"}; //for latency - float latency_sec = 5.0*100 * pow(10, -9); //2.6 * pow(10, -6); + float latency_sec = 5.0*1 * pow(10, -9); //2.6 * pow(10, -6); float period_sec = 5.0 * pow(10, -9); int target_delay = ceil(latency_sec/period_sec); //number of cycles to delay + int bw_limit = 0; public: int num_rads; sc_in clk; From 546d996ad295412c004eedcf0b363d68c0ff8dbf Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 25 Mar 2024 18:04:59 -0400 Subject: [PATCH 041/127] Add RAD_DESTW to tdest port sizes --- rad-sim/example-designs/add/modules/portal.hpp | 2 +- rad-sim/sim/noc/axis_interface.hpp | 6 +++--- rad-sim/sim/radsim_defines.hpp | 3 +++ rad-sim/sim/radsim_inter_rad.hpp | 2 +- 4 files changed, 8 insertions(+), 5 deletions(-) diff --git a/rad-sim/example-designs/add/modules/portal.hpp b/rad-sim/example-designs/add/modules/portal.hpp index f373d20..7d097c9 100644 --- a/rad-sim/example-designs/add/modules/portal.hpp +++ b/rad-sim/example-designs/add/modules/portal.hpp @@ -19,7 +19,7 @@ struct portal_axis_fields { sc_bv tkeep; bool tlast; sc_bv tid; - sc_bv tdest; + sc_bv tdest; sc_bv tuser; }; diff --git a/rad-sim/sim/noc/axis_interface.hpp b/rad-sim/sim/noc/axis_interface.hpp index 997264a..e605eef 100644 --- a/rad-sim/sim/noc/axis_interface.hpp +++ b/rad-sim/sim/noc/axis_interface.hpp @@ -13,7 +13,7 @@ struct axis_master_port { sc_out> tkeep; sc_out tlast; sc_out> tid; - sc_out> tdest; + sc_out> tdest; sc_out> tuser; axis_master_port() @@ -62,7 +62,7 @@ struct axis_slave_port { sc_in> tkeep; sc_in tlast; sc_in> tid; - sc_in> tdest; + sc_in> tdest; sc_in> tuser; axis_slave_port() @@ -102,7 +102,7 @@ struct axis_signal { sc_signal> tkeep; sc_signal tlast; sc_signal> tid; - sc_signal> tdest; + sc_signal> tdest; sc_signal> tuser; axis_signal() diff --git a/rad-sim/sim/radsim_defines.hpp b/rad-sim/sim/radsim_defines.hpp index 99491ad..193f1c7 100644 --- a/rad-sim/sim/radsim_defines.hpp +++ b/rad-sim/sim/radsim_defines.hpp @@ -12,6 +12,9 @@ #define NOC_LINKS_DEST_INTERFACE_WIDTH 5 #define NOC_LINKS_WIDTH (NOC_LINKS_PAYLOAD_WIDTH + NOC_LINKS_VCID_WIDTH + NOC_LINKS_PACKETID_WIDTH + NOC_LINKS_DEST_WIDTH + NOC_LINKS_DEST_INTERFACE_WIDTH) +//RAD related parameters +#define RAD_DESTW 4 + // AXI Parameters #define AXIS_MAX_DATAW 1024 #define AXI4_MAX_DATAW 512 diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index e1682b7..fb16abf 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -23,7 +23,7 @@ struct axis_fields { sc_bv tkeep; bool tlast; sc_bv tid; - sc_bv tdest; + sc_bv tdest; sc_bv tuser; //needed to create sc_fifo of custom struct type friend std::ostream& operator<<(std::ostream& os, const axis_fields& I); From c167e717121dad90f8a37b3c960e0b06940caf70 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Thu, 28 Mar 2024 23:23:18 -0400 Subject: [PATCH 042/127] TEMP COMMIT, SIM STALLS: added dest RAD info to noc payload --- rad-sim/example-designs/add/modules/adder.cpp | 9 ++++++-- .../example-designs/add/modules/portal.cpp | 11 ++++++---- .../example-designs/add/modules/portal.hpp | 2 +- rad-sim/sim/noc/axis_interface.hpp | 6 ++--- rad-sim/sim/noc/axis_master_adapter.cpp | 6 ++++- rad-sim/sim/noc/axis_slave_adapter.cpp | 4 +++- rad-sim/sim/noc/sc_flit.cpp | 2 +- rad-sim/sim/noc/sc_flit.hpp | 4 ++-- rad-sim/sim/radsim_defines.hpp | 22 +++++++++++++------ rad-sim/sim/radsim_inter_rad.cpp | 5 +++-- rad-sim/sim/radsim_inter_rad.hpp | 2 +- 11 files changed, 48 insertions(+), 25 deletions(-) diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index 4ca7f60..c05da50 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -81,9 +81,14 @@ void adder::Tick() { std::string src_port_name = module_name + ".axis_adder_master_interface"; std::string dst_port_name = "portal_inst.axis_portal_slave_interface"; cout << axis_adder_interface.tdata.read().to_uint64() << endl; - uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref + sc_bv dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref - axis_adder_master_interface.tdest.write(dst_addr); + //sc_bv test_dst_addr = dst_addr; + sc_bv test_dst_addr = dst_addr; + std::cout << "dst_addr is " << dst_addr << " and test_dst_addr is" << test_dst_addr << std::endl; + sc_bv test_dst_addr2 = (test_dst_addr.range(3, 0), dst_addr.range(3,0)); //(test_dst_addr, dst_addr); + std::cout << "test_dst_addr2 is " << test_dst_addr2 << std::endl; + axis_adder_master_interface.tdest.write(test_dst_addr2); axis_adder_master_interface.tid.write(0); axis_adder_master_interface.tstrb.write(0); axis_adder_master_interface.tkeep.write(0); diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 90bc902..071fa3e 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -54,7 +54,7 @@ void portal::Tick() { //sequential logic axis_portal_slave_interface.tlast.read(), axis_portal_slave_interface.tid.read(), axis_portal_slave_interface.tdest.read(), - dest_device //tuser field + axis_portal_slave_interface.tuser.read() }; portal_axis_fifo.push(curr_transaction); @@ -63,7 +63,11 @@ void portal::Tick() { //sequential logic if ((portal_axis_fifo.size() > 0) ) { //&& test_ready_toggle) { portal_axis_fields curr_transaction = portal_axis_fifo.front(); portal_axis_master.tdata.write(curr_transaction.tdata); - portal_axis_master.tuser.write(dest_device); + portal_axis_master.tuser.write(curr_transaction.tuser); + std::cout << "before splitting gives me: " << curr_transaction.tdest << std::endl; + std::cout << "splitting gives me: " << curr_transaction.tdest.range(AXIS_DESTW-RAD_DESTW,AXIS_DESTW-1) << std::endl; + //portal_axis_master.tdest.write(curr_transaction.tdest.range(AXIS_DESTW,AXIS_DESTW+RAD_DESTW-1)); + portal_axis_master.tdest.write(curr_transaction.tdest); portal_axis_master.tvalid.write(true); portal_axis_master.tlast.write(curr_transaction.tlast); //test_ready_toggle = false; @@ -71,7 +75,6 @@ void portal::Tick() { //sequential logic else { //counter++; portal_axis_master.tdata.write(0); - portal_axis_master.tuser.write(dest_device); portal_axis_master.tvalid.write(false); //test_ready_toggle = true; } @@ -85,7 +88,7 @@ void portal::Tick() { //sequential logic if (!portal_axis_fifo.empty()) { //test_ready_toggle = false; portal_axis_fifo.pop(); - std::cout << "portal.cpp in add design sent to dest_device " << dest_device.to_int64() << " on cycle " << curr_cycle << std::endl; + std::cout << "portal.cpp in add design sent to dest_device " << portal_axis_master.tdest.read().to_uint64() << " on cycle " << curr_cycle << std::endl; portal_recvd.write(1); if (portal_axis_master.tlast.read()) { std::cout << "Add design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; diff --git a/rad-sim/example-designs/add/modules/portal.hpp b/rad-sim/example-designs/add/modules/portal.hpp index 7d097c9..f373d20 100644 --- a/rad-sim/example-designs/add/modules/portal.hpp +++ b/rad-sim/example-designs/add/modules/portal.hpp @@ -19,7 +19,7 @@ struct portal_axis_fields { sc_bv tkeep; bool tlast; sc_bv tid; - sc_bv tdest; + sc_bv tdest; sc_bv tuser; }; diff --git a/rad-sim/sim/noc/axis_interface.hpp b/rad-sim/sim/noc/axis_interface.hpp index e605eef..997264a 100644 --- a/rad-sim/sim/noc/axis_interface.hpp +++ b/rad-sim/sim/noc/axis_interface.hpp @@ -13,7 +13,7 @@ struct axis_master_port { sc_out> tkeep; sc_out tlast; sc_out> tid; - sc_out> tdest; + sc_out> tdest; sc_out> tuser; axis_master_port() @@ -62,7 +62,7 @@ struct axis_slave_port { sc_in> tkeep; sc_in tlast; sc_in> tid; - sc_in> tdest; + sc_in> tdest; sc_in> tuser; axis_slave_port() @@ -102,7 +102,7 @@ struct axis_signal { sc_signal> tkeep; sc_signal tlast; sc_signal> tid; - sc_signal> tdest; + sc_signal> tdest; sc_signal> tuser; axis_signal() diff --git a/rad-sim/sim/noc/axis_master_adapter.cpp b/rad-sim/sim/noc/axis_master_adapter.cpp index becf51b..9e7f99a 100644 --- a/rad-sim/sim/noc/axis_master_adapter.cpp +++ b/rad-sim/sim/noc/axis_master_adapter.cpp @@ -80,6 +80,7 @@ void axis_master_adapter::OutputEjection() { int vc_id = _ejected_booksim_flit->vc; if (_ejection_afifos[vc_id].size() < _ejection_afifo_depth) { // Create a SystemC flit and push it to its corresponding ejection FIFO + std::cout << "_ejected_booksim_flit->dest: " << _ejected_booksim_flit->dest << std::endl; sc_flit ejected_flit( _ejected_booksim_flit->head, _ejected_booksim_flit->tail, _ejected_booksim_flit->type, _ejected_booksim_flit->vc, @@ -215,6 +216,7 @@ void axis_master_adapter::write_sc_packet_to_axis_output( for (unsigned int flit_id = 0; flit_id < num_flits; flit_id++) { if (flit_id == 0) { + std::cout << "packet.GetFlit(flit_id)->_dest is " << packet.GetFlit(flit_id)->_dest << std::endl; dest = packet.GetFlit(flit_id)->_dest.to_uint(); dest_interface = packet.GetFlit(flit_id)->_dest_interface.to_uint(); } @@ -234,7 +236,9 @@ void axis_master_adapter::write_sc_packet_to_axis_output( else axis_port.tlast.write(false); axis_port.tid.write(dest_interface); - axis_port.tdest.write(dest); + std::cout << "testing AXIS RAD: " << AXIS_RAD(packet_bv) << std::endl; + axis_port.tdest.write(AXIS_RAD(packet_bv)); + //axis_port.tdest.write(dest); axis_port.tuser.write(AXIS_TUSER(packet_bv)); axis_port.tstrb.write(0); axis_port.tkeep.write(0); diff --git a/rad-sim/sim/noc/axis_slave_adapter.cpp b/rad-sim/sim/noc/axis_slave_adapter.cpp index 5a1a67e..ba76d40 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.cpp +++ b/rad-sim/sim/noc/axis_slave_adapter.cpp @@ -194,7 +194,9 @@ void axis_slave_adapter::InputPacketization() { AXIS_TLAST(packet_bv) = _input_axis_transaction.tlast.read(); AXIS_TUSER(packet_bv) = _input_axis_transaction.tuser.read(); AXIS_TDATA(packet_bv) = _input_axis_transaction.tdata.read(); - + std::cout << "_input_axis_transaction.tdest.read().range(AXIS_DESTW-1, AXIS_DESTW-RAD_DESTW)" << _input_axis_transaction.tdest.read().range(AXIS_DESTW-1, AXIS_DESTW-RAD_DESTW) << std::endl; + AXIS_RAD(packet_bv) = _input_axis_transaction.tdest.read().range(AXIS_DESTW-1, AXIS_DESTW-RAD_DESTW); + std::cout << "assigning AXIS_RAD(packet_bv) " << AXIS_RAD(packet_bv) << std::endl; // Form flits and push them to the injection FIFO for (unsigned int flit_id = 0; flit_id < _num_flits_per_packet[used_interface_id]; flit_id++) { diff --git a/rad-sim/sim/noc/sc_flit.cpp b/rad-sim/sim/noc/sc_flit.cpp index 87c25a1..884dfc4 100644 --- a/rad-sim/sim/noc/sc_flit.cpp +++ b/rad-sim/sim/noc/sc_flit.cpp @@ -15,7 +15,7 @@ sc_flit::sc_flit() { } sc_flit::sc_flit(bool head, bool tail, Flit::FlitType type, unsigned int vc_id, - const sc_uint &dest, + const sc_bv &dest, //used to be sc_uint const sc_bv &dest_interface, const sc_bv &packet_id, unsigned int sim_transaction_id) { diff --git a/rad-sim/sim/noc/sc_flit.hpp b/rad-sim/sim/noc/sc_flit.hpp index 66d9c38..a0f65d5 100644 --- a/rad-sim/sim/noc/sc_flit.hpp +++ b/rad-sim/sim/noc/sc_flit.hpp @@ -24,7 +24,7 @@ class sc_flit { Flit::FlitType _type; // Transaction type sc_bv _vc_id; // Virtual channel ID this flit uses sc_bv _packet_id; // Packet ID this flit belongs to - sc_bv _dest; // Packet destination + sc_bv _dest; // Packet destination sc_bv *_payload; // Payload data of the flit sc_bv _dest_interface; // Packet destination interface ID @@ -34,7 +34,7 @@ class sc_flit { sc_flit(); sc_flit(const sc_flit &f); sc_flit(bool head, bool tail, Flit::FlitType type, unsigned int vc_id, - const sc_uint &dest, + const sc_bv &dest, //used to be sc_uint const sc_bv &dest_interface, const sc_bv &packet_id, unsigned int sim_transaction_id); diff --git a/rad-sim/sim/radsim_defines.hpp b/rad-sim/sim/radsim_defines.hpp index 193f1c7..d309895 100644 --- a/rad-sim/sim/radsim_defines.hpp +++ b/rad-sim/sim/radsim_defines.hpp @@ -4,7 +4,7 @@ #define RADSIM_ROOT_DIR "/home/bassiabn/rad-sim/rad-flow/rad-sim" // NoC-related Parameters -#define NOC_LINKS_PAYLOAD_WIDTH 166 +#define NOC_LINKS_PAYLOAD_WIDTH 166 + 4 #define NOC_LINKS_VCID_WIDTH 3 #define NOC_LINKS_PACKETID_WIDTH 32 #define NOC_LINKS_TYPEID_WIDTH 3 @@ -24,7 +24,7 @@ #define AXIS_STRBW 8 #define AXIS_KEEPW 8 #define AXIS_IDW NOC_LINKS_PACKETID_WIDTH -#define AXIS_DESTW NOC_LINKS_DEST_WIDTH +#define AXIS_DESTW NOC_LINKS_DEST_WIDTH + RAD_DESTW #define AXI4_IDW 8 #define AXI4_ADDRW 64 #define AXI4_LENW 8 @@ -34,14 +34,22 @@ #define AXI4_CTRLW (AXI4_LENW + AXI4_SIZEW + AXI4_BURSTW) // AXI Packetization Defines -#define AXIS_PAYLOADW (AXIS_MAX_DATAW + AXIS_USERW + 1) +#define AXIS_PAYLOADW (AXIS_MAX_DATAW + AXIS_USERW + RAD_DESTW + 1) #define AXIS_TLAST(t) t.range(0, 0) #define AXIS_TUSER(t) t.range(AXIS_USERW, 1) #define AXIS_TDATA(t) t.range(AXIS_MAX_DATAW + AXIS_USERW, AXIS_USERW + 1) -#define AXIS_TSTRB(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW, AXIS_MAX_DATAW + AXIS_USERW + 1) -#define AXIS_TKEEP(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW, AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + 1) -#define AXIS_TID(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW, AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + 1) -#define AXIS_TDEST(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + AXIS_DESTW, AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + 1) +#define AXIS_RAD(t) t.range(RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW, AXIS_MAX_DATAW + AXIS_USERW + 1) + +#define AXIS_TSTRB(t) t.range(RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW, RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW + 1) +#define AXIS_TKEEP(t) t.range(RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW, RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + 1) +#define AXIS_TID(t) t.range(RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW, RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + 1) +#define AXIS_TDEST(t) t.range(RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + AXIS_DESTW - RAD_DESTW, RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + 1) + +//#define AXIS_TSTRB(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW, AXIS_MAX_DATAW + AXIS_USERW + 1) +//#define AXIS_TKEEP(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW, AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + 1) +//#define AXIS_TID(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW, AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + 1) +//#define AXIS_TDEST(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + AXIS_DESTW - RAD_DESTW, AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + 1) +//#define AXIS_RAD(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + AXIS_DESTW, AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + AXIS_DESTW - RAD_DESTW + 1) #define AXIS_TUSER_RANGE(t, s, e) t.range(1 + e, 1 + s) #define AXIS_TRANSACTION_WIDTH (AXIS_MAX_DATAW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + AXIS_DESTW + AXIS_USERW + 1) #define AXI4_PAYLOADW (AXI4_MAX_DATAW + AXI4_RESPW + AXI4_USERW + 1) diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index c04b846..59c22bc 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -97,6 +97,7 @@ RADSimInterRad::writeFifo() { struct axis_fields curr_transaction; curr_transaction.tdata = all_axis_slave_ports[i]->tdata.read(); //0 bc adder curr_transaction.tuser = all_axis_slave_ports[i]->tuser.read(); + curr_transaction.tdest = all_axis_slave_ports[i]->tdest.read(); curr_transaction.tvalid = all_axis_slave_ports[i]->tvalid.read(); curr_transaction.tlast = all_axis_slave_ports[i]->tlast.read(); //all_axis_slave_ports[i]->tready.write(true); @@ -104,7 +105,7 @@ RADSimInterRad::writeFifo() { //std::cout << "valid" << std::endl; }*/ if (curr_transaction.tvalid && all_axis_slave_ports[i]->tready.read()) { //&& !prev_valid[i]) { //detect rising edge bc operating at higher clk freq than modules - int dest_rad = curr_transaction.tuser.to_int64(); + int dest_rad = curr_transaction.tdest.to_int64(); //std::cout << dest_rad << std::endl; if (this->fifos[dest_rad]->nb_write(curr_transaction) != false) { //there was an available slot to write to std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << curr_transaction.tdata.to_uint64() << std::endl; @@ -159,7 +160,7 @@ RADSimInterRad::readFifo() { struct axis_fields read_from_fifo; this->fifos[i]->nb_read(read_from_fifo); sc_bv val = read_from_fifo.tdata; - int dest_device = read_from_fifo.tuser.to_uint64(); //#define AXIS_USERW 66 + int dest_device = read_from_fifo.tdest.to_uint64(); //#define AXIS_USERW 66 //std::cout << "inter_rad fifo data READ is " << this->fifos[0]->read() << std::endl; if (read_from_fifo.tvalid) { diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index fb16abf..e1682b7 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -23,7 +23,7 @@ struct axis_fields { sc_bv tkeep; bool tlast; sc_bv tid; - sc_bv tdest; + sc_bv tdest; sc_bv tuser; //needed to create sc_fifo of custom struct type friend std::ostream& operator<<(std::ostream& os, const axis_fields& I); From 777f1f75dc44b1a9eaafdcca5db89764a46c3701 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 1 Apr 2024 00:25:04 -0400 Subject: [PATCH 043/127] Revert to f1de03802f36955d85b79d760869f1a6f181f41a --- rad-sim/example-designs/add/modules/adder.cpp | 9 ++----- .../example-designs/add/modules/portal.cpp | 11 +++----- rad-sim/sim/noc/axis_master_adapter.cpp | 6 +---- rad-sim/sim/noc/axis_slave_adapter.cpp | 4 +-- rad-sim/sim/noc/sc_flit.cpp | 2 +- rad-sim/sim/noc/sc_flit.hpp | 4 +-- rad-sim/sim/radsim_defines.hpp | 25 ++++++------------- rad-sim/sim/radsim_inter_rad.cpp | 5 ++-- 8 files changed, 20 insertions(+), 46 deletions(-) diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index c05da50..4ca7f60 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -81,14 +81,9 @@ void adder::Tick() { std::string src_port_name = module_name + ".axis_adder_master_interface"; std::string dst_port_name = "portal_inst.axis_portal_slave_interface"; cout << axis_adder_interface.tdata.read().to_uint64() << endl; - sc_bv dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref + uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref - //sc_bv test_dst_addr = dst_addr; - sc_bv test_dst_addr = dst_addr; - std::cout << "dst_addr is " << dst_addr << " and test_dst_addr is" << test_dst_addr << std::endl; - sc_bv test_dst_addr2 = (test_dst_addr.range(3, 0), dst_addr.range(3,0)); //(test_dst_addr, dst_addr); - std::cout << "test_dst_addr2 is " << test_dst_addr2 << std::endl; - axis_adder_master_interface.tdest.write(test_dst_addr2); + axis_adder_master_interface.tdest.write(dst_addr); axis_adder_master_interface.tid.write(0); axis_adder_master_interface.tstrb.write(0); axis_adder_master_interface.tkeep.write(0); diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 071fa3e..90bc902 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -54,7 +54,7 @@ void portal::Tick() { //sequential logic axis_portal_slave_interface.tlast.read(), axis_portal_slave_interface.tid.read(), axis_portal_slave_interface.tdest.read(), - axis_portal_slave_interface.tuser.read() + dest_device //tuser field }; portal_axis_fifo.push(curr_transaction); @@ -63,11 +63,7 @@ void portal::Tick() { //sequential logic if ((portal_axis_fifo.size() > 0) ) { //&& test_ready_toggle) { portal_axis_fields curr_transaction = portal_axis_fifo.front(); portal_axis_master.tdata.write(curr_transaction.tdata); - portal_axis_master.tuser.write(curr_transaction.tuser); - std::cout << "before splitting gives me: " << curr_transaction.tdest << std::endl; - std::cout << "splitting gives me: " << curr_transaction.tdest.range(AXIS_DESTW-RAD_DESTW,AXIS_DESTW-1) << std::endl; - //portal_axis_master.tdest.write(curr_transaction.tdest.range(AXIS_DESTW,AXIS_DESTW+RAD_DESTW-1)); - portal_axis_master.tdest.write(curr_transaction.tdest); + portal_axis_master.tuser.write(dest_device); portal_axis_master.tvalid.write(true); portal_axis_master.tlast.write(curr_transaction.tlast); //test_ready_toggle = false; @@ -75,6 +71,7 @@ void portal::Tick() { //sequential logic else { //counter++; portal_axis_master.tdata.write(0); + portal_axis_master.tuser.write(dest_device); portal_axis_master.tvalid.write(false); //test_ready_toggle = true; } @@ -88,7 +85,7 @@ void portal::Tick() { //sequential logic if (!portal_axis_fifo.empty()) { //test_ready_toggle = false; portal_axis_fifo.pop(); - std::cout << "portal.cpp in add design sent to dest_device " << portal_axis_master.tdest.read().to_uint64() << " on cycle " << curr_cycle << std::endl; + std::cout << "portal.cpp in add design sent to dest_device " << dest_device.to_int64() << " on cycle " << curr_cycle << std::endl; portal_recvd.write(1); if (portal_axis_master.tlast.read()) { std::cout << "Add design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; diff --git a/rad-sim/sim/noc/axis_master_adapter.cpp b/rad-sim/sim/noc/axis_master_adapter.cpp index 9e7f99a..becf51b 100644 --- a/rad-sim/sim/noc/axis_master_adapter.cpp +++ b/rad-sim/sim/noc/axis_master_adapter.cpp @@ -80,7 +80,6 @@ void axis_master_adapter::OutputEjection() { int vc_id = _ejected_booksim_flit->vc; if (_ejection_afifos[vc_id].size() < _ejection_afifo_depth) { // Create a SystemC flit and push it to its corresponding ejection FIFO - std::cout << "_ejected_booksim_flit->dest: " << _ejected_booksim_flit->dest << std::endl; sc_flit ejected_flit( _ejected_booksim_flit->head, _ejected_booksim_flit->tail, _ejected_booksim_flit->type, _ejected_booksim_flit->vc, @@ -216,7 +215,6 @@ void axis_master_adapter::write_sc_packet_to_axis_output( for (unsigned int flit_id = 0; flit_id < num_flits; flit_id++) { if (flit_id == 0) { - std::cout << "packet.GetFlit(flit_id)->_dest is " << packet.GetFlit(flit_id)->_dest << std::endl; dest = packet.GetFlit(flit_id)->_dest.to_uint(); dest_interface = packet.GetFlit(flit_id)->_dest_interface.to_uint(); } @@ -236,9 +234,7 @@ void axis_master_adapter::write_sc_packet_to_axis_output( else axis_port.tlast.write(false); axis_port.tid.write(dest_interface); - std::cout << "testing AXIS RAD: " << AXIS_RAD(packet_bv) << std::endl; - axis_port.tdest.write(AXIS_RAD(packet_bv)); - //axis_port.tdest.write(dest); + axis_port.tdest.write(dest); axis_port.tuser.write(AXIS_TUSER(packet_bv)); axis_port.tstrb.write(0); axis_port.tkeep.write(0); diff --git a/rad-sim/sim/noc/axis_slave_adapter.cpp b/rad-sim/sim/noc/axis_slave_adapter.cpp index ba76d40..5a1a67e 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.cpp +++ b/rad-sim/sim/noc/axis_slave_adapter.cpp @@ -194,9 +194,7 @@ void axis_slave_adapter::InputPacketization() { AXIS_TLAST(packet_bv) = _input_axis_transaction.tlast.read(); AXIS_TUSER(packet_bv) = _input_axis_transaction.tuser.read(); AXIS_TDATA(packet_bv) = _input_axis_transaction.tdata.read(); - std::cout << "_input_axis_transaction.tdest.read().range(AXIS_DESTW-1, AXIS_DESTW-RAD_DESTW)" << _input_axis_transaction.tdest.read().range(AXIS_DESTW-1, AXIS_DESTW-RAD_DESTW) << std::endl; - AXIS_RAD(packet_bv) = _input_axis_transaction.tdest.read().range(AXIS_DESTW-1, AXIS_DESTW-RAD_DESTW); - std::cout << "assigning AXIS_RAD(packet_bv) " << AXIS_RAD(packet_bv) << std::endl; + // Form flits and push them to the injection FIFO for (unsigned int flit_id = 0; flit_id < _num_flits_per_packet[used_interface_id]; flit_id++) { diff --git a/rad-sim/sim/noc/sc_flit.cpp b/rad-sim/sim/noc/sc_flit.cpp index 884dfc4..87c25a1 100644 --- a/rad-sim/sim/noc/sc_flit.cpp +++ b/rad-sim/sim/noc/sc_flit.cpp @@ -15,7 +15,7 @@ sc_flit::sc_flit() { } sc_flit::sc_flit(bool head, bool tail, Flit::FlitType type, unsigned int vc_id, - const sc_bv &dest, //used to be sc_uint + const sc_uint &dest, const sc_bv &dest_interface, const sc_bv &packet_id, unsigned int sim_transaction_id) { diff --git a/rad-sim/sim/noc/sc_flit.hpp b/rad-sim/sim/noc/sc_flit.hpp index a0f65d5..66d9c38 100644 --- a/rad-sim/sim/noc/sc_flit.hpp +++ b/rad-sim/sim/noc/sc_flit.hpp @@ -24,7 +24,7 @@ class sc_flit { Flit::FlitType _type; // Transaction type sc_bv _vc_id; // Virtual channel ID this flit uses sc_bv _packet_id; // Packet ID this flit belongs to - sc_bv _dest; // Packet destination + sc_bv _dest; // Packet destination sc_bv *_payload; // Payload data of the flit sc_bv _dest_interface; // Packet destination interface ID @@ -34,7 +34,7 @@ class sc_flit { sc_flit(); sc_flit(const sc_flit &f); sc_flit(bool head, bool tail, Flit::FlitType type, unsigned int vc_id, - const sc_bv &dest, //used to be sc_uint + const sc_uint &dest, const sc_bv &dest_interface, const sc_bv &packet_id, unsigned int sim_transaction_id); diff --git a/rad-sim/sim/radsim_defines.hpp b/rad-sim/sim/radsim_defines.hpp index d309895..99491ad 100644 --- a/rad-sim/sim/radsim_defines.hpp +++ b/rad-sim/sim/radsim_defines.hpp @@ -4,7 +4,7 @@ #define RADSIM_ROOT_DIR "/home/bassiabn/rad-sim/rad-flow/rad-sim" // NoC-related Parameters -#define NOC_LINKS_PAYLOAD_WIDTH 166 + 4 +#define NOC_LINKS_PAYLOAD_WIDTH 166 #define NOC_LINKS_VCID_WIDTH 3 #define NOC_LINKS_PACKETID_WIDTH 32 #define NOC_LINKS_TYPEID_WIDTH 3 @@ -12,9 +12,6 @@ #define NOC_LINKS_DEST_INTERFACE_WIDTH 5 #define NOC_LINKS_WIDTH (NOC_LINKS_PAYLOAD_WIDTH + NOC_LINKS_VCID_WIDTH + NOC_LINKS_PACKETID_WIDTH + NOC_LINKS_DEST_WIDTH + NOC_LINKS_DEST_INTERFACE_WIDTH) -//RAD related parameters -#define RAD_DESTW 4 - // AXI Parameters #define AXIS_MAX_DATAW 1024 #define AXI4_MAX_DATAW 512 @@ -24,7 +21,7 @@ #define AXIS_STRBW 8 #define AXIS_KEEPW 8 #define AXIS_IDW NOC_LINKS_PACKETID_WIDTH -#define AXIS_DESTW NOC_LINKS_DEST_WIDTH + RAD_DESTW +#define AXIS_DESTW NOC_LINKS_DEST_WIDTH #define AXI4_IDW 8 #define AXI4_ADDRW 64 #define AXI4_LENW 8 @@ -34,22 +31,14 @@ #define AXI4_CTRLW (AXI4_LENW + AXI4_SIZEW + AXI4_BURSTW) // AXI Packetization Defines -#define AXIS_PAYLOADW (AXIS_MAX_DATAW + AXIS_USERW + RAD_DESTW + 1) +#define AXIS_PAYLOADW (AXIS_MAX_DATAW + AXIS_USERW + 1) #define AXIS_TLAST(t) t.range(0, 0) #define AXIS_TUSER(t) t.range(AXIS_USERW, 1) #define AXIS_TDATA(t) t.range(AXIS_MAX_DATAW + AXIS_USERW, AXIS_USERW + 1) -#define AXIS_RAD(t) t.range(RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW, AXIS_MAX_DATAW + AXIS_USERW + 1) - -#define AXIS_TSTRB(t) t.range(RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW, RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW + 1) -#define AXIS_TKEEP(t) t.range(RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW, RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + 1) -#define AXIS_TID(t) t.range(RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW, RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + 1) -#define AXIS_TDEST(t) t.range(RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + AXIS_DESTW - RAD_DESTW, RAD_DESTW + AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + 1) - -//#define AXIS_TSTRB(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW, AXIS_MAX_DATAW + AXIS_USERW + 1) -//#define AXIS_TKEEP(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW, AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + 1) -//#define AXIS_TID(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW, AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + 1) -//#define AXIS_TDEST(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + AXIS_DESTW - RAD_DESTW, AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + 1) -//#define AXIS_RAD(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + AXIS_DESTW, AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + AXIS_DESTW - RAD_DESTW + 1) +#define AXIS_TSTRB(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW, AXIS_MAX_DATAW + AXIS_USERW + 1) +#define AXIS_TKEEP(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW, AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + 1) +#define AXIS_TID(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW, AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + 1) +#define AXIS_TDEST(t) t.range(AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + AXIS_DESTW, AXIS_MAX_DATAW + AXIS_USERW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + 1) #define AXIS_TUSER_RANGE(t, s, e) t.range(1 + e, 1 + s) #define AXIS_TRANSACTION_WIDTH (AXIS_MAX_DATAW + AXIS_STRBW + AXIS_KEEPW + AXIS_IDW + AXIS_DESTW + AXIS_USERW + 1) #define AXI4_PAYLOADW (AXI4_MAX_DATAW + AXI4_RESPW + AXI4_USERW + 1) diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 59c22bc..c04b846 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -97,7 +97,6 @@ RADSimInterRad::writeFifo() { struct axis_fields curr_transaction; curr_transaction.tdata = all_axis_slave_ports[i]->tdata.read(); //0 bc adder curr_transaction.tuser = all_axis_slave_ports[i]->tuser.read(); - curr_transaction.tdest = all_axis_slave_ports[i]->tdest.read(); curr_transaction.tvalid = all_axis_slave_ports[i]->tvalid.read(); curr_transaction.tlast = all_axis_slave_ports[i]->tlast.read(); //all_axis_slave_ports[i]->tready.write(true); @@ -105,7 +104,7 @@ RADSimInterRad::writeFifo() { //std::cout << "valid" << std::endl; }*/ if (curr_transaction.tvalid && all_axis_slave_ports[i]->tready.read()) { //&& !prev_valid[i]) { //detect rising edge bc operating at higher clk freq than modules - int dest_rad = curr_transaction.tdest.to_int64(); + int dest_rad = curr_transaction.tuser.to_int64(); //std::cout << dest_rad << std::endl; if (this->fifos[dest_rad]->nb_write(curr_transaction) != false) { //there was an available slot to write to std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << curr_transaction.tdata.to_uint64() << std::endl; @@ -160,7 +159,7 @@ RADSimInterRad::readFifo() { struct axis_fields read_from_fifo; this->fifos[i]->nb_read(read_from_fifo); sc_bv val = read_from_fifo.tdata; - int dest_device = read_from_fifo.tdest.to_uint64(); //#define AXIS_USERW 66 + int dest_device = read_from_fifo.tuser.to_uint64(); //#define AXIS_USERW 66 //std::cout << "inter_rad fifo data READ is " << this->fifos[0]->read() << std::endl; if (read_from_fifo.tvalid) { From 3fe6d080ea1f0a2a8bd757ec6891eb2ad74f9af6 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 1 Apr 2024 17:56:09 -0400 Subject: [PATCH 044/127] Storing RAD_ID of current device into RADSimDesignContext & radsim_noc to pass to axis_slave_adapter constructor --- rad-sim/sim/design_context.cpp | 7 +++++-- rad-sim/sim/design_context.hpp | 3 ++- rad-sim/sim/noc/axis_slave_adapter.cpp | 5 +++-- rad-sim/sim/noc/axis_slave_adapter.hpp | 2 +- rad-sim/sim/noc/radsim_noc.cpp | 6 +++--- rad-sim/sim/noc/radsim_noc.hpp | 3 ++- rad-sim/sim/radsim_cluster.cpp | 8 ++++---- rad-sim/sim/radsim_cluster.hpp | 2 +- rad-sim/sim/radsim_inter_rad.hpp | 2 +- 9 files changed, 22 insertions(+), 16 deletions(-) diff --git a/rad-sim/sim/design_context.cpp b/rad-sim/sim/design_context.cpp index 9cdac1b..57ee2a0 100644 --- a/rad-sim/sim/design_context.cpp +++ b/rad-sim/sim/design_context.cpp @@ -1,10 +1,13 @@ #include -RADSimDesignContext::RADSimDesignContext() { +RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { std::string radsim_knobs_filename = "/sim/radsim_knobs"; std::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename; ParseRADSimKnobs(radsim_knobs_filepath); + //assign its rad id + rad_id = rad_id_; + // Create NoC clocks std::string clk_name; std::vector noc_period = @@ -474,7 +477,7 @@ void RADSimDesignContext::CreateSystemNoCs(sc_in &rst) { std::string noc_name_str = "radsim_noc_" + std::to_string(noc_id); const char *noc_name = noc_name_str.c_str(); radsim_noc *noc_inst = - new radsim_noc(noc_name, noc_id, _adapter_clks, _module_clks, + new radsim_noc(noc_name, rad_id, noc_id, _adapter_clks, _module_clks, _noc_axis_master_adapter_info[noc_id], _noc_axis_slave_adapter_info[noc_id], _noc_aximm_master_adapter_info[noc_id], diff --git a/rad-sim/sim/design_context.hpp b/rad-sim/sim/design_context.hpp index 53ed05c..d471580 100644 --- a/rad-sim/sim/design_context.hpp +++ b/rad-sim/sim/design_context.hpp @@ -58,7 +58,8 @@ class RADSimDesignContext { bool rad_done; public: - RADSimDesignContext(); + unsigned int rad_id; //unique ID of this RAD + RADSimDesignContext(unsigned int rad_id_); ~RADSimDesignContext(); void ParseNoCPlacement(const std::string &design_path, const std::string &placement_filename); //AKB added first arg void ParseClockSettings(const std::string &design_path, const std::string &clks_filename); //AKB added first arg diff --git a/rad-sim/sim/noc/axis_slave_adapter.cpp b/rad-sim/sim/noc/axis_slave_adapter.cpp index ca6d75e..1a83c52 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.cpp +++ b/rad-sim/sim/noc/axis_slave_adapter.cpp @@ -1,7 +1,7 @@ #include axis_slave_adapter::axis_slave_adapter( - const sc_module_name &name, int node_id, int network_id, + const sc_module_name &name, unsigned int rad_id, int node_id, int network_id, std::vector &interface_types, std::vector &interface_dataw, double node_period, double adapter_period, BookSimConfig *noc_config, Network *noc, @@ -11,7 +11,8 @@ axis_slave_adapter::axis_slave_adapter( axis_interfaces.init(interface_types.size()); // Node properties - _rad_id = 0; // TO-DO-MR: set appropriate RAD ID through constructor + _rad_id = rad_id; // TO-DO-MR: set appropriate RAD ID through constructor + //std::cout << "set rad_id in axis_slave_adapter " << name << " to: " << _rad_id << std::endl; _node_id = node_id; _network_id = network_id; _node_period = node_period; diff --git a/rad-sim/sim/noc/axis_slave_adapter.hpp b/rad-sim/sim/noc/axis_slave_adapter.hpp index 2acd2a5..fd7d1b0 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.hpp +++ b/rad-sim/sim/noc/axis_slave_adapter.hpp @@ -62,7 +62,7 @@ class axis_slave_adapter : public sc_module { sc_in rst; sc_vector axis_interfaces; - axis_slave_adapter(const sc_module_name &name, int node_id, int network_id, + axis_slave_adapter(const sc_module_name &name, unsigned int rad_id, int node_id, int network_id, std::vector &interface_types, std::vector &interface_dataw, double node_period, double adapter_period, diff --git a/rad-sim/sim/noc/radsim_noc.cpp b/rad-sim/sim/noc/radsim_noc.cpp index 90bee89..c2dd7a5 100644 --- a/rad-sim/sim/noc/radsim_noc.cpp +++ b/rad-sim/sim/noc/radsim_noc.cpp @@ -1,7 +1,7 @@ #include //AKB: moved to header file #include -radsim_noc::radsim_noc(const sc_module_name &name, int noc_id, +radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, int noc_id, std::vector &adapter_clks, std::vector &module_clks, std::vector &axis_master_adapter_info, @@ -10,7 +10,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, int noc_id, std::vector &aximm_slave_adapter_info, RADSimDesignContext* radsim_design) //AKB: ADDED : sc_module(name), noc_clk("noc_clk"), rst("rst") { - + _rad_id = rad_id; _noc_id = noc_id; _num_noc_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", _noc_id); @@ -127,7 +127,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, int noc_id, // Create adapter axis_slave_adapter *slave_adapter = new axis_slave_adapter( - adapter_name, axis_slave_adapter_info[adapter_id]._node_id, _noc_id, + adapter_name, _rad_id, axis_slave_adapter_info[adapter_id]._node_id, _noc_id, adapter_port_types, axis_slave_adapter_info[adapter_id]._port_dataw, adapter_module_period, adapter_period, &_config, _booksim_noc, _buffer_state[axis_slave_adapter_info[adapter_id]._node_id], diff --git a/rad-sim/sim/noc/radsim_noc.hpp b/rad-sim/sim/noc/radsim_noc.hpp index 6d16006..56429cc 100644 --- a/rad-sim/sim/noc/radsim_noc.hpp +++ b/rad-sim/sim/noc/radsim_noc.hpp @@ -21,6 +21,7 @@ class RADSimDesignContext; //AKB ADDED // NoC SystemC wrapper around all Booksim-related datastructures class radsim_noc : public sc_module { private: + int _rad_id; int _noc_id; int _num_noc_nodes; BookSimConfig _config; // Booksim NoC configuration @@ -47,7 +48,7 @@ class radsim_noc : public sc_module { sc_vector noc_aximm_master_ports; sc_vector noc_aximm_slave_ports; - radsim_noc(const sc_module_name &name, int noc_id, + radsim_noc(const sc_module_name &name, unsigned int rad_id, int noc_id, std::vector &adapter_clks, std::vector &module_clks, std::vector &axis_master_adapter_info, diff --git a/rad-sim/sim/radsim_cluster.cpp b/rad-sim/sim/radsim_cluster.cpp index fd8ab98..e004a43 100644 --- a/rad-sim/sim/radsim_cluster.cpp +++ b/rad-sim/sim/radsim_cluster.cpp @@ -2,8 +2,8 @@ RADSimCluster::RADSimCluster(int num_rads) { this->num_rads = num_rads; - for (int i = 0; i < num_rads; i++) { - RADSimDesignContext* new_rad = new RADSimDesignContext(); + for (unsigned int i = 0; i < num_rads; i++) { + RADSimDesignContext* new_rad = new RADSimDesignContext(i); //pass in unique RAD ID all_rads.push_back(new_rad); } inter_rad_topo = ALL_TO_ALL; @@ -17,8 +17,8 @@ RADSimCluster::~RADSimCluster() { } RADSimDesignContext* -RADSimCluster::CreateNewRAD() { - RADSimDesignContext* new_rad = new RADSimDesignContext(); +RADSimCluster::CreateNewRAD(unsigned int i) { + RADSimDesignContext* new_rad = new RADSimDesignContext(i); num_rads++; all_rads.push_back(new_rad); return new_rad; diff --git a/rad-sim/sim/radsim_cluster.hpp b/rad-sim/sim/radsim_cluster.hpp index b38b2be..140e8bd 100644 --- a/rad-sim/sim/radsim_cluster.hpp +++ b/rad-sim/sim/radsim_cluster.hpp @@ -31,7 +31,7 @@ class RADSimCluster { RADSimCluster(int num_rads); ~RADSimCluster(); - RADSimDesignContext* CreateNewRAD(); //returns ptr to the newly added RAD + RADSimDesignContext* CreateNewRAD(unsigned int i); //returns ptr to the newly added RAD void SetTopo(inter_rad_topo_type inter_rad_topo); void SetConnModel(inter_rad_conn_model_type inter_rad_topo); bool AllRADsNotDone(); diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index e1682b7..04e1b77 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -37,7 +37,7 @@ class RADSimInterRad : public sc_module { //sc_fifo> data_in_rad1 = sc_fifo>(2); //2 slots for now //sc_vector>> switch_port_fifos{"switch_port_fifos"}; //for latency - float latency_sec = 5.0*1 * pow(10, -9); //2.6 * pow(10, -6); + float latency_sec = 5.0*1 * pow(10, -9); //2.6 * pow(10, -6); //do not currently support zero latency -- I could implement by bypassing FIFO float period_sec = 5.0 * pow(10, -9); int target_delay = ceil(latency_sec/period_sec); //number of cycles to delay int bw_limit = 0; From 6f5ab018948b3e78022ceee5ee31e614552d3192 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 2 Apr 2024 00:15:44 -0400 Subject: [PATCH 045/127] In progress commit: fixes to add-mult multirad example post-merge changes --- rad-sim/example-designs/add/modules/adder.cpp | 4 ++-- rad-sim/example-designs/add/modules/portal.cpp | 2 +- .../mult/modules/client_mult.hpp | 4 +++- rad-sim/sim/noc/axis_slave_adapter.cpp | 4 ++-- rad-sim/sim/noc/axis_slave_adapter.hpp | 2 +- rad-sim/sim/radsim_inter_rad.cpp | 18 +++++++++++++++--- 6 files changed, 24 insertions(+), 10 deletions(-) diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index 6add89b..37a8433 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -45,7 +45,7 @@ adder::adder(const sc_module_name &name, RADSimDesignContext* radsim_design) //A << axis_adder_interface.tvalid << adder_tdata_fifo_almost_full_signal << adder_tdata_fifo_empty_signal << axis_adder_master_interface.tready << axis_adder_master_interface.tvalid << adder_tdata_fifo_rdata_signal - << adder_tlast_fifo_rdata_signal; + << adder_tlast_fifo_rdata_signal << clk; //AKB: must be sensitive to clk or get occasional unexpected behaviour where rdata stagnates // Sequential logic and its clock/reset setup SC_CTHREAD(Tick, clk.pos()); reset_signal_is(rst, true); // Reset is active high @@ -161,7 +161,7 @@ void adder::Tick() { //sent to portal module if (axis_adder_master_interface.tvalid.read() && axis_adder_master_interface.tready.read()) { - std::cout << "Sent the " << count_out_addends << "th addend over NoC to portal module on cycle " << curr_cycle << std::endl; + std::cout << "Sent the " << count_out_addends << "th addend " << axis_adder_master_interface.tdata.read().to_uint64() << " over NoC to portal module on cycle " << curr_cycle << std::endl; //adder_tdata_tlast_fifo.pop(); count_out_addends++; } diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 90bc902..07c1cee 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -85,7 +85,7 @@ void portal::Tick() { //sequential logic if (!portal_axis_fifo.empty()) { //test_ready_toggle = false; portal_axis_fifo.pop(); - std::cout << "portal.cpp in add design sent to dest_device " << dest_device.to_int64() << " on cycle " << curr_cycle << std::endl; + std::cout << "portal.cpp in add design sent " << portal_axis_master.tdata.read().to_int64() << " to dest_device " << dest_device.to_int64() << " on cycle " << curr_cycle << std::endl; portal_recvd.write(1); if (portal_axis_master.tlast.read()) { std::cout << "Add design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; diff --git a/rad-sim/example-designs/mult/modules/client_mult.hpp b/rad-sim/example-designs/mult/modules/client_mult.hpp index 28e9a7c..5d8a0a2 100644 --- a/rad-sim/example-designs/mult/modules/client_mult.hpp +++ b/rad-sim/example-designs/mult/modules/client_mult.hpp @@ -8,8 +8,10 @@ #include #include #include +#include +#include -#define DATAW 128 +#define FIFO_DEPTH 16 class client_mult : public RADSimModule { private: diff --git a/rad-sim/sim/noc/axis_slave_adapter.cpp b/rad-sim/sim/noc/axis_slave_adapter.cpp index 1a83c52..7497eed 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.cpp +++ b/rad-sim/sim/noc/axis_slave_adapter.cpp @@ -11,7 +11,7 @@ axis_slave_adapter::axis_slave_adapter( axis_interfaces.init(interface_types.size()); // Node properties - _rad_id = rad_id; // TO-DO-MR: set appropriate RAD ID through constructor + _rad_id = rad_id; // TO-DO-MR-DONE: set appropriate RAD ID through constructor //std::cout << "set rad_id in axis_slave_adapter " << name << " to: " << _rad_id << std::endl; _node_id = node_id; _network_id = network_id; @@ -231,7 +231,7 @@ void axis_slave_adapter::InputInjection() { booksim_flit->type = _to_be_injected_flit._type; // TO-DO-MR BEGIN - if (DEST_RAD(_to_be_injected_flit._dest) == _rad_id) { + if (DEST_RAD(_to_be_injected_flit._dest) == _rad_id) { //not crossing to other RAD sc_bv booksim_flit_dest = DEST_LOCAL_NODE(_to_be_injected_flit._dest); booksim_flit->dest = GetInputDestinationNode(booksim_flit_dest); booksim_flit->dest_rad = DEST_RAD(_to_be_injected_flit._dest).to_uint(); diff --git a/rad-sim/sim/noc/axis_slave_adapter.hpp b/rad-sim/sim/noc/axis_slave_adapter.hpp index fd7d1b0..6d6e424 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.hpp +++ b/rad-sim/sim/noc/axis_slave_adapter.hpp @@ -17,7 +17,7 @@ class axis_slave_adapter : public sc_module { private: - unsigned int _rad_id; // TO-DO-MR: RAD ID of this adapter (for multi-RAD systems) + unsigned int _rad_id; // TO-DO-MR-DONE: RAD ID of this adapter (for multi-RAD systems) unsigned int _node_id; // Node ID of this adapter double _node_period, _adapter_period, _noc_period; unsigned int _network_id; diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index c04b846..1d21a6c 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -84,7 +84,7 @@ RADSimInterRad::writeFifo() { */ //wait(); for (int i = 0; i < num_rads; i++) { - all_axis_slave_signals[i]->tready.write(false); + all_axis_slave_signals[i]->tready.write(true); } int bw_counter = 0; wait(); @@ -110,9 +110,9 @@ RADSimInterRad::writeFifo() { std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << curr_transaction.tdata.to_uint64() << std::endl; fifos_latency_counters[dest_rad].push_back(0); //for latency counters } - all_axis_slave_ports[i]->tready.write(false); + //all_axis_slave_ports[i]->tready.write(false); } - else if (!all_axis_slave_ports[i]->tready.read()) { + /*else if (!all_axis_slave_ports[i]->tready.read()) { if (bw_counter >= bw_limit) { all_axis_slave_ports[i]->tready.write(true); bw_counter = 0; @@ -120,10 +120,22 @@ RADSimInterRad::writeFifo() { else { bw_counter++; } + }*/ + if (bw_counter >= bw_limit) { + all_axis_slave_ports[i]->tready.write(true); + } + else { + all_axis_slave_ports[i]->tready.write(false); } prev_valid[i] = curr_transaction.tvalid; } //wait(num_wait, SC_NS); //SC_NS); //eventually change to 1.3, SC_US -- assuming 2.6 us / 2 latency for one piece of data + if (bw_counter >= bw_limit) { + bw_counter = 0; + } + else { + bw_counter++; + } wait(); } } From 2fff3fcb2baaa5790ba12449c1e79e1916743b36 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 2 Apr 2024 02:51:07 -0400 Subject: [PATCH 046/127] Fixed bug in portal.cpp that repeated addend send to inter_rad --- .../example-designs/add/modules/portal.cpp | 33 ++++++++++--------- rad-sim/sim/radsim_inter_rad.cpp | 19 +++++++---- 2 files changed, 31 insertions(+), 21 deletions(-) diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 07c1cee..2ef783a 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -60,6 +60,24 @@ void portal::Tick() { //sequential logic portal_axis_fifo.push(curr_transaction); } + //warning: must do this before next if-else block so that we pop before reading front. otherwise we get outtdated value on second turn. + //we see valid as high the clock cycle AFTER we set it as high in the if-else below + if (portal_axis_master.tvalid.read() && portal_axis_master.tready.read()) { // && test_ready_toggle) { + //pop out of fifo + if (!portal_axis_fifo.empty()) { + //test_ready_toggle = false; + portal_axis_fifo.pop(); + std::cout << "portal.cpp in add design sent " << portal_axis_master.tdata.read().to_int64() << " to dest_device " << dest_device.to_int64() << " on cycle " << curr_cycle << std::endl; + portal_recvd.write(1); + if (portal_axis_master.tlast.read()) { + std::cout << "Add design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; + } + } + else { //should never reach here because valid should be false if fifo is empty + std::cout << "reached here but why? portal_axis_fifo.size(): " << portal_axis_fifo.size() << std::endl; + } + } + if ((portal_axis_fifo.size() > 0) ) { //&& test_ready_toggle) { portal_axis_fields curr_transaction = portal_axis_fifo.front(); portal_axis_master.tdata.write(curr_transaction.tdata); @@ -80,21 +98,6 @@ void portal::Tick() { //sequential logic test_ready_toggle = !test_ready_toggle; }*/ - if (portal_axis_master.tvalid.read() && portal_axis_master.tready.read()) { // && test_ready_toggle) { - //pop out of fifo - if (!portal_axis_fifo.empty()) { - //test_ready_toggle = false; - portal_axis_fifo.pop(); - std::cout << "portal.cpp in add design sent " << portal_axis_master.tdata.read().to_int64() << " to dest_device " << dest_device.to_int64() << " on cycle " << curr_cycle << std::endl; - portal_recvd.write(1); - if (portal_axis_master.tlast.read()) { - std::cout << "Add design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; - } - } - else { //should never reach here because valid should be false if fifo is empty - std::cout << "reached here but why? portal_axis_fifo.size(): " << portal_axis_fifo.size() << std::endl; - } - } /*else if (!test_ready_toggle) { test_ready_toggle = true; }*/ diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 1d21a6c..ac2f4d1 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -94,6 +94,13 @@ RADSimInterRad::writeFifo() { //iterate thru all RADs for (int i = 0; i < num_rads; i++) { + if (bw_counter >= bw_limit) { + all_axis_slave_ports[i]->tready.write(true); + } + else { + all_axis_slave_ports[i]->tready.write(false); + } + struct axis_fields curr_transaction; curr_transaction.tdata = all_axis_slave_ports[i]->tdata.read(); //0 bc adder curr_transaction.tuser = all_axis_slave_ports[i]->tuser.read(); @@ -121,12 +128,6 @@ RADSimInterRad::writeFifo() { bw_counter++; } }*/ - if (bw_counter >= bw_limit) { - all_axis_slave_ports[i]->tready.write(true); - } - else { - all_axis_slave_ports[i]->tready.write(false); - } prev_valid[i] = curr_transaction.tvalid; } //wait(num_wait, SC_NS); //SC_NS); //eventually change to 1.3, SC_US -- assuming 2.6 us / 2 latency for one piece of data @@ -184,6 +185,12 @@ RADSimInterRad::readFifo() { all_axis_master_signals[dest_device]->tlast.write(read_from_fifo.tlast); //std::cout << "inter_rad fifo free after READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; } + else { + //no data to be written to any RAD's portal module + //all_axis_master_signals[0]->tvalid.write(false); + all_axis_master_signals[i]->tvalid.write(false); + } + } else { //no data to be written to any RAD's portal module From 046b1dda9e01fffb7de856b32c751cf61207d12b Mon Sep 17 00:00:00 2001 From: abnashkb Date: Thu, 4 Apr 2024 16:02:21 -0400 Subject: [PATCH 047/127] Added support for getting portal ID on current RAD --- rad-sim/example-designs/add/modules/adder.cpp | 2 +- .../example-designs/add/modules/portal.cpp | 4 ++ rad-sim/example-designs/mult/modules/fifo.cpp | 70 +++++++++++++++++++ rad-sim/example-designs/mult/modules/fifo.hpp | 37 ++++++++++ .../mult/modules/portal_mult.cpp | 2 +- rad-sim/sim/design_context.cpp | 13 +++- rad-sim/sim/design_context.hpp | 6 +- rad-sim/sim/noc/axis_slave_adapter.cpp | 9 ++- rad-sim/sim/noc/axis_slave_adapter.hpp | 2 + rad-sim/sim/noc/radsim_noc.cpp | 14 +++- rad-sim/sim/noc/radsim_noc.hpp | 3 +- 11 files changed, 155 insertions(+), 7 deletions(-) create mode 100644 rad-sim/example-designs/mult/modules/fifo.cpp create mode 100644 rad-sim/example-designs/mult/modules/fifo.hpp diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index 37a8433..957877e 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -74,9 +74,9 @@ void adder::Assign() { bool tlast = adder_tlast_fifo_rdata_signal.read(); std::string src_port_name = module_name + ".axis_adder_master_interface"; std::string dst_port_name = "portal_inst.axis_portal_slave_interface"; - cout << dst_port_name << endl; uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref + std::cout << "adder.cpp portal dest is: " << dst_addr << std::endl; axis_adder_master_interface.tdest.write(dst_addr); axis_adder_master_interface.tid.write(0); axis_adder_master_interface.tstrb.write(0); diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 2ef783a..840a426 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -115,7 +115,11 @@ void portal::RegisterModuleInfo() { port_name = module_name + ".axis_portal_slave_interface"; RegisterAxisSlavePort(port_name, &axis_portal_slave_interface, DATAW, 0); + //radsim_design->portal_id = radsim_design->GetPortDestinationID(port_name); //store slave port info + //radsim_design->AssignPortalSlaveID(radsim_design->GetPortDestinationID(port_name)); + radsim_design->AssignPortalSlaveName(port_name); //bc other modules will send to this slave interface port_name = module_name + ".axis_portal_master_interface"; RegisterAxisMasterPort(port_name, &axis_portal_master_interface, DATAW, 0); + } \ No newline at end of file diff --git a/rad-sim/example-designs/mult/modules/fifo.cpp b/rad-sim/example-designs/mult/modules/fifo.cpp new file mode 100644 index 0000000..5ba051f --- /dev/null +++ b/rad-sim/example-designs/mult/modules/fifo.cpp @@ -0,0 +1,70 @@ +#include "fifo.hpp" + +template +fifo::fifo(const sc_module_name& name, unsigned int depth, unsigned int almost_full_size, + unsigned int almost_empty_size) + : sc_module(name), + wen("wen"), + wdata("wdata"), + ren("ren"), + rdata("rdata"), + full("full"), + almost_full("almost_full"), + empty("empty"), + almost_empty("almost_empty") { + + capacity = depth; + fifo_almost_full_size = almost_full_size; + fifo_almost_empty_size = almost_empty_size; + + // Set clock and reset signal for SC_CTHREAD + SC_CTHREAD(Tick, clk.pos()); + reset_signal_is(rst, true); +} + +template +fifo::~fifo() {} + +template +void fifo::Tick() { + // Reset logic + while (!mem.empty()) mem.pop(); + empty.write(true); + almost_empty.write(true); + full.write(false); + almost_full.write(false); + wait(); + + // Sequential logic + while (true) { + // Pop from queue if read enable signal is triggered and there is data in the FIFO + if (ren.read()) { + if (mem.size() == 0) sim_log.log(error, "FIFO is underflowing!", this->name()); + mem.pop(); + } + + // Push data into the FIFO if there is enough space + if (wen.read()) { + if (mem.size() == capacity) sim_log.log(error, "FIFO is overflowing!", this->name()); + mem.push(wdata.read()); + } + + // Update FIFO status signals + empty.write(mem.empty()); + almost_empty.write(mem.size() <= fifo_almost_empty_size); + full.write(mem.size() == capacity); + almost_full.write(mem.size() >= fifo_almost_full_size); + + // Set FIFO read data output to the top of the queue -- a vector of zeros is produced if the queue is empty + if (mem.size() == 0) { + rdata.write(0); + } else { + rdata.write(mem.front()); + } + + wait(); + } +} + +template class fifo>; +template class fifo; \ No newline at end of file diff --git a/rad-sim/example-designs/mult/modules/fifo.hpp b/rad-sim/example-designs/mult/modules/fifo.hpp new file mode 100644 index 0000000..e057e06 --- /dev/null +++ b/rad-sim/example-designs/mult/modules/fifo.hpp @@ -0,0 +1,37 @@ +#pragma once + +#include +#include +#include +#include + +#define DATAW 128 + +// This class defines a FIFO module. This is a "peek" FIFO where the read data port always shows the top of the +// FIFO and the read enable signal is an acknowledgement signal (equivalent to pop in a software queue) +template +class fifo : public sc_module { + private: + unsigned int capacity; // Depth of the FIFO + unsigned int fifo_almost_empty_size, fifo_almost_full_size; // Occupancy when FIFO is considered almost full/empty + std::queue mem; // FIFO storage implemented as a C++ queue + + public: + sc_in clk; + sc_in rst; + sc_in wen; + sc_in wdata; + sc_in ren; + sc_out rdata; + sc_out full; + sc_out almost_full; + sc_out empty; + sc_out almost_empty; + + fifo(const sc_module_name& name, unsigned int depth, unsigned int almost_full_size, + unsigned int almost_empty_size); + ~fifo(); + + void Tick(); + SC_HAS_PROCESS(fifo); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/mult/modules/portal_mult.cpp b/rad-sim/example-designs/mult/modules/portal_mult.cpp index 9c6e9a4..d266dda 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.cpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.cpp @@ -83,7 +83,6 @@ void portal_mult::Tick() { //sequential logic } void portal_mult::RegisterModuleInfo() { - //I don't think this is needed unless I add AXI Interface -- nvm, need bc is virtual fn in derived class std::string port_name; _num_noc_axis_slave_ports = 0; _num_noc_axis_master_ports = 0; @@ -93,6 +92,7 @@ void portal_mult::RegisterModuleInfo() { port_name = module_name + ".axis_mult_portal_slave_interface"; //std::cout << port_name << std::endl; RegisterAxisSlavePort(port_name, &axis_mult_portal_slave_interface, DATAW, 0); + radsim_design->AssignPortalSlaveName(port_name); //bc other modules will send to this slave interface port_name = module_name + ".axis_mult_portal_master_interface"; //std::cout << port_name << std::endl; diff --git a/rad-sim/sim/design_context.cpp b/rad-sim/sim/design_context.cpp index 57ee2a0..84937ab 100644 --- a/rad-sim/sim/design_context.cpp +++ b/rad-sim/sim/design_context.cpp @@ -477,7 +477,7 @@ void RADSimDesignContext::CreateSystemNoCs(sc_in &rst) { std::string noc_name_str = "radsim_noc_" + std::to_string(noc_id); const char *noc_name = noc_name_str.c_str(); radsim_noc *noc_inst = - new radsim_noc(noc_name, rad_id, noc_id, _adapter_clks, _module_clks, + new radsim_noc(noc_name, rad_id, portal_slave_name, noc_id, _adapter_clks, _module_clks, _noc_axis_master_adapter_info[noc_id], _noc_axis_slave_adapter_info[noc_id], _noc_aximm_master_adapter_info[noc_id], @@ -721,4 +721,15 @@ RADSimDesignContext::is_rad_done() { void RADSimDesignContext::set_rad_done() { this->rad_done = true; +} + +void +RADSimDesignContext::AssignPortalSlaveName(std::string name) { + //std::cout << "design_context assigned portal name: " << name << std::endl; + this->portal_slave_name = name; +} + +unsigned int +RADSimDesignContext::GetPortalSlaveID () { + return GetPortDestinationID(portal_slave_name); } \ No newline at end of file diff --git a/rad-sim/sim/design_context.hpp b/rad-sim/sim/design_context.hpp index d471580..08bb2cc 100644 --- a/rad-sim/sim/design_context.hpp +++ b/rad-sim/sim/design_context.hpp @@ -12,6 +12,7 @@ class RADSimDesignContext { private: + unsigned int rad_id; //unique ID of this RAD int _sim_exit_code = 0; std::vector _noc_clks; @@ -58,7 +59,8 @@ class RADSimDesignContext { bool rad_done; public: - unsigned int rad_id; //unique ID of this RAD + //unsigned int portal_id; //NoC ID of portal module on RAD + std::string portal_slave_name; RADSimDesignContext(unsigned int rad_id_); ~RADSimDesignContext(); void ParseNoCPlacement(const std::string &design_path, const std::string &placement_filename); //AKB added first arg @@ -108,6 +110,8 @@ class RADSimDesignContext { //AKB ADDED: bool is_rad_done(); void set_rad_done(); + void AssignPortalSlaveName(std::string name); + unsigned int GetPortalSlaveID (); }; //extern RADSimDesignContext radsim_design; //AKB: commented out \ No newline at end of file diff --git a/rad-sim/sim/noc/axis_slave_adapter.cpp b/rad-sim/sim/noc/axis_slave_adapter.cpp index 7497eed..5fb19aa 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.cpp +++ b/rad-sim/sim/noc/axis_slave_adapter.cpp @@ -237,7 +237,8 @@ void axis_slave_adapter::InputInjection() { booksim_flit->dest_rad = DEST_RAD(_to_be_injected_flit._dest).to_uint(); booksim_flit->dest_remote = DEST_REMOTE_NODE(_to_be_injected_flit._dest).to_uint(); } else { - sc_bv booksim_flit_dest = 0; // TO-DO-MR: set to portal node ID + std::cout << "(TO-DO-MR) _portal_id in axis_slave_adapter.cpp: " << _portal_id << std::endl; + sc_bv booksim_flit_dest = _portal_id; // TO-DO-MR: set to portal node ID booksim_flit->dest = GetInputDestinationNode(booksim_flit_dest); booksim_flit->dest_rad = DEST_RAD(_to_be_injected_flit._dest).to_uint(); booksim_flit->dest_remote = DEST_REMOTE_NODE(_to_be_injected_flit._dest).to_uint(); @@ -278,4 +279,10 @@ void axis_slave_adapter::InputInjection() { } wait(); } +} + +void +axis_slave_adapter::AssignPortalSlaveID(int id) { + _portal_id = id; + //std::cout << "set portal_id of RAD "<< _rad_id << " in axis_slave_adapter.cpp to: " << _portal_id << std::endl; } \ No newline at end of file diff --git a/rad-sim/sim/noc/axis_slave_adapter.hpp b/rad-sim/sim/noc/axis_slave_adapter.hpp index 6d6e424..50bfcb9 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.hpp +++ b/rad-sim/sim/noc/axis_slave_adapter.hpp @@ -18,6 +18,7 @@ class axis_slave_adapter : public sc_module { private: unsigned int _rad_id; // TO-DO-MR-DONE: RAD ID of this adapter (for multi-RAD systems) + unsigned int _portal_id; //AKB ADDED FOR TO-DO-MR unsigned int _node_id; // Node ID of this adapter double _node_period, _adapter_period, _noc_period; unsigned int _network_id; @@ -77,4 +78,5 @@ class axis_slave_adapter : public sc_module { void InputPacketization(); void InputInjection(); SC_HAS_PROCESS(axis_slave_adapter); + void AssignPortalSlaveID(int id); }; \ No newline at end of file diff --git a/rad-sim/sim/noc/radsim_noc.cpp b/rad-sim/sim/noc/radsim_noc.cpp index c2dd7a5..3f1dc55 100644 --- a/rad-sim/sim/noc/radsim_noc.cpp +++ b/rad-sim/sim/noc/radsim_noc.cpp @@ -1,7 +1,7 @@ #include //AKB: moved to header file #include -radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, int noc_id, +radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::string portal_slave_name, int noc_id, std::vector &adapter_clks, std::vector &module_clks, std::vector &axis_master_adapter_info, @@ -11,6 +11,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, int noc_ RADSimDesignContext* radsim_design) //AKB: ADDED : sc_module(name), noc_clk("noc_clk"), rst("rst") { _rad_id = rad_id; + _portal_slave_name = portal_slave_name; _noc_id = noc_id; _num_noc_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", _noc_id); @@ -93,6 +94,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, int noc_ for (unsigned int port_id = 0; port_id < num_adapter_ports; port_id++) { std::string port_name = axis_master_adapter_info[adapter_id]._port_names[port_id]; + std::cout << "axis_master_adapter_info radsim_noc.cpp port_name is: " << port_name << std::endl; master_adapter->axis_interfaces[port_id].ConnectToPort( noc_axis_master_ports[adapter_id][port_id]); radsim_design->RegisterNoCMasterPort( //AKB to ptr @@ -106,6 +108,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, int noc_ _num_axis_slave_endpoints = radsim_design->GetNumNoCSlaveAdapters(_noc_id, false); //AKB to ptr noc_axis_slave_ports.init(_num_axis_slave_endpoints); + int local_idx_portal = -1; for (unsigned int adapter_id = 0; adapter_id < _num_axis_slave_endpoints; adapter_id++) { unsigned int num_adapter_ports = @@ -143,6 +146,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, int noc_ for (unsigned int port_id = 0; port_id < num_adapter_ports; port_id++) { std::string port_name = axis_slave_adapter_info[adapter_id]._port_names[port_id]; + std::cout << "axis_slave_adapter radsim_noc.cpp port_name is: " << port_name << std::endl; slave_adapter->axis_interfaces[port_id].ConnectToPort( noc_axis_slave_ports[adapter_id][port_id]); radsim_design->RegisterNoCSlavePort( //AKB to ptr @@ -237,6 +241,14 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, int noc_ _aximm_slave_adapters.push_back(slave_adapter); } + //set portal ID to use in axis_slave_adapter for NoC versus inter_rad + unsigned int PortalSlaveID = radsim_design->GetPortalSlaveID(); + std::cout << "Set portal slave ids in radsim_noc.cpp to: " << PortalSlaveID << std::endl; + for (int i = 0; i < _axis_slave_adapters.size(); i++) { + _axis_slave_adapters[i]->AssignPortalSlaveID(PortalSlaveID); + } + std::cout << "DONE AXIS SLAVE ADAPTER CREATION " << std::endl; + SC_CTHREAD(Tick, noc_clk.pos()); reset_signal_is(rst, true); } diff --git a/rad-sim/sim/noc/radsim_noc.hpp b/rad-sim/sim/noc/radsim_noc.hpp index 56429cc..f2f5054 100644 --- a/rad-sim/sim/noc/radsim_noc.hpp +++ b/rad-sim/sim/noc/radsim_noc.hpp @@ -22,6 +22,7 @@ class RADSimDesignContext; //AKB ADDED class radsim_noc : public sc_module { private: int _rad_id; + std::string _portal_slave_name; int _noc_id; int _num_noc_nodes; BookSimConfig _config; // Booksim NoC configuration @@ -48,7 +49,7 @@ class radsim_noc : public sc_module { sc_vector noc_aximm_master_ports; sc_vector noc_aximm_slave_ports; - radsim_noc(const sc_module_name &name, unsigned int rad_id, int noc_id, + radsim_noc(const sc_module_name &name, unsigned int rad_id, std::string portal_slave_name, int noc_id, std::vector &adapter_clks, std::vector &module_clks, std::vector &axis_master_adapter_info, From 285fe6f9c073e66183193f98885adc5a44bf2169 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Thu, 4 Apr 2024 16:49:59 -0400 Subject: [PATCH 048/127] Full use of tdest for dest rad, remote node, and local node working on add-mult multo-RAD example design --- rad-sim/example-designs/add/modules/adder.cpp | 6 +++++- rad-sim/example-designs/add/modules/portal.cpp | 7 ++++--- .../example-designs/mult/modules/portal_mult.cpp | 7 ++++++- rad-sim/sim/design_context.hpp | 2 +- rad-sim/sim/noc/axis_slave_adapter.cpp | 2 +- rad-sim/sim/radsim_defines.hpp | 1 + rad-sim/sim/radsim_inter_rad.cpp | 14 +++++++++++--- 7 files changed, 29 insertions(+), 10 deletions(-) diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index 957877e..8a6224a 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -77,7 +77,11 @@ void adder::Assign() { uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref std::cout << "adder.cpp portal dest is: " << dst_addr << std::endl; - axis_adder_master_interface.tdest.write(dst_addr); + sc_bv concat_dest; + DEST_RAD(concat_dest) = 1; + DEST_LOCAL_NODE(concat_dest) = dst_addr; + DEST_REMOTE_NODE(concat_dest) = 0; //for mult module on RAD 2 -- I know this, but designer would not... -- for proof of concept tho + axis_adder_master_interface.tdest.write(concat_dest); //dst_addr); axis_adder_master_interface.tid.write(0); axis_adder_master_interface.tstrb.write(0); axis_adder_master_interface.tkeep.write(0); diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 840a426..cb39ea4 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -54,7 +54,7 @@ void portal::Tick() { //sequential logic axis_portal_slave_interface.tlast.read(), axis_portal_slave_interface.tid.read(), axis_portal_slave_interface.tdest.read(), - dest_device //tuser field + axis_portal_slave_interface.tuser.read() //tuser field }; portal_axis_fifo.push(curr_transaction); @@ -81,7 +81,8 @@ void portal::Tick() { //sequential logic if ((portal_axis_fifo.size() > 0) ) { //&& test_ready_toggle) { portal_axis_fields curr_transaction = portal_axis_fifo.front(); portal_axis_master.tdata.write(curr_transaction.tdata); - portal_axis_master.tuser.write(dest_device); + portal_axis_master.tdest.write(curr_transaction.tdest); + portal_axis_master.tuser.write(curr_transaction.tuser); portal_axis_master.tvalid.write(true); portal_axis_master.tlast.write(curr_transaction.tlast); //test_ready_toggle = false; @@ -89,7 +90,7 @@ void portal::Tick() { //sequential logic else { //counter++; portal_axis_master.tdata.write(0); - portal_axis_master.tuser.write(dest_device); + //portal_axis_master.tuser.write(dest_device); portal_axis_master.tvalid.write(false); //test_ready_toggle = true; } diff --git a/rad-sim/example-designs/mult/modules/portal_mult.cpp b/rad-sim/example-designs/mult/modules/portal_mult.cpp index d266dda..e0c1098 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.cpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.cpp @@ -50,7 +50,12 @@ void portal_mult::Tick() { //sequential logic std::string dst_port_name = "mult_inst.axis_mult_interface"; uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref - axis_mult_portal_master_interface.tdest.write(dst_addr); + std::cout << "dst_addr in portal_mult.cpp is: " << dst_addr << std::endl; + //sc_bv concat_dest = portal_axis_slave.tdest.read(); + //DEST_RAD(concat_dest) = radsim_design->rad_id; + //DEST_LOCAL_NODE(concat_dest) = //dst_addr; + std::cout << "portal_axis_slave.tdest.read() is: " << portal_axis_slave.tdest.read() << std::endl; + axis_mult_portal_master_interface.tdest.write(portal_axis_slave.tdest.read()); //concat_dest); //dst_addr); axis_mult_portal_master_interface.tid.write(0); axis_mult_portal_master_interface.tstrb.write(0); axis_mult_portal_master_interface.tkeep.write(0); diff --git a/rad-sim/sim/design_context.hpp b/rad-sim/sim/design_context.hpp index 08bb2cc..24418d0 100644 --- a/rad-sim/sim/design_context.hpp +++ b/rad-sim/sim/design_context.hpp @@ -12,7 +12,6 @@ class RADSimDesignContext { private: - unsigned int rad_id; //unique ID of this RAD int _sim_exit_code = 0; std::vector _noc_clks; @@ -60,6 +59,7 @@ class RADSimDesignContext { public: //unsigned int portal_id; //NoC ID of portal module on RAD + unsigned int rad_id; //unique ID of this RAD std::string portal_slave_name; RADSimDesignContext(unsigned int rad_id_); ~RADSimDesignContext(); diff --git a/rad-sim/sim/noc/axis_slave_adapter.cpp b/rad-sim/sim/noc/axis_slave_adapter.cpp index 5fb19aa..7c30936 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.cpp +++ b/rad-sim/sim/noc/axis_slave_adapter.cpp @@ -238,7 +238,7 @@ void axis_slave_adapter::InputInjection() { booksim_flit->dest_remote = DEST_REMOTE_NODE(_to_be_injected_flit._dest).to_uint(); } else { std::cout << "(TO-DO-MR) _portal_id in axis_slave_adapter.cpp: " << _portal_id << std::endl; - sc_bv booksim_flit_dest = _portal_id; // TO-DO-MR: set to portal node ID + sc_bv booksim_flit_dest = _portal_id; // TO-DO-MR-DONE: set to portal node ID booksim_flit->dest = GetInputDestinationNode(booksim_flit_dest); booksim_flit->dest_rad = DEST_RAD(_to_be_injected_flit._dest).to_uint(); booksim_flit->dest_remote = DEST_REMOTE_NODE(_to_be_injected_flit._dest).to_uint(); diff --git a/rad-sim/sim/radsim_defines.hpp b/rad-sim/sim/radsim_defines.hpp index 470ad96..ba4dac1 100644 --- a/rad-sim/sim/radsim_defines.hpp +++ b/rad-sim/sim/radsim_defines.hpp @@ -18,6 +18,7 @@ #define AXIS_USERW 75 #define AXI4_USERW 64 // (Almost always) Constant AXI Parameters +// NOTE: AXIS_DEST_FIELDW must be NOC_LINKS_DEST_WIDTH/3 to fit RAD_DEST_ID, REMOTE_NODE_ID, and LOCAL_NODE_ID #define AXIS_STRBW 8 #define AXIS_KEEPW 8 #define AXIS_IDW NOC_LINKS_PACKETID_WIDTH diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index ac2f4d1..e66d6cb 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -106,13 +106,20 @@ RADSimInterRad::writeFifo() { curr_transaction.tuser = all_axis_slave_ports[i]->tuser.read(); curr_transaction.tvalid = all_axis_slave_ports[i]->tvalid.read(); curr_transaction.tlast = all_axis_slave_ports[i]->tlast.read(); + //since crossing RADs, DEST_LOCAL_NODE is now DEST_REMOTE_NODE, and DEST_REMOTE_NODE can be reset to 0 + sc_bv concat_dest_swap = all_axis_slave_ports[i]->tdest.read(); + //std::cout << "concat_dest_swap: " << concat_dest_swap << std::endl; + DEST_LOCAL_NODE(concat_dest_swap) = DEST_REMOTE_NODE(all_axis_slave_ports[i]->tdest.read()); + DEST_REMOTE_NODE(concat_dest_swap) = 0; + curr_transaction.tdest = concat_dest_swap; //all_axis_slave_ports[i]->tdest.read(); + //std::cout << "curr_transaction.tdest: " << concat_dest_swap << std::endl; //all_axis_slave_ports[i]->tready.write(true); /*if (all_axis_slave_ports[i]->tready.read()) { //std::cout << "valid" << std::endl; }*/ if (curr_transaction.tvalid && all_axis_slave_ports[i]->tready.read()) { //&& !prev_valid[i]) { //detect rising edge bc operating at higher clk freq than modules - int dest_rad = curr_transaction.tuser.to_int64(); - //std::cout << dest_rad << std::endl; + unsigned int dest_rad = DEST_RAD(curr_transaction.tdest).to_uint64(); + std::cout << "radsim_inter_rad.cpp dest_rad is: "<< dest_rad << std::endl; if (this->fifos[dest_rad]->nb_write(curr_transaction) != false) { //there was an available slot to write to std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << curr_transaction.tdata.to_uint64() << std::endl; fifos_latency_counters[dest_rad].push_back(0); //for latency counters @@ -172,7 +179,7 @@ RADSimInterRad::readFifo() { struct axis_fields read_from_fifo; this->fifos[i]->nb_read(read_from_fifo); sc_bv val = read_from_fifo.tdata; - int dest_device = read_from_fifo.tuser.to_uint64(); //#define AXIS_USERW 66 + int dest_device = (DEST_RAD(read_from_fifo.tdest)).to_uint64(); //#define AXIS_USERW 66 //std::cout << "inter_rad fifo data READ is " << this->fifos[0]->read() << std::endl; if (read_from_fifo.tvalid) { @@ -183,6 +190,7 @@ RADSimInterRad::readFifo() { all_axis_master_signals[dest_device]->tdata.write(val); //works if write to either this or line above all_axis_master_signals[dest_device]->tvalid.write(read_from_fifo.tvalid); all_axis_master_signals[dest_device]->tlast.write(read_from_fifo.tlast); + all_axis_master_signals[dest_device]->tdest.write(read_from_fifo.tdest); //std::cout << "inter_rad fifo free after READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; } else { From 9c8bb8f1d88cb6550d76f0e21482108e9275bbce Mon Sep 17 00:00:00 2001 From: abnashkb Date: Thu, 4 Apr 2024 17:14:13 -0400 Subject: [PATCH 049/127] Working 3-RAD design with add on RAD 0 sending same factors alternating to mult RAD 1 and mult RAD 2! --- rad-sim/example-designs/add/add_driver.cpp | 4 ++- rad-sim/example-designs/add/modules/adder.cpp | 26 ++++++++++++------- rad-sim/sim/main.cpp | 11 +++++++- 3 files changed, 30 insertions(+), 11 deletions(-) diff --git a/rad-sim/example-designs/add/add_driver.cpp b/rad-sim/example-designs/add/add_driver.cpp index 22b8599..6f54c12 100644 --- a/rad-sim/example-designs/add/add_driver.cpp +++ b/rad-sim/example-designs/add/add_driver.cpp @@ -21,6 +21,7 @@ add_driver::add_driver(const sc_module_name &name, RADSimDesignContext* radsim_d unsigned int r_num = std::rand() % 10 + 1; std::cout << r_num << " "; numbers_to_send.push(r_num); + numbers_to_send.push(r_num); //push twice bc two mult modules now actual_sum += r_num; } std::cout << std::endl << "----------------------------------------" << std::endl; @@ -43,7 +44,8 @@ void add_driver::source() { while (!numbers_to_send.empty()) { client_tdata.write(numbers_to_send.front()); - client_tlast.write(numbers_to_send.size() <= 1); + //client_tlast.write(numbers_to_send.size() <= 1); + client_tlast.write(numbers_to_send.size() <= 2); //bc sending to 2 RADs, so both receive the last flag client_valid.write(true); wait(); diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index 8a6224a..9bf0b51 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -1,5 +1,7 @@ #include +int which_rad = 1; + adder::adder(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg : RADSimModule(name, radsim_design) { @@ -78,7 +80,7 @@ void adder::Assign() { uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref std::cout << "adder.cpp portal dest is: " << dst_addr << std::endl; sc_bv concat_dest; - DEST_RAD(concat_dest) = 1; + DEST_RAD(concat_dest) = which_rad; //1; DEST_LOCAL_NODE(concat_dest) = dst_addr; DEST_REMOTE_NODE(concat_dest) = 0; //for mult module on RAD 2 -- I know this, but designer would not... -- for proof of concept tho axis_adder_master_interface.tdest.write(concat_dest); //dst_addr); @@ -131,14 +133,20 @@ void adder::Tick() { //in future if needed, could decouple receiving and sending using a fifo //&& axis_adder_master_interface.tready.read() //this is input from NoC ){ - uint64_t current_sum = adder_rolling_sum.to_uint64(); - adder_rolling_sum = current_sum + axis_adder_interface.tdata.read().to_uint64(); - t_finished.write(axis_adder_interface.tlast.read()); - std::cout << module_name << ": Got Transaction " << count_in_addends << " on cycle " << curr_cycle << " (user = " - << axis_adder_interface.tuser.read().to_uint64() << ") (addend = " - << axis_adder_interface.tdata.read().to_uint64() << ")!" - << std::endl; - count_in_addends++; + if (which_rad == 1) { //only calculate sum when sending to RAD 1 -- prevents doubly adding + uint64_t current_sum = adder_rolling_sum.to_uint64(); + adder_rolling_sum = current_sum + axis_adder_interface.tdata.read().to_uint64(); + t_finished.write(axis_adder_interface.tlast.read()); //this should still work even with 2 RADs because of which_rad check + std::cout << module_name << ": Got Transaction " << count_in_addends << " on cycle " << curr_cycle << " (user = " + << axis_adder_interface.tuser.read().to_uint64() << ") (addend = " + << axis_adder_interface.tdata.read().to_uint64() << ")!" + << std::endl; + count_in_addends++; + which_rad = 2; //can send to other RAD next time + } + else { + which_rad = 1; + } //adder_tdata_tlast_fifo.push(std::make_tuple(axis_adder_interface.tdata.read(), axis_adder_interface.tlast.read())); } diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 06aafdc..2d722aa 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -18,7 +18,7 @@ SimTraceRecording sim_trace_probe; int sc_main(int argc, char *argv[]) { //AKB: using RADSimCluster class instead of creating new above - RADSimCluster* cluster = new RADSimCluster(2); + RADSimCluster* cluster = new RADSimCluster(3); //2); gWatchOut = &cout; int log_verbosity = radsim_config.GetIntKnob("telemetry_log_verbosity"); @@ -39,16 +39,23 @@ int sc_main(int argc, char *argv[]) { //add_system *system2 = new add_system("add_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED mult_system *system2 = new mult_system("mult_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED + + sc_clock *driver_clk_sig3 = new sc_clock( + "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED + + mult_system *system3 = new mult_system("mult_system3", driver_clk_sig3, cluster->all_rads[2]); //AKB ADDED //AKB ADDED: cluster->StoreSystem(system); cluster->StoreSystem(system2); + cluster->StoreSystem(system3); sc_clock *inter_rad_clk_sig = new sc_clock( "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED, use same period as sim driver RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); //blackbox->ConnectRadPair(0, 1); //TODO: comment out bc not using this blackbox->ConnectRadAxi(0); blackbox->ConnectRadAxi(1); + blackbox->ConnectRadAxi(2); int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); sc_bv<128> new_val; @@ -72,8 +79,10 @@ int sc_main(int argc, char *argv[]) { delete system; delete system2; //AKB ADDED + delete system3; //AKB ADDED delete driver_clk_sig; delete driver_clk_sig2; //AKB ADDED + delete driver_clk_sig3; //AKB ADDED sc_flit scf; scf.FreeAllFlits(); Flit *f = Flit::New(); From 80af149611a485a2ce72569fd1f7e0cff36cbd2f Mon Sep 17 00:00:00 2001 From: abnashkb Date: Thu, 4 Apr 2024 17:48:16 -0400 Subject: [PATCH 050/127] Fixed rad_id output msg in portal_mult --- rad-sim/example-designs/mult/modules/portal_mult.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/rad-sim/example-designs/mult/modules/portal_mult.cpp b/rad-sim/example-designs/mult/modules/portal_mult.cpp index e0c1098..7ad3c47 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.cpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.cpp @@ -41,8 +41,9 @@ void portal_mult::Tick() { //sequential logic //get current cycle int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //read - std::cout << module_name << ": Portal_Mult Module Got Transaction on cycle " << curr_cycle << " (user (in this case, this device ID) = " - << portal_axis_slave.tuser.read().to_uint64() << ") (addend = " + std::cout << module_name << ": Portal_Mult Module Got Transaction on cycle " << curr_cycle << " (RAD ID) = " + << radsim_design->rad_id //<< portal_axis_slave.tuser.read().to_uint64() + << ") (addend = " << portal_axis_slave.tdata.read().to_uint64() << ")!" << std::endl; //write the addend into the mult module and that will flag when received all values and can end simulation From c7649b10e8a30c901ba2300d010ac40000226106 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Thu, 4 Apr 2024 23:39:31 -0400 Subject: [PATCH 051/127] In progress: porting dlrm to multi-RAD sim, but on single RAD --- rad-sim/example-designs/add/add_top.cpp | 1 + rad-sim/example-designs/dlrm/CMakeLists.txt | 2 + rad-sim/example-designs/dlrm/dlrm_driver.cpp | 9 +- rad-sim/example-designs/dlrm/dlrm_driver.hpp | 3 +- rad-sim/example-designs/dlrm/dlrm_system.cpp | 4 +- rad-sim/example-designs/dlrm/dlrm_system.hpp | 5 +- rad-sim/example-designs/dlrm/dlrm_top.cpp | 15 ++- rad-sim/example-designs/dlrm/dlrm_top.hpp | 8 +- .../example-designs/dlrm/modules/portal.cpp | 126 ++++++++++++++++++ .../example-designs/dlrm/modules/portal.hpp | 49 +++++++ rad-sim/sim/main.cpp | 61 +++++---- rad-sim/sim/radsim_knobs | 20 +-- 12 files changed, 253 insertions(+), 50 deletions(-) create mode 100644 rad-sim/example-designs/dlrm/modules/portal.cpp create mode 100644 rad-sim/example-designs/dlrm/modules/portal.hpp diff --git a/rad-sim/example-designs/add/add_top.cpp b/rad-sim/example-designs/add/add_top.cpp index 81ba4cf..b1e0dd9 100644 --- a/rad-sim/example-designs/add/add_top.cpp +++ b/rad-sim/example-designs/add/add_top.cpp @@ -42,4 +42,5 @@ add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) add_top::~add_top() { delete adder_inst; delete client_inst; + delete portal_inst; } \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/CMakeLists.txt b/rad-sim/example-designs/dlrm/CMakeLists.txt index da62070..4a4cb9d 100644 --- a/rad-sim/example-designs/dlrm/CMakeLists.txt +++ b/rad-sim/example-designs/dlrm/CMakeLists.txt @@ -26,6 +26,7 @@ set(srcfiles modules/fifo.cpp modules/instructions.cpp modules/collector.cpp + modules/portal.cpp dlrm_top.cpp dlrm_driver.cpp dlrm_system.cpp @@ -42,6 +43,7 @@ set(hdrfiles modules/fifo.hpp modules/instructions.hpp modules/collector.hpp + modules/portal.hpp modules/dlrm_defines.hpp dlrm_top.hpp dlrm_driver.hpp diff --git a/rad-sim/example-designs/dlrm/dlrm_driver.cpp b/rad-sim/example-designs/dlrm/dlrm_driver.cpp index a84e65e..1d648df 100644 --- a/rad-sim/example-designs/dlrm/dlrm_driver.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_driver.cpp @@ -71,7 +71,8 @@ bool ParseOutputs(std::vector> &fi_outputs, return true; } -dlrm_driver::dlrm_driver(const sc_module_name &name) : sc_module(name) { +dlrm_driver::dlrm_driver(const sc_module_name &name, , RADSimDesignContext* radsim_design_) : sc_module(name) { + this->radsim_design = radsim_design_; //AKB ADDED // Parse design configuration (number of layers & number of MVM per layer) std::string design_root_dir = @@ -195,7 +196,7 @@ void dlrm_driver::sink() { std::cout << "Simulation PASSED! All outputs matching!" << std::endl; } else { std::cout << "Simulation FAILED! Some outputs are NOT matching!" << std::endl; - radsim_design.ReportDesignFailure(); + radsim_design->ReportDesignFailure(); } _end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); @@ -205,5 +206,7 @@ void dlrm_driver::sink() { for (unsigned int i = 0; i < 10; i++) { wait(); } - sc_stop(); + //sc_stop(); + this->radsim_design->set_rad_done(); //flag to replace sc_stop calls + return; } \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/dlrm_driver.hpp b/rad-sim/example-designs/dlrm/dlrm_driver.hpp index cb6ab4c..c0531d9 100644 --- a/rad-sim/example-designs/dlrm/dlrm_driver.hpp +++ b/rad-sim/example-designs/dlrm/dlrm_driver.hpp @@ -19,6 +19,7 @@ class dlrm_driver : public sc_module { unsigned int _num_feature_interaction_outputs; unsigned int _num_mlp_outputs; unsigned int _start_cycle, _end_cycle; + RADSimDesignContext* radsim_design; //AKB ADDED public: sc_in clk; @@ -35,7 +36,7 @@ class dlrm_driver : public sc_module { sc_out collector_fifo_ren; sc_in> collector_fifo_rdata; - dlrm_driver(const sc_module_name &name); + dlrm_driver(const sc_module_name &name, RADSimDesignContext* radsim_design_); ~dlrm_driver(); void assign(); diff --git a/rad-sim/example-designs/dlrm/dlrm_system.cpp b/rad-sim/example-designs/dlrm/dlrm_system.cpp index f8a293d..668d607 100644 --- a/rad-sim/example-designs/dlrm/dlrm_system.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_system.cpp @@ -1,6 +1,6 @@ #include -dlrm_system::dlrm_system(const sc_module_name &name, sc_clock *driver_clk_sig) +dlrm_system::dlrm_system(const sc_module_name &name, sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design) : sc_module(name) { // Instantiate driver @@ -32,6 +32,8 @@ dlrm_system::dlrm_system(const sc_module_name &name, sc_clock *driver_clk_sig) dut_inst->collector_fifo_rdy(collector_fifo_rdy_sig); dut_inst->collector_fifo_ren(collector_fifo_ren_sig); dut_inst->collector_fifo_rdata(collector_fifo_rdata_sig); + //add _top as dut instance for parent class design_system + this->design_dut_inst = dut_inst; } dlrm_system::~dlrm_system() { diff --git a/rad-sim/example-designs/dlrm/dlrm_system.hpp b/rad-sim/example-designs/dlrm/dlrm_system.hpp index e6b962a..0c6c1be 100644 --- a/rad-sim/example-designs/dlrm/dlrm_system.hpp +++ b/rad-sim/example-designs/dlrm/dlrm_system.hpp @@ -4,8 +4,9 @@ #include #include #include +#include -class dlrm_system : public sc_module { +class dlrm_system : public design_system { //sc_module { private: sc_signal> lookup_indecies_data_sig; sc_signal> lookup_indecies_target_channels_sig; @@ -24,6 +25,6 @@ class dlrm_system : public sc_module { dlrm_driver *driver_inst; dlrm_top *dut_inst; - dlrm_system(const sc_module_name &name, sc_clock *driver_clk_sig); + dlrm_system(const sc_module_name &name, sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design); ~dlrm_system(); }; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/dlrm_top.cpp b/rad-sim/example-designs/dlrm/dlrm_top.cpp index 6ac458a..407689b 100644 --- a/rad-sim/example-designs/dlrm/dlrm_top.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_top.cpp @@ -1,6 +1,6 @@ #include -dlrm_top::dlrm_top(const sc_module_name &name) : sc_module(name) { +dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : sc_module(name) { unsigned int line_bitwidth = 512; unsigned int element_bitwidth = 16; @@ -134,7 +134,17 @@ dlrm_top::dlrm_top(const sc_module_name &name) : sc_module(name) { ch_id += mem_channels[ctrl_id]; } - radsim_design.BuildDesignContext("dlrm.place", "dlrm.clks"); + //create portal module + module_name_str = "portal_inst"; + std::strcpy(module_name, module_name_str.c_str()); + portal_inst = new portal(module_name, radsim_design); + portal_inst->portal_recvd(this->portal_recvd); + + //connect master to master instead, to expose to top + portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); + portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); //top drives portal bc top receives slave inputs + + radsim_design.BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm", "dlrm.place", "dlrm.clks"); radsim_design.CreateSystemNoCs(rst); radsim_design.ConnectModulesToNoC(); } @@ -150,4 +160,5 @@ dlrm_top::~dlrm_top() { delete mvm; } } + delete portal_inst; } \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/dlrm_top.hpp b/rad-sim/example-designs/dlrm/dlrm_top.hpp index d59a868..0a52bc6 100644 --- a/rad-sim/example-designs/dlrm/dlrm_top.hpp +++ b/rad-sim/example-designs/dlrm/dlrm_top.hpp @@ -9,9 +9,13 @@ #include #include #include +#include +#include +#include -class dlrm_top : public sc_module { +class dlrm_top : public design_top { //sc_module { private: + portal *portal_inst; embedding_lookup *embedding_lookup_inst; custom_feature_interaction *feature_interaction_inst; std::vector> mvms; @@ -36,6 +40,6 @@ class dlrm_top : public sc_module { sc_in collector_fifo_ren; sc_out> collector_fifo_rdata; - dlrm_top(const sc_module_name &name); + dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_design); ~dlrm_top(); }; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/modules/portal.cpp b/rad-sim/example-designs/dlrm/modules/portal.cpp new file mode 100644 index 0000000..0a8e980 --- /dev/null +++ b/rad-sim/example-designs/dlrm/modules/portal.cpp @@ -0,0 +1,126 @@ +#include + +portal::portal(const sc_module_name &name, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design) { + + this->radsim_design = radsim_design; + + //combinational logic + SC_METHOD(Assign); + //sequential logic + SC_CTHREAD(Tick, clk.pos()); + // This function must be defined & called for any RAD-Sim module to register + // its info for automatically connecting to the NoC + this->RegisterModuleInfo(); //can comment out if not connecting to NoC +} + + +portal::~portal() {} + +void portal::Assign() { //combinational logic + //maybe add reset signal later + axis_portal_slave_interface.tready.write(true); +} + +int counter = 0; +sc_bv data_to_buffer = 0; +sc_bv dest_device = 1; //for testing, fixed at 1 to send to RAD1 which has mult design; //#define AXIS_USERW 66 +//bool got_data = false; +void portal::Tick() { //sequential logic + portal_recvd.write(0); + portal_axis_master.tvalid.write(false); + //bool test_ready_toggle = false; + wait(); + //Always @ positive edge of clock + while (true) { + + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + + if (axis_portal_slave_interface.tvalid.read() && + axis_portal_slave_interface.tready.read()) { + //std::cout << "Also got here" << std:: endl; + std::cout << "DLRM design raising valid data to send over portal module on cycle " << curr_cycle << " , will see valid high next clk cycle " << module_name << ": Got Transaction (user = " + << axis_portal_slave_interface.tuser.read().to_uint64() << ") (value = " + << axis_portal_slave_interface.tdata.read().to_uint64() << ")!" + << std::endl; + data_to_buffer = axis_portal_slave_interface.tdata.read(); + //got_data = true; + portal_axis_fields curr_transaction = { + axis_portal_slave_interface.tvalid.read(), + axis_portal_slave_interface.tready.read(), + axis_portal_slave_interface.tdata.read(), + axis_portal_slave_interface.tstrb.read(), + axis_portal_slave_interface.tkeep.read(), + axis_portal_slave_interface.tlast.read(), + axis_portal_slave_interface.tid.read(), + axis_portal_slave_interface.tdest.read(), + axis_portal_slave_interface.tuser.read() //tuser field + }; + + portal_axis_fifo.push(curr_transaction); + } + + //warning: must do this before next if-else block so that we pop before reading front. otherwise we get outtdated value on second turn. + //we see valid as high the clock cycle AFTER we set it as high in the if-else below + if (portal_axis_master.tvalid.read() && portal_axis_master.tready.read()) { // && test_ready_toggle) { + //pop out of fifo + if (!portal_axis_fifo.empty()) { + //test_ready_toggle = false; + portal_axis_fifo.pop(); + std::cout << "portal.cpp in dlrm design sent " << portal_axis_master.tdata.read().to_int64() << " to dest_device " << dest_device.to_int64() << " on cycle " << curr_cycle << std::endl; + portal_recvd.write(1); + if (portal_axis_master.tlast.read()) { + std::cout << "dlrm design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; + } + } + else { //should never reach here because valid should be false if fifo is empty + std::cout << "reached here but why? portal_axis_fifo.size(): " << portal_axis_fifo.size() << std::endl; + } + } + + if ((portal_axis_fifo.size() > 0) ) { //&& test_ready_toggle) { + portal_axis_fields curr_transaction = portal_axis_fifo.front(); + portal_axis_master.tdata.write(curr_transaction.tdata); + portal_axis_master.tdest.write(curr_transaction.tdest); + portal_axis_master.tuser.write(curr_transaction.tuser); + portal_axis_master.tvalid.write(true); + portal_axis_master.tlast.write(curr_transaction.tlast); + //test_ready_toggle = false; + } + else { + //counter++; + portal_axis_master.tdata.write(0); + //portal_axis_master.tuser.write(dest_device); + portal_axis_master.tvalid.write(false); + //test_ready_toggle = true; + } + + /*if (portal_axis_master.tvalid.read()) { + test_ready_toggle = !test_ready_toggle; + }*/ + + /*else if (!test_ready_toggle) { + test_ready_toggle = true; + }*/ + + wait(); + } +} + +void portal::RegisterModuleInfo() { + std::string port_name; + _num_noc_axis_slave_ports = 0; + _num_noc_axis_master_ports = 0; + _num_noc_aximm_slave_ports = 0; + _num_noc_aximm_master_ports = 0; + + port_name = module_name + ".axis_portal_slave_interface"; + RegisterAxisSlavePort(port_name, &axis_portal_slave_interface, DATAW, 0); + //radsim_design->portal_id = radsim_design->GetPortDestinationID(port_name); //store slave port info + //radsim_design->AssignPortalSlaveID(radsim_design->GetPortDestinationID(port_name)); + radsim_design->AssignPortalSlaveName(port_name); //bc other modules will send to this slave interface + + port_name = module_name + ".axis_portal_master_interface"; + RegisterAxisMasterPort(port_name, &axis_portal_master_interface, DATAW, 0); + +} \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/modules/portal.hpp b/rad-sim/example-designs/dlrm/modules/portal.hpp new file mode 100644 index 0000000..2fdb26b --- /dev/null +++ b/rad-sim/example-designs/dlrm/modules/portal.hpp @@ -0,0 +1,49 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct portal_axis_fields { + bool tvalid; + bool tready; + sc_bv tdata; + sc_bv tstrb; + sc_bv tkeep; + bool tlast; + sc_bv tid; + sc_bv tdest; + sc_bv tuser; + }; + +class portal : public RADSimModule { + private: + std::queue portal_axis_fifo; + + public: + RADSimDesignContext* radsim_design; + //sc_in> portal_in; + //sc_out> portal_out; + //axis ports for external access to inter_rad + axis_master_port portal_axis_master; + axis_slave_port portal_axis_slave; + //sc_out portal_recvd; //for testing: flag so add_driver keeps simulation going until data is sent to mult module + //Interfaces to the NoC + axis_slave_port axis_portal_slave_interface; + axis_master_port axis_portal_master_interface; + + portal(const sc_module_name &name, RADSimDesignContext* radsim_design); + ~portal(); + + void Assign(); // Combinational logic process + void Tick(); // Sequential logic process + SC_HAS_PROCESS(portal); + void RegisterModuleInfo(); //even tho did not add AXI Interface, need because is virtual fn in derived class +}; \ No newline at end of file diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 2d722aa..d6b5e27 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -7,8 +7,9 @@ #include //AKB ADDED #include //AKB ADDED -#include -#include //AKB ADDED to test multi-design +//#include +//#include //AKB ADDED to test multi-design +#include RADSimConfig radsim_config; //RADSimDesignContext radsim_design; //AKB: commented out @@ -18,7 +19,8 @@ SimTraceRecording sim_trace_probe; int sc_main(int argc, char *argv[]) { //AKB: using RADSimCluster class instead of creating new above - RADSimCluster* cluster = new RADSimCluster(3); //2); + //RADSimCluster* cluster = new RADSimCluster(3); //2); + RADSimCluster* cluster = new RADSimCluster(1); //2); gWatchOut = &cout; int log_verbosity = radsim_config.GetIntKnob("telemetry_log_verbosity"); @@ -31,45 +33,46 @@ int sc_main(int argc, char *argv[]) { sc_clock *driver_clk_sig = new sc_clock( "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); - add_system *system = new add_system("add_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED + //add_system *system = new add_system("add_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED + dlrm_system *system = new dlrm_system("dlrm_system", driver_clk_sig, cluster->all_rads[0]); //mult_system *system = new mult_system("mult_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED - sc_clock *driver_clk_sig2 = new sc_clock( - "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED + // sc_clock *driver_clk_sig2 = new sc_clock( + // "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED - //add_system *system2 = new add_system("add_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED - mult_system *system2 = new mult_system("mult_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED + // //add_system *system2 = new add_system("add_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED + // mult_system *system2 = new mult_system("mult_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED - sc_clock *driver_clk_sig3 = new sc_clock( - "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED + // sc_clock *driver_clk_sig3 = new sc_clock( + // "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED - mult_system *system3 = new mult_system("mult_system3", driver_clk_sig3, cluster->all_rads[2]); //AKB ADDED + // mult_system *system3 = new mult_system("mult_system3", driver_clk_sig3, cluster->all_rads[2]); //AKB ADDED //AKB ADDED: cluster->StoreSystem(system); - cluster->StoreSystem(system2); - cluster->StoreSystem(system3); + // cluster->StoreSystem(system2); + // cluster->StoreSystem(system3); sc_clock *inter_rad_clk_sig = new sc_clock( "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED, use same period as sim driver RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); //blackbox->ConnectRadPair(0, 1); //TODO: comment out bc not using this blackbox->ConnectRadAxi(0); - blackbox->ConnectRadAxi(1); - blackbox->ConnectRadAxi(2); + // blackbox->ConnectRadAxi(1); + // blackbox->ConnectRadAxi(2); int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - sc_bv<128> new_val; - sc_bv<128> old_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); + // sc_bv<128> new_val; + // sc_bv<128> old_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); while (cluster->AllRADsNotDone()) { sc_start(1, SC_NS); - //std::cout << "read system portal_in: " << system->dut_inst->portal_in.read() << std::endl; - //new_val = system2->dut_inst->portal_in.read(); //works but replacing to test axi - new_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); //TODO: use handshaking properly - //if (val != 0) { - if (new_val != old_val) { //to ensure only displayed once - std::cout << "read system2 design_top_portal_axis_slave: " << new_val.to_uint64() << std::endl; - old_val = new_val; - } + // //std::cout << "read system portal_in: " << system->dut_inst->portal_in.read() << std::endl; + // //new_val = system2->dut_inst->portal_in.read(); //works but replacing to test axi + // new_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); //TODO: use handshaking properly + // //if (val != 0) { + // if (new_val != old_val) { //to ensure only displayed once + // std::cout << "read system2 design_top_portal_axis_slave: " << new_val.to_uint64() << std::endl; + // old_val = new_val; + // } } std::cout << "stopping" << std::endl; int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); @@ -78,11 +81,11 @@ int sc_main(int argc, char *argv[]) { std::cout << "Simulation Cycles from main.cpp = " << end_cycle - start_cycle << std::endl; delete system; - delete system2; //AKB ADDED - delete system3; //AKB ADDED + // delete system2; //AKB ADDED + // delete system3; //AKB ADDED delete driver_clk_sig; - delete driver_clk_sig2; //AKB ADDED - delete driver_clk_sig3; //AKB ADDED + // delete driver_clk_sig2; //AKB ADDED + // delete driver_clk_sig3; //AKB ADDED sc_flit scf; scf.FreeAllFlits(); Flit *f = Flit::New(); diff --git a/rad-sim/sim/radsim_knobs b/rad-sim/sim/radsim_knobs index 96e3d6f..9a62145 100644 --- a/rad-sim/sim/radsim_knobs +++ b/rad-sim/sim/radsim_knobs @@ -1,11 +1,11 @@ radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim -design_name mult +design_name dlrm noc_num_nocs 1 noc_clk_period 1.0 noc_vcs 5 -noc_payload_width 166 -noc_num_nodes 16 -design_noc_placement mult.place +noc_payload_width 82 +noc_num_nodes 100 +design_noc_placement dlrm.place noc_adapters_clk_period 1.25 noc_adapters_fifo_size 16 noc_adapters_obuff_size 2 @@ -15,9 +15,9 @@ noc_adapters_vc_mapping direct design_clk_periods 5.0 2.0 3.32 1.5 sim_driver_period 5.0 telemetry_log_verbosity 2 -telemetry_traces -dram_num_controllers 0 -dram_clk_periods 2.0 -dram_queue_sizes 64 -dram_config_files HBM2_8Gb_x128 -radsim_user_design_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/mult +telemetry_traces Embedding LU Mem0 Mem1 Mem2 Mem3 Feature Inter. MVM first MVM last +dram_num_controllers 4 +dram_clk_periods 3.32 3.32 2.0 2.0 +dram_queue_sizes 64 64 64 64 +dram_config_files DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 +radsim_user_design_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm From c51ce9e648d76c2833e09fedb202289d2e783c6a Mon Sep 17 00:00:00 2001 From: abnashkb Date: Fri, 5 Apr 2024 01:36:15 -0400 Subject: [PATCH 052/127] Working dlrm on my multi-RAD radsim, running on 1 RAD --- rad-sim/config.py | 3 +-- rad-sim/example-designs/dlrm/CMakeLists.txt | 4 ++-- rad-sim/example-designs/dlrm/dlrm.clks | 3 ++- rad-sim/example-designs/dlrm/dlrm.place | 1 + rad-sim/example-designs/dlrm/dlrm_driver.cpp | 2 +- rad-sim/example-designs/dlrm/dlrm_system.cpp | 4 ++-- rad-sim/example-designs/dlrm/dlrm_top.cpp | 18 +++++++-------- .../dlrm/modules/collector.cpp | 5 +++-- .../dlrm/modules/collector.hpp | 3 ++- .../modules/custom_feature_interaction.cpp | 8 ++++--- .../modules/custom_feature_interaction.hpp | 4 +++- .../dlrm/modules/embedding_lookup.cpp | 10 +++++---- .../dlrm/modules/embedding_lookup.hpp | 3 ++- .../dlrm/modules/feature_interaction.cpp | 9 ++++---- .../dlrm/modules/feature_interaction.hpp | 4 +++- rad-sim/example-designs/dlrm/modules/mvm.cpp | 7 +++--- rad-sim/example-designs/dlrm/modules/mvm.hpp | 3 ++- .../example-designs/dlrm/modules/portal.cpp | 4 ++-- .../example-designs/dlrm/modules/portal.hpp | 2 +- rad-sim/sim/CMakeLists.txt | 10 ++++----- rad-sim/sim/design_top.hpp | 2 +- rad-sim/sim/radsim_knobs | 22 +++++++++---------- rad-sim/sim/sim.trace | 12 ++++++++++ 23 files changed, 84 insertions(+), 59 deletions(-) diff --git a/rad-sim/config.py b/rad-sim/config.py index 5033854..52b1d18 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -51,12 +51,11 @@ def parse_config_file(config_filename, booksim_params, radsim_header_params, rad print("Config Error: Parameter " + param_name + " is invalid!") exit(1) - '''noc_num_nodes = [] '''noc_num_nodes = [] for n in range(radsim_knobs["noc_num_nocs"]): noc_num_nodes.append(0) radsim_knobs["noc_num_nodes"] = noc_num_nodes - radsim_header_params["noc_num_nodes"] = noc_num_nodes''' + radsim_header_params["noc_num_nodes"] = noc_num_nodes radsim_knobs["radsim_user_design_root_dir"] = radsim_knobs["radsim_root_dir"] + "/example-designs/" + radsim_knobs["design_name"] diff --git a/rad-sim/example-designs/dlrm/CMakeLists.txt b/rad-sim/example-designs/dlrm/CMakeLists.txt index 4a4cb9d..c78af8d 100644 --- a/rad-sim/example-designs/dlrm/CMakeLists.txt +++ b/rad-sim/example-designs/dlrm/CMakeLists.txt @@ -52,5 +52,5 @@ set(hdrfiles add_compile_options(-Wall -Wextra -pedantic) -add_library(design STATIC ${srcfiles} ${hdrfiles}) -target_link_libraries(design PUBLIC SystemC::systemc booksim noc dram) \ No newline at end of file +add_library(design_dlrm STATIC ${srcfiles} ${hdrfiles}) +target_link_libraries(design_dlrm PUBLIC SystemC::systemc booksim noc dram) \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/dlrm.clks b/rad-sim/example-designs/dlrm/dlrm.clks index 9dfd686..d50f638 100644 --- a/rad-sim/example-designs/dlrm/dlrm.clks +++ b/rad-sim/example-designs/dlrm/dlrm.clks @@ -12,4 +12,5 @@ layer1_mvm0 0 3 layer1_mvm1 0 3 layer2_mvm0 0 3 layer2_mvm1 0 3 -output_collector 0 0 \ No newline at end of file +output_collector 0 0 +portal_inst 0 0 \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/dlrm.place b/rad-sim/example-designs/dlrm/dlrm.place index 1745288..2e2e240 100644 --- a/rad-sim/example-designs/dlrm/dlrm.place +++ b/rad-sim/example-designs/dlrm/dlrm.place @@ -65,3 +65,4 @@ layer1_mvm1 0 20 axis layer2_mvm0 0 10 axis layer2_mvm1 0 0 axis output_collector 0 31 axis +portal_inst 0 32 axis \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/dlrm_driver.cpp b/rad-sim/example-designs/dlrm/dlrm_driver.cpp index 1d648df..6ce21b1 100644 --- a/rad-sim/example-designs/dlrm/dlrm_driver.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_driver.cpp @@ -71,7 +71,7 @@ bool ParseOutputs(std::vector> &fi_outputs, return true; } -dlrm_driver::dlrm_driver(const sc_module_name &name, , RADSimDesignContext* radsim_design_) : sc_module(name) { +dlrm_driver::dlrm_driver(const sc_module_name &name, RADSimDesignContext* radsim_design_) : sc_module(name) { this->radsim_design = radsim_design_; //AKB ADDED // Parse design configuration (number of layers & number of MVM per layer) diff --git a/rad-sim/example-designs/dlrm/dlrm_system.cpp b/rad-sim/example-designs/dlrm/dlrm_system.cpp index 668d607..0373e47 100644 --- a/rad-sim/example-designs/dlrm/dlrm_system.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_system.cpp @@ -4,7 +4,7 @@ dlrm_system::dlrm_system(const sc_module_name &name, sc_clock *driver_clk_sig, R : sc_module(name) { // Instantiate driver - driver_inst = new dlrm_driver("driver"); + driver_inst = new dlrm_driver("driver", radsim_design); driver_inst->clk(*driver_clk_sig); driver_inst->rst(rst_sig); driver_inst->lookup_indecies_data(lookup_indecies_data_sig); @@ -20,7 +20,7 @@ dlrm_system::dlrm_system(const sc_module_name &name, sc_clock *driver_clk_sig, R driver_inst->collector_fifo_rdata(collector_fifo_rdata_sig); // Instantiate design top-level - dut_inst = new dlrm_top("dut"); + dut_inst = new dlrm_top("dut", radsim_design); dut_inst->rst(rst_sig); dut_inst->lookup_indecies_data(lookup_indecies_data_sig); dut_inst->lookup_indecies_target_channels( diff --git a/rad-sim/example-designs/dlrm/dlrm_top.cpp b/rad-sim/example-designs/dlrm/dlrm_top.cpp index 407689b..d8203ab 100644 --- a/rad-sim/example-designs/dlrm/dlrm_top.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_top.cpp @@ -45,7 +45,7 @@ dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_desig module_name_str = "embedding_lookup_inst"; std::strcpy(module_name, module_name_str.c_str()); embedding_lookup_inst = new embedding_lookup( - module_name, line_bitwidth, mem_channels, embedding_lookup_fifos_depth); + module_name, line_bitwidth, mem_channels, embedding_lookup_fifos_depth, radsim_design); embedding_lookup_inst->rst(rst); embedding_lookup_inst->lookup_indecies_data(lookup_indecies_data); embedding_lookup_inst->lookup_indecies_target_channels( @@ -64,7 +64,7 @@ dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_desig feature_interaction_inst = new custom_feature_interaction( module_name, line_bitwidth, element_bitwidth, total_mem_channels, feature_interaction_fifos_depth, num_mvms[0], - feature_interaction_inst_file); + feature_interaction_inst_file, radsim_design); feature_interaction_inst->rst(rst); feature_interaction_inst->received_responses(received_responses); @@ -79,7 +79,7 @@ dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_desig std::strcpy(module_name, module_name_str.c_str()); std::string inst_filename = design_root_dir + "/compiler/instructions/" + module_name_str + ".inst"; - mvms[l][m] = new mvm(module_name, m, l, inst_filename); + mvms[l][m] = new mvm(module_name, m, l, inst_filename, radsim_design); mvms[l][m]->rst(rst); axis_signal_count++; } @@ -106,7 +106,7 @@ dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_desig // Instantiate Output Collector module_name_str = "output_collector"; std::strcpy(module_name, module_name_str.c_str()); - output_collector = new collector(module_name); + output_collector = new collector(module_name, radsim_design); output_collector->rst(rst); output_collector->data_fifo_rdy(collector_fifo_rdy); output_collector->data_fifo_ren(collector_fifo_ren); @@ -128,7 +128,7 @@ dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_desig std::strcpy(module_name, module_name_str.c_str()); std::string mem_content_init = mem_content_init_prefix + to_string(ch_id); ext_mem[ctrl_id] = - new mem_controller(module_name, ctrl_id, mem_content_init); + new mem_controller(module_name, ctrl_id, radsim_design, mem_content_init); ext_mem[ctrl_id]->mem_clk(*mem_clks[ctrl_id]); ext_mem[ctrl_id]->rst(rst); ch_id += mem_channels[ctrl_id]; @@ -138,15 +138,15 @@ dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_desig module_name_str = "portal_inst"; std::strcpy(module_name, module_name_str.c_str()); portal_inst = new portal(module_name, radsim_design); - portal_inst->portal_recvd(this->portal_recvd); + //portal_inst->portal_recvd(this->portal_recvd); //connect master to master instead, to expose to top portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); //top drives portal bc top receives slave inputs - radsim_design.BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm", "dlrm.place", "dlrm.clks"); - radsim_design.CreateSystemNoCs(rst); - radsim_design.ConnectModulesToNoC(); + radsim_design->BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm", "dlrm.place", "dlrm.clks"); + radsim_design->CreateSystemNoCs(rst); + radsim_design->ConnectModulesToNoC(); } dlrm_top::~dlrm_top() { diff --git a/rad-sim/example-designs/dlrm/modules/collector.cpp b/rad-sim/example-designs/dlrm/modules/collector.cpp index 0742ddd..448b47e 100644 --- a/rad-sim/example-designs/dlrm/modules/collector.cpp +++ b/rad-sim/example-designs/dlrm/modules/collector.cpp @@ -1,10 +1,11 @@ #include -collector::collector(const sc_module_name &name) - : RADSimModule(name), rst("rst"), data_fifo_rdy("data_fifo_rdy"), +collector::collector(const sc_module_name &name, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), rst("rst"), data_fifo_rdy("data_fifo_rdy"), data_fifo_ren("data_fifo_ren"), data_fifo_rdata("data_fifo_rdata") { module_name = name; + this->radsim_design = radsim_design; char fifo_name[25]; std::string fifo_name_str; diff --git a/rad-sim/example-designs/dlrm/modules/collector.hpp b/rad-sim/example-designs/dlrm/modules/collector.hpp index 4e9f9ad..73f6f09 100644 --- a/rad-sim/example-designs/dlrm/modules/collector.hpp +++ b/rad-sim/example-designs/dlrm/modules/collector.hpp @@ -20,13 +20,14 @@ class collector : public RADSimModule { data_fifo_almost_empty_signal; public: + RADSimDesignContext* radsim_design; sc_in rst; sc_out data_fifo_rdy; sc_in data_fifo_ren; sc_out> data_fifo_rdata; axis_slave_port rx_interface; - collector(const sc_module_name &name); + collector(const sc_module_name &name, RADSimDesignContext* radsim_design); ~collector(); void Assign(); diff --git a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp index 42c9555..33682be 100644 --- a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp +++ b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp @@ -42,9 +42,11 @@ custom_feature_interaction::custom_feature_interaction( const sc_module_name &name, unsigned int dataw, unsigned int element_bitwidth, unsigned int num_mem_channels, unsigned int fifos_depth, unsigned int num_output_channels, - std::string &instructions_file) - : RADSimModule(name) { + std::string &instructions_file, + RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design) { + this->radsim_design = radsim_design; _fifos_depth = fifos_depth; _num_received_responses = 0; _num_mem_channels = num_mem_channels; @@ -248,7 +250,7 @@ void custom_feature_interaction::Tick() { std::string dest_name = "layer0_mvm" + std::to_string(ch_id) + ".rx_interface"; axis_interface[ch_id].tdest.write( - radsim_design.GetPortDestinationID(dest_name)); + radsim_design->GetPortDestinationID(dest_name)); } else { axis_interface[ch_id].tvalid.write(false); } diff --git a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.hpp b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.hpp index 85fdb72..bf481e0 100644 --- a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.hpp +++ b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.hpp @@ -47,6 +47,7 @@ class custom_feature_interaction : public RADSimModule { ofstream *_debug_feature_interaction_out; public: + RADSimDesignContext* radsim_design; sc_in rst; // Interface to driver logic sc_out received_responses; @@ -59,7 +60,8 @@ class custom_feature_interaction : public RADSimModule { unsigned int num_mem_channels, unsigned int fifos_depth, unsigned int num_output_channels, - std::string &instructions_file); + std::string &instructions_file, + RADSimDesignContext* radsim_design); ~custom_feature_interaction(); void Assign(); // Combinational logic process diff --git a/rad-sim/example-designs/dlrm/modules/embedding_lookup.cpp b/rad-sim/example-designs/dlrm/modules/embedding_lookup.cpp index 63a0c8a..3812a43 100644 --- a/rad-sim/example-designs/dlrm/modules/embedding_lookup.cpp +++ b/rad-sim/example-designs/dlrm/modules/embedding_lookup.cpp @@ -3,8 +3,10 @@ embedding_lookup::embedding_lookup( const sc_module_name &name, unsigned int dataw, std::vector &num_mem_channels_per_controller, - unsigned int fifo_depth) - : RADSimModule(name) { + unsigned int fifo_depth, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design) { + + this->radsim_design = radsim_design; _total_num_channels = 0; unsigned int ctrl_id = 0; @@ -119,12 +121,12 @@ void embedding_lookup::Tick() { uint64_t table_base_addr = _base_addresses_fifo[ch_id].front(); std::string dst_port_name = _dst_port_names[ch_id]; - uint64_t dst_addr = radsim_design.GetPortBaseAddress(dst_port_name) + + uint64_t dst_addr = radsim_design->GetPortBaseAddress(dst_port_name) + table_base_addr + lookup_index; std::string src_port_name = "feature_interaction_inst.aximm_interface_" + std::to_string(ch_id); - uint64_t src_addr = radsim_design.GetPortBaseAddress(src_port_name); + uint64_t src_addr = radsim_design->GetPortBaseAddress(src_port_name); /*if (ctrl_id == 0) { std::cout << "Base address: " << table_base_addr << std::endl; diff --git a/rad-sim/example-designs/dlrm/modules/embedding_lookup.hpp b/rad-sim/example-designs/dlrm/modules/embedding_lookup.hpp index c7b01aa..19e3313 100644 --- a/rad-sim/example-designs/dlrm/modules/embedding_lookup.hpp +++ b/rad-sim/example-designs/dlrm/modules/embedding_lookup.hpp @@ -28,6 +28,7 @@ class embedding_lookup : public RADSimModule { unsigned int _debug_sent_request_counter; public: + RADSimDesignContext* radsim_design; sc_in rst; // Interface to driver logic sc_in> lookup_indecies_data; @@ -40,7 +41,7 @@ class embedding_lookup : public RADSimModule { embedding_lookup(const sc_module_name &name, unsigned int dataw, std::vector &num_mem_channels_per_controller, - unsigned int fifo_depth); + unsigned int fifo_depth, RADSimDesignContext* radsim_design); ~embedding_lookup(); void Assign(); // Combinational logic process diff --git a/rad-sim/example-designs/dlrm/modules/feature_interaction.cpp b/rad-sim/example-designs/dlrm/modules/feature_interaction.cpp index fde6e27..3291694 100644 --- a/rad-sim/example-designs/dlrm/modules/feature_interaction.cpp +++ b/rad-sim/example-designs/dlrm/modules/feature_interaction.cpp @@ -50,9 +50,10 @@ feature_interaction::feature_interaction(const sc_module_name &name, unsigned int num_mem_channels, unsigned int fifos_depth, unsigned int num_output_channels, - std::string &instructions_file) - : RADSimModule(name) { - + std::string &instructions_file, + RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design) { + this->radsim_design = radsim_design; _fifos_depth = fifos_depth; _afifo_width_ratio_in = 32 / 4; _afifo_width_ratio_out = LANES / 4; @@ -286,7 +287,7 @@ void feature_interaction::Tick() { std::string dest_name = "layer0_mvm" + std::to_string(ch_id) + ".rx_interface"; axis_interface[ch_id].tdest.write( - radsim_design.GetPortDestinationID(dest_name)); + radsim_design->GetPortDestinationID(dest_name)); } else { axis_interface[ch_id].tvalid.write(false); } diff --git a/rad-sim/example-designs/dlrm/modules/feature_interaction.hpp b/rad-sim/example-designs/dlrm/modules/feature_interaction.hpp index 67fc2c7..88e1528 100644 --- a/rad-sim/example-designs/dlrm/modules/feature_interaction.hpp +++ b/rad-sim/example-designs/dlrm/modules/feature_interaction.hpp @@ -50,6 +50,7 @@ class feature_interaction : public RADSimModule { ofstream *_debug_feature_interaction_out; public: + RADSimDesignContext* radsim_design; sc_in rst; // Interface to driver logic sc_out received_responses; @@ -61,7 +62,8 @@ class feature_interaction : public RADSimModule { unsigned int element_bitwidth, unsigned int num_mem_channels, unsigned int fifos_depth, unsigned int num_output_channels, - std::string &instructions_file); + std::string &instructions_file, + RADSimDesignContext* radsim_design); ~feature_interaction(); void Assign(); // Combinational logic process diff --git a/rad-sim/example-designs/dlrm/modules/mvm.cpp b/rad-sim/example-designs/dlrm/modules/mvm.cpp index cf25b9f..528e64c 100644 --- a/rad-sim/example-designs/dlrm/modules/mvm.cpp +++ b/rad-sim/example-designs/dlrm/modules/mvm.cpp @@ -39,8 +39,8 @@ bool ParseInstructions(std::vector &inst_mem, } mvm::mvm(const sc_module_name &name, unsigned int id_mvm, unsigned int id_layer, - const std::string &inst_filename) - : RADSimModule(name), matrix_mem_rdata("matrix_mem_rdata", DOT_PRODUCTS), + const std::string &inst_filename, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), matrix_mem_rdata("matrix_mem_rdata", DOT_PRODUCTS), matrix_mem_wen("matrix_mem_wen", DOT_PRODUCTS), ififo_pipeline("ififo_pipeline", RF_RD_LATENCY), reduce_pipeline("reduce_pipeline", RF_RD_LATENCY), @@ -54,6 +54,7 @@ mvm::mvm(const sc_module_name &name, unsigned int id_mvm, unsigned int id_layer, dest_mvm_pipeline("mvm_layer_pipeline", COMPUTE_LATENCY + RF_RD_LATENCY), tdata_vec(LANES), result(DOT_PRODUCTS), rst("rst") { + this->radsim_design = radsim_design; module_name = name; mvm_id = id_mvm; layer_id = id_layer; @@ -507,7 +508,7 @@ void mvm::Assign() { dest_name = "layer" + std::to_string(dest_layer_int - 1) + "_mvm" + std::to_string(dest_mvm_int) + ".rx_interface"; } - dest_id = radsim_design.GetPortDestinationID(dest_name); + dest_id = radsim_design->GetPortDestinationID(dest_name); unsigned int dest_interface; // which FIFO unsigned int dest_interface_id; // added for separate ports diff --git a/rad-sim/example-designs/dlrm/modules/mvm.hpp b/rad-sim/example-designs/dlrm/modules/mvm.hpp index 3dc6d1d..8c61837 100644 --- a/rad-sim/example-designs/dlrm/modules/mvm.hpp +++ b/rad-sim/example-designs/dlrm/modules/mvm.hpp @@ -73,6 +73,7 @@ class mvm : public RADSimModule { sc_signal dot_op, dot_reduce_op; public: + RADSimDesignContext* radsim_design; sc_in rst; axis_slave_port rx_input_interface; axis_slave_port rx_reduce_interface; @@ -80,7 +81,7 @@ class mvm : public RADSimModule { axis_master_port tx_reduce_interface; mvm(const sc_module_name &name, unsigned int id_mvm, unsigned int id_layer, - const std::string &inst_filename); + const std::string &inst_filename, RADSimDesignContext* radsim_design); ~mvm(); void Assign(); diff --git a/rad-sim/example-designs/dlrm/modules/portal.cpp b/rad-sim/example-designs/dlrm/modules/portal.cpp index 0a8e980..292b390 100644 --- a/rad-sim/example-designs/dlrm/modules/portal.cpp +++ b/rad-sim/example-designs/dlrm/modules/portal.cpp @@ -27,7 +27,7 @@ sc_bv data_to_buffer = 0; sc_bv dest_device = 1; //for testing, fixed at 1 to send to RAD1 which has mult design; //#define AXIS_USERW 66 //bool got_data = false; void portal::Tick() { //sequential logic - portal_recvd.write(0); + //portal_recvd.write(0); portal_axis_master.tvalid.write(false); //bool test_ready_toggle = false; wait(); @@ -68,7 +68,7 @@ void portal::Tick() { //sequential logic //test_ready_toggle = false; portal_axis_fifo.pop(); std::cout << "portal.cpp in dlrm design sent " << portal_axis_master.tdata.read().to_int64() << " to dest_device " << dest_device.to_int64() << " on cycle " << curr_cycle << std::endl; - portal_recvd.write(1); + //portal_recvd.write(1); if (portal_axis_master.tlast.read()) { std::cout << "dlrm design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; } diff --git a/rad-sim/example-designs/dlrm/modules/portal.hpp b/rad-sim/example-designs/dlrm/modules/portal.hpp index 2fdb26b..324b053 100644 --- a/rad-sim/example-designs/dlrm/modules/portal.hpp +++ b/rad-sim/example-designs/dlrm/modules/portal.hpp @@ -5,11 +5,11 @@ #include #include #include -#include #include #include #include #include +#include struct portal_axis_fields { bool tvalid; diff --git a/rad-sim/sim/CMakeLists.txt b/rad-sim/sim/CMakeLists.txt index 78fa50a..5873ba0 100644 --- a/rad-sim/sim/CMakeLists.txt +++ b/rad-sim/sim/CMakeLists.txt @@ -18,10 +18,8 @@ include_directories( dram dram/DRAMsim3 dram/DRAMsim3/src - ../example-designs/add - ../example-designs/add/modules - ../example-designs/mult - ../example-designs/mult/modules + ../example-designs/dlrm + ../example-designs/dlrm/modules ) find_package(verilator CONFIG) @@ -57,10 +55,10 @@ set(CMAKE_CXX_FLAGS_DEBUG "-g") set(CMAKE_CXX_FLAGS_RELEASE "-O3") add_library(radsim STATIC ${srcfiles} ${hdrfiles}) -target_link_libraries(radsim PUBLIC SystemC::systemc booksim noc dram design_add design_mult) +target_link_libraries(radsim PUBLIC SystemC::systemc booksim noc dram design_dlrm) add_executable(system main.cpp ${srcfiles} ${hdrfiles}) -target_link_libraries(system PUBLIC radsim SystemC::systemc booksim noc dram design_add design_mult) +target_link_libraries(system PUBLIC radsim SystemC::systemc booksim noc dram design_dlrm) add_custom_target(run COMMAND system WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} diff --git a/rad-sim/sim/design_top.hpp b/rad-sim/sim/design_top.hpp index 49c0cc5..8758bc6 100644 --- a/rad-sim/sim/design_top.hpp +++ b/rad-sim/sim/design_top.hpp @@ -3,7 +3,7 @@ #include #include -#define DATAW 128 +//#define DATAW 128 class design_top : virtual public sc_module { public: diff --git a/rad-sim/sim/radsim_knobs b/rad-sim/sim/radsim_knobs index 9a62145..d2a35e4 100644 --- a/rad-sim/sim/radsim_knobs +++ b/rad-sim/sim/radsim_knobs @@ -1,23 +1,23 @@ radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim design_name dlrm noc_num_nocs 1 -noc_clk_period 1.0 -noc_vcs 5 +noc_clk_period 1.0 +noc_vcs 5 noc_payload_width 82 noc_num_nodes 100 -design_noc_placement dlrm.place -noc_adapters_clk_period 1.25 -noc_adapters_fifo_size 16 -noc_adapters_obuff_size 2 -noc_adapters_in_arbiter fixed_rr -noc_adapters_out_arbiter priority_rr +design_noc_placement dlrm.place +noc_adapters_clk_period 1.25 +noc_adapters_fifo_size 16 +noc_adapters_obuff_size 2 +noc_adapters_in_arbiter fixed_rr +noc_adapters_out_arbiter priority_rr noc_adapters_vc_mapping direct -design_clk_periods 5.0 2.0 3.32 1.5 +design_clk_periods 5.0 2.0 3.32 1.5 sim_driver_period 5.0 telemetry_log_verbosity 2 telemetry_traces Embedding LU Mem0 Mem1 Mem2 Mem3 Feature Inter. MVM first MVM last dram_num_controllers 4 -dram_clk_periods 3.32 3.32 2.0 2.0 +dram_clk_periods 3.32 3.32 2.0 2.0 dram_queue_sizes 64 64 64 64 -dram_config_files DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 +dram_config_files DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 radsim_user_design_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm diff --git a/rad-sim/sim/sim.trace b/rad-sim/sim/sim.trace index e69de29..1901ba9 100644 --- a/rad-sim/sim/sim.trace +++ b/rad-sim/sim/sim.trace @@ -0,0 +1,12 @@ + + + + + + + + + + + + From 55cc5d0db6b0102680153f86fafc7884b74d4590 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Fri, 5 Apr 2024 03:24:01 -0400 Subject: [PATCH 053/127] Working two indep DLRM RADs --- .../dlrm/modules/custom_feature_interaction.cpp | 5 ++++- .../dlrm/modules/feature_interaction.cpp | 5 ++++- rad-sim/example-designs/dlrm/modules/mvm.cpp | 10 +++++++--- rad-sim/example-designs/dlrm/modules/portal.cpp | 3 ++- rad-sim/sim/main.cpp | 11 +++++++++-- rad-sim/sim/radsim_inter_rad.hpp | 2 +- 6 files changed, 27 insertions(+), 9 deletions(-) diff --git a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp index 33682be..06cb7a5 100644 --- a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp +++ b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp @@ -249,8 +249,11 @@ void custom_feature_interaction::Tick() { axis_interface[ch_id].tid.write(0); std::string dest_name = "layer0_mvm" + std::to_string(ch_id) + ".rx_interface"; + sc_bv dest_id_concat = radsim_design->GetPortDestinationID(dest_name); + DEST_RAD(dest_id_concat) = radsim_design->rad_id; axis_interface[ch_id].tdest.write( - radsim_design->GetPortDestinationID(dest_name)); + dest_id_concat); + //radsim_design->GetPortDestinationID(dest_name)); } else { axis_interface[ch_id].tvalid.write(false); } diff --git a/rad-sim/example-designs/dlrm/modules/feature_interaction.cpp b/rad-sim/example-designs/dlrm/modules/feature_interaction.cpp index 3291694..18e1de5 100644 --- a/rad-sim/example-designs/dlrm/modules/feature_interaction.cpp +++ b/rad-sim/example-designs/dlrm/modules/feature_interaction.cpp @@ -286,8 +286,11 @@ void feature_interaction::Tick() { axis_interface[ch_id].tid.write(0); std::string dest_name = "layer0_mvm" + std::to_string(ch_id) + ".rx_interface"; + sc_bv dest_id_concat = radsim_design->GetPortDestinationID(dest_name); + DEST_RAD(dest_id_concat) = radsim_design->rad_id; axis_interface[ch_id].tdest.write( - radsim_design->GetPortDestinationID(dest_name)); + dest_id_concat); + //radsim_design->GetPortDestinationID(dest_name)); } else { axis_interface[ch_id].tvalid.write(false); } diff --git a/rad-sim/example-designs/dlrm/modules/mvm.cpp b/rad-sim/example-designs/dlrm/modules/mvm.cpp index 528e64c..9567bf5 100644 --- a/rad-sim/example-designs/dlrm/modules/mvm.cpp +++ b/rad-sim/example-designs/dlrm/modules/mvm.cpp @@ -509,7 +509,11 @@ void mvm::Assign() { std::to_string(dest_mvm_int) + ".rx_interface"; } dest_id = radsim_design->GetPortDestinationID(dest_name); - + sc_bv dest_id_concat = dest_id; + // if (radsim_design->rad_id == 1){ + // std::cout << "mvm.cpp on RAD " << radsim_design->rad_id << "'s dest_id: " << dest_id << " and DEST_RAD(dest_id): " << DEST_RAD(dest_id_concat) << std::endl; + // } + DEST_RAD(dest_id_concat) = radsim_design->rad_id; unsigned int dest_interface; // which FIFO unsigned int dest_interface_id; // added for separate ports // If destination is the same layer, send to reduce FIFO @@ -538,7 +542,7 @@ void mvm::Assign() { tx_input_interface.tdata.write(tx_tdata_bv); tx_input_interface.tvalid.write(true); tx_input_interface.tuser.write(dest_interface); - tx_input_interface.tdest.write(dest_id); + tx_input_interface.tdest.write(dest_id_concat); //dest_id); tx_input_interface.tid.write(dest_interface_id); tx_reduce_interface.tvalid.write(false); // if (mvm_id == 1 && layer_id == 2 && !ofifo_empty_signal) { @@ -556,7 +560,7 @@ void mvm::Assign() { tx_reduce_interface.tdata.write(tx_tdata_bv); tx_reduce_interface.tvalid.write(true); tx_reduce_interface.tuser.write(dest_interface); - tx_reduce_interface.tdest.write(dest_id); + tx_reduce_interface.tdest.write(dest_id_concat); //dest_id); tx_reduce_interface.tid.write(dest_interface_id); tx_input_interface.tvalid.write(false); } else { diff --git a/rad-sim/example-designs/dlrm/modules/portal.cpp b/rad-sim/example-designs/dlrm/modules/portal.cpp index 292b390..c91190f 100644 --- a/rad-sim/example-designs/dlrm/modules/portal.cpp +++ b/rad-sim/example-designs/dlrm/modules/portal.cpp @@ -41,7 +41,8 @@ void portal::Tick() { //sequential logic //std::cout << "Also got here" << std:: endl; std::cout << "DLRM design raising valid data to send over portal module on cycle " << curr_cycle << " , will see valid high next clk cycle " << module_name << ": Got Transaction (user = " << axis_portal_slave_interface.tuser.read().to_uint64() << ") (value = " - << axis_portal_slave_interface.tdata.read().to_uint64() << ")!" + << axis_portal_slave_interface.tdata.read().to_uint64() << ")! Destination field is " + << axis_portal_slave_interface.tdest.read().to_uint64() << std::endl; data_to_buffer = axis_portal_slave_interface.tdata.read(); //got_data = true; diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index d6b5e27..d25c1e2 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -20,7 +20,7 @@ SimTraceRecording sim_trace_probe; int sc_main(int argc, char *argv[]) { //AKB: using RADSimCluster class instead of creating new above //RADSimCluster* cluster = new RADSimCluster(3); //2); - RADSimCluster* cluster = new RADSimCluster(1); //2); + RADSimCluster* cluster = new RADSimCluster(2); gWatchOut = &cout; int log_verbosity = radsim_config.GetIntKnob("telemetry_log_verbosity"); @@ -35,6 +35,10 @@ int sc_main(int argc, char *argv[]) { //add_system *system = new add_system("add_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED dlrm_system *system = new dlrm_system("dlrm_system", driver_clk_sig, cluster->all_rads[0]); + + sc_clock *driver_clk_sig1 = new sc_clock( + "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); + dlrm_system *system1 = new dlrm_system("dlrm_system1", driver_clk_sig1, cluster->all_rads[1]); //mult_system *system = new mult_system("mult_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED // sc_clock *driver_clk_sig2 = new sc_clock( @@ -50,6 +54,7 @@ int sc_main(int argc, char *argv[]) { //AKB ADDED: cluster->StoreSystem(system); + cluster->StoreSystem(system1); // cluster->StoreSystem(system2); // cluster->StoreSystem(system3); sc_clock *inter_rad_clk_sig = new sc_clock( @@ -57,7 +62,7 @@ int sc_main(int argc, char *argv[]) { RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); //blackbox->ConnectRadPair(0, 1); //TODO: comment out bc not using this blackbox->ConnectRadAxi(0); - // blackbox->ConnectRadAxi(1); + blackbox->ConnectRadAxi(1); // blackbox->ConnectRadAxi(2); int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); @@ -81,9 +86,11 @@ int sc_main(int argc, char *argv[]) { std::cout << "Simulation Cycles from main.cpp = " << end_cycle - start_cycle << std::endl; delete system; + delete system1; // delete system2; //AKB ADDED // delete system3; //AKB ADDED delete driver_clk_sig; + delete driver_clk_sig1; // delete driver_clk_sig2; //AKB ADDED // delete driver_clk_sig3; //AKB ADDED sc_flit scf; diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index 04e1b77..0b978cd 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -10,7 +10,7 @@ #include #include -#define DATAW 128 +#define DATAW 16*32 //changed to match dlrm defines file //128 #define NUM_SLOTS 5 //number of fifo slots, for now = NUM_ADDENDS #define DEST_RAD_LSB 0 #define DEST_RAD_MSB 7 From a278ec54b19371619bceb123d2c7f0eb750f667f Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sat, 13 Apr 2024 20:01:42 -0400 Subject: [PATCH 054/127] In progress, issues with results of mvm --- rad-sim/example-designs/dlrm/dlrm_driver.cpp | 3 +- rad-sim/example-designs/dlrm/dlrm_top.cpp | 3 +- rad-sim/example-designs/dlrm/dlrm_top.hpp | 1 + .../dlrm/modules/collector.cpp | 2 +- .../modules/custom_feature_interaction.cpp | 20 ++++-- .../dlrm/modules/embedding_lookup.cpp | 7 ++- rad-sim/example-designs/dlrm/modules/mvm.cpp | 21 +++++-- .../example-designs/dlrm/modules/portal.cpp | 61 ++++++++++++++++--- .../example-designs/dlrm/modules/portal.hpp | 1 + rad-sim/sim/main.cpp | 1 + rad-sim/sim/noc/axis_slave_adapter.cpp | 2 +- rad-sim/sim/radsim_inter_rad.cpp | 8 ++- 12 files changed, 103 insertions(+), 27 deletions(-) diff --git a/rad-sim/example-designs/dlrm/dlrm_driver.cpp b/rad-sim/example-designs/dlrm/dlrm_driver.cpp index 6ce21b1..483ad84 100644 --- a/rad-sim/example-designs/dlrm/dlrm_driver.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_driver.cpp @@ -168,7 +168,7 @@ void dlrm_driver::sink() { matching = (dut_output[e] == _mlp_outputs[outputs_count][e]); } if (!matching) { - std::cout << "Output " << outputs_count << " does not match!\n"; + std::cout << "Output " << outputs_count << " on rad " << radsim_design->rad_id << " does not match!\n"; std::cout << "TRUE: [ "; for (unsigned int e = 0; e < _mlp_outputs[outputs_count].size(); e++) { std::cout << _mlp_outputs[outputs_count][e] << " "; @@ -185,6 +185,7 @@ void dlrm_driver::sink() { all_outputs_matching &= matching; print_progress_bar(outputs_count, _num_mlp_outputs); + std::cout << "outputs_count " << outputs_count << " and _num_mlp_outputs " << _num_mlp_outputs << std::endl; } wait(); } diff --git a/rad-sim/example-designs/dlrm/dlrm_top.cpp b/rad-sim/example-designs/dlrm/dlrm_top.cpp index d8203ab..f3479c7 100644 --- a/rad-sim/example-designs/dlrm/dlrm_top.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_top.cpp @@ -1,7 +1,7 @@ #include dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : sc_module(name) { - + this->radsim_design = radsim_design; unsigned int line_bitwidth = 512; unsigned int element_bitwidth = 16; std::vector mem_channels = {1, 1, 8, 8}; @@ -138,6 +138,7 @@ dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_desig module_name_str = "portal_inst"; std::strcpy(module_name, module_name_str.c_str()); portal_inst = new portal(module_name, radsim_design); + portal_inst->rst(rst); //portal_inst->portal_recvd(this->portal_recvd); //connect master to master instead, to expose to top diff --git a/rad-sim/example-designs/dlrm/dlrm_top.hpp b/rad-sim/example-designs/dlrm/dlrm_top.hpp index 0a52bc6..0144dc6 100644 --- a/rad-sim/example-designs/dlrm/dlrm_top.hpp +++ b/rad-sim/example-designs/dlrm/dlrm_top.hpp @@ -24,6 +24,7 @@ class dlrm_top : public design_top { //sc_module { std::vector axis_sig; std::vector mem_clks; + RADSimDesignContext* radsim_design; //AKB ADDED public: sc_in rst; diff --git a/rad-sim/example-designs/dlrm/modules/collector.cpp b/rad-sim/example-designs/dlrm/modules/collector.cpp index 448b47e..e71ba8e 100644 --- a/rad-sim/example-designs/dlrm/modules/collector.cpp +++ b/rad-sim/example-designs/dlrm/modules/collector.cpp @@ -36,7 +36,7 @@ void collector::Assign() { if (rst.read()) { rx_interface.tready.write(false); data_fifo_rdy.write(false); - } else { + } else if (radsim_design->rad_id == 1) { rx_interface.tready.write(!data_fifo_almost_full_signal); data_fifo_wen_signal.write(rx_interface.tvalid.read() && rx_interface.tready.read()); diff --git a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp index 06cb7a5..3f3d18c 100644 --- a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp +++ b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp @@ -99,7 +99,7 @@ void custom_feature_interaction::Assign() { aximm_interface[ch_id].bready.write(false); aximm_interface[ch_id].rready.write(false); } - } else { + } else if (radsim_design->rad_id == 0) { // Set ready signals to accept read/write response from the AXI-MM NoC for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { aximm_interface[ch_id].bready.write(false); @@ -146,6 +146,7 @@ bool are_ififos_ready(sc_vector> &ififo_empty, } void custom_feature_interaction::Tick() { + if (radsim_design->rad_id == 0) { // Reset ports for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { aximm_interface[ch_id].arvalid.write(false); @@ -167,8 +168,10 @@ void custom_feature_interaction::Tick() { _pc.write(0); wait(); + int no_val_counter = 0; + // Always @ positive edge of the clock - while (true) { + while (true ) { //&& (radsim_design->rad_id == 0)) { // Accept R responses from the NoC for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { if (_input_fifos[ch_id].size() < _fifos_depth && @@ -239,8 +242,9 @@ void custom_feature_interaction::Tick() { _output_fifos[ch_id].pop(); } - if (!_output_fifos[ch_id].empty()) { + if ( (!_output_fifos[ch_id].empty()) ) { //&& (radsim_design->rad_id == 0) ) { data_vector tx_tdata = _output_fifos[ch_id].front(); + //std::cout << "tx_tdata " << tx_tdata << " on RAD " << radsim_design->rad_id << std::endl; sc_bv tx_tdata_bv; data_vector_to_bv(tx_tdata, tx_tdata_bv, _num_output_elements); axis_interface[ch_id].tvalid.write(true); @@ -249,13 +253,18 @@ void custom_feature_interaction::Tick() { axis_interface[ch_id].tid.write(0); std::string dest_name = "layer0_mvm" + std::to_string(ch_id) + ".rx_interface"; - sc_bv dest_id_concat = radsim_design->GetPortDestinationID(dest_name); - DEST_RAD(dest_id_concat) = radsim_design->rad_id; + //std::cout << "radsim_design->GetPortDestinationID(dest_name) on RAD " << radsim_design->rad_id << ": " << radsim_design->GetPortDestinationID(dest_name) << std::endl; + sc_bv dest_id_concat; + DEST_RAD(dest_id_concat) = 1; //radsim_design->rad_id; + DEST_LOCAL_NODE(dest_id_concat) = radsim_design->GetPortDestinationID(dest_name); + DEST_REMOTE_NODE(dest_id_concat) = radsim_design->GetPortDestinationID(dest_name); axis_interface[ch_id].tdest.write( dest_id_concat); //radsim_design->GetPortDestinationID(dest_name)); + no_val_counter = 0; } else { axis_interface[ch_id].tvalid.write(false); + no_val_counter++; } } @@ -271,6 +280,7 @@ void custom_feature_interaction::Tick() { received_responses.write(_num_received_responses); wait(); } + } } void custom_feature_interaction::RegisterModuleInfo() { diff --git a/rad-sim/example-designs/dlrm/modules/embedding_lookup.cpp b/rad-sim/example-designs/dlrm/modules/embedding_lookup.cpp index 3812a43..4f678fa 100644 --- a/rad-sim/example-designs/dlrm/modules/embedding_lookup.cpp +++ b/rad-sim/example-designs/dlrm/modules/embedding_lookup.cpp @@ -55,7 +55,7 @@ void embedding_lookup::Assign() { aximm_req_interface[ch_id].bready.write(false); aximm_req_interface[ch_id].rready.write(false); } - } else { + } else if ((radsim_design->rad_id == 0)) { bool all_fifos_not_full = true; // Always ready to accept read/write response from the AXI-MM NoC @@ -73,6 +73,7 @@ void embedding_lookup::Assign() { } void embedding_lookup::Tick() { + if (radsim_design->rad_id == 0) { // Reset logic for (unsigned int ch_id = 0; ch_id < _total_num_channels; ch_id++) { aximm_req_interface[ch_id].arvalid.write(false); @@ -90,8 +91,7 @@ void embedding_lookup::Tick() { wait(); // Always @ positive edge of the clock - while (true) { - // Interface with testbench driver + while (true) { //&& (radsim_design->rad_id == 0)) { if (lookup_indecies_ready.read() && lookup_indecies_valid.read()) { data_vector lookup_indecies = lookup_indecies_data.read(); data_vector target_channels = @@ -185,6 +185,7 @@ void embedding_lookup::Tick() { } wait(); } + } } void embedding_lookup::RegisterModuleInfo() { diff --git a/rad-sim/example-designs/dlrm/modules/mvm.cpp b/rad-sim/example-designs/dlrm/modules/mvm.cpp index 9567bf5..60bf54e 100644 --- a/rad-sim/example-designs/dlrm/modules/mvm.cpp +++ b/rad-sim/example-designs/dlrm/modules/mvm.cpp @@ -202,6 +202,7 @@ int16_t dot(data_vector v1, data_vector v2) { } void mvm::Tick() { + if (radsim_design->rad_id == 1) { // Reset logic for (unsigned int lane_id = 0; lane_id < LANES; lane_id++) { tdata_vec[lane_id] = 0; @@ -211,7 +212,7 @@ void mvm::Tick() { // next_inst.write(rst_inst); wait(); // Sequential logic - while (true) { + while (true && (radsim_design->rad_id == 1)) { /*std::cout << this->name() << " iFIFO occ: " << ififo->occupancy() << " rFIFO occ: " << reduce_fifo->occupancy() << " oFIFO occ: " << ofifo->occupancy() @@ -315,7 +316,16 @@ void mvm::Tick() { if (rx_input_interface.tvalid.read() && rx_input_interface.tready.read()) { sc_bv tdata = rx_input_interface.tdata.read(); - + data_vector tdatavector(32); + unsigned int start_idx, end_idx; + for (unsigned int e = 0; e < 32; e++) { + start_idx = e * 16; + end_idx = (e + 1) * 16; + tdatavector[e] = tdata.range(end_idx - 1, start_idx).to_int(); + } + if (layer_id == 0) std::cout << "got tdatavector on rad " << radsim_design->rad_id << ": " << tdatavector << std::endl; + sc_bv<7> testing_width = "1000110"; + std::cout << "testing_width.to_uint64(): " << testing_width.to_uint64() << std::endl; if (rx_input_interface.tuser.read().range(15, 13).to_uint() == 1) { unsigned int waddr = rx_input_interface.tuser.read().range(8, 0).to_uint(); @@ -399,6 +409,7 @@ void mvm::Tick() { } wait(); } + } } void mvm::Assign() { @@ -427,7 +438,7 @@ void mvm::Assign() { matrix_mem_raddr.write(0); dot_op.write(false); dot_reduce_op.write(false); - } else { + } else if (radsim_design->rad_id == 1) { if (rx_input_interface.tuser.read().range(15, 13).to_uint() == 1) { // Inst memory rx_input_interface.tready.write(true); @@ -509,7 +520,9 @@ void mvm::Assign() { std::to_string(dest_mvm_int) + ".rx_interface"; } dest_id = radsim_design->GetPortDestinationID(dest_name); - sc_bv dest_id_concat = dest_id; + sc_bv dest_id_concat; + DEST_LOCAL_NODE(dest_id_concat) = dest_id; + DEST_REMOTE_NODE(dest_id_concat) = dest_id; // if (radsim_design->rad_id == 1){ // std::cout << "mvm.cpp on RAD " << radsim_design->rad_id << "'s dest_id: " << dest_id << " and DEST_RAD(dest_id): " << DEST_RAD(dest_id_concat) << std::endl; // } diff --git a/rad-sim/example-designs/dlrm/modules/portal.cpp b/rad-sim/example-designs/dlrm/modules/portal.cpp index c91190f..d4612e3 100644 --- a/rad-sim/example-designs/dlrm/modules/portal.cpp +++ b/rad-sim/example-designs/dlrm/modules/portal.cpp @@ -7,10 +7,12 @@ portal::portal(const sc_module_name &name, RADSimDesignContext* radsim_design) //combinational logic SC_METHOD(Assign); + sensitive << rst; //sequential logic SC_CTHREAD(Tick, clk.pos()); // This function must be defined & called for any RAD-Sim module to register // its info for automatically connecting to the NoC + reset_signal_is(rst, true); // Reset is active high this->RegisterModuleInfo(); //can comment out if not connecting to NoC } @@ -18,8 +20,15 @@ portal::portal(const sc_module_name &name, RADSimDesignContext* radsim_design) portal::~portal() {} void portal::Assign() { //combinational logic - //maybe add reset signal later - axis_portal_slave_interface.tready.write(true); + if (rst) { + portal_axis_slave.tready.write(false); + axis_portal_slave_interface.tready.write(false); + } + else { + // Always ready to accept the transaction + portal_axis_slave.tready.write(true); + axis_portal_slave_interface.tready.write(true); + } } int counter = 0; @@ -39,11 +48,11 @@ void portal::Tick() { //sequential logic if (axis_portal_slave_interface.tvalid.read() && axis_portal_slave_interface.tready.read()) { //std::cout << "Also got here" << std:: endl; - std::cout << "DLRM design raising valid data to send over portal module on cycle " << curr_cycle << " , will see valid high next clk cycle " << module_name << ": Got Transaction (user = " - << axis_portal_slave_interface.tuser.read().to_uint64() << ") (value = " - << axis_portal_slave_interface.tdata.read().to_uint64() << ")! Destination field is " - << axis_portal_slave_interface.tdest.read().to_uint64() - << std::endl; + // std::cout << "DLRM design raising valid data to send over portal module on cycle " << curr_cycle << " , will see valid high next clk cycle " << module_name << ": Got Transaction (user = " + // << axis_portal_slave_interface.tuser.read().to_uint64() << ") (value = " + // << axis_portal_slave_interface.tdata.read().to_uint64() << ")! Destination field is " + // << axis_portal_slave_interface.tdest.read().to_uint64() + // << std::endl; data_to_buffer = axis_portal_slave_interface.tdata.read(); //got_data = true; portal_axis_fields curr_transaction = { @@ -68,7 +77,7 @@ void portal::Tick() { //sequential logic if (!portal_axis_fifo.empty()) { //test_ready_toggle = false; portal_axis_fifo.pop(); - std::cout << "portal.cpp in dlrm design sent " << portal_axis_master.tdata.read().to_int64() << " to dest_device " << dest_device.to_int64() << " on cycle " << curr_cycle << std::endl; + //std::cout << "portal.cpp in dlrm design sent " << portal_axis_master.tdata.read().to_int64() << " to dest_device " << dest_device.to_int64() << " on cycle " << curr_cycle << std::endl; //portal_recvd.write(1); if (portal_axis_master.tlast.read()) { std::cout << "dlrm design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; @@ -104,6 +113,42 @@ void portal::Tick() { //sequential logic test_ready_toggle = true; }*/ + // Receiving transaction from AXI-S interface + if (portal_axis_slave.tvalid.read() && + portal_axis_slave.tready.read()) { + //get current cycle + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + //read + // std::cout << module_name << ": Portal Module Got Transaction on cycle " << curr_cycle << " (RAD ID) = " + // << radsim_design->rad_id //<< portal_axis_slave.tuser.read().to_uint64() + // << ") (val = " + // << portal_axis_slave.tdata.read().to_uint64() << ")!" + // << std::endl; + //write the addend into the mult module and that will flag when received all values and can end simulation + std::string src_port_name = module_name + ".axis_portal_master_interface"; + uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref + //sc_bv concat_dest = portal_axis_slave.tdest.read(); + //DEST_RAD(concat_dest) = radsim_design->rad_id; + //DEST_LOCAL_NODE(concat_dest) = //dst_addr; + //std::cout << "portal_axis_slave.tdest.read() is: " << portal_axis_slave.tdest.read() << std::endl; + axis_portal_master_interface.tdest.write(portal_axis_slave.tdest.read()); //concat_dest); //dst_addr); + axis_portal_master_interface.tid.write(0); + axis_portal_master_interface.tstrb.write(0); + axis_portal_master_interface.tkeep.write(0); + axis_portal_master_interface.tuser.write(portal_axis_slave.tuser.read()); + //std::cout << "portal_axis_slave.tuser.read()" << portal_axis_slave.tuser.read().range(15, 13).to_uint() << std::endl; + axis_portal_master_interface.tlast.write(portal_axis_slave.tlast.read()); + axis_portal_master_interface.tdata.write(portal_axis_slave.tdata.read()); + axis_portal_master_interface.tvalid.write(true); + //checking if last transaction and if so, printing current simulation cycle count + if (portal_axis_slave.tlast.read()) { + std::cout << "portal.cpp received last data via inter_rad at cycle " << curr_cycle << std::endl; + } + } + else { + axis_portal_master_interface.tvalid.write(false); + } + wait(); } } diff --git a/rad-sim/example-designs/dlrm/modules/portal.hpp b/rad-sim/example-designs/dlrm/modules/portal.hpp index 324b053..e3187df 100644 --- a/rad-sim/example-designs/dlrm/modules/portal.hpp +++ b/rad-sim/example-designs/dlrm/modules/portal.hpp @@ -29,6 +29,7 @@ class portal : public RADSimModule { public: RADSimDesignContext* radsim_design; + sc_in rst; //sc_in> portal_in; //sc_out> portal_out; //axis ports for external access to inter_rad diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index d25c1e2..66d03da 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -68,6 +68,7 @@ int sc_main(int argc, char *argv[]) { int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); // sc_bv<128> new_val; // sc_bv<128> old_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); + //sc_start(); while (cluster->AllRADsNotDone()) { sc_start(1, SC_NS); // //std::cout << "read system portal_in: " << system->dut_inst->portal_in.read() << std::endl; diff --git a/rad-sim/sim/noc/axis_slave_adapter.cpp b/rad-sim/sim/noc/axis_slave_adapter.cpp index 7c30936..5a39cee 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.cpp +++ b/rad-sim/sim/noc/axis_slave_adapter.cpp @@ -237,7 +237,7 @@ void axis_slave_adapter::InputInjection() { booksim_flit->dest_rad = DEST_RAD(_to_be_injected_flit._dest).to_uint(); booksim_flit->dest_remote = DEST_REMOTE_NODE(_to_be_injected_flit._dest).to_uint(); } else { - std::cout << "(TO-DO-MR) _portal_id in axis_slave_adapter.cpp: " << _portal_id << std::endl; + //std::cout << "(TO-DO-MR) _portal_id in axis_slave_adapter.cpp: " << _portal_id << std::endl; sc_bv booksim_flit_dest = _portal_id; // TO-DO-MR-DONE: set to portal node ID booksim_flit->dest = GetInputDestinationNode(booksim_flit_dest); booksim_flit->dest_rad = DEST_RAD(_to_be_injected_flit._dest).to_uint(); diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index e66d6cb..cbb6ab6 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -104,6 +104,7 @@ RADSimInterRad::writeFifo() { struct axis_fields curr_transaction; curr_transaction.tdata = all_axis_slave_ports[i]->tdata.read(); //0 bc adder curr_transaction.tuser = all_axis_slave_ports[i]->tuser.read(); + //std::cout << "curr_transaction.tuser in interrad: " << curr_transaction.tuser << std::endl; curr_transaction.tvalid = all_axis_slave_ports[i]->tvalid.read(); curr_transaction.tlast = all_axis_slave_ports[i]->tlast.read(); //since crossing RADs, DEST_LOCAL_NODE is now DEST_REMOTE_NODE, and DEST_REMOTE_NODE can be reset to 0 @@ -119,9 +120,9 @@ RADSimInterRad::writeFifo() { }*/ if (curr_transaction.tvalid && all_axis_slave_ports[i]->tready.read()) { //&& !prev_valid[i]) { //detect rising edge bc operating at higher clk freq than modules unsigned int dest_rad = DEST_RAD(curr_transaction.tdest).to_uint64(); - std::cout << "radsim_inter_rad.cpp dest_rad is: "<< dest_rad << std::endl; + //std::cout << "radsim_inter_rad.cpp dest_rad is: "<< dest_rad << std::endl; if (this->fifos[dest_rad]->nb_write(curr_transaction) != false) { //there was an available slot to write to - std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << curr_transaction.tdata.to_uint64() << std::endl; + //std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << curr_transaction.tdata.to_uint64() << std::endl; fifos_latency_counters[dest_rad].push_back(0); //for latency counters } //all_axis_slave_ports[i]->tready.write(false); @@ -183,7 +184,7 @@ RADSimInterRad::readFifo() { //std::cout << "inter_rad fifo data READ is " << this->fifos[0]->read() << std::endl; if (read_from_fifo.tvalid) { - std::cout << "inter_rad fifo data READ is " << val.to_uint64() << " on cycle " << curr_cycle << std::endl; + //std::cout << "inter_rad fifo data READ is " << val.to_uint64() << " on cycle " << curr_cycle << std::endl; //std::cout << "dest_device: " << dest_device << std::endl; //all_signals[1].write(val); //works but replacing with axi //all_axis_master_ports[1]->tdata.write(val); //1 bc sending to mult design @@ -191,6 +192,7 @@ RADSimInterRad::readFifo() { all_axis_master_signals[dest_device]->tvalid.write(read_from_fifo.tvalid); all_axis_master_signals[dest_device]->tlast.write(read_from_fifo.tlast); all_axis_master_signals[dest_device]->tdest.write(read_from_fifo.tdest); + all_axis_master_signals[dest_device]->tuser.write(read_from_fifo.tuser); //std::cout << "inter_rad fifo free after READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; } else { From 1166fe21a64aaaad5b6b21fdc26478e0d0af947a Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 30 Apr 2024 20:31:34 -0400 Subject: [PATCH 055/127] Snapshot of multi-RAD add-mult experiment used in thesis --- rad-sim/example-designs/add/add_driver.cpp | 10 ++- rad-sim/example-designs/add/modules/adder.cpp | 26 +++--- .../example-designs/add/modules/client.cpp | 12 +-- .../example-designs/add/modules/portal.cpp | 14 ++-- .../mult/modules/client_mult.cpp | 2 +- rad-sim/example-designs/mult/modules/mult.cpp | 10 +-- .../mult/modules/portal_mult.cpp | 16 ++-- rad-sim/example-designs/mult/mult_driver.cpp | 2 +- rad-sim/sim/main.cpp | 81 ++++++++++++------- rad-sim/sim/noc/axis_slave_adapter.cpp | 2 +- rad-sim/sim/radsim_inter_rad.cpp | 8 +- rad-sim/sim/radsim_inter_rad.hpp | 2 +- 12 files changed, 112 insertions(+), 73 deletions(-) diff --git a/rad-sim/example-designs/add/add_driver.cpp b/rad-sim/example-designs/add/add_driver.cpp index 6f54c12..5bf4208 100644 --- a/rad-sim/example-designs/add/add_driver.cpp +++ b/rad-sim/example-designs/add/add_driver.cpp @@ -1,6 +1,7 @@ #include #define NUM_ADDENDS 5 //3 +#define TOTAL_RADS 5 add_driver::add_driver(const sc_module_name &name, RADSimDesignContext* radsim_design_) : sc_module(name) { @@ -20,8 +21,11 @@ add_driver::add_driver(const sc_module_name &name, RADSimDesignContext* radsim_d for (unsigned int i = 0; i < NUM_ADDENDS; i++) { unsigned int r_num = std::rand() % 10 + 1; std::cout << r_num << " "; - numbers_to_send.push(r_num); - numbers_to_send.push(r_num); //push twice bc two mult modules now + for (int i = 1; i < TOTAL_RADS; i++) { + numbers_to_send.push(r_num); + } + // numbers_to_send.push(r_num); + // numbers_to_send.push(r_num); //push twice bc two mult modules now actual_sum += r_num; } std::cout << std::endl << "----------------------------------------" << std::endl; @@ -45,7 +49,7 @@ void add_driver::source() { while (!numbers_to_send.empty()) { client_tdata.write(numbers_to_send.front()); //client_tlast.write(numbers_to_send.size() <= 1); - client_tlast.write(numbers_to_send.size() <= 2); //bc sending to 2 RADs, so both receive the last flag + client_tlast.write(numbers_to_send.size() <= TOTAL_RADS-1); //bc sending to TOTAL_RADS-1 mult RADs, so both receive the last flag client_valid.write(true); wait(); diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index 9bf0b51..307e1fe 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -1,6 +1,7 @@ #include int which_rad = 1; +int TOTAL_RADS = 5; adder::adder(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg : RADSimModule(name, radsim_design) { @@ -78,7 +79,7 @@ void adder::Assign() { std::string dst_port_name = "portal_inst.axis_portal_slave_interface"; uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref - std::cout << "adder.cpp portal dest is: " << dst_addr << std::endl; + //std::cout << "adder.cpp portal dest is: " << dst_addr << std::endl; sc_bv concat_dest; DEST_RAD(concat_dest) = which_rad; //1; DEST_LOCAL_NODE(concat_dest) = dst_addr; @@ -119,7 +120,7 @@ void adder::Tick() { wait(); int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - std::cout << "adder.cpp is before while loop at cycle " << curr_cycle << std::endl; + //std::cout << "adder.cpp is before while loop at cycle " << curr_cycle << std::endl; // Always @ positive edge of the clock while (true) { curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); @@ -137,15 +138,22 @@ void adder::Tick() { uint64_t current_sum = adder_rolling_sum.to_uint64(); adder_rolling_sum = current_sum + axis_adder_interface.tdata.read().to_uint64(); t_finished.write(axis_adder_interface.tlast.read()); //this should still work even with 2 RADs because of which_rad check - std::cout << module_name << ": Got Transaction " << count_in_addends << " on cycle " << curr_cycle << " (user = " - << axis_adder_interface.tuser.read().to_uint64() << ") (addend = " - << axis_adder_interface.tdata.read().to_uint64() << ")!" - << std::endl; + // std::cout << module_name << ": Got Transaction " << count_in_addends << " on cycle " << curr_cycle << " (user = " + // << axis_adder_interface.tuser.read().to_uint64() << ") (addend = " + // << axis_adder_interface.tdata.read().to_uint64() << ")!" + // << std::endl; count_in_addends++; - which_rad = 2; //can send to other RAD next time + //which_rad = 2; //can send to other RAD next time + } + // else { + // which_rad = 1; + // } + + if (which_rad < (TOTAL_RADS-1)) { + which_rad++; } else { - which_rad = 1; + which_rad = 1; //rollback } //adder_tdata_tlast_fifo.push(std::make_tuple(axis_adder_interface.tdata.read(), axis_adder_interface.tlast.read())); @@ -173,7 +181,7 @@ void adder::Tick() { //sent to portal module if (axis_adder_master_interface.tvalid.read() && axis_adder_master_interface.tready.read()) { - std::cout << "Sent the " << count_out_addends << "th addend " << axis_adder_master_interface.tdata.read().to_uint64() << " over NoC to portal module on cycle " << curr_cycle << std::endl; + //std::cout << "Sent the " << count_out_addends << "th addend " << axis_adder_master_interface.tdata.read().to_uint64() << " over NoC to portal module on cycle " << curr_cycle << std::endl; //adder_tdata_tlast_fifo.pop(); count_out_addends++; } diff --git a/rad-sim/example-designs/add/modules/client.cpp b/rad-sim/example-designs/add/modules/client.cpp index 988df5c..5c0f84f 100644 --- a/rad-sim/example-designs/add/modules/client.cpp +++ b/rad-sim/example-designs/add/modules/client.cpp @@ -59,15 +59,15 @@ void client::Tick() { wait(); while (true) { if (client_ready.read() && client_valid.read()) { - std::cout << this->name() << " @ cycle " - << GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")) << ": " - << " Pushed request to FIFO!" << std::endl; + // std::cout << this->name() << " @ cycle " + // << GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")) << ": " + // << " Pushed request to FIFO!" << std::endl; } if (axis_client_interface.tvalid.read() && axis_client_interface.tready.read()) { - std::cout << this->name() << " @ cycle " - << GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")) << ": " - << " Sent Transaction!" << std::endl; + // std::cout << this->name() << " @ cycle " + // << GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")) << ": " + // << " Sent Transaction!" << std::endl; } wait(); } diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index cb39ea4..54d0cc5 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -39,10 +39,10 @@ void portal::Tick() { //sequential logic if (axis_portal_slave_interface.tvalid.read() && axis_portal_slave_interface.tready.read()) { //std::cout << "Also got here" << std:: endl; - std::cout << "Add design raising valid data to send over portal module on cycle " << curr_cycle << " , will see valid high next clk cycle " << module_name << ": Got Transaction (user = " - << axis_portal_slave_interface.tuser.read().to_uint64() << ") (addend = " - << axis_portal_slave_interface.tdata.read().to_uint64() << ")!" - << std::endl; + //std::cout << "Add design raising valid data to send over portal module on cycle " << curr_cycle << " , will see valid high next clk cycle " << module_name << ": Got Transaction (user = " + // << axis_portal_slave_interface.tuser.read().to_uint64() << ") (addend = " + // << axis_portal_slave_interface.tdata.read().to_uint64() << ")!" + // << std::endl; data_to_buffer = axis_portal_slave_interface.tdata.read(); //got_data = true; portal_axis_fields curr_transaction = { @@ -67,14 +67,14 @@ void portal::Tick() { //sequential logic if (!portal_axis_fifo.empty()) { //test_ready_toggle = false; portal_axis_fifo.pop(); - std::cout << "portal.cpp in add design sent " << portal_axis_master.tdata.read().to_int64() << " to dest_device " << dest_device.to_int64() << " on cycle " << curr_cycle << std::endl; + //std::cout << "portal.cpp in add design sent " << portal_axis_master.tdata.read().to_int64() << " to dest_device " << dest_device.to_int64() << " on cycle " << curr_cycle << std::endl; portal_recvd.write(1); if (portal_axis_master.tlast.read()) { - std::cout << "Add design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; + //std::cout << "Add design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; } } else { //should never reach here because valid should be false if fifo is empty - std::cout << "reached here but why? portal_axis_fifo.size(): " << portal_axis_fifo.size() << std::endl; + //std::cout << "reached here but why? portal_axis_fifo.size(): " << portal_axis_fifo.size() << std::endl; } } diff --git a/rad-sim/example-designs/mult/modules/client_mult.cpp b/rad-sim/example-designs/mult/modules/client_mult.cpp index c4acfed..e1087a3 100644 --- a/rad-sim/example-designs/mult/modules/client_mult.cpp +++ b/rad-sim/example-designs/mult/modules/client_mult.cpp @@ -48,7 +48,7 @@ void client_mult::Tick() { if (client_ready.read() && client_valid.read()) { client_tdata_fifo.push(client_tdata); testbench_tlast = client_tlast.read(); - std::cout << module_name << ": Pushed request to FIFO" << std::endl; + //std::cout << module_name << ": Pushed request to FIFO" << std::endl; } client_fifo_full.write(client_tdata_fifo.size() >= client_fifo_depth); diff --git a/rad-sim/example-designs/mult/modules/mult.cpp b/rad-sim/example-designs/mult/modules/mult.cpp index 1f854be..9291e29 100644 --- a/rad-sim/example-designs/mult/modules/mult.cpp +++ b/rad-sim/example-designs/mult/modules/mult.cpp @@ -44,10 +44,10 @@ void mult::Tick() { uint64_t current_product = mult_rolling_product.to_uint64(); //removing for experiment mult_rolling_product = current_product * axis_mult_interface.tdata.read().to_uint64(); //removing for experiment t_finished.write(axis_mult_interface.tlast.read()); - std::cout << module_name << ": Got Transaction (user = " - << axis_mult_interface.tuser.read().to_uint64() << ") (factor = " - << axis_mult_interface.tdata.read().to_uint64() << ")!" - << std::endl; + // std::cout << module_name << ": Got Transaction (user = " + // << axis_mult_interface.tuser.read().to_uint64() << ") (factor = " + // << axis_mult_interface.tdata.read().to_uint64() << ")!" + // << std::endl; } // Print Sum and Exit @@ -57,7 +57,7 @@ void mult::Tick() { //mult_inter_rad_recvd.write(1); //maybe not needed if using the if (!printed_end_cycle) { int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - std::cout << "mult.cpp received all factors from add RAD at cycle " << end_cycle << std::endl; + //std::cout << "mult.cpp received all factors from add RAD at cycle " << end_cycle << std::endl; printed_end_cycle = true; } } diff --git a/rad-sim/example-designs/mult/modules/portal_mult.cpp b/rad-sim/example-designs/mult/modules/portal_mult.cpp index 7ad3c47..fcbbfd5 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.cpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.cpp @@ -41,21 +41,21 @@ void portal_mult::Tick() { //sequential logic //get current cycle int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //read - std::cout << module_name << ": Portal_Mult Module Got Transaction on cycle " << curr_cycle << " (RAD ID) = " - << radsim_design->rad_id //<< portal_axis_slave.tuser.read().to_uint64() - << ") (addend = " - << portal_axis_slave.tdata.read().to_uint64() << ")!" - << std::endl; + //std::cout << module_name << ": Portal_Mult Module Got Transaction on cycle " << curr_cycle << " (RAD ID) = " + // << radsim_design->rad_id //<< portal_axis_slave.tuser.read().to_uint64() + // << ") (addend = " + // << portal_axis_slave.tdata.read().to_uint64() << ")!" + // << std::endl; //write the addend into the mult module and that will flag when received all values and can end simulation std::string src_port_name = module_name + ".axis_mult_portal_master_interface"; std::string dst_port_name = "mult_inst.axis_mult_interface"; uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref - std::cout << "dst_addr in portal_mult.cpp is: " << dst_addr << std::endl; + //std::cout << "dst_addr in portal_mult.cpp is: " << dst_addr << std::endl; //sc_bv concat_dest = portal_axis_slave.tdest.read(); //DEST_RAD(concat_dest) = radsim_design->rad_id; //DEST_LOCAL_NODE(concat_dest) = //dst_addr; - std::cout << "portal_axis_slave.tdest.read() is: " << portal_axis_slave.tdest.read() << std::endl; + //std::cout << "portal_axis_slave.tdest.read() is: " << portal_axis_slave.tdest.read() << std::endl; axis_mult_portal_master_interface.tdest.write(portal_axis_slave.tdest.read()); //concat_dest); //dst_addr); axis_mult_portal_master_interface.tid.write(0); axis_mult_portal_master_interface.tstrb.write(0); @@ -66,7 +66,7 @@ void portal_mult::Tick() { //sequential logic axis_mult_portal_master_interface.tvalid.write(true); //checking if last transaction and if so, printing current simulation cycle count if (portal_axis_slave.tlast.read()) { - std::cout << "Mult design portal_mult.cpp received last data via inter_rad at cycle " << curr_cycle << std::endl; + //std::cout << "Mult design portal_mult.cpp received last data via inter_rad at cycle " << curr_cycle << std::endl; } } else { diff --git a/rad-sim/example-designs/mult/mult_driver.cpp b/rad-sim/example-designs/mult/mult_driver.cpp index f9cae3b..dfccaf6 100644 --- a/rad-sim/example-designs/mult/mult_driver.cpp +++ b/rad-sim/example-designs/mult/mult_driver.cpp @@ -52,7 +52,7 @@ void mult_driver::source() { } } client_valid.write(false); - std::cout << "Finished sending all numbers to client module!" << std::endl; + //std::cout << "Finished sending all numbers to client module!" << std::endl; wait(); } diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 2d722aa..5c0a4bf 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -18,7 +18,8 @@ SimTraceRecording sim_trace_probe; int sc_main(int argc, char *argv[]) { //AKB: using RADSimCluster class instead of creating new above - RADSimCluster* cluster = new RADSimCluster(3); //2); + int total_num_rads = 5; //must also change value of TOTAL_RADS in add_driver.cpp and adder.cpp + RADSimCluster* cluster = new RADSimCluster(total_num_rads); //3); //2); gWatchOut = &cout; int log_verbosity = radsim_config.GetIntKnob("telemetry_log_verbosity"); @@ -34,42 +35,60 @@ int sc_main(int argc, char *argv[]) { add_system *system = new add_system("add_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED //mult_system *system = new mult_system("mult_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED - sc_clock *driver_clk_sig2 = new sc_clock( - "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED + // sc_clock *driver_clk_sig2 = new sc_clock( + // "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED - //add_system *system2 = new add_system("add_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED - mult_system *system2 = new mult_system("mult_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED + // //add_system *system2 = new add_system("add_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED + // mult_system *system2 = new mult_system("mult_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED - sc_clock *driver_clk_sig3 = new sc_clock( - "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED + // sc_clock *driver_clk_sig3 = new sc_clock( + // "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED + + // mult_system *system3 = new mult_system("mult_system3", driver_clk_sig3, cluster->all_rads[2]); //AKB ADDED - mult_system *system3 = new mult_system("mult_system3", driver_clk_sig3, cluster->all_rads[2]); //AKB ADDED - //AKB ADDED: - cluster->StoreSystem(system); - cluster->StoreSystem(system2); - cluster->StoreSystem(system3); + cluster->StoreSystem(system); //for adder design + + std::queue all_mult_rads; + std::queue all_mult_clocks; + for (int i = 1; i < total_num_rads; i++) { //subtract one because already have adder RAD + + sc_clock *driver_clk_sig = new sc_clock("node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED + all_mult_clocks.push(driver_clk_sig); + + //const std::string mult_system_name = "mult_system" + std::to_string(i); + mult_system *curr_system = new mult_system("mult_system", driver_clk_sig, cluster->all_rads[i]); + all_mult_rads.push(curr_system); + cluster->StoreSystem(curr_system); + } + + // cluster->StoreSystem(system2); + // cluster->StoreSystem(system3); + sc_clock *inter_rad_clk_sig = new sc_clock( "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED, use same period as sim driver RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); //blackbox->ConnectRadPair(0, 1); //TODO: comment out bc not using this - blackbox->ConnectRadAxi(0); - blackbox->ConnectRadAxi(1); - blackbox->ConnectRadAxi(2); + for (int i = 0; i < total_num_rads; i++) { //include adder rad in this + blackbox->ConnectRadAxi(i); + } + // blackbox->ConnectRadAxi(0); + // blackbox->ConnectRadAxi(1); + // blackbox->ConnectRadAxi(2); int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - sc_bv<128> new_val; - sc_bv<128> old_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); + //sc_bv<128> new_val; + //sc_bv<128> old_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); while (cluster->AllRADsNotDone()) { sc_start(1, SC_NS); //std::cout << "read system portal_in: " << system->dut_inst->portal_in.read() << std::endl; //new_val = system2->dut_inst->portal_in.read(); //works but replacing to test axi - new_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); //TODO: use handshaking properly - //if (val != 0) { - if (new_val != old_val) { //to ensure only displayed once - std::cout << "read system2 design_top_portal_axis_slave: " << new_val.to_uint64() << std::endl; - old_val = new_val; - } + // new_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); //TODO: use handshaking properly + // //if (val != 0) { + // if (new_val != old_val) { //to ensure only displayed once + // std::cout << "read system2 design_top_portal_axis_slave: " << new_val.to_uint64() << std::endl; + // old_val = new_val; + // } } std::cout << "stopping" << std::endl; int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); @@ -78,11 +97,19 @@ int sc_main(int argc, char *argv[]) { std::cout << "Simulation Cycles from main.cpp = " << end_cycle - start_cycle << std::endl; delete system; - delete system2; //AKB ADDED - delete system3; //AKB ADDED + // delete system2; //AKB ADDED + // delete system3; //AKB ADDED delete driver_clk_sig; - delete driver_clk_sig2; //AKB ADDED - delete driver_clk_sig3; //AKB ADDED + // delete driver_clk_sig2; //AKB ADDED + // delete driver_clk_sig3; //AKB ADDED + + for (int i = 1; i < total_num_rads; i++) { //subtract one because already have adder RAD + delete all_mult_rads.front(); + all_mult_rads.pop(); + delete all_mult_clocks.front(); + all_mult_clocks.pop(); + } + sc_flit scf; scf.FreeAllFlits(); Flit *f = Flit::New(); diff --git a/rad-sim/sim/noc/axis_slave_adapter.cpp b/rad-sim/sim/noc/axis_slave_adapter.cpp index 7c30936..5a39cee 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.cpp +++ b/rad-sim/sim/noc/axis_slave_adapter.cpp @@ -237,7 +237,7 @@ void axis_slave_adapter::InputInjection() { booksim_flit->dest_rad = DEST_RAD(_to_be_injected_flit._dest).to_uint(); booksim_flit->dest_remote = DEST_REMOTE_NODE(_to_be_injected_flit._dest).to_uint(); } else { - std::cout << "(TO-DO-MR) _portal_id in axis_slave_adapter.cpp: " << _portal_id << std::endl; + //std::cout << "(TO-DO-MR) _portal_id in axis_slave_adapter.cpp: " << _portal_id << std::endl; sc_bv booksim_flit_dest = _portal_id; // TO-DO-MR-DONE: set to portal node ID booksim_flit->dest = GetInputDestinationNode(booksim_flit_dest); booksim_flit->dest_rad = DEST_RAD(_to_be_injected_flit._dest).to_uint(); diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index e66d6cb..738b5fc 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -11,7 +11,7 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c this->clk(*inter_rad_clk); num_rads = cluster->num_rads; all_signals.init(num_rads + 1); - std::cout << "num_rads is " << num_rads << std::endl; + //std::cout << "num_rads is " << num_rads << std::endl; fifos_latency_counters.resize(num_rads); //std::cout << "fifos_latency_counters[0].size() " << fifos_latency_counters[0].size() << std::endl; @@ -119,9 +119,9 @@ RADSimInterRad::writeFifo() { }*/ if (curr_transaction.tvalid && all_axis_slave_ports[i]->tready.read()) { //&& !prev_valid[i]) { //detect rising edge bc operating at higher clk freq than modules unsigned int dest_rad = DEST_RAD(curr_transaction.tdest).to_uint64(); - std::cout << "radsim_inter_rad.cpp dest_rad is: "<< dest_rad << std::endl; + //std::cout << "radsim_inter_rad.cpp dest_rad is: "<< dest_rad << std::endl; if (this->fifos[dest_rad]->nb_write(curr_transaction) != false) { //there was an available slot to write to - std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << curr_transaction.tdata.to_uint64() << std::endl; + //std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << curr_transaction.tdata.to_uint64() << std::endl; fifos_latency_counters[dest_rad].push_back(0); //for latency counters } //all_axis_slave_ports[i]->tready.write(false); @@ -183,7 +183,7 @@ RADSimInterRad::readFifo() { //std::cout << "inter_rad fifo data READ is " << this->fifos[0]->read() << std::endl; if (read_from_fifo.tvalid) { - std::cout << "inter_rad fifo data READ is " << val.to_uint64() << " on cycle " << curr_cycle << std::endl; + //std::cout << "inter_rad fifo data READ is " << val.to_uint64() << " on cycle " << curr_cycle << std::endl; //std::cout << "dest_device: " << dest_device << std::endl; //all_signals[1].write(val); //works but replacing with axi //all_axis_master_ports[1]->tdata.write(val); //1 bc sending to mult design diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index 04e1b77..f595f0d 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -37,7 +37,7 @@ class RADSimInterRad : public sc_module { //sc_fifo> data_in_rad1 = sc_fifo>(2); //2 slots for now //sc_vector>> switch_port_fifos{"switch_port_fifos"}; //for latency - float latency_sec = 5.0*1 * pow(10, -9); //2.6 * pow(10, -6); //do not currently support zero latency -- I could implement by bypassing FIFO + float latency_sec = 2.1 * pow(10, -6); //5.0*1 * pow(10, -9); //2.6 * pow(10, -6); //do not currently support zero latency -- I could implement by bypassing FIFO float period_sec = 5.0 * pow(10, -9); int target_delay = ceil(latency_sec/period_sec); //number of cycles to delay int bw_limit = 0; From 3f35bc3d30b0bb1bfb587ba467280ee2ed04e406 Mon Sep 17 00:00:00 2001 From: abnashkb <45989947+abnashkb@users.noreply.github.com> Date: Tue, 30 Apr 2024 17:51:27 -0700 Subject: [PATCH 056/127] Copy tuser field in radsim_inter_rad.cpp --- rad-sim/sim/radsim_inter_rad.cpp | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 738b5fc..06bd19f 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -155,9 +155,7 @@ RADSimInterRad::readFifo() { Read from fifo slot Iterates thru all fifos Matches the dest index of fifo to the dest rad - TODO: use tdest instead of tuser - TODO: automating adding all fields to curr_transaction - currently hardcoded to pull from same fifo that we use in writeFifo + DONE: use tdest instead of tuser */ while (true) { //std::cout << "inter_rad fifo free before READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; @@ -191,6 +189,7 @@ RADSimInterRad::readFifo() { all_axis_master_signals[dest_device]->tvalid.write(read_from_fifo.tvalid); all_axis_master_signals[dest_device]->tlast.write(read_from_fifo.tlast); all_axis_master_signals[dest_device]->tdest.write(read_from_fifo.tdest); + all_axis_master_signals[dest_device]->tuser.write(read_from_fifo.tuser); //std::cout << "inter_rad fifo free after READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; } else { @@ -212,4 +211,4 @@ RADSimInterRad::readFifo() { wait(); //wait(2); } -} \ No newline at end of file +} From 799f32400c7f5cf0c727d1778ca9fbe8d74865ff Mon Sep 17 00:00:00 2001 From: abnashkb <45989947+abnashkb@users.noreply.github.com> Date: Tue, 30 Apr 2024 17:55:59 -0700 Subject: [PATCH 057/127] Update portal_mult.cpp to use tuser field --- rad-sim/example-designs/mult/modules/portal_mult.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/rad-sim/example-designs/mult/modules/portal_mult.cpp b/rad-sim/example-designs/mult/modules/portal_mult.cpp index fcbbfd5..af13cd8 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.cpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.cpp @@ -50,7 +50,7 @@ void portal_mult::Tick() { //sequential logic std::string src_port_name = module_name + ".axis_mult_portal_master_interface"; std::string dst_port_name = "mult_inst.axis_mult_interface"; uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref - uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref + //uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref //std::cout << "dst_addr in portal_mult.cpp is: " << dst_addr << std::endl; //sc_bv concat_dest = portal_axis_slave.tdest.read(); //DEST_RAD(concat_dest) = radsim_design->rad_id; @@ -60,7 +60,7 @@ void portal_mult::Tick() { //sequential logic axis_mult_portal_master_interface.tid.write(0); axis_mult_portal_master_interface.tstrb.write(0); axis_mult_portal_master_interface.tkeep.write(0); - axis_mult_portal_master_interface.tuser.write(src_addr); + axis_mult_portal_master_interface.tuser.write(portal_axis_slave.tuser.read()); //src_addr); axis_mult_portal_master_interface.tlast.write(portal_axis_slave.tlast.read()); axis_mult_portal_master_interface.tdata.write(portal_axis_slave.tdata.read()); axis_mult_portal_master_interface.tvalid.write(true); @@ -103,4 +103,4 @@ void portal_mult::RegisterModuleInfo() { port_name = module_name + ".axis_mult_portal_master_interface"; //std::cout << port_name << std::endl; RegisterAxisMasterPort(port_name, &axis_mult_portal_master_interface, DATAW, 0); -} \ No newline at end of file +} From 4e45fa011b1b24f5427e9c527b26c6b85b3f0d5d Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 30 Apr 2024 21:16:30 -0400 Subject: [PATCH 058/127] Fixed typo in config.py --- rad-sim/config.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/rad-sim/config.py b/rad-sim/config.py index 5033854..c8a6b70 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -51,12 +51,12 @@ def parse_config_file(config_filename, booksim_params, radsim_header_params, rad print("Config Error: Parameter " + param_name + " is invalid!") exit(1) - '''noc_num_nodes = [] + '''noc_num_nodes = [] for n in range(radsim_knobs["noc_num_nocs"]): noc_num_nodes.append(0) radsim_knobs["noc_num_nodes"] = noc_num_nodes - radsim_header_params["noc_num_nodes"] = noc_num_nodes''' + radsim_header_params["noc_num_nodes"] = noc_num_nodes radsim_knobs["radsim_user_design_root_dir"] = radsim_knobs["radsim_root_dir"] + "/example-designs/" + radsim_knobs["design_name"] From b938c47a20316e32a51f2ddf562e1c372e213a18 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sun, 5 May 2024 02:52:08 -0400 Subject: [PATCH 059/127] Archive: multiple radsim_config approach code changes --- rad-sim/example-designs/add/add_driver.cpp | 9 +++-- rad-sim/example-designs/add/modules/adder.cpp | 4 +-- .../example-designs/add/modules/portal.cpp | 2 +- rad-sim/example-designs/mult/modules/mult.cpp | 2 +- .../mult/modules/portal_mult.cpp | 2 +- rad-sim/example-designs/mult/mult_driver.cpp | 6 ++-- rad-sim/sim/design_context.cpp | 33 ++++++++++-------- rad-sim/sim/design_context.hpp | 1 + rad-sim/sim/dram/mem_controller.cpp | 12 +++---- rad-sim/sim/main.cpp | 21 +++++++----- rad-sim/sim/noc/aximm_master_adapter.cpp | 17 ++++++---- rad-sim/sim/noc/aximm_master_adapter.hpp | 8 ++++- rad-sim/sim/noc/aximm_slave_adapter.cpp | 17 ++++++---- rad-sim/sim/noc/aximm_slave_adapter.hpp | 8 ++++- rad-sim/sim/noc/axis_master_adapter.cpp | 9 ++--- rad-sim/sim/noc/axis_master_adapter.hpp | 4 ++- rad-sim/sim/noc/axis_slave_adapter.cpp | 8 +++-- rad-sim/sim/noc/axis_slave_adapter.hpp | 4 ++- rad-sim/sim/noc/radsim_noc.cpp | 34 ++++++++++++------- rad-sim/sim/radsim_config.cpp | 21 +++++++----- rad-sim/sim/radsim_config.hpp | 7 ++-- rad-sim/sim/radsim_telemetry.cpp | 26 +++++++------- rad-sim/sim/radsim_telemetry.hpp | 10 +++--- rad-sim/sim/radsim_utils.cpp | 2 +- rad-sim/sim/radsim_utils.hpp | 2 +- 25 files changed, 165 insertions(+), 104 deletions(-) diff --git a/rad-sim/example-designs/add/add_driver.cpp b/rad-sim/example-designs/add/add_driver.cpp index 5bf4208..5dbb45a 100644 --- a/rad-sim/example-designs/add/add_driver.cpp +++ b/rad-sim/example-designs/add/add_driver.cpp @@ -42,7 +42,8 @@ void add_driver::source() { client_valid.write(false); wait(); rst.write(false); - start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + //start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //AKB replaced with line below + start_cycle = GetSimulationCycle(this->radsim_design->radsim_config->GetDoubleKnob("sim_driver_period")); start_time = std::chrono::steady_clock::now(); wait(); @@ -77,13 +78,15 @@ void add_driver::sink() { std::cout << "SUCCESS - Output is matching!" << std::endl; } - end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + //end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + end_cycle = GetSimulationCycle(this->radsim_design->radsim_config->GetDoubleKnob("sim_driver_period")); end_time = std::chrono::steady_clock::now(); std::cout << "Simulation Cycles = " << end_cycle - start_cycle << std::endl; std::cout << "Simulation Time = " << std::chrono::duration_cast (end_time - start_time).count() << " us" << std::endl; NoCTransactionTelemetry::DumpStatsToFile("stats.csv"); - end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + //end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + end_cycle = GetSimulationCycle(this->radsim_design->radsim_config->GetDoubleKnob("sim_driver_period")); std::cout << "Simulation Cycles for Just Adder Portion = " << end_cycle - start_cycle << std::endl; this->radsim_design->set_rad_done(); //flag to replace sc_stop calls diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index 307e1fe..b909129 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -119,11 +119,11 @@ void adder::Tick() { int count_out_addends = 0; wait(); - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + //int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //std::cout << "adder.cpp is before while loop at cycle " << curr_cycle << std::endl; // Always @ positive edge of the clock while (true) { - curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + //curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //std::cout << "tready: " << axis_adder_master_interface.tready.read() << std::endl; //accept_data = !accept_data; diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 54d0cc5..08ceb21 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -34,7 +34,7 @@ void portal::Tick() { //sequential logic //Always @ positive edge of clock while (true) { - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + //int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); if (axis_portal_slave_interface.tvalid.read() && axis_portal_slave_interface.tready.read()) { diff --git a/rad-sim/example-designs/mult/modules/mult.cpp b/rad-sim/example-designs/mult/modules/mult.cpp index 9291e29..ed27c21 100644 --- a/rad-sim/example-designs/mult/modules/mult.cpp +++ b/rad-sim/example-designs/mult/modules/mult.cpp @@ -56,7 +56,7 @@ void mult::Tick() { response.write(mult_rolling_product); //mult_inter_rad_recvd.write(1); //maybe not needed if using the if (!printed_end_cycle) { - int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + //int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //std::cout << "mult.cpp received all factors from add RAD at cycle " << end_cycle << std::endl; printed_end_cycle = true; } diff --git a/rad-sim/example-designs/mult/modules/portal_mult.cpp b/rad-sim/example-designs/mult/modules/portal_mult.cpp index af13cd8..05c968c 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.cpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.cpp @@ -39,7 +39,7 @@ void portal_mult::Tick() { //sequential logic if (portal_axis_slave.tvalid.read() && portal_axis_slave.tready.read()) { //get current cycle - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + //int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //read //std::cout << module_name << ": Portal_Mult Module Got Transaction on cycle " << curr_cycle << " (RAD ID) = " // << radsim_design->rad_id //<< portal_axis_slave.tuser.read().to_uint64() diff --git a/rad-sim/example-designs/mult/mult_driver.cpp b/rad-sim/example-designs/mult/mult_driver.cpp index dfccaf6..755f61d 100644 --- a/rad-sim/example-designs/mult/mult_driver.cpp +++ b/rad-sim/example-designs/mult/mult_driver.cpp @@ -37,7 +37,8 @@ void mult_driver::source() { client_valid.write(false); wait(); rst.write(false); - start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + //start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + start_cycle = GetSimulationCycle(this->radsim_design->radsim_config->GetDoubleKnob("sim_driver_period")); wait(); while (!numbers_to_send.empty()) { @@ -67,7 +68,8 @@ void mult_driver::sink() { if (response.read() != actual_product) std::cout << "FAILURE - Output is not matching!" << std::endl; else std::cout << "SUCCESS - Output is matching!" << std::endl; - end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + //end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + end_cycle = GetSimulationCycle(this->radsim_design->radsim_config->GetDoubleKnob("sim_driver_period")); std::cout << "Simulation Cycles for Just Mult Portion = " << end_cycle - start_cycle << std::endl; this->radsim_design->set_rad_done(); //flag to replace sc_stop calls diff --git a/rad-sim/sim/design_context.cpp b/rad-sim/sim/design_context.cpp index 84937ab..1d535e6 100644 --- a/rad-sim/sim/design_context.cpp +++ b/rad-sim/sim/design_context.cpp @@ -1,9 +1,10 @@ #include RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { + radsim_config = new RADSimConfig(); std::string radsim_knobs_filename = "/sim/radsim_knobs"; std::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename; - ParseRADSimKnobs(radsim_knobs_filepath); + radsim_config->ParseRADSimKnobs(radsim_knobs_filepath); //assign its rad id rad_id = rad_id_; @@ -11,7 +12,7 @@ RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { // Create NoC clocks std::string clk_name; std::vector noc_period = - radsim_config.GetDoubleVectorKnob("noc_clk_period"); + radsim_config->GetDoubleVectorKnob("noc_clk_period"); _noc_clks.resize(noc_period.size()); for (unsigned int clk_id = 0; clk_id < _noc_clks.size(); clk_id++) { clk_name = "noc_clk" + std::to_string(clk_id); @@ -21,7 +22,7 @@ RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { // Create adapter clocks std::vector adapter_period = - radsim_config.GetDoubleVectorKnob("noc_adapters_clk_period"); + radsim_config->GetDoubleVectorKnob("noc_adapters_clk_period"); _adapter_clks.resize(adapter_period.size()); for (unsigned int clk_id = 0; clk_id < _adapter_clks.size(); clk_id++) { clk_name = "adapter_clk" + std::to_string(clk_id); @@ -31,7 +32,7 @@ RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { // Create module clocks std::vector module_period = - radsim_config.GetDoubleVectorKnob("design_clk_periods"); + radsim_config->GetDoubleVectorKnob("design_clk_periods"); _module_clks.resize(module_period.size()); for (unsigned int clk_id = 0; clk_id < _module_clks.size(); clk_id++) { clk_name = "module_clk" + std::to_string(clk_id); @@ -39,17 +40,19 @@ RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { new sc_clock(clk_name.c_str(), module_period[clk_id], SC_NS); } - int num_nocs = radsim_config.GetIntKnob("noc_num_nocs"); + int num_nocs = radsim_config->GetIntKnob("noc_num_nocs"); _node_module_names.resize(num_nocs); for (int noc_id = 0; noc_id < num_nocs; noc_id++) { - int num_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", noc_id); + int num_nodes = radsim_config->GetIntVectorKnob("noc_num_nodes", noc_id); _node_module_names[noc_id].resize(num_nodes); } //AKB ADDED: rad_done = false; //initially this RAD is not done its simulation design } -RADSimDesignContext::~RADSimDesignContext() {} +RADSimDesignContext::~RADSimDesignContext() { + delete radsim_config; +} bool IsSlavePort(std::string &port_name, RADSimModule *module_ptr) { bool is_axis_slave = (module_ptr->_axis_slave_ports.find(port_name) != @@ -74,11 +77,11 @@ std::string GetModuleNameFromPortName(std::string &port_name) { return module_name; } -uint64_t DeterminedBaseAddress(int noc_id, int node_id) { - int num_nocs = radsim_config.GetIntKnob("noc_num_nocs"); +uint64_t DeterminedBaseAddress(int noc_id, int node_id, RADSimConfig* radsim_config) { //AKB added last arg + int num_nocs = radsim_config->GetIntKnob("noc_num_nocs"); int max_num_nodes = 0; for (int noc_id = 0; noc_id < num_nocs; noc_id++) { - int num_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", noc_id); + int num_nodes = radsim_config->GetIntVectorKnob("noc_num_nodes", noc_id); if (num_nodes > max_num_nodes) { max_num_nodes = num_nodes; } @@ -159,7 +162,7 @@ void RADSimDesignContext::ParseNoCPlacement(const std::string &design_path, //AK // Set base address information _aximm_port_base_addresses[port_name] = - DeterminedBaseAddress(port_noc_placement, port_node_placement); + DeterminedBaseAddress(port_noc_placement, port_node_placement, radsim_config); //AKB: changed to pass in RADSimConfig* radsim_config } } else { std::string module_name, port_name, port_noc_placement_str, @@ -263,7 +266,7 @@ void RADSimDesignContext::ParseNoCPlacement(const std::string &design_path, //AK } // Set base address information _aximm_port_base_addresses[port_name] = - DeterminedBaseAddress(port_noc_placement, port_node_placement); + DeterminedBaseAddress(port_noc_placement, port_node_placement, radsim_config); } for (unsigned int port_id = 0; @@ -293,7 +296,7 @@ void RADSimDesignContext::ParseNoCPlacement(const std::string &design_path, //AK } // Set base address information _aximm_port_base_addresses[port_name] = - DeterminedBaseAddress(port_noc_placement, port_node_placement); + DeterminedBaseAddress(port_noc_placement, port_node_placement, radsim_config); } } _node_module_names[port_noc_placement][port_node_placement].insert( @@ -337,7 +340,7 @@ void RADSimDesignContext::RegisterModule(std::string module_name, void RADSimDesignContext::BuildDesignContext(const std::string &design_path, //AKB ADDED first arg const std::string &placement_filename, const std::string &clks_filename) { - unsigned int num_nocs = radsim_config.GetIntKnob("noc_num_nocs"); + unsigned int num_nocs = radsim_config->GetIntKnob("noc_num_nocs"); _node_id_is_aximm.resize(num_nocs); _node_id_ports_list.resize(num_nocs); _noc_axis_slave_adapter_info.resize(num_nocs); @@ -472,7 +475,7 @@ void RADSimDesignContext::BuildDesignContext(const std::string &design_path, //A } void RADSimDesignContext::CreateSystemNoCs(sc_in &rst) { - unsigned int num_nocs = radsim_config.GetIntKnob("noc_num_nocs"); + unsigned int num_nocs = radsim_config->GetIntKnob("noc_num_nocs"); for (unsigned int noc_id = 0; noc_id < num_nocs; noc_id++) { std::string noc_name_str = "radsim_noc_" + std::to_string(noc_id); const char *noc_name = noc_name_str.c_str(); diff --git a/rad-sim/sim/design_context.hpp b/rad-sim/sim/design_context.hpp index 24418d0..d42a83f 100644 --- a/rad-sim/sim/design_context.hpp +++ b/rad-sim/sim/design_context.hpp @@ -58,6 +58,7 @@ class RADSimDesignContext { bool rad_done; public: + RADSimConfig* radsim_config; //AKB added //unsigned int portal_id; //NoC ID of portal module on RAD unsigned int rad_id; //unique ID of this RAD std::string portal_slave_name; diff --git a/rad-sim/sim/dram/mem_controller.cpp b/rad-sim/sim/dram/mem_controller.cpp index 7bf96b6..427773f 100644 --- a/rad-sim/sim/dram/mem_controller.cpp +++ b/rad-sim/sim/dram/mem_controller.cpp @@ -35,12 +35,12 @@ mem_controller::mem_controller(const sc_module_name &name, unsigned int dram_id, : RADSimModule(name, radsim_design), mem_clk("mem_clk"), rst("rst") { //AKB added radsim_design std::string config_file = - radsim_config.GetStringKnob("radsim_root_dir") + + radsim_design->radsim_config->GetStringKnob("radsim_root_dir") + "/sim/dram/DRAMsim3/configs/" + - radsim_config.GetStringVectorKnob("dram_config_files", dram_id) + ".ini"; + radsim_design->radsim_config->GetStringVectorKnob("dram_config_files", dram_id) + ".ini"; std::string output_dir = - radsim_config.GetStringKnob("radsim_root_dir") + "/logs"; + radsim_design->radsim_config->GetStringKnob("radsim_root_dir") + "/logs"; _dramsim = new dramsim3::MemorySystem( config_file, output_dir, @@ -56,7 +56,7 @@ mem_controller::mem_controller(const sc_module_name &name, unsigned int dram_id, _dramsim->GetBusBits() * _dramsim->GetBurstLength(); _memory_clk_period_ns = _dramsim->GetTCK(); _controller_clk_period_ns = - radsim_config.GetDoubleVectorKnob("dram_clk_periods", dram_id); + radsim_design->radsim_config->GetDoubleVectorKnob("dram_clk_periods", dram_id); double bitwidth_ratio = 1.0 * _controller_channel_bitwidth / _memory_channel_bitwidth; double clk_period_ratio = @@ -90,9 +90,9 @@ mem_controller::mem_controller(const sc_module_name &name, unsigned int dram_id, _output_write_queue_occupancy.init(_num_channels); _output_read_queue_occupancy.init(_num_channels); _input_queue_size = - radsim_config.GetIntVectorKnob("dram_queue_sizes", dram_id); + radsim_design->radsim_config->GetIntVectorKnob("dram_queue_sizes", dram_id); _output_queue_size = - radsim_config.GetIntVectorKnob("dram_queue_sizes", dram_id); + radsim_design->radsim_config->GetIntVectorKnob("dram_queue_sizes", dram_id); _num_ranks = _dramsim->GetRanks(); _num_bank_groups = _dramsim->GetBankGroups(); diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 5c0a4bf..6cb9392 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -10,7 +10,7 @@ #include #include //AKB ADDED to test multi-design -RADSimConfig radsim_config; +//RADSimConfig radsim_config; //AKB: commented out //RADSimDesignContext radsim_design; //AKB: commented out std::ostream *gWatchOut; SimLog sim_log; @@ -22,15 +22,18 @@ int sc_main(int argc, char *argv[]) { RADSimCluster* cluster = new RADSimCluster(total_num_rads); //3); //2); gWatchOut = &cout; - int log_verbosity = radsim_config.GetIntKnob("telemetry_log_verbosity"); + //int log_verbosity = radsim_config.GetIntKnob("telemetry_log_verbosity"); //AKB replaced with line below + int log_verbosity = cluster->all_rads[0]->radsim_config->GetIntKnob("telemetry_log_verbosity"); sim_log.SetLogSettings(log_verbosity, "sim.log"); - int num_traces = radsim_config.GetIntKnob("telemetry_num_traces"); + //int num_traces = radsim_config.GetIntKnob("telemetry_num_traces"); //AKB replaced with line below + int num_traces = cluster->all_rads[0]->radsim_config->GetIntKnob("telemetry_num_traces"); sim_trace_probe.SetTraceRecordingSettings("sim.trace", num_traces); sc_clock *driver_clk_sig = new sc_clock( - "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); + //"node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB replaced with line below + "node_clk0", cluster->all_rads[0]->radsim_config->GetDoubleKnob("sim_driver_period"), SC_NS); add_system *system = new add_system("add_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED //mult_system *system = new mult_system("mult_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED @@ -53,7 +56,8 @@ int sc_main(int argc, char *argv[]) { std::queue all_mult_clocks; for (int i = 1; i < total_num_rads; i++) { //subtract one because already have adder RAD - sc_clock *driver_clk_sig = new sc_clock("node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED + //sc_clock *driver_clk_sig = new sc_clock("node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED + sc_clock *driver_clk_sig = new sc_clock("node_clk0", cluster->all_rads[i]->radsim_config->GetDoubleKnob("sim_driver_period"), SC_NS); all_mult_clocks.push(driver_clk_sig); //const std::string mult_system_name = "mult_system" + std::to_string(i); @@ -66,7 +70,8 @@ int sc_main(int argc, char *argv[]) { // cluster->StoreSystem(system3); sc_clock *inter_rad_clk_sig = new sc_clock( - "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED, use same period as sim driver + //"node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED, use same period as sim driver + "node_clk0", cluster->all_rads[0]->radsim_config->GetDoubleKnob("sim_driver_period"), SC_NS); RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); //blackbox->ConnectRadPair(0, 1); //TODO: comment out bc not using this for (int i = 0; i < total_num_rads; i++) { //include adder rad in this @@ -76,7 +81,7 @@ int sc_main(int argc, char *argv[]) { // blackbox->ConnectRadAxi(1); // blackbox->ConnectRadAxi(2); - int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + int start_cycle = GetSimulationCycle(cluster->all_rads[0]->radsim_config->GetDoubleKnob("sim_driver_period")); //GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //sc_bv<128> new_val; //sc_bv<128> old_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); while (cluster->AllRADsNotDone()) { @@ -91,7 +96,7 @@ int sc_main(int argc, char *argv[]) { // } } std::cout << "stopping" << std::endl; - int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + int end_cycle = GetSimulationCycle(cluster->all_rads[0]->radsim_config->GetDoubleKnob("sim_driver_period")); //GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); sc_stop(); //int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); std::cout << "Simulation Cycles from main.cpp = " << end_cycle - start_cycle << std::endl; diff --git a/rad-sim/sim/noc/aximm_master_adapter.cpp b/rad-sim/sim/noc/aximm_master_adapter.cpp index 259abc2..d30267c 100644 --- a/rad-sim/sim/noc/aximm_master_adapter.cpp +++ b/rad-sim/sim/noc/aximm_master_adapter.cpp @@ -5,15 +5,20 @@ aximm_master_adapter::aximm_master_adapter( BookSimConfig *noc_config, Network *noc, BufferState *buffer_state, tRoutingFunction routing_func, bool lookahead_routing, bool wait_for_tail_credit, map *ejected_flits, - unsigned int interface_dataw, double node_period, double adapter_period) + unsigned int interface_dataw, double node_period, double adapter_period, + RADSimConfig* radsim_config //AKB added + ) : sc_module(name) { + //AKB ADDED + this->radsim_config = radsim_config; + // Initialize basic adapter member variables _node_id = node_id; _network_id = network_id; _node_period = node_period; _adapter_period = adapter_period; - _noc_period = radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id); + _noc_period = radsim_config->GetDoubleVectorKnob("noc_clk_period", _network_id); _interface_dataw = interface_dataw; _noc_config = noc_config; @@ -26,7 +31,7 @@ aximm_master_adapter::aximm_master_adapter( // Initialize request interface (AR, AW, W) member variables _ejection_afifo_depth = - radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config->GetIntVectorKnob("noc_adapters_fifo_size", _network_id); _ejection_afifos.resize(AXI_NUM_REQ_TYPES); _ejection_afifo_push_counter.init(AXI_NUM_REQ_TYPES); _ejection_afifo_pop_counter.init(AXI_NUM_REQ_TYPES); @@ -45,7 +50,7 @@ aximm_master_adapter::aximm_master_adapter( // Initialize response interface (B, R) member variables _injection_afifo_depth = - radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config->GetIntVectorKnob("noc_adapters_fifo_size", _network_id); _axi_transaction_width = AXI4_USERW; if ((AXI4_ADDRW + AXI4_CTRLW) > (_interface_dataw + AXI4_RESPW + 1)) { _axi_transaction_width += (AXI4_ADDRW + AXI4_CTRLW); @@ -593,9 +598,9 @@ void aximm_master_adapter::InputInjection() { booksim_flit->subnetwork = 0; booksim_flit->src = _node_id; booksim_flit->ctime = GetSimulationCycle( - radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id)); + radsim_config->GetDoubleVectorKnob("noc_clk_period", _network_id)); booksim_flit->itime = GetSimulationCycle( - radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id)); + radsim_config->GetDoubleVectorKnob("noc_clk_period", _network_id)); booksim_flit->cl = 0; booksim_flit->head = _to_be_injected_flit._head; booksim_flit->tail = _to_be_injected_flit._tail; diff --git a/rad-sim/sim/noc/aximm_master_adapter.hpp b/rad-sim/sim/noc/aximm_master_adapter.hpp index aa775e3..dbbe335 100644 --- a/rad-sim/sim/noc/aximm_master_adapter.hpp +++ b/rad-sim/sim/noc/aximm_master_adapter.hpp @@ -12,6 +12,7 @@ #include #include #include +#include //AKB added class aximm_master_adapter : public sc_module { private: @@ -77,6 +78,9 @@ class aximm_master_adapter : public sc_module { sc_flit _to_be_injected_flit; int _last_vc_id; + //AKB ADDED + RADSimConfig* radsim_config; + public: sc_in node_clk; sc_in adapter_clk; @@ -90,7 +94,9 @@ class aximm_master_adapter : public sc_module { bool lookahead_routing, bool wait_for_tail_credit, map *ejected_flits, unsigned int interface_dataw, double node_period, - double adapter_period); + double adapter_period, + RADSimConfig* radsim_config //AKB added + ); ~aximm_master_adapter(); void OutputInterface(); diff --git a/rad-sim/sim/noc/aximm_slave_adapter.cpp b/rad-sim/sim/noc/aximm_slave_adapter.cpp index 82508de..f9b9c53 100644 --- a/rad-sim/sim/noc/aximm_slave_adapter.cpp +++ b/rad-sim/sim/noc/aximm_slave_adapter.cpp @@ -7,15 +7,20 @@ aximm_slave_adapter::aximm_slave_adapter( BookSimConfig *noc_config, Network *noc, BufferState *buffer_state, tRoutingFunction routing_func, bool lookahead_routing, bool wait_for_tail_credit, map *ejected_flits, - unsigned int interface_dataw, double node_period, double adapter_period) + unsigned int interface_dataw, double node_period, double adapter_period, + RADSimConfig* radsim_config //AKB added + ) : sc_module(name) { + //AKB ADDED + this->radsim_config = radsim_config; + // Initialize basic adapter member variables _node_id = node_id; _network_id = network_id; _node_period = node_period; _adapter_period = adapter_period; - _noc_period = radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id); + _noc_period = radsim_config->GetDoubleVectorKnob("noc_clk_period", _network_id); _interface_dataw = interface_dataw; _noc_config = noc_config; @@ -28,7 +33,7 @@ aximm_slave_adapter::aximm_slave_adapter( // Initialize request interface (AR, AW, W) member variables _injection_afifo_depth = - radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config->GetIntVectorKnob("noc_adapters_fifo_size", _network_id); _axi_transaction_width = AXI4_USERW; if ((AXI4_ADDRW + AXI4_CTRLW) > (_interface_dataw + AXI4_RESPW + 1)) { @@ -61,7 +66,7 @@ aximm_slave_adapter::aximm_slave_adapter( // Initialize response interface (B, R) member variables _ejected_booksim_flit = nullptr; _ejection_afifo_depth = - radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config->GetIntVectorKnob("noc_adapters_fifo_size", _network_id); _ejection_afifos.resize(AXI_NUM_RSP_TYPES); _ejection_afifo_push_counter.init(AXI_NUM_RSP_TYPES); _ejection_afifo_pop_counter.init(AXI_NUM_RSP_TYPES); @@ -402,9 +407,9 @@ void aximm_slave_adapter::InputInjection() { booksim_flit->subnetwork = 0; booksim_flit->src = _node_id; booksim_flit->ctime = GetSimulationCycle( - radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id)); + radsim_config->GetDoubleVectorKnob("noc_clk_period", _network_id)); booksim_flit->itime = GetSimulationCycle( - radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id)); + radsim_config->GetDoubleVectorKnob("noc_clk_period", _network_id)); booksim_flit->cl = 0; booksim_flit->head = _to_be_injected_flit._head; booksim_flit->tail = _to_be_injected_flit._tail; diff --git a/rad-sim/sim/noc/aximm_slave_adapter.hpp b/rad-sim/sim/noc/aximm_slave_adapter.hpp index 56346f9..dfd9477 100644 --- a/rad-sim/sim/noc/aximm_slave_adapter.hpp +++ b/rad-sim/sim/noc/aximm_slave_adapter.hpp @@ -13,6 +13,7 @@ #include #include #include +#include //AKB added /* This class is the SystemC implementation of the AXI Memory Mapped (AXI-MM) * slave NoC adapter. This adapter acts as the access point to the NoC. On one @@ -156,6 +157,9 @@ class aximm_slave_adapter : public sc_module { // waiting for ouptut interface to be ready bool _output_packet_ready; + //AKB ADDED + RADSimConfig* radsim_config; + public: // Clocks and reset sc_in node_clk; @@ -171,7 +175,9 @@ class aximm_slave_adapter : public sc_module { bool lookahead_routing, bool wait_for_tail_credit, map *ejected_flits, unsigned int interface_dataw, double node_period, - double adapter_period); + double adapter_period, + RADSimConfig* radsim_config //AKB added + ); ~aximm_slave_adapter() override; // SystemC Threads implementing stages of input pipeline of the adapter diff --git a/rad-sim/sim/noc/axis_master_adapter.cpp b/rad-sim/sim/noc/axis_master_adapter.cpp index 2ca1551..2d187a9 100644 --- a/rad-sim/sim/noc/axis_master_adapter.cpp +++ b/rad-sim/sim/noc/axis_master_adapter.cpp @@ -6,7 +6,8 @@ axis_master_adapter::axis_master_adapter( std::vector &interface_dataw, BookSimConfig *noc_config, Network *noc, BufferState *buffer_state, tRoutingFunction routing_func, bool lookahead_routing, bool wait_for_tail_credit, - map *ejected_flits) + map *ejected_flits, + RADSimConfig* radsim_config) //AKB added : sc_module(name) { _node_id = node_id; _network_id = network_id; @@ -20,7 +21,7 @@ axis_master_adapter::axis_master_adapter( _num_flits[interface_id] = (int)ceil(payload_dataw * 1.0 / NOC_LINKS_PAYLOAD_WIDTH); } - _num_vcs = radsim_config.GetIntVectorKnob("noc_vcs", _network_id); + _num_vcs = radsim_config->GetIntVectorKnob("noc_vcs", _network_id); axis_interfaces.init(_num_axis_interfaces); _noc_config = noc_config; @@ -33,7 +34,7 @@ axis_master_adapter::axis_master_adapter( _ejected_booksim_flit = nullptr; _ejection_afifo_depth = - radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config->GetIntVectorKnob("noc_adapters_fifo_size", _network_id); _ejection_afifos.resize(_num_vcs); _ejection_afifo_push_counter.init(_num_vcs); _ejection_afifo_pop_counter.init(_num_vcs); @@ -44,7 +45,7 @@ axis_master_adapter::axis_master_adapter( _output_afifos.resize(_num_axis_interfaces); _output_packet_ready.resize(_num_axis_interfaces); _output_afifo_depth = - radsim_config.GetIntVectorKnob("noc_adapters_obuff_size", _network_id); + radsim_config->GetIntVectorKnob("noc_adapters_obuff_size", _network_id); _constructed_packet = sc_packet(); _output_chunk.resize(_num_axis_interfaces); diff --git a/rad-sim/sim/noc/axis_master_adapter.hpp b/rad-sim/sim/noc/axis_master_adapter.hpp index 13b4126..e9c0e09 100644 --- a/rad-sim/sim/noc/axis_master_adapter.hpp +++ b/rad-sim/sim/noc/axis_master_adapter.hpp @@ -58,7 +58,9 @@ class axis_master_adapter : public sc_module { BookSimConfig *noc_config, Network *noc, BufferState *buffer_state, tRoutingFunction routing_func, bool lookahead_routing, bool wait_for_tail_credit, - map *ejected_flits); + map *ejected_flits, + RADSimConfig* radsim_config //AKB added + ); ~axis_master_adapter(); void write_sc_packet_to_axis_output(sc_packet &packet, diff --git a/rad-sim/sim/noc/axis_slave_adapter.cpp b/rad-sim/sim/noc/axis_slave_adapter.cpp index 5a39cee..e30c944 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.cpp +++ b/rad-sim/sim/noc/axis_slave_adapter.cpp @@ -6,7 +6,9 @@ axis_slave_adapter::axis_slave_adapter( std::vector &interface_dataw, double node_period, double adapter_period, BookSimConfig *noc_config, Network *noc, BufferState *buffer_state, tRoutingFunction routing_func, - bool lookahead_routing, bool wait_for_tail_credit) + bool lookahead_routing, bool wait_for_tail_credit, + RADSimConfig* radsim_config //AKB added + ) : sc_module(name) { axis_interfaces.init(interface_types.size()); @@ -17,7 +19,7 @@ axis_slave_adapter::axis_slave_adapter( _network_id = network_id; _node_period = node_period; _adapter_period = adapter_period; - _noc_period = radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id); + _noc_period = radsim_config->GetDoubleVectorKnob("noc_clk_period", _network_id); _num_axis_interfaces = interface_types.size(); _interface_types = interface_types; _interface_dataw = interface_dataw; @@ -51,7 +53,7 @@ axis_slave_adapter::axis_slave_adapter( _input_axis_transactions_afifo_depth = 2; _injection_afifo_depth = - radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config->GetIntVectorKnob("noc_adapters_fifo_size", _network_id); _injection_flit_ready = false; SC_METHOD(InputReady); diff --git a/rad-sim/sim/noc/axis_slave_adapter.hpp b/rad-sim/sim/noc/axis_slave_adapter.hpp index 50bfcb9..d5d03f6 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.hpp +++ b/rad-sim/sim/noc/axis_slave_adapter.hpp @@ -69,7 +69,9 @@ class axis_slave_adapter : public sc_module { double node_period, double adapter_period, BookSimConfig *noc_config, Network *noc, BufferState *buffer_state, tRoutingFunction routing_func, - bool lookahead_routing, bool wait_for_tail_credit); + bool lookahead_routing, bool wait_for_tail_credit, + RADSimConfig* radsim_config //AKB added + ); ~axis_slave_adapter(); int GetInputDestinationNode(const sc_bv axis_transaction_dest); diff --git a/rad-sim/sim/noc/radsim_noc.cpp b/rad-sim/sim/noc/radsim_noc.cpp index 3f1dc55..9fcee56 100644 --- a/rad-sim/sim/noc/radsim_noc.cpp +++ b/rad-sim/sim/noc/radsim_noc.cpp @@ -1,6 +1,8 @@ #include //AKB: moved to header file #include +//AKB replaced all radsim_config. with radsim_design->radsim_config-> + radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::string portal_slave_name, int noc_id, std::vector &adapter_clks, std::vector &module_clks, @@ -13,11 +15,11 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str _rad_id = rad_id; _portal_slave_name = portal_slave_name; _noc_id = noc_id; - _num_noc_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", _noc_id); + _num_noc_nodes = radsim_design->radsim_config->GetIntVectorKnob("noc_num_nodes", _noc_id); // Parse config file, initialize routing data structures and create Booksim // NoC - std::string config_filename = radsim_config.GetStringKnob("radsim_root_dir") + + std::string config_filename = radsim_design->radsim_config->GetStringKnob("radsim_root_dir") + "/sim/noc/noc" + std::to_string(noc_id) + "_config"; _config.ParseFile(config_filename); @@ -82,7 +84,9 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str &_config, _booksim_noc, _buffer_state[axis_master_adapter_info[adapter_id]._node_id], _routing_func, _lookahead_routing, _wait_for_tail_credit, - _ejected_flits); + _ejected_flits, + radsim_design->radsim_config //AKB added + ); // Connect adapter ports and register NoC port in design context master_adapter->noc_clk(noc_clk); @@ -123,9 +127,9 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str for (auto it = axis_slave_adapter_info[adapter_id]._port_types.begin(); it != axis_slave_adapter_info[adapter_id]._port_types.end(); it++) adapter_port_types.push_back(static_cast(*it)); - double adapter_module_period = radsim_config.GetDoubleVectorKnob( + double adapter_module_period = radsim_design->radsim_config->GetDoubleVectorKnob( "design_clk_periods", axis_slave_adapter_info[adapter_id]._module_clk_idx); - double adapter_period = radsim_config.GetDoubleVectorKnob( + double adapter_period = radsim_design->radsim_config->GetDoubleVectorKnob( "noc_adapters_clk_period", axis_slave_adapter_info[adapter_id]._adapter_clk_idx); // Create adapter @@ -134,7 +138,9 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str adapter_port_types, axis_slave_adapter_info[adapter_id]._port_dataw, adapter_module_period, adapter_period, &_config, _booksim_noc, _buffer_state[axis_slave_adapter_info[adapter_id]._node_id], - _routing_func, _lookahead_routing, _wait_for_tail_credit); + _routing_func, _lookahead_routing, _wait_for_tail_credit, + radsim_design->radsim_config //AKB added + ); // Connect adapter ports and register NoC port in design context slave_adapter->noc_clk(noc_clk); @@ -167,9 +173,9 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str std::string adapter_name_str = "aximm_master_adapter_" + std::to_string(adapter_id); const char *adapter_name = adapter_name_str.c_str(); - double adapter_module_period = radsim_config.GetDoubleVectorKnob( + double adapter_module_period = radsim_design->radsim_config->GetDoubleVectorKnob( "design_clk_periods", aximm_master_adapter_info[adapter_id]._module_clk_idx); - double adapter_period = radsim_config.GetDoubleVectorKnob( + double adapter_period = radsim_design->radsim_config->GetDoubleVectorKnob( "noc_adapters_clk_period", aximm_master_adapter_info[adapter_id]._adapter_clk_idx); @@ -180,7 +186,9 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str _buffer_state[aximm_master_adapter_info[adapter_id]._node_id], _routing_func, _lookahead_routing, _wait_for_tail_credit, _ejected_flits, aximm_master_adapter_info[adapter_id]._port_dataw[0], - adapter_module_period, adapter_period); + adapter_module_period, adapter_period, + radsim_design->radsim_config //AKB added + ); // Connect adapter ports and register NoC port in design context master_adapter->noc_clk(noc_clk); @@ -210,9 +218,9 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str std::string adapter_name_str = "aximm_slave_adapter_" + std::to_string(adapter_id); const char *adapter_name = adapter_name_str.c_str(); - double adapter_module_period = radsim_config.GetDoubleVectorKnob( + double adapter_module_period = radsim_design->radsim_config->GetDoubleVectorKnob( "design_clk_periods", aximm_slave_adapter_info[adapter_id]._module_clk_idx); - double adapter_period = radsim_config.GetDoubleVectorKnob( + double adapter_period = radsim_design->radsim_config->GetDoubleVectorKnob( "noc_adapters_clk_period", aximm_slave_adapter_info[adapter_id]._adapter_clk_idx); @@ -223,7 +231,9 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str _buffer_state[aximm_slave_adapter_info[adapter_id]._node_id], _routing_func, _lookahead_routing, _wait_for_tail_credit, _ejected_flits, aximm_slave_adapter_info[adapter_id]._port_dataw[0], - adapter_module_period, adapter_period); + adapter_module_period, adapter_period, + radsim_design->radsim_config //AKB added + ); // Connect adapter ports and register NoC port in design context slave_adapter->noc_clk(noc_clk); diff --git a/rad-sim/sim/radsim_config.cpp b/rad-sim/sim/radsim_config.cpp index f0e5bb1..ce7ce6a 100644 --- a/rad-sim/sim/radsim_config.cpp +++ b/rad-sim/sim/radsim_config.cpp @@ -1,5 +1,7 @@ #include "radsim_config.hpp" +//AKB: replaced all radsim_config. with this-> + RADSimConfig::RADSimConfig() {} RADSimConfig::~RADSimConfig() {} @@ -160,7 +162,8 @@ bool RADSimConfig::HasStringVectorKnob(const std::string &key) { } // Parse RADSim knobs from file into RADSimConfig data structures -void ParseRADSimKnobs(const std::string &knobs_filename) { +//void ParseRADSimKnobs(const std::string &knobs_filename) { +void RADSimConfig::ParseRADSimKnobs(const std::string &knobs_filename) { std::ifstream knobs_file(knobs_filename); std::string line; @@ -181,13 +184,13 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { (param == "design_name")) { std::string value; std::getline(ss, value, ' '); - radsim_config.AddStringKnob(param, value); + this->AddStringKnob(param, value); } else if ((param == "noc_num_nocs") || (param == "telemetry_log_verbosity") || (param == "dram_num_controllers")) { std::string value_str; std::getline(ss, value_str, ' '); int value = std::stoi(value_str); - radsim_config.AddIntKnob(param, value); + this->AddIntKnob(param, value); } else if ((param == "noc_payload_width") || (param == "noc_vcs") || (param == "noc_num_nodes") || (param == "noc_adapters_fifo_size") || (param == "noc_adapters_obuff_size") || @@ -199,7 +202,7 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { value_element = std::stoi(value_element_str); value.push_back(value_element); } - radsim_config.AddIntVectorKnob(param, value); + this->AddIntVectorKnob(param, value); } else if ((param == "sim_driver_period")) { std::string value_element_str; std::getline(ss, value_element_str, ' '); @@ -207,7 +210,7 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { if (value > max_period) { max_period = value; } - radsim_config.AddDoubleKnob(param, value); + this->AddDoubleKnob(param, value); } else if ((param == "noc_clk_period") || (param == "noc_adapters_clk_period") || (param == "design_clk_periods") || (param == "dram_clk_periods")) { @@ -221,7 +224,7 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { } value.push_back(value_element); } - radsim_config.AddDoubleVectorKnob(param, value); + this->AddDoubleVectorKnob(param, value); } else if ((param == "design_noc_placement") || (param == "noc_adapters_in_arbiter") || (param == "noc_adapters_out_arbiter") || @@ -232,14 +235,14 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { while (getline(ss, value_element, ' ')) { value.push_back(value_element); } - radsim_config.AddStringVectorKnob(param, value); + this->AddStringVectorKnob(param, value); if (param == "telemetry_traces") { - radsim_config.AddIntKnob("telemetry_num_traces", value.size()); + this->AddIntKnob("telemetry_num_traces", value.size()); } } else { std::cerr << "Undefined RADSim knob \"" << param << "\"" << std::endl; exit(1); } } - radsim_config.AddDoubleKnob("max_period", max_period); + this->AddDoubleKnob("max_period", max_period); } \ No newline at end of file diff --git a/rad-sim/sim/radsim_config.hpp b/rad-sim/sim/radsim_config.hpp index 55038fa..6117426 100644 --- a/rad-sim/sim/radsim_config.hpp +++ b/rad-sim/sim/radsim_config.hpp @@ -6,7 +6,7 @@ #include #include #include -#include +//#include // Class for storing all RADSim configuration knobs class RADSimConfig { @@ -42,8 +42,9 @@ class RADSimConfig { bool HasIntVectorKnob(const std::string& key); bool HasDoubleVectorKnob(const std::string& key); bool HasStringVectorKnob(const std::string& key); + void ParseRADSimKnobs(const std::string& knobs_filename); }; -void ParseRADSimKnobs(const std::string& knobs_filename); +//void ParseRADSimKnobs(const std::string& knobs_filename); //AKB: turned into a member function so can act on same object -extern RADSimConfig radsim_config; \ No newline at end of file +//extern RADSimConfig radsim_config; //AKB: commented out \ No newline at end of file diff --git a/rad-sim/sim/radsim_telemetry.cpp b/rad-sim/sim/radsim_telemetry.cpp index b529d67..84c0f79 100644 --- a/rad-sim/sim/radsim_telemetry.cpp +++ b/rad-sim/sim/radsim_telemetry.cpp @@ -64,13 +64,13 @@ void NoCTransactionTelemetry::DumpStatsToFile(const std::string& filename) { } std::vector NoCTransactionTelemetry::DumpTrafficFlows(const std::string& filename, unsigned int cycle_count, - std::vector>>& node_module_names) { - double sim_driver_period = radsim_config.GetDoubleKnob("sim_driver_period") / 1000000000.0; - unsigned int num_nocs = radsim_config.GetIntKnob("noc_num_nocs"); + std::vector>>& node_module_names, RADSimConfig* radsim_config) { //AKB added last arg + double sim_driver_period = radsim_config->GetDoubleKnob("sim_driver_period") / 1000000000.0; + unsigned int num_nocs = radsim_config->GetIntKnob("noc_num_nocs"); std::vector>> traffic_bits(num_nocs); std::vector>> traffic_num_hops(num_nocs); for (unsigned int noc_id = 0; noc_id < num_nocs; noc_id++) { - unsigned int num_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", noc_id); + unsigned int num_nodes = radsim_config->GetIntVectorKnob("noc_num_nodes", noc_id); traffic_bits[noc_id].resize(num_nodes); traffic_num_hops[noc_id].resize(num_nodes); } @@ -90,7 +90,7 @@ std::vector NoCTransactionTelemetry::DumpTrafficFlows(const std::string& double aggregate_bandwidth = 0.0; std::ofstream traffic_file(filename + "_noc" + std::to_string(noc_id) + ".xml", std::ofstream::out); traffic_file << "" << endl; - unsigned int num_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", noc_id); + unsigned int num_nodes = radsim_config->GetIntVectorKnob("noc_num_nodes", noc_id); for (unsigned int src_id = 0; src_id < num_nodes; src_id++) { if (traffic_bits[noc_id][src_id].size() > 0) { for (auto& flow : traffic_bits[noc_id][src_id]) { @@ -123,13 +123,15 @@ void NoCFlitTelemetry::DumpNoCFlitTracesToFile(const std::string& filename) { ofile.close(); } -SimLog::SimLog() { +SimLog::SimLog(RADSimConfig* radsim_config) { //AKB added arg verbosity = 0; + this->radsim_config = radsim_config; //AKB added } -SimLog::SimLog(unsigned int verbosity_level, std::string log_filename) { +SimLog::SimLog(unsigned int verbosity_level, std::string log_filename, RADSimConfig* radsim_config) { //AKB added last arg verbosity = verbosity_level; log_file.open(log_filename); + this->radsim_config = radsim_config; //AKB added } SimLog::~SimLog() { log_file.close(); } @@ -157,12 +159,12 @@ void SimLog::log(info_t, std::string msg, sc_module_name module, bool log_to_fil } } -void SimLog::log(trace_t, std::string msg, sc_module_name module, bool log_to_file) { +void SimLog::log(trace_t, std::string msg, sc_module_name module, bool log_to_file) { if (verbosity >= 2) { - std::cout << "\033[36m[TRACE] " << module << " @ " << GetSimulationCycle() << ": " << msg << "\033[0m" + std::cout << "\033[36m[TRACE] " << module << " @ " << GetSimulationCycle(this->radsim_config) << ": " << msg << "\033[0m" << std::endl; if (log_to_file) { - log_file << "[TRACE] " << module << " @ " << GetSimulationCycle() << ": " << msg << std::endl; + log_file << "[TRACE] " << module << " @ " << GetSimulationCycle(this->radsim_config) << ": " << msg << std::endl; } } } @@ -209,8 +211,8 @@ void SimTraceRecording::SetTraceRecordingSettings(std::string filename, unsigned trace_cycles.resize(num_traces_monitored); } -void SimTraceRecording::record_event(unsigned int trace_id) { - trace_cycles[trace_id].push_back(GetSimulationCycle()); +void SimTraceRecording::record_event(unsigned int trace_id, RADSimConfig* radsim_config) { //AKB added arg + trace_cycles[trace_id].push_back(GetSimulationCycle(radsim_config)); } void SimTraceRecording::dump_traces() { diff --git a/rad-sim/sim/radsim_telemetry.hpp b/rad-sim/sim/radsim_telemetry.hpp index 539a975..f04ee56 100644 --- a/rad-sim/sim/radsim_telemetry.hpp +++ b/rad-sim/sim/radsim_telemetry.hpp @@ -58,7 +58,7 @@ class NoCTransactionTelemetry { static void UpdateHops(int id, int num_hops); static void DumpStatsToFile(const std::string& filename); static std::vector DumpTrafficFlows(const std::string& filename, unsigned int cycle_count, - std::vector>>& node_module_names); + std::vector>>& node_module_names, RADSimConfig* radsim_config); //AKB added last arg }; // Class for recording and storing flit traces @@ -88,10 +88,12 @@ class SimLog { private: unsigned int verbosity; std::ofstream log_file; + //AKB added + RADSimConfig* radsim_config; public: - SimLog(); - SimLog(unsigned int verbosity_level, std::string log_filename); + SimLog(RADSimConfig* radsim_config); //AKB added arg + SimLog(unsigned int verbosity_level, std::string log_filename, RADSimConfig* radsim_config); //AKB added last arg ~SimLog(); void SetLogSettings(unsigned int verbosity_level, std::string log_filename); void log(debug_t, std::string msg, sc_module_name module = "", bool log_to_file = true); @@ -113,7 +115,7 @@ class SimTraceRecording { SimTraceRecording(std::string filename, unsigned int num_traces); ~SimTraceRecording(); void SetTraceRecordingSettings(std::string filename, unsigned int num_traces); - void record_event(unsigned int trace_id); + void record_event(unsigned int trace_id, RADSimConfig* radsim_config); //AKB added last arg void dump_traces(); }; diff --git a/rad-sim/sim/radsim_utils.cpp b/rad-sim/sim/radsim_utils.cpp index ef265ee..9ca6642 100644 --- a/rad-sim/sim/radsim_utils.cpp +++ b/rad-sim/sim/radsim_utils.cpp @@ -6,7 +6,7 @@ int GetSimulationCycle(double period) { return cycle; } -int GetSimulationCycle() { +int GetSimulationCycle(RADSimConfig* radsim_config) { //AKB added argument double period = radsim_config.GetDoubleKnob("max_period"); sc_time t = sc_time_stamp(); int cycle = (int)ceil(t.value() / period / 1000); diff --git a/rad-sim/sim/radsim_utils.hpp b/rad-sim/sim/radsim_utils.hpp index 32e11bc..b36b68a 100644 --- a/rad-sim/sim/radsim_utils.hpp +++ b/rad-sim/sim/radsim_utils.hpp @@ -18,7 +18,7 @@ struct AdapterInfo { // Returns the current simulation cycle number given a certain clock period int GetSimulationCycle(double period); -int GetSimulationCycle(); +int GetSimulationCycle(RADSimConfig* radsim_config); //AKB added argument // Returns the current simulation cycle number given the NoC clock period // int GetSimTime(); From 3c2a0d29c0823898a543c5a5dbeb823604dd01bb Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sun, 5 May 2024 22:46:20 -0400 Subject: [PATCH 060/127] Restored to commit 4e45fa011b1b24f5427e9c527b26c6b85b3f0d5d --- rad-sim/example-designs/add/add_driver.cpp | 9 ++--- rad-sim/example-designs/add/modules/adder.cpp | 4 +-- .../example-designs/add/modules/portal.cpp | 2 +- rad-sim/example-designs/mult/modules/mult.cpp | 2 +- .../mult/modules/portal_mult.cpp | 2 +- rad-sim/example-designs/mult/mult_driver.cpp | 6 ++-- rad-sim/sim/design_context.cpp | 33 ++++++++---------- rad-sim/sim/design_context.hpp | 1 - rad-sim/sim/dram/mem_controller.cpp | 12 +++---- rad-sim/sim/main.cpp | 21 +++++------- rad-sim/sim/noc/aximm_master_adapter.cpp | 17 ++++------ rad-sim/sim/noc/aximm_master_adapter.hpp | 8 +---- rad-sim/sim/noc/aximm_slave_adapter.cpp | 17 ++++------ rad-sim/sim/noc/aximm_slave_adapter.hpp | 8 +---- rad-sim/sim/noc/axis_master_adapter.cpp | 9 +++-- rad-sim/sim/noc/axis_master_adapter.hpp | 4 +-- rad-sim/sim/noc/axis_slave_adapter.cpp | 8 ++--- rad-sim/sim/noc/axis_slave_adapter.hpp | 4 +-- rad-sim/sim/noc/radsim_noc.cpp | 34 +++++++------------ rad-sim/sim/radsim_config.cpp | 21 +++++------- rad-sim/sim/radsim_config.hpp | 7 ++-- rad-sim/sim/radsim_telemetry.cpp | 26 +++++++------- rad-sim/sim/radsim_telemetry.hpp | 10 +++--- rad-sim/sim/radsim_utils.cpp | 2 +- rad-sim/sim/radsim_utils.hpp | 2 +- 25 files changed, 104 insertions(+), 165 deletions(-) diff --git a/rad-sim/example-designs/add/add_driver.cpp b/rad-sim/example-designs/add/add_driver.cpp index 5dbb45a..5bf4208 100644 --- a/rad-sim/example-designs/add/add_driver.cpp +++ b/rad-sim/example-designs/add/add_driver.cpp @@ -42,8 +42,7 @@ void add_driver::source() { client_valid.write(false); wait(); rst.write(false); - //start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //AKB replaced with line below - start_cycle = GetSimulationCycle(this->radsim_design->radsim_config->GetDoubleKnob("sim_driver_period")); + start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); start_time = std::chrono::steady_clock::now(); wait(); @@ -78,15 +77,13 @@ void add_driver::sink() { std::cout << "SUCCESS - Output is matching!" << std::endl; } - //end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - end_cycle = GetSimulationCycle(this->radsim_design->radsim_config->GetDoubleKnob("sim_driver_period")); + end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); end_time = std::chrono::steady_clock::now(); std::cout << "Simulation Cycles = " << end_cycle - start_cycle << std::endl; std::cout << "Simulation Time = " << std::chrono::duration_cast (end_time - start_time).count() << " us" << std::endl; NoCTransactionTelemetry::DumpStatsToFile("stats.csv"); - //end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - end_cycle = GetSimulationCycle(this->radsim_design->radsim_config->GetDoubleKnob("sim_driver_period")); + end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); std::cout << "Simulation Cycles for Just Adder Portion = " << end_cycle - start_cycle << std::endl; this->radsim_design->set_rad_done(); //flag to replace sc_stop calls diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index b909129..307e1fe 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -119,11 +119,11 @@ void adder::Tick() { int count_out_addends = 0; wait(); - //int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //std::cout << "adder.cpp is before while loop at cycle " << curr_cycle << std::endl; // Always @ positive edge of the clock while (true) { - //curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //std::cout << "tready: " << axis_adder_master_interface.tready.read() << std::endl; //accept_data = !accept_data; diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp index 08ceb21..54d0cc5 100644 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ b/rad-sim/example-designs/add/modules/portal.cpp @@ -34,7 +34,7 @@ void portal::Tick() { //sequential logic //Always @ positive edge of clock while (true) { - //int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); if (axis_portal_slave_interface.tvalid.read() && axis_portal_slave_interface.tready.read()) { diff --git a/rad-sim/example-designs/mult/modules/mult.cpp b/rad-sim/example-designs/mult/modules/mult.cpp index ed27c21..9291e29 100644 --- a/rad-sim/example-designs/mult/modules/mult.cpp +++ b/rad-sim/example-designs/mult/modules/mult.cpp @@ -56,7 +56,7 @@ void mult::Tick() { response.write(mult_rolling_product); //mult_inter_rad_recvd.write(1); //maybe not needed if using the if (!printed_end_cycle) { - //int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //std::cout << "mult.cpp received all factors from add RAD at cycle " << end_cycle << std::endl; printed_end_cycle = true; } diff --git a/rad-sim/example-designs/mult/modules/portal_mult.cpp b/rad-sim/example-designs/mult/modules/portal_mult.cpp index 05c968c..af13cd8 100644 --- a/rad-sim/example-designs/mult/modules/portal_mult.cpp +++ b/rad-sim/example-designs/mult/modules/portal_mult.cpp @@ -39,7 +39,7 @@ void portal_mult::Tick() { //sequential logic if (portal_axis_slave.tvalid.read() && portal_axis_slave.tready.read()) { //get current cycle - //int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //read //std::cout << module_name << ": Portal_Mult Module Got Transaction on cycle " << curr_cycle << " (RAD ID) = " // << radsim_design->rad_id //<< portal_axis_slave.tuser.read().to_uint64() diff --git a/rad-sim/example-designs/mult/mult_driver.cpp b/rad-sim/example-designs/mult/mult_driver.cpp index 755f61d..dfccaf6 100644 --- a/rad-sim/example-designs/mult/mult_driver.cpp +++ b/rad-sim/example-designs/mult/mult_driver.cpp @@ -37,8 +37,7 @@ void mult_driver::source() { client_valid.write(false); wait(); rst.write(false); - //start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - start_cycle = GetSimulationCycle(this->radsim_design->radsim_config->GetDoubleKnob("sim_driver_period")); + start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); wait(); while (!numbers_to_send.empty()) { @@ -68,8 +67,7 @@ void mult_driver::sink() { if (response.read() != actual_product) std::cout << "FAILURE - Output is not matching!" << std::endl; else std::cout << "SUCCESS - Output is matching!" << std::endl; - //end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - end_cycle = GetSimulationCycle(this->radsim_design->radsim_config->GetDoubleKnob("sim_driver_period")); + end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); std::cout << "Simulation Cycles for Just Mult Portion = " << end_cycle - start_cycle << std::endl; this->radsim_design->set_rad_done(); //flag to replace sc_stop calls diff --git a/rad-sim/sim/design_context.cpp b/rad-sim/sim/design_context.cpp index 1d535e6..84937ab 100644 --- a/rad-sim/sim/design_context.cpp +++ b/rad-sim/sim/design_context.cpp @@ -1,10 +1,9 @@ #include RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { - radsim_config = new RADSimConfig(); std::string radsim_knobs_filename = "/sim/radsim_knobs"; std::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename; - radsim_config->ParseRADSimKnobs(radsim_knobs_filepath); + ParseRADSimKnobs(radsim_knobs_filepath); //assign its rad id rad_id = rad_id_; @@ -12,7 +11,7 @@ RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { // Create NoC clocks std::string clk_name; std::vector noc_period = - radsim_config->GetDoubleVectorKnob("noc_clk_period"); + radsim_config.GetDoubleVectorKnob("noc_clk_period"); _noc_clks.resize(noc_period.size()); for (unsigned int clk_id = 0; clk_id < _noc_clks.size(); clk_id++) { clk_name = "noc_clk" + std::to_string(clk_id); @@ -22,7 +21,7 @@ RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { // Create adapter clocks std::vector adapter_period = - radsim_config->GetDoubleVectorKnob("noc_adapters_clk_period"); + radsim_config.GetDoubleVectorKnob("noc_adapters_clk_period"); _adapter_clks.resize(adapter_period.size()); for (unsigned int clk_id = 0; clk_id < _adapter_clks.size(); clk_id++) { clk_name = "adapter_clk" + std::to_string(clk_id); @@ -32,7 +31,7 @@ RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { // Create module clocks std::vector module_period = - radsim_config->GetDoubleVectorKnob("design_clk_periods"); + radsim_config.GetDoubleVectorKnob("design_clk_periods"); _module_clks.resize(module_period.size()); for (unsigned int clk_id = 0; clk_id < _module_clks.size(); clk_id++) { clk_name = "module_clk" + std::to_string(clk_id); @@ -40,19 +39,17 @@ RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { new sc_clock(clk_name.c_str(), module_period[clk_id], SC_NS); } - int num_nocs = radsim_config->GetIntKnob("noc_num_nocs"); + int num_nocs = radsim_config.GetIntKnob("noc_num_nocs"); _node_module_names.resize(num_nocs); for (int noc_id = 0; noc_id < num_nocs; noc_id++) { - int num_nodes = radsim_config->GetIntVectorKnob("noc_num_nodes", noc_id); + int num_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", noc_id); _node_module_names[noc_id].resize(num_nodes); } //AKB ADDED: rad_done = false; //initially this RAD is not done its simulation design } -RADSimDesignContext::~RADSimDesignContext() { - delete radsim_config; -} +RADSimDesignContext::~RADSimDesignContext() {} bool IsSlavePort(std::string &port_name, RADSimModule *module_ptr) { bool is_axis_slave = (module_ptr->_axis_slave_ports.find(port_name) != @@ -77,11 +74,11 @@ std::string GetModuleNameFromPortName(std::string &port_name) { return module_name; } -uint64_t DeterminedBaseAddress(int noc_id, int node_id, RADSimConfig* radsim_config) { //AKB added last arg - int num_nocs = radsim_config->GetIntKnob("noc_num_nocs"); +uint64_t DeterminedBaseAddress(int noc_id, int node_id) { + int num_nocs = radsim_config.GetIntKnob("noc_num_nocs"); int max_num_nodes = 0; for (int noc_id = 0; noc_id < num_nocs; noc_id++) { - int num_nodes = radsim_config->GetIntVectorKnob("noc_num_nodes", noc_id); + int num_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", noc_id); if (num_nodes > max_num_nodes) { max_num_nodes = num_nodes; } @@ -162,7 +159,7 @@ void RADSimDesignContext::ParseNoCPlacement(const std::string &design_path, //AK // Set base address information _aximm_port_base_addresses[port_name] = - DeterminedBaseAddress(port_noc_placement, port_node_placement, radsim_config); //AKB: changed to pass in RADSimConfig* radsim_config + DeterminedBaseAddress(port_noc_placement, port_node_placement); } } else { std::string module_name, port_name, port_noc_placement_str, @@ -266,7 +263,7 @@ void RADSimDesignContext::ParseNoCPlacement(const std::string &design_path, //AK } // Set base address information _aximm_port_base_addresses[port_name] = - DeterminedBaseAddress(port_noc_placement, port_node_placement, radsim_config); + DeterminedBaseAddress(port_noc_placement, port_node_placement); } for (unsigned int port_id = 0; @@ -296,7 +293,7 @@ void RADSimDesignContext::ParseNoCPlacement(const std::string &design_path, //AK } // Set base address information _aximm_port_base_addresses[port_name] = - DeterminedBaseAddress(port_noc_placement, port_node_placement, radsim_config); + DeterminedBaseAddress(port_noc_placement, port_node_placement); } } _node_module_names[port_noc_placement][port_node_placement].insert( @@ -340,7 +337,7 @@ void RADSimDesignContext::RegisterModule(std::string module_name, void RADSimDesignContext::BuildDesignContext(const std::string &design_path, //AKB ADDED first arg const std::string &placement_filename, const std::string &clks_filename) { - unsigned int num_nocs = radsim_config->GetIntKnob("noc_num_nocs"); + unsigned int num_nocs = radsim_config.GetIntKnob("noc_num_nocs"); _node_id_is_aximm.resize(num_nocs); _node_id_ports_list.resize(num_nocs); _noc_axis_slave_adapter_info.resize(num_nocs); @@ -475,7 +472,7 @@ void RADSimDesignContext::BuildDesignContext(const std::string &design_path, //A } void RADSimDesignContext::CreateSystemNoCs(sc_in &rst) { - unsigned int num_nocs = radsim_config->GetIntKnob("noc_num_nocs"); + unsigned int num_nocs = radsim_config.GetIntKnob("noc_num_nocs"); for (unsigned int noc_id = 0; noc_id < num_nocs; noc_id++) { std::string noc_name_str = "radsim_noc_" + std::to_string(noc_id); const char *noc_name = noc_name_str.c_str(); diff --git a/rad-sim/sim/design_context.hpp b/rad-sim/sim/design_context.hpp index d42a83f..24418d0 100644 --- a/rad-sim/sim/design_context.hpp +++ b/rad-sim/sim/design_context.hpp @@ -58,7 +58,6 @@ class RADSimDesignContext { bool rad_done; public: - RADSimConfig* radsim_config; //AKB added //unsigned int portal_id; //NoC ID of portal module on RAD unsigned int rad_id; //unique ID of this RAD std::string portal_slave_name; diff --git a/rad-sim/sim/dram/mem_controller.cpp b/rad-sim/sim/dram/mem_controller.cpp index 427773f..7bf96b6 100644 --- a/rad-sim/sim/dram/mem_controller.cpp +++ b/rad-sim/sim/dram/mem_controller.cpp @@ -35,12 +35,12 @@ mem_controller::mem_controller(const sc_module_name &name, unsigned int dram_id, : RADSimModule(name, radsim_design), mem_clk("mem_clk"), rst("rst") { //AKB added radsim_design std::string config_file = - radsim_design->radsim_config->GetStringKnob("radsim_root_dir") + + radsim_config.GetStringKnob("radsim_root_dir") + "/sim/dram/DRAMsim3/configs/" + - radsim_design->radsim_config->GetStringVectorKnob("dram_config_files", dram_id) + ".ini"; + radsim_config.GetStringVectorKnob("dram_config_files", dram_id) + ".ini"; std::string output_dir = - radsim_design->radsim_config->GetStringKnob("radsim_root_dir") + "/logs"; + radsim_config.GetStringKnob("radsim_root_dir") + "/logs"; _dramsim = new dramsim3::MemorySystem( config_file, output_dir, @@ -56,7 +56,7 @@ mem_controller::mem_controller(const sc_module_name &name, unsigned int dram_id, _dramsim->GetBusBits() * _dramsim->GetBurstLength(); _memory_clk_period_ns = _dramsim->GetTCK(); _controller_clk_period_ns = - radsim_design->radsim_config->GetDoubleVectorKnob("dram_clk_periods", dram_id); + radsim_config.GetDoubleVectorKnob("dram_clk_periods", dram_id); double bitwidth_ratio = 1.0 * _controller_channel_bitwidth / _memory_channel_bitwidth; double clk_period_ratio = @@ -90,9 +90,9 @@ mem_controller::mem_controller(const sc_module_name &name, unsigned int dram_id, _output_write_queue_occupancy.init(_num_channels); _output_read_queue_occupancy.init(_num_channels); _input_queue_size = - radsim_design->radsim_config->GetIntVectorKnob("dram_queue_sizes", dram_id); + radsim_config.GetIntVectorKnob("dram_queue_sizes", dram_id); _output_queue_size = - radsim_design->radsim_config->GetIntVectorKnob("dram_queue_sizes", dram_id); + radsim_config.GetIntVectorKnob("dram_queue_sizes", dram_id); _num_ranks = _dramsim->GetRanks(); _num_bank_groups = _dramsim->GetBankGroups(); diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 6cb9392..5c0a4bf 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -10,7 +10,7 @@ #include #include //AKB ADDED to test multi-design -//RADSimConfig radsim_config; //AKB: commented out +RADSimConfig radsim_config; //RADSimDesignContext radsim_design; //AKB: commented out std::ostream *gWatchOut; SimLog sim_log; @@ -22,18 +22,15 @@ int sc_main(int argc, char *argv[]) { RADSimCluster* cluster = new RADSimCluster(total_num_rads); //3); //2); gWatchOut = &cout; - //int log_verbosity = radsim_config.GetIntKnob("telemetry_log_verbosity"); //AKB replaced with line below - int log_verbosity = cluster->all_rads[0]->radsim_config->GetIntKnob("telemetry_log_verbosity"); + int log_verbosity = radsim_config.GetIntKnob("telemetry_log_verbosity"); sim_log.SetLogSettings(log_verbosity, "sim.log"); - //int num_traces = radsim_config.GetIntKnob("telemetry_num_traces"); //AKB replaced with line below - int num_traces = cluster->all_rads[0]->radsim_config->GetIntKnob("telemetry_num_traces"); + int num_traces = radsim_config.GetIntKnob("telemetry_num_traces"); sim_trace_probe.SetTraceRecordingSettings("sim.trace", num_traces); sc_clock *driver_clk_sig = new sc_clock( - //"node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB replaced with line below - "node_clk0", cluster->all_rads[0]->radsim_config->GetDoubleKnob("sim_driver_period"), SC_NS); + "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); add_system *system = new add_system("add_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED //mult_system *system = new mult_system("mult_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED @@ -56,8 +53,7 @@ int sc_main(int argc, char *argv[]) { std::queue all_mult_clocks; for (int i = 1; i < total_num_rads; i++) { //subtract one because already have adder RAD - //sc_clock *driver_clk_sig = new sc_clock("node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED - sc_clock *driver_clk_sig = new sc_clock("node_clk0", cluster->all_rads[i]->radsim_config->GetDoubleKnob("sim_driver_period"), SC_NS); + sc_clock *driver_clk_sig = new sc_clock("node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED all_mult_clocks.push(driver_clk_sig); //const std::string mult_system_name = "mult_system" + std::to_string(i); @@ -70,8 +66,7 @@ int sc_main(int argc, char *argv[]) { // cluster->StoreSystem(system3); sc_clock *inter_rad_clk_sig = new sc_clock( - //"node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED, use same period as sim driver - "node_clk0", cluster->all_rads[0]->radsim_config->GetDoubleKnob("sim_driver_period"), SC_NS); + "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED, use same period as sim driver RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); //blackbox->ConnectRadPair(0, 1); //TODO: comment out bc not using this for (int i = 0; i < total_num_rads; i++) { //include adder rad in this @@ -81,7 +76,7 @@ int sc_main(int argc, char *argv[]) { // blackbox->ConnectRadAxi(1); // blackbox->ConnectRadAxi(2); - int start_cycle = GetSimulationCycle(cluster->all_rads[0]->radsim_config->GetDoubleKnob("sim_driver_period")); //GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //sc_bv<128> new_val; //sc_bv<128> old_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); while (cluster->AllRADsNotDone()) { @@ -96,7 +91,7 @@ int sc_main(int argc, char *argv[]) { // } } std::cout << "stopping" << std::endl; - int end_cycle = GetSimulationCycle(cluster->all_rads[0]->radsim_config->GetDoubleKnob("sim_driver_period")); //GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); sc_stop(); //int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); std::cout << "Simulation Cycles from main.cpp = " << end_cycle - start_cycle << std::endl; diff --git a/rad-sim/sim/noc/aximm_master_adapter.cpp b/rad-sim/sim/noc/aximm_master_adapter.cpp index d30267c..259abc2 100644 --- a/rad-sim/sim/noc/aximm_master_adapter.cpp +++ b/rad-sim/sim/noc/aximm_master_adapter.cpp @@ -5,20 +5,15 @@ aximm_master_adapter::aximm_master_adapter( BookSimConfig *noc_config, Network *noc, BufferState *buffer_state, tRoutingFunction routing_func, bool lookahead_routing, bool wait_for_tail_credit, map *ejected_flits, - unsigned int interface_dataw, double node_period, double adapter_period, - RADSimConfig* radsim_config //AKB added - ) + unsigned int interface_dataw, double node_period, double adapter_period) : sc_module(name) { - //AKB ADDED - this->radsim_config = radsim_config; - // Initialize basic adapter member variables _node_id = node_id; _network_id = network_id; _node_period = node_period; _adapter_period = adapter_period; - _noc_period = radsim_config->GetDoubleVectorKnob("noc_clk_period", _network_id); + _noc_period = radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id); _interface_dataw = interface_dataw; _noc_config = noc_config; @@ -31,7 +26,7 @@ aximm_master_adapter::aximm_master_adapter( // Initialize request interface (AR, AW, W) member variables _ejection_afifo_depth = - radsim_config->GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); _ejection_afifos.resize(AXI_NUM_REQ_TYPES); _ejection_afifo_push_counter.init(AXI_NUM_REQ_TYPES); _ejection_afifo_pop_counter.init(AXI_NUM_REQ_TYPES); @@ -50,7 +45,7 @@ aximm_master_adapter::aximm_master_adapter( // Initialize response interface (B, R) member variables _injection_afifo_depth = - radsim_config->GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); _axi_transaction_width = AXI4_USERW; if ((AXI4_ADDRW + AXI4_CTRLW) > (_interface_dataw + AXI4_RESPW + 1)) { _axi_transaction_width += (AXI4_ADDRW + AXI4_CTRLW); @@ -598,9 +593,9 @@ void aximm_master_adapter::InputInjection() { booksim_flit->subnetwork = 0; booksim_flit->src = _node_id; booksim_flit->ctime = GetSimulationCycle( - radsim_config->GetDoubleVectorKnob("noc_clk_period", _network_id)); + radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id)); booksim_flit->itime = GetSimulationCycle( - radsim_config->GetDoubleVectorKnob("noc_clk_period", _network_id)); + radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id)); booksim_flit->cl = 0; booksim_flit->head = _to_be_injected_flit._head; booksim_flit->tail = _to_be_injected_flit._tail; diff --git a/rad-sim/sim/noc/aximm_master_adapter.hpp b/rad-sim/sim/noc/aximm_master_adapter.hpp index dbbe335..aa775e3 100644 --- a/rad-sim/sim/noc/aximm_master_adapter.hpp +++ b/rad-sim/sim/noc/aximm_master_adapter.hpp @@ -12,7 +12,6 @@ #include #include #include -#include //AKB added class aximm_master_adapter : public sc_module { private: @@ -78,9 +77,6 @@ class aximm_master_adapter : public sc_module { sc_flit _to_be_injected_flit; int _last_vc_id; - //AKB ADDED - RADSimConfig* radsim_config; - public: sc_in node_clk; sc_in adapter_clk; @@ -94,9 +90,7 @@ class aximm_master_adapter : public sc_module { bool lookahead_routing, bool wait_for_tail_credit, map *ejected_flits, unsigned int interface_dataw, double node_period, - double adapter_period, - RADSimConfig* radsim_config //AKB added - ); + double adapter_period); ~aximm_master_adapter(); void OutputInterface(); diff --git a/rad-sim/sim/noc/aximm_slave_adapter.cpp b/rad-sim/sim/noc/aximm_slave_adapter.cpp index f9b9c53..82508de 100644 --- a/rad-sim/sim/noc/aximm_slave_adapter.cpp +++ b/rad-sim/sim/noc/aximm_slave_adapter.cpp @@ -7,20 +7,15 @@ aximm_slave_adapter::aximm_slave_adapter( BookSimConfig *noc_config, Network *noc, BufferState *buffer_state, tRoutingFunction routing_func, bool lookahead_routing, bool wait_for_tail_credit, map *ejected_flits, - unsigned int interface_dataw, double node_period, double adapter_period, - RADSimConfig* radsim_config //AKB added - ) + unsigned int interface_dataw, double node_period, double adapter_period) : sc_module(name) { - //AKB ADDED - this->radsim_config = radsim_config; - // Initialize basic adapter member variables _node_id = node_id; _network_id = network_id; _node_period = node_period; _adapter_period = adapter_period; - _noc_period = radsim_config->GetDoubleVectorKnob("noc_clk_period", _network_id); + _noc_period = radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id); _interface_dataw = interface_dataw; _noc_config = noc_config; @@ -33,7 +28,7 @@ aximm_slave_adapter::aximm_slave_adapter( // Initialize request interface (AR, AW, W) member variables _injection_afifo_depth = - radsim_config->GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); _axi_transaction_width = AXI4_USERW; if ((AXI4_ADDRW + AXI4_CTRLW) > (_interface_dataw + AXI4_RESPW + 1)) { @@ -66,7 +61,7 @@ aximm_slave_adapter::aximm_slave_adapter( // Initialize response interface (B, R) member variables _ejected_booksim_flit = nullptr; _ejection_afifo_depth = - radsim_config->GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); _ejection_afifos.resize(AXI_NUM_RSP_TYPES); _ejection_afifo_push_counter.init(AXI_NUM_RSP_TYPES); _ejection_afifo_pop_counter.init(AXI_NUM_RSP_TYPES); @@ -407,9 +402,9 @@ void aximm_slave_adapter::InputInjection() { booksim_flit->subnetwork = 0; booksim_flit->src = _node_id; booksim_flit->ctime = GetSimulationCycle( - radsim_config->GetDoubleVectorKnob("noc_clk_period", _network_id)); + radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id)); booksim_flit->itime = GetSimulationCycle( - radsim_config->GetDoubleVectorKnob("noc_clk_period", _network_id)); + radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id)); booksim_flit->cl = 0; booksim_flit->head = _to_be_injected_flit._head; booksim_flit->tail = _to_be_injected_flit._tail; diff --git a/rad-sim/sim/noc/aximm_slave_adapter.hpp b/rad-sim/sim/noc/aximm_slave_adapter.hpp index dfd9477..56346f9 100644 --- a/rad-sim/sim/noc/aximm_slave_adapter.hpp +++ b/rad-sim/sim/noc/aximm_slave_adapter.hpp @@ -13,7 +13,6 @@ #include #include #include -#include //AKB added /* This class is the SystemC implementation of the AXI Memory Mapped (AXI-MM) * slave NoC adapter. This adapter acts as the access point to the NoC. On one @@ -157,9 +156,6 @@ class aximm_slave_adapter : public sc_module { // waiting for ouptut interface to be ready bool _output_packet_ready; - //AKB ADDED - RADSimConfig* radsim_config; - public: // Clocks and reset sc_in node_clk; @@ -175,9 +171,7 @@ class aximm_slave_adapter : public sc_module { bool lookahead_routing, bool wait_for_tail_credit, map *ejected_flits, unsigned int interface_dataw, double node_period, - double adapter_period, - RADSimConfig* radsim_config //AKB added - ); + double adapter_period); ~aximm_slave_adapter() override; // SystemC Threads implementing stages of input pipeline of the adapter diff --git a/rad-sim/sim/noc/axis_master_adapter.cpp b/rad-sim/sim/noc/axis_master_adapter.cpp index 2d187a9..2ca1551 100644 --- a/rad-sim/sim/noc/axis_master_adapter.cpp +++ b/rad-sim/sim/noc/axis_master_adapter.cpp @@ -6,8 +6,7 @@ axis_master_adapter::axis_master_adapter( std::vector &interface_dataw, BookSimConfig *noc_config, Network *noc, BufferState *buffer_state, tRoutingFunction routing_func, bool lookahead_routing, bool wait_for_tail_credit, - map *ejected_flits, - RADSimConfig* radsim_config) //AKB added + map *ejected_flits) : sc_module(name) { _node_id = node_id; _network_id = network_id; @@ -21,7 +20,7 @@ axis_master_adapter::axis_master_adapter( _num_flits[interface_id] = (int)ceil(payload_dataw * 1.0 / NOC_LINKS_PAYLOAD_WIDTH); } - _num_vcs = radsim_config->GetIntVectorKnob("noc_vcs", _network_id); + _num_vcs = radsim_config.GetIntVectorKnob("noc_vcs", _network_id); axis_interfaces.init(_num_axis_interfaces); _noc_config = noc_config; @@ -34,7 +33,7 @@ axis_master_adapter::axis_master_adapter( _ejected_booksim_flit = nullptr; _ejection_afifo_depth = - radsim_config->GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); _ejection_afifos.resize(_num_vcs); _ejection_afifo_push_counter.init(_num_vcs); _ejection_afifo_pop_counter.init(_num_vcs); @@ -45,7 +44,7 @@ axis_master_adapter::axis_master_adapter( _output_afifos.resize(_num_axis_interfaces); _output_packet_ready.resize(_num_axis_interfaces); _output_afifo_depth = - radsim_config->GetIntVectorKnob("noc_adapters_obuff_size", _network_id); + radsim_config.GetIntVectorKnob("noc_adapters_obuff_size", _network_id); _constructed_packet = sc_packet(); _output_chunk.resize(_num_axis_interfaces); diff --git a/rad-sim/sim/noc/axis_master_adapter.hpp b/rad-sim/sim/noc/axis_master_adapter.hpp index e9c0e09..13b4126 100644 --- a/rad-sim/sim/noc/axis_master_adapter.hpp +++ b/rad-sim/sim/noc/axis_master_adapter.hpp @@ -58,9 +58,7 @@ class axis_master_adapter : public sc_module { BookSimConfig *noc_config, Network *noc, BufferState *buffer_state, tRoutingFunction routing_func, bool lookahead_routing, bool wait_for_tail_credit, - map *ejected_flits, - RADSimConfig* radsim_config //AKB added - ); + map *ejected_flits); ~axis_master_adapter(); void write_sc_packet_to_axis_output(sc_packet &packet, diff --git a/rad-sim/sim/noc/axis_slave_adapter.cpp b/rad-sim/sim/noc/axis_slave_adapter.cpp index e30c944..5a39cee 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.cpp +++ b/rad-sim/sim/noc/axis_slave_adapter.cpp @@ -6,9 +6,7 @@ axis_slave_adapter::axis_slave_adapter( std::vector &interface_dataw, double node_period, double adapter_period, BookSimConfig *noc_config, Network *noc, BufferState *buffer_state, tRoutingFunction routing_func, - bool lookahead_routing, bool wait_for_tail_credit, - RADSimConfig* radsim_config //AKB added - ) + bool lookahead_routing, bool wait_for_tail_credit) : sc_module(name) { axis_interfaces.init(interface_types.size()); @@ -19,7 +17,7 @@ axis_slave_adapter::axis_slave_adapter( _network_id = network_id; _node_period = node_period; _adapter_period = adapter_period; - _noc_period = radsim_config->GetDoubleVectorKnob("noc_clk_period", _network_id); + _noc_period = radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id); _num_axis_interfaces = interface_types.size(); _interface_types = interface_types; _interface_dataw = interface_dataw; @@ -53,7 +51,7 @@ axis_slave_adapter::axis_slave_adapter( _input_axis_transactions_afifo_depth = 2; _injection_afifo_depth = - radsim_config->GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); _injection_flit_ready = false; SC_METHOD(InputReady); diff --git a/rad-sim/sim/noc/axis_slave_adapter.hpp b/rad-sim/sim/noc/axis_slave_adapter.hpp index d5d03f6..50bfcb9 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.hpp +++ b/rad-sim/sim/noc/axis_slave_adapter.hpp @@ -69,9 +69,7 @@ class axis_slave_adapter : public sc_module { double node_period, double adapter_period, BookSimConfig *noc_config, Network *noc, BufferState *buffer_state, tRoutingFunction routing_func, - bool lookahead_routing, bool wait_for_tail_credit, - RADSimConfig* radsim_config //AKB added - ); + bool lookahead_routing, bool wait_for_tail_credit); ~axis_slave_adapter(); int GetInputDestinationNode(const sc_bv axis_transaction_dest); diff --git a/rad-sim/sim/noc/radsim_noc.cpp b/rad-sim/sim/noc/radsim_noc.cpp index 9fcee56..3f1dc55 100644 --- a/rad-sim/sim/noc/radsim_noc.cpp +++ b/rad-sim/sim/noc/radsim_noc.cpp @@ -1,8 +1,6 @@ #include //AKB: moved to header file #include -//AKB replaced all radsim_config. with radsim_design->radsim_config-> - radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::string portal_slave_name, int noc_id, std::vector &adapter_clks, std::vector &module_clks, @@ -15,11 +13,11 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str _rad_id = rad_id; _portal_slave_name = portal_slave_name; _noc_id = noc_id; - _num_noc_nodes = radsim_design->radsim_config->GetIntVectorKnob("noc_num_nodes", _noc_id); + _num_noc_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", _noc_id); // Parse config file, initialize routing data structures and create Booksim // NoC - std::string config_filename = radsim_design->radsim_config->GetStringKnob("radsim_root_dir") + + std::string config_filename = radsim_config.GetStringKnob("radsim_root_dir") + "/sim/noc/noc" + std::to_string(noc_id) + "_config"; _config.ParseFile(config_filename); @@ -84,9 +82,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str &_config, _booksim_noc, _buffer_state[axis_master_adapter_info[adapter_id]._node_id], _routing_func, _lookahead_routing, _wait_for_tail_credit, - _ejected_flits, - radsim_design->radsim_config //AKB added - ); + _ejected_flits); // Connect adapter ports and register NoC port in design context master_adapter->noc_clk(noc_clk); @@ -127,9 +123,9 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str for (auto it = axis_slave_adapter_info[adapter_id]._port_types.begin(); it != axis_slave_adapter_info[adapter_id]._port_types.end(); it++) adapter_port_types.push_back(static_cast(*it)); - double adapter_module_period = radsim_design->radsim_config->GetDoubleVectorKnob( + double adapter_module_period = radsim_config.GetDoubleVectorKnob( "design_clk_periods", axis_slave_adapter_info[adapter_id]._module_clk_idx); - double adapter_period = radsim_design->radsim_config->GetDoubleVectorKnob( + double adapter_period = radsim_config.GetDoubleVectorKnob( "noc_adapters_clk_period", axis_slave_adapter_info[adapter_id]._adapter_clk_idx); // Create adapter @@ -138,9 +134,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str adapter_port_types, axis_slave_adapter_info[adapter_id]._port_dataw, adapter_module_period, adapter_period, &_config, _booksim_noc, _buffer_state[axis_slave_adapter_info[adapter_id]._node_id], - _routing_func, _lookahead_routing, _wait_for_tail_credit, - radsim_design->radsim_config //AKB added - ); + _routing_func, _lookahead_routing, _wait_for_tail_credit); // Connect adapter ports and register NoC port in design context slave_adapter->noc_clk(noc_clk); @@ -173,9 +167,9 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str std::string adapter_name_str = "aximm_master_adapter_" + std::to_string(adapter_id); const char *adapter_name = adapter_name_str.c_str(); - double adapter_module_period = radsim_design->radsim_config->GetDoubleVectorKnob( + double adapter_module_period = radsim_config.GetDoubleVectorKnob( "design_clk_periods", aximm_master_adapter_info[adapter_id]._module_clk_idx); - double adapter_period = radsim_design->radsim_config->GetDoubleVectorKnob( + double adapter_period = radsim_config.GetDoubleVectorKnob( "noc_adapters_clk_period", aximm_master_adapter_info[adapter_id]._adapter_clk_idx); @@ -186,9 +180,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str _buffer_state[aximm_master_adapter_info[adapter_id]._node_id], _routing_func, _lookahead_routing, _wait_for_tail_credit, _ejected_flits, aximm_master_adapter_info[adapter_id]._port_dataw[0], - adapter_module_period, adapter_period, - radsim_design->radsim_config //AKB added - ); + adapter_module_period, adapter_period); // Connect adapter ports and register NoC port in design context master_adapter->noc_clk(noc_clk); @@ -218,9 +210,9 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str std::string adapter_name_str = "aximm_slave_adapter_" + std::to_string(adapter_id); const char *adapter_name = adapter_name_str.c_str(); - double adapter_module_period = radsim_design->radsim_config->GetDoubleVectorKnob( + double adapter_module_period = radsim_config.GetDoubleVectorKnob( "design_clk_periods", aximm_slave_adapter_info[adapter_id]._module_clk_idx); - double adapter_period = radsim_design->radsim_config->GetDoubleVectorKnob( + double adapter_period = radsim_config.GetDoubleVectorKnob( "noc_adapters_clk_period", aximm_slave_adapter_info[adapter_id]._adapter_clk_idx); @@ -231,9 +223,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str _buffer_state[aximm_slave_adapter_info[adapter_id]._node_id], _routing_func, _lookahead_routing, _wait_for_tail_credit, _ejected_flits, aximm_slave_adapter_info[adapter_id]._port_dataw[0], - adapter_module_period, adapter_period, - radsim_design->radsim_config //AKB added - ); + adapter_module_period, adapter_period); // Connect adapter ports and register NoC port in design context slave_adapter->noc_clk(noc_clk); diff --git a/rad-sim/sim/radsim_config.cpp b/rad-sim/sim/radsim_config.cpp index ce7ce6a..f0e5bb1 100644 --- a/rad-sim/sim/radsim_config.cpp +++ b/rad-sim/sim/radsim_config.cpp @@ -1,7 +1,5 @@ #include "radsim_config.hpp" -//AKB: replaced all radsim_config. with this-> - RADSimConfig::RADSimConfig() {} RADSimConfig::~RADSimConfig() {} @@ -162,8 +160,7 @@ bool RADSimConfig::HasStringVectorKnob(const std::string &key) { } // Parse RADSim knobs from file into RADSimConfig data structures -//void ParseRADSimKnobs(const std::string &knobs_filename) { -void RADSimConfig::ParseRADSimKnobs(const std::string &knobs_filename) { +void ParseRADSimKnobs(const std::string &knobs_filename) { std::ifstream knobs_file(knobs_filename); std::string line; @@ -184,13 +181,13 @@ void RADSimConfig::ParseRADSimKnobs(const std::string &knobs_filename) { (param == "design_name")) { std::string value; std::getline(ss, value, ' '); - this->AddStringKnob(param, value); + radsim_config.AddStringKnob(param, value); } else if ((param == "noc_num_nocs") || (param == "telemetry_log_verbosity") || (param == "dram_num_controllers")) { std::string value_str; std::getline(ss, value_str, ' '); int value = std::stoi(value_str); - this->AddIntKnob(param, value); + radsim_config.AddIntKnob(param, value); } else if ((param == "noc_payload_width") || (param == "noc_vcs") || (param == "noc_num_nodes") || (param == "noc_adapters_fifo_size") || (param == "noc_adapters_obuff_size") || @@ -202,7 +199,7 @@ void RADSimConfig::ParseRADSimKnobs(const std::string &knobs_filename) { value_element = std::stoi(value_element_str); value.push_back(value_element); } - this->AddIntVectorKnob(param, value); + radsim_config.AddIntVectorKnob(param, value); } else if ((param == "sim_driver_period")) { std::string value_element_str; std::getline(ss, value_element_str, ' '); @@ -210,7 +207,7 @@ void RADSimConfig::ParseRADSimKnobs(const std::string &knobs_filename) { if (value > max_period) { max_period = value; } - this->AddDoubleKnob(param, value); + radsim_config.AddDoubleKnob(param, value); } else if ((param == "noc_clk_period") || (param == "noc_adapters_clk_period") || (param == "design_clk_periods") || (param == "dram_clk_periods")) { @@ -224,7 +221,7 @@ void RADSimConfig::ParseRADSimKnobs(const std::string &knobs_filename) { } value.push_back(value_element); } - this->AddDoubleVectorKnob(param, value); + radsim_config.AddDoubleVectorKnob(param, value); } else if ((param == "design_noc_placement") || (param == "noc_adapters_in_arbiter") || (param == "noc_adapters_out_arbiter") || @@ -235,14 +232,14 @@ void RADSimConfig::ParseRADSimKnobs(const std::string &knobs_filename) { while (getline(ss, value_element, ' ')) { value.push_back(value_element); } - this->AddStringVectorKnob(param, value); + radsim_config.AddStringVectorKnob(param, value); if (param == "telemetry_traces") { - this->AddIntKnob("telemetry_num_traces", value.size()); + radsim_config.AddIntKnob("telemetry_num_traces", value.size()); } } else { std::cerr << "Undefined RADSim knob \"" << param << "\"" << std::endl; exit(1); } } - this->AddDoubleKnob("max_period", max_period); + radsim_config.AddDoubleKnob("max_period", max_period); } \ No newline at end of file diff --git a/rad-sim/sim/radsim_config.hpp b/rad-sim/sim/radsim_config.hpp index 6117426..55038fa 100644 --- a/rad-sim/sim/radsim_config.hpp +++ b/rad-sim/sim/radsim_config.hpp @@ -6,7 +6,7 @@ #include #include #include -//#include +#include // Class for storing all RADSim configuration knobs class RADSimConfig { @@ -42,9 +42,8 @@ class RADSimConfig { bool HasIntVectorKnob(const std::string& key); bool HasDoubleVectorKnob(const std::string& key); bool HasStringVectorKnob(const std::string& key); - void ParseRADSimKnobs(const std::string& knobs_filename); }; -//void ParseRADSimKnobs(const std::string& knobs_filename); //AKB: turned into a member function so can act on same object +void ParseRADSimKnobs(const std::string& knobs_filename); -//extern RADSimConfig radsim_config; //AKB: commented out \ No newline at end of file +extern RADSimConfig radsim_config; \ No newline at end of file diff --git a/rad-sim/sim/radsim_telemetry.cpp b/rad-sim/sim/radsim_telemetry.cpp index 84c0f79..b529d67 100644 --- a/rad-sim/sim/radsim_telemetry.cpp +++ b/rad-sim/sim/radsim_telemetry.cpp @@ -64,13 +64,13 @@ void NoCTransactionTelemetry::DumpStatsToFile(const std::string& filename) { } std::vector NoCTransactionTelemetry::DumpTrafficFlows(const std::string& filename, unsigned int cycle_count, - std::vector>>& node_module_names, RADSimConfig* radsim_config) { //AKB added last arg - double sim_driver_period = radsim_config->GetDoubleKnob("sim_driver_period") / 1000000000.0; - unsigned int num_nocs = radsim_config->GetIntKnob("noc_num_nocs"); + std::vector>>& node_module_names) { + double sim_driver_period = radsim_config.GetDoubleKnob("sim_driver_period") / 1000000000.0; + unsigned int num_nocs = radsim_config.GetIntKnob("noc_num_nocs"); std::vector>> traffic_bits(num_nocs); std::vector>> traffic_num_hops(num_nocs); for (unsigned int noc_id = 0; noc_id < num_nocs; noc_id++) { - unsigned int num_nodes = radsim_config->GetIntVectorKnob("noc_num_nodes", noc_id); + unsigned int num_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", noc_id); traffic_bits[noc_id].resize(num_nodes); traffic_num_hops[noc_id].resize(num_nodes); } @@ -90,7 +90,7 @@ std::vector NoCTransactionTelemetry::DumpTrafficFlows(const std::string& double aggregate_bandwidth = 0.0; std::ofstream traffic_file(filename + "_noc" + std::to_string(noc_id) + ".xml", std::ofstream::out); traffic_file << "" << endl; - unsigned int num_nodes = radsim_config->GetIntVectorKnob("noc_num_nodes", noc_id); + unsigned int num_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", noc_id); for (unsigned int src_id = 0; src_id < num_nodes; src_id++) { if (traffic_bits[noc_id][src_id].size() > 0) { for (auto& flow : traffic_bits[noc_id][src_id]) { @@ -123,15 +123,13 @@ void NoCFlitTelemetry::DumpNoCFlitTracesToFile(const std::string& filename) { ofile.close(); } -SimLog::SimLog(RADSimConfig* radsim_config) { //AKB added arg +SimLog::SimLog() { verbosity = 0; - this->radsim_config = radsim_config; //AKB added } -SimLog::SimLog(unsigned int verbosity_level, std::string log_filename, RADSimConfig* radsim_config) { //AKB added last arg +SimLog::SimLog(unsigned int verbosity_level, std::string log_filename) { verbosity = verbosity_level; log_file.open(log_filename); - this->radsim_config = radsim_config; //AKB added } SimLog::~SimLog() { log_file.close(); } @@ -159,12 +157,12 @@ void SimLog::log(info_t, std::string msg, sc_module_name module, bool log_to_fil } } -void SimLog::log(trace_t, std::string msg, sc_module_name module, bool log_to_file) { +void SimLog::log(trace_t, std::string msg, sc_module_name module, bool log_to_file) { if (verbosity >= 2) { - std::cout << "\033[36m[TRACE] " << module << " @ " << GetSimulationCycle(this->radsim_config) << ": " << msg << "\033[0m" + std::cout << "\033[36m[TRACE] " << module << " @ " << GetSimulationCycle() << ": " << msg << "\033[0m" << std::endl; if (log_to_file) { - log_file << "[TRACE] " << module << " @ " << GetSimulationCycle(this->radsim_config) << ": " << msg << std::endl; + log_file << "[TRACE] " << module << " @ " << GetSimulationCycle() << ": " << msg << std::endl; } } } @@ -211,8 +209,8 @@ void SimTraceRecording::SetTraceRecordingSettings(std::string filename, unsigned trace_cycles.resize(num_traces_monitored); } -void SimTraceRecording::record_event(unsigned int trace_id, RADSimConfig* radsim_config) { //AKB added arg - trace_cycles[trace_id].push_back(GetSimulationCycle(radsim_config)); +void SimTraceRecording::record_event(unsigned int trace_id) { + trace_cycles[trace_id].push_back(GetSimulationCycle()); } void SimTraceRecording::dump_traces() { diff --git a/rad-sim/sim/radsim_telemetry.hpp b/rad-sim/sim/radsim_telemetry.hpp index f04ee56..539a975 100644 --- a/rad-sim/sim/radsim_telemetry.hpp +++ b/rad-sim/sim/radsim_telemetry.hpp @@ -58,7 +58,7 @@ class NoCTransactionTelemetry { static void UpdateHops(int id, int num_hops); static void DumpStatsToFile(const std::string& filename); static std::vector DumpTrafficFlows(const std::string& filename, unsigned int cycle_count, - std::vector>>& node_module_names, RADSimConfig* radsim_config); //AKB added last arg + std::vector>>& node_module_names); }; // Class for recording and storing flit traces @@ -88,12 +88,10 @@ class SimLog { private: unsigned int verbosity; std::ofstream log_file; - //AKB added - RADSimConfig* radsim_config; public: - SimLog(RADSimConfig* radsim_config); //AKB added arg - SimLog(unsigned int verbosity_level, std::string log_filename, RADSimConfig* radsim_config); //AKB added last arg + SimLog(); + SimLog(unsigned int verbosity_level, std::string log_filename); ~SimLog(); void SetLogSettings(unsigned int verbosity_level, std::string log_filename); void log(debug_t, std::string msg, sc_module_name module = "", bool log_to_file = true); @@ -115,7 +113,7 @@ class SimTraceRecording { SimTraceRecording(std::string filename, unsigned int num_traces); ~SimTraceRecording(); void SetTraceRecordingSettings(std::string filename, unsigned int num_traces); - void record_event(unsigned int trace_id, RADSimConfig* radsim_config); //AKB added last arg + void record_event(unsigned int trace_id); void dump_traces(); }; diff --git a/rad-sim/sim/radsim_utils.cpp b/rad-sim/sim/radsim_utils.cpp index 9ca6642..ef265ee 100644 --- a/rad-sim/sim/radsim_utils.cpp +++ b/rad-sim/sim/radsim_utils.cpp @@ -6,7 +6,7 @@ int GetSimulationCycle(double period) { return cycle; } -int GetSimulationCycle(RADSimConfig* radsim_config) { //AKB added argument +int GetSimulationCycle() { double period = radsim_config.GetDoubleKnob("max_period"); sc_time t = sc_time_stamp(); int cycle = (int)ceil(t.value() / period / 1000); diff --git a/rad-sim/sim/radsim_utils.hpp b/rad-sim/sim/radsim_utils.hpp index b36b68a..32e11bc 100644 --- a/rad-sim/sim/radsim_utils.hpp +++ b/rad-sim/sim/radsim_utils.hpp @@ -18,7 +18,7 @@ struct AdapterInfo { // Returns the current simulation cycle number given a certain clock period int GetSimulationCycle(double period); -int GetSimulationCycle(RADSimConfig* radsim_config); //AKB added argument +int GetSimulationCycle(); // Returns the current simulation cycle number given the NoC clock period // int GetSimTime(); From 76157b539f37c184e247561469e372a98b368844 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 6 May 2024 15:35:30 -0400 Subject: [PATCH 061/127] In-progress: per-rad knob functions --- rad-sim/sim/radsim_config.cpp | 63 +++++++++++++++++++++++++------ rad-sim/sim/radsim_config.hpp | 70 ++++++++++++++++++++++++----------- 2 files changed, 100 insertions(+), 33 deletions(-) diff --git a/rad-sim/sim/radsim_config.cpp b/rad-sim/sim/radsim_config.cpp index f0e5bb1..84a381f 100644 --- a/rad-sim/sim/radsim_config.cpp +++ b/rad-sim/sim/radsim_config.cpp @@ -3,37 +3,76 @@ RADSimConfig::RADSimConfig() {} RADSimConfig::~RADSimConfig() {} +// template +// void insert_with_resize(std::vector<> ) { + +// } + // Adds a new integer configuration knob -void RADSimConfig::AddIntKnob(const std::string &key, int val) { - _int_knobs[key] = val; +void RADSimConfig::AddIntKnobShared(const std::string &key, int val) { + _int_knobs_shared[key] = val; } // Adds a new double configuration knob -void RADSimConfig::AddDoubleKnob(const std::string &key, double val) { - _double_knobs[key] = val; +void RADSimConfig::AddDoubleKnobShared(const std::string &key, double val) { + _double_knobs_shared[key] = val; } // Adds a new string configuration knob -void RADSimConfig::AddStringKnob(const std::string &key, std::string &val) { - _string_knobs[key] = val; +void RADSimConfig::AddStringKnobShared(const std::string &key, std::string &val) { + _string_knobs_shared[key] = val; } // Adds a new integer vector configuration knob -void RADSimConfig::AddIntVectorKnob(const std::string &key, +void RADSimConfig::AddIntVectorKnobShared(const std::string &key, std::vector &val) { - _int_vector_knobs[key] = val; + _int_vector_knobs_shared[key] = val; } // Adds a new double vector configuration knob -void RADSimConfig::AddDoubleVectorKnob(const std::string &key, +void RADSimConfig::AddDoubleVectorKnobShared(const std::string &key, std::vector &val) { - _double_vector_knobs[key] = val; + _double_vector_knobs_shared[key] = val; } // Adds a new string vector configuration knob -void RADSimConfig::AddStringVectorKnob(const std::string &key, +void RADSimConfig::AddStringVectorKnobShared(const std::string &key, std::vector &val) { - _string_vector_knobs[key] = val; + _string_vector_knobs_shared[key] = val; +} + +//RAD-specific functions +// Adds a new integer configuration knob +void RADSimConfig::AddIntKnobPerRad(const std::string &key, int val, int rad_id) { + _int_knobs_per_rad[key] = val; +} + +// Adds a new double configuration knob +void RADSimConfig::AddDoubleKnobPerRad(const std::string &key, double val, int rad_id) { + _double_knobs_per_rad[key] = val; +} + +// Adds a new string configuration knob +void RADSimConfig::AddStringKnobPerRad(const std::string &key, std::string &val, int rad_id) { + _string_knobs_per_rad[key] = val; +} + +// Adds a new integer vector configuration knob +void RADSimConfig::AddIntVectorKnobPerRad(const std::string &key, + std::vector &val, int rad_id) { + _int_vector_knobs_per_rad[key] = val; +} + +// Adds a new double vector configuration knob +void RADSimConfig::AddDoubleVectorKnobPerRad(const std::string &key, + std::vector &val, int rad_id) { + _double_vector_knobs_per_rad[key] = val; +} + +// Adds a new string vector configuration knob +void RADSimConfig::AddStringVectorKnobPerRad(const std::string &key, + std::vector &val, int rad_id) { + _string_vector_knobs_per_rad[key] = val; } // Gets the value of an integer configuration knob diff --git a/rad-sim/sim/radsim_config.hpp b/rad-sim/sim/radsim_config.hpp index 55038fa..e17cc23 100644 --- a/rad-sim/sim/radsim_config.hpp +++ b/rad-sim/sim/radsim_config.hpp @@ -12,30 +12,58 @@ class RADSimConfig { public: // Simulation configuration parameters are stored in pairs of knob name and value - std::unordered_map _int_knobs; - std::unordered_map _double_knobs; - std::unordered_map _string_knobs; - std::unordered_map> _int_vector_knobs; - std::unordered_map> _double_vector_knobs; - std::unordered_map> _string_vector_knobs; + //AKB: appended _shared to names + std::unordered_map _int_knobs_shared; + std::unordered_map _double_knobs_shared; + std::unordered_map _string_knobs_shared; + std::unordered_map> _int_vector_knobs_shared; + std::unordered_map> _double_vector_knobs_shared; + std::unordered_map> _string_vector_knobs_shared; + + //AKB: for rad-specific parameters + std::vector> _int_knobs_per_rad; + std::vector> _double_knobs_per_rad; + std::vector> _string_knobs_per_rad; + std::vector>> _int_vector_knobs_per_rad; + std::vector>> _double_vector_knobs_per_rad; + std::vector>> _string_vector_knobs_per_rad; RADSimConfig(); ~RADSimConfig(); - void AddIntKnob(const std::string& key, int val); - void AddDoubleKnob(const std::string& key, double val); - void AddStringKnob(const std::string& key, std::string& val); - void AddIntVectorKnob(const std::string& key, std::vector& val); - void AddDoubleVectorKnob(const std::string& key, std::vector& val); - void AddStringVectorKnob(const std::string& key, std::vector& val); - int GetIntKnob(const std::string& key); - double GetDoubleKnob(const std::string& key); - std::string GetStringKnob(const std::string& key); - int GetIntVectorKnob(const std::string& key, unsigned int idx); - double GetDoubleVectorKnob(const std::string& key, unsigned int idx); - std::string GetStringVectorKnob(const std::string& key, unsigned int idx); - std::vector& GetIntVectorKnob(const std::string& key); - std::vector& GetDoubleVectorKnob(const std::string& key); - std::vector& GetStringVectorKnob(const std::string& key); + //AKB: changed to be general parameters aka shared across all RADs + void AddIntKnobShared(const std::string& key, int val); + void AddDoubleKnobShared(const std::string& key, double val); + void AddStringKnobShared(const std::string& key, std::string& val); + void AddIntVectorKnobShared(const std::string& key, std::vector& val); + void AddDoubleVectorKnobShared(const std::string& key, std::vector& val); + void AddStringVectorKnobShared(const std::string& key, std::vector& val); + //AKB: rad-specific parameters + void AddIntKnobPerRad(const std::string& key, int val, int rad_id); + void AddDoubleKnobPerRad(const std::string& key, double val, int rad_id); + void AddStringKnobPerRad(const std::string& key, std::string& val, int rad_id); + void AddIntVectorKnobPerRad(const std::string& key, std::vector& val, int rad_id); + void AddDoubleVectorKnobPerRad(const std::string& key, std::vector& val, int rad_id); + void AddStringVectorKnobPerRad(const std::string& key, std::vector& val, int rad_id); + //AKB: changed to be parameters shared across all RADs + int GetIntKnobShared(const std::string& key); + double GetDoubleKnobShared(const std::string& key); + std::string GetStringKnobShared(const std::string& key); + int GetIntVectorKnobShared(const std::string& key, unsigned int idx); + double GetDoubleVectorKnobShared(const std::string& key, unsigned int idx); + std::string GetStringVectorKnobShared(const std::string& key, unsigned int idx); + std::vector& GetIntVectorKnobShared(const std::string& key); + std::vector& GetDoubleVectorKnobShared(const std::string& key); + std::vector& GetStringVectorKnobShared(const std::string& key); + //AKB: rad-specific parameters + int GetIntKnobPerRad(const std::string& key, int rad_id); + double GetDoubleKnobPerRad(const std::string& key, int rad_id); + std::string GetStringKnobPerRad(const std::string& key, int rad_id); + int GetIntVectorKnobPerRad(const std::string& key, unsigned int idx, int rad_id); + double GetDoubleVectorKnobPerRad(const std::string& key, unsigned int idx, int rad_id); + std::string GetStringVectorKnobPerRad(const std::string& key, unsigned int idx, int rad_id); + std::vector& GetIntVectorKnobPerRad(const std::string& key, int rad_id); + std::vector& GetDoubleVectorKnobPerRad(const std::string& key, int rad_id); + std::vector& GetStringVectorKnobPerRad(const std::string& key, int rad_id); bool HasIntKnob(const std::string& key); bool HasDoubleKnob(const std::string& key); bool HasStringKnob(const std::string& key); From 56fa1db6a9d72dabd975261f5f158b98c58c53a8 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 8 May 2024 01:51:51 -0400 Subject: [PATCH 062/127] Debug of NoC dropping packets from portal on DLRM example, marked todos --- rad-sim/example-designs/dlrm/compiler/dlrm.py | 4 +- rad-sim/example-designs/dlrm/dlrm_driver.cpp | 14 +++++ .../modules/custom_feature_interaction.cpp | 7 ++- rad-sim/example-designs/dlrm/modules/mvm.cpp | 4 +- .../example-designs/dlrm/modules/portal.cpp | 54 ++++++++++++++----- .../example-designs/dlrm/modules/portal.hpp | 7 ++- rad-sim/sim/radsim_inter_rad.cpp | 10 +++- rad-sim/sim/radsim_inter_rad.hpp | 3 +- 8 files changed, 81 insertions(+), 22 deletions(-) diff --git a/rad-sim/example-designs/dlrm/compiler/dlrm.py b/rad-sim/example-designs/dlrm/compiler/dlrm.py index dfeeb12..814ec77 100644 --- a/rad-sim/example-designs/dlrm/compiler/dlrm.py +++ b/rad-sim/example-designs/dlrm/compiler/dlrm.py @@ -19,13 +19,13 @@ native_dim = 32 # int(read_bytewidth / element_bytewidth) num_layers = 3 hidden_dims = [1024, 512, 256] -num_mvms = [4, 2, 2] +num_mvms = [4, 2, 2] #TODO: make all 1 for simplicity hard_mvms = False # Model parsing table_info = [] smallest_table_bytewidth = 8 -input_dim = 0 +input_dim = 0 #TODO: change to 32 # Memory allocation hbm_channels_used_words = np.zeros(hbm_channels, dtype=int) diff --git a/rad-sim/example-designs/dlrm/dlrm_driver.cpp b/rad-sim/example-designs/dlrm/dlrm_driver.cpp index 483ad84..d3682f8 100644 --- a/rad-sim/example-designs/dlrm/dlrm_driver.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_driver.cpp @@ -181,6 +181,20 @@ void dlrm_driver::sink() { std::cout << "]\n"; std::cout << "-------------------------------\n"; } + else { + std::cout << "Output " << outputs_count << " on rad " << radsim_design->rad_id << " does match :)\n"; + std::cout << "TRUE: [ "; + for (unsigned int e = 0; e < _mlp_outputs[outputs_count].size(); e++) { + std::cout << _mlp_outputs[outputs_count][e] << " "; + } + std::cout << "]\n"; + std::cout << "DUT : [ "; + for (unsigned int e = 0; e < dut_output.size(); e++) { + std::cout << dut_output[e] << " "; + } + std::cout << "]\n"; + std::cout << "-------------------------------\n"; + } outputs_count++; all_outputs_matching &= matching; diff --git a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp index 3f3d18c..819810f 100644 --- a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp +++ b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp @@ -52,7 +52,7 @@ custom_feature_interaction::custom_feature_interaction( _num_mem_channels = num_mem_channels; _dataw = dataw; _bitwidth = element_bitwidth; - _num_input_elements = dataw / element_bitwidth; + _num_input_elements = dataw / element_bitwidth; //512/16=32 _num_output_elements = DATAW / element_bitwidth; _num_output_channels = num_output_channels; @@ -239,12 +239,15 @@ void custom_feature_interaction::Tick() { for (unsigned int ch_id = 0; ch_id < _num_output_channels; ch_id++) { if (axis_interface[ch_id].tready.read() && axis_interface[ch_id].tvalid.read()) { + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + data_vector tx_tdata = _output_fifos[ch_id].front(); + //std::cout << "custom_feature_interaction @ cycle " << curr_cycle << ": tx_tdata sent " << tx_tdata << " from RAD " << radsim_design->rad_id << " with tdest field " << axis_interface[ch_id].tdest.read() << std::endl; _output_fifos[ch_id].pop(); } if ( (!_output_fifos[ch_id].empty()) ) { //&& (radsim_design->rad_id == 0) ) { data_vector tx_tdata = _output_fifos[ch_id].front(); - //std::cout << "tx_tdata " << tx_tdata << " on RAD " << radsim_design->rad_id << std::endl; + //std::cout << "custom_feature_interaction: tx_tdata sent " << tx_tdata << " from RAD " << radsim_design->rad_id << std::endl; sc_bv tx_tdata_bv; data_vector_to_bv(tx_tdata, tx_tdata_bv, _num_output_elements); axis_interface[ch_id].tvalid.write(true); diff --git a/rad-sim/example-designs/dlrm/modules/mvm.cpp b/rad-sim/example-designs/dlrm/modules/mvm.cpp index 60bf54e..b14a80a 100644 --- a/rad-sim/example-designs/dlrm/modules/mvm.cpp +++ b/rad-sim/example-designs/dlrm/modules/mvm.cpp @@ -324,8 +324,8 @@ void mvm::Tick() { tdatavector[e] = tdata.range(end_idx - 1, start_idx).to_int(); } if (layer_id == 0) std::cout << "got tdatavector on rad " << radsim_design->rad_id << ": " << tdatavector << std::endl; - sc_bv<7> testing_width = "1000110"; - std::cout << "testing_width.to_uint64(): " << testing_width.to_uint64() << std::endl; + // sc_bv<7> testing_width = "1000110"; + // std::cout << "testing_width.to_uint64(): " << testing_width.to_uint64() << std::endl; if (rx_input_interface.tuser.read().range(15, 13).to_uint() == 1) { unsigned int waddr = rx_input_interface.tuser.read().range(8, 0).to_uint(); diff --git a/rad-sim/example-designs/dlrm/modules/portal.cpp b/rad-sim/example-designs/dlrm/modules/portal.cpp index d4612e3..c84dc2d 100644 --- a/rad-sim/example-designs/dlrm/modules/portal.cpp +++ b/rad-sim/example-designs/dlrm/modules/portal.cpp @@ -7,7 +7,7 @@ portal::portal(const sc_module_name &name, RADSimDesignContext* radsim_design) //combinational logic SC_METHOD(Assign); - sensitive << rst; + sensitive << rst << axis_portal_master_interface.tready; //sequential logic SC_CTHREAD(Tick, clk.pos()); // This function must be defined & called for any RAD-Sim module to register @@ -25,12 +25,25 @@ void portal::Assign() { //combinational logic axis_portal_slave_interface.tready.write(false); } else { - // Always ready to accept the transaction - portal_axis_slave.tready.write(true); - axis_portal_slave_interface.tready.write(true); + // Always ready to accept the transaction -- nvm, should make sure NoC is ready because no FIFO buffer in this direction + portal_axis_slave.tready.write(axis_portal_master_interface.tready.read()); //true); //Accepting data from inter-rad and sending into NoC without FIFO + axis_portal_slave_interface.tready.write(true); //Always ready to accept from NoC because we have FIFO buffer in this direction } } +void bv_to_data_vector( + sc_bv &bitvector, data_vector &datavector, + unsigned int num_elements) { + + unsigned int start_idx, end_idx; + unsigned int _bitwidth = 16; //AKB: extra added + for (unsigned int e = 0; e < num_elements; e++) { + start_idx = e * _bitwidth; + end_idx = (e + 1) * _bitwidth; + datavector[e] = bitvector.range(end_idx - 1, start_idx).to_int(); + } +} + int counter = 0; sc_bv data_to_buffer = 0; sc_bv dest_device = 1; //for testing, fixed at 1 to send to RAD1 which has mult design; //#define AXIS_USERW 66 @@ -45,6 +58,7 @@ void portal::Tick() { //sequential logic int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + //Accepting incoming NoC transaction if (axis_portal_slave_interface.tvalid.read() && axis_portal_slave_interface.tready.read()) { //std::cout << "Also got here" << std:: endl; @@ -70,14 +84,21 @@ void portal::Tick() { //sequential logic portal_axis_fifo.push(curr_transaction); } + //Sending outgoing inter-rad data //warning: must do this before next if-else block so that we pop before reading front. otherwise we get outtdated value on second turn. //we see valid as high the clock cycle AFTER we set it as high in the if-else below if (portal_axis_master.tvalid.read() && portal_axis_master.tready.read()) { // && test_ready_toggle) { //pop out of fifo if (!portal_axis_fifo.empty()) { //test_ready_toggle = false; + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + sc_bv tx_tdata_bv = portal_axis_fifo.front().tdata; + data_vector tx_tdata(32); + bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); + std::cout << "portal @ cycle " << curr_cycle << ": recieved " << tx_tdata << " on RAD " << radsim_design->rad_id << std::endl; + portal_axis_fifo.pop(); - //std::cout << "portal.cpp in dlrm design sent " << portal_axis_master.tdata.read().to_int64() << " to dest_device " << dest_device.to_int64() << " on cycle " << curr_cycle << std::endl; + //std::cout << "portal.cpp in dlrm design sent " << portal_axis_master.tdata.read().to_uint64() << " to dest_device " << dest_device.to_uint64() << " on cycle " << curr_cycle << std::endl; //portal_recvd.write(1); if (portal_axis_master.tlast.read()) { std::cout << "dlrm design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; @@ -113,17 +134,21 @@ void portal::Tick() { //sequential logic test_ready_toggle = true; }*/ - // Receiving transaction from AXI-S interface - if (portal_axis_slave.tvalid.read() && - portal_axis_slave.tready.read()) { + //Accepting incoming inter-rad data and then sending to correct module on RAD over NoC + if (portal_axis_slave.tvalid.read() && //tvalid is written by inter-rad module + portal_axis_slave.tready.read()) { //tready is written by this portal module //get current cycle int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //read - // std::cout << module_name << ": Portal Module Got Transaction on cycle " << curr_cycle << " (RAD ID) = " - // << radsim_design->rad_id //<< portal_axis_slave.tuser.read().to_uint64() - // << ") (val = " - // << portal_axis_slave.tdata.read().to_uint64() << ")!" - // << std::endl; + sc_bv rx_tdata_bv = portal_axis_slave.tdata.read(); + data_vector rx_tdata(32); + bv_to_data_vector(rx_tdata_bv, rx_tdata, 32); + std::cout << module_name << ": Portal Module Got Transaction on cycle " << curr_cycle << " (RAD ID) = " + << radsim_design->rad_id //<< portal_axis_slave.tuser.read().to_uint64() + << ") (val = " //<< portal_axis_slave.tdata.read().to_uint64() << ")!" + << rx_tdata << ") with tdest field of " + << portal_axis_slave.tdest.read() << "!" + << std::endl; //write the addend into the mult module and that will flag when received all values and can end simulation std::string src_port_name = module_name + ".axis_portal_master_interface"; uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref @@ -147,6 +172,9 @@ void portal::Tick() { //sequential logic } else { axis_portal_master_interface.tvalid.write(false); + std::cout << "portal_axis_slave.tvalid.read(): " << portal_axis_slave.tvalid.read() + << " portal_axis_slave.tready.read() " << portal_axis_slave.tready.read() + << " axis_portal_master_interface.tready.read() " << axis_portal_master_interface.tready.read() << std::endl; } wait(); diff --git a/rad-sim/example-designs/dlrm/modules/portal.hpp b/rad-sim/example-designs/dlrm/modules/portal.hpp index e3187df..6c50fd2 100644 --- a/rad-sim/example-designs/dlrm/modules/portal.hpp +++ b/rad-sim/example-designs/dlrm/modules/portal.hpp @@ -10,6 +10,7 @@ #include #include #include +#include //AKB: added for data_vector template class struct portal_axis_fields { bool tvalid; @@ -47,4 +48,8 @@ class portal : public RADSimModule { void Tick(); // Sequential logic process SC_HAS_PROCESS(portal); void RegisterModuleInfo(); //even tho did not add AXI Interface, need because is virtual fn in derived class -}; \ No newline at end of file +}; + +void bv_to_data_vector( + sc_bv &bitvector, data_vector &datavector, + unsigned int num_elements); \ No newline at end of file diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index cbb6ab6..863899d 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -122,6 +122,10 @@ RADSimInterRad::writeFifo() { unsigned int dest_rad = DEST_RAD(curr_transaction.tdest).to_uint64(); //std::cout << "radsim_inter_rad.cpp dest_rad is: "<< dest_rad << std::endl; if (this->fifos[dest_rad]->nb_write(curr_transaction) != false) { //there was an available slot to write to + sc_bv rx_tdata_bv = curr_transaction.tdata; + data_vector rx_tdata(32); + bv_to_data_vector(rx_tdata_bv, rx_tdata, 32); + //std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << rx_tdata << std::endl; //std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << curr_transaction.tdata.to_uint64() << std::endl; fifos_latency_counters[dest_rad].push_back(0); //for latency counters } @@ -174,7 +178,11 @@ RADSimInterRad::readFifo() { fifos_latency_counters[i][j]++; } //try reading from front of fifo - if ((this->fifos[i]->num_available() != 0) && (fifos_latency_counters[i][0] >= target_delay)){ //check that fifo is not empty + //std::cout << "all_axis_master_signals[dest_device]->tready.read(): " << all_axis_master_signals[dest_device]->tready.read() << std::endl; + //tried adding && (all_axis_master_signals[dest_device]->tready.read() as condn below, but no support for peek on sc_fifo to get the dest + //TODO: replace sc_fifo with something else std::queue that can support peeks + //IMPORTANT: currently does not accept backpressure. Portal module must create a buffer for backpressure on the RAD's NoC + if ( (this->fifos[i]->num_available() != 0) && (fifos_latency_counters[i][0] >= target_delay) ){ //check that fifo is not empty //counter_delay = 0; //reset counter fifos_latency_counters[i].erase(fifos_latency_counters[i].begin()); //to reset counter, remove first elem struct axis_fields read_from_fifo; diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index 0b978cd..6c2468b 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -9,9 +9,10 @@ #include #include #include +#include #define DATAW 16*32 //changed to match dlrm defines file //128 -#define NUM_SLOTS 5 //number of fifo slots, for now = NUM_ADDENDS +#define NUM_SLOTS 1000 //5 //number of fifo slots, for now = NUM_ADDENDS #define DEST_RAD_LSB 0 #define DEST_RAD_MSB 7 From dd4c69019b58342dff5a9028cf34f5e46ef381b1 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 8 May 2024 02:32:53 -0400 Subject: [PATCH 063/127] Working: RAD 1 completes DLRM based on feature interaction outputs from RAD 0 --- rad-sim/example-designs/dlrm/dlrm_driver.cpp | 30 ++-- rad-sim/example-designs/dlrm/modules/mvm.cpp | 2 +- .../example-designs/dlrm/modules/portal.cpp | 163 +++++++++++------- .../example-designs/dlrm/modules/portal.hpp | 3 +- 4 files changed, 123 insertions(+), 75 deletions(-) diff --git a/rad-sim/example-designs/dlrm/dlrm_driver.cpp b/rad-sim/example-designs/dlrm/dlrm_driver.cpp index d3682f8..c576478 100644 --- a/rad-sim/example-designs/dlrm/dlrm_driver.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_driver.cpp @@ -181,25 +181,25 @@ void dlrm_driver::sink() { std::cout << "]\n"; std::cout << "-------------------------------\n"; } - else { - std::cout << "Output " << outputs_count << " on rad " << radsim_design->rad_id << " does match :)\n"; - std::cout << "TRUE: [ "; - for (unsigned int e = 0; e < _mlp_outputs[outputs_count].size(); e++) { - std::cout << _mlp_outputs[outputs_count][e] << " "; - } - std::cout << "]\n"; - std::cout << "DUT : [ "; - for (unsigned int e = 0; e < dut_output.size(); e++) { - std::cout << dut_output[e] << " "; - } - std::cout << "]\n"; - std::cout << "-------------------------------\n"; - } + // else { + // std::cout << "Output " << outputs_count << " on rad " << radsim_design->rad_id << " does match :)\n"; + // std::cout << "TRUE: [ "; + // for (unsigned int e = 0; e < _mlp_outputs[outputs_count].size(); e++) { + // std::cout << _mlp_outputs[outputs_count][e] << " "; + // } + // std::cout << "]\n"; + // std::cout << "DUT : [ "; + // for (unsigned int e = 0; e < dut_output.size(); e++) { + // std::cout << dut_output[e] << " "; + // } + // std::cout << "]\n"; + // std::cout << "-------------------------------\n"; + // } outputs_count++; all_outputs_matching &= matching; print_progress_bar(outputs_count, _num_mlp_outputs); - std::cout << "outputs_count " << outputs_count << " and _num_mlp_outputs " << _num_mlp_outputs << std::endl; + //std::cout << "outputs_count " << outputs_count << " and _num_mlp_outputs " << _num_mlp_outputs << std::endl; } wait(); } diff --git a/rad-sim/example-designs/dlrm/modules/mvm.cpp b/rad-sim/example-designs/dlrm/modules/mvm.cpp index b14a80a..a8d71c5 100644 --- a/rad-sim/example-designs/dlrm/modules/mvm.cpp +++ b/rad-sim/example-designs/dlrm/modules/mvm.cpp @@ -323,7 +323,7 @@ void mvm::Tick() { end_idx = (e + 1) * 16; tdatavector[e] = tdata.range(end_idx - 1, start_idx).to_int(); } - if (layer_id == 0) std::cout << "got tdatavector on rad " << radsim_design->rad_id << ": " << tdatavector << std::endl; + //if (layer_id == 0) std::cout << "got tdatavector on rad " << radsim_design->rad_id << ": " << tdatavector << std::endl; // sc_bv<7> testing_width = "1000110"; // std::cout << "testing_width.to_uint64(): " << testing_width.to_uint64() << std::endl; if (rx_input_interface.tuser.read().range(15, 13).to_uint() == 1) { diff --git a/rad-sim/example-designs/dlrm/modules/portal.cpp b/rad-sim/example-designs/dlrm/modules/portal.cpp index c84dc2d..5eae7b1 100644 --- a/rad-sim/example-designs/dlrm/modules/portal.cpp +++ b/rad-sim/example-designs/dlrm/modules/portal.cpp @@ -7,7 +7,7 @@ portal::portal(const sc_module_name &name, RADSimDesignContext* radsim_design) //combinational logic SC_METHOD(Assign); - sensitive << rst << axis_portal_master_interface.tready; + sensitive << rst; // << axis_portal_master_interface.tready; //TODO: add back if inter-rad eventually supports backpressure in this direction //sequential logic SC_CTHREAD(Tick, clk.pos()); // This function must be defined & called for any RAD-Sim module to register @@ -25,9 +25,9 @@ void portal::Assign() { //combinational logic axis_portal_slave_interface.tready.write(false); } else { - // Always ready to accept the transaction -- nvm, should make sure NoC is ready because no FIFO buffer in this direction - portal_axis_slave.tready.write(axis_portal_master_interface.tready.read()); //true); //Accepting data from inter-rad and sending into NoC without FIFO - axis_portal_slave_interface.tready.write(true); //Always ready to accept from NoC because we have FIFO buffer in this direction + //Always ready to accept from NoC because we have FIFO buffers in both directions + portal_axis_slave.tready.write(true); //axis_portal_master_interface.tready.read()) //TODO: replace if support backpressure onto inter-rad + axis_portal_slave_interface.tready.write(true); } } @@ -81,7 +81,7 @@ void portal::Tick() { //sequential logic axis_portal_slave_interface.tuser.read() //tuser field }; - portal_axis_fifo.push(curr_transaction); + portal_axis_fifo_noc_incoming.push(curr_transaction); } //Sending outgoing inter-rad data @@ -89,15 +89,15 @@ void portal::Tick() { //sequential logic //we see valid as high the clock cycle AFTER we set it as high in the if-else below if (portal_axis_master.tvalid.read() && portal_axis_master.tready.read()) { // && test_ready_toggle) { //pop out of fifo - if (!portal_axis_fifo.empty()) { + if (!portal_axis_fifo_noc_incoming.empty()) { //test_ready_toggle = false; int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - sc_bv tx_tdata_bv = portal_axis_fifo.front().tdata; + sc_bv tx_tdata_bv = portal_axis_fifo_noc_incoming.front().tdata; data_vector tx_tdata(32); bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); - std::cout << "portal @ cycle " << curr_cycle << ": recieved " << tx_tdata << " on RAD " << radsim_design->rad_id << std::endl; + //std::cout << "portal @ cycle " << curr_cycle << ": sending over inter-RAD" << tx_tdata << " from RAD " << radsim_design->rad_id << std::endl; - portal_axis_fifo.pop(); + portal_axis_fifo_noc_incoming.pop(); //std::cout << "portal.cpp in dlrm design sent " << portal_axis_master.tdata.read().to_uint64() << " to dest_device " << dest_device.to_uint64() << " on cycle " << curr_cycle << std::endl; //portal_recvd.write(1); if (portal_axis_master.tlast.read()) { @@ -105,78 +105,125 @@ void portal::Tick() { //sequential logic } } else { //should never reach here because valid should be false if fifo is empty - std::cout << "reached here but why? portal_axis_fifo.size(): " << portal_axis_fifo.size() << std::endl; + std::cout << "reached here but why? portal_axis_fifo_noc_incoming.size(): " << portal_axis_fifo_noc_incoming.size() << std::endl; } } - - if ((portal_axis_fifo.size() > 0) ) { //&& test_ready_toggle) { - portal_axis_fields curr_transaction = portal_axis_fifo.front(); + //Prep for sending outgoing inter-rad data + if ((portal_axis_fifo_noc_incoming.size() > 0) ) { //&& test_ready_toggle) { + portal_axis_fields curr_transaction = portal_axis_fifo_noc_incoming.front(); portal_axis_master.tdata.write(curr_transaction.tdata); portal_axis_master.tdest.write(curr_transaction.tdest); portal_axis_master.tuser.write(curr_transaction.tuser); portal_axis_master.tvalid.write(true); portal_axis_master.tlast.write(curr_transaction.tlast); - //test_ready_toggle = false; } else { //counter++; portal_axis_master.tdata.write(0); //portal_axis_master.tuser.write(dest_device); portal_axis_master.tvalid.write(false); - //test_ready_toggle = true; } - /*if (portal_axis_master.tvalid.read()) { - test_ready_toggle = !test_ready_toggle; - }*/ - - /*else if (!test_ready_toggle) { - test_ready_toggle = true; - }*/ - //Accepting incoming inter-rad data and then sending to correct module on RAD over NoC - if (portal_axis_slave.tvalid.read() && //tvalid is written by inter-rad module - portal_axis_slave.tready.read()) { //tready is written by this portal module - //get current cycle + // if (portal_axis_slave.tvalid.read() && //tvalid is written by inter-rad module + // portal_axis_slave.tready.read()) { //tready is written by this portal module + // //get current cycle + // int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + // //read + // sc_bv rx_tdata_bv = portal_axis_slave.tdata.read(); + // data_vector rx_tdata(32); + // bv_to_data_vector(rx_tdata_bv, rx_tdata, 32); + // std::cout << module_name << ": Portal Module Got Transaction on cycle " << curr_cycle << " (RAD ID) = " + // << radsim_design->rad_id //<< portal_axis_slave.tuser.read().to_uint64() + // << ") (val = " //<< portal_axis_slave.tdata.read().to_uint64() << ")!" + // << rx_tdata << ") with tdest field of " + // << portal_axis_slave.tdest.read() << "!" + // << std::endl; + // //write the addend into the mult module and that will flag when received all values and can end simulation + // std::string src_port_name = module_name + ".axis_portal_master_interface"; + // uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref + // //sc_bv concat_dest = portal_axis_slave.tdest.read(); + // //DEST_RAD(concat_dest) = radsim_design->rad_id; + // //DEST_LOCAL_NODE(concat_dest) = //dst_addr; + // //std::cout << "portal_axis_slave.tdest.read() is: " << portal_axis_slave.tdest.read() << std::endl; + // axis_portal_master_interface.tdest.write(portal_axis_slave.tdest.read()); //concat_dest); //dst_addr); + // axis_portal_master_interface.tid.write(0); + // axis_portal_master_interface.tstrb.write(0); + // axis_portal_master_interface.tkeep.write(0); + // axis_portal_master_interface.tuser.write(portal_axis_slave.tuser.read()); + // //std::cout << "portal_axis_slave.tuser.read()" << portal_axis_slave.tuser.read().range(15, 13).to_uint() << std::endl; + // axis_portal_master_interface.tlast.write(portal_axis_slave.tlast.read()); + // axis_portal_master_interface.tdata.write(portal_axis_slave.tdata.read()); + // axis_portal_master_interface.tvalid.write(true); + // //checking if last transaction and if so, printing current simulation cycle count + // if (portal_axis_slave.tlast.read()) { + // std::cout << "portal.cpp received last data via inter_rad at cycle " << curr_cycle << std::endl; + // } + // } + // else { + // axis_portal_master_interface.tvalid.write(false); + // std::cout << "portal_axis_slave.tvalid.read(): " << portal_axis_slave.tvalid.read() + // << " portal_axis_slave.tready.read() " << portal_axis_slave.tready.read() + // << " axis_portal_master_interface.tready.read() " << axis_portal_master_interface.tready.read() << std::endl; + // } + if (portal_axis_slave.tvalid.read() && + portal_axis_slave.tready.read()) { + portal_axis_fields curr_transaction = { + portal_axis_slave.tvalid.read(), + portal_axis_slave.tready.read(), + portal_axis_slave.tdata.read(), + portal_axis_slave.tstrb.read(), + portal_axis_slave.tkeep.read(), + portal_axis_slave.tlast.read(), + portal_axis_slave.tid.read(), + portal_axis_slave.tdest.read(), + portal_axis_slave.tuser.read() //tuser field + }; + + portal_axis_fifo_noc_outgoing.push(curr_transaction); + } + + //Sending outgoing NoC data + //warning: must do this before next if-else block so that we pop before reading front. otherwise we get outtdated value on second turn. + //we see valid as high the clock cycle AFTER we set it as high in the if-else below + if (axis_portal_master_interface.tvalid.read() && axis_portal_master_interface.tready.read()) { // && test_ready_toggle) { + //pop out of fifo + if (!portal_axis_fifo_noc_outgoing.empty()) { + //test_ready_toggle = false; int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - //read - sc_bv rx_tdata_bv = portal_axis_slave.tdata.read(); - data_vector rx_tdata(32); - bv_to_data_vector(rx_tdata_bv, rx_tdata, 32); - std::cout << module_name << ": Portal Module Got Transaction on cycle " << curr_cycle << " (RAD ID) = " - << radsim_design->rad_id //<< portal_axis_slave.tuser.read().to_uint64() - << ") (val = " //<< portal_axis_slave.tdata.read().to_uint64() << ")!" - << rx_tdata << ") with tdest field of " - << portal_axis_slave.tdest.read() << "!" - << std::endl; - //write the addend into the mult module and that will flag when received all values and can end simulation - std::string src_port_name = module_name + ".axis_portal_master_interface"; - uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref - //sc_bv concat_dest = portal_axis_slave.tdest.read(); - //DEST_RAD(concat_dest) = radsim_design->rad_id; - //DEST_LOCAL_NODE(concat_dest) = //dst_addr; - //std::cout << "portal_axis_slave.tdest.read() is: " << portal_axis_slave.tdest.read() << std::endl; - axis_portal_master_interface.tdest.write(portal_axis_slave.tdest.read()); //concat_dest); //dst_addr); - axis_portal_master_interface.tid.write(0); - axis_portal_master_interface.tstrb.write(0); - axis_portal_master_interface.tkeep.write(0); - axis_portal_master_interface.tuser.write(portal_axis_slave.tuser.read()); - //std::cout << "portal_axis_slave.tuser.read()" << portal_axis_slave.tuser.read().range(15, 13).to_uint() << std::endl; - axis_portal_master_interface.tlast.write(portal_axis_slave.tlast.read()); - axis_portal_master_interface.tdata.write(portal_axis_slave.tdata.read()); - axis_portal_master_interface.tvalid.write(true); - //checking if last transaction and if so, printing current simulation cycle count - if (portal_axis_slave.tlast.read()) { - std::cout << "portal.cpp received last data via inter_rad at cycle " << curr_cycle << std::endl; + sc_bv tx_tdata_bv = portal_axis_fifo_noc_outgoing.front().tdata; + data_vector tx_tdata(32); + bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); + //std::cout << "portal @ cycle " << curr_cycle << ": sending over NoC " << tx_tdata << " from RAD " << radsim_design->rad_id << std::endl; + + portal_axis_fifo_noc_outgoing.pop(); + //std::cout << "portal.cpp in dlrm design sent " << portal_axis_master.tdata.read().to_uint64() << " to dest_device " << dest_device.to_uint64() << " on cycle " << curr_cycle << std::endl; + //portal_recvd.write(1); + if (axis_portal_master_interface.tlast.read()) { + std::cout << "dlrm design portal.cpp sent last data via NoC at cycle " << curr_cycle << std::endl; } + } + else { //should never reach here because valid should be false if fifo is empty + std::cout << "reached here but why? portal_axis_fifo_noc_outgoing.size(): " << portal_axis_fifo_noc_outgoing.size() << std::endl; + } + } + //Prep for sending outgoing NoC data + if ((portal_axis_fifo_noc_outgoing.size() > 0) ) { //&& test_ready_toggle) { + portal_axis_fields curr_transaction = portal_axis_fifo_noc_outgoing.front(); + axis_portal_master_interface.tdata.write(curr_transaction.tdata); + axis_portal_master_interface.tdest.write(curr_transaction.tdest); + axis_portal_master_interface.tuser.write(curr_transaction.tuser); + axis_portal_master_interface.tvalid.write(true); + axis_portal_master_interface.tlast.write(curr_transaction.tlast); } else { + //counter++; + axis_portal_master_interface.tdata.write(0); + //portal_axis_master.tuser.write(dest_device); axis_portal_master_interface.tvalid.write(false); - std::cout << "portal_axis_slave.tvalid.read(): " << portal_axis_slave.tvalid.read() - << " portal_axis_slave.tready.read() " << portal_axis_slave.tready.read() - << " axis_portal_master_interface.tready.read() " << axis_portal_master_interface.tready.read() << std::endl; } + wait(); } } diff --git a/rad-sim/example-designs/dlrm/modules/portal.hpp b/rad-sim/example-designs/dlrm/modules/portal.hpp index 6c50fd2..386230a 100644 --- a/rad-sim/example-designs/dlrm/modules/portal.hpp +++ b/rad-sim/example-designs/dlrm/modules/portal.hpp @@ -26,7 +26,8 @@ struct portal_axis_fields { class portal : public RADSimModule { private: - std::queue portal_axis_fifo; + std::queue portal_axis_fifo_noc_incoming; + std::queue portal_axis_fifo_noc_outgoing; public: RADSimDesignContext* radsim_design; From effb4743b5160535300c84ac855e6e9a188308c5 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 8 May 2024 03:54:35 -0400 Subject: [PATCH 064/127] Fixed setting flag to end simulation for simple two-RAD shared DLRM --- .../dlrm/modules/custom_feature_interaction.cpp | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp index 819810f..568653b 100644 --- a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp +++ b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp @@ -169,6 +169,7 @@ void custom_feature_interaction::Tick() { wait(); int no_val_counter = 0; + bool got_all_mem_responses = false; // Always @ positive edge of the clock while (true ) { //&& (radsim_design->rad_id == 0)) { @@ -184,6 +185,7 @@ void custom_feature_interaction::Tick() { if (_num_received_responses == _num_expected_responses) { std::cout << this->name() << ": Got all memory responses at cycle " << GetSimulationCycle(5.0) << "!" << std::endl; + got_all_mem_responses = true; } } } @@ -236,6 +238,7 @@ void custom_feature_interaction::Tick() { } // Interface with AXI-S NoC + bool non_empty_output_fifo = false; for (unsigned int ch_id = 0; ch_id < _num_output_channels; ch_id++) { if (axis_interface[ch_id].tready.read() && axis_interface[ch_id].tvalid.read()) { @@ -246,6 +249,7 @@ void custom_feature_interaction::Tick() { } if ( (!_output_fifos[ch_id].empty()) ) { //&& (radsim_design->rad_id == 0) ) { + non_empty_output_fifo = true; data_vector tx_tdata = _output_fifos[ch_id].front(); //std::cout << "custom_feature_interaction: tx_tdata sent " << tx_tdata << " from RAD " << radsim_design->rad_id << std::endl; sc_bv tx_tdata_bv; @@ -281,6 +285,11 @@ void custom_feature_interaction::Tick() { _ofifo_full[ch_id].write(_output_fifos[ch_id].size() >= _fifos_depth - 2); } received_responses.write(_num_received_responses); + + if (non_empty_output_fifo && got_all_mem_responses) { + radsim_design->set_rad_done(); + } + wait(); } } From 23f7cc53a613a54f9a38f974a66da1bd88664589 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sat, 11 May 2024 03:54:15 -0400 Subject: [PATCH 065/127] In-progress: rad-specific Has and Get fns in config, replacing fn calls --- rad-sim/example-designs/dlrm/dlrm_top.cpp | 2 +- rad-sim/example-designs/npu/npu_driver.cpp | 2 +- rad-sim/sim/design_context.cpp | 40 +-- rad-sim/sim/main.cpp | 19 +- rad-sim/sim/radsim_config.cpp | 307 ++++++++++++++++----- rad-sim/sim/radsim_config.hpp | 22 +- rad-sim/sim/radsim_telemetry.cpp | 10 +- rad-sim/sim/radsim_telemetry.hpp | 2 +- rad-sim/sim/radsim_utils.cpp | 2 +- 9 files changed, 294 insertions(+), 112 deletions(-) diff --git a/rad-sim/example-designs/dlrm/dlrm_top.cpp b/rad-sim/example-designs/dlrm/dlrm_top.cpp index 6ac458a..b3a1959 100644 --- a/rad-sim/example-designs/dlrm/dlrm_top.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_top.cpp @@ -8,7 +8,7 @@ dlrm_top::dlrm_top(const sc_module_name &name) : sc_module(name) { unsigned int embedding_lookup_fifos_depth = 16; unsigned int feature_interaction_fifos_depth = 64; unsigned int num_mem_controllers = - radsim_config.GetIntKnob("dram_num_controllers"); + radsim_config.GetIntKnobPerRad("dram_num_controllers", -1); //TODO: merge with my other dlrm changes branch, then fix to use rad id assert(num_mem_controllers == mem_channels.size()); unsigned int total_mem_channels = 0; for (auto &num_channels : mem_channels) { diff --git a/rad-sim/example-designs/npu/npu_driver.cpp b/rad-sim/example-designs/npu/npu_driver.cpp index 1dc1393..d2e1525 100644 --- a/rad-sim/example-designs/npu/npu_driver.cpp +++ b/rad-sim/example-designs/npu/npu_driver.cpp @@ -97,7 +97,7 @@ void npu_driver::source() { // Trigger NPU start signal start.write(true); wait(); - start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("max_period")); + start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //"max_period")); //AKB: replaced with sim_driver_period start.write(false); wait(); diff --git a/rad-sim/sim/design_context.cpp b/rad-sim/sim/design_context.cpp index 84937ab..35bc5a0 100644 --- a/rad-sim/sim/design_context.cpp +++ b/rad-sim/sim/design_context.cpp @@ -1,9 +1,9 @@ #include RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { - std::string radsim_knobs_filename = "/sim/radsim_knobs"; - std::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename; - ParseRADSimKnobs(radsim_knobs_filepath); + // std::string radsim_knobs_filename = "/sim/radsim_knobs"; + // std::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename; + // ParseRADSimKnobs(radsim_knobs_filepath); //TODO: move this to main.cpp so it only gets called once, not per-RAD //assign its rad id rad_id = rad_id_; @@ -11,7 +11,7 @@ RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { // Create NoC clocks std::string clk_name; std::vector noc_period = - radsim_config.GetDoubleVectorKnob("noc_clk_period"); + radsim_config.GetDoubleVectorKnobPerRad("noc_clk_period", rad_id); _noc_clks.resize(noc_period.size()); for (unsigned int clk_id = 0; clk_id < _noc_clks.size(); clk_id++) { clk_name = "noc_clk" + std::to_string(clk_id); @@ -21,7 +21,7 @@ RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { // Create adapter clocks std::vector adapter_period = - radsim_config.GetDoubleVectorKnob("noc_adapters_clk_period"); + radsim_config.GetDoubleVectorKnobPerRad("noc_adapters_clk_period", rad_id); _adapter_clks.resize(adapter_period.size()); for (unsigned int clk_id = 0; clk_id < _adapter_clks.size(); clk_id++) { clk_name = "adapter_clk" + std::to_string(clk_id); @@ -31,7 +31,7 @@ RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { // Create module clocks std::vector module_period = - radsim_config.GetDoubleVectorKnob("design_clk_periods"); + radsim_config.GetDoubleVectorKnobPerRad("design_clk_periods", rad_id); _module_clks.resize(module_period.size()); for (unsigned int clk_id = 0; clk_id < _module_clks.size(); clk_id++) { clk_name = "module_clk" + std::to_string(clk_id); @@ -39,10 +39,10 @@ RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { new sc_clock(clk_name.c_str(), module_period[clk_id], SC_NS); } - int num_nocs = radsim_config.GetIntKnob("noc_num_nocs"); + int num_nocs = radsim_config.GetIntKnobPerRad("noc_num_nocs", rad_id); _node_module_names.resize(num_nocs); for (int noc_id = 0; noc_id < num_nocs; noc_id++) { - int num_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", noc_id); + int num_nodes = radsim_config.GetIntVectorKnobPerRad("noc_num_nodes", noc_id, rad_id); _node_module_names[noc_id].resize(num_nodes); } //AKB ADDED: @@ -74,11 +74,11 @@ std::string GetModuleNameFromPortName(std::string &port_name) { return module_name; } -uint64_t DeterminedBaseAddress(int noc_id, int node_id) { - int num_nocs = radsim_config.GetIntKnob("noc_num_nocs"); +uint64_t DeterminedBaseAddress(int noc_id, int node_id, int rad_id) { + int num_nocs = radsim_config.GetIntKnobPerRad("noc_num_nocs", rad_id); int max_num_nodes = 0; for (int noc_id = 0; noc_id < num_nocs; noc_id++) { - int num_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", noc_id); + int num_nodes = radsim_config.GetIntVectorKnobPerRad("noc_num_nodes", noc_id, rad_id); if (num_nodes > max_num_nodes) { max_num_nodes = num_nodes; } @@ -94,8 +94,8 @@ uint64_t DeterminedBaseAddress(int noc_id, int node_id) { void RADSimDesignContext::ParseNoCPlacement(const std::string &design_path, //AKB ADDED first arg const std::string &placement_filename) { std::string placement_filepath = - //radsim_config.GetStringKnob("radsim_user_design_root_dir") + "/" + - design_path + "/" + + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", rad_id) + "/" + + //design_path + "/" + //AKB: had added this as workaround until config-file changes placement_filename; std::ifstream placement_file(placement_filepath); @@ -159,7 +159,7 @@ void RADSimDesignContext::ParseNoCPlacement(const std::string &design_path, //AK // Set base address information _aximm_port_base_addresses[port_name] = - DeterminedBaseAddress(port_noc_placement, port_node_placement); + DeterminedBaseAddress(port_noc_placement, port_node_placement, rad_id); } } else { std::string module_name, port_name, port_noc_placement_str, @@ -263,7 +263,7 @@ void RADSimDesignContext::ParseNoCPlacement(const std::string &design_path, //AK } // Set base address information _aximm_port_base_addresses[port_name] = - DeterminedBaseAddress(port_noc_placement, port_node_placement); + DeterminedBaseAddress(port_noc_placement, port_node_placement, rad_id); } for (unsigned int port_id = 0; @@ -293,7 +293,7 @@ void RADSimDesignContext::ParseNoCPlacement(const std::string &design_path, //AK } // Set base address information _aximm_port_base_addresses[port_name] = - DeterminedBaseAddress(port_noc_placement, port_node_placement); + DeterminedBaseAddress(port_noc_placement, port_node_placement, rad_id); } } _node_module_names[port_noc_placement][port_node_placement].insert( @@ -305,8 +305,8 @@ void RADSimDesignContext::ParseNoCPlacement(const std::string &design_path, //AK void RADSimDesignContext::ParseClockSettings(const std::string &design_path, //AKB ADDED first arg const std::string &clks_filename) { std::string clks_filepath = - //radsim_config.GetStringKnob("radsim_user_design_root_dir") + "/" + - design_path + "/" + + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", rad_id) + "/" + + //design_path + "/" + //AKB: had added this as workaround until config-file changes clks_filename; std::ifstream clks_file(clks_filepath); @@ -337,7 +337,7 @@ void RADSimDesignContext::RegisterModule(std::string module_name, void RADSimDesignContext::BuildDesignContext(const std::string &design_path, //AKB ADDED first arg const std::string &placement_filename, const std::string &clks_filename) { - unsigned int num_nocs = radsim_config.GetIntKnob("noc_num_nocs"); + unsigned int num_nocs = radsim_config.GetIntKnobPerRad("noc_num_nocs", rad_id); _node_id_is_aximm.resize(num_nocs); _node_id_ports_list.resize(num_nocs); _noc_axis_slave_adapter_info.resize(num_nocs); @@ -472,7 +472,7 @@ void RADSimDesignContext::BuildDesignContext(const std::string &design_path, //A } void RADSimDesignContext::CreateSystemNoCs(sc_in &rst) { - unsigned int num_nocs = radsim_config.GetIntKnob("noc_num_nocs"); + unsigned int num_nocs = radsim_config.GetIntKnobPerRad("noc_num_nocs", rad_id); for (unsigned int noc_id = 0; noc_id < num_nocs; noc_id++) { std::string noc_name_str = "radsim_noc_" + std::to_string(noc_id); const char *noc_name = noc_name_str.c_str(); diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 5c0a4bf..38610b6 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -17,20 +17,25 @@ SimLog sim_log; SimTraceRecording sim_trace_probe; int sc_main(int argc, char *argv[]) { + //AKB: moved from RADSimDesignContext constructor to here + std::string radsim_knobs_filename = "/sim/radsim_knobs"; + std::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename; + ParseRADSimKnobs(radsim_knobs_filepath); //TODO: move this to main.cpp so it only gets called once, not per-RAD + //AKB: using RADSimCluster class instead of creating new above int total_num_rads = 5; //must also change value of TOTAL_RADS in add_driver.cpp and adder.cpp RADSimCluster* cluster = new RADSimCluster(total_num_rads); //3); //2); gWatchOut = &cout; - int log_verbosity = radsim_config.GetIntKnob("telemetry_log_verbosity"); + int log_verbosity = radsim_config.GetIntKnobShared("telemetry_log_verbosity"); sim_log.SetLogSettings(log_verbosity, "sim.log"); - int num_traces = radsim_config.GetIntKnob("telemetry_num_traces"); + int num_traces = radsim_config.GetIntKnobShared("telemetry_num_traces"); sim_trace_probe.SetTraceRecordingSettings("sim.trace", num_traces); sc_clock *driver_clk_sig = new sc_clock( - "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); + "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); add_system *system = new add_system("add_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED //mult_system *system = new mult_system("mult_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED @@ -53,7 +58,7 @@ int sc_main(int argc, char *argv[]) { std::queue all_mult_clocks; for (int i = 1; i < total_num_rads; i++) { //subtract one because already have adder RAD - sc_clock *driver_clk_sig = new sc_clock("node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED + sc_clock *driver_clk_sig = new sc_clock("node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); //AKB ADDED all_mult_clocks.push(driver_clk_sig); //const std::string mult_system_name = "mult_system" + std::to_string(i); @@ -66,7 +71,7 @@ int sc_main(int argc, char *argv[]) { // cluster->StoreSystem(system3); sc_clock *inter_rad_clk_sig = new sc_clock( - "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED, use same period as sim driver + "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); //AKB ADDED, use same period as sim driver RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); //blackbox->ConnectRadPair(0, 1); //TODO: comment out bc not using this for (int i = 0; i < total_num_rads; i++) { //include adder rad in this @@ -76,7 +81,7 @@ int sc_main(int argc, char *argv[]) { // blackbox->ConnectRadAxi(1); // blackbox->ConnectRadAxi(2); - int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); //sc_bv<128> new_val; //sc_bv<128> old_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); while (cluster->AllRADsNotDone()) { @@ -91,7 +96,7 @@ int sc_main(int argc, char *argv[]) { // } } std::cout << "stopping" << std::endl; - int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); sc_stop(); //int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); std::cout << "Simulation Cycles from main.cpp = " << end_cycle - start_cycle << std::endl; diff --git a/rad-sim/sim/radsim_config.cpp b/rad-sim/sim/radsim_config.cpp index 84a381f..67eb8e7 100644 --- a/rad-sim/sim/radsim_config.cpp +++ b/rad-sim/sim/radsim_config.cpp @@ -8,6 +8,16 @@ RADSimConfig::~RADSimConfig() {} // } +void RADSimConfig::ResizeAll(int num_rads) { + _int_knobs_per_rad.resize(num_rads); + _double_knobs_per_rad.resize(num_rads); + _string_knobs_per_rad.resize(num_rads); + _int_vector_knobs_per_rad.resize(num_rads); + _double_vector_knobs_per_rad.resize(num_rads); + _string_vector_knobs_per_rad.resize(num_rads); +} + + // Adds a new integer configuration knob void RADSimConfig::AddIntKnobShared(const std::string &key, int val) { _int_knobs_shared[key] = val; @@ -44,158 +54,283 @@ void RADSimConfig::AddStringVectorKnobShared(const std::string &key, //RAD-specific functions // Adds a new integer configuration knob void RADSimConfig::AddIntKnobPerRad(const std::string &key, int val, int rad_id) { - _int_knobs_per_rad[key] = val; + _int_knobs_per_rad[rad_id][key] = val; } // Adds a new double configuration knob void RADSimConfig::AddDoubleKnobPerRad(const std::string &key, double val, int rad_id) { - _double_knobs_per_rad[key] = val; + _double_knobs_per_rad[rad_id][key] = val; } // Adds a new string configuration knob void RADSimConfig::AddStringKnobPerRad(const std::string &key, std::string &val, int rad_id) { - _string_knobs_per_rad[key] = val; + _string_knobs_per_rad[rad_id][key] = val; } // Adds a new integer vector configuration knob void RADSimConfig::AddIntVectorKnobPerRad(const std::string &key, std::vector &val, int rad_id) { - _int_vector_knobs_per_rad[key] = val; + _int_vector_knobs_per_rad[rad_id][key] = val; } // Adds a new double vector configuration knob void RADSimConfig::AddDoubleVectorKnobPerRad(const std::string &key, std::vector &val, int rad_id) { - _double_vector_knobs_per_rad[key] = val; + _double_vector_knobs_per_rad[rad_id][key] = val; } // Adds a new string vector configuration knob void RADSimConfig::AddStringVectorKnobPerRad(const std::string &key, std::vector &val, int rad_id) { - _string_vector_knobs_per_rad[key] = val; + _string_vector_knobs_per_rad[rad_id][key] = val; } // Gets the value of an integer configuration knob -int RADSimConfig::GetIntKnob(const std::string &key) { - if (_int_knobs.find(key) == _int_knobs.end()) { - std::cerr << "GetIntKnob: Cannot find configuration parameter \"" << key +int RADSimConfig::GetIntKnobShared(const std::string &key) { + if (_int_knobs_shared.find(key) == _int_knobs_shared.end()) { + std::cerr << "GetIntKnobShared: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); } - return _int_knobs[key]; + return _int_knobs_shared[key]; } // Gets the value of a double configuration knob -double RADSimConfig::GetDoubleKnob(const std::string &key) { - if (_double_knobs.find(key) == _double_knobs.end()) { - std::cerr << "GetDoubleKnob: Cannot find configuration parameter \"" << key +double RADSimConfig::GetDoubleKnobShared(const std::string &key) { + if (_double_knobs_shared.find(key) == _double_knobs_shared.end()) { + std::cerr << "GetDoubleKnobShared: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); } - return _double_knobs[key]; + return _double_knobs_shared[key]; } // Gets the value of a string configuration knob -std::string RADSimConfig::GetStringKnob(const std::string &key) { - if (_string_knobs.find(key) == _string_knobs.end()) { - std::cerr << "GetStringKnob: Cannot find configuration parameter \"" << key +std::string RADSimConfig::GetStringKnobShared(const std::string &key) { + if (_string_knobs_shared.find(key) == _string_knobs_shared.end()) { + std::cerr << "GetStringKnobShared: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); } - return _string_knobs[key]; + return _string_knobs_shared[key]; } // Gets the value of an integer vector configuration knob -int RADSimConfig::GetIntVectorKnob(const std::string &key, unsigned int idx) { - if (_int_vector_knobs.find(key) == _int_vector_knobs.end()) { - std::cerr << "GetIntVectorKnob: Cannot find configuration parameter \"" +int RADSimConfig::GetIntVectorKnobShared(const std::string &key, unsigned int idx) { + if (_int_vector_knobs_shared.find(key) == _int_vector_knobs_shared.end()) { + std::cerr << "GetIntVectorKnobShared: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); } - return _int_vector_knobs[key][idx]; + return _int_vector_knobs_shared[key][idx]; } // Gets the value of a double vector configuration knob -double RADSimConfig::GetDoubleVectorKnob(const std::string &key, +double RADSimConfig::GetDoubleVectorKnobShared(const std::string &key, unsigned int idx) { - if (_double_vector_knobs.find(key) == _double_vector_knobs.end()) { - std::cerr << "GetDoubleVectorKnob: Cannot find configuration parameter \"" + if (_double_vector_knobs_shared.find(key) == _double_vector_knobs_shared.end()) { + std::cerr << "GetDoubleVectorKnobShared: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); } - return _double_vector_knobs[key][idx]; + return _double_vector_knobs_shared[key][idx]; } // Gets the value of a string vector configuration knob -std::string RADSimConfig::GetStringVectorKnob(const std::string &key, +std::string RADSimConfig::GetStringVectorKnobShared(const std::string &key, unsigned int idx) { - if (_string_vector_knobs.find(key) == _string_vector_knobs.end()) { - std::cerr << "GetStringVectorKnob: Cannot find configuration parameter \"" + if (_string_vector_knobs_shared.find(key) == _string_vector_knobs_shared.end()) { + std::cerr << "GetStringVectorKnobShared: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); } - return _string_vector_knobs[key][idx]; + return _string_vector_knobs_shared[key][idx]; } // Gets the value of an integer vector configuration knob -std::vector &RADSimConfig::GetIntVectorKnob(const std::string &key) { - if (_int_vector_knobs.find(key) == _int_vector_knobs.end()) { - std::cerr << "GetIntVectorKnob: Cannot find configuration parameter \"" +std::vector &RADSimConfig::GetIntVectorKnobShared(const std::string &key) { + if (_int_vector_knobs_shared.find(key) == _int_vector_knobs_shared.end()) { + std::cerr << "GetIntVectorKnobShared: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); } - return _int_vector_knobs[key]; + return _int_vector_knobs_shared[key]; } // Gets the value of a double vector configuration knob -std::vector &RADSimConfig::GetDoubleVectorKnob(const std::string &key) { - if (_double_vector_knobs.find(key) == _double_vector_knobs.end()) { - std::cerr << "GetDoubleVectorKnob: Cannot find configuration parameter \"" +std::vector &RADSimConfig::GetDoubleVectorKnobShared(const std::string &key) { + if (_double_vector_knobs_shared.find(key) == _double_vector_knobs_shared.end()) { + std::cerr << "GetDoubleVectorKnobShared: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); } - return _double_vector_knobs[key]; + return _double_vector_knobs_shared[key]; } // Gets the value of a string vector configuration knob std::vector & -RADSimConfig::GetStringVectorKnob(const std::string &key) { - if (_string_vector_knobs.find(key) == _string_vector_knobs.end()) { - std::cerr << "GetStringVectorKnob: Cannot find configuration parameter \"" +RADSimConfig::GetStringVectorKnobShared(const std::string &key) { + if (_string_vector_knobs_shared.find(key) == _string_vector_knobs_shared.end()) { + std::cerr << "GetStringVectorKnobShared: Cannot find configuration parameter \"" + << key << "\"" << std::endl; + exit(1); + } + return _string_vector_knobs_shared[key]; +} + +//Retrieve values of RAD-specific knobs +// Gets the value of an integer configuration knob +int RADSimConfig::GetIntKnobPerRad(const std::string &key, int rad_id) { + if (_int_knobs_per_rad.find(key) == _int_knobs_per_rad.end()) { + std::cerr << "GetIntKnobPerRAD: Cannot find configuration parameter \"" << key + << "\"" << std::endl; + exit(1); + } + return _int_knobs_per_rad[rad_id][key]; +} + +// Gets the value of a double configuration knob +double RADSimConfig::GetDoubleKnobPerRad(const std::string &key, int rad_id) { + if (_double_knobs_per_rad.find(key) == _double_knobs_per_rad.end()) { + std::cerr << "GetDoubleKnobPerRAD: Cannot find configuration parameter \"" << key + << "\"" << std::endl; + exit(1); + } + return _double_knobs_per_rad[rad_id][key]; +} + +// Gets the value of a string configuration knob +std::string RADSimConfig::GetStringKnobPerRad(const std::string &key, int rad_id) { + if (_string_knobs_per_rad.find(key) == _string_knobs_per_rad.end()) { + std::cerr << "GetStringKnobPerRAD: Cannot find configuration parameter \"" << key + << "\"" << std::endl; + exit(1); + } + return _string_knobs_per_rad[rad_id][key]; +} + +// Gets the value of an integer vector configuration knob +int RADSimConfig::GetIntVectorKnobPerRad(const std::string &key, unsigned int idx, int rad_id) { + if (_int_vector_knobs_per_rad.find(key) == _int_vector_knobs_per_rad.end()) { + std::cerr << "GetIntVectorKnobPerRAD: Cannot find configuration parameter \"" + << key << "\"" << std::endl; + exit(1); + } + return _int_vector_knobs_per_rad[rad_id][key][idx]; +} + +// Gets the value of a double vector configuration knob +double RADSimConfig::GetDoubleVectorKnobPerRad(const std::string &key, + unsigned int idx, int rad_id) { + if (_double_vector_knobs_per_rad.find(key) == _double_vector_knobs_per_rad.end()) { + std::cerr << "GetDoubleVectorKnobPerRAD: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); } - return _string_vector_knobs[key]; + return _double_vector_knobs_per_rad[rad_id][key][idx]; +} + +// Gets the value of a string vector configuration knob +std::string RADSimConfig::GetStringVectorKnobPerRad(const std::string &key, + unsigned int idx, int rad_id) { + if (_string_vector_knobs_per_rad.find(key) == _string_vector_knobs_per_rad.end()) { + std::cerr << "GetStringVectorKnobPerRAD: Cannot find configuration parameter \"" + << key << "\"" << std::endl; + exit(1); + } + return _string_vector_knobs_per_rad[rad_id][key][idx]; +} + +// Gets the value of an integer vector configuration knob +std::vector &RADSimConfig::GetIntVectorKnobPerRad(const std::string &key, int rad_id) { + if (_int_vector_knobs_per_rad.find(key) == _int_vector_knobs_per_rad.end()) { + std::cerr << "GetIntVectorKnobPerRAD: Cannot find configuration parameter \"" + << key << "\"" << std::endl; + exit(1); + } + return _int_vector_knobs_per_rad[rad_id][key]; +} + +// Gets the value of a double vector configuration knob +std::vector &RADSimConfig::GetDoubleVectorKnobPerRad(const std::string &key, int rad_id) { + if (_double_vector_knobs_per_rad.find(key) == _double_vector_knobs_per_rad.end()) { + std::cerr << "GetDoubleVectorKnobPerRAD: Cannot find configuration parameter \"" + << key << "\"" << std::endl; + exit(1); + } + return _double_vector_knobs_per_rad[rad_id][key]; +} + +// Gets the value of a string vector configuration knob +std::vector & +RADSimConfig::GetStringVectorKnobPerRad(const std::string &key, int rad_id) { + if (_string_vector_knobs_per_rad.find(key) == _string_vector_knobs_per_rad.end()) { + std::cerr << "GetStringVectorKnobPerRAD: Cannot find configuration parameter \"" + << key << "\"" << std::endl; + exit(1); + } + return _string_vector_knobs_per_rad[rad_id][key]; } // Check if an integer configuration knob is defined -bool RADSimConfig::HasIntKnob(const std::string &key) { - return (_int_knobs.find(key) != _int_knobs.end()); +bool RADSimConfig::HasIntKnobShared(const std::string &key) { + return (_int_knobs_shared.find(key) != _int_knobs.end()); } // Check if a double configuration knob is defined -bool RADSimConfig::HasDoubleKnob(const std::string &key) { - return (_double_knobs.find(key) != _double_knobs.end()); +bool RADSimConfig::HasDoubleKnobShared(const std::string &key) { + return (_double_knobs_shared.find(key) != _double_knobs.end()); } // Check if a string configuration knob is defined -bool RADSimConfig::HasStringKnob(const std::string &key) { - return (_string_knobs.find(key) != _string_knobs.end()); +bool RADSimConfig::HasStringKnobShared(const std::string &key) { + return (_string_knobs_shared.find(key) != _string_knobs.end()); } // Check if an integer vector configuration knob is defined -bool RADSimConfig::HasIntVectorKnob(const std::string &key) { - return (_int_vector_knobs.find(key) != _int_vector_knobs.end()); +bool RADSimConfig::HasIntVectorKnobShared(const std::string &key) { + return (_int_vector_knobs_shared.find(key) != _int_vector_knobs.end()); } // Check if a double vector configuration knob is defined -bool RADSimConfig::HasDoubleVectorKnob(const std::string &key) { - return (_double_vector_knobs.find(key) != _double_vector_knobs.end()); +bool RADSimConfig::HasDoubleVectorKnobShared(const std::string &key) { + return (_double_vector_knobs_shared.find(key) != _double_vector_knobs.end()); } // Check if a string vector configuration knob is defined -bool RADSimConfig::HasStringVectorKnob(const std::string &key) { - return (_string_vector_knobs.find(key) != _string_vector_knobs.end()); +bool RADSimConfig::HasStringVectorKnobShared(const std::string &key) { + return (_string_vector_knobs_shared.find(key) != _string_vector_knobs.end()); +} + +//AKB: per-RAD functions to check if has certain knob defined for that RAD +// Check if an integer configuration knob is defined +bool RADSimConfig::HasIntKnobPerRad(const std::string &key, int rad_id) { + return (_int_knobs_per_rad[rad_id].find(key) != _int_knobs_per_rad[rad_id].end()); +} + +// Check if a double configuration knob is defined +bool RADSimConfig::HasDoubleKnobPerRad(const std::string &key, int rad_id) { + return (_double_knobs_per_rad[rad_id].find(key) != _double_knobs_per_rad[rad_id].end()); +} + +// Check if a string configuration knob is defined +bool RADSimConfig::HasStringKnobPerRad(const std::string &key, int rad_id) { + return (_string_knobs_per_rad[rad_id].find(key) != _string_knobs_per_rad[rad_id].end()); +} + +// Check if an integer vector configuration knob is defined +bool RADSimConfig::HasIntVectorKnobPerRad(const std::string &key, int rad_id) { + return (_int_vector_knobs_per_rad[rad_id].find(key) != _int_vector_knobs_per_rad[rad_id].end()); +} + +// Check if a double vector configuration knob is defined +bool RADSimConfig::HasDoubleVectorKnobPerRad(const std::string &key, int rad_id) { + return (_double_vector_knobs_per_rad[rad_id].find(key) != _double_vector_knobs_per_rad[rad_id].end()); +} + +// Check if a string vector configuration knob is defined +bool RADSimConfig::HasStringVectorKnobPerRad(const std::string &key, int rad_id) { + return (_string_vector_knobs_per_rad[rad_id].find(key) != _string_vector_knobs_per_rad[rad_id].end()); } // Parse RADSim knobs from file into RADSimConfig data structures @@ -215,22 +350,39 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { // Based on parameter name, parse a single or a vector of values of int, // double or string data types - if ((param == "radsim_root_dir") || - (param == "radsim_user_design_root_dir") || - (param == "design_name")) { + if (param == "radsim_root_dir") { std::string value; std::getline(ss, value, ' '); - radsim_config.AddStringKnob(param, value); - } else if ((param == "noc_num_nocs") || (param == "telemetry_log_verbosity") || - (param == "dram_num_controllers")) { + radsim_config.AddStringKnobShared(param, value); + } else if ((param == "radsim_user_design_root_dir") || (param == "design_name")) { //example: design_name 2 dlrm + std::string rad_id_str; + std::getline(ss, rad_id_str, ' '); + int rad_id = std::stoi(rad_id_str); + std::string value; + std::getline(ss, value, ' '); + radsim_config.AddStringKnobPerRad(param, value, rad_id); + } else if (param == "telemetry_log_verbosity") { std::string value_str; std::getline(ss, value_str, ' '); int value = std::stoi(value_str); - radsim_config.AddIntKnob(param, value); + radsim_config.AddIntKnobShared(param, value); + } else if ((param == "noc_num_nocs") || (param == "dram_num_controllers")) { + std::string rad_id_str; + std::getline(ss, rad_id_str, ' '); + int rad_id = std::stoi(rad_id_str); + std::string value_str; + std::getline(ss, value_str, ' '); + int value = std::stoi(value_str); + radsim_config.AddIntKnobPerRad(param, value, rad_id); } else if ((param == "noc_payload_width") || (param == "noc_vcs") || (param == "noc_num_nodes") || (param == "noc_adapters_fifo_size") || (param == "noc_adapters_obuff_size") || (param == "dram_queue_sizes")) { + //get rad-id + std::string rad_id_str; + std::getline(ss, rad_id_str, ' '); + int rad_id = std::stoi(rad_id_str); + //get values std::vector value; std::string value_element_str; int value_element; @@ -238,7 +390,7 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { value_element = std::stoi(value_element_str); value.push_back(value_element); } - radsim_config.AddIntVectorKnob(param, value); + radsim_config.AddIntVectorKnobPerRad(param, value, rad_id); } else if ((param == "sim_driver_period")) { std::string value_element_str; std::getline(ss, value_element_str, ' '); @@ -246,10 +398,15 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { if (value > max_period) { max_period = value; } - radsim_config.AddDoubleKnob(param, value); + radsim_config.AddDoubleKnobShared(param, value); } else if ((param == "noc_clk_period") || (param == "noc_adapters_clk_period") || (param == "design_clk_periods") || (param == "dram_clk_periods")) { + //get rad-id + std::string rad_id_str; + std::getline(ss, rad_id_str, ' '); + int rad_id = std::stoi(rad_id_str); + //get values std::vector value; std::string value_element_str; double value_element; @@ -260,25 +417,35 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { } value.push_back(value_element); } - radsim_config.AddDoubleVectorKnob(param, value); + radsim_config.AddDoubleVectorKnobPerRad(param, value, rad_id); + } else if (param == "telemetry_traces") { + std::vector value; + std::string value_element; + while (getline(ss, value_element, ' ')) { + value.push_back(value_element); + } + radsim_config.AddStringVectorKnobShared(param, value); + radsim_config.AddIntKnobShared("telemetry_num_traces", value.size()); } else if ((param == "design_noc_placement") || (param == "noc_adapters_in_arbiter") || (param == "noc_adapters_out_arbiter") || - (param == "noc_adapters_vc_mapping") || (param == "telemetry_traces") || + (param == "noc_adapters_vc_mapping") || (param == "dram_config_files")) { + //get rad-id + std::string rad_id_str; + std::getline(ss, rad_id_str, ' '); + int rad_id = std::stoi(rad_id_str); + //get values std::vector value; std::string value_element; while (getline(ss, value_element, ' ')) { value.push_back(value_element); } - radsim_config.AddStringVectorKnob(param, value); - if (param == "telemetry_traces") { - radsim_config.AddIntKnob("telemetry_num_traces", value.size()); - } + radsim_config.AddStringVectorKnobPerRad(param, value, rad_id); } else { std::cerr << "Undefined RADSim knob \"" << param << "\"" << std::endl; exit(1); } } - radsim_config.AddDoubleKnob("max_period", max_period); + //radsim_config.AddDoubleKnob("max_period", max_period); //AKB: removing, using sim_driver_period instead } \ No newline at end of file diff --git a/rad-sim/sim/radsim_config.hpp b/rad-sim/sim/radsim_config.hpp index e17cc23..9bd3ee1 100644 --- a/rad-sim/sim/radsim_config.hpp +++ b/rad-sim/sim/radsim_config.hpp @@ -30,6 +30,8 @@ class RADSimConfig { RADSimConfig(); ~RADSimConfig(); + //AKB: added to support resizing instance of class based on # of RADs + void ResizeAll(int num_rads); //AKB: changed to be general parameters aka shared across all RADs void AddIntKnobShared(const std::string& key, int val); void AddDoubleKnobShared(const std::string& key, double val); @@ -64,12 +66,20 @@ class RADSimConfig { std::vector& GetIntVectorKnobPerRad(const std::string& key, int rad_id); std::vector& GetDoubleVectorKnobPerRad(const std::string& key, int rad_id); std::vector& GetStringVectorKnobPerRad(const std::string& key, int rad_id); - bool HasIntKnob(const std::string& key); - bool HasDoubleKnob(const std::string& key); - bool HasStringKnob(const std::string& key); - bool HasIntVectorKnob(const std::string& key); - bool HasDoubleVectorKnob(const std::string& key); - bool HasStringVectorKnob(const std::string& key); + //AKB: specify if shared knob + bool HasIntKnobShared(const std::string& key); + bool HasDoubleKnobShared(const std::string& key); + bool HasStringKnobShared(const std::string& key); + bool HasIntVectorKnobShared(const std::string& key); + bool HasDoubleVectorKnobShared(const std::string& key); + bool HasStringVectorKnobShared(const std::string& key); + //AKB: rad-specific knobs + bool HasIntKnobPerRad(const std::string& key, int rad_id); + bool HasDoubleKnobPerRad(const std::string& key, int rad_id); + bool HasStringKnobPerRad(const std::string& key, int rad_id); + bool HasIntVectorKnobPerRad(const std::string& key, int rad_id); + bool HasDoubleVectorKnobPerRad(const std::string& key, int rad_id); + bool HasStringVectorKnobPerRad(const std::string& key, int rad_id); }; void ParseRADSimKnobs(const std::string& knobs_filename); diff --git a/rad-sim/sim/radsim_telemetry.cpp b/rad-sim/sim/radsim_telemetry.cpp index b529d67..1f7a828 100644 --- a/rad-sim/sim/radsim_telemetry.cpp +++ b/rad-sim/sim/radsim_telemetry.cpp @@ -64,13 +64,13 @@ void NoCTransactionTelemetry::DumpStatsToFile(const std::string& filename) { } std::vector NoCTransactionTelemetry::DumpTrafficFlows(const std::string& filename, unsigned int cycle_count, - std::vector>>& node_module_names) { - double sim_driver_period = radsim_config.GetDoubleKnob("sim_driver_period") / 1000000000.0; - unsigned int num_nocs = radsim_config.GetIntKnob("noc_num_nocs"); + std::vector>>& node_module_names, int rad_id) { //AKB: require passing of rad_id + double sim_driver_period = radsim_config.GetDoubleKnobShared("sim_driver_period") / 1000000000.0; + unsigned int num_nocs = radsim_config.GetIntKnobPerRad("noc_num_nocs", rad_id); std::vector>> traffic_bits(num_nocs); std::vector>> traffic_num_hops(num_nocs); for (unsigned int noc_id = 0; noc_id < num_nocs; noc_id++) { - unsigned int num_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", noc_id); + unsigned int num_nodes = radsim_config.GetIntVectorKnobPerRad("noc_num_nodes", noc_id); traffic_bits[noc_id].resize(num_nodes); traffic_num_hops[noc_id].resize(num_nodes); } @@ -90,7 +90,7 @@ std::vector NoCTransactionTelemetry::DumpTrafficFlows(const std::string& double aggregate_bandwidth = 0.0; std::ofstream traffic_file(filename + "_noc" + std::to_string(noc_id) + ".xml", std::ofstream::out); traffic_file << "" << endl; - unsigned int num_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", noc_id); + unsigned int num_nodes = radsim_config.GetIntVectorKnobPerRad("noc_num_nodes", noc_id, rad_id); for (unsigned int src_id = 0; src_id < num_nodes; src_id++) { if (traffic_bits[noc_id][src_id].size() > 0) { for (auto& flow : traffic_bits[noc_id][src_id]) { diff --git a/rad-sim/sim/radsim_telemetry.hpp b/rad-sim/sim/radsim_telemetry.hpp index 539a975..3ec0a6b 100644 --- a/rad-sim/sim/radsim_telemetry.hpp +++ b/rad-sim/sim/radsim_telemetry.hpp @@ -58,7 +58,7 @@ class NoCTransactionTelemetry { static void UpdateHops(int id, int num_hops); static void DumpStatsToFile(const std::string& filename); static std::vector DumpTrafficFlows(const std::string& filename, unsigned int cycle_count, - std::vector>>& node_module_names); + std::vector>>& node_module_names, int rad_id); }; // Class for recording and storing flit traces diff --git a/rad-sim/sim/radsim_utils.cpp b/rad-sim/sim/radsim_utils.cpp index ef265ee..c326ee6 100644 --- a/rad-sim/sim/radsim_utils.cpp +++ b/rad-sim/sim/radsim_utils.cpp @@ -7,7 +7,7 @@ int GetSimulationCycle(double period) { } int GetSimulationCycle() { - double period = radsim_config.GetDoubleKnob("max_period"); + double period = radsim_config.GetDoubleKnobShared("sim_driver_period"); //"max_period"); //AKB; replaced with max_period sc_time t = sc_time_stamp(); int cycle = (int)ceil(t.value() / period / 1000); return cycle; From 4dbbe34d8df4832a0bba28cb2200f27171346ba7 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 21 May 2024 11:44:09 -0400 Subject: [PATCH 066/127] Added parsing of per-RAD knobs, tested on two-RAD shared DLRM --- rad-sim/example-designs/dlrm/dlrm_driver.cpp | 6 +- rad-sim/example-designs/dlrm/dlrm_top.cpp | 10 +- .../modules/custom_feature_interaction.cpp | 4 +- .../dlrm/modules/feature_interaction.cpp | 2 +- rad-sim/example-designs/dlrm/modules/mvm.cpp | 2 +- .../example-designs/dlrm/modules/portal.cpp | 6 +- rad-sim/sim/design_context.cpp | 3 + rad-sim/sim/dram/mem_controller.cpp | 16 ++-- rad-sim/sim/main.cpp | 5 +- rad-sim/sim/noc/aximm_master_adapter.cpp | 13 +-- rad-sim/sim/noc/aximm_master_adapter.hpp | 3 +- rad-sim/sim/noc/aximm_slave_adapter.cpp | 13 +-- rad-sim/sim/noc/aximm_slave_adapter.hpp | 3 +- rad-sim/sim/noc/axis_master_adapter.cpp | 9 +- rad-sim/sim/noc/axis_master_adapter.hpp | 3 +- rad-sim/sim/noc/axis_slave_adapter.cpp | 4 +- rad-sim/sim/noc/radsim_noc.cpp | 34 +++---- rad-sim/sim/radsim_config.cpp | 91 ++++++++++--------- rad-sim/sim/radsim_config.hpp | 42 ++++----- rad-sim/sim/radsim_inter_rad.cpp | 4 +- rad-sim/sim/radsim_knobs_akb | 42 +++++++++ rad-sim/sim/radsim_module.cpp | 2 + rad-sim/sim/radsim_telemetry.cpp | 2 +- 23 files changed, 193 insertions(+), 126 deletions(-) create mode 100644 rad-sim/sim/radsim_knobs_akb diff --git a/rad-sim/example-designs/dlrm/dlrm_driver.cpp b/rad-sim/example-designs/dlrm/dlrm_driver.cpp index c576478..7f31c15 100644 --- a/rad-sim/example-designs/dlrm/dlrm_driver.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_driver.cpp @@ -76,7 +76,7 @@ dlrm_driver::dlrm_driver(const sc_module_name &name, RADSimDesignContext* radsim // Parse design configuration (number of layers & number of MVM per layer) std::string design_root_dir = - radsim_config.GetStringKnob("radsim_user_design_root_dir"); + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); std::string inputs_filename = design_root_dir + "/compiler/embedding_indecies.in"; @@ -113,7 +113,7 @@ void dlrm_driver::source() { unsigned int idx = 0; _start_cycle = - GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); while (idx < _lookup_indecies.size()) { lookup_indecies_data.write(_lookup_indecies[idx]); lookup_indecies_target_channels.write(_target_channels[idx]); @@ -214,7 +214,7 @@ void dlrm_driver::sink() { radsim_design->ReportDesignFailure(); } _end_cycle = - GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); std::cout << "Simulated " << (_end_cycle - _start_cycle) << " cycle(s)" << std::endl; diff --git a/rad-sim/example-designs/dlrm/dlrm_top.cpp b/rad-sim/example-designs/dlrm/dlrm_top.cpp index 2c0d86f..0a3ebc7 100644 --- a/rad-sim/example-designs/dlrm/dlrm_top.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_top.cpp @@ -8,7 +8,7 @@ dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_desig unsigned int embedding_lookup_fifos_depth = 16; unsigned int feature_interaction_fifos_depth = 64; unsigned int num_mem_controllers = - radsim_config.GetIntKnobPerRad("dram_num_controllers", -1); //TODO: merge with my other dlrm changes branch, then fix to use rad id + radsim_config.GetIntKnobPerRad("dram_num_controllers", radsim_design->rad_id); assert(num_mem_controllers == mem_channels.size()); unsigned int total_mem_channels = 0; for (auto &num_channels : mem_channels) { @@ -20,7 +20,7 @@ dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_desig // Parse MVM configuration std::string design_root_dir = - radsim_config.GetStringKnob("radsim_user_design_root_dir"); + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); std::string design_config_filename = design_root_dir + "/compiler/mvms.config"; @@ -59,7 +59,7 @@ dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_desig module_name_str = "feature_interaction_inst"; std::strcpy(module_name, module_name_str.c_str()); std::string feature_interaction_inst_file = - radsim_config.GetStringKnob("radsim_user_design_root_dir") + + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id) + "/compiler/instructions/feature_interaction.inst"; feature_interaction_inst = new custom_feature_interaction( module_name, line_bitwidth, element_bitwidth, total_mem_channels, @@ -116,11 +116,11 @@ dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_desig mem_clks.resize(num_mem_controllers); unsigned int ch_id = 0; std::string mem_content_init_prefix = - radsim_config.GetStringKnob("radsim_user_design_root_dir") + + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id) + "/compiler/embedding_tables/channel_"; for (unsigned int ctrl_id = 0; ctrl_id < num_mem_controllers; ctrl_id++) { double mem_clk_period = - radsim_config.GetDoubleVectorKnob("dram_clk_periods", ctrl_id); + radsim_config.GetDoubleVectorKnobPerRad("dram_clk_periods", ctrl_id, radsim_design->rad_id); module_name_str = "ext_mem_" + to_string(ctrl_id) + "_clk"; std::strcpy(module_name, module_name_str.c_str()); mem_clks[ctrl_id] = new sc_clock(module_name, mem_clk_period, SC_NS); diff --git a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp index 568653b..b0f423e 100644 --- a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp +++ b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp @@ -68,7 +68,7 @@ custom_feature_interaction::custom_feature_interaction( _ofifo_empty.init(_num_output_channels); std::string resp_filename = - radsim_config.GetStringKnob("radsim_user_design_root_dir") + + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id) + "/compiler/embedding_indecies.in"; ParseFeatureInteractionInstructions(instructions_file, _instructions, resp_filename, _num_expected_responses); @@ -242,7 +242,7 @@ void custom_feature_interaction::Tick() { for (unsigned int ch_id = 0; ch_id < _num_output_channels; ch_id++) { if (axis_interface[ch_id].tready.read() && axis_interface[ch_id].tvalid.read()) { - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); data_vector tx_tdata = _output_fifos[ch_id].front(); //std::cout << "custom_feature_interaction @ cycle " << curr_cycle << ": tx_tdata sent " << tx_tdata << " from RAD " << radsim_design->rad_id << " with tdest field " << axis_interface[ch_id].tdest.read() << std::endl; _output_fifos[ch_id].pop(); diff --git a/rad-sim/example-designs/dlrm/modules/feature_interaction.cpp b/rad-sim/example-designs/dlrm/modules/feature_interaction.cpp index 18e1de5..1479095 100644 --- a/rad-sim/example-designs/dlrm/modules/feature_interaction.cpp +++ b/rad-sim/example-designs/dlrm/modules/feature_interaction.cpp @@ -80,7 +80,7 @@ feature_interaction::feature_interaction(const sc_module_name &name, _ofifo_empty.init(_num_output_channels); std::string resp_filename = - radsim_config.GetStringKnob("radsim_user_design_root_dir") + + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id) + "/compiler/embedding_indecies.in"; ParseFeatureInteractionInstructions(instructions_file, _instructions, resp_filename, _num_expected_responses); diff --git a/rad-sim/example-designs/dlrm/modules/mvm.cpp b/rad-sim/example-designs/dlrm/modules/mvm.cpp index a8d71c5..93ec3ca 100644 --- a/rad-sim/example-designs/dlrm/modules/mvm.cpp +++ b/rad-sim/example-designs/dlrm/modules/mvm.cpp @@ -72,7 +72,7 @@ mvm::mvm(const sc_module_name &name, unsigned int id_mvm, unsigned int id_layer, std::string mem_name_str; matrix_memory.resize(DOT_PRODUCTS); std::string mvm_dir = - radsim_config.GetStringKnob("radsim_user_design_root_dir"); + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); std::string mem_init_file; for (unsigned int dot_id = 0; dot_id < DOT_PRODUCTS; dot_id++) { mem_init_file = mvm_dir + "/compiler/mvm_weights/layer" + diff --git a/rad-sim/example-designs/dlrm/modules/portal.cpp b/rad-sim/example-designs/dlrm/modules/portal.cpp index 5eae7b1..001b62b 100644 --- a/rad-sim/example-designs/dlrm/modules/portal.cpp +++ b/rad-sim/example-designs/dlrm/modules/portal.cpp @@ -56,7 +56,7 @@ void portal::Tick() { //sequential logic //Always @ positive edge of clock while (true) { - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); //Accepting incoming NoC transaction if (axis_portal_slave_interface.tvalid.read() && @@ -91,7 +91,7 @@ void portal::Tick() { //sequential logic //pop out of fifo if (!portal_axis_fifo_noc_incoming.empty()) { //test_ready_toggle = false; - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); sc_bv tx_tdata_bv = portal_axis_fifo_noc_incoming.front().tdata; data_vector tx_tdata(32); bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); @@ -190,7 +190,7 @@ void portal::Tick() { //sequential logic //pop out of fifo if (!portal_axis_fifo_noc_outgoing.empty()) { //test_ready_toggle = false; - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); sc_bv tx_tdata_bv = portal_axis_fifo_noc_outgoing.front().tdata; data_vector tx_tdata(32); bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); diff --git a/rad-sim/sim/design_context.cpp b/rad-sim/sim/design_context.cpp index 35bc5a0..f2afa24 100644 --- a/rad-sim/sim/design_context.cpp +++ b/rad-sim/sim/design_context.cpp @@ -61,6 +61,7 @@ bool IsSlavePort(std::string &port_name, RADSimModule *module_ptr) { module_ptr->_axis_master_ports.end(); bool is_aximm_master = module_ptr->_aximm_master_ports.find(port_name) != module_ptr->_aximm_master_ports.end(); + std::cout << "design_context.cpp: port_name and is_aximm_master and is_axis_master " << port_name << " " << is_aximm_master << " " << is_axis_master << std::endl; assert(is_aximm_master || is_axis_master); } return (is_axis_slave || is_aximm_slave); @@ -98,6 +99,7 @@ void RADSimDesignContext::ParseNoCPlacement(const std::string &design_path, //AK //design_path + "/" + //AKB: had added this as workaround until config-file changes placement_filename; std::ifstream placement_file(placement_filepath); + std::cout << "placement_filepath: " << placement_filepath << std::endl; std::string line; while (std::getline(placement_file, line)) { @@ -338,6 +340,7 @@ void RADSimDesignContext::RegisterModule(std::string module_name, void RADSimDesignContext::BuildDesignContext(const std::string &design_path, //AKB ADDED first arg const std::string &placement_filename, const std::string &clks_filename) { unsigned int num_nocs = radsim_config.GetIntKnobPerRad("noc_num_nocs", rad_id); + std::cout << "rad_id " << rad_id << " has num_nocs " << num_nocs << std::endl; _node_id_is_aximm.resize(num_nocs); _node_id_ports_list.resize(num_nocs); _noc_axis_slave_adapter_info.resize(num_nocs); diff --git a/rad-sim/sim/dram/mem_controller.cpp b/rad-sim/sim/dram/mem_controller.cpp index 7bf96b6..ae6106d 100644 --- a/rad-sim/sim/dram/mem_controller.cpp +++ b/rad-sim/sim/dram/mem_controller.cpp @@ -35,12 +35,14 @@ mem_controller::mem_controller(const sc_module_name &name, unsigned int dram_id, : RADSimModule(name, radsim_design), mem_clk("mem_clk"), rst("rst") { //AKB added radsim_design std::string config_file = - radsim_config.GetStringKnob("radsim_root_dir") + + radsim_config.GetStringKnobShared("radsim_root_dir") + "/sim/dram/DRAMsim3/configs/" + - radsim_config.GetStringVectorKnob("dram_config_files", dram_id) + ".ini"; + radsim_config.GetStringVectorKnobPerRad("dram_config_files", dram_id, radsim_design->rad_id) + ".ini"; + + std::cout << "mem_controller::mem_controller() config_file: " << config_file << std::endl; std::string output_dir = - radsim_config.GetStringKnob("radsim_root_dir") + "/logs"; + radsim_config.GetStringKnobShared("radsim_root_dir") + "/logs"; _dramsim = new dramsim3::MemorySystem( config_file, output_dir, @@ -49,6 +51,7 @@ mem_controller::mem_controller(const sc_module_name &name, unsigned int dram_id, dram_id); _mem_id = dram_id; _num_channels = _dramsim->GetChannels(); + std::cout << "mem_controller.cpp mem_controller() _num_channels: " << _num_channels << std::endl; mem_channels.init(_num_channels); _memory_channel_bitwidth = _dramsim->GetBusBits(); @@ -56,7 +59,7 @@ mem_controller::mem_controller(const sc_module_name &name, unsigned int dram_id, _dramsim->GetBusBits() * _dramsim->GetBurstLength(); _memory_clk_period_ns = _dramsim->GetTCK(); _controller_clk_period_ns = - radsim_config.GetDoubleVectorKnob("dram_clk_periods", dram_id); + radsim_config.GetDoubleVectorKnobPerRad("dram_clk_periods", dram_id, radsim_design->rad_id); double bitwidth_ratio = 1.0 * _controller_channel_bitwidth / _memory_channel_bitwidth; double clk_period_ratio = @@ -90,9 +93,9 @@ mem_controller::mem_controller(const sc_module_name &name, unsigned int dram_id, _output_write_queue_occupancy.init(_num_channels); _output_read_queue_occupancy.init(_num_channels); _input_queue_size = - radsim_config.GetIntVectorKnob("dram_queue_sizes", dram_id); + radsim_config.GetIntVectorKnobPerRad("dram_queue_sizes", dram_id, radsim_design->rad_id); _output_queue_size = - radsim_config.GetIntVectorKnob("dram_queue_sizes", dram_id); + radsim_config.GetIntVectorKnobPerRad("dram_queue_sizes", dram_id, radsim_design->rad_id); _num_ranks = _dramsim->GetRanks(); _num_bank_groups = _dramsim->GetBankGroups(); @@ -625,6 +628,7 @@ void mem_controller::RegisterModuleInfo() { for (unsigned int ch_id = 0; ch_id < _num_channels; ch_id++) { port_name = module_name + ".mem_channel_" + std::to_string(ch_id); + std::cout << "mem_controller::RegisterModuleInfo() port_name: " << port_name << std::endl; RegisterAximmSlavePort(port_name, &mem_channels[ch_id], _addressable_size_bytes * 8); } diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index e11e7e7..c08c5d0 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -19,9 +19,10 @@ SimTraceRecording sim_trace_probe; int sc_main(int argc, char *argv[]) { //AKB: moved from RADSimDesignContext constructor to here - std::string radsim_knobs_filename = "/sim/radsim_knobs"; + std::string radsim_knobs_filename = "/sim/radsim_knobs_akb"; std::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename; - ParseRADSimKnobs(radsim_knobs_filepath); //TODO: move this to main.cpp so it only gets called once, not per-RAD + radsim_config.ResizeAll(2); //bc two RADs + ParseRADSimKnobs(radsim_knobs_filepath); //AKB moved this to main.cpp so it only gets called once, not per-RAD //AKB: using RADSimCluster class instead of creating new above //RADSimCluster* cluster = new RADSimCluster(3); //2); diff --git a/rad-sim/sim/noc/aximm_master_adapter.cpp b/rad-sim/sim/noc/aximm_master_adapter.cpp index 259abc2..327270d 100644 --- a/rad-sim/sim/noc/aximm_master_adapter.cpp +++ b/rad-sim/sim/noc/aximm_master_adapter.cpp @@ -1,7 +1,7 @@ #include "aximm_master_adapter.hpp" aximm_master_adapter::aximm_master_adapter( - const sc_module_name &name, int node_id, int network_id, + const sc_module_name &name, unsigned int rad_id, int node_id, int network_id, BookSimConfig *noc_config, Network *noc, BufferState *buffer_state, tRoutingFunction routing_func, bool lookahead_routing, bool wait_for_tail_credit, map *ejected_flits, @@ -9,11 +9,12 @@ aximm_master_adapter::aximm_master_adapter( : sc_module(name) { // Initialize basic adapter member variables + _rad_id = rad_id; //AKB added _node_id = node_id; _network_id = network_id; _node_period = node_period; _adapter_period = adapter_period; - _noc_period = radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id); + _noc_period = radsim_config.GetDoubleVectorKnobPerRad("noc_clk_period", _network_id, _rad_id); _interface_dataw = interface_dataw; _noc_config = noc_config; @@ -26,7 +27,7 @@ aximm_master_adapter::aximm_master_adapter( // Initialize request interface (AR, AW, W) member variables _ejection_afifo_depth = - radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config.GetIntVectorKnobPerRad("noc_adapters_fifo_size", _network_id, _rad_id); _ejection_afifos.resize(AXI_NUM_REQ_TYPES); _ejection_afifo_push_counter.init(AXI_NUM_REQ_TYPES); _ejection_afifo_pop_counter.init(AXI_NUM_REQ_TYPES); @@ -45,7 +46,7 @@ aximm_master_adapter::aximm_master_adapter( // Initialize response interface (B, R) member variables _injection_afifo_depth = - radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config.GetIntVectorKnobPerRad("noc_adapters_fifo_size", _network_id, _rad_id); _axi_transaction_width = AXI4_USERW; if ((AXI4_ADDRW + AXI4_CTRLW) > (_interface_dataw + AXI4_RESPW + 1)) { _axi_transaction_width += (AXI4_ADDRW + AXI4_CTRLW); @@ -593,9 +594,9 @@ void aximm_master_adapter::InputInjection() { booksim_flit->subnetwork = 0; booksim_flit->src = _node_id; booksim_flit->ctime = GetSimulationCycle( - radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id)); + radsim_config.GetDoubleVectorKnobPerRad("noc_clk_period", _network_id, _rad_id)); booksim_flit->itime = GetSimulationCycle( - radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id)); + radsim_config.GetDoubleVectorKnobPerRad("noc_clk_period", _network_id, _rad_id)); booksim_flit->cl = 0; booksim_flit->head = _to_be_injected_flit._head; booksim_flit->tail = _to_be_injected_flit._tail; diff --git a/rad-sim/sim/noc/aximm_master_adapter.hpp b/rad-sim/sim/noc/aximm_master_adapter.hpp index aa775e3..6e7547a 100644 --- a/rad-sim/sim/noc/aximm_master_adapter.hpp +++ b/rad-sim/sim/noc/aximm_master_adapter.hpp @@ -16,6 +16,7 @@ class aximm_master_adapter : public sc_module { private: // The ID and reconfigurable width of the node this adapter is connected to + unsigned int _rad_id; int _node_id; int _network_id; int _interface_dataw; @@ -84,7 +85,7 @@ class aximm_master_adapter : public sc_module { sc_in rst; aximm_master_port aximm_interface; - aximm_master_adapter(const sc_module_name &name, int node_id, int network_id, + aximm_master_adapter(const sc_module_name &name, unsigned int rad_id, int node_id, int network_id, BookSimConfig *noc_config, Network *noc, BufferState *buffer_state, tRoutingFunction routing_func, bool lookahead_routing, bool wait_for_tail_credit, diff --git a/rad-sim/sim/noc/aximm_slave_adapter.cpp b/rad-sim/sim/noc/aximm_slave_adapter.cpp index 82508de..9948487 100644 --- a/rad-sim/sim/noc/aximm_slave_adapter.cpp +++ b/rad-sim/sim/noc/aximm_slave_adapter.cpp @@ -3,7 +3,7 @@ std::unordered_map>> stats; aximm_slave_adapter::aximm_slave_adapter( - const sc_module_name &name, int node_id, int network_id, + const sc_module_name &name, unsigned int rad_id, int node_id, int network_id, BookSimConfig *noc_config, Network *noc, BufferState *buffer_state, tRoutingFunction routing_func, bool lookahead_routing, bool wait_for_tail_credit, map *ejected_flits, @@ -11,11 +11,12 @@ aximm_slave_adapter::aximm_slave_adapter( : sc_module(name) { // Initialize basic adapter member variables + _rad_id = rad_id; //AKB added _node_id = node_id; _network_id = network_id; _node_period = node_period; _adapter_period = adapter_period; - _noc_period = radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id); + _noc_period = radsim_config.GetDoubleVectorKnobPerRad("noc_clk_period", _network_id, _rad_id); _interface_dataw = interface_dataw; _noc_config = noc_config; @@ -28,7 +29,7 @@ aximm_slave_adapter::aximm_slave_adapter( // Initialize request interface (AR, AW, W) member variables _injection_afifo_depth = - radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config.GetIntVectorKnobPerRad("noc_adapters_fifo_size", _network_id, _rad_id); _axi_transaction_width = AXI4_USERW; if ((AXI4_ADDRW + AXI4_CTRLW) > (_interface_dataw + AXI4_RESPW + 1)) { @@ -61,7 +62,7 @@ aximm_slave_adapter::aximm_slave_adapter( // Initialize response interface (B, R) member variables _ejected_booksim_flit = nullptr; _ejection_afifo_depth = - radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config.GetIntVectorKnobPerRad("noc_adapters_fifo_size", _network_id, _rad_id); _ejection_afifos.resize(AXI_NUM_RSP_TYPES); _ejection_afifo_push_counter.init(AXI_NUM_RSP_TYPES); _ejection_afifo_pop_counter.init(AXI_NUM_RSP_TYPES); @@ -402,9 +403,9 @@ void aximm_slave_adapter::InputInjection() { booksim_flit->subnetwork = 0; booksim_flit->src = _node_id; booksim_flit->ctime = GetSimulationCycle( - radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id)); + radsim_config.GetDoubleVectorKnobPerRad("noc_clk_period", _network_id, _rad_id)); booksim_flit->itime = GetSimulationCycle( - radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id)); + radsim_config.GetDoubleVectorKnobPerRad("noc_clk_period", _network_id, _rad_id)); booksim_flit->cl = 0; booksim_flit->head = _to_be_injected_flit._head; booksim_flit->tail = _to_be_injected_flit._tail; diff --git a/rad-sim/sim/noc/aximm_slave_adapter.hpp b/rad-sim/sim/noc/aximm_slave_adapter.hpp index 56346f9..3e7afd7 100644 --- a/rad-sim/sim/noc/aximm_slave_adapter.hpp +++ b/rad-sim/sim/noc/aximm_slave_adapter.hpp @@ -51,6 +51,7 @@ class aximm_slave_adapter : public sc_module { private: // The node ID, network ID and data width of the node this adapter is // connected to + unsigned int _rad_id; //AKB added int _node_id; int _network_id; int _interface_dataw; @@ -165,7 +166,7 @@ class aximm_slave_adapter : public sc_module { // AXI-MM Master Port aximm_slave_port aximm_interface; - aximm_slave_adapter(const sc_module_name &name, int node_id, int network_id, + aximm_slave_adapter(const sc_module_name &name, unsigned int rad_id, int node_id, int network_id, BookSimConfig *noc_config, Network *noc, BufferState *buffer_state, tRoutingFunction routing_func, bool lookahead_routing, bool wait_for_tail_credit, diff --git a/rad-sim/sim/noc/axis_master_adapter.cpp b/rad-sim/sim/noc/axis_master_adapter.cpp index 2ca1551..ea909b1 100644 --- a/rad-sim/sim/noc/axis_master_adapter.cpp +++ b/rad-sim/sim/noc/axis_master_adapter.cpp @@ -1,13 +1,14 @@ #include "axis_master_adapter.hpp" axis_master_adapter::axis_master_adapter( - const sc_module_name &name, int node_id, int network_id, + const sc_module_name &name, unsigned int rad_id, int node_id, int network_id, std::vector &interface_types, std::vector &interface_dataw, BookSimConfig *noc_config, Network *noc, BufferState *buffer_state, tRoutingFunction routing_func, bool lookahead_routing, bool wait_for_tail_credit, map *ejected_flits) : sc_module(name) { + _rad_id = rad_id; //AKB added _node_id = node_id; _network_id = network_id; _num_axis_interfaces = interface_types.size(); @@ -20,7 +21,7 @@ axis_master_adapter::axis_master_adapter( _num_flits[interface_id] = (int)ceil(payload_dataw * 1.0 / NOC_LINKS_PAYLOAD_WIDTH); } - _num_vcs = radsim_config.GetIntVectorKnob("noc_vcs", _network_id); + _num_vcs = radsim_config.GetIntVectorKnobPerRad("noc_vcs", _network_id, _rad_id); axis_interfaces.init(_num_axis_interfaces); _noc_config = noc_config; @@ -33,7 +34,7 @@ axis_master_adapter::axis_master_adapter( _ejected_booksim_flit = nullptr; _ejection_afifo_depth = - radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config.GetIntVectorKnobPerRad("noc_adapters_fifo_size", _network_id, _rad_id); _ejection_afifos.resize(_num_vcs); _ejection_afifo_push_counter.init(_num_vcs); _ejection_afifo_pop_counter.init(_num_vcs); @@ -44,7 +45,7 @@ axis_master_adapter::axis_master_adapter( _output_afifos.resize(_num_axis_interfaces); _output_packet_ready.resize(_num_axis_interfaces); _output_afifo_depth = - radsim_config.GetIntVectorKnob("noc_adapters_obuff_size", _network_id); + radsim_config.GetIntVectorKnobPerRad("noc_adapters_obuff_size", _network_id, _rad_id); _constructed_packet = sc_packet(); _output_chunk.resize(_num_axis_interfaces); diff --git a/rad-sim/sim/noc/axis_master_adapter.hpp b/rad-sim/sim/noc/axis_master_adapter.hpp index 13b4126..26156df 100644 --- a/rad-sim/sim/noc/axis_master_adapter.hpp +++ b/rad-sim/sim/noc/axis_master_adapter.hpp @@ -16,6 +16,7 @@ class axis_master_adapter : public sc_module { private: + unsigned int _rad_id; //AKB added for config-file related changes unsigned int _node_id; unsigned int _network_id; unsigned int _num_axis_interfaces; @@ -52,7 +53,7 @@ class axis_master_adapter : public sc_module { sc_in rst; sc_vector axis_interfaces; - axis_master_adapter(const sc_module_name &name, int node_id, int network_id, + axis_master_adapter(const sc_module_name &name, unsigned int rad_id, int node_id, int network_id, std::vector &interface_types, std::vector &interface_dataw, BookSimConfig *noc_config, Network *noc, diff --git a/rad-sim/sim/noc/axis_slave_adapter.cpp b/rad-sim/sim/noc/axis_slave_adapter.cpp index 5a39cee..2ae70c2 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.cpp +++ b/rad-sim/sim/noc/axis_slave_adapter.cpp @@ -17,7 +17,7 @@ axis_slave_adapter::axis_slave_adapter( _network_id = network_id; _node_period = node_period; _adapter_period = adapter_period; - _noc_period = radsim_config.GetDoubleVectorKnob("noc_clk_period", _network_id); + _noc_period = radsim_config.GetDoubleVectorKnobPerRad("noc_clk_period", _network_id, _rad_id); _num_axis_interfaces = interface_types.size(); _interface_types = interface_types; _interface_dataw = interface_dataw; @@ -51,7 +51,7 @@ axis_slave_adapter::axis_slave_adapter( _input_axis_transactions_afifo_depth = 2; _injection_afifo_depth = - radsim_config.GetIntVectorKnob("noc_adapters_fifo_size", _network_id); + radsim_config.GetIntVectorKnobPerRad("noc_adapters_fifo_size", _network_id, _rad_id); _injection_flit_ready = false; SC_METHOD(InputReady); diff --git a/rad-sim/sim/noc/radsim_noc.cpp b/rad-sim/sim/noc/radsim_noc.cpp index 3f1dc55..ffcc148 100644 --- a/rad-sim/sim/noc/radsim_noc.cpp +++ b/rad-sim/sim/noc/radsim_noc.cpp @@ -13,11 +13,11 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str _rad_id = rad_id; _portal_slave_name = portal_slave_name; _noc_id = noc_id; - _num_noc_nodes = radsim_config.GetIntVectorKnob("noc_num_nodes", _noc_id); + _num_noc_nodes = radsim_config.GetIntVectorKnobPerRad("noc_num_nodes", _noc_id, _rad_id); // Parse config file, initialize routing data structures and create Booksim // NoC - std::string config_filename = radsim_config.GetStringKnob("radsim_root_dir") + + std::string config_filename = radsim_config.GetStringKnobShared("radsim_root_dir") + "/sim/noc/noc" + std::to_string(noc_id) + "_config"; _config.ParseFile(config_filename); @@ -77,7 +77,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str // Create adapter axis_master_adapter *master_adapter = new axis_master_adapter( - adapter_name, axis_master_adapter_info[adapter_id]._node_id, _noc_id, + adapter_name, _rad_id, axis_master_adapter_info[adapter_id]._node_id, _noc_id, adapter_port_types, axis_master_adapter_info[adapter_id]._port_dataw, &_config, _booksim_noc, _buffer_state[axis_master_adapter_info[adapter_id]._node_id], @@ -123,10 +123,10 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str for (auto it = axis_slave_adapter_info[adapter_id]._port_types.begin(); it != axis_slave_adapter_info[adapter_id]._port_types.end(); it++) adapter_port_types.push_back(static_cast(*it)); - double adapter_module_period = radsim_config.GetDoubleVectorKnob( - "design_clk_periods", axis_slave_adapter_info[adapter_id]._module_clk_idx); - double adapter_period = radsim_config.GetDoubleVectorKnob( - "noc_adapters_clk_period", axis_slave_adapter_info[adapter_id]._adapter_clk_idx); + double adapter_module_period = radsim_config.GetDoubleVectorKnobPerRad( + "design_clk_periods", axis_slave_adapter_info[adapter_id]._module_clk_idx, _rad_id); + double adapter_period = radsim_config.GetDoubleVectorKnobPerRad( + "noc_adapters_clk_period", axis_slave_adapter_info[adapter_id]._adapter_clk_idx, _rad_id); // Create adapter axis_slave_adapter *slave_adapter = new axis_slave_adapter( @@ -167,15 +167,15 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str std::string adapter_name_str = "aximm_master_adapter_" + std::to_string(adapter_id); const char *adapter_name = adapter_name_str.c_str(); - double adapter_module_period = radsim_config.GetDoubleVectorKnob( - "design_clk_periods", aximm_master_adapter_info[adapter_id]._module_clk_idx); - double adapter_period = radsim_config.GetDoubleVectorKnob( + double adapter_module_period = radsim_config.GetDoubleVectorKnobPerRad( + "design_clk_periods", aximm_master_adapter_info[adapter_id]._module_clk_idx, _rad_id); + double adapter_period = radsim_config.GetDoubleVectorKnobPerRad( "noc_adapters_clk_period", - aximm_master_adapter_info[adapter_id]._adapter_clk_idx); + aximm_master_adapter_info[adapter_id]._adapter_clk_idx, _rad_id); // Create adapter aximm_master_adapter *master_adapter = new aximm_master_adapter( - adapter_name, aximm_master_adapter_info[adapter_id]._node_id, _noc_id, + adapter_name, _rad_id, aximm_master_adapter_info[adapter_id]._node_id, _noc_id, &_config, _booksim_noc, _buffer_state[aximm_master_adapter_info[adapter_id]._node_id], _routing_func, _lookahead_routing, _wait_for_tail_credit, @@ -210,15 +210,15 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str std::string adapter_name_str = "aximm_slave_adapter_" + std::to_string(adapter_id); const char *adapter_name = adapter_name_str.c_str(); - double adapter_module_period = radsim_config.GetDoubleVectorKnob( - "design_clk_periods", aximm_slave_adapter_info[adapter_id]._module_clk_idx); - double adapter_period = radsim_config.GetDoubleVectorKnob( + double adapter_module_period = radsim_config.GetDoubleVectorKnobPerRad( + "design_clk_periods", aximm_slave_adapter_info[adapter_id]._module_clk_idx, _rad_id); + double adapter_period = radsim_config.GetDoubleVectorKnobPerRad( "noc_adapters_clk_period", - aximm_slave_adapter_info[adapter_id]._adapter_clk_idx); + aximm_slave_adapter_info[adapter_id]._adapter_clk_idx, _rad_id); // Create adapter aximm_slave_adapter *slave_adapter = new aximm_slave_adapter( - adapter_name, aximm_slave_adapter_info[adapter_id]._node_id, _noc_id, + adapter_name, _rad_id, aximm_slave_adapter_info[adapter_id]._node_id, _noc_id, &_config, _booksim_noc, _buffer_state[aximm_slave_adapter_info[adapter_id]._node_id], _routing_func, _lookahead_routing, _wait_for_tail_credit, diff --git a/rad-sim/sim/radsim_config.cpp b/rad-sim/sim/radsim_config.cpp index 67eb8e7..f495cdb 100644 --- a/rad-sim/sim/radsim_config.cpp +++ b/rad-sim/sim/radsim_config.cpp @@ -53,35 +53,35 @@ void RADSimConfig::AddStringVectorKnobShared(const std::string &key, //RAD-specific functions // Adds a new integer configuration knob -void RADSimConfig::AddIntKnobPerRad(const std::string &key, int val, int rad_id) { +void RADSimConfig::AddIntKnobPerRad(const std::string &key, int val, unsigned int rad_id) { _int_knobs_per_rad[rad_id][key] = val; } // Adds a new double configuration knob -void RADSimConfig::AddDoubleKnobPerRad(const std::string &key, double val, int rad_id) { +void RADSimConfig::AddDoubleKnobPerRad(const std::string &key, double val, unsigned int rad_id) { _double_knobs_per_rad[rad_id][key] = val; } // Adds a new string configuration knob -void RADSimConfig::AddStringKnobPerRad(const std::string &key, std::string &val, int rad_id) { +void RADSimConfig::AddStringKnobPerRad(const std::string &key, std::string &val, unsigned int rad_id) { _string_knobs_per_rad[rad_id][key] = val; } // Adds a new integer vector configuration knob void RADSimConfig::AddIntVectorKnobPerRad(const std::string &key, - std::vector &val, int rad_id) { + std::vector &val, unsigned int rad_id) { _int_vector_knobs_per_rad[rad_id][key] = val; } // Adds a new double vector configuration knob void RADSimConfig::AddDoubleVectorKnobPerRad(const std::string &key, - std::vector &val, int rad_id) { + std::vector &val, unsigned int rad_id) { _double_vector_knobs_per_rad[rad_id][key] = val; } // Adds a new string vector configuration knob void RADSimConfig::AddStringVectorKnobPerRad(const std::string &key, - std::vector &val, int rad_id) { + std::vector &val, unsigned int rad_id) { _string_vector_knobs_per_rad[rad_id][key] = val; } @@ -180,8 +180,8 @@ RADSimConfig::GetStringVectorKnobShared(const std::string &key) { //Retrieve values of RAD-specific knobs // Gets the value of an integer configuration knob -int RADSimConfig::GetIntKnobPerRad(const std::string &key, int rad_id) { - if (_int_knobs_per_rad.find(key) == _int_knobs_per_rad.end()) { +int RADSimConfig::GetIntKnobPerRad(const std::string &key, unsigned int rad_id) { + if (_int_knobs_per_rad[rad_id].find(key) == _int_knobs_per_rad[rad_id].end()) { std::cerr << "GetIntKnobPerRAD: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); @@ -190,8 +190,8 @@ int RADSimConfig::GetIntKnobPerRad(const std::string &key, int rad_id) { } // Gets the value of a double configuration knob -double RADSimConfig::GetDoubleKnobPerRad(const std::string &key, int rad_id) { - if (_double_knobs_per_rad.find(key) == _double_knobs_per_rad.end()) { +double RADSimConfig::GetDoubleKnobPerRad(const std::string &key, unsigned int rad_id) { + if (_double_knobs_per_rad[rad_id].find(key) == _double_knobs_per_rad[rad_id].end()) { std::cerr << "GetDoubleKnobPerRAD: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); @@ -200,8 +200,8 @@ double RADSimConfig::GetDoubleKnobPerRad(const std::string &key, int rad_id) { } // Gets the value of a string configuration knob -std::string RADSimConfig::GetStringKnobPerRad(const std::string &key, int rad_id) { - if (_string_knobs_per_rad.find(key) == _string_knobs_per_rad.end()) { +std::string RADSimConfig::GetStringKnobPerRad(const std::string &key, unsigned int rad_id) { + if (_string_knobs_per_rad[rad_id].find(key) == _string_knobs_per_rad[rad_id].end()) { std::cerr << "GetStringKnobPerRAD: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); @@ -210,8 +210,8 @@ std::string RADSimConfig::GetStringKnobPerRad(const std::string &key, int rad_id } // Gets the value of an integer vector configuration knob -int RADSimConfig::GetIntVectorKnobPerRad(const std::string &key, unsigned int idx, int rad_id) { - if (_int_vector_knobs_per_rad.find(key) == _int_vector_knobs_per_rad.end()) { +int RADSimConfig::GetIntVectorKnobPerRad(const std::string &key, unsigned int idx, unsigned int rad_id) { + if (_int_vector_knobs_per_rad[rad_id].find(key) == _int_vector_knobs_per_rad[rad_id].end()) { std::cerr << "GetIntVectorKnobPerRAD: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); @@ -221,8 +221,8 @@ int RADSimConfig::GetIntVectorKnobPerRad(const std::string &key, unsigned int id // Gets the value of a double vector configuration knob double RADSimConfig::GetDoubleVectorKnobPerRad(const std::string &key, - unsigned int idx, int rad_id) { - if (_double_vector_knobs_per_rad.find(key) == _double_vector_knobs_per_rad.end()) { + unsigned int idx, unsigned int rad_id) { + if (_double_vector_knobs_per_rad[rad_id].find(key) == _double_vector_knobs_per_rad[rad_id].end()) { std::cerr << "GetDoubleVectorKnobPerRAD: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); @@ -232,18 +232,24 @@ double RADSimConfig::GetDoubleVectorKnobPerRad(const std::string &key, // Gets the value of a string vector configuration knob std::string RADSimConfig::GetStringVectorKnobPerRad(const std::string &key, - unsigned int idx, int rad_id) { - if (_string_vector_knobs_per_rad.find(key) == _string_vector_knobs_per_rad.end()) { + unsigned int idx, unsigned int rad_id) { + if (_string_vector_knobs_per_rad[rad_id].find(key) == _string_vector_knobs_per_rad[rad_id].end()) { std::cerr << "GetStringVectorKnobPerRAD: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); } + if (key == "dram_config_files" ) { + std::cout << "radsim_config.cpp: dram_config_files: " << std::endl; + for (int i = 0; i < _string_vector_knobs_per_rad[rad_id][key].size(); i++) { + std::cout << _string_vector_knobs_per_rad[rad_id][key][i] << std::endl; + } + } return _string_vector_knobs_per_rad[rad_id][key][idx]; } // Gets the value of an integer vector configuration knob -std::vector &RADSimConfig::GetIntVectorKnobPerRad(const std::string &key, int rad_id) { - if (_int_vector_knobs_per_rad.find(key) == _int_vector_knobs_per_rad.end()) { +std::vector &RADSimConfig::GetIntVectorKnobPerRad(const std::string &key, unsigned int rad_id) { + if (_int_vector_knobs_per_rad[rad_id].find(key) == _int_vector_knobs_per_rad[rad_id].end()) { std::cerr << "GetIntVectorKnobPerRAD: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); @@ -252,8 +258,8 @@ std::vector &RADSimConfig::GetIntVectorKnobPerRad(const std::string &key, i } // Gets the value of a double vector configuration knob -std::vector &RADSimConfig::GetDoubleVectorKnobPerRad(const std::string &key, int rad_id) { - if (_double_vector_knobs_per_rad.find(key) == _double_vector_knobs_per_rad.end()) { +std::vector &RADSimConfig::GetDoubleVectorKnobPerRad(const std::string &key, unsigned int rad_id) { + if (_double_vector_knobs_per_rad[rad_id].find(key) == _double_vector_knobs_per_rad[rad_id].end()) { std::cerr << "GetDoubleVectorKnobPerRAD: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); @@ -263,8 +269,8 @@ std::vector &RADSimConfig::GetDoubleVectorKnobPerRad(const std::string & // Gets the value of a string vector configuration knob std::vector & -RADSimConfig::GetStringVectorKnobPerRad(const std::string &key, int rad_id) { - if (_string_vector_knobs_per_rad.find(key) == _string_vector_knobs_per_rad.end()) { +RADSimConfig::GetStringVectorKnobPerRad(const std::string &key, unsigned int rad_id) { + if (_string_vector_knobs_per_rad[rad_id].find(key) == _string_vector_knobs_per_rad[rad_id].end()) { std::cerr << "GetStringVectorKnobPerRAD: Cannot find configuration parameter \"" << key << "\"" << std::endl; exit(1); @@ -274,62 +280,62 @@ RADSimConfig::GetStringVectorKnobPerRad(const std::string &key, int rad_id) { // Check if an integer configuration knob is defined bool RADSimConfig::HasIntKnobShared(const std::string &key) { - return (_int_knobs_shared.find(key) != _int_knobs.end()); + return (_int_knobs_shared.find(key) != _int_knobs_shared.end()); } // Check if a double configuration knob is defined bool RADSimConfig::HasDoubleKnobShared(const std::string &key) { - return (_double_knobs_shared.find(key) != _double_knobs.end()); + return (_double_knobs_shared.find(key) != _double_knobs_shared.end()); } // Check if a string configuration knob is defined bool RADSimConfig::HasStringKnobShared(const std::string &key) { - return (_string_knobs_shared.find(key) != _string_knobs.end()); + return (_string_knobs_shared.find(key) != _string_knobs_shared.end()); } // Check if an integer vector configuration knob is defined bool RADSimConfig::HasIntVectorKnobShared(const std::string &key) { - return (_int_vector_knobs_shared.find(key) != _int_vector_knobs.end()); + return (_int_vector_knobs_shared.find(key) != _int_vector_knobs_shared.end()); } // Check if a double vector configuration knob is defined bool RADSimConfig::HasDoubleVectorKnobShared(const std::string &key) { - return (_double_vector_knobs_shared.find(key) != _double_vector_knobs.end()); + return (_double_vector_knobs_shared.find(key) != _double_vector_knobs_shared.end()); } // Check if a string vector configuration knob is defined bool RADSimConfig::HasStringVectorKnobShared(const std::string &key) { - return (_string_vector_knobs_shared.find(key) != _string_vector_knobs.end()); + return (_string_vector_knobs_shared.find(key) != _string_vector_knobs_shared.end()); } //AKB: per-RAD functions to check if has certain knob defined for that RAD // Check if an integer configuration knob is defined -bool RADSimConfig::HasIntKnobPerRad(const std::string &key, int rad_id) { +bool RADSimConfig::HasIntKnobPerRad(const std::string &key, unsigned int rad_id) { return (_int_knobs_per_rad[rad_id].find(key) != _int_knobs_per_rad[rad_id].end()); } // Check if a double configuration knob is defined -bool RADSimConfig::HasDoubleKnobPerRad(const std::string &key, int rad_id) { +bool RADSimConfig::HasDoubleKnobPerRad(const std::string &key, unsigned int rad_id) { return (_double_knobs_per_rad[rad_id].find(key) != _double_knobs_per_rad[rad_id].end()); } // Check if a string configuration knob is defined -bool RADSimConfig::HasStringKnobPerRad(const std::string &key, int rad_id) { +bool RADSimConfig::HasStringKnobPerRad(const std::string &key, unsigned int rad_id) { return (_string_knobs_per_rad[rad_id].find(key) != _string_knobs_per_rad[rad_id].end()); } // Check if an integer vector configuration knob is defined -bool RADSimConfig::HasIntVectorKnobPerRad(const std::string &key, int rad_id) { +bool RADSimConfig::HasIntVectorKnobPerRad(const std::string &key, unsigned int rad_id) { return (_int_vector_knobs_per_rad[rad_id].find(key) != _int_vector_knobs_per_rad[rad_id].end()); } // Check if a double vector configuration knob is defined -bool RADSimConfig::HasDoubleVectorKnobPerRad(const std::string &key, int rad_id) { +bool RADSimConfig::HasDoubleVectorKnobPerRad(const std::string &key, unsigned int rad_id) { return (_double_vector_knobs_per_rad[rad_id].find(key) != _double_vector_knobs_per_rad[rad_id].end()); } // Check if a string vector configuration knob is defined -bool RADSimConfig::HasStringVectorKnobPerRad(const std::string &key, int rad_id) { +bool RADSimConfig::HasStringVectorKnobPerRad(const std::string &key, unsigned int rad_id) { return (_string_vector_knobs_per_rad[rad_id].find(key) != _string_vector_knobs_per_rad[rad_id].end()); } @@ -357,7 +363,7 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { } else if ((param == "radsim_user_design_root_dir") || (param == "design_name")) { //example: design_name 2 dlrm std::string rad_id_str; std::getline(ss, rad_id_str, ' '); - int rad_id = std::stoi(rad_id_str); + unsigned int rad_id = std::stoi(rad_id_str); std::string value; std::getline(ss, value, ' '); radsim_config.AddStringKnobPerRad(param, value, rad_id); @@ -369,7 +375,7 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { } else if ((param == "noc_num_nocs") || (param == "dram_num_controllers")) { std::string rad_id_str; std::getline(ss, rad_id_str, ' '); - int rad_id = std::stoi(rad_id_str); + unsigned int rad_id = std::stoi(rad_id_str); std::string value_str; std::getline(ss, value_str, ' '); int value = std::stoi(value_str); @@ -381,7 +387,7 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { //get rad-id std::string rad_id_str; std::getline(ss, rad_id_str, ' '); - int rad_id = std::stoi(rad_id_str); + unsigned int rad_id = std::stoi(rad_id_str); //get values std::vector value; std::string value_element_str; @@ -405,7 +411,7 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { //get rad-id std::string rad_id_str; std::getline(ss, rad_id_str, ' '); - int rad_id = std::stoi(rad_id_str); + unsigned int rad_id = std::stoi(rad_id_str); //get values std::vector value; std::string value_element_str; @@ -434,11 +440,14 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { //get rad-id std::string rad_id_str; std::getline(ss, rad_id_str, ' '); - int rad_id = std::stoi(rad_id_str); + unsigned int rad_id = std::stoi(rad_id_str); //get values std::vector value; std::string value_element; while (getline(ss, value_element, ' ')) { + if (param == "dram_config_files") { + std::cout << "radsim_config.cpp: " << value_element << std::endl; + } value.push_back(value_element); } radsim_config.AddStringVectorKnobPerRad(param, value, rad_id); diff --git a/rad-sim/sim/radsim_config.hpp b/rad-sim/sim/radsim_config.hpp index 9bd3ee1..55c6428 100644 --- a/rad-sim/sim/radsim_config.hpp +++ b/rad-sim/sim/radsim_config.hpp @@ -40,12 +40,12 @@ class RADSimConfig { void AddDoubleVectorKnobShared(const std::string& key, std::vector& val); void AddStringVectorKnobShared(const std::string& key, std::vector& val); //AKB: rad-specific parameters - void AddIntKnobPerRad(const std::string& key, int val, int rad_id); - void AddDoubleKnobPerRad(const std::string& key, double val, int rad_id); - void AddStringKnobPerRad(const std::string& key, std::string& val, int rad_id); - void AddIntVectorKnobPerRad(const std::string& key, std::vector& val, int rad_id); - void AddDoubleVectorKnobPerRad(const std::string& key, std::vector& val, int rad_id); - void AddStringVectorKnobPerRad(const std::string& key, std::vector& val, int rad_id); + void AddIntKnobPerRad(const std::string& key, int val, unsigned int rad_id); + void AddDoubleKnobPerRad(const std::string& key, double val, unsigned int rad_id); + void AddStringKnobPerRad(const std::string& key, std::string& val, unsigned int rad_id); + void AddIntVectorKnobPerRad(const std::string& key, std::vector& val, unsigned int rad_id); + void AddDoubleVectorKnobPerRad(const std::string& key, std::vector& val, unsigned int rad_id); + void AddStringVectorKnobPerRad(const std::string& key, std::vector& val, unsigned int rad_id); //AKB: changed to be parameters shared across all RADs int GetIntKnobShared(const std::string& key); double GetDoubleKnobShared(const std::string& key); @@ -57,15 +57,15 @@ class RADSimConfig { std::vector& GetDoubleVectorKnobShared(const std::string& key); std::vector& GetStringVectorKnobShared(const std::string& key); //AKB: rad-specific parameters - int GetIntKnobPerRad(const std::string& key, int rad_id); - double GetDoubleKnobPerRad(const std::string& key, int rad_id); - std::string GetStringKnobPerRad(const std::string& key, int rad_id); - int GetIntVectorKnobPerRad(const std::string& key, unsigned int idx, int rad_id); - double GetDoubleVectorKnobPerRad(const std::string& key, unsigned int idx, int rad_id); - std::string GetStringVectorKnobPerRad(const std::string& key, unsigned int idx, int rad_id); - std::vector& GetIntVectorKnobPerRad(const std::string& key, int rad_id); - std::vector& GetDoubleVectorKnobPerRad(const std::string& key, int rad_id); - std::vector& GetStringVectorKnobPerRad(const std::string& key, int rad_id); + int GetIntKnobPerRad(const std::string& key, unsigned int rad_id); + double GetDoubleKnobPerRad(const std::string& key, unsigned int rad_id); + std::string GetStringKnobPerRad(const std::string& key, unsigned int rad_id); + int GetIntVectorKnobPerRad(const std::string& key, unsigned int idx, unsigned int rad_id); + double GetDoubleVectorKnobPerRad(const std::string& key, unsigned int idx, unsigned int rad_id); + std::string GetStringVectorKnobPerRad(const std::string& key, unsigned int idx, unsigned int rad_id); + std::vector& GetIntVectorKnobPerRad(const std::string& key, unsigned int rad_id); + std::vector& GetDoubleVectorKnobPerRad(const std::string& key, unsigned int rad_id); + std::vector& GetStringVectorKnobPerRad(const std::string& key, unsigned int rad_id); //AKB: specify if shared knob bool HasIntKnobShared(const std::string& key); bool HasDoubleKnobShared(const std::string& key); @@ -74,12 +74,12 @@ class RADSimConfig { bool HasDoubleVectorKnobShared(const std::string& key); bool HasStringVectorKnobShared(const std::string& key); //AKB: rad-specific knobs - bool HasIntKnobPerRad(const std::string& key, int rad_id); - bool HasDoubleKnobPerRad(const std::string& key, int rad_id); - bool HasStringKnobPerRad(const std::string& key, int rad_id); - bool HasIntVectorKnobPerRad(const std::string& key, int rad_id); - bool HasDoubleVectorKnobPerRad(const std::string& key, int rad_id); - bool HasStringVectorKnobPerRad(const std::string& key, int rad_id); + bool HasIntKnobPerRad(const std::string& key, unsigned int rad_id); + bool HasDoubleKnobPerRad(const std::string& key, unsigned int rad_id); + bool HasStringKnobPerRad(const std::string& key, unsigned int rad_id); + bool HasIntVectorKnobPerRad(const std::string& key, unsigned int rad_id); + bool HasDoubleVectorKnobPerRad(const std::string& key, unsigned int rad_id); + bool HasStringVectorKnobPerRad(const std::string& key, unsigned int rad_id); }; void ParseRADSimKnobs(const std::string& knobs_filename); diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 96898d2..5a23800 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -90,7 +90,7 @@ RADSimInterRad::writeFifo() { wait(); while (true) { //get current cycle for experiments - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); //iterate thru all RADs for (int i = 0; i < num_rads; i++) { @@ -166,7 +166,7 @@ RADSimInterRad::readFifo() { //std::cout << "inter_rad fifo free before READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; //get current cycle for experiments - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); //sc_bv val = this->fifos[0]->read(); for (int i = 0; i < num_rads; i++) { //iterate through all rad's fifos diff --git a/rad-sim/sim/radsim_knobs_akb b/rad-sim/sim/radsim_knobs_akb new file mode 100644 index 0000000..97a79e8 --- /dev/null +++ b/rad-sim/sim/radsim_knobs_akb @@ -0,0 +1,42 @@ +radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim +design_name 0 dlrm +design_name 1 dlrm +noc_num_nocs 0 1 +noc_clk_period 0 1.0 +noc_vcs 0 5 +noc_payload_width 0 82 +noc_num_nodes 0 100 +design_noc_placement 0 dlrm.place +noc_adapters_clk_period 0 1.25 +noc_adapters_fifo_size 0 16 +noc_adapters_obuff_size 0 2 +noc_adapters_in_arbiter 0 fixed_rr +noc_adapters_out_arbiter 0 priority_rr +noc_adapters_vc_mapping 0 direct +design_clk_periods 0 5.0 2.0 3.32 1.5 +noc_num_nocs 1 1 +noc_clk_period 1 1.0 +noc_vcs 1 5 +noc_payload_width 1 82 +noc_num_nodes 1 100 +design_noc_placement 1 dlrm.place +noc_adapters_clk_period 1 1.25 +noc_adapters_fifo_size 1 16 +noc_adapters_obuff_size 1 2 +noc_adapters_in_arbiter 1 fixed_rr +noc_adapters_out_arbiter 1 priority_rr +noc_adapters_vc_mapping 1 direct +design_clk_periods 1 5.0 2.0 3.32 1.5 +sim_driver_period 5.0 +telemetry_log_verbosity 2 +telemetry_traces Embedding LU Mem0 Mem1 Mem2 Mem3 Feature Inter. MVM first MVM last +dram_num_controllers 0 4 +dram_clk_periods 0 3.32 3.32 2.0 2.0 +dram_queue_sizes 0 64 64 64 64 +dram_config_files 0 DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 +dram_num_controllers 1 4 +dram_clk_periods 1 3.32 3.32 2.0 2.0 +dram_queue_sizes 1 64 64 64 64 +dram_config_files 1 DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 +radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm +radsim_user_design_root_dir 1 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm \ No newline at end of file diff --git a/rad-sim/sim/radsim_module.cpp b/rad-sim/sim/radsim_module.cpp index bab5035..4bda822 100644 --- a/rad-sim/sim/radsim_module.cpp +++ b/rad-sim/sim/radsim_module.cpp @@ -42,6 +42,7 @@ void RADSimModule::RegisterAxisMasterPort(std::string &port_name, void RADSimModule::RegisterAximmSlavePort(std::string &port_name, aximm_slave_port *port_ptr, unsigned int port_dataw) { + std::cout << "radsim_module.cpp RegisterAximmSlavePort() port_name: " << port_name << std::endl; _ordered_aximm_slave_ports.push_back(port_name); _aximm_slave_ports[port_name] = port_ptr; _ports_dataw[port_name] = port_dataw; @@ -53,6 +54,7 @@ void RADSimModule::RegisterAximmSlavePort(std::string &port_name, void RADSimModule::RegisterAximmMasterPort(std::string &port_name, aximm_master_port *port_ptr, unsigned int port_dataw) { + std::cout << "radsim_module.cpp RegisterAximmMasterPort() port_name: " << port_name << std::endl; _ordered_aximm_master_ports.push_back(port_name); _aximm_master_ports[port_name] = port_ptr; _ports_dataw[port_name] = port_dataw; diff --git a/rad-sim/sim/radsim_telemetry.cpp b/rad-sim/sim/radsim_telemetry.cpp index 1f7a828..adbb03f 100644 --- a/rad-sim/sim/radsim_telemetry.cpp +++ b/rad-sim/sim/radsim_telemetry.cpp @@ -70,7 +70,7 @@ std::vector NoCTransactionTelemetry::DumpTrafficFlows(const std::string& std::vector>> traffic_bits(num_nocs); std::vector>> traffic_num_hops(num_nocs); for (unsigned int noc_id = 0; noc_id < num_nocs; noc_id++) { - unsigned int num_nodes = radsim_config.GetIntVectorKnobPerRad("noc_num_nodes", noc_id); + unsigned int num_nodes = radsim_config.GetIntVectorKnobPerRad("noc_num_nodes", noc_id, rad_id); traffic_bits[noc_id].resize(num_nodes); traffic_num_hops[noc_id].resize(num_nodes); } From 4865cd526ded0612a82104923e1ea5cd8ac72f9b Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 22 May 2024 10:17:33 -0400 Subject: [PATCH 067/127] Added working python-based generation of multi-RAD radsim_knobs --- rad-sim/config.py | 345 +++++++++++-------- rad-sim/sim/main.cpp | 2 +- rad-sim/sim/noc/noc0_config0_config_akb_test | 33 ++ rad-sim/sim/noc/noc0_config1_config_akb_test | 33 ++ rad-sim/sim/radsim_config.cpp | 9 +- rad-sim/sim/radsim_knobs_akb_test | 45 +++ rad-sim/uni_config.yml | 56 +-- 7 files changed, 347 insertions(+), 176 deletions(-) create mode 100644 rad-sim/sim/noc/noc0_config0_config_akb_test create mode 100644 rad-sim/sim/noc/noc0_config1_config_akb_test create mode 100644 rad-sim/sim/radsim_knobs_akb_test diff --git a/rad-sim/config.py b/rad-sim/config.py index 52b1d18..e728cf3 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -3,29 +3,36 @@ import yaml import sys import shutil +from itertools import repeat +from copy import deepcopy -def parse_config_file(config_filename, booksim_params, radsim_header_params, radsim_knobs): +def parse_config_file(config_filename, booksim_params, radsim_header_params, radsim_knobs, cluster_knobs): with open(config_filename, 'r') as yaml_config: config = yaml.safe_load(yaml_config) + config_counter = 0 for config_section in config: - #print(config_section + ':') + print(config_section + ':') for param_category, param in config[config_section].items(): - if (isinstance(param, dict)): - #print(' ' + param_category + ':') + if 'config' in config_section and (isinstance(param, dict)): + print(' ' + param_category + ':') for param, param_value in param.items(): - #print(' ' + param, param_value) + print(' ' + param, param_value) param_name = param_category + '_' + param invalid_param = True - if param_name in booksim_params: - booksim_params[param_name] = param_value + if param_name in booksim_params[config_counter]: + booksim_params[config_counter][param_name] = param_value invalid_param = False - if param_name in radsim_header_params: - radsim_header_params[param_name] = param_value + if param_name in radsim_header_params[config_counter]: + radsim_header_params[config_counter][param_name] = param_value invalid_param = False - if param_name in radsim_knobs: - radsim_knobs[param_name] = param_value + if param_name in radsim_knobs[config_counter]: + radsim_knobs[config_counter][param_name] = param_value invalid_param = False + if param_name == "dram_config_files": + print('param_value') + print(config_counter) + print(param_value) if invalid_param: print("Config Error: Parameter " + param_name + " is invalid!") @@ -33,37 +40,40 @@ def parse_config_file(config_filename, booksim_params, radsim_header_params, rad elif config_section == "cluster": param_value = param #bc no subsection, so correction param = param_category #bc no subsection, so correction - #print(' ' + param, param_value) - param_name = 'cluster_' + param + print(' ' + param, param_value) + if 'topology' in param or 'configs' in param: + param_name = 'cluster_' + param + else: + param_name = param #print(param_name) + #TODO: below doesnt rlly make sense for cluster-level params, fix up invalid_param = True - if param_name in booksim_params: - booksim_params[param_name] = param_value + if param_name in cluster_knobs: + cluster_knobs[param_name] = param_value invalid_param = False - if param_name in radsim_header_params: - radsim_header_params[param_name] = param_value - invalid_param = False - if param_name in radsim_knobs: - radsim_knobs[param_name] = param_value - invalid_param = False - + # if param_name in booksim_params[config_counter]: + # booksim_params[config_counter][param_name] = param_value + # invalid_param = False + # if param_name in radsim_header_params[config_counter]: + # radsim_header_params[config_counter][param_name] = param_value + # invalid_param = False + # if param_name in radsim_knobs[config_counter]: + # radsim_knobs[config_counter][param_name] = param_value + # invalid_param = False if invalid_param: print("Config Error: Parameter " + param_name + " is invalid!") exit(1) + config_counter += 1 - '''noc_num_nodes = [] - for n in range(radsim_knobs["noc_num_nocs"]): - noc_num_nodes.append(0) - radsim_knobs["noc_num_nodes"] = noc_num_nodes - radsim_header_params["noc_num_nodes"] = noc_num_nodes - - radsim_knobs["radsim_user_design_root_dir"] = radsim_knobs["radsim_root_dir"] + "/example-designs/" + radsim_knobs["design_name"] + for i in range(0, num_configs): + radsim_knobs[i]["radsim_user_design_root_dir"] = cluster_knobs["radsim_root_dir"] + "/example-designs/" + radsim_knobs[i]["design_name"] - longest_clk_period = radsim_knobs["design_clk_periods"][0] - for p in radsim_knobs["design_clk_periods"]: - if p > longest_clk_period: - longest_clk_period = p - radsim_knobs["sim_driver_period"] = longest_clk_period''' + #commented out below bc yaml file now explicitly sets sim_driver_perid + # longest_clk_period = radsim_knobs["design_clk_periods"][0] + # for p in radsim_knobs["design_clk_periods"]: + # if p > longest_clk_period: + # longest_clk_period = p + # radsim_knobs["sim_driver_period"] = longest_clk_period def print_config(booksim_params, radsim_header_params, radsim_knobs): @@ -78,98 +88,105 @@ def print_config(booksim_params, radsim_header_params, radsim_knobs): print(param + " : " + str(radsim_knobs[param])) -def generate_booksim_config_files(booksim_params, radsim_header_params, radsim_knobs): - for i in range(booksim_params["noc_num_nocs"]): - booksim_config_file = open(booksim_params["radsim_root_dir"] + "/sim/noc/noc" + str(i) + "_config_akb_test", "w") #AKB created temp file to test - - # Booksim topology configuration - booksim_config_file.write("// Topology\n") - noc_topology = booksim_params["noc_topology"][i] - noc_type = booksim_params["noc_type"][i] - if noc_topology == "mesh" or noc_topology == "torus": - # A 3D RAD instance is modeled as a concenterated mesh NoC - if noc_type == "2d": - booksim_config_file.write("topology = " + noc_topology + ";\n") - elif noc_type == "3d" and noc_topology == "mesh": - booksim_config_file.write("topology = cmesh;\n") - else: - print("Config Error: noc_type parameter value has to be 2d or 3d") - exit(1) +def generate_booksim_config_files(booksim_params, radsim_header_params, radsim_knobs, cluster_knobs): + for curr_config_num in range(num_configs): + for i in range(booksim_params[curr_config_num]["noc_num_nocs"]): + booksim_config_file = open(booksim_params[curr_config_num]["radsim_root_dir"] + "/sim/noc/noc" + str(i) + "_config"+ str(curr_config_num) + "_config_akb_test", "w") #AKB created temp file to test + + # Booksim topology configuration + booksim_config_file.write("// Topology\n") + noc_topology = booksim_params[curr_config_num]["noc_topology"][i] + noc_type = booksim_params[curr_config_num]["noc_type"][i] + if noc_topology == "mesh" or noc_topology == "torus": + # A 3D RAD instance is modeled as a concenterated mesh NoC + if noc_type == "2d": + booksim_config_file.write("topology = " + noc_topology + ";\n") + elif noc_type == "3d" and noc_topology == "mesh": + booksim_config_file.write("topology = cmesh;\n") + else: + print("Config Error: noc_type parameter value has to be 2d or 3d") + exit(1) + + # Booksim does not support assymetric meshes so it is simplified as a square mesh assuming that a simple dim + # order routing will never use the links/routers outside the specified grid + noc_dim_x = booksim_params[curr_config_num]["noc_dim_x"][i] + noc_dim_y = booksim_params[curr_config_num]["noc_dim_y"][i] + larger_noc_dim = noc_dim_x + if noc_dim_y > noc_dim_x: + larger_noc_dim = noc_dim_y + booksim_config_file.write("k = " + str(larger_noc_dim) + ";\n") + booksim_config_file.write("n = 2;\n") + + # Booksim supports concentrated meshes of 4 nodes per router only -- RAD-Sim works around that by modeling + # 3D RAD instances as a concentrated mesh of FPGA node, base die node, and two "empty" nodes by adjusting + # their IDs + if noc_type == "3d": + radsim_header_params[curr_config_num]["noc_num_nodes"][i] = (larger_noc_dim * larger_noc_dim * 4) + #TODO: make changes to have per-RAD booksim config too. for now, just hacky workaround to get radsim_knobs set + #for j in range(cluster_knobs["num_rads"]): + #radsim_knobs[j]["noc_num_nodes"][i] = larger_noc_dim * larger_noc_dim * 4 + radsim_knobs[curr_config_num]["noc_num_nodes"][i] = larger_noc_dim * larger_noc_dim * 4 + booksim_config_file.write("c = 4;\n") + booksim_config_file.write("xr = 2;\n") + booksim_config_file.write("yr = 2;\n") + else: + radsim_header_params[curr_config_num]["noc_num_nodes"][i] = (larger_noc_dim * larger_noc_dim) + #TODO: make changes to have per-RAD booksim config AND radsim_header_params too. for now, just hacky workaround to get radsim_knobs set + # for j in range(cluster_knobs["num_rads"]): + # radsim_knobs[j]["noc_num_nodes"][i] = larger_noc_dim * larger_noc_dim + radsim_knobs[curr_config_num]["noc_num_nodes"][i] = larger_noc_dim * larger_noc_dim + + elif noc_topology == "anynet": + booksim_config_file.write("topology = anynet;\n") + booksim_config_file.write("network_file = " + booksim_params[curr_config_num]["noc_anynet_file"][i] + ";\n") + if radsim_header_params[curr_config_num]["noc_num_nodes"][i] == 0: + print("Config Error: Number of nodes parameter missing for anynet NoC topologies!") + exit(1) - # Booksim does not support assymetric meshes so it is simplified as a square mesh assuming that a simple dim - # order routing will never use the links/routers outside the specified grid - noc_dim_x = booksim_params["noc_dim_x"][i] - noc_dim_y = booksim_params["noc_dim_y"][i] - larger_noc_dim = noc_dim_x - if noc_dim_y > noc_dim_x: - larger_noc_dim = noc_dim_y - booksim_config_file.write("k = " + str(larger_noc_dim) + ";\n") - booksim_config_file.write("n = 2;\n") - - # Booksim supports concentrated meshes of 4 nodes per router only -- RAD-Sim works around that by modeling - # 3D RAD instances as a concentrated mesh of FPGA node, base die node, and two "empty" nodes by adjusting - # their IDs - if noc_type == "3d": - radsim_header_params["noc_num_nodes"][i] = (larger_noc_dim * larger_noc_dim * 4) - radsim_knobs["noc_num_nodes"][i] = larger_noc_dim * larger_noc_dim * 4 - booksim_config_file.write("c = 4;\n") - booksim_config_file.write("xr = 2;\n") - booksim_config_file.write("yr = 2;\n") else: - radsim_header_params["noc_num_nodes"][i] = (larger_noc_dim * larger_noc_dim) - radsim_knobs["noc_num_nodes"][i] = larger_noc_dim * larger_noc_dim - - elif noc_topology == "anynet": - booksim_config_file.write("topology = anynet;\n") - booksim_config_file.write("network_file = " + booksim_params["noc_anynet_file"][i] + ";\n") - if radsim_header_params["noc_num_nodes"][i] == 0: - print("Config Error: Number of nodes parameter missing for anynet NoC topologies!") + print("Config Error: This NoC topology is not supported by RAD-Sim!") exit(1) - - else: - print("Config Error: This NoC topology is not supported by RAD-Sim!") - exit(1) - booksim_config_file.write("\n") - - # Booksim routing function configuration - booksim_config_file.write("// Routing\n") - booksim_config_file.write("routing_function = " + booksim_params["noc_routing_func"][i] + ";\n") - booksim_config_file.write("\n") - - # Booksim flow control configuration - booksim_config_file.write("// Flow control\n") - noc_vcs = booksim_params["noc_vcs"][i] - noc_num_packet_types = booksim_params["noc_num_packet_types"][i] - if noc_vcs % noc_num_packet_types != 0: - print("Config Error: Number of virtual channels has to be a multiple of the number of packet types!") - exit(1) - if noc_num_packet_types > 5: - print("Config Error: RAD-Sim supports up to 5 packet types") - exit(1) - noc_num_vcs_per_packet_type = int(noc_vcs / noc_num_packet_types) - booksim_config_file.write("num_vcs = " + str(noc_vcs) + ";\n") - booksim_config_file.write("vc_buf_size = " + str(booksim_params["noc_vc_buffer_size"][i]) + ";\n") - booksim_config_file.write("output_buffer_size = "+ str(booksim_params["noc_output_buffer_size"][i])+ ";\n") - booksim_flit_types = ["read_request", "write_request", "write_data", "read_reply", "write_reply"] - vc_count = 0 - for t in range(noc_num_packet_types): - booksim_config_file.write(booksim_flit_types[t] + "_begin_vc = " + str(vc_count) + ";\n") - vc_count = vc_count + noc_num_vcs_per_packet_type - booksim_config_file.write(booksim_flit_types[t] + "_end_vc = " + str(vc_count - 1) + ";\n") - booksim_config_file.write("\n") - - # Booksim router architecture and delays configuration - booksim_config_file.write("// Router architecture & delays\n") - booksim_config_file.write("router = " + booksim_params["noc_router_uarch"][i] + ";\n") - booksim_config_file.write("vc_allocator = " + booksim_params["noc_vc_allocator"][i] + ";\n") - booksim_config_file.write("sw_allocator = " + booksim_params["noc_sw_allocator"][i] + ";\n") - booksim_config_file.write("alloc_iters = 1;\n") - booksim_config_file.write("wait_for_tail_credit = 0;\n") - booksim_config_file.write("credit_delay = " + str(booksim_params["noc_credit_delay"][i]) + ";\n") - booksim_config_file.write("routing_delay = " + str(booksim_params["noc_routing_delay"][i]) + ";\n") - booksim_config_file.write("vc_alloc_delay = " + str(booksim_params["noc_vc_alloc_delay"][i]) + ";\n") - booksim_config_file.write("sw_alloc_delay = " + str(booksim_params["noc_sw_alloc_delay"][i]) + ";\n") - booksim_config_file.close() + booksim_config_file.write("\n") + + # Booksim routing function configuration + booksim_config_file.write("// Routing\n") + booksim_config_file.write("routing_function = " + booksim_params[curr_config_num]["noc_routing_func"][i] + ";\n") + booksim_config_file.write("\n") + + # Booksim flow control configuration + booksim_config_file.write("// Flow control\n") + noc_vcs = booksim_params[curr_config_num]["noc_vcs"][i] + noc_num_packet_types = booksim_params[curr_config_num]["noc_num_packet_types"][i] + if noc_vcs % noc_num_packet_types != 0: + print("Config Error: Number of virtual channels has to be a multiple of the number of packet types!") + exit(1) + if noc_num_packet_types > 5: + print("Config Error: RAD-Sim supports up to 5 packet types") + exit(1) + noc_num_vcs_per_packet_type = int(noc_vcs / noc_num_packet_types) + booksim_config_file.write("num_vcs = " + str(noc_vcs) + ";\n") + booksim_config_file.write("vc_buf_size = " + str(booksim_params[curr_config_num]["noc_vc_buffer_size"][i]) + ";\n") + booksim_config_file.write("output_buffer_size = "+ str(booksim_params[curr_config_num]["noc_output_buffer_size"][i])+ ";\n") + booksim_flit_types = ["read_request", "write_request", "write_data", "read_reply", "write_reply"] + vc_count = 0 + for t in range(noc_num_packet_types): + booksim_config_file.write(booksim_flit_types[t] + "_begin_vc = " + str(vc_count) + ";\n") + vc_count = vc_count + noc_num_vcs_per_packet_type + booksim_config_file.write(booksim_flit_types[t] + "_end_vc = " + str(vc_count - 1) + ";\n") + booksim_config_file.write("\n") + + # Booksim router architecture and delays configuration + booksim_config_file.write("// Router architecture & delays\n") + booksim_config_file.write("router = " + booksim_params[curr_config_num]["noc_router_uarch"][i] + ";\n") + booksim_config_file.write("vc_allocator = " + booksim_params[curr_config_num]["noc_vc_allocator"][i] + ";\n") + booksim_config_file.write("sw_allocator = " + booksim_params[curr_config_num]["noc_sw_allocator"][i] + ";\n") + booksim_config_file.write("alloc_iters = 1;\n") + booksim_config_file.write("wait_for_tail_credit = 0;\n") + booksim_config_file.write("credit_delay = " + str(booksim_params[curr_config_num]["noc_credit_delay"][i]) + ";\n") + booksim_config_file.write("routing_delay = " + str(booksim_params[curr_config_num]["noc_routing_delay"][i]) + ";\n") + booksim_config_file.write("vc_alloc_delay = " + str(booksim_params[curr_config_num]["noc_vc_alloc_delay"][i]) + ";\n") + booksim_config_file.write("sw_alloc_delay = " + str(booksim_params[curr_config_num]["noc_sw_alloc_delay"][i]) + ";\n") + booksim_config_file.close() def generate_radsim_params_header(radsim_header_params): @@ -284,16 +301,30 @@ def generate_radsim_params_header(radsim_header_params): radsim_params_header_file.close() -def generate_radsim_config_file(radsim_knobs): +def generate_radsim_config_file(radsim_knobs, cluster_knobs): radsim_config_file = open(radsim_header_params["radsim_root_dir"] + "/sim/radsim_knobs_akb_test", "w") #AKB created temp file to test - for param in radsim_knobs: - radsim_config_file.write(param + " ") - if isinstance(radsim_knobs[param], list): - for value in radsim_knobs[param]: + for i in range(len(cluster_knobs["cluster_configs"])): + curr_config_num = cluster_knobs["cluster_configs"][i] #bc config # for a certain RAD may or may not match RAD ID + for param in radsim_knobs[i]: + radsim_config_file.write(param + " " + str(i) + " ") # second element is RAD ID + if isinstance(radsim_knobs[curr_config_num][param], list): + for value in radsim_knobs[curr_config_num][param]: + radsim_config_file.write(str(value) + " ") + radsim_config_file.write("\n") + else: + radsim_config_file.write(str(radsim_knobs[curr_config_num][param]) + "\n") + for param in cluster_knobs: #for params shared across cluster + if param == 'configs': + continue + else: + radsim_config_file.write(param + " " ) + + if isinstance(cluster_knobs[param], list): + for value in cluster_knobs[param]: radsim_config_file.write(str(value) + " ") radsim_config_file.write("\n") else: - radsim_config_file.write(str(radsim_knobs[param]) + "\n") + radsim_config_file.write(str(cluster_knobs[param]) + "\n") radsim_config_file.close() def generate_radsim_main(design_name): @@ -354,14 +385,20 @@ def prepare_build_dir(design_names): #os.system("cd ..;") # Get design name from command line argument -if len(sys.argv) < 2: - print("Invalid arguments: python config.py ") +if len(sys.argv) < 3: + print("Invalid arguments: python config.py <[optional] other_design_names>") exit(1) +num_configs = int(sys.argv[1]) design_names = set() #No duplicating design include statements and cmake commands -for i in range(1, len(sys.argv)): #skip 0th argument (that is current program name) +for i in range(2, len(sys.argv)): #skip 0th argument (that is current program name), and 1st (number_of_configs) design_names.add(sys.argv[i]) print(sys.argv[i]) +config_indices = [] +for n in range(0, num_configs): + config_indices.append(n) +print(config_indices) + # Check if design directory exists for design_name in design_names: if not(os.path.isdir(os.getcwd() + "/example-designs/" + design_name)): @@ -373,7 +410,7 @@ def prepare_build_dir(design_names): config_filename = "uni_config.yml" # List default parameter values -'''booksim_params = { +booksim_params = { "radsim_root_dir": os.getcwd(), "noc_type": "2d", "noc_num_nocs": 1, @@ -411,7 +448,7 @@ def prepare_build_dir(design_names): "interfaces_max_axi_data_width": 512, } radsim_knobs = { #includes cluster config - "radsim_root_dir": os.getcwd(), + #"radsim_root_dir": os.getcwd(), "design_name": design_name, "noc_num_nocs": 1, "noc_clk_period": [0.571], @@ -426,29 +463,43 @@ def prepare_build_dir(design_names): "noc_adapters_out_arbiter": ["priority_rr"], "noc_adapters_vc_mapping": ["direct"], "design_clk_periods": [5.0], - "sim_driver_period": 5.0, - "telemetry_log_verbosity": 0, - "telemetry_traces": ["trace0", "trace1"], + # "sim_driver_period": 5.0, + # "telemetry_log_verbosity": 0, + # "telemetry_traces": ["trace0", "trace1"], "dram_num_controllers": 0, "dram_clk_periods": [2.0], "dram_queue_sizes": [64], - "dram_config_files": ["HBM2_8Gb_x128"], - "cluster_num_rads":[1], - "cluster_configs":["config_0"], - "cluster_topology":["all-to-all"], - "cluster_connection_model":["wire"] + "dram_config_files": ["HBM2_8Gb_x128"] +} -}''' +cluster_knobs = { #shared among all RADs + "radsim_root_dir": os.getcwd(), + "sim_driver_period": 5.0, + "telemetry_log_verbosity": 0, + "telemetry_traces": ["trace0", "trace1"], + "num_rads": 1, + "cluster_configs": [0], + "cluster_topology": 'all-to-all' +} + +#deep copy (to allow changes to each dict) +radsim_knobs_per_rad = list(deepcopy(radsim_knobs) for i in range(num_configs)) +#print(radsim_knobs_cluster) +radsim_header_params_per_rad = list(deepcopy(radsim_header_params) for i in range(num_configs)) +booksim_params_per_rad = list(deepcopy(booksim_params) for i in range(num_configs)) # Parse configuration file -#parse_config_file(config_filename, booksim_params, radsim_header_params, radsim_knobs) +parse_config_file(config_filename, booksim_params_per_rad, radsim_header_params_per_rad, radsim_knobs_per_rad, cluster_knobs) +print(radsim_knobs_per_rad) +print(cluster_knobs) #print_config(booksim_params, radsim_header_params, radsim_knobs) # Generate RAD-Sim input files -#generate_booksim_config_files(booksim_params, radsim_header_params, radsim_knobs) +generate_booksim_config_files(booksim_params_per_rad, radsim_header_params_per_rad, radsim_knobs_per_rad, cluster_knobs) #generate_radsim_params_header(radsim_header_params) -#generate_radsim_config_file(radsim_knobs) +generate_radsim_config_file(radsim_knobs_per_rad, cluster_knobs) #generate_radsim_main(design_name) -prepare_build_dir(design_names) + +#prepare_build_dir(design_names) #THIS WORKS -- commenting out for testing multi-rad config files print("RAD-Sim was configured successfully!") diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index c08c5d0..59a6a36 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -19,7 +19,7 @@ SimTraceRecording sim_trace_probe; int sc_main(int argc, char *argv[]) { //AKB: moved from RADSimDesignContext constructor to here - std::string radsim_knobs_filename = "/sim/radsim_knobs_akb"; + std::string radsim_knobs_filename = "/sim/radsim_knobs_akb_test"; std::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename; radsim_config.ResizeAll(2); //bc two RADs ParseRADSimKnobs(radsim_knobs_filepath); //AKB moved this to main.cpp so it only gets called once, not per-RAD diff --git a/rad-sim/sim/noc/noc0_config0_config_akb_test b/rad-sim/sim/noc/noc0_config0_config_akb_test new file mode 100644 index 0000000..94f70f1 --- /dev/null +++ b/rad-sim/sim/noc/noc0_config0_config_akb_test @@ -0,0 +1,33 @@ +// Topology +topology = mesh; +k = 10; +n = 2; + +// Routing +routing_function = dim_order; + +// Flow control +num_vcs = 5; +vc_buf_size = 16; +output_buffer_size = 8; +read_request_begin_vc = 0; +read_request_end_vc = 0; +write_request_begin_vc = 1; +write_request_end_vc = 1; +write_data_begin_vc = 2; +write_data_end_vc = 2; +read_reply_begin_vc = 3; +read_reply_end_vc = 3; +write_reply_begin_vc = 4; +write_reply_end_vc = 4; + +// Router architecture & delays +router = iq; +vc_allocator = islip; +sw_allocator = islip; +alloc_iters = 1; +wait_for_tail_credit = 0; +credit_delay = 1; +routing_delay = 1; +vc_alloc_delay = 1; +sw_alloc_delay = 1; diff --git a/rad-sim/sim/noc/noc0_config1_config_akb_test b/rad-sim/sim/noc/noc0_config1_config_akb_test new file mode 100644 index 0000000..94f70f1 --- /dev/null +++ b/rad-sim/sim/noc/noc0_config1_config_akb_test @@ -0,0 +1,33 @@ +// Topology +topology = mesh; +k = 10; +n = 2; + +// Routing +routing_function = dim_order; + +// Flow control +num_vcs = 5; +vc_buf_size = 16; +output_buffer_size = 8; +read_request_begin_vc = 0; +read_request_end_vc = 0; +write_request_begin_vc = 1; +write_request_end_vc = 1; +write_data_begin_vc = 2; +write_data_end_vc = 2; +read_reply_begin_vc = 3; +read_reply_end_vc = 3; +write_reply_begin_vc = 4; +write_reply_end_vc = 4; + +// Router architecture & delays +router = iq; +vc_allocator = islip; +sw_allocator = islip; +alloc_iters = 1; +wait_for_tail_credit = 0; +credit_delay = 1; +routing_delay = 1; +vc_alloc_delay = 1; +sw_alloc_delay = 1; diff --git a/rad-sim/sim/radsim_config.cpp b/rad-sim/sim/radsim_config.cpp index f495cdb..56bc05c 100644 --- a/rad-sim/sim/radsim_config.cpp +++ b/rad-sim/sim/radsim_config.cpp @@ -356,7 +356,7 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { // Based on parameter name, parse a single or a vector of values of int, // double or string data types - if (param == "radsim_root_dir") { + if ( (param == "radsim_root_dir") || (param == "cluster_topology") ){ //TODO: support other topologies, for now this param does not do anything actively std::string value; std::getline(ss, value, ' '); radsim_config.AddStringKnobShared(param, value); @@ -367,7 +367,7 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { std::string value; std::getline(ss, value, ' '); radsim_config.AddStringKnobPerRad(param, value, rad_id); - } else if (param == "telemetry_log_verbosity") { + } else if ( (param == "telemetry_log_verbosity") || (param == "num_rads") ) { std::string value_str; std::getline(ss, value_str, ' '); int value = std::stoi(value_str); @@ -451,7 +451,10 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { value.push_back(value_element); } radsim_config.AddStringVectorKnobPerRad(param, value, rad_id); - } else { + } else if (param == "cluster_configs") { + continue; //go to next iteration, not using this knob for anything currently. was used to generate the radsim_knobs file. + } + else { std::cerr << "Undefined RADSim knob \"" << param << "\"" << std::endl; exit(1); } diff --git a/rad-sim/sim/radsim_knobs_akb_test b/rad-sim/sim/radsim_knobs_akb_test new file mode 100644 index 0000000..b91b345 --- /dev/null +++ b/rad-sim/sim/radsim_knobs_akb_test @@ -0,0 +1,45 @@ +design_name 0 dlrm +noc_num_nocs 0 1 +noc_clk_period 0 1.0 +noc_vcs 0 5 +noc_payload_width 0 82 +noc_num_nodes 0 100 +design_noc_placement 0 dlrm.place +noc_adapters_clk_period 0 1.25 +noc_adapters_fifo_size 0 16 +noc_adapters_obuff_size 0 2 +noc_adapters_in_arbiter 0 fixed_rr +noc_adapters_out_arbiter 0 priority_rr +noc_adapters_vc_mapping 0 direct +design_clk_periods 0 5.0 2.0 3.32 1.5 +dram_num_controllers 0 4 +dram_clk_periods 0 3.32 3.32 2.0 2.0 +dram_queue_sizes 0 64 64 64 64 +dram_config_files 0 DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 +radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm +design_name 1 dlrm +noc_num_nocs 1 1 +noc_clk_period 1 1.0 +noc_vcs 1 5 +noc_payload_width 1 82 +noc_num_nodes 1 100 +design_noc_placement 1 dlrm.place +noc_adapters_clk_period 1 1.25 +noc_adapters_fifo_size 1 16 +noc_adapters_obuff_size 1 2 +noc_adapters_in_arbiter 1 fixed_rr +noc_adapters_out_arbiter 1 priority_rr +noc_adapters_vc_mapping 1 direct +design_clk_periods 1 5.0 2.0 3.32 1.5 +dram_num_controllers 1 4 +dram_clk_periods 1 3.32 3.32 2.0 2.0 +dram_queue_sizes 1 64 64 64 64 +dram_config_files 1 DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 +radsim_user_design_root_dir 1 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm +radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim +sim_driver_period 5.0 +telemetry_log_verbosity 2 +telemetry_traces Embedding LU Mem0 Mem1 Mem2 Mem3 Feature Inter. MVM first MVM last +num_rads 2 +cluster_configs 0 1 +cluster_topology all-to-all diff --git a/rad-sim/uni_config.yml b/rad-sim/uni_config.yml index 698ee22..abeb641 100644 --- a/rad-sim/uni_config.yml +++ b/rad-sim/uni_config.yml @@ -3,13 +3,13 @@ config0: type: ['2d'] num_nocs: 1 clk_period: [1.0] - payload_width: [166] + payload_width: [82] topology: ['mesh'] - dim_x: [4] - dim_y: [4] + dim_x: [10] + dim_y: [10] routing_func: ['dim_order'] vcs: [5] - vc_buffer_size: [8] + vc_buffer_size: [16] output_buffer_size: [8] num_packet_types: [5] router_uarch: ['iq'] @@ -28,27 +28,29 @@ config0: out_arbiter: ['priority_rr'] vc_mapping: ['direct'] + dram: + num_controllers: 4 + clk_periods: [3.32, 3.32, 2.0, 2.0] + queue_sizes: [64, 64, 64, 64] + config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] + design: - name: 'add' - noc_placement: ['add.place'] - clk_periods: [5.0] - - telemetry: - log_verbosity: 2 - traces: [] + name: 'dlrm' + noc_placement: ['dlrm.place'] + clk_periods: [5.0, 2.0, 3.32, 1.5] config1: noc: type: ['2d'] num_nocs: 1 clk_period: [1.0] - payload_width: [166] + payload_width: [82] topology: ['mesh'] - dim_x: [4] - dim_y: [4] + dim_x: [10] + dim_y: [10] routing_func: ['dim_order'] vcs: [5] - vc_buffer_size: [8] + vc_buffer_size: [16] output_buffer_size: [8] num_packet_types: [5] router_uarch: ['iq'] @@ -67,17 +69,21 @@ config1: out_arbiter: ['priority_rr'] vc_mapping: ['direct'] + dram: + num_controllers: 4 + clk_periods: [3.32, 3.32, 2.0, 2.0] + queue_sizes: [64, 64, 64, 64] + config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] + design: - name: 'mult' - noc_placement: ['mult.place'] - clk_periods: [5.0] + name: 'dlrm' + noc_placement: ['dlrm.place'] + clk_periods: [5.0, 2.0, 3.32, 1.5] - telemetry: - log_verbosity: 2 - traces: [] - cluster: + sim_driver_period: 5.0 + telemetry_log_verbosity: 2 + telemetry_traces: ['Embedding LU', 'Mem0', 'Mem1', 'Mem2', 'Mem3', 'Feature Inter.', 'MVM first', 'MVM last'] num_rads: 2 - configs: ["config_0", "config_1"] - topology: "all-to-all" - connection_model: "wire" \ No newline at end of file + configs: [0, 1] + topology: 'all-to-all' \ No newline at end of file From 4cea3320d6006c7fdb9caf8eb00b26b025e4885f Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 22 May 2024 10:42:04 -0400 Subject: [PATCH 068/127] Clean up hardcoded paths and num_rads to use the parsed configs --- rad-sim/example-designs/add/add_top.cpp | 3 +-- rad-sim/example-designs/dlrm/dlrm_top.cpp | 2 +- rad-sim/example-designs/mult/mult_top.cpp | 3 +-- rad-sim/sim/design_context.cpp | 15 +++++---------- rad-sim/sim/design_context.hpp | 8 ++++---- rad-sim/sim/main.cpp | 4 +++- 6 files changed, 15 insertions(+), 20 deletions(-) diff --git a/rad-sim/example-designs/add/add_top.cpp b/rad-sim/example-designs/add/add_top.cpp index b1e0dd9..3638c4a 100644 --- a/rad-sim/example-designs/add/add_top.cpp +++ b/rad-sim/example-designs/add/add_top.cpp @@ -33,8 +33,7 @@ add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); //top drives portal bc top receives slave inputs - radsim_design->BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add", "add.place", - "add.clks"); + radsim_design->BuildDesignContext("add.place", "add.clks"); radsim_design->CreateSystemNoCs(rst); radsim_design->ConnectModulesToNoC(); } diff --git a/rad-sim/example-designs/dlrm/dlrm_top.cpp b/rad-sim/example-designs/dlrm/dlrm_top.cpp index 0a3ebc7..1651ef9 100644 --- a/rad-sim/example-designs/dlrm/dlrm_top.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_top.cpp @@ -145,7 +145,7 @@ dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_desig portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); //top drives portal bc top receives slave inputs - radsim_design->BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm", "dlrm.place", "dlrm.clks"); + radsim_design->BuildDesignContext("dlrm.place", "dlrm.clks"); radsim_design->CreateSystemNoCs(rst); radsim_design->ConnectModulesToNoC(); } diff --git a/rad-sim/example-designs/mult/mult_top.cpp b/rad-sim/example-designs/mult/mult_top.cpp index ba55a2b..cbd946c 100644 --- a/rad-sim/example-designs/mult/mult_top.cpp +++ b/rad-sim/example-designs/mult/mult_top.cpp @@ -34,8 +34,7 @@ mult_top::mult_top(const sc_module_name &name, RADSimDesignContext* radsim_desig portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); - radsim_design->BuildDesignContext("/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/mult", "mult.place", - "mult.clks"); + radsim_design->BuildDesignContext("mult.place", "mult.clks"); radsim_design->CreateSystemNoCs(rst); radsim_design->ConnectModulesToNoC(); } diff --git a/rad-sim/sim/design_context.cpp b/rad-sim/sim/design_context.cpp index f2afa24..c19ab9d 100644 --- a/rad-sim/sim/design_context.cpp +++ b/rad-sim/sim/design_context.cpp @@ -92,11 +92,9 @@ uint64_t DeterminedBaseAddress(int noc_id, int node_id, int rad_id) { return base_addr; } -void RADSimDesignContext::ParseNoCPlacement(const std::string &design_path, //AKB ADDED first arg - const std::string &placement_filename) { +void RADSimDesignContext::ParseNoCPlacement(const std::string &placement_filename) { std::string placement_filepath = radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", rad_id) + "/" + - //design_path + "/" + //AKB: had added this as workaround until config-file changes placement_filename; std::ifstream placement_file(placement_filepath); std::cout << "placement_filepath: " << placement_filepath << std::endl; @@ -304,11 +302,9 @@ void RADSimDesignContext::ParseNoCPlacement(const std::string &design_path, //AK } } -void RADSimDesignContext::ParseClockSettings(const std::string &design_path, //AKB ADDED first arg - const std::string &clks_filename) { +void RADSimDesignContext::ParseClockSettings(const std::string &clks_filename) { std::string clks_filepath = radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", rad_id) + "/" + - //design_path + "/" + //AKB: had added this as workaround until config-file changes clks_filename; std::ifstream clks_file(clks_filepath); @@ -337,8 +333,7 @@ void RADSimDesignContext::RegisterModule(std::string module_name, _design_modules[module_name] = module_ptr; } -void RADSimDesignContext::BuildDesignContext(const std::string &design_path, //AKB ADDED first arg - const std::string &placement_filename, const std::string &clks_filename) { +void RADSimDesignContext::BuildDesignContext(const std::string &placement_filename, const std::string &clks_filename) { unsigned int num_nocs = radsim_config.GetIntKnobPerRad("noc_num_nocs", rad_id); std::cout << "rad_id " << rad_id << " has num_nocs " << num_nocs << std::endl; _node_id_is_aximm.resize(num_nocs); @@ -356,8 +351,8 @@ void RADSimDesignContext::BuildDesignContext(const std::string &design_path, //A _num_noc_aximm_slave_ports.resize(num_nocs); _num_noc_aximm_master_ports.resize(num_nocs); - ParseNoCPlacement(design_path, placement_filename); //AKB ADDED first arg - ParseClockSettings(design_path, clks_filename); + ParseNoCPlacement(placement_filename); + ParseClockSettings(clks_filename); for (unsigned int noc_id = 0; noc_id < num_nocs; noc_id++) { for (auto node_it = _node_id_ports_list[noc_id].begin(); diff --git a/rad-sim/sim/design_context.hpp b/rad-sim/sim/design_context.hpp index 24418d0..a1e40c5 100644 --- a/rad-sim/sim/design_context.hpp +++ b/rad-sim/sim/design_context.hpp @@ -63,11 +63,11 @@ class RADSimDesignContext { std::string portal_slave_name; RADSimDesignContext(unsigned int rad_id_); ~RADSimDesignContext(); - void ParseNoCPlacement(const std::string &design_path, const std::string &placement_filename); //AKB added first arg - void ParseClockSettings(const std::string &design_path, const std::string &clks_filename); //AKB added first arg + void ParseNoCPlacement(const std::string &placement_filename); + void ParseClockSettings(const std::string &clks_filename); void RegisterModule(std::string module_name, RADSimModule *module_ptr); - void BuildDesignContext(const std::string &design_path, const std::string &placement_filename, - const std::string &clks_filename); //AKB added first arg + void BuildDesignContext(const std::string &placement_filename, + const std::string &clks_filename); void CreateSystemNoCs(sc_in &rst); void ConnectModulesToNoC(); diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 59a6a36..ee09ca9 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -24,9 +24,11 @@ int sc_main(int argc, char *argv[]) { radsim_config.ResizeAll(2); //bc two RADs ParseRADSimKnobs(radsim_knobs_filepath); //AKB moved this to main.cpp so it only gets called once, not per-RAD + int num_rads_parsed = radsim_config.GetIntKnobShared("num_rads"); + std::cout << "num_rads_parsed: " << num_rads_parsed << std::endl; //AKB: using RADSimCluster class instead of creating new above //RADSimCluster* cluster = new RADSimCluster(3); //2); - RADSimCluster* cluster = new RADSimCluster(2); + RADSimCluster* cluster = new RADSimCluster(num_rads_parsed); gWatchOut = &cout; int log_verbosity = radsim_config.GetIntKnobShared("telemetry_log_verbosity"); From f0bb30b97137381327250f6cbd6c5036caaff81d Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 22 May 2024 11:09:55 -0400 Subject: [PATCH 069/127] Added count of packet drops to inter-RAD --- rad-sim/sim/radsim_inter_rad.cpp | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 5a23800..c51c0da 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -71,6 +71,7 @@ RADSimInterRad::ConnectRadAxi(int i) { } bool wrote_yet = false; +int write_fifo_packet_drop_count = 0; void RADSimInterRad::writeFifo() { /* @@ -129,6 +130,10 @@ RADSimInterRad::writeFifo() { //std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << curr_transaction.tdata.to_uint64() << std::endl; fifos_latency_counters[dest_rad].push_back(0); //for latency counters } + else { + std::cout << "WRITE FIFO FULL: packet dropped at inter_rad: could not write into internal fifo. Packets dropped count: " << write_fifo_packet_drop_count << std::endl; + write_fifo_packet_drop_count++; + } //all_axis_slave_ports[i]->tready.write(false); } /*else if (!all_axis_slave_ports[i]->tready.read()) { From 7c47b1bc4dbbb599e59ea2148fd4a8770fb6b26b Mon Sep 17 00:00:00 2001 From: abnashkb Date: Fri, 21 Jun 2024 11:38:48 -0400 Subject: [PATCH 070/127] Added per-RAD booksim NoC config, moved portal module creation and most connections outside of example design user code --- rad-sim/config.py | 7 +- rad-sim/example-designs/dlrm/dlrm_top.cpp | 23 +- rad-sim/example-designs/dlrm/dlrm_top.hpp | 2 +- rad-sim/sim/CMakeLists.txt | 4 +- rad-sim/sim/design_top.hpp | 18 ++ ...nfig0_config_akb_test => noc0_rad0_config} | 0 ...nfig1_config_akb_test => noc0_rad1_config} | 0 rad-sim/sim/noc/radsim_noc.cpp | 1 + rad-sim/sim/portal.cpp | 247 ++++++++++++++++++ rad-sim/sim/portal.hpp | 56 ++++ 10 files changed, 341 insertions(+), 17 deletions(-) rename rad-sim/sim/noc/{noc0_config0_config_akb_test => noc0_rad0_config} (100%) rename rad-sim/sim/noc/{noc0_config1_config_akb_test => noc0_rad1_config} (100%) create mode 100644 rad-sim/sim/portal.cpp create mode 100644 rad-sim/sim/portal.hpp diff --git a/rad-sim/config.py b/rad-sim/config.py index e728cf3..74161d3 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -89,9 +89,10 @@ def print_config(booksim_params, radsim_header_params, radsim_knobs): def generate_booksim_config_files(booksim_params, radsim_header_params, radsim_knobs, cluster_knobs): - for curr_config_num in range(num_configs): + for curr_rad_id in range(len(cluster_knobs["cluster_configs"])): #curr_config_num in range(num_configs): + curr_config_num = cluster_knobs["cluster_configs"][curr_rad_id] #retrieve the config num by rad ID for i in range(booksim_params[curr_config_num]["noc_num_nocs"]): - booksim_config_file = open(booksim_params[curr_config_num]["radsim_root_dir"] + "/sim/noc/noc" + str(i) + "_config"+ str(curr_config_num) + "_config_akb_test", "w") #AKB created temp file to test + booksim_config_file = open(booksim_params[curr_config_num]["radsim_root_dir"] + "/sim/noc/noc" + str(i) + "_rad" + str(curr_config_num) + "_config", "w") #AKB created temp file to test # Booksim topology configuration booksim_config_file.write("// Topology\n") @@ -490,8 +491,6 @@ def prepare_build_dir(design_names): # Parse configuration file parse_config_file(config_filename, booksim_params_per_rad, radsim_header_params_per_rad, radsim_knobs_per_rad, cluster_knobs) -print(radsim_knobs_per_rad) -print(cluster_knobs) #print_config(booksim_params, radsim_header_params, radsim_knobs) # Generate RAD-Sim input files diff --git a/rad-sim/example-designs/dlrm/dlrm_top.cpp b/rad-sim/example-designs/dlrm/dlrm_top.cpp index 1651ef9..68edff2 100644 --- a/rad-sim/example-designs/dlrm/dlrm_top.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_top.cpp @@ -1,6 +1,6 @@ #include -dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : sc_module(name) { +dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : design_top(radsim_design) { //}, rst) { //sc_module(name) { this->radsim_design = radsim_design; unsigned int line_bitwidth = 512; unsigned int element_bitwidth = 16; @@ -134,16 +134,17 @@ dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_desig ch_id += mem_channels[ctrl_id]; } - //create portal module - module_name_str = "portal_inst"; - std::strcpy(module_name, module_name_str.c_str()); - portal_inst = new portal(module_name, radsim_design); - portal_inst->rst(rst); - //portal_inst->portal_recvd(this->portal_recvd); + // //create portal module + // module_name_str = "portal_inst"; + // std::strcpy(module_name, module_name_str.c_str()); + // portal_inst = new portal(module_name, radsim_design); + // portal_inst->rst(rst); + this->portal_inst->rst(rst); + // //portal_inst->portal_recvd(this->portal_recvd); - //connect master to master instead, to expose to top - portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); - portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); //top drives portal bc top receives slave inputs + // //connect master to master instead, to expose to top + // portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); + // portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); //top drives portal bc top receives slave inputs radsim_design->BuildDesignContext("dlrm.place", "dlrm.clks"); radsim_design->CreateSystemNoCs(rst); @@ -161,5 +162,5 @@ dlrm_top::~dlrm_top() { delete mvm; } } - delete portal_inst; + //delete portal_inst; //AKB commenting out to debug end of sim segfault } \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/dlrm_top.hpp b/rad-sim/example-designs/dlrm/dlrm_top.hpp index 0144dc6..de096f1 100644 --- a/rad-sim/example-designs/dlrm/dlrm_top.hpp +++ b/rad-sim/example-designs/dlrm/dlrm_top.hpp @@ -15,7 +15,7 @@ class dlrm_top : public design_top { //sc_module { private: - portal *portal_inst; + //portal *portal_inst; embedding_lookup *embedding_lookup_inst; custom_feature_interaction *feature_interaction_inst; std::vector> mvms; diff --git a/rad-sim/sim/CMakeLists.txt b/rad-sim/sim/CMakeLists.txt index 5873ba0..389fe4c 100644 --- a/rad-sim/sim/CMakeLists.txt +++ b/rad-sim/sim/CMakeLists.txt @@ -35,6 +35,7 @@ set(srcfiles radsim_utils.cpp radsim_cluster.cpp radsim_inter_rad.cpp + portal.cpp ) set(hdrfiles @@ -48,11 +49,12 @@ set(hdrfiles radsim_inter_rad.hpp design_top.hpp design_system.hpp + portal.hpp ) add_compile_options(-Wall -Wextra -pedantic) set(CMAKE_CXX_FLAGS_DEBUG "-g") -set(CMAKE_CXX_FLAGS_RELEASE "-O3") +set(CMAKE_CXX_FLAGS_RELEASE "-O3 -g") add_library(radsim STATIC ${srcfiles} ${hdrfiles}) target_link_libraries(radsim PUBLIC SystemC::systemc booksim noc dram design_dlrm) diff --git a/rad-sim/sim/design_top.hpp b/rad-sim/sim/design_top.hpp index 8758bc6..dac9f97 100644 --- a/rad-sim/sim/design_top.hpp +++ b/rad-sim/sim/design_top.hpp @@ -2,6 +2,7 @@ #include #include +#include //#define DATAW 128 @@ -11,4 +12,21 @@ class design_top : virtual public sc_module { //sc_out> portal_out; axis_slave_port design_top_portal_axis_slave; //TODO: add back here, for now just directly putting into child class add_top axis_master_port design_top_portal_axis_master; + portal* portal_inst; + design_top(RADSimDesignContext* radsim_design) { //, sc_in rst) { + //create portal module + std::string module_name_str = "portal_inst"; + char module_name[25]; + std::strcpy(module_name, module_name_str.c_str()); + portal_inst = new portal(module_name, radsim_design); + // portal_inst->rst(rst); //AKB: commented out to try to fix Info: (I804) /IEEE_Std_1666/deprecated: interface and/or port binding in port constructors is deprecated + //portal_inst->portal_recvd(this->portal_recvd); + + //connect master to master instead, to expose to top + portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); + portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); //top drives portal bc top receives slave inputs + } + ~design_top() { + delete portal_inst; + } }; \ No newline at end of file diff --git a/rad-sim/sim/noc/noc0_config0_config_akb_test b/rad-sim/sim/noc/noc0_rad0_config similarity index 100% rename from rad-sim/sim/noc/noc0_config0_config_akb_test rename to rad-sim/sim/noc/noc0_rad0_config diff --git a/rad-sim/sim/noc/noc0_config1_config_akb_test b/rad-sim/sim/noc/noc0_rad1_config similarity index 100% rename from rad-sim/sim/noc/noc0_config1_config_akb_test rename to rad-sim/sim/noc/noc0_rad1_config diff --git a/rad-sim/sim/noc/radsim_noc.cpp b/rad-sim/sim/noc/radsim_noc.cpp index ffcc148..15b1fe2 100644 --- a/rad-sim/sim/noc/radsim_noc.cpp +++ b/rad-sim/sim/noc/radsim_noc.cpp @@ -19,6 +19,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str // NoC std::string config_filename = radsim_config.GetStringKnobShared("radsim_root_dir") + "/sim/noc/noc" + std::to_string(noc_id) + + "_rad" + std::to_string(rad_id) + "_config"; _config.ParseFile(config_filename); InitializeRoutingMap(_config); diff --git a/rad-sim/sim/portal.cpp b/rad-sim/sim/portal.cpp new file mode 100644 index 0000000..001b62b --- /dev/null +++ b/rad-sim/sim/portal.cpp @@ -0,0 +1,247 @@ +#include + +portal::portal(const sc_module_name &name, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design) { + + this->radsim_design = radsim_design; + + //combinational logic + SC_METHOD(Assign); + sensitive << rst; // << axis_portal_master_interface.tready; //TODO: add back if inter-rad eventually supports backpressure in this direction + //sequential logic + SC_CTHREAD(Tick, clk.pos()); + // This function must be defined & called for any RAD-Sim module to register + // its info for automatically connecting to the NoC + reset_signal_is(rst, true); // Reset is active high + this->RegisterModuleInfo(); //can comment out if not connecting to NoC +} + + +portal::~portal() {} + +void portal::Assign() { //combinational logic + if (rst) { + portal_axis_slave.tready.write(false); + axis_portal_slave_interface.tready.write(false); + } + else { + //Always ready to accept from NoC because we have FIFO buffers in both directions + portal_axis_slave.tready.write(true); //axis_portal_master_interface.tready.read()) //TODO: replace if support backpressure onto inter-rad + axis_portal_slave_interface.tready.write(true); + } +} + +void bv_to_data_vector( + sc_bv &bitvector, data_vector &datavector, + unsigned int num_elements) { + + unsigned int start_idx, end_idx; + unsigned int _bitwidth = 16; //AKB: extra added + for (unsigned int e = 0; e < num_elements; e++) { + start_idx = e * _bitwidth; + end_idx = (e + 1) * _bitwidth; + datavector[e] = bitvector.range(end_idx - 1, start_idx).to_int(); + } +} + +int counter = 0; +sc_bv data_to_buffer = 0; +sc_bv dest_device = 1; //for testing, fixed at 1 to send to RAD1 which has mult design; //#define AXIS_USERW 66 +//bool got_data = false; +void portal::Tick() { //sequential logic + //portal_recvd.write(0); + portal_axis_master.tvalid.write(false); + //bool test_ready_toggle = false; + wait(); + //Always @ positive edge of clock + while (true) { + + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); + + //Accepting incoming NoC transaction + if (axis_portal_slave_interface.tvalid.read() && + axis_portal_slave_interface.tready.read()) { + //std::cout << "Also got here" << std:: endl; + // std::cout << "DLRM design raising valid data to send over portal module on cycle " << curr_cycle << " , will see valid high next clk cycle " << module_name << ": Got Transaction (user = " + // << axis_portal_slave_interface.tuser.read().to_uint64() << ") (value = " + // << axis_portal_slave_interface.tdata.read().to_uint64() << ")! Destination field is " + // << axis_portal_slave_interface.tdest.read().to_uint64() + // << std::endl; + data_to_buffer = axis_portal_slave_interface.tdata.read(); + //got_data = true; + portal_axis_fields curr_transaction = { + axis_portal_slave_interface.tvalid.read(), + axis_portal_slave_interface.tready.read(), + axis_portal_slave_interface.tdata.read(), + axis_portal_slave_interface.tstrb.read(), + axis_portal_slave_interface.tkeep.read(), + axis_portal_slave_interface.tlast.read(), + axis_portal_slave_interface.tid.read(), + axis_portal_slave_interface.tdest.read(), + axis_portal_slave_interface.tuser.read() //tuser field + }; + + portal_axis_fifo_noc_incoming.push(curr_transaction); + } + + //Sending outgoing inter-rad data + //warning: must do this before next if-else block so that we pop before reading front. otherwise we get outtdated value on second turn. + //we see valid as high the clock cycle AFTER we set it as high in the if-else below + if (portal_axis_master.tvalid.read() && portal_axis_master.tready.read()) { // && test_ready_toggle) { + //pop out of fifo + if (!portal_axis_fifo_noc_incoming.empty()) { + //test_ready_toggle = false; + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); + sc_bv tx_tdata_bv = portal_axis_fifo_noc_incoming.front().tdata; + data_vector tx_tdata(32); + bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); + //std::cout << "portal @ cycle " << curr_cycle << ": sending over inter-RAD" << tx_tdata << " from RAD " << radsim_design->rad_id << std::endl; + + portal_axis_fifo_noc_incoming.pop(); + //std::cout << "portal.cpp in dlrm design sent " << portal_axis_master.tdata.read().to_uint64() << " to dest_device " << dest_device.to_uint64() << " on cycle " << curr_cycle << std::endl; + //portal_recvd.write(1); + if (portal_axis_master.tlast.read()) { + std::cout << "dlrm design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; + } + } + else { //should never reach here because valid should be false if fifo is empty + std::cout << "reached here but why? portal_axis_fifo_noc_incoming.size(): " << portal_axis_fifo_noc_incoming.size() << std::endl; + } + } + //Prep for sending outgoing inter-rad data + if ((portal_axis_fifo_noc_incoming.size() > 0) ) { //&& test_ready_toggle) { + portal_axis_fields curr_transaction = portal_axis_fifo_noc_incoming.front(); + portal_axis_master.tdata.write(curr_transaction.tdata); + portal_axis_master.tdest.write(curr_transaction.tdest); + portal_axis_master.tuser.write(curr_transaction.tuser); + portal_axis_master.tvalid.write(true); + portal_axis_master.tlast.write(curr_transaction.tlast); + } + else { + //counter++; + portal_axis_master.tdata.write(0); + //portal_axis_master.tuser.write(dest_device); + portal_axis_master.tvalid.write(false); + } + + //Accepting incoming inter-rad data and then sending to correct module on RAD over NoC + // if (portal_axis_slave.tvalid.read() && //tvalid is written by inter-rad module + // portal_axis_slave.tready.read()) { //tready is written by this portal module + // //get current cycle + // int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + // //read + // sc_bv rx_tdata_bv = portal_axis_slave.tdata.read(); + // data_vector rx_tdata(32); + // bv_to_data_vector(rx_tdata_bv, rx_tdata, 32); + // std::cout << module_name << ": Portal Module Got Transaction on cycle " << curr_cycle << " (RAD ID) = " + // << radsim_design->rad_id //<< portal_axis_slave.tuser.read().to_uint64() + // << ") (val = " //<< portal_axis_slave.tdata.read().to_uint64() << ")!" + // << rx_tdata << ") with tdest field of " + // << portal_axis_slave.tdest.read() << "!" + // << std::endl; + // //write the addend into the mult module and that will flag when received all values and can end simulation + // std::string src_port_name = module_name + ".axis_portal_master_interface"; + // uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref + // //sc_bv concat_dest = portal_axis_slave.tdest.read(); + // //DEST_RAD(concat_dest) = radsim_design->rad_id; + // //DEST_LOCAL_NODE(concat_dest) = //dst_addr; + // //std::cout << "portal_axis_slave.tdest.read() is: " << portal_axis_slave.tdest.read() << std::endl; + // axis_portal_master_interface.tdest.write(portal_axis_slave.tdest.read()); //concat_dest); //dst_addr); + // axis_portal_master_interface.tid.write(0); + // axis_portal_master_interface.tstrb.write(0); + // axis_portal_master_interface.tkeep.write(0); + // axis_portal_master_interface.tuser.write(portal_axis_slave.tuser.read()); + // //std::cout << "portal_axis_slave.tuser.read()" << portal_axis_slave.tuser.read().range(15, 13).to_uint() << std::endl; + // axis_portal_master_interface.tlast.write(portal_axis_slave.tlast.read()); + // axis_portal_master_interface.tdata.write(portal_axis_slave.tdata.read()); + // axis_portal_master_interface.tvalid.write(true); + // //checking if last transaction and if so, printing current simulation cycle count + // if (portal_axis_slave.tlast.read()) { + // std::cout << "portal.cpp received last data via inter_rad at cycle " << curr_cycle << std::endl; + // } + // } + // else { + // axis_portal_master_interface.tvalid.write(false); + // std::cout << "portal_axis_slave.tvalid.read(): " << portal_axis_slave.tvalid.read() + // << " portal_axis_slave.tready.read() " << portal_axis_slave.tready.read() + // << " axis_portal_master_interface.tready.read() " << axis_portal_master_interface.tready.read() << std::endl; + // } + if (portal_axis_slave.tvalid.read() && + portal_axis_slave.tready.read()) { + portal_axis_fields curr_transaction = { + portal_axis_slave.tvalid.read(), + portal_axis_slave.tready.read(), + portal_axis_slave.tdata.read(), + portal_axis_slave.tstrb.read(), + portal_axis_slave.tkeep.read(), + portal_axis_slave.tlast.read(), + portal_axis_slave.tid.read(), + portal_axis_slave.tdest.read(), + portal_axis_slave.tuser.read() //tuser field + }; + + portal_axis_fifo_noc_outgoing.push(curr_transaction); + } + + //Sending outgoing NoC data + //warning: must do this before next if-else block so that we pop before reading front. otherwise we get outtdated value on second turn. + //we see valid as high the clock cycle AFTER we set it as high in the if-else below + if (axis_portal_master_interface.tvalid.read() && axis_portal_master_interface.tready.read()) { // && test_ready_toggle) { + //pop out of fifo + if (!portal_axis_fifo_noc_outgoing.empty()) { + //test_ready_toggle = false; + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); + sc_bv tx_tdata_bv = portal_axis_fifo_noc_outgoing.front().tdata; + data_vector tx_tdata(32); + bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); + //std::cout << "portal @ cycle " << curr_cycle << ": sending over NoC " << tx_tdata << " from RAD " << radsim_design->rad_id << std::endl; + + portal_axis_fifo_noc_outgoing.pop(); + //std::cout << "portal.cpp in dlrm design sent " << portal_axis_master.tdata.read().to_uint64() << " to dest_device " << dest_device.to_uint64() << " on cycle " << curr_cycle << std::endl; + //portal_recvd.write(1); + if (axis_portal_master_interface.tlast.read()) { + std::cout << "dlrm design portal.cpp sent last data via NoC at cycle " << curr_cycle << std::endl; + } + } + else { //should never reach here because valid should be false if fifo is empty + std::cout << "reached here but why? portal_axis_fifo_noc_outgoing.size(): " << portal_axis_fifo_noc_outgoing.size() << std::endl; + } + } + //Prep for sending outgoing NoC data + if ((portal_axis_fifo_noc_outgoing.size() > 0) ) { //&& test_ready_toggle) { + portal_axis_fields curr_transaction = portal_axis_fifo_noc_outgoing.front(); + axis_portal_master_interface.tdata.write(curr_transaction.tdata); + axis_portal_master_interface.tdest.write(curr_transaction.tdest); + axis_portal_master_interface.tuser.write(curr_transaction.tuser); + axis_portal_master_interface.tvalid.write(true); + axis_portal_master_interface.tlast.write(curr_transaction.tlast); + } + else { + //counter++; + axis_portal_master_interface.tdata.write(0); + //portal_axis_master.tuser.write(dest_device); + axis_portal_master_interface.tvalid.write(false); + } + + + wait(); + } +} + +void portal::RegisterModuleInfo() { + std::string port_name; + _num_noc_axis_slave_ports = 0; + _num_noc_axis_master_ports = 0; + _num_noc_aximm_slave_ports = 0; + _num_noc_aximm_master_ports = 0; + + port_name = module_name + ".axis_portal_slave_interface"; + RegisterAxisSlavePort(port_name, &axis_portal_slave_interface, DATAW, 0); + //radsim_design->portal_id = radsim_design->GetPortDestinationID(port_name); //store slave port info + //radsim_design->AssignPortalSlaveID(radsim_design->GetPortDestinationID(port_name)); + radsim_design->AssignPortalSlaveName(port_name); //bc other modules will send to this slave interface + + port_name = module_name + ".axis_portal_master_interface"; + RegisterAxisMasterPort(port_name, &axis_portal_master_interface, DATAW, 0); + +} \ No newline at end of file diff --git a/rad-sim/sim/portal.hpp b/rad-sim/sim/portal.hpp new file mode 100644 index 0000000..386230a --- /dev/null +++ b/rad-sim/sim/portal.hpp @@ -0,0 +1,56 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include //AKB: added for data_vector template class + +struct portal_axis_fields { + bool tvalid; + bool tready; + sc_bv tdata; + sc_bv tstrb; + sc_bv tkeep; + bool tlast; + sc_bv tid; + sc_bv tdest; + sc_bv tuser; + }; + +class portal : public RADSimModule { + private: + std::queue portal_axis_fifo_noc_incoming; + std::queue portal_axis_fifo_noc_outgoing; + + public: + RADSimDesignContext* radsim_design; + sc_in rst; + //sc_in> portal_in; + //sc_out> portal_out; + //axis ports for external access to inter_rad + axis_master_port portal_axis_master; + axis_slave_port portal_axis_slave; + //sc_out portal_recvd; //for testing: flag so add_driver keeps simulation going until data is sent to mult module + //Interfaces to the NoC + axis_slave_port axis_portal_slave_interface; + axis_master_port axis_portal_master_interface; + + portal(const sc_module_name &name, RADSimDesignContext* radsim_design); + ~portal(); + + void Assign(); // Combinational logic process + void Tick(); // Sequential logic process + SC_HAS_PROCESS(portal); + void RegisterModuleInfo(); //even tho did not add AXI Interface, need because is virtual fn in derived class +}; + +void bv_to_data_vector( + sc_bv &bitvector, data_vector &datavector, + unsigned int num_elements); \ No newline at end of file From fb023d0a5533bf3b9c2167d53ba3503c7845511f Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 25 Jun 2024 03:48:20 -0400 Subject: [PATCH 071/127] Made NoC configs shared and kept other configs per-RAD --- rad-sim/config.py | 71 +++++++++++++--------- rad-sim/sim/radsim_knobs_akb_test | 2 +- rad-sim/uni_config.yml | 97 +++++++++++-------------------- 3 files changed, 80 insertions(+), 90 deletions(-) diff --git a/rad-sim/config.py b/rad-sim/config.py index 74161d3..cdd77e5 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -13,6 +13,9 @@ def parse_config_file(config_filename, booksim_params, radsim_header_params, rad config_counter = 0 for config_section in config: print(config_section + ':') + if 'config' in config_section: + print('NAME OF CONFIG: ' + str(config_section.split()[1])) + config_names.append(str(config_section.split()[1])) for param_category, param in config[config_section].items(): if 'config' in config_section and (isinstance(param, dict)): print(' ' + param_category + ':') @@ -29,41 +32,49 @@ def parse_config_file(config_filename, booksim_params, radsim_header_params, rad if param_name in radsim_knobs[config_counter]: radsim_knobs[config_counter][param_name] = param_value invalid_param = False - if param_name == "dram_config_files": - print('param_value') - print(config_counter) - print(param_value) + # if param_name == "dram_config_files": #TODO: double check dram_config_files correct, had error earlier but I think I fixed earlier + # print('param_value') + # print(config_counter) + # print(param_value) if invalid_param: print("Config Error: Parameter " + param_name + " is invalid!") exit(1) + + elif config_section == "noc" or config_section == "noc_adapters": + param_value = param #bc no subsection, so correction + param = param_category #bc no subsection, so correction + print(' ' + param, param_value) + param_name = config_section + '_' + param + invalid_param = True + for i in range(0, num_configs): #use num_configs from command line in case NoC sections are earlier in yaml file + if param_name in booksim_params[i]: + booksim_params[i][param_name] = param_value + invalid_param = False + if param_name in radsim_header_params[i]: + radsim_header_params[i][param_name] = param_value + invalid_param = False + if param_name in radsim_knobs[i]: + radsim_knobs[i][param_name] = param_value + invalid_param = False + if invalid_param: + print("Config Error: Parameter " + param_name + " is invalid!") + exit(1) + elif config_section == "cluster": param_value = param #bc no subsection, so correction param = param_category #bc no subsection, so correction print(' ' + param, param_value) - if 'topology' in param or 'configs' in param: - param_name = 'cluster_' + param - else: - param_name = param + param_name = param #print(param_name) #TODO: below doesnt rlly make sense for cluster-level params, fix up - invalid_param = True if param_name in cluster_knobs: cluster_knobs[param_name] = param_value - invalid_param = False - # if param_name in booksim_params[config_counter]: - # booksim_params[config_counter][param_name] = param_value - # invalid_param = False - # if param_name in radsim_header_params[config_counter]: - # radsim_header_params[config_counter][param_name] = param_value - # invalid_param = False - # if param_name in radsim_knobs[config_counter]: - # radsim_knobs[config_counter][param_name] = param_value - # invalid_param = False - if invalid_param: + else: print("Config Error: Parameter " + param_name + " is invalid!") exit(1) - config_counter += 1 + if 'config' in config_section: + config_counter += 1 for i in range(0, num_configs): radsim_knobs[i]["radsim_user_design_root_dir"] = cluster_knobs["radsim_root_dir"] + "/example-designs/" + radsim_knobs[i]["design_name"] @@ -74,6 +85,10 @@ def parse_config_file(config_filename, booksim_params, radsim_header_params, rad # if p > longest_clk_period: # longest_clk_period = p # radsim_knobs["sim_driver_period"] = longest_clk_period + + if config_counter != num_configs: + print('number of unique config sections in config YAML file does not match commandline argument') + exit(-1) def print_config(booksim_params, radsim_header_params, radsim_knobs): @@ -89,10 +104,12 @@ def print_config(booksim_params, radsim_header_params, radsim_knobs): def generate_booksim_config_files(booksim_params, radsim_header_params, radsim_knobs, cluster_knobs): - for curr_rad_id in range(len(cluster_knobs["cluster_configs"])): #curr_config_num in range(num_configs): - curr_config_num = cluster_knobs["cluster_configs"][curr_rad_id] #retrieve the config num by rad ID + for j in range(len(cluster_knobs["cluster_configs"])): #curr_config_num in range(num_configs): + curr_config_name = cluster_knobs["cluster_configs"][j] #retrieve the config num by rad ID + curr_config_num = config_names.index(curr_config_name) + print('generate_booksim_config_files fn ' + curr_config_name + ' ' + str(curr_config_num)) for i in range(booksim_params[curr_config_num]["noc_num_nocs"]): - booksim_config_file = open(booksim_params[curr_config_num]["radsim_root_dir"] + "/sim/noc/noc" + str(i) + "_rad" + str(curr_config_num) + "_config", "w") #AKB created temp file to test + booksim_config_file = open(booksim_params[curr_config_num]["radsim_root_dir"] + "/sim/noc/noc" + str(i) + "_rad" + str(curr_config_num) + "_config", "w") # Booksim topology configuration booksim_config_file.write("// Topology\n") @@ -305,7 +322,8 @@ def generate_radsim_params_header(radsim_header_params): def generate_radsim_config_file(radsim_knobs, cluster_knobs): radsim_config_file = open(radsim_header_params["radsim_root_dir"] + "/sim/radsim_knobs_akb_test", "w") #AKB created temp file to test for i in range(len(cluster_knobs["cluster_configs"])): - curr_config_num = cluster_knobs["cluster_configs"][i] #bc config # for a certain RAD may or may not match RAD ID + curr_config_name = cluster_knobs["cluster_configs"][i] #retrieve the config num by rad ID + curr_config_num = config_names.index(curr_config_name) for param in radsim_knobs[i]: radsim_config_file.write(param + " " + str(i) + " ") # second element is RAD ID if isinstance(radsim_knobs[curr_config_num][param], list): @@ -409,6 +427,7 @@ def prepare_build_dir(design_names): # Point to YAML configuration file #config_filename = "example-designs/" + design_name + "/config.yml" config_filename = "uni_config.yml" +config_names = [] # List default parameter values booksim_params = { @@ -479,7 +498,7 @@ def prepare_build_dir(design_names): "telemetry_log_verbosity": 0, "telemetry_traces": ["trace0", "trace1"], "num_rads": 1, - "cluster_configs": [0], + "cluster_configs": [], "cluster_topology": 'all-to-all' } diff --git a/rad-sim/sim/radsim_knobs_akb_test b/rad-sim/sim/radsim_knobs_akb_test index b91b345..44b6fc9 100644 --- a/rad-sim/sim/radsim_knobs_akb_test +++ b/rad-sim/sim/radsim_knobs_akb_test @@ -41,5 +41,5 @@ sim_driver_period 5.0 telemetry_log_verbosity 2 telemetry_traces Embedding LU Mem0 Mem1 Mem2 Mem3 Feature Inter. MVM first MVM last num_rads 2 -cluster_configs 0 1 +cluster_configs rad1 anotherconfig cluster_topology all-to-all diff --git a/rad-sim/uni_config.yml b/rad-sim/uni_config.yml index abeb641..e04212c 100644 --- a/rad-sim/uni_config.yml +++ b/rad-sim/uni_config.yml @@ -1,33 +1,4 @@ -config0: - noc: - type: ['2d'] - num_nocs: 1 - clk_period: [1.0] - payload_width: [82] - topology: ['mesh'] - dim_x: [10] - dim_y: [10] - routing_func: ['dim_order'] - vcs: [5] - vc_buffer_size: [16] - output_buffer_size: [8] - num_packet_types: [5] - router_uarch: ['iq'] - vc_allocator: ['islip'] - sw_allocator: ['islip'] - credit_delay: [1] - routing_delay: [1] - vc_alloc_delay: [1] - sw_alloc_delay: [1] - - noc_adapters: - clk_period: [1.25] - fifo_size: [16] - obuff_size: [2] - in_arbiter: ['fixed_rr'] - out_arbiter: ['priority_rr'] - vc_mapping: ['direct'] - +config rad1: dram: num_controllers: 4 clk_periods: [3.32, 3.32, 2.0, 2.0] @@ -39,36 +10,7 @@ config0: noc_placement: ['dlrm.place'] clk_periods: [5.0, 2.0, 3.32, 1.5] -config1: - noc: - type: ['2d'] - num_nocs: 1 - clk_period: [1.0] - payload_width: [82] - topology: ['mesh'] - dim_x: [10] - dim_y: [10] - routing_func: ['dim_order'] - vcs: [5] - vc_buffer_size: [16] - output_buffer_size: [8] - num_packet_types: [5] - router_uarch: ['iq'] - vc_allocator: ['islip'] - sw_allocator: ['islip'] - credit_delay: [1] - routing_delay: [1] - vc_alloc_delay: [1] - sw_alloc_delay: [1] - - noc_adapters: - clk_period: [1.25] - fifo_size: [16] - obuff_size: [2] - in_arbiter: ['fixed_rr'] - out_arbiter: ['priority_rr'] - vc_mapping: ['direct'] - +config anotherconfig: dram: num_controllers: 4 clk_periods: [3.32, 3.32, 2.0, 2.0] @@ -80,10 +22,39 @@ config1: noc_placement: ['dlrm.place'] clk_periods: [5.0, 2.0, 3.32, 1.5] -cluster: +noc: + type: ['2d'] + num_nocs: 1 + clk_period: [1.0] + payload_width: [82] + topology: ['mesh'] + dim_x: [10] + dim_y: [10] + routing_func: ['dim_order'] + vcs: [5] + vc_buffer_size: [16] + output_buffer_size: [8] + num_packet_types: [5] + router_uarch: ['iq'] + vc_allocator: ['islip'] + sw_allocator: ['islip'] + credit_delay: [1] + routing_delay: [1] + vc_alloc_delay: [1] + sw_alloc_delay: [1] + +noc_adapters: + clk_period: [1.25] + fifo_size: [16] + obuff_size: [2] + in_arbiter: ['fixed_rr'] + out_arbiter: ['priority_rr'] + vc_mapping: ['direct'] + +cluster: sim_driver_period: 5.0 telemetry_log_verbosity: 2 telemetry_traces: ['Embedding LU', 'Mem0', 'Mem1', 'Mem2', 'Mem3', 'Feature Inter.', 'MVM first', 'MVM last'] num_rads: 2 - configs: [0, 1] - topology: 'all-to-all' \ No newline at end of file + cluster_configs: ['rad1', 'anotherconfig'] + cluster_topology: 'all-to-all' \ No newline at end of file From 2efc2a167878add520f0c888b86e79cb1cf1b17d Mon Sep 17 00:00:00 2001 From: abnashkb Date: Fri, 28 Jun 2024 23:18:10 -0400 Subject: [PATCH 072/127] In-progress: added automation of inter-rad via config.py. Still cleaning up bw --- rad-sim/config.py | 38 ++++++++++++++++++++++++++++++- rad-sim/sim/radsim_config.cpp | 3 ++- rad-sim/sim/radsim_inter_rad.cpp | 33 ++++++++++++--------------- rad-sim/sim/radsim_inter_rad.hpp | 8 +++---- rad-sim/sim/radsim_knobs_akb_test | 4 ++++ rad-sim/uni_config.yml | 5 +++- 6 files changed, 66 insertions(+), 25 deletions(-) diff --git a/rad-sim/config.py b/rad-sim/config.py index cdd77e5..d6ec704 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -5,6 +5,7 @@ import shutil from itertools import repeat from copy import deepcopy +from math import ceil def parse_config_file(config_filename, booksim_params, radsim_header_params, radsim_knobs, cluster_knobs): with open(config_filename, 'r') as yaml_config: @@ -318,6 +319,20 @@ def generate_radsim_params_header(radsim_header_params): radsim_params_header_file.close() +def get_fraction(input_val): + '''Returns tuple, where first value is numerator and second is denom''' + remainder = float('{:,.3f}'.format(input_val % 1)) #choosing to keep only 3 dec places. need to do this bc python stores floats as binary fraction + if remainder == 0: #whole number + return (input_val, 1) + else: + count = 0 + while (remainder % 1 != 0): + remainder *= 10 + count += 1 + b = count * 10 + a = int (( ( input_val-(input_val%1) ) * b) + remainder) + return (a, b) + def generate_radsim_config_file(radsim_knobs, cluster_knobs): radsim_config_file = open(radsim_header_params["radsim_root_dir"] + "/sim/radsim_knobs_akb_test", "w") #AKB created temp file to test @@ -335,9 +350,23 @@ def generate_radsim_config_file(radsim_knobs, cluster_knobs): for param in cluster_knobs: #for params shared across cluster if param == 'configs': continue + elif param == 'inter_rad_latency': + radsim_config_file.write("inter_rad_latency_cycles " + str(ceil(cluster_knobs[param]/cluster_knobs["sim_driver_period"])) + "\n") + continue + elif param == 'inter_rad_bw': + (inter_rad_bw_accept_cycles, inter_rad_bw_total_cycles) = get_fraction(cluster_knobs[param] * cluster_knobs["sim_driver_period"] / radsim_header_params["interfaces_max_axis_tdata_width"]) + if (inter_rad_bw_accept_cycles <= inter_rad_bw_total_cycles): + radsim_config_file.write("inter_rad_bw_accept_cycles " + str(inter_rad_bw_accept_cycles) + "\n") + radsim_config_file.write("inter_rad_bw_total_cycles " + str(inter_rad_bw_total_cycles) + "\n") + else: + print('generate_radsim_config_file error: invalid inter_rad_bw') + exit(-1) + continue else: radsim_config_file.write(param + " " ) + # if param == 'inter_rad_latency': + # radsim_config_file.write(str(ceil(cluster_knobs[param]/cluster_knobs["sim_driver_period"])) + "\n") if isinstance(cluster_knobs[param], list): for value in cluster_knobs[param]: radsim_config_file.write(str(value) + " ") @@ -499,7 +528,11 @@ def prepare_build_dir(design_names): "telemetry_traces": ["trace0", "trace1"], "num_rads": 1, "cluster_configs": [], - "cluster_topology": 'all-to-all' + "cluster_topology": 'all-to-all', + "inter_rad_latency": 5.0, #ns + "inter_rad_bw": 25.6, #bits per ns + "inter_rad_fifo_num_slots": 1000 + } #deep copy (to allow changes to each dict) @@ -521,3 +554,6 @@ def prepare_build_dir(design_names): #prepare_build_dir(design_names) #THIS WORKS -- commenting out for testing multi-rad config files print("RAD-Sim was configured successfully!") + +test_val = get_fraction(25.6) +print(str(test_val)) diff --git a/rad-sim/sim/radsim_config.cpp b/rad-sim/sim/radsim_config.cpp index 56bc05c..dab1496 100644 --- a/rad-sim/sim/radsim_config.cpp +++ b/rad-sim/sim/radsim_config.cpp @@ -367,7 +367,8 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { std::string value; std::getline(ss, value, ' '); radsim_config.AddStringKnobPerRad(param, value, rad_id); - } else if ( (param == "telemetry_log_verbosity") || (param == "num_rads") ) { + } else if ( (param == "telemetry_log_verbosity") || (param == "num_rads") || (param == "inter_rad_latency_cycles") || (param == "inter_rad_fifo_num_slots") + || (param == "inter_rad_bw_accept_cycles") || (param == "inter_rad_bw_total_cycles") ) { std::string value_str; std::getline(ss, value_str, ' '); int value = std::stoi(value_str); diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index c51c0da..de3b071 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -7,6 +7,7 @@ std::ostream& operator<<(std::ostream& os, const axis_fields& I) { } RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_clk, RADSimCluster* cluster) : sc_module(name) { + std::cout << "RADSimInterRad DATAW " << DATAW << std::endl; this->cluster = cluster; this->clk(*inter_rad_clk); num_rads = cluster->num_rads; @@ -15,9 +16,9 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c fifos_latency_counters.resize(num_rads); //std::cout << "fifos_latency_counters[0].size() " << fifos_latency_counters[0].size() << std::endl; - + int inter_rad_fifo_num_slots = radsim_config.GetIntKnobShared("inter_rad_fifo_num_slots"); //1000; for (int v = 0; v < num_rads; v++) { //width of vector = num of rads bc want fifo per rad - sc_fifo* new_fifo_ptr = new sc_fifo(NUM_SLOTS); + sc_fifo* new_fifo_ptr = new sc_fifo(inter_rad_fifo_num_slots); fifos.push_back(new_fifo_ptr); //adding to axi vectors axis_signal* new_axis_signal = new axis_signal; @@ -29,8 +30,6 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c all_axis_slave_ports.push_back(new_axis_slave_port); axis_master_port* new_axis_master_port = new axis_master_port; all_axis_master_ports.push_back(new_axis_master_port); - //for rising edge detection - prev_valid.push_back(0); } SC_CTHREAD(writeFifo, clk.pos()); SC_CTHREAD(readFifo, clk.pos()); @@ -95,7 +94,7 @@ RADSimInterRad::writeFifo() { //iterate thru all RADs for (int i = 0; i < num_rads; i++) { - if (bw_counter >= bw_limit) { + if (bw_counter < radsim_config.GetIntKnobShared("inter_rad_bw_accept_cycles")) { //>= bw_limit) { all_axis_slave_ports[i]->tready.write(true); } else { @@ -119,7 +118,7 @@ RADSimInterRad::writeFifo() { /*if (all_axis_slave_ports[i]->tready.read()) { //std::cout << "valid" << std::endl; }*/ - if (curr_transaction.tvalid && all_axis_slave_ports[i]->tready.read()) { //&& !prev_valid[i]) { //detect rising edge bc operating at higher clk freq than modules + if (curr_transaction.tvalid && all_axis_slave_ports[i]->tready.read()) { unsigned int dest_rad = DEST_RAD(curr_transaction.tdest).to_uint64(); //std::cout << "radsim_inter_rad.cpp dest_rad is: "<< dest_rad << std::endl; if (this->fifos[dest_rad]->nb_write(curr_transaction) != false) { //there was an available slot to write to @@ -134,21 +133,18 @@ RADSimInterRad::writeFifo() { std::cout << "WRITE FIFO FULL: packet dropped at inter_rad: could not write into internal fifo. Packets dropped count: " << write_fifo_packet_drop_count << std::endl; write_fifo_packet_drop_count++; } - //all_axis_slave_ports[i]->tready.write(false); } - /*else if (!all_axis_slave_ports[i]->tready.read()) { - if (bw_counter >= bw_limit) { - all_axis_slave_ports[i]->tready.write(true); - bw_counter = 0; - } - else { - bw_counter++; - } - }*/ - prev_valid[i] = curr_transaction.tvalid; + + // if (all_axis_slave_ports[i]->tready.read()) { + // std::cout << "June-27: inter_rad fifo is ready with counter " << bw_counter << std::endl; + // } + // else { //will see the ready signal one cycle after the counter var val changes bc is systemc signal + // std::cout << "June-27: inter_rad fifo NOT ready with counter " << bw_counter << std::endl; + // } + } //wait(num_wait, SC_NS); //SC_NS); //eventually change to 1.3, SC_US -- assuming 2.6 us / 2 latency for one piece of data - if (bw_counter >= bw_limit) { + if (bw_counter >= (radsim_config.GetIntKnobShared("inter_rad_bw_total_cycles") - 1)) { //bw_limit) { bw_counter = 0; } else { @@ -167,6 +163,7 @@ RADSimInterRad::readFifo() { Matches the dest index of fifo to the dest rad DONE: use tdest instead of tuser */ + int target_delay = radsim_config.GetIntKnobShared("inter_rad_latency_cycles"); while (true) { //std::cout << "inter_rad fifo free before READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index 4c47731..438d0ab 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -12,7 +12,7 @@ #include #define DATAW 16*32 //changed to match dlrm defines file //128 -#define NUM_SLOTS 1000 //5 //number of fifo slots, for now = NUM_ADDENDS +//#define NUM_SLOTS 1000 //5 //number of fifo slots, for now = NUM_ADDENDS #define DEST_RAD_LSB 0 #define DEST_RAD_MSB 7 @@ -38,9 +38,9 @@ class RADSimInterRad : public sc_module { //sc_fifo> data_in_rad1 = sc_fifo>(2); //2 slots for now //sc_vector>> switch_port_fifos{"switch_port_fifos"}; //for latency - float latency_sec = 2.1 * pow(10, -6); //5.0*1 * pow(10, -9); //2.6 * pow(10, -6); //do not currently support zero latency -- I could implement by bypassing FIFO - float period_sec = 5.0 * pow(10, -9); - int target_delay = ceil(latency_sec/period_sec); //number of cycles to delay + // float latency_sec = 2.1 * pow(10, -6); //5.0*1 * pow(10, -9); //2.6 * pow(10, -6); //do not currently support zero latency -- I could implement by bypassing FIFO + // float period_sec = 5.0 * pow(10, -9); + // int target_delay = ceil(latency_sec/period_sec); //number of cycles to delay int bw_limit = 0; public: int num_rads; diff --git a/rad-sim/sim/radsim_knobs_akb_test b/rad-sim/sim/radsim_knobs_akb_test index 44b6fc9..d27a548 100644 --- a/rad-sim/sim/radsim_knobs_akb_test +++ b/rad-sim/sim/radsim_knobs_akb_test @@ -43,3 +43,7 @@ telemetry_traces Embedding LU Mem0 Mem1 Mem2 Mem3 Feature Inter. MVM first MVM l num_rads 2 cluster_configs rad1 anotherconfig cluster_topology all-to-all +inter_rad_latency_cycles 420 +inter_rad_bw_accept_cycles 1.0 +inter_rad_bw_total_cycles 1 +inter_rad_fifo_num_slots 1000 diff --git a/rad-sim/uni_config.yml b/rad-sim/uni_config.yml index e04212c..b3ea2a6 100644 --- a/rad-sim/uni_config.yml +++ b/rad-sim/uni_config.yml @@ -57,4 +57,7 @@ cluster: telemetry_traces: ['Embedding LU', 'Mem0', 'Mem1', 'Mem2', 'Mem3', 'Feature Inter.', 'MVM first', 'MVM last'] num_rads: 2 cluster_configs: ['rad1', 'anotherconfig'] - cluster_topology: 'all-to-all' \ No newline at end of file + cluster_topology: 'all-to-all' + inter_rad_latency: 2100 + inter_rad_bw: 102.4 + inter_rad_fifo_num_slots: 1000 \ No newline at end of file From 64bc96a9028a936f423ad10a7eb829a580ab6420 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sat, 29 Jun 2024 21:58:31 -0400 Subject: [PATCH 073/127] In-progress automation: fixed bw config scripting, need to fix params and main gen --- rad-sim/config.py | 18 ++++----- rad-sim/sim/main.cpp | 2 +- rad-sim/sim/radsim_knobs | 66 +++++++++++++++++++++---------- rad-sim/sim/radsim_knobs_akb | 42 -------------------- rad-sim/sim/radsim_knobs_akb_test | 49 ----------------------- 5 files changed, 55 insertions(+), 122 deletions(-) delete mode 100644 rad-sim/sim/radsim_knobs_akb delete mode 100644 rad-sim/sim/radsim_knobs_akb_test diff --git a/rad-sim/config.py b/rad-sim/config.py index d6ec704..551459d 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -321,21 +321,22 @@ def generate_radsim_params_header(radsim_header_params): def get_fraction(input_val): '''Returns tuple, where first value is numerator and second is denom''' + print(input_val) remainder = float('{:,.3f}'.format(input_val % 1)) #choosing to keep only 3 dec places. need to do this bc python stores floats as binary fraction if remainder == 0: #whole number - return (input_val, 1) + return (int(input_val), 1) else: count = 0 while (remainder % 1 != 0): remainder *= 10 count += 1 b = count * 10 - a = int (( ( input_val-(input_val%1) ) * b) + remainder) - return (a, b) + a = (( input_val-(input_val%1) ) * b) + remainder + return (int(a), b) def generate_radsim_config_file(radsim_knobs, cluster_knobs): - radsim_config_file = open(radsim_header_params["radsim_root_dir"] + "/sim/radsim_knobs_akb_test", "w") #AKB created temp file to test + radsim_config_file = open(radsim_header_params["radsim_root_dir"] + "/sim/radsim_knobs", "w") for i in range(len(cluster_knobs["cluster_configs"])): curr_config_name = cluster_knobs["cluster_configs"][i] #retrieve the config num by rad ID curr_config_num = config_names.index(curr_config_name) @@ -549,11 +550,8 @@ def prepare_build_dir(design_names): generate_booksim_config_files(booksim_params_per_rad, radsim_header_params_per_rad, radsim_knobs_per_rad, cluster_knobs) #generate_radsim_params_header(radsim_header_params) generate_radsim_config_file(radsim_knobs_per_rad, cluster_knobs) -#generate_radsim_main(design_name) +#generate_radsim_main(design_name) #TODO: fix -#prepare_build_dir(design_names) #THIS WORKS -- commenting out for testing multi-rad config files +prepare_build_dir(design_names) -print("RAD-Sim was configured successfully!") - -test_val = get_fraction(25.6) -print(str(test_val)) +print("RAD-Sim was configured successfully!") \ No newline at end of file diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index ee09ca9..30923ea 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -19,7 +19,7 @@ SimTraceRecording sim_trace_probe; int sc_main(int argc, char *argv[]) { //AKB: moved from RADSimDesignContext constructor to here - std::string radsim_knobs_filename = "/sim/radsim_knobs_akb_test"; + std::string radsim_knobs_filename = "/sim/radsim_knobs"; std::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename; radsim_config.ResizeAll(2); //bc two RADs ParseRADSimKnobs(radsim_knobs_filepath); //AKB moved this to main.cpp so it only gets called once, not per-RAD diff --git a/rad-sim/sim/radsim_knobs b/rad-sim/sim/radsim_knobs index d2a35e4..201a764 100644 --- a/rad-sim/sim/radsim_knobs +++ b/rad-sim/sim/radsim_knobs @@ -1,23 +1,49 @@ +design_name 0 dlrm +noc_num_nocs 0 1 +noc_clk_period 0 1.0 +noc_vcs 0 5 +noc_payload_width 0 82 +noc_num_nodes 0 100 +design_noc_placement 0 dlrm.place +noc_adapters_clk_period 0 1.25 +noc_adapters_fifo_size 0 16 +noc_adapters_obuff_size 0 2 +noc_adapters_in_arbiter 0 fixed_rr +noc_adapters_out_arbiter 0 priority_rr +noc_adapters_vc_mapping 0 direct +design_clk_periods 0 5.0 2.0 3.32 1.5 +dram_num_controllers 0 4 +dram_clk_periods 0 3.32 3.32 2.0 2.0 +dram_queue_sizes 0 64 64 64 64 +dram_config_files 0 DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 +radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm +design_name 1 dlrm +noc_num_nocs 1 1 +noc_clk_period 1 1.0 +noc_vcs 1 5 +noc_payload_width 1 82 +noc_num_nodes 1 100 +design_noc_placement 1 dlrm.place +noc_adapters_clk_period 1 1.25 +noc_adapters_fifo_size 1 16 +noc_adapters_obuff_size 1 2 +noc_adapters_in_arbiter 1 fixed_rr +noc_adapters_out_arbiter 1 priority_rr +noc_adapters_vc_mapping 1 direct +design_clk_periods 1 5.0 2.0 3.32 1.5 +dram_num_controllers 1 4 +dram_clk_periods 1 3.32 3.32 2.0 2.0 +dram_queue_sizes 1 64 64 64 64 +dram_config_files 1 DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 +radsim_user_design_root_dir 1 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim -design_name dlrm -noc_num_nocs 1 -noc_clk_period 1.0 -noc_vcs 5 -noc_payload_width 82 -noc_num_nodes 100 -design_noc_placement dlrm.place -noc_adapters_clk_period 1.25 -noc_adapters_fifo_size 16 -noc_adapters_obuff_size 2 -noc_adapters_in_arbiter fixed_rr -noc_adapters_out_arbiter priority_rr -noc_adapters_vc_mapping direct -design_clk_periods 5.0 2.0 3.32 1.5 sim_driver_period 5.0 telemetry_log_verbosity 2 -telemetry_traces Embedding LU Mem0 Mem1 Mem2 Mem3 Feature Inter. MVM first MVM last -dram_num_controllers 4 -dram_clk_periods 3.32 3.32 2.0 2.0 -dram_queue_sizes 64 64 64 64 -dram_config_files DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 -radsim_user_design_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm +telemetry_traces Embedding LU Mem0 Mem1 Mem2 Mem3 Feature Inter. MVM first MVM last +num_rads 2 +cluster_configs rad1 anotherconfig +cluster_topology all-to-all +inter_rad_latency_cycles 420 +inter_rad_bw_accept_cycles 1 +inter_rad_bw_total_cycles 1 +inter_rad_fifo_num_slots 1000 diff --git a/rad-sim/sim/radsim_knobs_akb b/rad-sim/sim/radsim_knobs_akb deleted file mode 100644 index 97a79e8..0000000 --- a/rad-sim/sim/radsim_knobs_akb +++ /dev/null @@ -1,42 +0,0 @@ -radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim -design_name 0 dlrm -design_name 1 dlrm -noc_num_nocs 0 1 -noc_clk_period 0 1.0 -noc_vcs 0 5 -noc_payload_width 0 82 -noc_num_nodes 0 100 -design_noc_placement 0 dlrm.place -noc_adapters_clk_period 0 1.25 -noc_adapters_fifo_size 0 16 -noc_adapters_obuff_size 0 2 -noc_adapters_in_arbiter 0 fixed_rr -noc_adapters_out_arbiter 0 priority_rr -noc_adapters_vc_mapping 0 direct -design_clk_periods 0 5.0 2.0 3.32 1.5 -noc_num_nocs 1 1 -noc_clk_period 1 1.0 -noc_vcs 1 5 -noc_payload_width 1 82 -noc_num_nodes 1 100 -design_noc_placement 1 dlrm.place -noc_adapters_clk_period 1 1.25 -noc_adapters_fifo_size 1 16 -noc_adapters_obuff_size 1 2 -noc_adapters_in_arbiter 1 fixed_rr -noc_adapters_out_arbiter 1 priority_rr -noc_adapters_vc_mapping 1 direct -design_clk_periods 1 5.0 2.0 3.32 1.5 -sim_driver_period 5.0 -telemetry_log_verbosity 2 -telemetry_traces Embedding LU Mem0 Mem1 Mem2 Mem3 Feature Inter. MVM first MVM last -dram_num_controllers 0 4 -dram_clk_periods 0 3.32 3.32 2.0 2.0 -dram_queue_sizes 0 64 64 64 64 -dram_config_files 0 DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 -dram_num_controllers 1 4 -dram_clk_periods 1 3.32 3.32 2.0 2.0 -dram_queue_sizes 1 64 64 64 64 -dram_config_files 1 DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 -radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm -radsim_user_design_root_dir 1 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm \ No newline at end of file diff --git a/rad-sim/sim/radsim_knobs_akb_test b/rad-sim/sim/radsim_knobs_akb_test deleted file mode 100644 index d27a548..0000000 --- a/rad-sim/sim/radsim_knobs_akb_test +++ /dev/null @@ -1,49 +0,0 @@ -design_name 0 dlrm -noc_num_nocs 0 1 -noc_clk_period 0 1.0 -noc_vcs 0 5 -noc_payload_width 0 82 -noc_num_nodes 0 100 -design_noc_placement 0 dlrm.place -noc_adapters_clk_period 0 1.25 -noc_adapters_fifo_size 0 16 -noc_adapters_obuff_size 0 2 -noc_adapters_in_arbiter 0 fixed_rr -noc_adapters_out_arbiter 0 priority_rr -noc_adapters_vc_mapping 0 direct -design_clk_periods 0 5.0 2.0 3.32 1.5 -dram_num_controllers 0 4 -dram_clk_periods 0 3.32 3.32 2.0 2.0 -dram_queue_sizes 0 64 64 64 64 -dram_config_files 0 DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 -radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm -design_name 1 dlrm -noc_num_nocs 1 1 -noc_clk_period 1 1.0 -noc_vcs 1 5 -noc_payload_width 1 82 -noc_num_nodes 1 100 -design_noc_placement 1 dlrm.place -noc_adapters_clk_period 1 1.25 -noc_adapters_fifo_size 1 16 -noc_adapters_obuff_size 1 2 -noc_adapters_in_arbiter 1 fixed_rr -noc_adapters_out_arbiter 1 priority_rr -noc_adapters_vc_mapping 1 direct -design_clk_periods 1 5.0 2.0 3.32 1.5 -dram_num_controllers 1 4 -dram_clk_periods 1 3.32 3.32 2.0 2.0 -dram_queue_sizes 1 64 64 64 64 -dram_config_files 1 DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 -radsim_user_design_root_dir 1 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm -radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim -sim_driver_period 5.0 -telemetry_log_verbosity 2 -telemetry_traces Embedding LU Mem0 Mem1 Mem2 Mem3 Feature Inter. MVM first MVM last -num_rads 2 -cluster_configs rad1 anotherconfig -cluster_topology all-to-all -inter_rad_latency_cycles 420 -inter_rad_bw_accept_cycles 1.0 -inter_rad_bw_total_cycles 1 -inter_rad_fifo_num_slots 1000 From fd6ce353f8bc8677437ec5a9a99ba69eb7f94be8 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Fri, 5 Jul 2024 21:12:42 -0400 Subject: [PATCH 074/127] In-progress: fixed config.py generate_radsim_params_header and print_config --- rad-sim/config.py | 36 +++++++++++++++++++----------------- 1 file changed, 19 insertions(+), 17 deletions(-) diff --git a/rad-sim/config.py b/rad-sim/config.py index 551459d..fdc7e92 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -27,8 +27,8 @@ def parse_config_file(config_filename, booksim_params, radsim_header_params, rad if param_name in booksim_params[config_counter]: booksim_params[config_counter][param_name] = param_value invalid_param = False - if param_name in radsim_header_params[config_counter]: - radsim_header_params[config_counter][param_name] = param_value + if config_counter == 0 and param_name in radsim_header_params: #all header params are shared across RADs, so only need to store one time + radsim_header_params[param_name] = param_value invalid_param = False if param_name in radsim_knobs[config_counter]: radsim_knobs[config_counter][param_name] = param_value @@ -52,8 +52,8 @@ def parse_config_file(config_filename, booksim_params, radsim_header_params, rad if param_name in booksim_params[i]: booksim_params[i][param_name] = param_value invalid_param = False - if param_name in radsim_header_params[i]: - radsim_header_params[i][param_name] = param_value + if param_name in radsim_header_params: #all header params are shared across RADs, so only need to store one time + radsim_header_params[param_name] = param_value invalid_param = False if param_name in radsim_knobs[i]: radsim_knobs[i][param_name] = param_value @@ -96,12 +96,13 @@ def print_config(booksim_params, radsim_header_params, radsim_knobs): print("*****************************") print("** RAD-FLOW CONFIGURATION **") print("*****************************") - for param in booksim_params: - print(param + " : " + str(booksim_params[param])) + for config_count in range(num_configs): + for param in booksim_params[config_count].keys(): + print("config " + str(config_count) + " : " + param + " : " + str(booksim_params[config_count][param])) + for param in radsim_knobs[config_count].keys(): + print("config " + str(config_count) + " : " + param + " : " + str(radsim_knobs[config_count][param])) for param in radsim_header_params: print(param + " : " + str(radsim_header_params[param])) - for param in radsim_knobs: - print(param + " : " + str(radsim_knobs[param])) def generate_booksim_config_files(booksim_params, radsim_header_params, radsim_knobs, cluster_knobs): @@ -140,7 +141,7 @@ def generate_booksim_config_files(booksim_params, radsim_header_params, radsim_k # 3D RAD instances as a concentrated mesh of FPGA node, base die node, and two "empty" nodes by adjusting # their IDs if noc_type == "3d": - radsim_header_params[curr_config_num]["noc_num_nodes"][i] = (larger_noc_dim * larger_noc_dim * 4) + radsim_header_params["noc_num_nodes"][i] = (larger_noc_dim * larger_noc_dim * 4) #TODO: make changes to have per-RAD booksim config too. for now, just hacky workaround to get radsim_knobs set #for j in range(cluster_knobs["num_rads"]): #radsim_knobs[j]["noc_num_nodes"][i] = larger_noc_dim * larger_noc_dim * 4 @@ -149,7 +150,7 @@ def generate_booksim_config_files(booksim_params, radsim_header_params, radsim_k booksim_config_file.write("xr = 2;\n") booksim_config_file.write("yr = 2;\n") else: - radsim_header_params[curr_config_num]["noc_num_nodes"][i] = (larger_noc_dim * larger_noc_dim) + radsim_header_params["noc_num_nodes"][i] = (larger_noc_dim * larger_noc_dim) #TODO: make changes to have per-RAD booksim config AND radsim_header_params too. for now, just hacky workaround to get radsim_knobs set # for j in range(cluster_knobs["num_rads"]): # radsim_knobs[j]["noc_num_nodes"][i] = larger_noc_dim * larger_noc_dim @@ -209,7 +210,7 @@ def generate_booksim_config_files(booksim_params, radsim_header_params, radsim_k def generate_radsim_params_header(radsim_header_params): - radsim_params_header_file = open(radsim_header_params["radsim_root_dir"] + "/sim/radsim_defines_akb_test.hpp", "w") #AKB created temp file to test + radsim_params_header_file = open(radsim_header_params["radsim_root_dir"] + "/sim/radsim_defines.hpp", "w") #AKB created temp file to test radsim_params_header_file.write("#pragma once\n\n") radsim_params_header_file.write("// clang-format off\n") radsim_params_header_file.write('#define RADSIM_ROOT_DIR "' + radsim_header_params["radsim_root_dir"] + '"\n\n') @@ -270,6 +271,7 @@ def generate_radsim_params_header(radsim_header_params): str(radsim_header_params["interfaces_axi_user_width"]) + "\n") radsim_params_header_file.write("// (Almost always) Constant AXI Parameters\n") + radsim_params_header_file.write("// NOTE: AXIS_DEST_FIELDW must be NOC_LINKS_DEST_WIDTH/3 to fit RAD_DEST_ID, REMOTE_NODE_ID, and LOCAL_NODE_ID\n") radsim_params_header_file.write("#define AXIS_STRBW " + str(radsim_header_params["interfaces_axis_tstrb_width"]) + "\n") radsim_params_header_file.write("#define AXIS_KEEPW " + str(radsim_header_params["interfaces_axis_tkeep_width"]) + "\n") radsim_params_header_file.write("#define AXIS_IDW NOC_LINKS_PACKETID_WIDTH\n") @@ -481,7 +483,7 @@ def prepare_build_dir(design_names): "noc_vc_alloc_delay": [1], "noc_sw_alloc_delay": [1], } -radsim_header_params = { +radsim_header_params = { #shared across all RADs "radsim_root_dir": os.getcwd(), "noc_payload_width": [166], "noc_packet_id_width": 32, @@ -539,16 +541,16 @@ def prepare_build_dir(design_names): #deep copy (to allow changes to each dict) radsim_knobs_per_rad = list(deepcopy(radsim_knobs) for i in range(num_configs)) #print(radsim_knobs_cluster) -radsim_header_params_per_rad = list(deepcopy(radsim_header_params) for i in range(num_configs)) +#radsim_header_params_per_rad = list(deepcopy(radsim_header_params) for i in range(num_configs)) booksim_params_per_rad = list(deepcopy(booksim_params) for i in range(num_configs)) # Parse configuration file -parse_config_file(config_filename, booksim_params_per_rad, radsim_header_params_per_rad, radsim_knobs_per_rad, cluster_knobs) -#print_config(booksim_params, radsim_header_params, radsim_knobs) +parse_config_file(config_filename, booksim_params_per_rad, radsim_header_params, radsim_knobs_per_rad, cluster_knobs) +print_config(booksim_params_per_rad, radsim_header_params, radsim_knobs_per_rad) # Generate RAD-Sim input files -generate_booksim_config_files(booksim_params_per_rad, radsim_header_params_per_rad, radsim_knobs_per_rad, cluster_knobs) -#generate_radsim_params_header(radsim_header_params) +generate_booksim_config_files(booksim_params_per_rad, radsim_header_params, radsim_knobs_per_rad, cluster_knobs) +generate_radsim_params_header(radsim_header_params) generate_radsim_config_file(radsim_knobs_per_rad, cluster_knobs) #generate_radsim_main(design_name) #TODO: fix From ee1f964d0d3fd92a8b16383a7c33eebdc60316f0 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sat, 6 Jul 2024 21:26:56 -0400 Subject: [PATCH 075/127] Added multi-rad support in config.py generate_radsim_main --- rad-sim/config.py | 59 ++++++++++++++++++++++++++++++++++------------- 1 file changed, 43 insertions(+), 16 deletions(-) diff --git a/rad-sim/config.py b/rad-sim/config.py index fdc7e92..f5670d1 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -378,32 +378,59 @@ def generate_radsim_config_file(radsim_knobs, cluster_knobs): radsim_config_file.write(str(cluster_knobs[param]) + "\n") radsim_config_file.close() -def generate_radsim_main(design_name): +def generate_radsim_main(design_names, num_rads, radsim_knobs): main_cpp_file = open(radsim_header_params["radsim_root_dir"] + "/sim/main_akb_test.cpp", "w") #AKB created temp file to test main_cpp_file.write("#include \n") main_cpp_file.write("#include \n") main_cpp_file.write("#include \n") main_cpp_file.write("#include \n") main_cpp_file.write("#include \n") - main_cpp_file.write("#include \n\n") - main_cpp_file.write("#include <" + design_name + "_system.hpp>\n\n") - main_cpp_file.write("RADSimConfig radsim_config;\n") - main_cpp_file.write("RADSimDesignContext radsim_design;\n") + main_cpp_file.write("#include \n") + main_cpp_file.write("#include \n") + main_cpp_file.write("#include \n\n") + for design_name in design_names: #iterate thru set of design names + main_cpp_file.write("#include <" + design_name + "_system.hpp>\n") + main_cpp_file.write("\nRADSimConfig radsim_config;\n") + #main_cpp_file.write("RADSimDesignContext radsim_design;\n") main_cpp_file.write("std::ostream *gWatchOut;\n") main_cpp_file.write("SimLog sim_log;\n") main_cpp_file.write("SimTraceRecording sim_trace_probe;\n\n") main_cpp_file.write("int sc_main(int argc, char *argv[]) {\n") + main_cpp_file.write("\tstd::string radsim_knobs_filename = \"/sim/radsim_knobs\";\n") + main_cpp_file.write("\tstd::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename;\n") + main_cpp_file.write("\tradsim_config.ResizeAll(" + str(num_rads) + ");\n") + main_cpp_file.write("\tParseRADSimKnobs(radsim_knobs_filepath);\n\n") + main_cpp_file.write("\tRADSimCluster* cluster = new RADSimCluster(" + str(num_rads) + ");\n\n") main_cpp_file.write("\tgWatchOut = &cout;\n") - main_cpp_file.write("\tint log_verbosity = radsim_config.GetIntKnob(\"telemetry_log_verbosity\");\n") + main_cpp_file.write("\tint log_verbosity = radsim_config.GetIntKnobShared(\"telemetry_log_verbosity\");\n") main_cpp_file.write("\tsim_log.SetLogSettings(log_verbosity, \"sim.log\");\n\n") - main_cpp_file.write("\tint num_traces = radsim_config.GetIntKnob(\"telemetry_num_traces\");\n") + main_cpp_file.write("\tint num_traces = radsim_config.GetIntKnobShared(\"telemetry_num_traces\");\n") main_cpp_file.write("\tsim_trace_probe.SetTraceRecordingSettings(\"sim.trace\", num_traces);\n\n") - main_cpp_file.write("\tsc_clock *driver_clk_sig = new sc_clock(\n") - main_cpp_file.write("\t\t\"node_clk0\", radsim_config.GetDoubleKnob(\"sim_driver_period\"), SC_NS);\n\n") - main_cpp_file.write("\t" + design_name + "_system *system = new " + design_name + "_system(\"" + design_name + "_system\", driver_clk_sig);\n") - main_cpp_file.write("\tsc_start();\n\n") - main_cpp_file.write("\tdelete system;\n") - main_cpp_file.write("\tdelete driver_clk_sig;\n") + main_cpp_file.write("\tsc_clock *inter_rad_clk_sig = new sc_clock(\n") + main_cpp_file.write("\t\t\"node_clk0\", radsim_config.GetDoubleKnobShared(\"sim_driver_period\"), SC_NS);\n") + main_cpp_file.write("\tRADSimInterRad* blackbox = new RADSimInterRad(\"inter_rad_box\", inter_rad_clk_sig, cluster);\n\n") + for i in range(num_rads): + design_name = radsim_knobs[i]["design_name"] + main_cpp_file.write("\tsc_clock *driver_clk_sig" + str(i) + " = new sc_clock(\n") + main_cpp_file.write("\t\t\"node_clk0\", radsim_config.GetDoubleKnobShared(\"sim_driver_period\"), SC_NS);\n") + main_cpp_file.write("\t" + design_name + "_system" + str(i) + " *system = new " + design_name + "_system(\"" + + design_name + "_system\", driver_clk_sig" + str(i) + + ", cluster->all_rads[" + str(i) + "]);\n") + main_cpp_file.write("\tcluster->StoreSystem(system" + str(i) + ");\n") + main_cpp_file.write("\tblackbox->ConnectRadAxi(" + str(i) +");\n\n") + #main_cpp_file.write("\tsc_start();\n\n") + main_cpp_file.write("\n\tint start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared(\"sim_driver_period\"));\n") + main_cpp_file.write("\twhile (cluster->AllRADsNotDone()) {\n") + main_cpp_file.write("\t\tsc_start(1, SC_NS);\n") + main_cpp_file.write("\t}\n") + main_cpp_file.write("\tint end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared(\"sim_driver_period\"));\n") + main_cpp_file.write("\tsc_stop();\n") + main_cpp_file.write("\tstd::cout << \"Simulation Cycles from main.cpp = \" << end_cycle - start_cycle << std::endl;\n\n") + for i in range(num_rads): + main_cpp_file.write("\tdelete system" + str(i) + ";\n") + main_cpp_file.write("\tdelete driver_clk_sig" + str(i) + ";\n") + main_cpp_file.write("\tdelete blackbox;\n") #AKB added only to script + main_cpp_file.write("\tdelete inter_rad_clk_sig;\n\n") #AKB added only to script main_cpp_file.write("\tsc_flit scf;\n") main_cpp_file.write("\tscf.FreeAllFlits();\n") main_cpp_file.write("\tFlit *f = Flit::New();\n") @@ -413,7 +440,7 @@ def generate_radsim_main(design_name): main_cpp_file.write("\tsim_trace_probe.dump_traces();\n") main_cpp_file.write("\t(void)argc;\n") main_cpp_file.write("\t(void)argv;\n") - main_cpp_file.write("\treturn radsim_design.GetSimExitCode();\n") + main_cpp_file.write("\treturn cluster->all_rads[0]->GetSimExitCode();\n") main_cpp_file.write("}\n") def prepare_build_dir(design_names): @@ -437,7 +464,7 @@ def prepare_build_dir(design_names): # Get design name from command line argument if len(sys.argv) < 3: - print("Invalid arguments: python config.py <[optional] other_design_names>") + print("Invalid arguments: python config.py <[optional] other_unique_design_names>") exit(1) num_configs = int(sys.argv[1]) design_names = set() #No duplicating design include statements and cmake commands @@ -552,7 +579,7 @@ def prepare_build_dir(design_names): generate_booksim_config_files(booksim_params_per_rad, radsim_header_params, radsim_knobs_per_rad, cluster_knobs) generate_radsim_params_header(radsim_header_params) generate_radsim_config_file(radsim_knobs_per_rad, cluster_knobs) -#generate_radsim_main(design_name) #TODO: fix +generate_radsim_main(design_names, cluster_knobs["num_rads"], radsim_knobs_per_rad) #TODO: fix prepare_build_dir(design_names) From c4d45a3d1e9f96d912acef09b8e6b52b6b7e53ac Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sun, 7 Jul 2024 00:35:23 -0400 Subject: [PATCH 076/127] Fixed multi-rad support in config.py generate_radsim_main --- rad-sim/config.py | 13 ++++---- rad-sim/sim/main.cpp | 79 ++++++++++---------------------------------- 2 files changed, 25 insertions(+), 67 deletions(-) diff --git a/rad-sim/config.py b/rad-sim/config.py index f5670d1..0b25444 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -379,7 +379,7 @@ def generate_radsim_config_file(radsim_knobs, cluster_knobs): radsim_config_file.close() def generate_radsim_main(design_names, num_rads, radsim_knobs): - main_cpp_file = open(radsim_header_params["radsim_root_dir"] + "/sim/main_akb_test.cpp", "w") #AKB created temp file to test + main_cpp_file = open(radsim_header_params["radsim_root_dir"] + "/sim/main.cpp", "w") main_cpp_file.write("#include \n") main_cpp_file.write("#include \n") main_cpp_file.write("#include \n") @@ -406,18 +406,19 @@ def generate_radsim_main(design_names, num_rads, radsim_knobs): main_cpp_file.write("\tsim_log.SetLogSettings(log_verbosity, \"sim.log\");\n\n") main_cpp_file.write("\tint num_traces = radsim_config.GetIntKnobShared(\"telemetry_num_traces\");\n") main_cpp_file.write("\tsim_trace_probe.SetTraceRecordingSettings(\"sim.trace\", num_traces);\n\n") - main_cpp_file.write("\tsc_clock *inter_rad_clk_sig = new sc_clock(\n") - main_cpp_file.write("\t\t\"node_clk0\", radsim_config.GetDoubleKnobShared(\"sim_driver_period\"), SC_NS);\n") - main_cpp_file.write("\tRADSimInterRad* blackbox = new RADSimInterRad(\"inter_rad_box\", inter_rad_clk_sig, cluster);\n\n") for i in range(num_rads): design_name = radsim_knobs[i]["design_name"] main_cpp_file.write("\tsc_clock *driver_clk_sig" + str(i) + " = new sc_clock(\n") main_cpp_file.write("\t\t\"node_clk0\", radsim_config.GetDoubleKnobShared(\"sim_driver_period\"), SC_NS);\n") - main_cpp_file.write("\t" + design_name + "_system" + str(i) + " *system = new " + design_name + "_system(\"" + main_cpp_file.write("\t" + design_name + "_system *system" + str(i) + " = new " + design_name + "_system(\"" + design_name + "_system\", driver_clk_sig" + str(i) + ", cluster->all_rads[" + str(i) + "]);\n") main_cpp_file.write("\tcluster->StoreSystem(system" + str(i) + ");\n") - main_cpp_file.write("\tblackbox->ConnectRadAxi(" + str(i) +");\n\n") + main_cpp_file.write("\n\tsc_clock *inter_rad_clk_sig = new sc_clock(\n") + main_cpp_file.write("\t\t\"node_clk0\", radsim_config.GetDoubleKnobShared(\"sim_driver_period\"), SC_NS);\n") + main_cpp_file.write("\tRADSimInterRad* blackbox = new RADSimInterRad(\"inter_rad_box\", inter_rad_clk_sig, cluster);\n\n") + for i in range(num_rads): + main_cpp_file.write("\tblackbox->ConnectRadAxi(" + str(i) +");\n") #main_cpp_file.write("\tsc_start();\n\n") main_cpp_file.write("\n\tint start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared(\"sim_driver_period\"));\n") main_cpp_file.write("\twhile (cluster->AllRADsNotDone()) {\n") diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 30923ea..7c6f8f3 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -4,31 +4,23 @@ #include #include #include -#include //AKB ADDED -#include //AKB ADDED +#include +#include -//#include -//#include //AKB ADDED to test multi-design #include RADSimConfig radsim_config; -//RADSimDesignContext radsim_design; //AKB: commented out std::ostream *gWatchOut; SimLog sim_log; SimTraceRecording sim_trace_probe; int sc_main(int argc, char *argv[]) { - //AKB: moved from RADSimDesignContext constructor to here std::string radsim_knobs_filename = "/sim/radsim_knobs"; std::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename; - radsim_config.ResizeAll(2); //bc two RADs - ParseRADSimKnobs(radsim_knobs_filepath); //AKB moved this to main.cpp so it only gets called once, not per-RAD + radsim_config.ResizeAll(2); + ParseRADSimKnobs(radsim_knobs_filepath); - int num_rads_parsed = radsim_config.GetIntKnobShared("num_rads"); - std::cout << "num_rads_parsed: " << num_rads_parsed << std::endl; - //AKB: using RADSimCluster class instead of creating new above - //RADSimCluster* cluster = new RADSimCluster(3); //2); - RADSimCluster* cluster = new RADSimCluster(num_rads_parsed); + RADSimCluster* cluster = new RADSimCluster(2); gWatchOut = &cout; int log_verbosity = radsim_config.GetIntKnobShared("telemetry_log_verbosity"); @@ -37,71 +29,37 @@ int sc_main(int argc, char *argv[]) { int num_traces = radsim_config.GetIntKnobShared("telemetry_num_traces"); sim_trace_probe.SetTraceRecordingSettings("sim.trace", num_traces); - - sc_clock *driver_clk_sig = new sc_clock( + sc_clock *driver_clk_sig0 = new sc_clock( "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); - - //add_system *system = new add_system("add_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED - dlrm_system *system = new dlrm_system("dlrm_system", driver_clk_sig, cluster->all_rads[0]); - + dlrm_system *system0 = new dlrm_system("dlrm_system", driver_clk_sig0, cluster->all_rads[0]); + cluster->StoreSystem(system0); sc_clock *driver_clk_sig1 = new sc_clock( "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); - dlrm_system *system1 = new dlrm_system("dlrm_system1", driver_clk_sig1, cluster->all_rads[1]); - //mult_system *system = new mult_system("mult_system", driver_clk_sig, cluster->all_rads[0]); //AKB ADDED - - // sc_clock *driver_clk_sig2 = new sc_clock( - // "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED - - // //add_system *system2 = new add_system("add_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED - // mult_system *system2 = new mult_system("mult_system", driver_clk_sig2, cluster->all_rads[1]); //AKB ADDED - - // sc_clock *driver_clk_sig3 = new sc_clock( - // "node_clk0", radsim_config.GetDoubleKnob("sim_driver_period"), SC_NS); //AKB ADDED - - // mult_system *system3 = new mult_system("mult_system3", driver_clk_sig3, cluster->all_rads[2]); //AKB ADDED - - //AKB ADDED: - cluster->StoreSystem(system); + dlrm_system *system1 = new dlrm_system("dlrm_system", driver_clk_sig1, cluster->all_rads[1]); cluster->StoreSystem(system1); - // cluster->StoreSystem(system2); - // cluster->StoreSystem(system3); + sc_clock *inter_rad_clk_sig = new sc_clock( - "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); //AKB ADDED, use same period as sim driver + "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); - //blackbox->ConnectRadPair(0, 1); //TODO: comment out bc not using this + blackbox->ConnectRadAxi(0); blackbox->ConnectRadAxi(1); - // blackbox->ConnectRadAxi(2); - + int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); - // sc_bv<128> new_val; - // sc_bv<128> old_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); - //sc_start(); while (cluster->AllRADsNotDone()) { sc_start(1, SC_NS); - // //std::cout << "read system portal_in: " << system->dut_inst->portal_in.read() << std::endl; - // //new_val = system2->dut_inst->portal_in.read(); //works but replacing to test axi - // new_val = system2->dut_inst->design_top_portal_axis_slave.tdata.read(); //TODO: use handshaking properly - // //if (val != 0) { - // if (new_val != old_val) { //to ensure only displayed once - // std::cout << "read system2 design_top_portal_axis_slave: " << new_val.to_uint64() << std::endl; - // old_val = new_val; - // } } - std::cout << "stopping" << std::endl; int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); sc_stop(); - //int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); std::cout << "Simulation Cycles from main.cpp = " << end_cycle - start_cycle << std::endl; - delete system; + delete system0; + delete driver_clk_sig0; delete system1; - // delete system2; //AKB ADDED - // delete system3; //AKB ADDED - delete driver_clk_sig; delete driver_clk_sig1; - // delete driver_clk_sig2; //AKB ADDED - // delete driver_clk_sig3; //AKB ADDED + delete blackbox; + delete inter_rad_clk_sig; + sc_flit scf; scf.FreeAllFlits(); Flit *f = Flit::New(); @@ -111,6 +69,5 @@ int sc_main(int argc, char *argv[]) { sim_trace_probe.dump_traces(); (void)argc; (void)argv; - //return radsim_design.GetSimExitCode(); return cluster->all_rads[0]->GetSimExitCode(); } From efca6675e07090f0f3a4d414df17ea855fd0d978 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 10 Jul 2024 03:04:02 -0400 Subject: [PATCH 077/127] Updated readthedocs to reflect multi-RAD RADSim --- docs/rad-sim-code-structure.rst | 127 ++++++++++++++++++++------ docs/rad-sim-developer.rst | 2 + docs/rad-sim-quick-start.rst | 3 +- docs/rad-sim-rtl-code.rst | 2 + docs/rad-sim-two-rad-dlrm-example.rst | 46 ++++++++++ 5 files changed, 150 insertions(+), 30 deletions(-) create mode 100644 docs/rad-sim-two-rad-dlrm-example.rst diff --git a/docs/rad-sim-code-structure.rst b/docs/rad-sim-code-structure.rst index 1af111a..4ee11fe 100644 --- a/docs/rad-sim-code-structure.rst +++ b/docs/rad-sim-code-structure.rst @@ -25,8 +25,12 @@ The code structure of RAD-Sim is summarized as follows: | | |- sc_flit.{cpp/hpp} | | |- radsim_noc.{cpp/hpp} | |- design_context.{cpp/hpp} + | |- design_system.hpp + | |- design_top.hpp + | |- radsim_cluster.{cpp/hpp} | |- radsim_config.{cpp/hpp} | |- radsim_defines.hpp + | |- radsim_inter_rad.{cpp/hpp} | |- radsim_module.{cpp/hpp} | |- radsim_telemetry.{cpp/hpp} | |- radsim_utils.{cpp/hpp} @@ -34,7 +38,7 @@ The code structure of RAD-Sim is summarized as follows: |- example-designs/ | |- mydesign/ | | |- modules/ - | | |- config.yml + | | |- uni_config.yml | | |- mydesign_driver.{cpp/hpp} | | |- mydesign_system.{cpp/hpp} | | |- mydesign_top.{cpp/hpp} @@ -66,12 +70,20 @@ This directory includes all the RAD-Sim simulation infrastructure and utilities: * `DRAMsim3 `_ memory simulator source code. * SystemC wrapper for DRAMsim that presents an AXI-MM interface and implements functionality book-keeping to be instantiated in application designs (``mem_controller.{cpp/hpp}``). -* The ``RADSimDesignContext`` class in ``design_context.{cpp/hpp}`` which stores all the details of a RAD-Sim design such as NoCs and modules of the design, their clocks, module NoC placement, and connections between modules and NoC adapters. For each RAD-Sim simulation, there is a single global variable of this class type (``radsim_design``) that stores these information to be used from any part of the simulator. +* The ``RADSimDesignContext`` class in ``design_context.{cpp/hpp}`` which stores all the details of a RAD-Sim design such as NoCs and modules of the design, their clocks, module NoC placement, and connections between modules and NoC adapters. For each device in the RAD-Sim simulation, there is a variable of this class type (``radsim_design``) that stores these information to be used from any part of the simulator. + +* The ``design_system`` class in ``design_system.hpp`` which is a generalized parent class for any design. Each design in the example-designs directory has its own system class that should inherit from this class. This class has ``sc_module`` as its virtual parent class. + +* The ``design_top`` class in ``design_top.hpp`` which is a parent class for the DUT (top) class used within any design. It contains the creation of a portal module which is used to interface with the inter-RAD network. This class has ``sc_module`` as its virtual parent class. + +* The ``radsim_cluster`` class in ``radsim_cluster.{cpp/hpp}`` which stores details for the cluster of multiple RADs for the RADSim simulation. * The ``RADSimConfig`` class in ``radsim_config.{cpp/hpp}`` which stores all the RAD-Sim configuration parameters. * RAD-Sim constant definitions in ``radsim_defines.hpp``. This header file is automatically generated by the RAD-Sim configuration script (``config.py``). +* The ``radsim_inter_rad class`` in ``radsim_inter_rad.{cpp/hpp}`` which implements a latency- and bandwidth-constrained network for communication between RADs. + * The ``RADSimModule`` class in ``radsim_module.{cpp/hpp}`` which implements an abstract class from which all RAD-Sim application modules are derived. This class stores information about each module in the design such as its name, its clock, pointers to its AXI-MM/AXI-S ports and their data widths. Each module in the application design must implement the pure virtual funtion ``RegisterModuleInfo()`` with adds the module AXI-MM and AXI-S master/slave ports to the ``RADSimDesignContext`` class. * Logging and trace recording functions and classes in ``radsim_telemetry.{cpp/hpp}``. @@ -98,7 +110,7 @@ ports which are defined in the ``sim/{aximm|axi_s}_interface.hpp`` files. Design Top-level (``_top.{cpp/hpp}``) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -These files define a SystemC module (``sc_module``) that instantiates all the modules in the design and connects any +These files define a design_top class which in turn defines a SystemC module (``sc_module``) that instantiates all the modules in the design and connects any non-NoC signals between the modules in its constructor using conventional SystemC syntax. At the end of its constructor, it must include the following lines of code to build the design context, create the system NoCs, and automatically connect the ports of NoC-attached modules to the NoC based on the NoC placement file: @@ -106,15 +118,15 @@ connect the ports of NoC-attached modules to the NoC based on the NoC placement .. code-block:: c++ // mydesign_top Constructor - mydesign_top::mydesign_top(const sc_module_name &name): sc_module(name) { - + mydesign_top::mydesign_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : design_top(radsim_design) { + this->radsim_design = radsim_design; //to use within design // Module Instantiations and Connections Start Here // ... // Module Instantiations and Connections End Here - radsim_design.BuildDesignContext("mydesign.place", "mydesign.clks"); - radsim_design.CreateSystemNoCs(rst); - radsim_design.ConnectModulesToNoC(); + radsim_design->BuildDesignContext("mydesign.place", "mydesign.clks"); + radsim_design->CreateSystemNoCs(rst); + radsim_design->ConnectModulesToNoC(); } The design top-level SystemC module will typically have input/output ports (``sc_in/sc_out``) which will be used to @@ -131,11 +143,11 @@ this driver module performs the following steps: 2. Use the ``source`` thread to send inputs to design top-level when ready 3. Use ``sink`` thread to listen for outputs from the design top-level when available 4. Compare received outputs to golden outputs to verify functionality -5. Stop simulation when all outputs are received +5. Raise per-RAD flag to stop simulation when all outputs are received across all devices under simulation Design System (``_system.{cpp/hpp}``) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -This is a simple SystemC module (``sc_module``) that instantiates and connects the design top-level and simulation +This inherits from the design_system class and is a simple SystemC module (``sc_module``) that instantiates and connects the design top-level and simulation driver modules. This is the single module that will be instantiated inside the ``sc_main()`` function in the ``main.cpp`` file. @@ -151,7 +163,7 @@ space-separated) as shown in the example below. module_b 0 0 The two integers in each line represent the indecies to the NoC adapters and design clock period values listed in the -design's ``config.yml`` file. For example, if the ``config.yml`` file, had the following values, it means that the NoC +design's ``uni_config.yml`` file. For example, if the ``uni_config.yml`` file, had the following values, it means that the NoC adapters of both modules are operating at 1.25 ns clock period (800 MHz), while ``module_a`` has a clock period of 2.5 ns (400 MHz) and ``module_b`` has a clock period of 5.0 ns (200 MHz). @@ -195,11 +207,14 @@ for CMake to compile correctly when you build RAD-Sim for the application design recommended that you copy the ``CMakeLists.txt`` file from one of the provided example design directories and edit the ``hdrfiles`` and ``srcfiles`` variables to include all your design ``.hpp`` and ``.cpp`` files. -RAD-Sim Configuration File (``config.yml``) +RAD-Sim Configuration File (``uni_config.yml``) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ This YAML file configures all the RAD-Sim parameters for the simulation of the application design under 4 main tags: -``noc``, ``noc_adapters``, ``design``, and ``telemetry``. An example configuration file is shown below, followed by -an explanation for each configuration parameter. +``noc``, ``noc_adapters``, ``config ``, and ``cluster``, and . The ``noc`` and ``noc_adapters`` parameters are shared across all RADs. +There may be multiple ``config `` sections, with each describing a configuration that applies to a specified number of RADs. +The ``cluster`` tag describes the cluster of RADs, including the number of RADs and their configurations. +Note that the parameters within a ``config `` subsection can be applied to a single RAD or shared among multiple RADs. +An example configuration file is shown below, followed by an explanation for each configuration parameter. .. code-block:: yaml @@ -232,14 +247,40 @@ an explanation for each configuration parameter. out_arbiter: ['priority_rr'] vc_mapping: ['direct'] - design: - name: 'aximm_hello_world' - noc_placement: ['aximm_hello_world.place'] - clk_periods: [5.0] - - telemetry: - log_verbosity: 2 - traces: [] + config rad1: + dram: + num_controllers: 4 + clk_periods: [3.32, 3.32, 2.0, 2.0] + queue_sizes: [64, 64, 64, 64] + config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] + + design: + name: 'dlrm' + noc_placement: ['dlrm.place'] + clk_periods: [5.0, 2.0, 3.32, 1.5] + + config anotherconfig: + dram: + num_controllers: 4 + clk_periods: [3.32, 3.32, 2.0, 2.0] + queue_sizes: [64, 64, 64, 64] + config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] + + design: + name: 'dlrm' + noc_placement: ['dlrm.place'] + clk_periods: [5.0, 2.0, 3.32, 1.5] + + cluster: + sim_driver_period: 5.0 + telemetry_log_verbosity: 2 + telemetry_traces: ['Embedding LU', 'Mem0', 'Mem1', 'Mem2', 'Mem3', 'Feature Inter.', 'MVM first', 'MVM last'] + num_rads: 2 + cluster_configs: ['rad1', 'anotherconfig'] + cluster_topology: 'all-to-all' + inter_rad_latency: 2100 + inter_rad_bw: 102.4 + inter_rad_fifo_num_slots: 1000 **NoC Configuration Parameters** @@ -293,19 +334,47 @@ an explanation for each configuration parameter. :menuselection:`vc_mapping` -**Design Configuration Parameters** +**Config Configuration Parameters** + +**Config subsection: DRAM Configuration Parameters** + +:menuselection:`num_controllers` is the number of DRAM controllers + +:menuselection:`clk_periods` are the clock periods per DRAM + +:menuselection:`queue_sizes` are the sizes for the queue used for each + +:menuselection:`config_files` are the filenames of the files specifying the memory configuration per DRAM + +**Config subsection: Design Configuration Parameters** + +:menuselection:`name` of the design being run in this configuration + +:menuselection:`noc_placement` is the NoC placement file to use + +:menuselection:`clk_periods` are the clock periods for the configuration + +**Cluster Configuration Parameters** + +:menuselection:`sim_driver_period` is the max clock period in nanoseconds for the entire simulation. Simulation cycle counts are reported based upon this. + +:menuselection:`telemetry_log_verbosity` specifies how much detail to use for the telemetry logging + +:menuselection:`telemetry_traces` specifies which simulation traces to use for telemetry + +:menuselection:`num_rads` is the number of RADs being simulated -:menuselection:`name` +:menuselection:`cluster_configs` is a list of which configuration to use per-RAD. These names must match those in the config tagged sections. -:menuselection:`noc_placement` +:menuselection:`cluster_topology` is not currently used but is meant to specify the connection of RADs within the cluster. +Currently only all-to-all is supported wherein each RAD can send to and receive data from any other RAD over the inter-RAD network directly. -:menuselection:`clk_periods` +:menuselection:`inter_rad_latency` is the latency in nanoseconds for data transfer between RADs over the inter-RAD network -**Telemetry Configuration Parameters** +:menuselection:`inter_rad_bw` is the bandwidth in bits per nanosecond for data transfer between RADs over the inter-RAD network -:menuselection:`log_verbosity` +:menuselection:`inter_rad_fifo_num_slots` is the number of FIFO slots available for the buffering within the inter-RAD network -:menuselection:`traces` Testing Scripts (``test``) -------------------------- diff --git a/docs/rad-sim-developer.rst b/docs/rad-sim-developer.rst index 3e9ad03..b044fe0 100644 --- a/docs/rad-sim-developer.rst +++ b/docs/rad-sim-developer.rst @@ -1,6 +1,8 @@ RAD-Sim Developers =================== +WARNING/TODO: this guide has not been updated or tested with multi-RAD RADSim. This is functional for single-RAD RADSim. + RAD-Sim Testing Infrastructure ------------------------------- diff --git a/docs/rad-sim-quick-start.rst b/docs/rad-sim-quick-start.rst index 3ac3afc..ae4d4ab 100644 --- a/docs/rad-sim-quick-start.rst +++ b/docs/rad-sim-quick-start.rst @@ -74,11 +74,12 @@ Building RAD-Sim ---------------- You can configure RAD-Sim for your example design simulation using the following commands executed at the ``rad-sim`` root directory (the commands use the ``mlp`` example design which can be replaced by your own design under the ``rad-flow/rad-sim/example-designs`` directory): +You can specify the number of RADs desired. .. code-block:: bash $ cd /rad-sim - $ python config.py mlp + $ python config.py 1 mlp Running RAD-Sim ---------------- diff --git a/docs/rad-sim-rtl-code.rst b/docs/rad-sim-rtl-code.rst index 7e477cb..5612ecb 100644 --- a/docs/rad-sim-rtl-code.rst +++ b/docs/rad-sim-rtl-code.rst @@ -1,5 +1,7 @@ Compiling a RAD-Sim Module with RTL ==================================== +WARNING/TODO: this guide has not been updated or tested with multi-RAD RADSim. This is functional for single-RAD RADSim. + RAD-Sim has the capability to support RTL code (Verilog/SystemVerilog only) through Verilator. Verilator compiles RTL code into a faster optimized model, wrapped inside a C++/SystemC module. More information about Verilator can be found at `Veripool `_. diff --git a/docs/rad-sim-two-rad-dlrm-example.rst b/docs/rad-sim-two-rad-dlrm-example.rst new file mode 100644 index 0000000..5503ef9 --- /dev/null +++ b/docs/rad-sim-two-rad-dlrm-example.rst @@ -0,0 +1,46 @@ +Two-RAD DLRM Example Design +================= + +This guide explains how to use the two-RAD DLRM example design. RAD 1 is responsible for the DLRM up to and including the embedding table lookups. +These are then transmitted to RAD 2 over the inter-RAD network, which then completes the remaining model stages. + +Building RAD-Sim +---------------- + +You can configure RAD-Sim for the two-RAD DLRM design simulation using the following commands executed at the ``rad-sim`` root directory. + +.. code-block:: bash + + $ cd /rad-sim + $ python config.py 2 dlrm + +Running RAD-Sim +---------------- + +You can then simulate this two-RAD DLRM example design following these steps: + + +1. Generate a DLRM test case using the provided compiler: + + .. code-block:: bash + + $ cd /rad-sim/example-designs/dlrm/compiler + $ python dlrm.py + +2. Run RAD-Sim simulation: + + .. code-block:: bash + + $ cd /rad-sim/build + $ make run + # .... + # dlrm_system.dut.feature_interaction_inst: Got all memory responses at cycle 6101! + # [==================================================] 100 % + # Got 2048 output(s)! + # Simulation PASSED! All outputs matching! + # Simulated 20377 cycle(s) + # stopping + + # Info: /OSCI/SystemC: Simulation stopped by user. + # Simulation Cycles from main.cpp = 20390 + # [100%] Built target run \ No newline at end of file From 3c6a8f7940eb0dab3e832d3486bc6df13a5f4fee Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 10 Jul 2024 17:47:21 -0400 Subject: [PATCH 078/127] Removed need for num_configs commandline arg for configuration script, updated documentation with mtng feedback --- docs/rad-sim-code-structure.rst | 50 +++--- docs/rad-sim-quick-start.rst | 4 +- docs/rad-sim-two-rad-dlrm-example.rst | 2 +- rad-sim/config.py | 250 +++++++++++++------------- 4 files changed, 157 insertions(+), 149 deletions(-) diff --git a/docs/rad-sim-code-structure.rst b/docs/rad-sim-code-structure.rst index 4ee11fe..30e7352 100644 --- a/docs/rad-sim-code-structure.rst +++ b/docs/rad-sim-code-structure.rst @@ -56,7 +56,7 @@ Simulator Infrastructure (``sim``) ---------------------------------- This directory includes all the RAD-Sim simulation infrastructure and utilities: -* The ``noc`` directory which contains everything related to the NoC modeling: +* The ``noc`` directory contains everything related to the NoC modeling: * `Booksim 2.0 `_ NoC simulator source code. * Definitions of the AXI memory mapped (AXI-MM) and streaming (AXI-S) interfaces (``{aximm/axis}_interface.hpp``). @@ -70,31 +70,31 @@ This directory includes all the RAD-Sim simulation infrastructure and utilities: * `DRAMsim3 `_ memory simulator source code. * SystemC wrapper for DRAMsim that presents an AXI-MM interface and implements functionality book-keeping to be instantiated in application designs (``mem_controller.{cpp/hpp}``). -* The ``RADSimDesignContext`` class in ``design_context.{cpp/hpp}`` which stores all the details of a RAD-Sim design such as NoCs and modules of the design, their clocks, module NoC placement, and connections between modules and NoC adapters. For each device in the RAD-Sim simulation, there is a variable of this class type (``radsim_design``) that stores these information to be used from any part of the simulator. +* The ``RADSimDesignContext`` class in ``design_context.{cpp/hpp}`` stores all the details of a RAD-Sim design such as NoCs and modules of the design, their clocks, module NoC placement, and connections between modules and NoC adapters. For each device in the RAD-Sim simulation, there is a variable of this class type (``radsim_design``) that stores these information to be used from any part of the simulator. -* The ``design_system`` class in ``design_system.hpp`` which is a generalized parent class for any design. Each design in the example-designs directory has its own system class that should inherit from this class. This class has ``sc_module`` as its virtual parent class. - -* The ``design_top`` class in ``design_top.hpp`` which is a parent class for the DUT (top) class used within any design. It contains the creation of a portal module which is used to interface with the inter-RAD network. This class has ``sc_module`` as its virtual parent class. +* The ``radsim_cluster`` class in ``radsim_cluster.{cpp/hpp}`` stores details for the cluster of multiple RADs for the RADSim simulation. This is the top-level of the hierarchy for multiple device simulation. -* The ``radsim_cluster`` class in ``radsim_cluster.{cpp/hpp}`` which stores details for the cluster of multiple RADs for the RADSim simulation. +* The ``design_system`` class in ``design_system.hpp`` is a generalized parent class used per design. The design_system wraps around the device-under-test (DUT) and testbench. Each design in the example-designs directory has its own system class that should inherit from this class. This class has ``sc_module`` as its virtual parent class. + +* The ``design_top`` class in ``design_top.hpp`` is a parent class for the DUT (top) class used within any design. It contains the creation of a portal module which is used to interface with the inter-RAD network. This class has ``sc_module`` as its virtual parent class. -* The ``RADSimConfig`` class in ``radsim_config.{cpp/hpp}`` which stores all the RAD-Sim configuration parameters. +* The ``RADSimConfig`` class in ``radsim_config.{cpp/hpp}`` stores all the RAD-Sim configuration parameters. -* RAD-Sim constant definitions in ``radsim_defines.hpp``. This header file is automatically generated by the RAD-Sim configuration script (``config.py``). +* RAD-Sim constant definitions are in ``radsim_defines.hpp``. This header file is automatically generated by the RAD-Sim configuration script (``config.py``). -* The ``radsim_inter_rad class`` in ``radsim_inter_rad.{cpp/hpp}`` which implements a latency- and bandwidth-constrained network for communication between RADs. +* The ``radsim_inter_rad class`` in ``radsim_inter_rad.{cpp/hpp}`` implements a latency- and bandwidth-constrained network for communication between RADs. -* The ``RADSimModule`` class in ``radsim_module.{cpp/hpp}`` which implements an abstract class from which all RAD-Sim application modules are derived. This class stores information about each module in the design such as its name, its clock, pointers to its AXI-MM/AXI-S ports and their data widths. Each module in the application design must implement the pure virtual funtion ``RegisterModuleInfo()`` with adds the module AXI-MM and AXI-S master/slave ports to the ``RADSimDesignContext`` class. +* The ``RADSimModule`` class in ``radsim_module.{cpp/hpp}`` implements an abstract class from which all RAD-Sim application modules are derived. This class stores information about each module in the design such as its name, its clock, pointers to its AXI-MM/AXI-S ports and their data widths. Each module in the application design must implement the pure virtual funtion ``RegisterModuleInfo()`` with adds the module AXI-MM and AXI-S master/slave ports to the ``RADSimDesignContext`` class. -* Logging and trace recording functions and classes in ``radsim_telemetry.{cpp/hpp}``. +* Logging and trace recording functions and classes are in ``radsim_telemetry.{cpp/hpp}``. - * The ``NoCTransactionTrace`` and ``NoCTransactionTelemetry`` for collecting NoC statistics. - * The ``SimLog`` class for logging simulator messages. - * The ``SimTraceRecording`` class for recording timestamps at any time during the simulation and dumping them as simulation traces at the end of the simulation. + * The ``NoCTransactionTrace`` and ``NoCTransactionTelemetry`` are used for collecting NoC statistics. + * The ``SimLog`` class is for logging simulator messages. + * The ``SimTraceRecording`` class is for recording timestamps at any time during the simulation and dumping them as simulation traces at the end of the simulation. -* Utility functions functions and struct definitions in ``radsim_utils.{cpp/hpp}``. +* Utility functions functions and struct definitions are in ``radsim_utils.{cpp/hpp}``. -* The ``main.cpp`` file which declares all the global variables, instantiates the system to be simulated and starts the SystemC simulation. +* The ``main.cpp`` file declares all the global variables, instantiates the system to be simulated, and starts the SystemC simulation. Application Designs (``example-designs``) ----------------------------------------- @@ -104,7 +104,7 @@ own sub-directory (``/``) which must contain the following files/di Modules Directory (``modules/``) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -This directory includes the SystemC definitions of all the modules in the design. All these modules have to be derived +This directory includes the SystemC definitions of all the modules in the design. All of these modules have to be derived from the ``RADSimModule`` abstract class. If a module is to be attached to the NoC, it must have AXI-MM and/or AXI-S ports which are defined in the ``sim/{aximm|axi_s}_interface.hpp`` files. @@ -202,7 +202,7 @@ same NoC router with arbitration logic between them. CMakeLists File (``CMakeLists.txt``) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -This is a convntional CMakeLists file that lists all your modules, top, driver, and system header and source files +This is a conventional CMakeLists file that lists all your modules, top, driver, and system header and source files for CMake to compile correctly when you build RAD-Sim for the application design. For a new application design, it is recommended that you copy the ``CMakeLists.txt`` file from one of the provided example design directories and edit the ``hdrfiles`` and ``srcfiles`` variables to include all your design ``.hpp`` and ``.cpp`` files. @@ -210,7 +210,7 @@ recommended that you copy the ``CMakeLists.txt`` file from one of the provided e RAD-Sim Configuration File (``uni_config.yml``) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ This YAML file configures all the RAD-Sim parameters for the simulation of the application design under 4 main tags: -``noc``, ``noc_adapters``, ``config ``, and ``cluster``, and . The ``noc`` and ``noc_adapters`` parameters are shared across all RADs. +``noc``, ``noc_adapters``, ``config ``, and ``cluster``. The ``noc`` and ``noc_adapters`` parameters are shared across all RADs. There may be multiple ``config `` sections, with each describing a configuration that applies to a specified number of RADs. The ``cluster`` tag describes the cluster of RADs, including the number of RADs and their configurations. Note that the parameters within a ``config `` subsection can be applied to a single RAD or shared among multiple RADs. @@ -276,10 +276,10 @@ An example configuration file is shown below, followed by an explanation for eac telemetry_log_verbosity: 2 telemetry_traces: ['Embedding LU', 'Mem0', 'Mem1', 'Mem2', 'Mem3', 'Feature Inter.', 'MVM first', 'MVM last'] num_rads: 2 - cluster_configs: ['rad1', 'anotherconfig'] - cluster_topology: 'all-to-all' - inter_rad_latency: 2100 - inter_rad_bw: 102.4 + cluster_configs: ['rad1', 'anotherconfig'] #use config 'rad1' for the first RAD and config 'anotherconfig' for the second RAD under simulation + cluster_topology: 'all-to-all' #this parameter is not currently used + inter_rad_latency: 2100 #in nanoseconds + inter_rad_bw: 102.4 #in bits per nanosecond inter_rad_fifo_num_slots: 1000 **NoC Configuration Parameters** @@ -376,5 +376,5 @@ Currently only all-to-all is supported wherein each RAD can send to and receive :menuselection:`inter_rad_fifo_num_slots` is the number of FIFO slots available for the buffering within the inter-RAD network -Testing Scripts (``test``) --------------------------- +.. Testing Scripts (``test``) +.. -------------------------- diff --git a/docs/rad-sim-quick-start.rst b/docs/rad-sim-quick-start.rst index ae4d4ab..6332828 100644 --- a/docs/rad-sim-quick-start.rst +++ b/docs/rad-sim-quick-start.rst @@ -74,12 +74,10 @@ Building RAD-Sim ---------------- You can configure RAD-Sim for your example design simulation using the following commands executed at the ``rad-sim`` root directory (the commands use the ``mlp`` example design which can be replaced by your own design under the ``rad-flow/rad-sim/example-designs`` directory): -You can specify the number of RADs desired. - .. code-block:: bash $ cd /rad-sim - $ python config.py 1 mlp + $ python config.py mlp Running RAD-Sim ---------------- diff --git a/docs/rad-sim-two-rad-dlrm-example.rst b/docs/rad-sim-two-rad-dlrm-example.rst index 5503ef9..1694fff 100644 --- a/docs/rad-sim-two-rad-dlrm-example.rst +++ b/docs/rad-sim-two-rad-dlrm-example.rst @@ -12,7 +12,7 @@ You can configure RAD-Sim for the two-RAD DLRM design simulation using the follo .. code-block:: bash $ cd /rad-sim - $ python config.py 2 dlrm + $ python config.py dlrm #dlrm is name of design directory within example-designs parent directory Running RAD-Sim ---------------- diff --git a/rad-sim/config.py b/rad-sim/config.py index 0b25444..d107112 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -463,125 +463,135 @@ def prepare_build_dir(design_names): #os.system("cd build; cmake -DDESIGN:STRING=\"" + 'add' + "\" ..; cd .;") #os.system("cd ..;") -# Get design name from command line argument -if len(sys.argv) < 3: - print("Invalid arguments: python config.py <[optional] other_unique_design_names>") - exit(1) -num_configs = int(sys.argv[1]) -design_names = set() #No duplicating design include statements and cmake commands -for i in range(2, len(sys.argv)): #skip 0th argument (that is current program name), and 1st (number_of_configs) - design_names.add(sys.argv[i]) - print(sys.argv[i]) - -config_indices = [] -for n in range(0, num_configs): - config_indices.append(n) -print(config_indices) - -# Check if design directory exists -for design_name in design_names: - if not(os.path.isdir(os.getcwd() + "/example-designs/" + design_name)): - print("Cannot find design directory under rad-sim/example-designs/") +def find_num_configs(config_filename): + with open(config_filename, 'r') as yaml_config: + config = yaml.safe_load(yaml_config) + config_counter = 0 + for config_section in config: + if 'config' in config_section: + config_counter += 1 + return config_counter + +if __name__ == "__main__": + # Get design name from command line argument + if len(sys.argv) < 2: + print("Invalid arguments: python config.py <[optional] other_unique_design_names>") exit(1) -# Point to YAML configuration file -#config_filename = "example-designs/" + design_name + "/config.yml" -config_filename = "uni_config.yml" -config_names = [] - -# List default parameter values -booksim_params = { - "radsim_root_dir": os.getcwd(), - "noc_type": "2d", - "noc_num_nocs": 1, - "noc_topology": ["mesh"], - "noc_anynet_file": [os.getcwd() + "/sim/noc/anynet_file"], - "noc_dim_x": [8], - "noc_dim_y": [8], - "noc_routing_func": ["dim_order"], - "noc_vcs": [5], - "noc_vc_buffer_size": [8], - "noc_output_buffer_size": [8], - "noc_num_packet_types": [3], - "noc_router_uarch": ["iq"], - "noc_vc_allocator": ["islip"], - "noc_sw_allocator": ["islip"], - "noc_credit_delay": [1], - "noc_routing_delay": [1], - "noc_vc_alloc_delay": [1], - "noc_sw_alloc_delay": [1], -} -radsim_header_params = { #shared across all RADs - "radsim_root_dir": os.getcwd(), - "noc_payload_width": [166], - "noc_packet_id_width": 32, - "noc_vcs": [3], - "noc_num_packet_types": [3], - "noc_num_nodes": [0], - "noc_max_num_router_dest_interfaces": 32, - "interfaces_max_axis_tdata_width": 512, - "interfaces_axis_tkeep_width": 8, - "interfaces_axis_tstrb_width": 8, - "interfaces_axis_tuser_width": 75, - "interfaces_axi_id_width": 8, - "interfaces_axi_user_width": 64, - "interfaces_max_axi_data_width": 512, -} -radsim_knobs = { #includes cluster config - #"radsim_root_dir": os.getcwd(), - "design_name": design_name, - "noc_num_nocs": 1, - "noc_clk_period": [0.571], - "noc_vcs": [3], - "noc_payload_width": [146], - "noc_num_nodes": [0], - "design_noc_placement": ["noc.place"], - "noc_adapters_clk_period": [1.25], - "noc_adapters_fifo_size": [16], - "noc_adapters_obuff_size": [2], - "noc_adapters_in_arbiter": ["fixed_rr"], - "noc_adapters_out_arbiter": ["priority_rr"], - "noc_adapters_vc_mapping": ["direct"], - "design_clk_periods": [5.0], - # "sim_driver_period": 5.0, - # "telemetry_log_verbosity": 0, - # "telemetry_traces": ["trace0", "trace1"], - "dram_num_controllers": 0, - "dram_clk_periods": [2.0], - "dram_queue_sizes": [64], - "dram_config_files": ["HBM2_8Gb_x128"] -} - -cluster_knobs = { #shared among all RADs - "radsim_root_dir": os.getcwd(), - "sim_driver_period": 5.0, - "telemetry_log_verbosity": 0, - "telemetry_traces": ["trace0", "trace1"], - "num_rads": 1, - "cluster_configs": [], - "cluster_topology": 'all-to-all', - "inter_rad_latency": 5.0, #ns - "inter_rad_bw": 25.6, #bits per ns - "inter_rad_fifo_num_slots": 1000 - -} - -#deep copy (to allow changes to each dict) -radsim_knobs_per_rad = list(deepcopy(radsim_knobs) for i in range(num_configs)) -#print(radsim_knobs_cluster) -#radsim_header_params_per_rad = list(deepcopy(radsim_header_params) for i in range(num_configs)) -booksim_params_per_rad = list(deepcopy(booksim_params) for i in range(num_configs)) - -# Parse configuration file -parse_config_file(config_filename, booksim_params_per_rad, radsim_header_params, radsim_knobs_per_rad, cluster_knobs) -print_config(booksim_params_per_rad, radsim_header_params, radsim_knobs_per_rad) - -# Generate RAD-Sim input files -generate_booksim_config_files(booksim_params_per_rad, radsim_header_params, radsim_knobs_per_rad, cluster_knobs) -generate_radsim_params_header(radsim_header_params) -generate_radsim_config_file(radsim_knobs_per_rad, cluster_knobs) -generate_radsim_main(design_names, cluster_knobs["num_rads"], radsim_knobs_per_rad) #TODO: fix - -prepare_build_dir(design_names) - -print("RAD-Sim was configured successfully!") \ No newline at end of file + design_names = set() #No duplicating design include statements and cmake commands + for i in range(1, len(sys.argv)): #skip 0th argument (that is current program name) + design_names.add(sys.argv[i]) + print(sys.argv[i]) + + # Check if design directory exists + for design_name in design_names: + if not(os.path.isdir(os.getcwd() + "/example-designs/" + design_name)): + print("Cannot find design directory under rad-sim/example-designs/") + exit(1) + + # Point to YAML configuration file + #config_filename = "example-designs/" + design_name + "/config.yml" + config_filename = "uni_config.yml" + config_names = [] + + # List default parameter values + booksim_params = { + "radsim_root_dir": os.getcwd(), + "noc_type": "2d", + "noc_num_nocs": 1, + "noc_topology": ["mesh"], + "noc_anynet_file": [os.getcwd() + "/sim/noc/anynet_file"], + "noc_dim_x": [8], + "noc_dim_y": [8], + "noc_routing_func": ["dim_order"], + "noc_vcs": [5], + "noc_vc_buffer_size": [8], + "noc_output_buffer_size": [8], + "noc_num_packet_types": [3], + "noc_router_uarch": ["iq"], + "noc_vc_allocator": ["islip"], + "noc_sw_allocator": ["islip"], + "noc_credit_delay": [1], + "noc_routing_delay": [1], + "noc_vc_alloc_delay": [1], + "noc_sw_alloc_delay": [1], + } + radsim_header_params = { #shared across all RADs + "radsim_root_dir": os.getcwd(), + "noc_payload_width": [166], + "noc_packet_id_width": 32, + "noc_vcs": [3], + "noc_num_packet_types": [3], + "noc_num_nodes": [0], + "noc_max_num_router_dest_interfaces": 32, + "interfaces_max_axis_tdata_width": 512, + "interfaces_axis_tkeep_width": 8, + "interfaces_axis_tstrb_width": 8, + "interfaces_axis_tuser_width": 75, + "interfaces_axi_id_width": 8, + "interfaces_axi_user_width": 64, + "interfaces_max_axi_data_width": 512, + } + radsim_knobs = { #includes cluster config + #"radsim_root_dir": os.getcwd(), + "design_name": design_name, + "noc_num_nocs": 1, + "noc_clk_period": [0.571], + "noc_vcs": [3], + "noc_payload_width": [146], + "noc_num_nodes": [0], + "design_noc_placement": ["noc.place"], + "noc_adapters_clk_period": [1.25], + "noc_adapters_fifo_size": [16], + "noc_adapters_obuff_size": [2], + "noc_adapters_in_arbiter": ["fixed_rr"], + "noc_adapters_out_arbiter": ["priority_rr"], + "noc_adapters_vc_mapping": ["direct"], + "design_clk_periods": [5.0], + # "sim_driver_period": 5.0, + # "telemetry_log_verbosity": 0, + # "telemetry_traces": ["trace0", "trace1"], + "dram_num_controllers": 0, + "dram_clk_periods": [2.0], + "dram_queue_sizes": [64], + "dram_config_files": ["HBM2_8Gb_x128"] + } + + cluster_knobs = { #shared among all RADs + "radsim_root_dir": os.getcwd(), + "sim_driver_period": 5.0, + "telemetry_log_verbosity": 0, + "telemetry_traces": ["trace0", "trace1"], + "num_rads": 1, + "cluster_configs": [], + "cluster_topology": 'all-to-all', + "inter_rad_latency": 5.0, #ns + "inter_rad_bw": 25.6, #bits per ns + "inter_rad_fifo_num_slots": 1000 + + } + + num_configs = find_num_configs(config_filename) + #print('num_configs: ' + str(num_configs)) + config_indices = [] + for n in range(0, num_configs): + config_indices.append(n) + print(config_indices) + + #deep copy (to allow changes to each dict) + radsim_knobs_per_rad = list(deepcopy(radsim_knobs) for i in range(num_configs)) + booksim_params_per_rad = list(deepcopy(booksim_params) for i in range(num_configs)) + + # Parse configuration file + parse_config_file(config_filename, booksim_params_per_rad, radsim_header_params, radsim_knobs_per_rad, cluster_knobs) + #print_config(booksim_params_per_rad, radsim_header_params, radsim_knobs_per_rad) + + # Generate RAD-Sim input files + generate_booksim_config_files(booksim_params_per_rad, radsim_header_params, radsim_knobs_per_rad, cluster_knobs) + generate_radsim_params_header(radsim_header_params) + generate_radsim_config_file(radsim_knobs_per_rad, cluster_knobs) + generate_radsim_main(design_names, cluster_knobs["num_rads"], radsim_knobs_per_rad) + + prepare_build_dir(design_names) + + print("RAD-Sim was configured successfully!") \ No newline at end of file From c94108609740be5d6ef27c94ab40e0834cf02a59 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Thu, 18 Jul 2024 00:51:38 -0400 Subject: [PATCH 079/127] Many changesn to port MLP design to multi-RAD RADSim --- rad-sim/config.py | 11 ++-- rad-sim/example-designs/dlrm/CMakeLists.txt | 4 +- rad-sim/example-designs/mlp/CMakeLists.txt | 4 +- .../mlp/compiler/gen_testcase.py | 1 + rad-sim/example-designs/mlp/config.yml | 22 ++++--- rad-sim/example-designs/mlp/mlp.place | 31 +++++----- rad-sim/example-designs/mlp/mlp_driver.cpp | 17 ++--- rad-sim/example-designs/mlp/mlp_driver.hpp | 3 +- rad-sim/example-designs/mlp/mlp_system.cpp | 11 ++-- rad-sim/example-designs/mlp/mlp_system.hpp | 5 +- rad-sim/example-designs/mlp/mlp_top.cpp | 19 +++--- rad-sim/example-designs/mlp/mlp_top.hpp | 7 ++- .../example-designs/mlp/modules/collector.cpp | 5 +- .../example-designs/mlp/modules/collector.hpp | 3 +- .../mlp/modules/dispatcher.cpp | 7 ++- .../mlp/modules/dispatcher.hpp | 3 +- rad-sim/example-designs/mlp/modules/mvm.cpp | 9 +-- rad-sim/example-designs/mlp/modules/mvm.hpp | 3 +- rad-sim/sim/CMakeLists.txt | 15 +++-- rad-sim/sim/main.cpp | 15 ++--- rad-sim/sim/noc/noc0_rad0_config | 14 +---- rad-sim/sim/portal.cpp | 56 +++++++++-------- rad-sim/sim/portal.hpp | 16 +++-- rad-sim/sim/radsim_defines.hpp | 14 ++--- rad-sim/sim/radsim_inter_rad.cpp | 13 ++-- rad-sim/sim/radsim_inter_rad.hpp | 2 +- rad-sim/sim/radsim_knobs | 51 +++++---------- rad-sim/sim/sim.trace | 12 ---- rad-sim/test/mlp_test.sh | 2 + rad-sim/uni_config.yml | 62 +++++++------------ 30 files changed, 208 insertions(+), 229 deletions(-) diff --git a/rad-sim/config.py b/rad-sim/config.py index d107112..8436923 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -42,7 +42,7 @@ def parse_config_file(config_filename, booksim_params, radsim_header_params, rad print("Config Error: Parameter " + param_name + " is invalid!") exit(1) - elif config_section == "noc" or config_section == "noc_adapters": + elif config_section == "noc" or config_section == "noc_adapters" or config_section == "interfaces": param_value = param #bc no subsection, so correction param = param_category #bc no subsection, so correction print(' ' + param, param_value) @@ -362,8 +362,9 @@ def generate_radsim_config_file(radsim_knobs, cluster_knobs): radsim_config_file.write("inter_rad_bw_accept_cycles " + str(inter_rad_bw_accept_cycles) + "\n") radsim_config_file.write("inter_rad_bw_total_cycles " + str(inter_rad_bw_total_cycles) + "\n") else: - print('generate_radsim_config_file error: invalid inter_rad_bw') - exit(-1) + print('generate_radsim_config_file error: Invalid inter_rad_bw. Proceeding with default bandwidth of AXIS_DATAW per cycle.') + radsim_config_file.write("inter_rad_bw_accept_cycles " + str(1) + "\n") + radsim_config_file.write("inter_rad_bw_total_cycles " + str(1) + "\n") continue else: radsim_config_file.write(param + " " ) @@ -459,7 +460,7 @@ def prepare_build_dir(design_names): semicol_sep_design_names += ';' count = count+1 #print("cmake -DDESIGN_NAMES=\"" + semicol_sep_design_names + "\" ..;") - os.system("cd build; cmake -DDESIGN_NAMES=\"" + semicol_sep_design_names + "\" ..; cd .;") + os.system("cd build; cmake -DCMAKE_BUILD_TYPE=Debug -DDESIGN_NAMES=\"" + semicol_sep_design_names + "\" ..; cd .;") #os.system("cd build; cmake -DDESIGN:STRING=\"" + 'add' + "\" ..; cd .;") #os.system("cd ..;") @@ -594,4 +595,4 @@ def find_num_configs(config_filename): prepare_build_dir(design_names) - print("RAD-Sim was configured successfully!") \ No newline at end of file + print("RAD-Sim was configured successfully!") diff --git a/rad-sim/example-designs/dlrm/CMakeLists.txt b/rad-sim/example-designs/dlrm/CMakeLists.txt index c78af8d..6ed244f 100644 --- a/rad-sim/example-designs/dlrm/CMakeLists.txt +++ b/rad-sim/example-designs/dlrm/CMakeLists.txt @@ -52,5 +52,5 @@ set(hdrfiles add_compile_options(-Wall -Wextra -pedantic) -add_library(design_dlrm STATIC ${srcfiles} ${hdrfiles}) -target_link_libraries(design_dlrm PUBLIC SystemC::systemc booksim noc dram) \ No newline at end of file +add_library(dlrm STATIC ${srcfiles} ${hdrfiles}) +target_link_libraries(dlrm PUBLIC SystemC::systemc booksim noc dram) diff --git a/rad-sim/example-designs/mlp/CMakeLists.txt b/rad-sim/example-designs/mlp/CMakeLists.txt index ae17c23..a92a5e2 100644 --- a/rad-sim/example-designs/mlp/CMakeLists.txt +++ b/rad-sim/example-designs/mlp/CMakeLists.txt @@ -39,5 +39,5 @@ set(hdrfiles add_compile_options(-Wall -Wextra -pedantic) -add_library(design STATIC ${srcfiles} ${hdrfiles}) -target_link_libraries(design PUBLIC SystemC::systemc booksim noc) +add_library(mlp STATIC ${srcfiles} ${hdrfiles}) +target_link_libraries(mlp PUBLIC SystemC::systemc booksim noc) diff --git a/rad-sim/example-designs/mlp/compiler/gen_testcase.py b/rad-sim/example-designs/mlp/compiler/gen_testcase.py index 6b5f12e..e5c0ca5 100644 --- a/rad-sim/example-designs/mlp/compiler/gen_testcase.py +++ b/rad-sim/example-designs/mlp/compiler/gen_testcase.py @@ -206,6 +206,7 @@ placement_file.write('output_collector 0 ' + str(router_ids[idx]) + ' axis\n') idx = idx + 1 clocks_file.write('output_collector 0 0\n') +placement_file.write('portal_inst 0 16 axis\n') placement_file.close() clocks_file.close() diff --git a/rad-sim/example-designs/mlp/config.yml b/rad-sim/example-designs/mlp/config.yml index 83ad0a1..0f56ee1 100644 --- a/rad-sim/example-designs/mlp/config.yml +++ b/rad-sim/example-designs/mlp/config.yml @@ -4,7 +4,7 @@ noc: clk_period: [1.0] payload_width: [145] topology: ['mesh'] - dim_x: [4] + dim_x: [5] dim_y: [4] routing_func: ['dim_order'] vcs: [1] @@ -27,15 +27,19 @@ noc_adapters: out_arbiter: ['priority_rr'] vc_mapping: ['direct'] -design: - name: 'mlp' - noc_placement: ['mlp.place'] - clk_periods: [5.0] +config rad1: + design: + name: 'mlp' + noc_placement: ['mlp.place'] + clk_periods: [5.0] + +cluster: + sim_driver_period: 5.0 + telemetry_log_verbosity: 2 + telemetry_traces: [] + num_rads: 1 + cluster_configs: ['rad1'] -telemetry: - log_verbosity: 2 - traces: [] - interfaces: max_axis_tdata_width: 512 axis_tuser_width: 75 diff --git a/rad-sim/example-designs/mlp/mlp.place b/rad-sim/example-designs/mlp/mlp.place index 21cd35d..aa4b9b9 100644 --- a/rad-sim/example-designs/mlp/mlp.place +++ b/rad-sim/example-designs/mlp/mlp.place @@ -1,16 +1,17 @@ -layer0_mvm0 0 4 axis -layer0_mvm1 0 12 axis -layer0_mvm2 0 13 axis -layer0_mvm3 0 15 axis -layer1_mvm0 0 0 axis -layer1_mvm1 0 8 axis -layer1_mvm2 0 3 axis -layer2_mvm0 0 11 axis -layer2_mvm1 0 9 axis -layer3_mvm0 0 7 axis -layer3_mvm1 0 2 axis -input_dispatcher0 0 14 axis -input_dispatcher1 0 5 axis -input_dispatcher2 0 6 axis -input_dispatcher3 0 1 axis +layer0_mvm0 0 6 axis +layer0_mvm1 0 15 axis +layer0_mvm2 0 3 axis +layer0_mvm3 0 9 axis +layer1_mvm0 0 8 axis +layer1_mvm1 0 14 axis +layer1_mvm2 0 4 axis +layer2_mvm0 0 0 axis +layer2_mvm1 0 12 axis +layer3_mvm0 0 1 axis +layer3_mvm1 0 13 axis +input_dispatcher0 0 5 axis +input_dispatcher1 0 2 axis +input_dispatcher2 0 7 axis +input_dispatcher3 0 11 axis output_collector 0 10 axis +portal_inst 0 16 axis diff --git a/rad-sim/example-designs/mlp/mlp_driver.cpp b/rad-sim/example-designs/mlp/mlp_driver.cpp index 61f91be..62431b3 100644 --- a/rad-sim/example-designs/mlp/mlp_driver.cpp +++ b/rad-sim/example-designs/mlp/mlp_driver.cpp @@ -19,12 +19,13 @@ bool ParseIO(std::vector>& data_vec, std::string& io_filename) return true; } -mlp_driver::mlp_driver(const sc_module_name& name) : sc_module(name) { +mlp_driver::mlp_driver(const sc_module_name& name, RADSimDesignContext* radsim_design_) : sc_module(name) { + this->radsim_design = radsim_design_; //AKB ADDED start_cycle = 0; end_cycle = 0; // Parse design configuration (number of layers & number of MVM per layer) - std::string design_root_dir = radsim_config.GetStringKnob("radsim_user_design_root_dir"); + std::string design_root_dir = radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); std::string design_config_filename = design_root_dir + "/compiler/layer_mvm_config"; std::ifstream design_config_file(design_config_filename); if(!design_config_file) { @@ -82,7 +83,7 @@ void mlp_driver::source() { dispatcher_fifo_wen[dispatcher_id].write(false); wait(); rst.write(false); - start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); wait(); std::vector written_inputs(num_mvms[0], 0); @@ -128,20 +129,22 @@ void mlp_driver::sink() { } if (mistake) { std::cout << "FAILURE - Some outputs NOT matching!" << std::endl; - radsim_design.ReportDesignFailure(); + radsim_design->ReportDesignFailure(); } else std::cout << "SUCCESS - All outputs are matching!" << std::endl; - end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); std::cout << "Simulation Cycles = " << end_cycle - start_cycle << std::endl; NoCTransactionTelemetry::DumpStatsToFile("stats.csv"); NoCFlitTelemetry::DumpNoCFlitTracesToFile("flit_traces.csv"); std::vector aggregate_bandwidths = NoCTransactionTelemetry::DumpTrafficFlows("traffic_flows", - end_cycle - start_cycle, radsim_design.GetNodeModuleNames()); + end_cycle - start_cycle, radsim_design->GetNodeModuleNames(), radsim_design->rad_id); std::cout << "Aggregate NoC BW = " << aggregate_bandwidths[0] / 1000000000 << " Gbps" << std::endl; - sc_stop(); + //sc_stop(); + this->radsim_design->set_rad_done(); //flag to replace sc_stop calls + return; } void mlp_driver::assign() { diff --git a/rad-sim/example-designs/mlp/mlp_driver.hpp b/rad-sim/example-designs/mlp/mlp_driver.hpp index 0d3dc11..b6ab096 100644 --- a/rad-sim/example-designs/mlp/mlp_driver.hpp +++ b/rad-sim/example-designs/mlp/mlp_driver.hpp @@ -18,6 +18,7 @@ class mlp_driver : public sc_module { std::vector num_mvms; std::vector>> test_inputs; std::vector> golden_outputs; + RADSimDesignContext* radsim_design; //AKB ADDED public: sc_in clk; @@ -31,7 +32,7 @@ class mlp_driver : public sc_module { sc_out collector_fifo_ren; sc_in>> collector_fifo_rdata; - mlp_driver(const sc_module_name& name); + mlp_driver(const sc_module_name& name, RADSimDesignContext* radsim_design_); ~mlp_driver(); void source(); diff --git a/rad-sim/example-designs/mlp/mlp_system.cpp b/rad-sim/example-designs/mlp/mlp_system.cpp index 47496c5..66be09f 100644 --- a/rad-sim/example-designs/mlp/mlp_system.cpp +++ b/rad-sim/example-designs/mlp/mlp_system.cpp @@ -1,10 +1,10 @@ #include "mlp_system.hpp" -mlp_system::mlp_system(const sc_module_name& name, sc_clock* driver_clk_sig) : +mlp_system::mlp_system(const sc_module_name& name, sc_clock* driver_clk_sig, RADSimDesignContext* radsim_design) : sc_module(name) { // Parse design configuration (number of layers and number of MVMs per layer) - std::string design_root_dir = radsim_config.GetStringKnob("radsim_user_design_root_dir"); + std::string design_root_dir = radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); std::string design_config_filename = design_root_dir + "/compiler/layer_mvm_config"; std::ifstream design_config_file(design_config_filename); if(!design_config_file) { @@ -29,7 +29,7 @@ mlp_system::mlp_system(const sc_module_name& name, sc_clock* driver_clk_sig) : init_vector>>>::init_sc_vector(dispatcher_fifo_wdata_signal, num_mvms[0]); // Instantiate driver - mlp_driver_inst = new mlp_driver("mlp_driver"); + mlp_driver_inst = new mlp_driver("mlp_driver", radsim_design); mlp_driver_inst->clk(*driver_clk_sig); mlp_driver_inst->rst(rst_sig); mlp_driver_inst->dispatcher_fifo_rdy(dispatcher_fifo_rdy_signal); @@ -40,7 +40,7 @@ mlp_system::mlp_system(const sc_module_name& name, sc_clock* driver_clk_sig) : mlp_driver_inst->collector_fifo_rdata(collector_fifo_rdata_signal); // Instantiate design top-level - mlp_inst = new mlp_top("mlp_top"); + mlp_inst = new mlp_top("mlp_top", radsim_design); mlp_inst->rst(rst_sig); mlp_inst->dispatcher_fifo_rdy(dispatcher_fifo_rdy_signal); mlp_inst->dispatcher_fifo_wen(dispatcher_fifo_wen_signal); @@ -48,6 +48,9 @@ mlp_system::mlp_system(const sc_module_name& name, sc_clock* driver_clk_sig) : mlp_inst->collector_fifo_rdy(collector_fifo_rdy_signal); mlp_inst->collector_fifo_ren(collector_fifo_ren_signal); mlp_inst->collector_fifo_rdata(collector_fifo_rdata_signal); + + //add _top as dut instance for parent class design_system + this->design_dut_inst = mlp_inst; } mlp_system::~mlp_system() { diff --git a/rad-sim/example-designs/mlp/mlp_system.hpp b/rad-sim/example-designs/mlp/mlp_system.hpp index a8dd8cd..da56d64 100644 --- a/rad-sim/example-designs/mlp/mlp_system.hpp +++ b/rad-sim/example-designs/mlp/mlp_system.hpp @@ -6,8 +6,9 @@ #include #include #include +#include -class mlp_system : public sc_module { +class mlp_system : public design_system { private: sc_vector> dispatcher_fifo_rdy_signal; sc_vector> dispatcher_fifo_wen_signal; @@ -22,6 +23,6 @@ class mlp_system : public sc_module { mlp_driver* mlp_driver_inst; mlp_top* mlp_inst; - mlp_system(const sc_module_name& name, sc_clock* driver_clk_sig); + mlp_system(const sc_module_name& name, sc_clock* driver_clk_sig, RADSimDesignContext* radsim_design); ~mlp_system(); }; \ No newline at end of file diff --git a/rad-sim/example-designs/mlp/mlp_top.cpp b/rad-sim/example-designs/mlp/mlp_top.cpp index 6d762c3..377eb65 100644 --- a/rad-sim/example-designs/mlp/mlp_top.cpp +++ b/rad-sim/example-designs/mlp/mlp_top.cpp @@ -1,9 +1,9 @@ #include -mlp_top::mlp_top(const sc_module_name &name) : sc_module(name) { - +mlp_top::mlp_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : design_top(radsim_design) { + this->radsim_design = radsim_design; std::string design_root_dir = - radsim_config.GetStringKnob("radsim_user_design_root_dir"); + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); std::string design_config_filename = design_root_dir + "/compiler/layer_mvm_config"; @@ -42,13 +42,13 @@ mlp_top::mlp_top(const sc_module_name &name) : sc_module(name) { design_root_dir + "/compiler/inst_mifs/" + module_name_str + ".mif"; std::strcpy(module_name, module_name_str.c_str()); matrix_vector_engines[layer_id][mvm_id] = - new mvm(module_name, mvm_id, layer_id, inst_filename); + new mvm(module_name, mvm_id, layer_id, inst_filename, radsim_design); matrix_vector_engines[layer_id][mvm_id]->rst(rst); if (layer_id == 0) { module_name_str = "input_dispatcher" + std::to_string(mvm_id); std::strcpy(module_name, module_name_str.c_str()); - input_dispatchers[mvm_id] = new dispatcher(module_name, mvm_id); + input_dispatchers[mvm_id] = new dispatcher(module_name, mvm_id, radsim_design); input_dispatchers[mvm_id]->rst(rst); input_dispatchers[mvm_id]->data_fifo_rdy(dispatcher_fifo_rdy[mvm_id]); input_dispatchers[mvm_id]->data_fifo_wen(dispatcher_fifo_wen[mvm_id]); @@ -60,15 +60,16 @@ mlp_top::mlp_top(const sc_module_name &name) : sc_module(name) { module_name_str = "output_collector"; std::strcpy(module_name, module_name_str.c_str()); - output_collector = new collector(module_name); + output_collector = new collector(module_name, radsim_design); output_collector->rst(rst); output_collector->data_fifo_rdy(collector_fifo_rdy); output_collector->data_fifo_ren(collector_fifo_ren); output_collector->data_fifo_rdata(collector_fifo_rdata); - radsim_design.BuildDesignContext("mlp.place", "mlp.clks"); - radsim_design.CreateSystemNoCs(rst); - radsim_design.ConnectModulesToNoC(); + this->portal_inst->rst(rst); + radsim_design->BuildDesignContext("mlp.place", "mlp.clks"); + radsim_design->CreateSystemNoCs(rst); + radsim_design->ConnectModulesToNoC(); } mlp_top::~mlp_top() { diff --git a/rad-sim/example-designs/mlp/mlp_top.hpp b/rad-sim/example-designs/mlp/mlp_top.hpp index ef92126..13c022a 100644 --- a/rad-sim/example-designs/mlp/mlp_top.hpp +++ b/rad-sim/example-designs/mlp/mlp_top.hpp @@ -8,13 +8,14 @@ #include #include #include +#include - -class mlp_top : public sc_module { +class mlp_top : public design_top { private: std::vector> matrix_vector_engines; std::vector input_dispatchers; collector* output_collector; + RADSimDesignContext* radsim_design; //AKB ADDED public: sc_in rst; @@ -27,7 +28,7 @@ class mlp_top : public sc_module { sc_in collector_fifo_ren; sc_out>> collector_fifo_rdata; - mlp_top(const sc_module_name& name); + mlp_top(const sc_module_name& name, RADSimDesignContext* radsim_design); ~mlp_top(); void prepare_adapters_info(); }; \ No newline at end of file diff --git a/rad-sim/example-designs/mlp/modules/collector.cpp b/rad-sim/example-designs/mlp/modules/collector.cpp index 410e7c2..5b499d9 100644 --- a/rad-sim/example-designs/mlp/modules/collector.cpp +++ b/rad-sim/example-designs/mlp/modules/collector.cpp @@ -1,9 +1,10 @@ #include "collector.hpp" -collector::collector(const sc_module_name &name) - : RADSimModule(name), rst("rst"), data_fifo_rdy("data_fifo_rdy"), +collector::collector(const sc_module_name &name, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), rst("rst"), data_fifo_rdy("data_fifo_rdy"), data_fifo_ren("data_fifo_ren"), data_fifo_rdata("data_fifo_rdata") { + this->radsim_design = radsim_design; module_name = name; char fifo_name[25]; diff --git a/rad-sim/example-designs/mlp/modules/collector.hpp b/rad-sim/example-designs/mlp/modules/collector.hpp index 4efab5a..d3cf8fc 100644 --- a/rad-sim/example-designs/mlp/modules/collector.hpp +++ b/rad-sim/example-designs/mlp/modules/collector.hpp @@ -20,13 +20,14 @@ class collector : public RADSimModule { data_fifo_almost_full_signal, data_fifo_almost_empty_signal; public: + RADSimDesignContext* radsim_design; sc_in rst; sc_out data_fifo_rdy; sc_in data_fifo_ren; sc_out>> data_fifo_rdata; axis_slave_port rx_interface; - collector(const sc_module_name& name); + collector(const sc_module_name& name, RADSimDesignContext* radsim_design); ~collector(); void Assign(); diff --git a/rad-sim/example-designs/mlp/modules/dispatcher.cpp b/rad-sim/example-designs/mlp/modules/dispatcher.cpp index aa1e590..25a970d 100644 --- a/rad-sim/example-designs/mlp/modules/dispatcher.cpp +++ b/rad-sim/example-designs/mlp/modules/dispatcher.cpp @@ -1,9 +1,10 @@ #include "dispatcher.hpp" -dispatcher::dispatcher(const sc_module_name &name, unsigned int id) - : RADSimModule(name), rst("rst"), data_fifo_rdy("data_fifo_rdy"), +dispatcher::dispatcher(const sc_module_name &name, unsigned int id, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), rst("rst"), data_fifo_rdy("data_fifo_rdy"), data_fifo_wen("data_fifo_wen"), data_fifo_wdata("data_fifo_wdata") { + this->radsim_design = radsim_design; module_name = name; dispatcher_id = id; @@ -52,7 +53,7 @@ void dispatcher::Assign() { tx_interface.tid.write(0); std::string dest_name = "layer0_mvm" + std::to_string(dispatcher_id) + ".rx_interface"; - tx_interface.tdest.write(radsim_design.GetPortDestinationID(dest_name)); + tx_interface.tdest.write(radsim_design->GetPortDestinationID(dest_name)); // std::cout << "Dispatcher " << dispatcher_id << " pushed data into the // NoC with dest " // << radsim_design.GetPortDestinationID(dest_name) << "!" << std::endl; diff --git a/rad-sim/example-designs/mlp/modules/dispatcher.hpp b/rad-sim/example-designs/mlp/modules/dispatcher.hpp index 32aa957..2901390 100644 --- a/rad-sim/example-designs/mlp/modules/dispatcher.hpp +++ b/rad-sim/example-designs/mlp/modules/dispatcher.hpp @@ -21,13 +21,14 @@ class dispatcher : public RADSimModule { data_fifo_almost_full_signal, data_fifo_almost_empty_signal; public: + RADSimDesignContext* radsim_design; sc_in rst; sc_out data_fifo_rdy; sc_in data_fifo_wen; sc_in>> data_fifo_wdata; axis_master_port tx_interface; - dispatcher(const sc_module_name& name, unsigned int id); + dispatcher(const sc_module_name& name, unsigned int id, RADSimDesignContext* radsim_design); ~dispatcher(); void Assign(); diff --git a/rad-sim/example-designs/mlp/modules/mvm.cpp b/rad-sim/example-designs/mlp/modules/mvm.cpp index 29bfabf..a90f1f5 100644 --- a/rad-sim/example-designs/mlp/modules/mvm.cpp +++ b/rad-sim/example-designs/mlp/modules/mvm.cpp @@ -39,8 +39,8 @@ bool ParseInstructions(std::vector &inst_mem, } mvm::mvm(const sc_module_name &name, unsigned int id_mvm, unsigned int id_layer, - const std::string &inst_filename) - : RADSimModule(name), matrix_mem_rdata("matrix_mem_rdata", DOT_PRODUCTS), + const std::string &inst_filename, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), matrix_mem_rdata("matrix_mem_rdata", DOT_PRODUCTS), matrix_mem_wen("matrix_mem_wen", DOT_PRODUCTS), ififo_pipeline("ififo_pipeline", RF_RD_LATENCY), reduce_pipeline("reduce_pipeline", RF_RD_LATENCY), @@ -54,6 +54,7 @@ mvm::mvm(const sc_module_name &name, unsigned int id_mvm, unsigned int id_layer, dest_mvm_pipeline("mvm_layer_pipeline", COMPUTE_LATENCY + RF_RD_LATENCY), tdata_vec(LANES), result(DOT_PRODUCTS), rst("rst") { + this->radsim_design = radsim_design; module_name = name; mvm_id = id_mvm; layer_id = id_layer; @@ -71,7 +72,7 @@ mvm::mvm(const sc_module_name &name, unsigned int id_mvm, unsigned int id_layer, std::string mem_name_str; matrix_memory.resize(DOT_PRODUCTS); std::string mvm_dir = - radsim_config.GetStringKnob("radsim_user_design_root_dir"); + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); std::string mem_init_file; for (unsigned int dot_id = 0; dot_id < DOT_PRODUCTS; dot_id++) { mem_init_file = mvm_dir + "/compiler/weight_mifs/layer" + @@ -468,7 +469,7 @@ void mvm::Assign() { dest_name = "layer" + std::to_string(dest_layer_int - 1) + "_mvm" + std::to_string(dest_mvm_int) + ".rx_interface"; } - dest_id = radsim_design.GetPortDestinationID(dest_name); + dest_id = radsim_design->GetPortDestinationID(dest_name); unsigned int dest_interface; // If destination is the same layer, send to reduce FIFO diff --git a/rad-sim/example-designs/mlp/modules/mvm.hpp b/rad-sim/example-designs/mlp/modules/mvm.hpp index 3969936..63ca169 100644 --- a/rad-sim/example-designs/mlp/modules/mvm.hpp +++ b/rad-sim/example-designs/mlp/modules/mvm.hpp @@ -96,11 +96,12 @@ class mvm : public RADSimModule { sc_signal dot_op, dot_reduce_op; public: + RADSimDesignContext* radsim_design; sc_in rst; axis_slave_port rx_interface; axis_master_port tx_interface; - mvm(const sc_module_name& name, unsigned int id_mvm, unsigned int id_layer, const std::string& inst_filename); + mvm(const sc_module_name& name, unsigned int id_mvm, unsigned int id_layer, const std::string& inst_filename, RADSimDesignContext* radsim_design); ~mvm(); void Assign(); diff --git a/rad-sim/sim/CMakeLists.txt b/rad-sim/sim/CMakeLists.txt index 389fe4c..21fe34b 100644 --- a/rad-sim/sim/CMakeLists.txt +++ b/rad-sim/sim/CMakeLists.txt @@ -18,9 +18,14 @@ include_directories( dram dram/DRAMsim3 dram/DRAMsim3/src - ../example-designs/dlrm - ../example-designs/dlrm/modules -) + ) + + FOREACH(DESIGN_NAME ${DESIGN_NAMES}) + include_directories( + ../example-designs/${DESIGN_NAME} + ../example-designs/${DESIGN_NAME}/modules + ) +ENDFOREACH() find_package(verilator CONFIG) if (verilator_FOUND) @@ -57,10 +62,10 @@ set(CMAKE_CXX_FLAGS_DEBUG "-g") set(CMAKE_CXX_FLAGS_RELEASE "-O3 -g") add_library(radsim STATIC ${srcfiles} ${hdrfiles}) -target_link_libraries(radsim PUBLIC SystemC::systemc booksim noc dram design_dlrm) +target_link_libraries(radsim PUBLIC SystemC::systemc booksim noc dram ${DESIGN_NAMES}) add_executable(system main.cpp ${srcfiles} ${hdrfiles}) -target_link_libraries(system PUBLIC radsim SystemC::systemc booksim noc dram design_dlrm) +target_link_libraries(system PUBLIC radsim SystemC::systemc booksim noc dram ${DESIGN_NAMES}) add_custom_target(run COMMAND system WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 7c6f8f3..96e2ad1 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -7,7 +7,7 @@ #include #include -#include +#include RADSimConfig radsim_config; std::ostream *gWatchOut; @@ -17,10 +17,10 @@ SimTraceRecording sim_trace_probe; int sc_main(int argc, char *argv[]) { std::string radsim_knobs_filename = "/sim/radsim_knobs"; std::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename; - radsim_config.ResizeAll(2); + radsim_config.ResizeAll(1); ParseRADSimKnobs(radsim_knobs_filepath); - RADSimCluster* cluster = new RADSimCluster(2); + RADSimCluster* cluster = new RADSimCluster(1); gWatchOut = &cout; int log_verbosity = radsim_config.GetIntKnobShared("telemetry_log_verbosity"); @@ -31,19 +31,14 @@ int sc_main(int argc, char *argv[]) { sc_clock *driver_clk_sig0 = new sc_clock( "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); - dlrm_system *system0 = new dlrm_system("dlrm_system", driver_clk_sig0, cluster->all_rads[0]); + mlp_system *system0 = new mlp_system("mlp_system", driver_clk_sig0, cluster->all_rads[0]); cluster->StoreSystem(system0); - sc_clock *driver_clk_sig1 = new sc_clock( - "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); - dlrm_system *system1 = new dlrm_system("dlrm_system", driver_clk_sig1, cluster->all_rads[1]); - cluster->StoreSystem(system1); sc_clock *inter_rad_clk_sig = new sc_clock( "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); blackbox->ConnectRadAxi(0); - blackbox->ConnectRadAxi(1); int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); while (cluster->AllRADsNotDone()) { @@ -55,8 +50,6 @@ int sc_main(int argc, char *argv[]) { delete system0; delete driver_clk_sig0; - delete system1; - delete driver_clk_sig1; delete blackbox; delete inter_rad_clk_sig; diff --git a/rad-sim/sim/noc/noc0_rad0_config b/rad-sim/sim/noc/noc0_rad0_config index 94f70f1..5614bd1 100644 --- a/rad-sim/sim/noc/noc0_rad0_config +++ b/rad-sim/sim/noc/noc0_rad0_config @@ -1,25 +1,17 @@ // Topology topology = mesh; -k = 10; +k = 5; n = 2; // Routing routing_function = dim_order; // Flow control -num_vcs = 5; -vc_buf_size = 16; +num_vcs = 1; +vc_buf_size = 8; output_buffer_size = 8; read_request_begin_vc = 0; read_request_end_vc = 0; -write_request_begin_vc = 1; -write_request_end_vc = 1; -write_data_begin_vc = 2; -write_data_end_vc = 2; -read_reply_begin_vc = 3; -read_reply_end_vc = 3; -write_reply_begin_vc = 4; -write_reply_end_vc = 4; // Router architecture & delays router = iq; diff --git a/rad-sim/sim/portal.cpp b/rad-sim/sim/portal.cpp index 001b62b..0748b0b 100644 --- a/rad-sim/sim/portal.cpp +++ b/rad-sim/sim/portal.cpp @@ -31,21 +31,23 @@ void portal::Assign() { //combinational logic } } -void bv_to_data_vector( - sc_bv &bitvector, data_vector &datavector, - unsigned int num_elements) { - - unsigned int start_idx, end_idx; - unsigned int _bitwidth = 16; //AKB: extra added - for (unsigned int e = 0; e < num_elements; e++) { - start_idx = e * _bitwidth; - end_idx = (e + 1) * _bitwidth; - datavector[e] = bitvector.range(end_idx - 1, start_idx).to_int(); - } -} +//used for internal testing +//must uncomment radsim_utils define to use +// void bv_to_data_vector( +// sc_bv &bitvector, data_vector &datavector, +// unsigned int num_elements) { + +// unsigned int start_idx, end_idx; +// unsigned int _bitwidth = 16; //AKB: extra added +// for (unsigned int e = 0; e < num_elements; e++) { +// start_idx = e * _bitwidth; +// end_idx = (e + 1) * _bitwidth; +// datavector[e] = bitvector.range(end_idx - 1, start_idx).to_int(); +// } +// } int counter = 0; -sc_bv data_to_buffer = 0; +sc_bv data_to_buffer = 0; sc_bv dest_device = 1; //for testing, fixed at 1 to send to RAD1 which has mult design; //#define AXIS_USERW 66 //bool got_data = false; void portal::Tick() { //sequential logic @@ -90,16 +92,20 @@ void portal::Tick() { //sequential logic if (portal_axis_master.tvalid.read() && portal_axis_master.tready.read()) { // && test_ready_toggle) { //pop out of fifo if (!portal_axis_fifo_noc_incoming.empty()) { - //test_ready_toggle = false; int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); - sc_bv tx_tdata_bv = portal_axis_fifo_noc_incoming.front().tdata; - data_vector tx_tdata(32); - bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); + /* START FOR DEBUG */ + //sc_bv tx_tdata_bv = portal_axis_fifo_noc_incoming.front().tdata; + //data_vector tx_tdata(32); + //bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); //std::cout << "portal @ cycle " << curr_cycle << ": sending over inter-RAD" << tx_tdata << " from RAD " << radsim_design->rad_id << std::endl; - + /* END FOR DEBUG */ + portal_axis_fifo_noc_incoming.pop(); + /* START FOR DEBUG */ //std::cout << "portal.cpp in dlrm design sent " << portal_axis_master.tdata.read().to_uint64() << " to dest_device " << dest_device.to_uint64() << " on cycle " << curr_cycle << std::endl; + /* END FOR DEBUG */ //portal_recvd.write(1); + if (portal_axis_master.tlast.read()) { std::cout << "dlrm design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; } @@ -189,11 +195,11 @@ void portal::Tick() { //sequential logic if (axis_portal_master_interface.tvalid.read() && axis_portal_master_interface.tready.read()) { // && test_ready_toggle) { //pop out of fifo if (!portal_axis_fifo_noc_outgoing.empty()) { - //test_ready_toggle = false; int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); - sc_bv tx_tdata_bv = portal_axis_fifo_noc_outgoing.front().tdata; - data_vector tx_tdata(32); - bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); + //used for testing + //sc_bv tx_tdata_bv = portal_axis_fifo_noc_outgoing.front().tdata; + //data_vector tx_tdata(32); + //bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); //std::cout << "portal @ cycle " << curr_cycle << ": sending over NoC " << tx_tdata << " from RAD " << radsim_design->rad_id << std::endl; portal_axis_fifo_noc_outgoing.pop(); @@ -236,12 +242,12 @@ void portal::RegisterModuleInfo() { _num_noc_aximm_master_ports = 0; port_name = module_name + ".axis_portal_slave_interface"; - RegisterAxisSlavePort(port_name, &axis_portal_slave_interface, DATAW, 0); + RegisterAxisSlavePort(port_name, &axis_portal_slave_interface, AXIS_MAX_DATAW, 0); //radsim_design->portal_id = radsim_design->GetPortDestinationID(port_name); //store slave port info //radsim_design->AssignPortalSlaveID(radsim_design->GetPortDestinationID(port_name)); radsim_design->AssignPortalSlaveName(port_name); //bc other modules will send to this slave interface port_name = module_name + ".axis_portal_master_interface"; - RegisterAxisMasterPort(port_name, &axis_portal_master_interface, DATAW, 0); + RegisterAxisMasterPort(port_name, &axis_portal_master_interface, AXIS_MAX_DATAW, 0); -} \ No newline at end of file +} diff --git a/rad-sim/sim/portal.hpp b/rad-sim/sim/portal.hpp index 386230a..bbdce90 100644 --- a/rad-sim/sim/portal.hpp +++ b/rad-sim/sim/portal.hpp @@ -9,13 +9,13 @@ #include #include #include -#include -#include //AKB: added for data_vector template class +//#include +//#include //AKB: added for data_vector template class struct portal_axis_fields { bool tvalid; bool tready; - sc_bv tdata; + sc_bv tdata; sc_bv tstrb; sc_bv tkeep; bool tlast; @@ -51,6 +51,10 @@ class portal : public RADSimModule { void RegisterModuleInfo(); //even tho did not add AXI Interface, need because is virtual fn in derived class }; -void bv_to_data_vector( - sc_bv &bitvector, data_vector &datavector, - unsigned int num_elements); \ No newline at end of file +/* START FOR DEBUG +Note: need correct data_vector datatype matching the design's sim_utils.hpp +*/ +// void bv_to_data_vector( +// sc_bv &bitvector, data_vector &datavector, +// unsigned int num_elements); +/* END FOR DEBUG */ \ No newline at end of file diff --git a/rad-sim/sim/radsim_defines.hpp b/rad-sim/sim/radsim_defines.hpp index ba4dac1..1292bdd 100644 --- a/rad-sim/sim/radsim_defines.hpp +++ b/rad-sim/sim/radsim_defines.hpp @@ -1,14 +1,14 @@ #pragma once // clang-format off -#define RADSIM_ROOT_DIR "/home/bassiabn/rad-sim/rad-flow/rad-sim" +#define RADSIM_ROOT_DIR "/home/bassiabn/rad-sim/rad-flow-test-merge/rad-flow/rad-sim" // NoC-related Parameters -#define NOC_LINKS_PAYLOAD_WIDTH 82 -#define NOC_LINKS_VCID_WIDTH 3 +#define NOC_LINKS_PAYLOAD_WIDTH 145 +#define NOC_LINKS_VCID_WIDTH 1 #define NOC_LINKS_PACKETID_WIDTH 32 -#define NOC_LINKS_TYPEID_WIDTH 3 -#define NOC_LINKS_DEST_WIDTH 21 +#define NOC_LINKS_TYPEID_WIDTH 1 +#define NOC_LINKS_DEST_WIDTH 15 #define NOC_LINKS_DEST_INTERFACE_WIDTH 5 #define NOC_LINKS_WIDTH (NOC_LINKS_PAYLOAD_WIDTH + NOC_LINKS_VCID_WIDTH + NOC_LINKS_PACKETID_WIDTH + NOC_LINKS_DEST_WIDTH + NOC_LINKS_DEST_INTERFACE_WIDTH) @@ -23,14 +23,14 @@ #define AXIS_KEEPW 8 #define AXIS_IDW NOC_LINKS_PACKETID_WIDTH #define AXIS_DESTW NOC_LINKS_DEST_WIDTH -#define AXIS_DEST_FIELDW 7 +#define AXIS_DEST_FIELDW 5 #define AXI4_IDW 8 #define AXI4_ADDRW 64 #define AXI4_LENW 8 #define AXI4_SIZEW 3 #define AXI4_BURSTW 2 #define AXI4_RESPW 2 -#define AXI4_NODE_ADDRW 7 +#define AXI4_NODE_ADDRW 5 #define AXI4_CTRLW (AXI4_LENW + AXI4_SIZEW + AXI4_BURSTW) // AXI Packetization Defines diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index de3b071..6a04c33 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -30,6 +30,7 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c all_axis_slave_ports.push_back(new_axis_slave_port); axis_master_port* new_axis_master_port = new axis_master_port; all_axis_master_ports.push_back(new_axis_master_port); + std::cout << "RADSimInterRad: " << v << std::endl; } SC_CTHREAD(writeFifo, clk.pos()); SC_CTHREAD(readFifo, clk.pos()); @@ -122,11 +123,13 @@ RADSimInterRad::writeFifo() { unsigned int dest_rad = DEST_RAD(curr_transaction.tdest).to_uint64(); //std::cout << "radsim_inter_rad.cpp dest_rad is: "<< dest_rad << std::endl; if (this->fifos[dest_rad]->nb_write(curr_transaction) != false) { //there was an available slot to write to - sc_bv rx_tdata_bv = curr_transaction.tdata; - data_vector rx_tdata(32); - bv_to_data_vector(rx_tdata_bv, rx_tdata, 32); - //std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << rx_tdata << std::endl; - //std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << curr_transaction.tdata.to_uint64() << std::endl; + /* START FOR DEBUG */ + // sc_bv rx_tdata_bv = curr_transaction.tdata; + // data_vector rx_tdata(32); //NOTE (AKB): type needs to match what is supported in example-designs/{design}/modules/sim_utils.hpp + // bv_to_data_vector(rx_tdata_bv, rx_tdata, 32); + // std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << rx_tdata << std::endl; + // std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << curr_transaction.tdata.to_uint64() << std::endl; + /* END FOR DEBUG */ fifos_latency_counters[dest_rad].push_back(0); //for latency counters } else { diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index 438d0ab..a8d2007 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -71,4 +71,4 @@ class RADSimInterRad : public sc_module { void writeFifo(); void readFifo(); SC_HAS_PROCESS(RADSimInterRad); -}; \ No newline at end of file +}; diff --git a/rad-sim/sim/radsim_knobs b/rad-sim/sim/radsim_knobs index 201a764..e880b2b 100644 --- a/rad-sim/sim/radsim_knobs +++ b/rad-sim/sim/radsim_knobs @@ -1,49 +1,30 @@ -design_name 0 dlrm +design_name 0 mlp noc_num_nocs 0 1 noc_clk_period 0 1.0 -noc_vcs 0 5 -noc_payload_width 0 82 -noc_num_nodes 0 100 -design_noc_placement 0 dlrm.place +noc_vcs 0 1 +noc_payload_width 0 145 +noc_num_nodes 0 25 +design_noc_placement 0 mlp.place noc_adapters_clk_period 0 1.25 noc_adapters_fifo_size 0 16 noc_adapters_obuff_size 0 2 noc_adapters_in_arbiter 0 fixed_rr noc_adapters_out_arbiter 0 priority_rr noc_adapters_vc_mapping 0 direct -design_clk_periods 0 5.0 2.0 3.32 1.5 -dram_num_controllers 0 4 -dram_clk_periods 0 3.32 3.32 2.0 2.0 -dram_queue_sizes 0 64 64 64 64 -dram_config_files 0 DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 -radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm -design_name 1 dlrm -noc_num_nocs 1 1 -noc_clk_period 1 1.0 -noc_vcs 1 5 -noc_payload_width 1 82 -noc_num_nodes 1 100 -design_noc_placement 1 dlrm.place -noc_adapters_clk_period 1 1.25 -noc_adapters_fifo_size 1 16 -noc_adapters_obuff_size 1 2 -noc_adapters_in_arbiter 1 fixed_rr -noc_adapters_out_arbiter 1 priority_rr -noc_adapters_vc_mapping 1 direct -design_clk_periods 1 5.0 2.0 3.32 1.5 -dram_num_controllers 1 4 -dram_clk_periods 1 3.32 3.32 2.0 2.0 -dram_queue_sizes 1 64 64 64 64 -dram_config_files 1 DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 -radsim_user_design_root_dir 1 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm -radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim +design_clk_periods 0 5.0 +dram_num_controllers 0 0 +dram_clk_periods 0 2.0 +dram_queue_sizes 0 64 +dram_config_files 0 HBM2_8Gb_x128 +radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow-test-merge/rad-flow/rad-sim/example-designs/mlp +radsim_root_dir /home/bassiabn/rad-sim/rad-flow-test-merge/rad-flow/rad-sim sim_driver_period 5.0 telemetry_log_verbosity 2 -telemetry_traces Embedding LU Mem0 Mem1 Mem2 Mem3 Feature Inter. MVM first MVM last -num_rads 2 -cluster_configs rad1 anotherconfig +telemetry_traces +num_rads 1 +cluster_configs rad1 cluster_topology all-to-all -inter_rad_latency_cycles 420 +inter_rad_latency_cycles 1 inter_rad_bw_accept_cycles 1 inter_rad_bw_total_cycles 1 inter_rad_fifo_num_slots 1000 diff --git a/rad-sim/sim/sim.trace b/rad-sim/sim/sim.trace index 1901ba9..e69de29 100644 --- a/rad-sim/sim/sim.trace +++ b/rad-sim/sim/sim.trace @@ -1,12 +0,0 @@ - - - - - - - - - - - - diff --git a/rad-sim/test/mlp_test.sh b/rad-sim/test/mlp_test.sh index d770f03..5272151 100755 --- a/rad-sim/test/mlp_test.sh +++ b/rad-sim/test/mlp_test.sh @@ -2,6 +2,8 @@ test_path=$( cd "$(dirname "${BASH_SOURCE[0]}")" ; pwd -P ) cd $test_path +cp -f ../example-designs/mlp/config.yml ../uni_config.yml + (cd ../; python config.py mlp) # python gen_testcase.py {} {} diff --git a/rad-sim/uni_config.yml b/rad-sim/uni_config.yml index b3ea2a6..0f56ee1 100644 --- a/rad-sim/uni_config.yml +++ b/rad-sim/uni_config.yml @@ -1,40 +1,16 @@ -config rad1: - dram: - num_controllers: 4 - clk_periods: [3.32, 3.32, 2.0, 2.0] - queue_sizes: [64, 64, 64, 64] - config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] - - design: - name: 'dlrm' - noc_placement: ['dlrm.place'] - clk_periods: [5.0, 2.0, 3.32, 1.5] - -config anotherconfig: - dram: - num_controllers: 4 - clk_periods: [3.32, 3.32, 2.0, 2.0] - queue_sizes: [64, 64, 64, 64] - config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] - - design: - name: 'dlrm' - noc_placement: ['dlrm.place'] - clk_periods: [5.0, 2.0, 3.32, 1.5] - noc: type: ['2d'] num_nocs: 1 clk_period: [1.0] - payload_width: [82] + payload_width: [145] topology: ['mesh'] - dim_x: [10] - dim_y: [10] + dim_x: [5] + dim_y: [4] routing_func: ['dim_order'] - vcs: [5] - vc_buffer_size: [16] + vcs: [1] + vc_buffer_size: [8] output_buffer_size: [8] - num_packet_types: [5] + num_packet_types: [1] router_uarch: ['iq'] vc_allocator: ['islip'] sw_allocator: ['islip'] @@ -51,13 +27,19 @@ noc_adapters: out_arbiter: ['priority_rr'] vc_mapping: ['direct'] -cluster: - sim_driver_period: 5.0 - telemetry_log_verbosity: 2 - telemetry_traces: ['Embedding LU', 'Mem0', 'Mem1', 'Mem2', 'Mem3', 'Feature Inter.', 'MVM first', 'MVM last'] - num_rads: 2 - cluster_configs: ['rad1', 'anotherconfig'] - cluster_topology: 'all-to-all' - inter_rad_latency: 2100 - inter_rad_bw: 102.4 - inter_rad_fifo_num_slots: 1000 \ No newline at end of file +config rad1: + design: + name: 'mlp' + noc_placement: ['mlp.place'] + clk_periods: [5.0] + +cluster: + sim_driver_period: 5.0 + telemetry_log_verbosity: 2 + telemetry_traces: [] + num_rads: 1 + cluster_configs: ['rad1'] + +interfaces: + max_axis_tdata_width: 512 + axis_tuser_width: 75 From 9a7881760581f1941569f167945fb64ecef07c71 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Thu, 18 Jul 2024 00:51:38 -0400 Subject: [PATCH 080/127] Many changes to port MLP design to multi-RAD RADSim --- rad-sim/config.py | 11 ++-- rad-sim/example-designs/dlrm/CMakeLists.txt | 4 +- rad-sim/example-designs/mlp/CMakeLists.txt | 4 +- .../mlp/compiler/gen_testcase.py | 1 + rad-sim/example-designs/mlp/config.yml | 22 ++++--- rad-sim/example-designs/mlp/mlp.place | 31 +++++----- rad-sim/example-designs/mlp/mlp_driver.cpp | 17 ++--- rad-sim/example-designs/mlp/mlp_driver.hpp | 3 +- rad-sim/example-designs/mlp/mlp_system.cpp | 11 ++-- rad-sim/example-designs/mlp/mlp_system.hpp | 5 +- rad-sim/example-designs/mlp/mlp_top.cpp | 19 +++--- rad-sim/example-designs/mlp/mlp_top.hpp | 7 ++- .../example-designs/mlp/modules/collector.cpp | 5 +- .../example-designs/mlp/modules/collector.hpp | 3 +- .../mlp/modules/dispatcher.cpp | 7 ++- .../mlp/modules/dispatcher.hpp | 3 +- rad-sim/example-designs/mlp/modules/mvm.cpp | 9 +-- rad-sim/example-designs/mlp/modules/mvm.hpp | 3 +- rad-sim/sim/CMakeLists.txt | 15 +++-- rad-sim/sim/main.cpp | 15 ++--- rad-sim/sim/noc/noc0_rad0_config | 14 +---- rad-sim/sim/portal.cpp | 56 +++++++++-------- rad-sim/sim/portal.hpp | 16 +++-- rad-sim/sim/radsim_defines.hpp | 14 ++--- rad-sim/sim/radsim_inter_rad.cpp | 13 ++-- rad-sim/sim/radsim_inter_rad.hpp | 2 +- rad-sim/sim/radsim_knobs | 51 +++++---------- rad-sim/sim/sim.trace | 12 ---- rad-sim/test/mlp_test.sh | 2 + rad-sim/uni_config.yml | 62 +++++++------------ 30 files changed, 208 insertions(+), 229 deletions(-) diff --git a/rad-sim/config.py b/rad-sim/config.py index d107112..8436923 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -42,7 +42,7 @@ def parse_config_file(config_filename, booksim_params, radsim_header_params, rad print("Config Error: Parameter " + param_name + " is invalid!") exit(1) - elif config_section == "noc" or config_section == "noc_adapters": + elif config_section == "noc" or config_section == "noc_adapters" or config_section == "interfaces": param_value = param #bc no subsection, so correction param = param_category #bc no subsection, so correction print(' ' + param, param_value) @@ -362,8 +362,9 @@ def generate_radsim_config_file(radsim_knobs, cluster_knobs): radsim_config_file.write("inter_rad_bw_accept_cycles " + str(inter_rad_bw_accept_cycles) + "\n") radsim_config_file.write("inter_rad_bw_total_cycles " + str(inter_rad_bw_total_cycles) + "\n") else: - print('generate_radsim_config_file error: invalid inter_rad_bw') - exit(-1) + print('generate_radsim_config_file error: Invalid inter_rad_bw. Proceeding with default bandwidth of AXIS_DATAW per cycle.') + radsim_config_file.write("inter_rad_bw_accept_cycles " + str(1) + "\n") + radsim_config_file.write("inter_rad_bw_total_cycles " + str(1) + "\n") continue else: radsim_config_file.write(param + " " ) @@ -459,7 +460,7 @@ def prepare_build_dir(design_names): semicol_sep_design_names += ';' count = count+1 #print("cmake -DDESIGN_NAMES=\"" + semicol_sep_design_names + "\" ..;") - os.system("cd build; cmake -DDESIGN_NAMES=\"" + semicol_sep_design_names + "\" ..; cd .;") + os.system("cd build; cmake -DCMAKE_BUILD_TYPE=Debug -DDESIGN_NAMES=\"" + semicol_sep_design_names + "\" ..; cd .;") #os.system("cd build; cmake -DDESIGN:STRING=\"" + 'add' + "\" ..; cd .;") #os.system("cd ..;") @@ -594,4 +595,4 @@ def find_num_configs(config_filename): prepare_build_dir(design_names) - print("RAD-Sim was configured successfully!") \ No newline at end of file + print("RAD-Sim was configured successfully!") diff --git a/rad-sim/example-designs/dlrm/CMakeLists.txt b/rad-sim/example-designs/dlrm/CMakeLists.txt index c78af8d..6ed244f 100644 --- a/rad-sim/example-designs/dlrm/CMakeLists.txt +++ b/rad-sim/example-designs/dlrm/CMakeLists.txt @@ -52,5 +52,5 @@ set(hdrfiles add_compile_options(-Wall -Wextra -pedantic) -add_library(design_dlrm STATIC ${srcfiles} ${hdrfiles}) -target_link_libraries(design_dlrm PUBLIC SystemC::systemc booksim noc dram) \ No newline at end of file +add_library(dlrm STATIC ${srcfiles} ${hdrfiles}) +target_link_libraries(dlrm PUBLIC SystemC::systemc booksim noc dram) diff --git a/rad-sim/example-designs/mlp/CMakeLists.txt b/rad-sim/example-designs/mlp/CMakeLists.txt index ae17c23..a92a5e2 100644 --- a/rad-sim/example-designs/mlp/CMakeLists.txt +++ b/rad-sim/example-designs/mlp/CMakeLists.txt @@ -39,5 +39,5 @@ set(hdrfiles add_compile_options(-Wall -Wextra -pedantic) -add_library(design STATIC ${srcfiles} ${hdrfiles}) -target_link_libraries(design PUBLIC SystemC::systemc booksim noc) +add_library(mlp STATIC ${srcfiles} ${hdrfiles}) +target_link_libraries(mlp PUBLIC SystemC::systemc booksim noc) diff --git a/rad-sim/example-designs/mlp/compiler/gen_testcase.py b/rad-sim/example-designs/mlp/compiler/gen_testcase.py index 6b5f12e..e5c0ca5 100644 --- a/rad-sim/example-designs/mlp/compiler/gen_testcase.py +++ b/rad-sim/example-designs/mlp/compiler/gen_testcase.py @@ -206,6 +206,7 @@ placement_file.write('output_collector 0 ' + str(router_ids[idx]) + ' axis\n') idx = idx + 1 clocks_file.write('output_collector 0 0\n') +placement_file.write('portal_inst 0 16 axis\n') placement_file.close() clocks_file.close() diff --git a/rad-sim/example-designs/mlp/config.yml b/rad-sim/example-designs/mlp/config.yml index 83ad0a1..0f56ee1 100644 --- a/rad-sim/example-designs/mlp/config.yml +++ b/rad-sim/example-designs/mlp/config.yml @@ -4,7 +4,7 @@ noc: clk_period: [1.0] payload_width: [145] topology: ['mesh'] - dim_x: [4] + dim_x: [5] dim_y: [4] routing_func: ['dim_order'] vcs: [1] @@ -27,15 +27,19 @@ noc_adapters: out_arbiter: ['priority_rr'] vc_mapping: ['direct'] -design: - name: 'mlp' - noc_placement: ['mlp.place'] - clk_periods: [5.0] +config rad1: + design: + name: 'mlp' + noc_placement: ['mlp.place'] + clk_periods: [5.0] + +cluster: + sim_driver_period: 5.0 + telemetry_log_verbosity: 2 + telemetry_traces: [] + num_rads: 1 + cluster_configs: ['rad1'] -telemetry: - log_verbosity: 2 - traces: [] - interfaces: max_axis_tdata_width: 512 axis_tuser_width: 75 diff --git a/rad-sim/example-designs/mlp/mlp.place b/rad-sim/example-designs/mlp/mlp.place index 21cd35d..aa4b9b9 100644 --- a/rad-sim/example-designs/mlp/mlp.place +++ b/rad-sim/example-designs/mlp/mlp.place @@ -1,16 +1,17 @@ -layer0_mvm0 0 4 axis -layer0_mvm1 0 12 axis -layer0_mvm2 0 13 axis -layer0_mvm3 0 15 axis -layer1_mvm0 0 0 axis -layer1_mvm1 0 8 axis -layer1_mvm2 0 3 axis -layer2_mvm0 0 11 axis -layer2_mvm1 0 9 axis -layer3_mvm0 0 7 axis -layer3_mvm1 0 2 axis -input_dispatcher0 0 14 axis -input_dispatcher1 0 5 axis -input_dispatcher2 0 6 axis -input_dispatcher3 0 1 axis +layer0_mvm0 0 6 axis +layer0_mvm1 0 15 axis +layer0_mvm2 0 3 axis +layer0_mvm3 0 9 axis +layer1_mvm0 0 8 axis +layer1_mvm1 0 14 axis +layer1_mvm2 0 4 axis +layer2_mvm0 0 0 axis +layer2_mvm1 0 12 axis +layer3_mvm0 0 1 axis +layer3_mvm1 0 13 axis +input_dispatcher0 0 5 axis +input_dispatcher1 0 2 axis +input_dispatcher2 0 7 axis +input_dispatcher3 0 11 axis output_collector 0 10 axis +portal_inst 0 16 axis diff --git a/rad-sim/example-designs/mlp/mlp_driver.cpp b/rad-sim/example-designs/mlp/mlp_driver.cpp index 61f91be..62431b3 100644 --- a/rad-sim/example-designs/mlp/mlp_driver.cpp +++ b/rad-sim/example-designs/mlp/mlp_driver.cpp @@ -19,12 +19,13 @@ bool ParseIO(std::vector>& data_vec, std::string& io_filename) return true; } -mlp_driver::mlp_driver(const sc_module_name& name) : sc_module(name) { +mlp_driver::mlp_driver(const sc_module_name& name, RADSimDesignContext* radsim_design_) : sc_module(name) { + this->radsim_design = radsim_design_; //AKB ADDED start_cycle = 0; end_cycle = 0; // Parse design configuration (number of layers & number of MVM per layer) - std::string design_root_dir = radsim_config.GetStringKnob("radsim_user_design_root_dir"); + std::string design_root_dir = radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); std::string design_config_filename = design_root_dir + "/compiler/layer_mvm_config"; std::ifstream design_config_file(design_config_filename); if(!design_config_file) { @@ -82,7 +83,7 @@ void mlp_driver::source() { dispatcher_fifo_wen[dispatcher_id].write(false); wait(); rst.write(false); - start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); wait(); std::vector written_inputs(num_mvms[0], 0); @@ -128,20 +129,22 @@ void mlp_driver::sink() { } if (mistake) { std::cout << "FAILURE - Some outputs NOT matching!" << std::endl; - radsim_design.ReportDesignFailure(); + radsim_design->ReportDesignFailure(); } else std::cout << "SUCCESS - All outputs are matching!" << std::endl; - end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); std::cout << "Simulation Cycles = " << end_cycle - start_cycle << std::endl; NoCTransactionTelemetry::DumpStatsToFile("stats.csv"); NoCFlitTelemetry::DumpNoCFlitTracesToFile("flit_traces.csv"); std::vector aggregate_bandwidths = NoCTransactionTelemetry::DumpTrafficFlows("traffic_flows", - end_cycle - start_cycle, radsim_design.GetNodeModuleNames()); + end_cycle - start_cycle, radsim_design->GetNodeModuleNames(), radsim_design->rad_id); std::cout << "Aggregate NoC BW = " << aggregate_bandwidths[0] / 1000000000 << " Gbps" << std::endl; - sc_stop(); + //sc_stop(); + this->radsim_design->set_rad_done(); //flag to replace sc_stop calls + return; } void mlp_driver::assign() { diff --git a/rad-sim/example-designs/mlp/mlp_driver.hpp b/rad-sim/example-designs/mlp/mlp_driver.hpp index 0d3dc11..b6ab096 100644 --- a/rad-sim/example-designs/mlp/mlp_driver.hpp +++ b/rad-sim/example-designs/mlp/mlp_driver.hpp @@ -18,6 +18,7 @@ class mlp_driver : public sc_module { std::vector num_mvms; std::vector>> test_inputs; std::vector> golden_outputs; + RADSimDesignContext* radsim_design; //AKB ADDED public: sc_in clk; @@ -31,7 +32,7 @@ class mlp_driver : public sc_module { sc_out collector_fifo_ren; sc_in>> collector_fifo_rdata; - mlp_driver(const sc_module_name& name); + mlp_driver(const sc_module_name& name, RADSimDesignContext* radsim_design_); ~mlp_driver(); void source(); diff --git a/rad-sim/example-designs/mlp/mlp_system.cpp b/rad-sim/example-designs/mlp/mlp_system.cpp index 47496c5..66be09f 100644 --- a/rad-sim/example-designs/mlp/mlp_system.cpp +++ b/rad-sim/example-designs/mlp/mlp_system.cpp @@ -1,10 +1,10 @@ #include "mlp_system.hpp" -mlp_system::mlp_system(const sc_module_name& name, sc_clock* driver_clk_sig) : +mlp_system::mlp_system(const sc_module_name& name, sc_clock* driver_clk_sig, RADSimDesignContext* radsim_design) : sc_module(name) { // Parse design configuration (number of layers and number of MVMs per layer) - std::string design_root_dir = radsim_config.GetStringKnob("radsim_user_design_root_dir"); + std::string design_root_dir = radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); std::string design_config_filename = design_root_dir + "/compiler/layer_mvm_config"; std::ifstream design_config_file(design_config_filename); if(!design_config_file) { @@ -29,7 +29,7 @@ mlp_system::mlp_system(const sc_module_name& name, sc_clock* driver_clk_sig) : init_vector>>>::init_sc_vector(dispatcher_fifo_wdata_signal, num_mvms[0]); // Instantiate driver - mlp_driver_inst = new mlp_driver("mlp_driver"); + mlp_driver_inst = new mlp_driver("mlp_driver", radsim_design); mlp_driver_inst->clk(*driver_clk_sig); mlp_driver_inst->rst(rst_sig); mlp_driver_inst->dispatcher_fifo_rdy(dispatcher_fifo_rdy_signal); @@ -40,7 +40,7 @@ mlp_system::mlp_system(const sc_module_name& name, sc_clock* driver_clk_sig) : mlp_driver_inst->collector_fifo_rdata(collector_fifo_rdata_signal); // Instantiate design top-level - mlp_inst = new mlp_top("mlp_top"); + mlp_inst = new mlp_top("mlp_top", radsim_design); mlp_inst->rst(rst_sig); mlp_inst->dispatcher_fifo_rdy(dispatcher_fifo_rdy_signal); mlp_inst->dispatcher_fifo_wen(dispatcher_fifo_wen_signal); @@ -48,6 +48,9 @@ mlp_system::mlp_system(const sc_module_name& name, sc_clock* driver_clk_sig) : mlp_inst->collector_fifo_rdy(collector_fifo_rdy_signal); mlp_inst->collector_fifo_ren(collector_fifo_ren_signal); mlp_inst->collector_fifo_rdata(collector_fifo_rdata_signal); + + //add _top as dut instance for parent class design_system + this->design_dut_inst = mlp_inst; } mlp_system::~mlp_system() { diff --git a/rad-sim/example-designs/mlp/mlp_system.hpp b/rad-sim/example-designs/mlp/mlp_system.hpp index a8dd8cd..da56d64 100644 --- a/rad-sim/example-designs/mlp/mlp_system.hpp +++ b/rad-sim/example-designs/mlp/mlp_system.hpp @@ -6,8 +6,9 @@ #include #include #include +#include -class mlp_system : public sc_module { +class mlp_system : public design_system { private: sc_vector> dispatcher_fifo_rdy_signal; sc_vector> dispatcher_fifo_wen_signal; @@ -22,6 +23,6 @@ class mlp_system : public sc_module { mlp_driver* mlp_driver_inst; mlp_top* mlp_inst; - mlp_system(const sc_module_name& name, sc_clock* driver_clk_sig); + mlp_system(const sc_module_name& name, sc_clock* driver_clk_sig, RADSimDesignContext* radsim_design); ~mlp_system(); }; \ No newline at end of file diff --git a/rad-sim/example-designs/mlp/mlp_top.cpp b/rad-sim/example-designs/mlp/mlp_top.cpp index 6d762c3..377eb65 100644 --- a/rad-sim/example-designs/mlp/mlp_top.cpp +++ b/rad-sim/example-designs/mlp/mlp_top.cpp @@ -1,9 +1,9 @@ #include -mlp_top::mlp_top(const sc_module_name &name) : sc_module(name) { - +mlp_top::mlp_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : design_top(radsim_design) { + this->radsim_design = radsim_design; std::string design_root_dir = - radsim_config.GetStringKnob("radsim_user_design_root_dir"); + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); std::string design_config_filename = design_root_dir + "/compiler/layer_mvm_config"; @@ -42,13 +42,13 @@ mlp_top::mlp_top(const sc_module_name &name) : sc_module(name) { design_root_dir + "/compiler/inst_mifs/" + module_name_str + ".mif"; std::strcpy(module_name, module_name_str.c_str()); matrix_vector_engines[layer_id][mvm_id] = - new mvm(module_name, mvm_id, layer_id, inst_filename); + new mvm(module_name, mvm_id, layer_id, inst_filename, radsim_design); matrix_vector_engines[layer_id][mvm_id]->rst(rst); if (layer_id == 0) { module_name_str = "input_dispatcher" + std::to_string(mvm_id); std::strcpy(module_name, module_name_str.c_str()); - input_dispatchers[mvm_id] = new dispatcher(module_name, mvm_id); + input_dispatchers[mvm_id] = new dispatcher(module_name, mvm_id, radsim_design); input_dispatchers[mvm_id]->rst(rst); input_dispatchers[mvm_id]->data_fifo_rdy(dispatcher_fifo_rdy[mvm_id]); input_dispatchers[mvm_id]->data_fifo_wen(dispatcher_fifo_wen[mvm_id]); @@ -60,15 +60,16 @@ mlp_top::mlp_top(const sc_module_name &name) : sc_module(name) { module_name_str = "output_collector"; std::strcpy(module_name, module_name_str.c_str()); - output_collector = new collector(module_name); + output_collector = new collector(module_name, radsim_design); output_collector->rst(rst); output_collector->data_fifo_rdy(collector_fifo_rdy); output_collector->data_fifo_ren(collector_fifo_ren); output_collector->data_fifo_rdata(collector_fifo_rdata); - radsim_design.BuildDesignContext("mlp.place", "mlp.clks"); - radsim_design.CreateSystemNoCs(rst); - radsim_design.ConnectModulesToNoC(); + this->portal_inst->rst(rst); + radsim_design->BuildDesignContext("mlp.place", "mlp.clks"); + radsim_design->CreateSystemNoCs(rst); + radsim_design->ConnectModulesToNoC(); } mlp_top::~mlp_top() { diff --git a/rad-sim/example-designs/mlp/mlp_top.hpp b/rad-sim/example-designs/mlp/mlp_top.hpp index ef92126..13c022a 100644 --- a/rad-sim/example-designs/mlp/mlp_top.hpp +++ b/rad-sim/example-designs/mlp/mlp_top.hpp @@ -8,13 +8,14 @@ #include #include #include +#include - -class mlp_top : public sc_module { +class mlp_top : public design_top { private: std::vector> matrix_vector_engines; std::vector input_dispatchers; collector* output_collector; + RADSimDesignContext* radsim_design; //AKB ADDED public: sc_in rst; @@ -27,7 +28,7 @@ class mlp_top : public sc_module { sc_in collector_fifo_ren; sc_out>> collector_fifo_rdata; - mlp_top(const sc_module_name& name); + mlp_top(const sc_module_name& name, RADSimDesignContext* radsim_design); ~mlp_top(); void prepare_adapters_info(); }; \ No newline at end of file diff --git a/rad-sim/example-designs/mlp/modules/collector.cpp b/rad-sim/example-designs/mlp/modules/collector.cpp index 410e7c2..5b499d9 100644 --- a/rad-sim/example-designs/mlp/modules/collector.cpp +++ b/rad-sim/example-designs/mlp/modules/collector.cpp @@ -1,9 +1,10 @@ #include "collector.hpp" -collector::collector(const sc_module_name &name) - : RADSimModule(name), rst("rst"), data_fifo_rdy("data_fifo_rdy"), +collector::collector(const sc_module_name &name, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), rst("rst"), data_fifo_rdy("data_fifo_rdy"), data_fifo_ren("data_fifo_ren"), data_fifo_rdata("data_fifo_rdata") { + this->radsim_design = radsim_design; module_name = name; char fifo_name[25]; diff --git a/rad-sim/example-designs/mlp/modules/collector.hpp b/rad-sim/example-designs/mlp/modules/collector.hpp index 4efab5a..d3cf8fc 100644 --- a/rad-sim/example-designs/mlp/modules/collector.hpp +++ b/rad-sim/example-designs/mlp/modules/collector.hpp @@ -20,13 +20,14 @@ class collector : public RADSimModule { data_fifo_almost_full_signal, data_fifo_almost_empty_signal; public: + RADSimDesignContext* radsim_design; sc_in rst; sc_out data_fifo_rdy; sc_in data_fifo_ren; sc_out>> data_fifo_rdata; axis_slave_port rx_interface; - collector(const sc_module_name& name); + collector(const sc_module_name& name, RADSimDesignContext* radsim_design); ~collector(); void Assign(); diff --git a/rad-sim/example-designs/mlp/modules/dispatcher.cpp b/rad-sim/example-designs/mlp/modules/dispatcher.cpp index aa1e590..25a970d 100644 --- a/rad-sim/example-designs/mlp/modules/dispatcher.cpp +++ b/rad-sim/example-designs/mlp/modules/dispatcher.cpp @@ -1,9 +1,10 @@ #include "dispatcher.hpp" -dispatcher::dispatcher(const sc_module_name &name, unsigned int id) - : RADSimModule(name), rst("rst"), data_fifo_rdy("data_fifo_rdy"), +dispatcher::dispatcher(const sc_module_name &name, unsigned int id, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), rst("rst"), data_fifo_rdy("data_fifo_rdy"), data_fifo_wen("data_fifo_wen"), data_fifo_wdata("data_fifo_wdata") { + this->radsim_design = radsim_design; module_name = name; dispatcher_id = id; @@ -52,7 +53,7 @@ void dispatcher::Assign() { tx_interface.tid.write(0); std::string dest_name = "layer0_mvm" + std::to_string(dispatcher_id) + ".rx_interface"; - tx_interface.tdest.write(radsim_design.GetPortDestinationID(dest_name)); + tx_interface.tdest.write(radsim_design->GetPortDestinationID(dest_name)); // std::cout << "Dispatcher " << dispatcher_id << " pushed data into the // NoC with dest " // << radsim_design.GetPortDestinationID(dest_name) << "!" << std::endl; diff --git a/rad-sim/example-designs/mlp/modules/dispatcher.hpp b/rad-sim/example-designs/mlp/modules/dispatcher.hpp index 32aa957..2901390 100644 --- a/rad-sim/example-designs/mlp/modules/dispatcher.hpp +++ b/rad-sim/example-designs/mlp/modules/dispatcher.hpp @@ -21,13 +21,14 @@ class dispatcher : public RADSimModule { data_fifo_almost_full_signal, data_fifo_almost_empty_signal; public: + RADSimDesignContext* radsim_design; sc_in rst; sc_out data_fifo_rdy; sc_in data_fifo_wen; sc_in>> data_fifo_wdata; axis_master_port tx_interface; - dispatcher(const sc_module_name& name, unsigned int id); + dispatcher(const sc_module_name& name, unsigned int id, RADSimDesignContext* radsim_design); ~dispatcher(); void Assign(); diff --git a/rad-sim/example-designs/mlp/modules/mvm.cpp b/rad-sim/example-designs/mlp/modules/mvm.cpp index 29bfabf..a90f1f5 100644 --- a/rad-sim/example-designs/mlp/modules/mvm.cpp +++ b/rad-sim/example-designs/mlp/modules/mvm.cpp @@ -39,8 +39,8 @@ bool ParseInstructions(std::vector &inst_mem, } mvm::mvm(const sc_module_name &name, unsigned int id_mvm, unsigned int id_layer, - const std::string &inst_filename) - : RADSimModule(name), matrix_mem_rdata("matrix_mem_rdata", DOT_PRODUCTS), + const std::string &inst_filename, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), matrix_mem_rdata("matrix_mem_rdata", DOT_PRODUCTS), matrix_mem_wen("matrix_mem_wen", DOT_PRODUCTS), ififo_pipeline("ififo_pipeline", RF_RD_LATENCY), reduce_pipeline("reduce_pipeline", RF_RD_LATENCY), @@ -54,6 +54,7 @@ mvm::mvm(const sc_module_name &name, unsigned int id_mvm, unsigned int id_layer, dest_mvm_pipeline("mvm_layer_pipeline", COMPUTE_LATENCY + RF_RD_LATENCY), tdata_vec(LANES), result(DOT_PRODUCTS), rst("rst") { + this->radsim_design = radsim_design; module_name = name; mvm_id = id_mvm; layer_id = id_layer; @@ -71,7 +72,7 @@ mvm::mvm(const sc_module_name &name, unsigned int id_mvm, unsigned int id_layer, std::string mem_name_str; matrix_memory.resize(DOT_PRODUCTS); std::string mvm_dir = - radsim_config.GetStringKnob("radsim_user_design_root_dir"); + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); std::string mem_init_file; for (unsigned int dot_id = 0; dot_id < DOT_PRODUCTS; dot_id++) { mem_init_file = mvm_dir + "/compiler/weight_mifs/layer" + @@ -468,7 +469,7 @@ void mvm::Assign() { dest_name = "layer" + std::to_string(dest_layer_int - 1) + "_mvm" + std::to_string(dest_mvm_int) + ".rx_interface"; } - dest_id = radsim_design.GetPortDestinationID(dest_name); + dest_id = radsim_design->GetPortDestinationID(dest_name); unsigned int dest_interface; // If destination is the same layer, send to reduce FIFO diff --git a/rad-sim/example-designs/mlp/modules/mvm.hpp b/rad-sim/example-designs/mlp/modules/mvm.hpp index 3969936..63ca169 100644 --- a/rad-sim/example-designs/mlp/modules/mvm.hpp +++ b/rad-sim/example-designs/mlp/modules/mvm.hpp @@ -96,11 +96,12 @@ class mvm : public RADSimModule { sc_signal dot_op, dot_reduce_op; public: + RADSimDesignContext* radsim_design; sc_in rst; axis_slave_port rx_interface; axis_master_port tx_interface; - mvm(const sc_module_name& name, unsigned int id_mvm, unsigned int id_layer, const std::string& inst_filename); + mvm(const sc_module_name& name, unsigned int id_mvm, unsigned int id_layer, const std::string& inst_filename, RADSimDesignContext* radsim_design); ~mvm(); void Assign(); diff --git a/rad-sim/sim/CMakeLists.txt b/rad-sim/sim/CMakeLists.txt index 389fe4c..21fe34b 100644 --- a/rad-sim/sim/CMakeLists.txt +++ b/rad-sim/sim/CMakeLists.txt @@ -18,9 +18,14 @@ include_directories( dram dram/DRAMsim3 dram/DRAMsim3/src - ../example-designs/dlrm - ../example-designs/dlrm/modules -) + ) + + FOREACH(DESIGN_NAME ${DESIGN_NAMES}) + include_directories( + ../example-designs/${DESIGN_NAME} + ../example-designs/${DESIGN_NAME}/modules + ) +ENDFOREACH() find_package(verilator CONFIG) if (verilator_FOUND) @@ -57,10 +62,10 @@ set(CMAKE_CXX_FLAGS_DEBUG "-g") set(CMAKE_CXX_FLAGS_RELEASE "-O3 -g") add_library(radsim STATIC ${srcfiles} ${hdrfiles}) -target_link_libraries(radsim PUBLIC SystemC::systemc booksim noc dram design_dlrm) +target_link_libraries(radsim PUBLIC SystemC::systemc booksim noc dram ${DESIGN_NAMES}) add_executable(system main.cpp ${srcfiles} ${hdrfiles}) -target_link_libraries(system PUBLIC radsim SystemC::systemc booksim noc dram design_dlrm) +target_link_libraries(system PUBLIC radsim SystemC::systemc booksim noc dram ${DESIGN_NAMES}) add_custom_target(run COMMAND system WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 7c6f8f3..96e2ad1 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -7,7 +7,7 @@ #include #include -#include +#include RADSimConfig radsim_config; std::ostream *gWatchOut; @@ -17,10 +17,10 @@ SimTraceRecording sim_trace_probe; int sc_main(int argc, char *argv[]) { std::string radsim_knobs_filename = "/sim/radsim_knobs"; std::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename; - radsim_config.ResizeAll(2); + radsim_config.ResizeAll(1); ParseRADSimKnobs(radsim_knobs_filepath); - RADSimCluster* cluster = new RADSimCluster(2); + RADSimCluster* cluster = new RADSimCluster(1); gWatchOut = &cout; int log_verbosity = radsim_config.GetIntKnobShared("telemetry_log_verbosity"); @@ -31,19 +31,14 @@ int sc_main(int argc, char *argv[]) { sc_clock *driver_clk_sig0 = new sc_clock( "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); - dlrm_system *system0 = new dlrm_system("dlrm_system", driver_clk_sig0, cluster->all_rads[0]); + mlp_system *system0 = new mlp_system("mlp_system", driver_clk_sig0, cluster->all_rads[0]); cluster->StoreSystem(system0); - sc_clock *driver_clk_sig1 = new sc_clock( - "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); - dlrm_system *system1 = new dlrm_system("dlrm_system", driver_clk_sig1, cluster->all_rads[1]); - cluster->StoreSystem(system1); sc_clock *inter_rad_clk_sig = new sc_clock( "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); blackbox->ConnectRadAxi(0); - blackbox->ConnectRadAxi(1); int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); while (cluster->AllRADsNotDone()) { @@ -55,8 +50,6 @@ int sc_main(int argc, char *argv[]) { delete system0; delete driver_clk_sig0; - delete system1; - delete driver_clk_sig1; delete blackbox; delete inter_rad_clk_sig; diff --git a/rad-sim/sim/noc/noc0_rad0_config b/rad-sim/sim/noc/noc0_rad0_config index 94f70f1..5614bd1 100644 --- a/rad-sim/sim/noc/noc0_rad0_config +++ b/rad-sim/sim/noc/noc0_rad0_config @@ -1,25 +1,17 @@ // Topology topology = mesh; -k = 10; +k = 5; n = 2; // Routing routing_function = dim_order; // Flow control -num_vcs = 5; -vc_buf_size = 16; +num_vcs = 1; +vc_buf_size = 8; output_buffer_size = 8; read_request_begin_vc = 0; read_request_end_vc = 0; -write_request_begin_vc = 1; -write_request_end_vc = 1; -write_data_begin_vc = 2; -write_data_end_vc = 2; -read_reply_begin_vc = 3; -read_reply_end_vc = 3; -write_reply_begin_vc = 4; -write_reply_end_vc = 4; // Router architecture & delays router = iq; diff --git a/rad-sim/sim/portal.cpp b/rad-sim/sim/portal.cpp index 001b62b..0748b0b 100644 --- a/rad-sim/sim/portal.cpp +++ b/rad-sim/sim/portal.cpp @@ -31,21 +31,23 @@ void portal::Assign() { //combinational logic } } -void bv_to_data_vector( - sc_bv &bitvector, data_vector &datavector, - unsigned int num_elements) { - - unsigned int start_idx, end_idx; - unsigned int _bitwidth = 16; //AKB: extra added - for (unsigned int e = 0; e < num_elements; e++) { - start_idx = e * _bitwidth; - end_idx = (e + 1) * _bitwidth; - datavector[e] = bitvector.range(end_idx - 1, start_idx).to_int(); - } -} +//used for internal testing +//must uncomment radsim_utils define to use +// void bv_to_data_vector( +// sc_bv &bitvector, data_vector &datavector, +// unsigned int num_elements) { + +// unsigned int start_idx, end_idx; +// unsigned int _bitwidth = 16; //AKB: extra added +// for (unsigned int e = 0; e < num_elements; e++) { +// start_idx = e * _bitwidth; +// end_idx = (e + 1) * _bitwidth; +// datavector[e] = bitvector.range(end_idx - 1, start_idx).to_int(); +// } +// } int counter = 0; -sc_bv data_to_buffer = 0; +sc_bv data_to_buffer = 0; sc_bv dest_device = 1; //for testing, fixed at 1 to send to RAD1 which has mult design; //#define AXIS_USERW 66 //bool got_data = false; void portal::Tick() { //sequential logic @@ -90,16 +92,20 @@ void portal::Tick() { //sequential logic if (portal_axis_master.tvalid.read() && portal_axis_master.tready.read()) { // && test_ready_toggle) { //pop out of fifo if (!portal_axis_fifo_noc_incoming.empty()) { - //test_ready_toggle = false; int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); - sc_bv tx_tdata_bv = portal_axis_fifo_noc_incoming.front().tdata; - data_vector tx_tdata(32); - bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); + /* START FOR DEBUG */ + //sc_bv tx_tdata_bv = portal_axis_fifo_noc_incoming.front().tdata; + //data_vector tx_tdata(32); + //bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); //std::cout << "portal @ cycle " << curr_cycle << ": sending over inter-RAD" << tx_tdata << " from RAD " << radsim_design->rad_id << std::endl; - + /* END FOR DEBUG */ + portal_axis_fifo_noc_incoming.pop(); + /* START FOR DEBUG */ //std::cout << "portal.cpp in dlrm design sent " << portal_axis_master.tdata.read().to_uint64() << " to dest_device " << dest_device.to_uint64() << " on cycle " << curr_cycle << std::endl; + /* END FOR DEBUG */ //portal_recvd.write(1); + if (portal_axis_master.tlast.read()) { std::cout << "dlrm design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; } @@ -189,11 +195,11 @@ void portal::Tick() { //sequential logic if (axis_portal_master_interface.tvalid.read() && axis_portal_master_interface.tready.read()) { // && test_ready_toggle) { //pop out of fifo if (!portal_axis_fifo_noc_outgoing.empty()) { - //test_ready_toggle = false; int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); - sc_bv tx_tdata_bv = portal_axis_fifo_noc_outgoing.front().tdata; - data_vector tx_tdata(32); - bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); + //used for testing + //sc_bv tx_tdata_bv = portal_axis_fifo_noc_outgoing.front().tdata; + //data_vector tx_tdata(32); + //bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); //std::cout << "portal @ cycle " << curr_cycle << ": sending over NoC " << tx_tdata << " from RAD " << radsim_design->rad_id << std::endl; portal_axis_fifo_noc_outgoing.pop(); @@ -236,12 +242,12 @@ void portal::RegisterModuleInfo() { _num_noc_aximm_master_ports = 0; port_name = module_name + ".axis_portal_slave_interface"; - RegisterAxisSlavePort(port_name, &axis_portal_slave_interface, DATAW, 0); + RegisterAxisSlavePort(port_name, &axis_portal_slave_interface, AXIS_MAX_DATAW, 0); //radsim_design->portal_id = radsim_design->GetPortDestinationID(port_name); //store slave port info //radsim_design->AssignPortalSlaveID(radsim_design->GetPortDestinationID(port_name)); radsim_design->AssignPortalSlaveName(port_name); //bc other modules will send to this slave interface port_name = module_name + ".axis_portal_master_interface"; - RegisterAxisMasterPort(port_name, &axis_portal_master_interface, DATAW, 0); + RegisterAxisMasterPort(port_name, &axis_portal_master_interface, AXIS_MAX_DATAW, 0); -} \ No newline at end of file +} diff --git a/rad-sim/sim/portal.hpp b/rad-sim/sim/portal.hpp index 386230a..bbdce90 100644 --- a/rad-sim/sim/portal.hpp +++ b/rad-sim/sim/portal.hpp @@ -9,13 +9,13 @@ #include #include #include -#include -#include //AKB: added for data_vector template class +//#include +//#include //AKB: added for data_vector template class struct portal_axis_fields { bool tvalid; bool tready; - sc_bv tdata; + sc_bv tdata; sc_bv tstrb; sc_bv tkeep; bool tlast; @@ -51,6 +51,10 @@ class portal : public RADSimModule { void RegisterModuleInfo(); //even tho did not add AXI Interface, need because is virtual fn in derived class }; -void bv_to_data_vector( - sc_bv &bitvector, data_vector &datavector, - unsigned int num_elements); \ No newline at end of file +/* START FOR DEBUG +Note: need correct data_vector datatype matching the design's sim_utils.hpp +*/ +// void bv_to_data_vector( +// sc_bv &bitvector, data_vector &datavector, +// unsigned int num_elements); +/* END FOR DEBUG */ \ No newline at end of file diff --git a/rad-sim/sim/radsim_defines.hpp b/rad-sim/sim/radsim_defines.hpp index ba4dac1..1292bdd 100644 --- a/rad-sim/sim/radsim_defines.hpp +++ b/rad-sim/sim/radsim_defines.hpp @@ -1,14 +1,14 @@ #pragma once // clang-format off -#define RADSIM_ROOT_DIR "/home/bassiabn/rad-sim/rad-flow/rad-sim" +#define RADSIM_ROOT_DIR "/home/bassiabn/rad-sim/rad-flow-test-merge/rad-flow/rad-sim" // NoC-related Parameters -#define NOC_LINKS_PAYLOAD_WIDTH 82 -#define NOC_LINKS_VCID_WIDTH 3 +#define NOC_LINKS_PAYLOAD_WIDTH 145 +#define NOC_LINKS_VCID_WIDTH 1 #define NOC_LINKS_PACKETID_WIDTH 32 -#define NOC_LINKS_TYPEID_WIDTH 3 -#define NOC_LINKS_DEST_WIDTH 21 +#define NOC_LINKS_TYPEID_WIDTH 1 +#define NOC_LINKS_DEST_WIDTH 15 #define NOC_LINKS_DEST_INTERFACE_WIDTH 5 #define NOC_LINKS_WIDTH (NOC_LINKS_PAYLOAD_WIDTH + NOC_LINKS_VCID_WIDTH + NOC_LINKS_PACKETID_WIDTH + NOC_LINKS_DEST_WIDTH + NOC_LINKS_DEST_INTERFACE_WIDTH) @@ -23,14 +23,14 @@ #define AXIS_KEEPW 8 #define AXIS_IDW NOC_LINKS_PACKETID_WIDTH #define AXIS_DESTW NOC_LINKS_DEST_WIDTH -#define AXIS_DEST_FIELDW 7 +#define AXIS_DEST_FIELDW 5 #define AXI4_IDW 8 #define AXI4_ADDRW 64 #define AXI4_LENW 8 #define AXI4_SIZEW 3 #define AXI4_BURSTW 2 #define AXI4_RESPW 2 -#define AXI4_NODE_ADDRW 7 +#define AXI4_NODE_ADDRW 5 #define AXI4_CTRLW (AXI4_LENW + AXI4_SIZEW + AXI4_BURSTW) // AXI Packetization Defines diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index de3b071..6a04c33 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -30,6 +30,7 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c all_axis_slave_ports.push_back(new_axis_slave_port); axis_master_port* new_axis_master_port = new axis_master_port; all_axis_master_ports.push_back(new_axis_master_port); + std::cout << "RADSimInterRad: " << v << std::endl; } SC_CTHREAD(writeFifo, clk.pos()); SC_CTHREAD(readFifo, clk.pos()); @@ -122,11 +123,13 @@ RADSimInterRad::writeFifo() { unsigned int dest_rad = DEST_RAD(curr_transaction.tdest).to_uint64(); //std::cout << "radsim_inter_rad.cpp dest_rad is: "<< dest_rad << std::endl; if (this->fifos[dest_rad]->nb_write(curr_transaction) != false) { //there was an available slot to write to - sc_bv rx_tdata_bv = curr_transaction.tdata; - data_vector rx_tdata(32); - bv_to_data_vector(rx_tdata_bv, rx_tdata, 32); - //std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << rx_tdata << std::endl; - //std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << curr_transaction.tdata.to_uint64() << std::endl; + /* START FOR DEBUG */ + // sc_bv rx_tdata_bv = curr_transaction.tdata; + // data_vector rx_tdata(32); //NOTE (AKB): type needs to match what is supported in example-designs/{design}/modules/sim_utils.hpp + // bv_to_data_vector(rx_tdata_bv, rx_tdata, 32); + // std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << rx_tdata << std::endl; + // std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << curr_transaction.tdata.to_uint64() << std::endl; + /* END FOR DEBUG */ fifos_latency_counters[dest_rad].push_back(0); //for latency counters } else { diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index 438d0ab..a8d2007 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -71,4 +71,4 @@ class RADSimInterRad : public sc_module { void writeFifo(); void readFifo(); SC_HAS_PROCESS(RADSimInterRad); -}; \ No newline at end of file +}; diff --git a/rad-sim/sim/radsim_knobs b/rad-sim/sim/radsim_knobs index 201a764..e880b2b 100644 --- a/rad-sim/sim/radsim_knobs +++ b/rad-sim/sim/radsim_knobs @@ -1,49 +1,30 @@ -design_name 0 dlrm +design_name 0 mlp noc_num_nocs 0 1 noc_clk_period 0 1.0 -noc_vcs 0 5 -noc_payload_width 0 82 -noc_num_nodes 0 100 -design_noc_placement 0 dlrm.place +noc_vcs 0 1 +noc_payload_width 0 145 +noc_num_nodes 0 25 +design_noc_placement 0 mlp.place noc_adapters_clk_period 0 1.25 noc_adapters_fifo_size 0 16 noc_adapters_obuff_size 0 2 noc_adapters_in_arbiter 0 fixed_rr noc_adapters_out_arbiter 0 priority_rr noc_adapters_vc_mapping 0 direct -design_clk_periods 0 5.0 2.0 3.32 1.5 -dram_num_controllers 0 4 -dram_clk_periods 0 3.32 3.32 2.0 2.0 -dram_queue_sizes 0 64 64 64 64 -dram_config_files 0 DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 -radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm -design_name 1 dlrm -noc_num_nocs 1 1 -noc_clk_period 1 1.0 -noc_vcs 1 5 -noc_payload_width 1 82 -noc_num_nodes 1 100 -design_noc_placement 1 dlrm.place -noc_adapters_clk_period 1 1.25 -noc_adapters_fifo_size 1 16 -noc_adapters_obuff_size 1 2 -noc_adapters_in_arbiter 1 fixed_rr -noc_adapters_out_arbiter 1 priority_rr -noc_adapters_vc_mapping 1 direct -design_clk_periods 1 5.0 2.0 3.32 1.5 -dram_num_controllers 1 4 -dram_clk_periods 1 3.32 3.32 2.0 2.0 -dram_queue_sizes 1 64 64 64 64 -dram_config_files 1 DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 -radsim_user_design_root_dir 1 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm -radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim +design_clk_periods 0 5.0 +dram_num_controllers 0 0 +dram_clk_periods 0 2.0 +dram_queue_sizes 0 64 +dram_config_files 0 HBM2_8Gb_x128 +radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow-test-merge/rad-flow/rad-sim/example-designs/mlp +radsim_root_dir /home/bassiabn/rad-sim/rad-flow-test-merge/rad-flow/rad-sim sim_driver_period 5.0 telemetry_log_verbosity 2 -telemetry_traces Embedding LU Mem0 Mem1 Mem2 Mem3 Feature Inter. MVM first MVM last -num_rads 2 -cluster_configs rad1 anotherconfig +telemetry_traces +num_rads 1 +cluster_configs rad1 cluster_topology all-to-all -inter_rad_latency_cycles 420 +inter_rad_latency_cycles 1 inter_rad_bw_accept_cycles 1 inter_rad_bw_total_cycles 1 inter_rad_fifo_num_slots 1000 diff --git a/rad-sim/sim/sim.trace b/rad-sim/sim/sim.trace index 1901ba9..e69de29 100644 --- a/rad-sim/sim/sim.trace +++ b/rad-sim/sim/sim.trace @@ -1,12 +0,0 @@ - - - - - - - - - - - - diff --git a/rad-sim/test/mlp_test.sh b/rad-sim/test/mlp_test.sh index d770f03..5272151 100755 --- a/rad-sim/test/mlp_test.sh +++ b/rad-sim/test/mlp_test.sh @@ -2,6 +2,8 @@ test_path=$( cd "$(dirname "${BASH_SOURCE[0]}")" ; pwd -P ) cd $test_path +cp -f ../example-designs/mlp/config.yml ../uni_config.yml + (cd ../; python config.py mlp) # python gen_testcase.py {} {} diff --git a/rad-sim/uni_config.yml b/rad-sim/uni_config.yml index b3ea2a6..0f56ee1 100644 --- a/rad-sim/uni_config.yml +++ b/rad-sim/uni_config.yml @@ -1,40 +1,16 @@ -config rad1: - dram: - num_controllers: 4 - clk_periods: [3.32, 3.32, 2.0, 2.0] - queue_sizes: [64, 64, 64, 64] - config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] - - design: - name: 'dlrm' - noc_placement: ['dlrm.place'] - clk_periods: [5.0, 2.0, 3.32, 1.5] - -config anotherconfig: - dram: - num_controllers: 4 - clk_periods: [3.32, 3.32, 2.0, 2.0] - queue_sizes: [64, 64, 64, 64] - config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] - - design: - name: 'dlrm' - noc_placement: ['dlrm.place'] - clk_periods: [5.0, 2.0, 3.32, 1.5] - noc: type: ['2d'] num_nocs: 1 clk_period: [1.0] - payload_width: [82] + payload_width: [145] topology: ['mesh'] - dim_x: [10] - dim_y: [10] + dim_x: [5] + dim_y: [4] routing_func: ['dim_order'] - vcs: [5] - vc_buffer_size: [16] + vcs: [1] + vc_buffer_size: [8] output_buffer_size: [8] - num_packet_types: [5] + num_packet_types: [1] router_uarch: ['iq'] vc_allocator: ['islip'] sw_allocator: ['islip'] @@ -51,13 +27,19 @@ noc_adapters: out_arbiter: ['priority_rr'] vc_mapping: ['direct'] -cluster: - sim_driver_period: 5.0 - telemetry_log_verbosity: 2 - telemetry_traces: ['Embedding LU', 'Mem0', 'Mem1', 'Mem2', 'Mem3', 'Feature Inter.', 'MVM first', 'MVM last'] - num_rads: 2 - cluster_configs: ['rad1', 'anotherconfig'] - cluster_topology: 'all-to-all' - inter_rad_latency: 2100 - inter_rad_bw: 102.4 - inter_rad_fifo_num_slots: 1000 \ No newline at end of file +config rad1: + design: + name: 'mlp' + noc_placement: ['mlp.place'] + clk_periods: [5.0] + +cluster: + sim_driver_period: 5.0 + telemetry_log_verbosity: 2 + telemetry_traces: [] + num_rads: 1 + cluster_configs: ['rad1'] + +interfaces: + max_axis_tdata_width: 512 + axis_tuser_width: 75 From a50424470181d07efc2dcc6a88f55ca4977e26d1 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Thu, 18 Jul 2024 18:17:27 -0400 Subject: [PATCH 081/127] Fixed dlrm test script to use correct config file --- rad-sim/example-designs/dlrm/config.yml | 48 +++++++++++++------ rad-sim/example-designs/mlp/mlp.place | 30 ++++++------ .../mlp/modules/dispatcher.cpp | 7 ++- rad-sim/sim/radsim_defines.hpp | 2 +- rad-sim/sim/radsim_knobs | 4 +- rad-sim/test/dlrm_test.sh | 2 + rad-sim/test/mlp_int8_test.sh | 2 + rad-sim/test/npu_test.sh | 2 + 8 files changed, 64 insertions(+), 33 deletions(-) diff --git a/rad-sim/example-designs/dlrm/config.yml b/rad-sim/example-designs/dlrm/config.yml index 9095cc5..b3ea2a6 100644 --- a/rad-sim/example-designs/dlrm/config.yml +++ b/rad-sim/example-designs/dlrm/config.yml @@ -1,3 +1,27 @@ +config rad1: + dram: + num_controllers: 4 + clk_periods: [3.32, 3.32, 2.0, 2.0] + queue_sizes: [64, 64, 64, 64] + config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] + + design: + name: 'dlrm' + noc_placement: ['dlrm.place'] + clk_periods: [5.0, 2.0, 3.32, 1.5] + +config anotherconfig: + dram: + num_controllers: 4 + clk_periods: [3.32, 3.32, 2.0, 2.0] + queue_sizes: [64, 64, 64, 64] + config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] + + design: + name: 'dlrm' + noc_placement: ['dlrm.place'] + clk_periods: [5.0, 2.0, 3.32, 1.5] + noc: type: ['2d'] num_nocs: 1 @@ -27,17 +51,13 @@ noc_adapters: out_arbiter: ['priority_rr'] vc_mapping: ['direct'] -dram: - num_controllers: 4 - clk_periods: [3.32, 3.32, 2.0, 2.0] - queue_sizes: [64, 64, 64, 64] - config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] - -design: - name: 'dlrm' - noc_placement: ['dlrm.place'] - clk_periods: [5.0, 2.0, 3.32, 1.5] - -telemetry: - log_verbosity: 2 - traces: ['Embedding LU', 'Mem0', 'Mem1', 'Mem2', 'Mem3', 'Feature Inter.', 'MVM first', 'MVM last'] \ No newline at end of file +cluster: + sim_driver_period: 5.0 + telemetry_log_verbosity: 2 + telemetry_traces: ['Embedding LU', 'Mem0', 'Mem1', 'Mem2', 'Mem3', 'Feature Inter.', 'MVM first', 'MVM last'] + num_rads: 2 + cluster_configs: ['rad1', 'anotherconfig'] + cluster_topology: 'all-to-all' + inter_rad_latency: 2100 + inter_rad_bw: 102.4 + inter_rad_fifo_num_slots: 1000 \ No newline at end of file diff --git a/rad-sim/example-designs/mlp/mlp.place b/rad-sim/example-designs/mlp/mlp.place index aa4b9b9..70391a5 100644 --- a/rad-sim/example-designs/mlp/mlp.place +++ b/rad-sim/example-designs/mlp/mlp.place @@ -1,17 +1,17 @@ -layer0_mvm0 0 6 axis -layer0_mvm1 0 15 axis -layer0_mvm2 0 3 axis -layer0_mvm3 0 9 axis -layer1_mvm0 0 8 axis -layer1_mvm1 0 14 axis -layer1_mvm2 0 4 axis -layer2_mvm0 0 0 axis -layer2_mvm1 0 12 axis -layer3_mvm0 0 1 axis -layer3_mvm1 0 13 axis -input_dispatcher0 0 5 axis -input_dispatcher1 0 2 axis +layer0_mvm0 0 4 axis +layer0_mvm1 0 2 axis +layer0_mvm2 0 6 axis +layer0_mvm3 0 12 axis +layer1_mvm0 0 15 axis +layer1_mvm1 0 5 axis +layer1_mvm2 0 3 axis +layer2_mvm0 0 11 axis +layer2_mvm1 0 13 axis +layer3_mvm0 0 0 axis +layer3_mvm1 0 8 axis +input_dispatcher0 0 1 axis +input_dispatcher1 0 9 axis input_dispatcher2 0 7 axis -input_dispatcher3 0 11 axis -output_collector 0 10 axis +input_dispatcher3 0 10 axis +output_collector 0 14 axis portal_inst 0 16 axis diff --git a/rad-sim/example-designs/mlp/modules/dispatcher.cpp b/rad-sim/example-designs/mlp/modules/dispatcher.cpp index 25a970d..389dcfd 100644 --- a/rad-sim/example-designs/mlp/modules/dispatcher.cpp +++ b/rad-sim/example-designs/mlp/modules/dispatcher.cpp @@ -36,6 +36,7 @@ dispatcher::dispatcher(const sc_module_name &name, unsigned int id, RADSimDesign dispatcher::~dispatcher() { delete data_fifo; } void dispatcher::Assign() { + sc_bv dest_id_concat; if (rst.read()) { tx_interface.tvalid.write(false); data_fifo_rdy.write(false); @@ -53,7 +54,11 @@ void dispatcher::Assign() { tx_interface.tid.write(0); std::string dest_name = "layer0_mvm" + std::to_string(dispatcher_id) + ".rx_interface"; - tx_interface.tdest.write(radsim_design->GetPortDestinationID(dest_name)); + unsigned int dest_id = radsim_design->GetPortDestinationID(dest_name); + //DEST_RAD(dest_id_concat) = radsim_design->rad_id; + DEST_LOCAL_NODE(dest_id_concat) = dest_id; + //DEST_REMOTE_NODE(dest_id_concat) = dest_id; + tx_interface.tdest.write(dest_id_concat); //radsim_design->GetPortDestinationID(dest_name)); // std::cout << "Dispatcher " << dispatcher_id << " pushed data into the // NoC with dest " // << radsim_design.GetPortDestinationID(dest_name) << "!" << std::endl; diff --git a/rad-sim/sim/radsim_defines.hpp b/rad-sim/sim/radsim_defines.hpp index 1292bdd..9f4b671 100644 --- a/rad-sim/sim/radsim_defines.hpp +++ b/rad-sim/sim/radsim_defines.hpp @@ -1,7 +1,7 @@ #pragma once // clang-format off -#define RADSIM_ROOT_DIR "/home/bassiabn/rad-sim/rad-flow-test-merge/rad-flow/rad-sim" +#define RADSIM_ROOT_DIR "/home/bassiabn/rad-sim/rad-flow/rad-sim" // NoC-related Parameters #define NOC_LINKS_PAYLOAD_WIDTH 145 diff --git a/rad-sim/sim/radsim_knobs b/rad-sim/sim/radsim_knobs index e880b2b..df9dd53 100644 --- a/rad-sim/sim/radsim_knobs +++ b/rad-sim/sim/radsim_knobs @@ -16,8 +16,8 @@ dram_num_controllers 0 0 dram_clk_periods 0 2.0 dram_queue_sizes 0 64 dram_config_files 0 HBM2_8Gb_x128 -radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow-test-merge/rad-flow/rad-sim/example-designs/mlp -radsim_root_dir /home/bassiabn/rad-sim/rad-flow-test-merge/rad-flow/rad-sim +radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/mlp +radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim sim_driver_period 5.0 telemetry_log_verbosity 2 telemetry_traces diff --git a/rad-sim/test/dlrm_test.sh b/rad-sim/test/dlrm_test.sh index eeaf378..7235d2a 100755 --- a/rad-sim/test/dlrm_test.sh +++ b/rad-sim/test/dlrm_test.sh @@ -2,6 +2,8 @@ test_path=$( cd "$(dirname "${BASH_SOURCE[0]}")" ; pwd -P ) cd $test_path +cp -f ../example-designs/dlrm/config.yml ../uni_config.yml + (cd ../; python config.py dlrm) (cd ../example-designs/dlrm/compiler; python dlrm.py) diff --git a/rad-sim/test/mlp_int8_test.sh b/rad-sim/test/mlp_int8_test.sh index a2b8209..e0747a9 100755 --- a/rad-sim/test/mlp_int8_test.sh +++ b/rad-sim/test/mlp_int8_test.sh @@ -2,6 +2,8 @@ test_path=$( cd "$(dirname "${BASH_SOURCE[0]}")" ; pwd -P ) cd $test_path +cp -f ../example-designs/mlp_int8/config.yml ../uni_config.yml + (cd ../; python config.py mlp_int8) # python gen_testcase.py {} {} diff --git a/rad-sim/test/npu_test.sh b/rad-sim/test/npu_test.sh index 220e243..75cdedd 100755 --- a/rad-sim/test/npu_test.sh +++ b/rad-sim/test/npu_test.sh @@ -22,6 +22,8 @@ done test_path=$( cd "$(dirname "${BASH_SOURCE[0]}")" ; pwd -P ) cd $test_path +cp -f ../example-designs/npu/config.yml ../uni_config.yml + (cd ../; python config.py npu) (cd ../example-designs/npu/compiler; chmod 777 perf_sim.sh) From 9c8cd8e9f77a9b46b822dd34b9843ebffdf81086 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Fri, 19 Jul 2024 04:23:20 -0400 Subject: [PATCH 082/127] Fixed segfault due to setting DEST_REMOTE_NODE. Also added setting of dest axis subfields in dispatcher.cpp for mlp design. Segfault was bc dest_node in radsim_telemetry used local + remote node IDs concatenated, leading to out of bounds access of node_module_names --- rad-sim/example-designs/mlp/mlp.place | 30 +++++++++---------- rad-sim/example-designs/mlp/mlp_driver.cpp | 1 + .../mlp/modules/dispatcher.cpp | 6 ++-- rad-sim/sim/design_context.cpp | 4 +-- rad-sim/sim/design_context.hpp | 2 +- rad-sim/sim/noc/axis_slave_adapter.cpp | 8 ++--- rad-sim/sim/radsim_inter_rad.cpp | 19 ++++-------- rad-sim/sim/radsim_inter_rad.hpp | 11 +++---- rad-sim/sim/radsim_telemetry.cpp | 8 ++--- rad-sim/sim/radsim_telemetry.hpp | 3 +- 10 files changed, 45 insertions(+), 47 deletions(-) diff --git a/rad-sim/example-designs/mlp/mlp.place b/rad-sim/example-designs/mlp/mlp.place index 70391a5..7ae3aa6 100644 --- a/rad-sim/example-designs/mlp/mlp.place +++ b/rad-sim/example-designs/mlp/mlp.place @@ -1,17 +1,17 @@ -layer0_mvm0 0 4 axis +layer0_mvm0 0 9 axis layer0_mvm1 0 2 axis -layer0_mvm2 0 6 axis -layer0_mvm3 0 12 axis -layer1_mvm0 0 15 axis -layer1_mvm1 0 5 axis -layer1_mvm2 0 3 axis -layer2_mvm0 0 11 axis -layer2_mvm1 0 13 axis -layer3_mvm0 0 0 axis -layer3_mvm1 0 8 axis -input_dispatcher0 0 1 axis -input_dispatcher1 0 9 axis -input_dispatcher2 0 7 axis -input_dispatcher3 0 10 axis -output_collector 0 14 axis +layer0_mvm2 0 3 axis +layer0_mvm3 0 7 axis +layer1_mvm0 0 8 axis +layer1_mvm1 0 1 axis +layer1_mvm2 0 10 axis +layer2_mvm0 0 0 axis +layer2_mvm1 0 6 axis +layer3_mvm0 0 14 axis +layer3_mvm1 0 11 axis +input_dispatcher0 0 15 axis +input_dispatcher1 0 12 axis +input_dispatcher2 0 5 axis +input_dispatcher3 0 13 axis +output_collector 0 4 axis portal_inst 0 16 axis diff --git a/rad-sim/example-designs/mlp/mlp_driver.cpp b/rad-sim/example-designs/mlp/mlp_driver.cpp index 62431b3..1f0e387 100644 --- a/rad-sim/example-designs/mlp/mlp_driver.cpp +++ b/rad-sim/example-designs/mlp/mlp_driver.cpp @@ -138,6 +138,7 @@ void mlp_driver::sink() { NoCTransactionTelemetry::DumpStatsToFile("stats.csv"); NoCFlitTelemetry::DumpNoCFlitTracesToFile("flit_traces.csv"); + std::cout << "mlp_driver.cpp radsim_design->rad_id: " << radsim_design->rad_id << std::endl; std::vector aggregate_bandwidths = NoCTransactionTelemetry::DumpTrafficFlows("traffic_flows", end_cycle - start_cycle, radsim_design->GetNodeModuleNames(), radsim_design->rad_id); std::cout << "Aggregate NoC BW = " << aggregate_bandwidths[0] / 1000000000 << " Gbps" << std::endl; diff --git a/rad-sim/example-designs/mlp/modules/dispatcher.cpp b/rad-sim/example-designs/mlp/modules/dispatcher.cpp index 389dcfd..1013c21 100644 --- a/rad-sim/example-designs/mlp/modules/dispatcher.cpp +++ b/rad-sim/example-designs/mlp/modules/dispatcher.cpp @@ -55,9 +55,11 @@ void dispatcher::Assign() { std::string dest_name = "layer0_mvm" + std::to_string(dispatcher_id) + ".rx_interface"; unsigned int dest_id = radsim_design->GetPortDestinationID(dest_name); - //DEST_RAD(dest_id_concat) = radsim_design->rad_id; + DEST_REMOTE_NODE(dest_id_concat) = 0; //bc staying on same RAD DEST_LOCAL_NODE(dest_id_concat) = dest_id; - //DEST_REMOTE_NODE(dest_id_concat) = dest_id; + //std::cout << "dispatcher.cpp dest_id: " << dest_id << std::endl; + DEST_RAD(dest_id_concat) = radsim_design->rad_id; + std::cout << "dispatcher.cpp dest_id_concat: " << dest_id_concat << std::endl; tx_interface.tdest.write(dest_id_concat); //radsim_design->GetPortDestinationID(dest_name)); // std::cout << "Dispatcher " << dispatcher_id << " pushed data into the // NoC with dest " diff --git a/rad-sim/sim/design_context.cpp b/rad-sim/sim/design_context.cpp index c19ab9d..f279dd6 100644 --- a/rad-sim/sim/design_context.cpp +++ b/rad-sim/sim/design_context.cpp @@ -691,9 +691,9 @@ void RADSimDesignContext::DumpDesignContext() { cin.get(); } -std::vector>> & +std::vector>> RADSimDesignContext::GetNodeModuleNames() { - return _node_module_names; + return std::ref(_node_module_names); } uint64_t RADSimDesignContext::GetPortBaseAddress(std::string &port_name) { diff --git a/rad-sim/sim/design_context.hpp b/rad-sim/sim/design_context.hpp index a1e40c5..d31ba20 100644 --- a/rad-sim/sim/design_context.hpp +++ b/rad-sim/sim/design_context.hpp @@ -102,7 +102,7 @@ class RADSimDesignContext { unsigned int GetPortDestinationID(std::string &port_name); unsigned int GetPortInterfaceID(std::string &port_name); void DumpDesignContext(); - std::vector>> &GetNodeModuleNames(); + std::vector>> GetNodeModuleNames(); uint64_t GetPortBaseAddress(std::string &port_name); int GetSimExitCode(); diff --git a/rad-sim/sim/noc/axis_slave_adapter.cpp b/rad-sim/sim/noc/axis_slave_adapter.cpp index 2ae70c2..b5f9cfe 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.cpp +++ b/rad-sim/sim/noc/axis_slave_adapter.cpp @@ -234,14 +234,14 @@ void axis_slave_adapter::InputInjection() { if (DEST_RAD(_to_be_injected_flit._dest) == _rad_id) { //not crossing to other RAD sc_bv booksim_flit_dest = DEST_LOCAL_NODE(_to_be_injected_flit._dest); booksim_flit->dest = GetInputDestinationNode(booksim_flit_dest); - booksim_flit->dest_rad = DEST_RAD(_to_be_injected_flit._dest).to_uint(); - booksim_flit->dest_remote = DEST_REMOTE_NODE(_to_be_injected_flit._dest).to_uint(); + booksim_flit->dest_rad = DEST_RAD(_to_be_injected_flit._dest).to_int(); + booksim_flit->dest_remote = DEST_REMOTE_NODE(_to_be_injected_flit._dest).to_int(); } else { //std::cout << "(TO-DO-MR) _portal_id in axis_slave_adapter.cpp: " << _portal_id << std::endl; sc_bv booksim_flit_dest = _portal_id; // TO-DO-MR-DONE: set to portal node ID booksim_flit->dest = GetInputDestinationNode(booksim_flit_dest); - booksim_flit->dest_rad = DEST_RAD(_to_be_injected_flit._dest).to_uint(); - booksim_flit->dest_remote = DEST_REMOTE_NODE(_to_be_injected_flit._dest).to_uint(); + booksim_flit->dest_rad = DEST_RAD(_to_be_injected_flit._dest).to_int(); + booksim_flit->dest_remote = DEST_REMOTE_NODE(_to_be_injected_flit._dest).to_int();//to_uint(); } // TO-DO-MR END diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 6a04c33..64cc64d 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -1,13 +1,11 @@ #include -int num_wait = 1; //7; - std::ostream& operator<<(std::ostream& os, const axis_fields& I) { return os; //needed to create sc_fifo of custom struct type } RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_clk, RADSimCluster* cluster) : sc_module(name) { - std::cout << "RADSimInterRad DATAW " << DATAW << std::endl; + std::cout << "RADSimInterRad AXIS_MAX_DATAW " << AXIS_MAX_DATAW << std::endl; this->cluster = cluster; this->clk(*inter_rad_clk); num_rads = cluster->num_rads; @@ -124,7 +122,7 @@ RADSimInterRad::writeFifo() { //std::cout << "radsim_inter_rad.cpp dest_rad is: "<< dest_rad << std::endl; if (this->fifos[dest_rad]->nb_write(curr_transaction) != false) { //there was an available slot to write to /* START FOR DEBUG */ - // sc_bv rx_tdata_bv = curr_transaction.tdata; + // sc_bv rx_tdata_bv = curr_transaction.tdata; // data_vector rx_tdata(32); //NOTE (AKB): type needs to match what is supported in example-designs/{design}/modules/sim_utils.hpp // bv_to_data_vector(rx_tdata_bv, rx_tdata, 32); // std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << rx_tdata << std::endl; @@ -146,7 +144,7 @@ RADSimInterRad::writeFifo() { // } } - //wait(num_wait, SC_NS); //SC_NS); //eventually change to 1.3, SC_US -- assuming 2.6 us / 2 latency for one piece of data + if (bw_counter >= (radsim_config.GetIntKnobShared("inter_rad_bw_total_cycles") - 1)) { //bw_limit) { bw_counter = 0; } @@ -173,7 +171,7 @@ RADSimInterRad::readFifo() { //get current cycle for experiments int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); - //sc_bv val = this->fifos[0]->read(); + //sc_bv val = this->fifos[0]->read(); for (int i = 0; i < num_rads; i++) { //iterate through all rad's fifos //increment delay on all counters for (int j = 0; j < fifos_latency_counters[i].size(); j++) { @@ -186,11 +184,10 @@ RADSimInterRad::readFifo() { //TODO: replace sc_fifo with something else std::queue that can support peeks //IMPORTANT: currently does not accept backpressure. Portal module must create a buffer for backpressure on the RAD's NoC if ( (this->fifos[i]->num_available() != 0) && (fifos_latency_counters[i][0] >= target_delay) ){ //check that fifo is not empty - //counter_delay = 0; //reset counter fifos_latency_counters[i].erase(fifos_latency_counters[i].begin()); //to reset counter, remove first elem struct axis_fields read_from_fifo; this->fifos[i]->nb_read(read_from_fifo); - sc_bv val = read_from_fifo.tdata; + sc_bv val = read_from_fifo.tdata; int dest_device = (DEST_RAD(read_from_fifo.tdest)).to_uint64(); //#define AXIS_USERW 66 //std::cout << "inter_rad fifo data READ is " << this->fifos[0]->read() << std::endl; @@ -198,7 +195,6 @@ RADSimInterRad::readFifo() { //std::cout << "inter_rad fifo data READ is " << val.to_uint64() << " on cycle " << curr_cycle << std::endl; //std::cout << "dest_device: " << dest_device << std::endl; //all_signals[1].write(val); //works but replacing with axi - //all_axis_master_ports[1]->tdata.write(val); //1 bc sending to mult design all_axis_master_signals[dest_device]->tdata.write(val); //works if write to either this or line above all_axis_master_signals[dest_device]->tvalid.write(read_from_fifo.tvalid); all_axis_master_signals[dest_device]->tlast.write(read_from_fifo.tlast); @@ -208,21 +204,18 @@ RADSimInterRad::readFifo() { } else { //no data to be written to any RAD's portal module - //all_axis_master_signals[0]->tvalid.write(false); all_axis_master_signals[i]->tvalid.write(false); } } else { //no data to be written to any RAD's portal module - //all_axis_master_signals[0]->tvalid.write(false); all_axis_master_signals[i]->tvalid.write(false); } } - //wait(num_wait, SC_NS); //eventually change to 1.3, SC_US -- assuming 2.6 us / 2 latency for one piece of data wait(); - //wait(2); + } } diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index a8d2007..69fc434 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -10,16 +10,17 @@ #include #include #include +#include -#define DATAW 16*32 //changed to match dlrm defines file //128 +//#define DATAW AXIS_MAX_DATAW //16*32 //changed to match dlrm defines file //128 //#define NUM_SLOTS 1000 //5 //number of fifo slots, for now = NUM_ADDENDS -#define DEST_RAD_LSB 0 -#define DEST_RAD_MSB 7 +// #define DEST_RAD_LSB 0 +// #define DEST_RAD_MSB AXIS_DEST_FIELDW //7 struct axis_fields { bool tvalid; bool tready; - sc_bv tdata; + sc_bv tdata; sc_bv tstrb; sc_bv tkeep; bool tlast; @@ -34,7 +35,7 @@ class RADSimInterRad : public sc_module { private: RADSimCluster* cluster; //std::vector> all_signals; - sc_vector>> all_signals{"all_signals"}; + sc_vector>> all_signals{"all_signals"}; //sc_fifo> data_in_rad1 = sc_fifo>(2); //2 slots for now //sc_vector>> switch_port_fifos{"switch_port_fifos"}; //for latency diff --git a/rad-sim/sim/radsim_telemetry.cpp b/rad-sim/sim/radsim_telemetry.cpp index adbb03f..35aa0f3 100644 --- a/rad-sim/sim/radsim_telemetry.cpp +++ b/rad-sim/sim/radsim_telemetry.cpp @@ -10,7 +10,7 @@ NoCTransactionTelemetry::~NoCTransactionTelemetry() {} int NoCTransactionTelemetry::RecordTransactionInitiation(int src, int dest, int type, int dataw, int network_id) { NoCTransactionTrace entry; entry.src_node = src; - entry.dest_node = dest; + entry.dest_node = (~(0xff << AXIS_DEST_FIELDW)) & dest; //extract only local NoC node. ignore any remote NoC node set for inter-rad network. entry.transaction_type = type; entry.dataw = dataw; entry.network_id = network_id; @@ -64,7 +64,7 @@ void NoCTransactionTelemetry::DumpStatsToFile(const std::string& filename) { } std::vector NoCTransactionTelemetry::DumpTrafficFlows(const std::string& filename, unsigned int cycle_count, - std::vector>>& node_module_names, int rad_id) { //AKB: require passing of rad_id + std::vector>> node_module_names, unsigned int rad_id) { //AKB: require passing of rad_id double sim_driver_period = radsim_config.GetDoubleKnobShared("sim_driver_period") / 1000000000.0; unsigned int num_nocs = radsim_config.GetIntKnobPerRad("noc_num_nocs", rad_id); std::vector>> traffic_bits(num_nocs); @@ -95,8 +95,8 @@ std::vector NoCTransactionTelemetry::DumpTrafficFlows(const std::string& if (traffic_bits[noc_id][src_id].size() > 0) { for (auto& flow : traffic_bits[noc_id][src_id]) { traffic_file << "\t #include +#include #include #include @@ -58,7 +59,7 @@ class NoCTransactionTelemetry { static void UpdateHops(int id, int num_hops); static void DumpStatsToFile(const std::string& filename); static std::vector DumpTrafficFlows(const std::string& filename, unsigned int cycle_count, - std::vector>>& node_module_names, int rad_id); + std::vector>> node_module_names, unsigned int rad_id); }; // Class for recording and storing flit traces From f60378266b85d5f17b61c1fa48f42432bc158587 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 23 Jul 2024 22:55:50 -0400 Subject: [PATCH 083/127] Done porting mlp design to multi-rad RAD-Sim --- rad-sim/example-designs/mlp/mlp.place | 32 +++++++++---------- .../mlp/modules/dispatcher.cpp | 4 +-- rad-sim/example-designs/mlp/modules/mvm.cpp | 6 +++- 3 files changed, 22 insertions(+), 20 deletions(-) diff --git a/rad-sim/example-designs/mlp/mlp.place b/rad-sim/example-designs/mlp/mlp.place index 7ae3aa6..41fbf1c 100644 --- a/rad-sim/example-designs/mlp/mlp.place +++ b/rad-sim/example-designs/mlp/mlp.place @@ -1,17 +1,17 @@ -layer0_mvm0 0 9 axis -layer0_mvm1 0 2 axis -layer0_mvm2 0 3 axis -layer0_mvm3 0 7 axis -layer1_mvm0 0 8 axis -layer1_mvm1 0 1 axis -layer1_mvm2 0 10 axis -layer2_mvm0 0 0 axis -layer2_mvm1 0 6 axis -layer3_mvm0 0 14 axis -layer3_mvm1 0 11 axis -input_dispatcher0 0 15 axis -input_dispatcher1 0 12 axis -input_dispatcher2 0 5 axis -input_dispatcher3 0 13 axis -output_collector 0 4 axis +layer0_mvm0 0 2 axis +layer0_mvm1 0 15 axis +layer0_mvm2 0 9 axis +layer0_mvm3 0 1 axis +layer1_mvm0 0 7 axis +layer1_mvm1 0 10 axis +layer1_mvm2 0 8 axis +layer2_mvm0 0 6 axis +layer2_mvm1 0 5 axis +layer3_mvm0 0 11 axis +layer3_mvm1 0 0 axis +input_dispatcher0 0 4 axis +input_dispatcher1 0 13 axis +input_dispatcher2 0 3 axis +input_dispatcher3 0 14 axis +output_collector 0 12 axis portal_inst 0 16 axis diff --git a/rad-sim/example-designs/mlp/modules/dispatcher.cpp b/rad-sim/example-designs/mlp/modules/dispatcher.cpp index 1013c21..6f37642 100644 --- a/rad-sim/example-designs/mlp/modules/dispatcher.cpp +++ b/rad-sim/example-designs/mlp/modules/dispatcher.cpp @@ -36,7 +36,6 @@ dispatcher::dispatcher(const sc_module_name &name, unsigned int id, RADSimDesign dispatcher::~dispatcher() { delete data_fifo; } void dispatcher::Assign() { - sc_bv dest_id_concat; if (rst.read()) { tx_interface.tvalid.write(false); data_fifo_rdy.write(false); @@ -55,11 +54,10 @@ void dispatcher::Assign() { std::string dest_name = "layer0_mvm" + std::to_string(dispatcher_id) + ".rx_interface"; unsigned int dest_id = radsim_design->GetPortDestinationID(dest_name); + sc_bv dest_id_concat; DEST_REMOTE_NODE(dest_id_concat) = 0; //bc staying on same RAD DEST_LOCAL_NODE(dest_id_concat) = dest_id; - //std::cout << "dispatcher.cpp dest_id: " << dest_id << std::endl; DEST_RAD(dest_id_concat) = radsim_design->rad_id; - std::cout << "dispatcher.cpp dest_id_concat: " << dest_id_concat << std::endl; tx_interface.tdest.write(dest_id_concat); //radsim_design->GetPortDestinationID(dest_name)); // std::cout << "Dispatcher " << dispatcher_id << " pushed data into the // NoC with dest " diff --git a/rad-sim/example-designs/mlp/modules/mvm.cpp b/rad-sim/example-designs/mlp/modules/mvm.cpp index a90f1f5..c412915 100644 --- a/rad-sim/example-designs/mlp/modules/mvm.cpp +++ b/rad-sim/example-designs/mlp/modules/mvm.cpp @@ -496,7 +496,11 @@ void mvm::Assign() { tx_interface.tdata.write(tx_tdata_bv); tx_interface.tvalid.write(!ofifo_empty_signal); tx_interface.tuser.write(dest_interface); - tx_interface.tdest.write(dest_id); + sc_bv dest_id_concat; + DEST_REMOTE_NODE(dest_id_concat) = 0; //bc staying on same RAD + DEST_LOCAL_NODE(dest_id_concat) = dest_id; + DEST_RAD(dest_id_concat) = radsim_design->rad_id; + tx_interface.tdest.write(dest_id_concat); //dest_id); /*if (dest_interface == 2 << 13 && !ofifo_empty_signal) { std::cout << "Sending to reduce FIFO" << std::endl; std::cout << tx_tdata << std::endl; From ce1670b35e68839737c5771368ae9277ad41eeff Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 30 Jul 2024 19:48:45 -0400 Subject: [PATCH 084/127] TO-BE-TESTED: Ported mlp_int8 design to multi-rad code --- .../mlp/compiler/gen_testcase.py | 3 ++ rad-sim/example-designs/mlp/mlp.clks | 1 + rad-sim/example-designs/mlp/mlp.place | 28 ++++++++--------- .../example-designs/mlp_int8/CMakeLists.txt | 4 +-- .../mlp_int8/compiler/gen_testcase.py | 3 ++ rad-sim/example-designs/mlp_int8/config.yml | 20 +++++++----- rad-sim/example-designs/mlp_int8/mlp.clks | 1 + rad-sim/example-designs/mlp_int8/mlp.place | 31 ++++++++++--------- .../example-designs/mlp_int8/mlp_driver.cpp | 29 +++++++++-------- .../example-designs/mlp_int8/mlp_driver.hpp | 4 ++- .../mlp_int8/mlp_int8_system.cpp | 11 ++++--- .../mlp_int8/mlp_int8_system.hpp | 5 +-- rad-sim/example-designs/mlp_int8/mlp_top.cpp | 20 ++++++------ rad-sim/example-designs/mlp_int8/mlp_top.hpp | 6 ++-- .../mlp_int8/modules/collector.cpp | 5 +-- .../mlp_int8/modules/collector.hpp | 3 +- .../mlp_int8/modules/dispatcher.cpp | 6 ++-- .../mlp_int8/modules/dispatcher.hpp | 2 +- .../mlp_int8/modules/inst_loader.cpp | 7 +++-- .../mlp_int8/modules/inst_loader.hpp | 3 +- .../mlp_int8/modules/rtl_mvm.cpp | 3 +- .../mlp_int8/modules/rtl_mvm.hpp | 3 +- .../mlp_int8/modules/weight_loader.cpp | 7 +++-- .../mlp_int8/modules/weight_loader.hpp | 3 +- rad-sim/sim/main.cpp | 4 +-- rad-sim/sim/noc/noc0_rad0_config | 10 +++++- rad-sim/sim/radsim_defines.hpp | 6 ++-- rad-sim/sim/radsim_knobs | 8 ++--- rad-sim/uni_config.yml | 28 +++++++---------- 29 files changed, 151 insertions(+), 113 deletions(-) diff --git a/rad-sim/example-designs/mlp/compiler/gen_testcase.py b/rad-sim/example-designs/mlp/compiler/gen_testcase.py index e5c0ca5..86f6990 100644 --- a/rad-sim/example-designs/mlp/compiler/gen_testcase.py +++ b/rad-sim/example-designs/mlp/compiler/gen_testcase.py @@ -206,7 +206,10 @@ placement_file.write('output_collector 0 ' + str(router_ids[idx]) + ' axis\n') idx = idx + 1 clocks_file.write('output_collector 0 0\n') + placement_file.write('portal_inst 0 16 axis\n') +clocks_file.write('portal_inst 0 0\n') + placement_file.close() clocks_file.close() diff --git a/rad-sim/example-designs/mlp/mlp.clks b/rad-sim/example-designs/mlp/mlp.clks index 3860fb5..7ebfa4b 100644 --- a/rad-sim/example-designs/mlp/mlp.clks +++ b/rad-sim/example-designs/mlp/mlp.clks @@ -14,3 +14,4 @@ input_dispatcher1 0 0 input_dispatcher2 0 0 input_dispatcher3 0 0 output_collector 0 0 +portal_inst 0 0 diff --git a/rad-sim/example-designs/mlp/mlp.place b/rad-sim/example-designs/mlp/mlp.place index 41fbf1c..615e56e 100644 --- a/rad-sim/example-designs/mlp/mlp.place +++ b/rad-sim/example-designs/mlp/mlp.place @@ -1,17 +1,17 @@ -layer0_mvm0 0 2 axis -layer0_mvm1 0 15 axis -layer0_mvm2 0 9 axis -layer0_mvm3 0 1 axis -layer1_mvm0 0 7 axis -layer1_mvm1 0 10 axis -layer1_mvm2 0 8 axis +layer0_mvm0 0 3 axis +layer0_mvm1 0 9 axis +layer0_mvm2 0 0 axis +layer0_mvm3 0 12 axis +layer1_mvm0 0 14 axis +layer1_mvm1 0 8 axis +layer1_mvm2 0 5 axis layer2_mvm0 0 6 axis -layer2_mvm1 0 5 axis +layer2_mvm1 0 4 axis layer3_mvm0 0 11 axis -layer3_mvm1 0 0 axis -input_dispatcher0 0 4 axis -input_dispatcher1 0 13 axis -input_dispatcher2 0 3 axis -input_dispatcher3 0 14 axis -output_collector 0 12 axis +layer3_mvm1 0 7 axis +input_dispatcher0 0 2 axis +input_dispatcher1 0 1 axis +input_dispatcher2 0 10 axis +input_dispatcher3 0 13 axis +output_collector 0 15 axis portal_inst 0 16 axis diff --git a/rad-sim/example-designs/mlp_int8/CMakeLists.txt b/rad-sim/example-designs/mlp_int8/CMakeLists.txt index 99593ca..a517787 100644 --- a/rad-sim/example-designs/mlp_int8/CMakeLists.txt +++ b/rad-sim/example-designs/mlp_int8/CMakeLists.txt @@ -54,5 +54,5 @@ set(hdrfiles add_compile_options(-Wall -Wextra -pedantic) -add_library(design STATIC ${srcfiles} ${hdrfiles}) -target_link_libraries(design PUBLIC SystemC::systemc booksim noc rtl_designs) +add_library(mlp_int8 STATIC ${srcfiles} ${hdrfiles}) +target_link_libraries(mlp_int8 PUBLIC SystemC::systemc booksim noc rtl_designs) diff --git a/rad-sim/example-designs/mlp_int8/compiler/gen_testcase.py b/rad-sim/example-designs/mlp_int8/compiler/gen_testcase.py index 9281263..e0e38f9 100644 --- a/rad-sim/example-designs/mlp_int8/compiler/gen_testcase.py +++ b/rad-sim/example-designs/mlp_int8/compiler/gen_testcase.py @@ -76,6 +76,9 @@ idx = idx + 1 clocks_file.write('inst_loader 0 0\n') +placement_file.write('portal_inst 0 16 axis\n') +clocks_file.write('portal_inst 0 0\n') + placement_file.close() clocks_file.close() diff --git a/rad-sim/example-designs/mlp_int8/config.yml b/rad-sim/example-designs/mlp_int8/config.yml index 45551bd..801f02f 100644 --- a/rad-sim/example-designs/mlp_int8/config.yml +++ b/rad-sim/example-designs/mlp_int8/config.yml @@ -4,7 +4,7 @@ noc: clk_period: [1.0] payload_width: [166] topology: ['mesh'] - dim_x: [4] + dim_x: [5] dim_y: [4] routing_func: ['dim_order'] vcs: [5] @@ -27,11 +27,15 @@ noc_adapters: out_arbiter: ['priority_rr'] vc_mapping: ['direct'] -design: - name: 'mlp_int8' - noc_placement: ['mlp.place'] - clk_periods: [5.0] +config rad1: + design: + name: 'mlp_int8' + noc_placement: ['mlp.place'] + clk_periods: [5.0] -telemetry: - log_verbosity: 2 - traces: [] \ No newline at end of file +cluster: + sim_driver_period: 5.0 + telemetry_log_verbosity: 2 + telemetry_traces: [] + num_rads: 1 + cluster_configs: ['rad1'] \ No newline at end of file diff --git a/rad-sim/example-designs/mlp_int8/mlp.clks b/rad-sim/example-designs/mlp_int8/mlp.clks index 7acc1bf..87e8fcd 100644 --- a/rad-sim/example-designs/mlp_int8/mlp.clks +++ b/rad-sim/example-designs/mlp_int8/mlp.clks @@ -14,3 +14,4 @@ input_dispatcher2 0 0 output_collector 0 0 weight_loader 0 0 inst_loader 0 0 +portal_inst 0 0 diff --git a/rad-sim/example-designs/mlp_int8/mlp.place b/rad-sim/example-designs/mlp_int8/mlp.place index bcbf43b..613a244 100644 --- a/rad-sim/example-designs/mlp_int8/mlp.place +++ b/rad-sim/example-designs/mlp_int8/mlp.place @@ -1,16 +1,17 @@ -layer0_mvm0 0 3 axis -layer0_mvm1 0 1 axis -layer0_mvm2 0 0 axis -layer1_mvm0 0 2 axis -layer1_mvm1 0 5 axis -layer1_mvm2 0 6 axis -layer2_mvm0 0 9 axis -layer2_mvm1 0 11 axis -layer3_mvm0 0 14 axis -layer3_mvm1 0 10 axis -input_dispatcher0 0 13 axis -input_dispatcher1 0 4 axis -input_dispatcher2 0 12 axis -output_collector 0 7 axis -weight_loader 0 8 axis +layer0_mvm0 0 10 axis +layer0_mvm1 0 2 axis +layer0_mvm2 0 11 axis +layer1_mvm0 0 14 axis +layer1_mvm1 0 13 axis +layer1_mvm2 0 12 axis +layer2_mvm0 0 3 axis +layer2_mvm1 0 5 axis +layer3_mvm0 0 9 axis +layer3_mvm1 0 0 axis +input_dispatcher0 0 4 axis +input_dispatcher1 0 8 axis +input_dispatcher2 0 7 axis +output_collector 0 1 axis +weight_loader 0 6 axis inst_loader 0 15 axis +portal_inst 0 16 axis diff --git a/rad-sim/example-designs/mlp_int8/mlp_driver.cpp b/rad-sim/example-designs/mlp_int8/mlp_driver.cpp index 95130df..46080fe 100644 --- a/rad-sim/example-designs/mlp_int8/mlp_driver.cpp +++ b/rad-sim/example-designs/mlp_int8/mlp_driver.cpp @@ -3,9 +3,9 @@ bool ParseWeights(std::vector>& weights, std::vector& rf_ids, std::vector& rf_addrs, std::vector& layer_ids, std::vector& mvm_ids, - unsigned int num_layers, std::vector& num_mvms) { + unsigned int num_layers, std::vector& num_mvms, unsigned int _rad_id) { - std::string design_root_dir = radsim_config.GetStringKnob("radsim_user_design_root_dir"); + std::string design_root_dir = radsim_config.GetStringKnobShared("radsim_user_design_root_dir", _rad_id); for (unsigned int l = 0; l < num_layers; l++) { for (unsigned int m = 0; m < num_mvms[l]; m++) { for (unsigned int d = 0; d < DPES; d++) { @@ -43,8 +43,8 @@ bool ParseWeights(std::vector>& weights, bool ParseInstructions(std::vector &insts, std::vector& layer_ids, std::vector& mvm_ids, - unsigned int num_layers, std::vector& num_mvms) { - std::string design_root_dir = radsim_config.GetStringKnob("radsim_user_design_root_dir"); + unsigned int num_layers, std::vector& num_mvms, unsigned int _rad_id) { + std::string design_root_dir = radsim_config.GetStringKnob("radsim_user_design_root_dir", _rad_id); for (unsigned int l = 0; l < num_layers; l++) { for (unsigned int m = 0; m < num_mvms[l]; m++) { @@ -106,12 +106,13 @@ bool ParseIO(std::vector>& data_vec, std::string& io_filename) return true; } -mlp_driver::mlp_driver(const sc_module_name& name) : sc_module(name) { +mlp_driver::mlp_driver(const sc_module_name& name, RADSimDesignContext* radsim_design_) : sc_module(name) { + this->radsim_design = radsim_design_; start_cycle = 0; end_cycle = 0; // Parse design configuration (number of layers & number of MVM per layer) - std::string design_root_dir = radsim_config.GetStringKnob("radsim_user_design_root_dir"); + std::string design_root_dir = radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); std::string design_config_filename = design_root_dir + "/compiler/layer_mvm_config"; std::ifstream design_config_file(design_config_filename); if (!design_config_file) { @@ -144,11 +145,11 @@ mlp_driver::mlp_driver(const sc_module_name& name) : sc_module(name) { // Parse weights ParseWeights(weight_data, weight_rf_id, weight_rf_addr, weight_layer_id, - weight_mvm_id, num_layers, num_mvms_total); + weight_mvm_id, num_layers, num_mvms_total, radsim_design->rad_id); std::cout << "# Weight vectors = " << weight_data.size() << std::endl; // Parse instructions - ParseInstructions(inst_data, inst_layer_id, inst_mvm_id, num_layers, num_mvms_total); + ParseInstructions(inst_data, inst_layer_id, inst_mvm_id, num_layers, num_mvms_total, radsim_design->rad_id); std::cout << "# Instructions = " << inst_data.size() << std::endl; // Parse test inputs @@ -258,7 +259,7 @@ void mlp_driver::source() { wait(); } - start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); start_time = std::chrono::steady_clock::now(); wait(); @@ -309,12 +310,12 @@ void mlp_driver::sink() { } if (mistake) { std::cout << "FAILURE - Some outputs NOT matching!" << std::endl; - radsim_design.ReportDesignFailure(); + radsim_design->ReportDesignFailure(); } else { std::cout << "SUCCESS - All outputs are matching!" << std::endl; } - end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); end_time = std::chrono::steady_clock::now(); std::cout << "Simulation Cycles = " << end_cycle - start_cycle << std::endl; std::cout << "Simulation Time = " << std::chrono::duration_cast (end_time - start_time).count() << " ms" << std::endl; @@ -322,10 +323,12 @@ void mlp_driver::sink() { NoCFlitTelemetry::DumpNoCFlitTracesToFile("flit_traces.csv"); std::vector aggregate_bandwidths = NoCTransactionTelemetry::DumpTrafficFlows("traffic_flows", - end_cycle - start_cycle, radsim_design.GetNodeModuleNames()); + end_cycle - start_cycle, radsim_design.GetNodeModuleNames(), radsim_design->rad_id); std::cout << "Aggregate NoC BW = " << aggregate_bandwidths[0] / 1000000000 << " Gbps" << std::endl; - sc_stop(); + //sc_stop(); + this->radsim_design->set_rad_done(); //flag to replace sc_stop calls + return; } void mlp_driver::assign() { diff --git a/rad-sim/example-designs/mlp_int8/mlp_driver.hpp b/rad-sim/example-designs/mlp_int8/mlp_driver.hpp index fd5b4d0..6490224 100644 --- a/rad-sim/example-designs/mlp_int8/mlp_driver.hpp +++ b/rad-sim/example-designs/mlp_int8/mlp_driver.hpp @@ -72,7 +72,9 @@ class mlp_driver : public sc_module { sc_out collector_fifo_ren; sc_in>> collector_fifo_rdata; - mlp_driver(const sc_module_name& name); + RADSimDesignContext* radsim_design; + + mlp_driver(const sc_module_name& name, RADSimDesignContext* radsim_design_); ~mlp_driver(); void source(); diff --git a/rad-sim/example-designs/mlp_int8/mlp_int8_system.cpp b/rad-sim/example-designs/mlp_int8/mlp_int8_system.cpp index bfd5286..a3a6978 100644 --- a/rad-sim/example-designs/mlp_int8/mlp_int8_system.cpp +++ b/rad-sim/example-designs/mlp_int8/mlp_int8_system.cpp @@ -1,10 +1,10 @@ #include "mlp_int8_system.hpp" -mlp_int8_system::mlp_int8_system(const sc_module_name& name, sc_clock* driver_clk_sig) : +mlp_int8_system::mlp_int8_system(const sc_module_name& name, sc_clock* driver_clk_sig, RADSimDesignContext* radsim_design) : sc_module(name) { // Parse design configuration (number of layers and number of MVMs per layer) - std::string design_root_dir = radsim_config.GetStringKnob("radsim_user_design_root_dir"); + std::string design_root_dir = radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); std::string design_config_filename = design_root_dir + "/compiler/layer_mvm_config"; std::ifstream design_config_file(design_config_filename); if (!design_config_file) { @@ -37,7 +37,7 @@ mlp_int8_system::mlp_int8_system(const sc_module_name& name, sc_clock* driver_cl init_vector>>>::init_sc_vector(dispatcher_fifo_wdata_signal, num_mvms_total[0]); // Instantiate driver - mlp_driver_inst = new mlp_driver("mlp_driver"); + mlp_driver_inst = new mlp_driver("mlp_driver", radsim_design); mlp_driver_inst->clk(*driver_clk_sig); mlp_driver_inst->rst(rst_sig); mlp_driver_inst->weight_loader_weight_fifo_rdy(weight_loader_weight_fifo_rdy_signal); @@ -72,7 +72,7 @@ mlp_int8_system::mlp_int8_system(const sc_module_name& name, sc_clock* driver_cl mlp_driver_inst->collector_fifo_rdata(collector_fifo_rdata_signal); // Instantiate design top-level - mlp_inst = new mlp_top("mlp_top"); + mlp_inst = new mlp_top("mlp_top", radsim_design); mlp_inst->rst(rst_sig); mlp_inst->weight_loader_weight_fifo_rdy(weight_loader_weight_fifo_rdy_signal); mlp_inst->weight_loader_weight_fifo_wen(weight_loader_weight_fifo_wen_signal); @@ -104,6 +104,9 @@ mlp_int8_system::mlp_int8_system(const sc_module_name& name, sc_clock* driver_cl mlp_inst->collector_fifo_rdy(collector_fifo_rdy_signal); mlp_inst->collector_fifo_ren(collector_fifo_ren_signal); mlp_inst->collector_fifo_rdata(collector_fifo_rdata_signal); + + //add _top as dut instance for parent class design_system + this->design_dut_inst = mlp_inst; } mlp_int8_system::~mlp_int8_system() { diff --git a/rad-sim/example-designs/mlp_int8/mlp_int8_system.hpp b/rad-sim/example-designs/mlp_int8/mlp_int8_system.hpp index 5e020a9..f4dc4e2 100644 --- a/rad-sim/example-designs/mlp_int8/mlp_int8_system.hpp +++ b/rad-sim/example-designs/mlp_int8/mlp_int8_system.hpp @@ -5,8 +5,9 @@ #include #include #include +#include -class mlp_int8_system : public sc_module { +class mlp_int8_system : public design_system { private: std::vector num_mvms_sysc; std::vector num_mvms_rtl; @@ -51,6 +52,6 @@ class mlp_int8_system : public sc_module { mlp_driver* mlp_driver_inst; mlp_top* mlp_inst; - mlp_int8_system(const sc_module_name& name, sc_clock* driver_clk_sig); + mlp_int8_system(const sc_module_name& name, sc_clock* driver_clk_sig, RADSimDesignContext* radsim_design); ~mlp_int8_system(); }; \ No newline at end of file diff --git a/rad-sim/example-designs/mlp_int8/mlp_top.cpp b/rad-sim/example-designs/mlp_int8/mlp_top.cpp index 8b3bd16..bfb8eeb 100644 --- a/rad-sim/example-designs/mlp_int8/mlp_top.cpp +++ b/rad-sim/example-designs/mlp_int8/mlp_top.cpp @@ -1,9 +1,10 @@ #include -mlp_top::mlp_top(const sc_module_name &name) : sc_module(name) { +mlp_top::mlp_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : design_top(radsim_design) { + this->radsim_design = radsim_design; std::string design_root_dir = - radsim_config.GetStringKnob("radsim_user_design_root_dir"); + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); std::string design_config_filename = design_root_dir + "/compiler/layer_mvm_config"; @@ -66,7 +67,7 @@ mlp_top::mlp_top(const sc_module_name &name) : sc_module(name) { for (unsigned int mvm_id = 0; mvm_id < num_mvms_total[0]; mvm_id++) { module_name_str = "input_dispatcher" + std::to_string(mvm_id); std::strcpy(module_name, module_name_str.c_str()); - input_dispatchers[mvm_id] = new dispatcher(module_name, mvm_id); + input_dispatchers[mvm_id] = new dispatcher(module_name, mvm_id, radsim_design); input_dispatchers[mvm_id]->rst(rst); input_dispatchers[mvm_id]->data_fifo_rdy(dispatcher_fifo_rdy[mvm_id]); input_dispatchers[mvm_id]->data_fifo_wen(dispatcher_fifo_wen[mvm_id]); @@ -76,7 +77,7 @@ mlp_top::mlp_top(const sc_module_name &name) : sc_module(name) { module_name_str = "output_collector"; std::strcpy(module_name, module_name_str.c_str()); - output_collector = new collector(module_name); + output_collector = new collector(module_name, radsim_design); output_collector->rst(rst); output_collector->data_fifo_rdy(collector_fifo_rdy); output_collector->data_fifo_ren(collector_fifo_ren); @@ -84,7 +85,7 @@ mlp_top::mlp_top(const sc_module_name &name) : sc_module(name) { module_name_str = "weight_loader"; std::strcpy(module_name, module_name_str.c_str()); - wloader = new weight_loader(module_name); + wloader = new weight_loader(module_name, radsim_design); wloader->rst(rst); wloader->weight_fifo_rdy(weight_loader_weight_fifo_rdy); wloader->weight_fifo_wen(weight_loader_weight_fifo_wen); @@ -104,7 +105,7 @@ mlp_top::mlp_top(const sc_module_name &name) : sc_module(name) { module_name_str = "inst_loader"; std::strcpy(module_name, module_name_str.c_str()); - iloader = new inst_loader(module_name); + iloader = new inst_loader(module_name, radsim_design); iloader->rst(rst); iloader->inst_fifo_rdy(inst_loader_inst_fifo_rdy); iloader->inst_fifo_wen(inst_loader_inst_fifo_wen); @@ -116,9 +117,10 @@ mlp_top::mlp_top(const sc_module_name &name) : sc_module(name) { iloader->mvm_id_fifo_wen(inst_loader_mvm_id_fifo_wen); iloader->mvm_id_fifo_wdata(inst_loader_mvm_id_fifo_wdata); - radsim_design.BuildDesignContext("mlp.place", "mlp.clks"); - radsim_design.CreateSystemNoCs(rst); - radsim_design.ConnectModulesToNoC(); + this->portal_inst->rst(rst); + radsim_design->BuildDesignContext("mlp.place", "mlp.clks"); + radsim_design->CreateSystemNoCs(rst); + radsim_design->ConnectModulesToNoC(); } mlp_top::~mlp_top() { diff --git a/rad-sim/example-designs/mlp_int8/mlp_top.hpp b/rad-sim/example-designs/mlp_int8/mlp_top.hpp index 00704d5..3147ed1 100644 --- a/rad-sim/example-designs/mlp_int8/mlp_top.hpp +++ b/rad-sim/example-designs/mlp_int8/mlp_top.hpp @@ -11,9 +11,10 @@ #include #include #include +#include -class mlp_top : public sc_module { +class mlp_top : public design_top { private: std::vector> rtl_matrix_vector_engines; std::vector> sysc_matrix_vector_engines; @@ -24,6 +25,7 @@ class mlp_top : public sc_module { collector* output_collector; weight_loader* wloader; inst_loader* iloader; + RADSimDesignContext* radsim_design; public: sc_in rst; @@ -62,7 +64,7 @@ class mlp_top : public sc_module { sc_in collector_fifo_ren; sc_out>> collector_fifo_rdata; - mlp_top(const sc_module_name& name); + mlp_top(const sc_module_name& name, RADSimDesignContext* radsim_design); ~mlp_top(); void prepare_adapters_info(); }; \ No newline at end of file diff --git a/rad-sim/example-designs/mlp_int8/modules/collector.cpp b/rad-sim/example-designs/mlp_int8/modules/collector.cpp index 266017d..c74f8ef 100644 --- a/rad-sim/example-designs/mlp_int8/modules/collector.cpp +++ b/rad-sim/example-designs/mlp_int8/modules/collector.cpp @@ -1,9 +1,10 @@ #include "collector.hpp" -collector::collector(const sc_module_name &name) - : RADSimModule(name), rst("rst"), data_fifo_rdy("data_fifo_rdy"), +collector::collector(const sc_module_name &name, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), rst("rst"), data_fifo_rdy("data_fifo_rdy"), data_fifo_ren("data_fifo_ren"), data_fifo_rdata("data_fifo_rdata") { + this->radsim_design = radsim_design; module_name = name; char fifo_name[25]; diff --git a/rad-sim/example-designs/mlp_int8/modules/collector.hpp b/rad-sim/example-designs/mlp_int8/modules/collector.hpp index 91c402b..d83308b 100644 --- a/rad-sim/example-designs/mlp_int8/modules/collector.hpp +++ b/rad-sim/example-designs/mlp_int8/modules/collector.hpp @@ -19,13 +19,14 @@ class collector : public RADSimModule { data_fifo_almost_full_signal; public: + RADSimDesignContext* radsim_design; sc_in rst; sc_out data_fifo_rdy; sc_in data_fifo_ren; sc_out>> data_fifo_rdata; axis_slave_port rx_interface; - collector(const sc_module_name& name); + collector(const sc_module_name& name, RADSimDesignContext* radsim_design); ~collector(); void Assign(); diff --git a/rad-sim/example-designs/mlp_int8/modules/dispatcher.cpp b/rad-sim/example-designs/mlp_int8/modules/dispatcher.cpp index 90382a7..961c0ea 100644 --- a/rad-sim/example-designs/mlp_int8/modules/dispatcher.cpp +++ b/rad-sim/example-designs/mlp_int8/modules/dispatcher.cpp @@ -1,7 +1,7 @@ #include "dispatcher.hpp" -dispatcher::dispatcher(const sc_module_name &name, unsigned int id) - : RADSimModule(name), rst("rst"), data_fifo_rdy("data_fifo_rdy"), +dispatcher::dispatcher(const sc_module_name &name, unsigned int id, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), rst("rst"), data_fifo_rdy("data_fifo_rdy"), data_fifo_wen("data_fifo_wen"), data_fifo_wdata("data_fifo_wdata") { module_name = name; @@ -50,7 +50,7 @@ void dispatcher::Assign() { tx_interface.tuser.write(2 << 9); tx_interface.tid.write(0); std::string dest_name = "layer0_mvm" + std::to_string(dispatcher_id) + ".axis_rx"; - tx_interface.tdest.write(radsim_design.GetPortDestinationID(dest_name)); + tx_interface.tdest.write(radsim_design->GetPortDestinationID(dest_name)); } else { tx_interface.tvalid.write(false); } diff --git a/rad-sim/example-designs/mlp_int8/modules/dispatcher.hpp b/rad-sim/example-designs/mlp_int8/modules/dispatcher.hpp index a706a9e..8a87c22 100644 --- a/rad-sim/example-designs/mlp_int8/modules/dispatcher.hpp +++ b/rad-sim/example-designs/mlp_int8/modules/dispatcher.hpp @@ -28,7 +28,7 @@ class dispatcher : public RADSimModule { sc_in>> data_fifo_wdata; axis_master_port tx_interface; - dispatcher(const sc_module_name& name, unsigned int id); + dispatcher(const sc_module_name& name, unsigned int id, RADSimDesignContext* radsim_design); ~dispatcher(); void Assign(); diff --git a/rad-sim/example-designs/mlp_int8/modules/inst_loader.cpp b/rad-sim/example-designs/mlp_int8/modules/inst_loader.cpp index 91a88e4..2643641 100644 --- a/rad-sim/example-designs/mlp_int8/modules/inst_loader.cpp +++ b/rad-sim/example-designs/mlp_int8/modules/inst_loader.cpp @@ -1,7 +1,7 @@ #include "inst_loader.hpp" -inst_loader::inst_loader(const sc_module_name &name) - : RADSimModule(name), +inst_loader::inst_loader(const sc_module_name &name, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), rst("rst"), inst_fifo_rdy("inst_fifo_rdy"), inst_fifo_wen("inst_fifo_wen"), @@ -13,6 +13,7 @@ inst_loader::inst_loader(const sc_module_name &name) mvm_id_fifo_wen("mvm_id_fifo_wen"), mvm_id_fifo_wdata("mvm_id_fifo_wdata") { + this->radsim_design = radsim_design; module_name = name; char fifo_name[25]; @@ -89,7 +90,7 @@ void inst_loader::Assign() { std::string dest_name = "layer" + std::to_string(layer_id_fifo_odata.read()) + "_mvm" + std::to_string(mvm_id_fifo_odata.read()) + ".axis_rx"; - tx_interface.tdest.write(radsim_design.GetPortDestinationID(dest_name)); + tx_interface.tdest.write(radsim_design->GetPortDestinationID(dest_name)); } tx_interface.tvalid.write(!inst_fifo_empty.read()); diff --git a/rad-sim/example-designs/mlp_int8/modules/inst_loader.hpp b/rad-sim/example-designs/mlp_int8/modules/inst_loader.hpp index 9bee446..8b0efd8 100644 --- a/rad-sim/example-designs/mlp_int8/modules/inst_loader.hpp +++ b/rad-sim/example-designs/mlp_int8/modules/inst_loader.hpp @@ -29,6 +29,7 @@ class inst_loader : public RADSimModule { sc_signal mvm_id_fifo_pop, mvm_id_fifo_full, mvm_id_fifo_empty, mvm_id_fifo_almost_full; public: + RADSimDesignContext* radsim_design; sc_in rst; sc_out inst_fifo_rdy; sc_in inst_fifo_wen; @@ -41,7 +42,7 @@ class inst_loader : public RADSimModule { sc_in mvm_id_fifo_wdata; axis_master_port tx_interface; - inst_loader(const sc_module_name& name); + inst_loader(const sc_module_name& name, RADSimDesignContext* radsim_design); ~inst_loader(); void Assign(); diff --git a/rad-sim/example-designs/mlp_int8/modules/rtl_mvm.cpp b/rad-sim/example-designs/mlp_int8/modules/rtl_mvm.cpp index 424c012..1e8e792 100644 --- a/rad-sim/example-designs/mlp_int8/modules/rtl_mvm.cpp +++ b/rad-sim/example-designs/mlp_int8/modules/rtl_mvm.cpp @@ -1,6 +1,7 @@ #include -rtl_mvm::rtl_mvm(const sc_module_name &name) : RADSimModule(name) { +rtl_mvm::rtl_mvm(const sc_module_name &name, RADSimDesignContext* radsim_design) : RADSimModule(name, radsim_design) { + this->radsim_design = radsim_design; char vrtl_mvm_name[25]; std::string vrtl_mvm_name_str = std::string(name); std::strcpy(vrtl_mvm_name, vrtl_mvm_name_str.c_str()); diff --git a/rad-sim/example-designs/mlp_int8/modules/rtl_mvm.hpp b/rad-sim/example-designs/mlp_int8/modules/rtl_mvm.hpp index 4fc26d8..bc4420a 100644 --- a/rad-sim/example-designs/mlp_int8/modules/rtl_mvm.hpp +++ b/rad-sim/example-designs/mlp_int8/modules/rtl_mvm.hpp @@ -14,12 +14,13 @@ class rtl_mvm : public RADSimModule { Vrtl_mvm* vrtl_mvm; public: + RADSimDesignContext* radsim_design; sc_in rst; axis_slave_port axis_rx; axis_master_port axis_tx; - rtl_mvm(const sc_module_name &name); + rtl_mvm(const sc_module_name &name, RADSimDesignContext* radsim_design); ~rtl_mvm(); SC_HAS_PROCESS(rtl_mvm); diff --git a/rad-sim/example-designs/mlp_int8/modules/weight_loader.cpp b/rad-sim/example-designs/mlp_int8/modules/weight_loader.cpp index 831aaaa..fa0fa15 100644 --- a/rad-sim/example-designs/mlp_int8/modules/weight_loader.cpp +++ b/rad-sim/example-designs/mlp_int8/modules/weight_loader.cpp @@ -1,7 +1,7 @@ #include "weight_loader.hpp" -weight_loader::weight_loader(const sc_module_name &name) - : RADSimModule(name), +weight_loader::weight_loader(const sc_module_name &name, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), rst("rst"), weight_fifo_rdy("weight_fifo_rdy"), weight_fifo_wen("weight_fifo_wen"), @@ -19,6 +19,7 @@ weight_loader::weight_loader(const sc_module_name &name) mvm_id_fifo_wen("mvm_id_fifo_wen"), mvm_id_fifo_wdata("mvm_id_fifo_wdata") { + this->radsim_design = radsim_design; module_name = name; char fifo_name[25]; @@ -136,7 +137,7 @@ void weight_loader::Assign() { std::string dest_name = "layer" + std::to_string(layer_id_fifo_odata.read()) + "_mvm" + std::to_string(mvm_id_fifo_odata.read()) + ".axis_rx"; - tx_interface.tdest.write(radsim_design.GetPortDestinationID(dest_name)); + tx_interface.tdest.write(radsim_design->GetPortDestinationID(dest_name)); } else { tx_interface.tvalid.write(false); } diff --git a/rad-sim/example-designs/mlp_int8/modules/weight_loader.hpp b/rad-sim/example-designs/mlp_int8/modules/weight_loader.hpp index 1aae3fd..b645251 100644 --- a/rad-sim/example-designs/mlp_int8/modules/weight_loader.hpp +++ b/rad-sim/example-designs/mlp_int8/modules/weight_loader.hpp @@ -36,6 +36,7 @@ class weight_loader : public RADSimModule { sc_signal mvm_id_fifo_pop, mvm_id_fifo_full, mvm_id_fifo_empty, mvm_id_fifo_almost_full; public: + RADSimDesignContext* radsim_design; sc_in rst; sc_out weight_fifo_rdy; sc_in weight_fifo_wen; @@ -54,7 +55,7 @@ class weight_loader : public RADSimModule { sc_in mvm_id_fifo_wdata; axis_master_port tx_interface; - weight_loader(const sc_module_name& name); + weight_loader(const sc_module_name& name, RADSimDesignContext* radsim_design); ~weight_loader(); void Assign(); diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 96e2ad1..14d3ccc 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -7,7 +7,7 @@ #include #include -#include +#include RADSimConfig radsim_config; std::ostream *gWatchOut; @@ -31,7 +31,7 @@ int sc_main(int argc, char *argv[]) { sc_clock *driver_clk_sig0 = new sc_clock( "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); - mlp_system *system0 = new mlp_system("mlp_system", driver_clk_sig0, cluster->all_rads[0]); + mlp_int8_system *system0 = new mlp_int8_system("mlp_int8_system", driver_clk_sig0, cluster->all_rads[0]); cluster->StoreSystem(system0); sc_clock *inter_rad_clk_sig = new sc_clock( diff --git a/rad-sim/sim/noc/noc0_rad0_config b/rad-sim/sim/noc/noc0_rad0_config index 5614bd1..f24533c 100644 --- a/rad-sim/sim/noc/noc0_rad0_config +++ b/rad-sim/sim/noc/noc0_rad0_config @@ -7,11 +7,19 @@ n = 2; routing_function = dim_order; // Flow control -num_vcs = 1; +num_vcs = 5; vc_buf_size = 8; output_buffer_size = 8; read_request_begin_vc = 0; read_request_end_vc = 0; +write_request_begin_vc = 1; +write_request_end_vc = 1; +write_data_begin_vc = 2; +write_data_end_vc = 2; +read_reply_begin_vc = 3; +read_reply_end_vc = 3; +write_reply_begin_vc = 4; +write_reply_end_vc = 4; // Router architecture & delays router = iq; diff --git a/rad-sim/sim/radsim_defines.hpp b/rad-sim/sim/radsim_defines.hpp index 9f4b671..94c69d1 100644 --- a/rad-sim/sim/radsim_defines.hpp +++ b/rad-sim/sim/radsim_defines.hpp @@ -4,10 +4,10 @@ #define RADSIM_ROOT_DIR "/home/bassiabn/rad-sim/rad-flow/rad-sim" // NoC-related Parameters -#define NOC_LINKS_PAYLOAD_WIDTH 145 -#define NOC_LINKS_VCID_WIDTH 1 +#define NOC_LINKS_PAYLOAD_WIDTH 166 +#define NOC_LINKS_VCID_WIDTH 3 #define NOC_LINKS_PACKETID_WIDTH 32 -#define NOC_LINKS_TYPEID_WIDTH 1 +#define NOC_LINKS_TYPEID_WIDTH 3 #define NOC_LINKS_DEST_WIDTH 15 #define NOC_LINKS_DEST_INTERFACE_WIDTH 5 #define NOC_LINKS_WIDTH (NOC_LINKS_PAYLOAD_WIDTH + NOC_LINKS_VCID_WIDTH + NOC_LINKS_PACKETID_WIDTH + NOC_LINKS_DEST_WIDTH + NOC_LINKS_DEST_INTERFACE_WIDTH) diff --git a/rad-sim/sim/radsim_knobs b/rad-sim/sim/radsim_knobs index df9dd53..bd1360a 100644 --- a/rad-sim/sim/radsim_knobs +++ b/rad-sim/sim/radsim_knobs @@ -1,8 +1,8 @@ -design_name 0 mlp +design_name 0 mlp_int8 noc_num_nocs 0 1 noc_clk_period 0 1.0 -noc_vcs 0 1 -noc_payload_width 0 145 +noc_vcs 0 5 +noc_payload_width 0 166 noc_num_nodes 0 25 design_noc_placement 0 mlp.place noc_adapters_clk_period 0 1.25 @@ -16,7 +16,7 @@ dram_num_controllers 0 0 dram_clk_periods 0 2.0 dram_queue_sizes 0 64 dram_config_files 0 HBM2_8Gb_x128 -radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/mlp +radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/mlp_int8 radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim sim_driver_period 5.0 telemetry_log_verbosity 2 diff --git a/rad-sim/uni_config.yml b/rad-sim/uni_config.yml index 0f56ee1..801f02f 100644 --- a/rad-sim/uni_config.yml +++ b/rad-sim/uni_config.yml @@ -2,15 +2,15 @@ noc: type: ['2d'] num_nocs: 1 clk_period: [1.0] - payload_width: [145] + payload_width: [166] topology: ['mesh'] dim_x: [5] dim_y: [4] routing_func: ['dim_order'] - vcs: [1] + vcs: [5] vc_buffer_size: [8] output_buffer_size: [8] - num_packet_types: [1] + num_packet_types: [5] router_uarch: ['iq'] vc_allocator: ['islip'] sw_allocator: ['islip'] @@ -28,18 +28,14 @@ noc_adapters: vc_mapping: ['direct'] config rad1: - design: - name: 'mlp' - noc_placement: ['mlp.place'] - clk_periods: [5.0] + design: + name: 'mlp_int8' + noc_placement: ['mlp.place'] + clk_periods: [5.0] cluster: - sim_driver_period: 5.0 - telemetry_log_verbosity: 2 - telemetry_traces: [] - num_rads: 1 - cluster_configs: ['rad1'] - -interfaces: - max_axis_tdata_width: 512 - axis_tuser_width: 75 + sim_driver_period: 5.0 + telemetry_log_verbosity: 2 + telemetry_traces: [] + num_rads: 1 + cluster_configs: ['rad1'] \ No newline at end of file From f0eb1d1fefcb3986bda0aeb60104bdf2020e363e Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 30 Jul 2024 20:28:33 -0400 Subject: [PATCH 085/127] TO-BE-TESTED: ported npu design to multi-rad code, fixed mlp_int8 dispatcher --- .../mlp_int8/modules/dispatcher.cpp | 2 + .../mlp_int8/modules/dispatcher.hpp | 1 + rad-sim/example-designs/npu/CMakeLists.txt | 4 +- .../npu/compiler/add_mlp5_1536.py | 44 ------------------- rad-sim/example-designs/npu/config.yml | 18 +++++--- .../npu/modules/axis_fifo_adapters.cpp | 15 ++++--- .../npu/modules/axis_fifo_adapters.hpp | 8 +++- .../npu/modules/axis_inst_dispatch.cpp | 4 +- .../npu/modules/axis_inst_dispatch.hpp | 2 +- .../npu/modules/axis_mvu_sector.cpp | 6 +-- .../npu/modules/axis_mvu_sector.hpp | 2 +- .../npu/modules/axis_mvu_sector_chain.cpp | 6 +-- .../npu/modules/axis_mvu_sector_chain.hpp | 2 +- .../npu/modules/axis_vector_elementwise.cpp | 14 +++--- .../npu/modules/axis_vector_elementwise.hpp | 2 +- rad-sim/example-designs/npu/npu.clks | 3 +- rad-sim/example-designs/npu/npu.place | 3 +- rad-sim/example-designs/npu/npu_driver.cpp | 12 +++-- rad-sim/example-designs/npu/npu_driver.hpp | 3 +- rad-sim/example-designs/npu/npu_system.cpp | 9 ++-- rad-sim/example-designs/npu/npu_system.hpp | 5 ++- rad-sim/example-designs/npu/npu_top.cpp | 17 +++---- rad-sim/example-designs/npu/npu_top.hpp | 5 ++- rad-sim/sim/main.cpp | 4 +- rad-sim/sim/noc/noc0_rad0_config | 2 +- rad-sim/sim/radsim_defines.hpp | 6 +-- rad-sim/sim/radsim_knobs | 10 ++--- rad-sim/uni_config.yml | 10 ++--- 28 files changed, 101 insertions(+), 118 deletions(-) delete mode 100644 rad-sim/example-designs/npu/compiler/add_mlp5_1536.py diff --git a/rad-sim/example-designs/mlp_int8/modules/dispatcher.cpp b/rad-sim/example-designs/mlp_int8/modules/dispatcher.cpp index 961c0ea..f685c93 100644 --- a/rad-sim/example-designs/mlp_int8/modules/dispatcher.cpp +++ b/rad-sim/example-designs/mlp_int8/modules/dispatcher.cpp @@ -4,6 +4,8 @@ dispatcher::dispatcher(const sc_module_name &name, unsigned int id, RADSimDesign : RADSimModule(name, radsim_design), rst("rst"), data_fifo_rdy("data_fifo_rdy"), data_fifo_wen("data_fifo_wen"), data_fifo_wdata("data_fifo_wdata") { + this->radsim_design = radsim_design; + module_name = name; dispatcher_id = id; diff --git a/rad-sim/example-designs/mlp_int8/modules/dispatcher.hpp b/rad-sim/example-designs/mlp_int8/modules/dispatcher.hpp index 8a87c22..dcc1511 100644 --- a/rad-sim/example-designs/mlp_int8/modules/dispatcher.hpp +++ b/rad-sim/example-designs/mlp_int8/modules/dispatcher.hpp @@ -22,6 +22,7 @@ class dispatcher : public RADSimModule { data_fifo_almost_full_signal; public: + RADSimDesignContext* radsim_design; sc_in rst; sc_out data_fifo_rdy; sc_in data_fifo_wen; diff --git a/rad-sim/example-designs/npu/CMakeLists.txt b/rad-sim/example-designs/npu/CMakeLists.txt index 62102b6..16f65e3 100644 --- a/rad-sim/example-designs/npu/CMakeLists.txt +++ b/rad-sim/example-designs/npu/CMakeLists.txt @@ -65,5 +65,5 @@ set(hdrfiles add_compile_options(-Wall -Wextra -pedantic) -add_library(design STATIC ${srcfiles} ${hdrfiles}) -target_link_libraries(design PUBLIC SystemC::systemc booksim noc) +add_library(npu STATIC ${srcfiles} ${hdrfiles}) +target_link_libraries(npu PUBLIC SystemC::systemc booksim noc) diff --git a/rad-sim/example-designs/npu/compiler/add_mlp5_1536.py b/rad-sim/example-designs/npu/compiler/add_mlp5_1536.py deleted file mode 100644 index c443d44..0000000 --- a/rad-sim/example-designs/npu/compiler/add_mlp5_1536.py +++ /dev/null @@ -1,44 +0,0 @@ -import os -os.environ["CUDA_VISIBLE_DEVICES"] = "-1" -os.environ['TF_CPP_MIN_LOG_LEVEL'] = "2" -import tensorflow as tf -from tensorflow import keras -from tensorflow.keras import layers -#import sys -#sys.path.append('../compiler/') - -from compiler import * -from npu_layers import * - -###### START OF MODEL DEFINITION ###### - -# Define constants -INPUT_SIZE = 1536 -DENSE_SIZE = 1536 - -# Define model architecture using Keras Sequential Model -model = NPUSequential([ - layers.Dense(DENSE_SIZE, name="layer1"), - layers.Dense(DENSE_SIZE, name="layer2"), - layers.Dense(DENSE_SIZE, name="layer3"), - layers.Dense(DENSE_SIZE, name="layer4"), - layers.Dense(DENSE_SIZE, name="layer5"), -]) - -# Random test inputs for different types of layers -test_input = tf.random.uniform(shape=[6, INPUT_SIZE], minval=-128, maxval=127) - -# Call model on example input -y = model(test_input) - -# Print model summary -model.summary() - -####### END OF MODEL DEFINITION ####### - -# Initialize NPU -npu = initialize_npu(sys.argv) -# Compile model for NPU -model.compile_for_npu(npu, test_input) -# Run NPU flow -npu.run_flow() diff --git a/rad-sim/example-designs/npu/config.yml b/rad-sim/example-designs/npu/config.yml index 6cc4c28..33d4bb8 100644 --- a/rad-sim/example-designs/npu/config.yml +++ b/rad-sim/example-designs/npu/config.yml @@ -27,11 +27,15 @@ noc_adapters: out_arbiter: ['priority_rr'] vc_mapping: ['direct'] -design: - name: 'npu' - noc_placement: ['npu.place'] - clk_periods: [5.0, 2.5] +config rad1: + design: + name: 'npu' + noc_placement: ['npu.place'] + clk_periods: [5.0, 2.5] -telemetry: - log_verbosity: 2 - traces: [] \ No newline at end of file +cluster: + sim_driver_period: 5.0 + telemetry_log_verbosity: 2 + telemetry_traces: [] + num_rads: 1 + cluster_configs: ['rad1'] \ No newline at end of file diff --git a/rad-sim/example-designs/npu/modules/axis_fifo_adapters.cpp b/rad-sim/example-designs/npu/modules/axis_fifo_adapters.cpp index 310f67d..89f40bf 100644 --- a/rad-sim/example-designs/npu/modules/axis_fifo_adapters.cpp +++ b/rad-sim/example-designs/npu/modules/axis_fifo_adapters.cpp @@ -4,9 +4,10 @@ template axis_master_fifo_adapter::axis_master_fifo_adapter( const sc_module_name& _name, unsigned int _interface_type, unsigned int _interface_dataw, unsigned int _num_fifo, - unsigned int _element_bitwidth, std::string& _destination_port) + unsigned int _element_bitwidth, std::string& _destination_port, RADSimDesignContext* radsim_design) : sc_module(_name), fifo_rdy("fifo_rdy"), fifo_ren("fifo_ren"), fifo_rdata("fifo_rdata") { // Initialize member variables + this->radsim_design = radsim_design; interface_type = _interface_type; if (_interface_dataw > AXIS_MAX_DATAW) sim_log.log(error, "AXI-S datawidth exceeds maximum value!", this->name()); @@ -139,7 +140,7 @@ void axis_master_fifo_adapter::insert_payload_into_buffer() TUSER_FLAG(buffer_wdata) = payload_bitvector.get_bit(flag_idx); TUSER_ADDR(buffer_wdata) = payload_bitvector.range(addr_start_idx + VRF_ADDRW - 1, addr_start_idx); TUSER_VRFID(buffer_wdata) = payload_bitvector.range(vrf_id_start_idx + VRF_WB_SELW - 1, vrf_id_start_idx); - TDEST(buffer_wdata) = radsim_design.GetPortDestinationID(destination_port); + TDEST(buffer_wdata) = this->radsim_design->GetPortDestinationID(destination_port); } else if (interface_type == VEW_WRITEBACK_INTERFACE) { TUSER_FLAG(buffer_wdata) = payload_bitvector.get_bit(flag_idx); TUSER_ADDR(buffer_wdata) = payload_bitvector.range(addr_start_idx + VRF_ADDRW - 1, addr_start_idx); @@ -148,13 +149,13 @@ void axis_master_fifo_adapter::insert_payload_into_buffer() } else { TUSER_FLAG(buffer_wdata) = 0; TUSER_ADDR(buffer_wdata) = 0; - TDEST(buffer_wdata) = radsim_design.GetPortDestinationID(destination_port); + TDEST(buffer_wdata) = this->radsim_design->GetPortDestinationID(destination_port); } - TID(buffer_wdata) = radsim_design.GetPortInterfaceID(destination_port); + TID(buffer_wdata) = this->radsim_design->GetPortInterfaceID(destination_port); TLAST(buffer_wdata) = (transfer_id == transfers_per_axis_packet - 1); buffer.push(buffer_wdata); assert(buffer.size() <= buffer_capacity); - //std::cout << "Destination Port " << destination_port << " is at node " << radsim_design.GetPortDestinationID(destination_port) << " interface " << radsim_design.GetPortInterfaceID(destination_port) << std::endl; + //std::cout << "Destination Port " << destination_port << " is at node " << this->radsim_design->GetPortDestinationID(destination_port) << " interface " << this->radsim_design->GetPortInterfaceID(destination_port) << std::endl; } } @@ -258,9 +259,11 @@ axis_slave_fifo_adapter::axis_slave_fifo_adapter(const sc_mo unsigned int _interface_dataw, unsigned int _num_fifo, unsigned int _element_bitwidth, - unsigned int _num_element) + unsigned int _num_element, + RADSimDesignContext* radsim_design) : sc_module(_name), fifo_rdy("fifo_rdy"), fifo_ren("fifo_ren"), fifo_rdata("fifo_rdata") { // Initialize member variables + this->radsim_design = radsim_design; interface_type = _interface_type; if (_interface_dataw > AXIS_MAX_DATAW) sim_log.log(error, "AXI-S datawidth exceeds maximum value!", this->name()); diff --git a/rad-sim/example-designs/npu/modules/axis_fifo_adapters.hpp b/rad-sim/example-designs/npu/modules/axis_fifo_adapters.hpp index dca5b2e..43a9206 100644 --- a/rad-sim/example-designs/npu/modules/axis_fifo_adapters.hpp +++ b/rad-sim/example-designs/npu/modules/axis_fifo_adapters.hpp @@ -31,6 +31,7 @@ class axis_master_fifo_adapter : public sc_module { sc_signal buffer_occupancy; // Current occupancy of adapter buffer public: + RADSimDesignContext* radsim_design; sc_in clk; sc_in rst; sc_vector> fifo_rdy; @@ -39,7 +40,8 @@ class axis_master_fifo_adapter : public sc_module { axis_master_port axis_port; axis_master_fifo_adapter(const sc_module_name& _name, unsigned int _interface_type, unsigned int _interface_dataw, - unsigned int _num_fifo, unsigned int _element_bitwidth, std::string& _destination_port); + unsigned int _num_fifo, unsigned int _element_bitwidth, std::string& _destination_port, + RADSimDesignContext* radsim_design); ~axis_master_fifo_adapter(); bool buffer_full(); // Checks if adapter buffer is full @@ -73,6 +75,7 @@ class axis_slave_fifo_adapter : public sc_module { sc_signal transfer_count; // Count of received-so-far transfers (for a specific payload) public: + RADSimDesignContext* radsim_design; sc_in clk; sc_in rst; sc_vector> fifo_rdy; @@ -81,7 +84,8 @@ class axis_slave_fifo_adapter : public sc_module { axis_slave_port axis_port; axis_slave_fifo_adapter(const sc_module_name& _name, unsigned int _interface_type, unsigned int _interface_dataw, - unsigned int _num_fifo, unsigned int _element_bitwidth, unsigned int _num_element); + unsigned int _num_fifo, unsigned int _element_bitwidth, unsigned int _num_element, + RADSimDesignContext* radsim_design); ~axis_slave_fifo_adapter(); void sc_bitvector_to_data_fifo(); // Converts a SystemC bitvector to a data FIFO entry diff --git a/rad-sim/example-designs/npu/modules/axis_inst_dispatch.cpp b/rad-sim/example-designs/npu/modules/axis_inst_dispatch.cpp index 117a7e8..ccab465 100644 --- a/rad-sim/example-designs/npu/modules/axis_inst_dispatch.cpp +++ b/rad-sim/example-designs/npu/modules/axis_inst_dispatch.cpp @@ -1,7 +1,7 @@ #include -axis_inst_dispatch::axis_inst_dispatch(const sc_module_name& name, unsigned int thread_id) - : RADSimModule(name) { +axis_inst_dispatch::axis_inst_dispatch(const sc_module_name& name, unsigned int thread_id, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design) { // Create SystemC vectors with the required sizes -- macro-op interfaces are vectors of size 1 to match the template // definition used with data FIFOs which works with multiple cores init_vector::init_sc_vector(sector_mop_interface, SECTORS); diff --git a/rad-sim/example-designs/npu/modules/axis_inst_dispatch.hpp b/rad-sim/example-designs/npu/modules/axis_inst_dispatch.hpp index 4f95a66..fcd976a 100644 --- a/rad-sim/example-designs/npu/modules/axis_inst_dispatch.hpp +++ b/rad-sim/example-designs/npu/modules/axis_inst_dispatch.hpp @@ -49,7 +49,7 @@ class axis_inst_dispatch : public RADSimModule { sc_vector mfu1_mop_interface; axis_master_port ld_mop_interface; - axis_inst_dispatch(const sc_module_name& name, unsigned int thread_id); + axis_inst_dispatch(const sc_module_name& name, unsigned int thread_id, RADSimDesignContext* radsim_design); ~axis_inst_dispatch(); void RegisterModuleInfo(); }; diff --git a/rad-sim/example-designs/npu/modules/axis_mvu_sector.cpp b/rad-sim/example-designs/npu/modules/axis_mvu_sector.cpp index d95869d..a1e3890 100644 --- a/rad-sim/example-designs/npu/modules/axis_mvu_sector.cpp +++ b/rad-sim/example-designs/npu/modules/axis_mvu_sector.cpp @@ -1,7 +1,7 @@ #include "axis_mvu_sector.hpp" -axis_mvu_sector::axis_mvu_sector(const sc_module_name& name, unsigned int sector_id) - : RADSimModule(name), +axis_mvu_sector::axis_mvu_sector(const sc_module_name& name, unsigned int sector_id, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), ofifo_rdy_signal("ofifo_rdy_signal"), ofifo_ren_signal("ofifo_ren_signal"), ofifo_rdata_signal("ofifo_rdata_signal"), @@ -66,7 +66,7 @@ axis_mvu_sector::axis_mvu_sector(const sc_module_name& name, unsigned int sector inst_interface_name_str = "sector" + std::to_string(_sector_id) + "_inst_interface_" + std::to_string(thread_id); std::strcpy(inst_interface_name, inst_interface_name_str.c_str()); inst_axis_interface[thread_id] = new axis_slave_fifo_adapter>( - inst_interface_name, INSTRUCTION_INTERFACE, MVU_INSTRUCTION_INTERFACE_DATAW, 1, MVU_MOP_BITWIDTH, 1); + inst_interface_name, INSTRUCTION_INTERFACE, MVU_INSTRUCTION_INTERFACE_DATAW, 1, MVU_MOP_BITWIDTH, 1, radsim_design); inst_axis_interface[thread_id]->clk(clk); inst_axis_interface[thread_id]->rst(rst); inst_axis_interface[thread_id]->fifo_rdy(mop_rdy_signal[thread_id]); diff --git a/rad-sim/example-designs/npu/modules/axis_mvu_sector.hpp b/rad-sim/example-designs/npu/modules/axis_mvu_sector.hpp index 92ea906..420ded9 100644 --- a/rad-sim/example-designs/npu/modules/axis_mvu_sector.hpp +++ b/rad-sim/example-designs/npu/modules/axis_mvu_sector.hpp @@ -47,7 +47,7 @@ class axis_mvu_sector : public RADSimModule { sc_vector>>> sector_chain_ofifo_rdata; sc_vector sector_ofifo_interface; - axis_mvu_sector(const sc_module_name& name, unsigned int sector_id); + axis_mvu_sector(const sc_module_name& name, unsigned int sector_id, RADSimDesignContext* radsim_design); ~axis_mvu_sector(); void RegisterModuleInfo(); }; diff --git a/rad-sim/example-designs/npu/modules/axis_mvu_sector_chain.cpp b/rad-sim/example-designs/npu/modules/axis_mvu_sector_chain.cpp index 849b6e6..5b3cdb5 100644 --- a/rad-sim/example-designs/npu/modules/axis_mvu_sector_chain.cpp +++ b/rad-sim/example-designs/npu/modules/axis_mvu_sector_chain.cpp @@ -1,7 +1,7 @@ #include "axis_mvu_sector_chain.hpp" -axis_mvu_sector_chain::axis_mvu_sector_chain(const sc_module_name& name, unsigned int sector_id) - : RADSimModule(name), +axis_mvu_sector_chain::axis_mvu_sector_chain(const sc_module_name& name, unsigned int sector_id, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), ofifo_rdy_signal("ofifo_rdy_signal"), ofifo_ren_signal("ofifo_ren_signal"), ofifo_rdata_signal("ofifo_rdata_signal"), @@ -60,7 +60,7 @@ axis_mvu_sector_chain::axis_mvu_sector_chain(const sc_module_name& name, unsigne inst_interface_name_str = "sector" + std::to_string(_sector_id) + "_inst_interface_" + std::to_string(thread_id); std::strcpy(inst_interface_name, inst_interface_name_str.c_str()); inst_axis_interface[thread_id] = new axis_slave_fifo_adapter>( - inst_interface_name, INSTRUCTION_INTERFACE, MVU_INSTRUCTION_INTERFACE_DATAW, 1, MVU_MOP_BITWIDTH, 1); + inst_interface_name, INSTRUCTION_INTERFACE, MVU_INSTRUCTION_INTERFACE_DATAW, 1, MVU_MOP_BITWIDTH, 1, radsim_design); inst_axis_interface[thread_id]->clk(clk); inst_axis_interface[thread_id]->rst(rst); inst_axis_interface[thread_id]->fifo_rdy(mop_rdy_signal[thread_id]); diff --git a/rad-sim/example-designs/npu/modules/axis_mvu_sector_chain.hpp b/rad-sim/example-designs/npu/modules/axis_mvu_sector_chain.hpp index 98912b6..cf2aa6a 100644 --- a/rad-sim/example-designs/npu/modules/axis_mvu_sector_chain.hpp +++ b/rad-sim/example-designs/npu/modules/axis_mvu_sector_chain.hpp @@ -45,7 +45,7 @@ class axis_mvu_sector_chain : public RADSimModule { sc_vector>>> sector_chain_ofifo_rdata; sc_vector sector_ofifo_interface; - axis_mvu_sector_chain(const sc_module_name& name, unsigned int id); + axis_mvu_sector_chain(const sc_module_name& name, unsigned int id, RADSimDesignContext* radsim_design); ~axis_mvu_sector_chain(); void RegisterModuleInfo(); }; diff --git a/rad-sim/example-designs/npu/modules/axis_vector_elementwise.cpp b/rad-sim/example-designs/npu/modules/axis_vector_elementwise.cpp index 0522476..4964a79 100644 --- a/rad-sim/example-designs/npu/modules/axis_vector_elementwise.cpp +++ b/rad-sim/example-designs/npu/modules/axis_vector_elementwise.cpp @@ -1,7 +1,7 @@ #include -axis_vector_elementwise::axis_vector_elementwise(const sc_module_name& name, unsigned int thread_id) - : RADSimModule(name), +axis_vector_elementwise::axis_vector_elementwise(const sc_module_name& name, unsigned int thread_id, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), evrf_ififo_rdy_signal("evrf_ififo_rdy_signal"), evrf_ififo_ren_signal("evrf_ififo_ren_signal"), evrf_ififo_rdata_signal("evrf_ififo_rdata_signal"), @@ -136,7 +136,7 @@ axis_vector_elementwise::axis_vector_elementwise(const sc_module_name& name, uns module_name_str = "evrf_inst_axis_interface_" + std::to_string(sector_id); std::strcpy(module_name, module_name_str.c_str()); evrf_inst_axis_interfaces[sector_id] = new axis_slave_fifo_adapter>( - module_name, INSTRUCTION_INTERFACE, VEW_INSTRUCTION_INTERFACE_DATAW, 1, EVRF_MOP_BITWIDTH, 1); + module_name, INSTRUCTION_INTERFACE, VEW_INSTRUCTION_INTERFACE_DATAW, 1, EVRF_MOP_BITWIDTH, 1, radsim_design); evrf_inst_axis_interfaces[sector_id]->clk(clk); evrf_inst_axis_interfaces[sector_id]->rst(rst); evrf_inst_axis_interfaces[sector_id]->fifo_rdy(evrf_mop_rdy_signal[sector_id]); @@ -189,7 +189,7 @@ axis_vector_elementwise::axis_vector_elementwise(const sc_module_name& name, uns module_name_str = "mfu0_inst_interface_" + std::to_string(sector_id); std::strcpy(module_name, module_name_str.c_str()); mfu0_inst_axis_interfaces[sector_id] = new axis_slave_fifo_adapter>( - module_name, INSTRUCTION_INTERFACE, VEW_INSTRUCTION_INTERFACE_DATAW, 1, MFU_MOP_BITWIDTH, 1); + module_name, INSTRUCTION_INTERFACE, VEW_INSTRUCTION_INTERFACE_DATAW, 1, MFU_MOP_BITWIDTH, 1, radsim_design); mfu0_inst_axis_interfaces[sector_id]->clk(clk); mfu0_inst_axis_interfaces[sector_id]->rst(rst); mfu0_inst_axis_interfaces[sector_id]->fifo_rdy(mfu0_mop_rdy_signal[sector_id]); @@ -230,7 +230,7 @@ axis_vector_elementwise::axis_vector_elementwise(const sc_module_name& name, uns module_name_str = "mfu1_inst_interface_" + std::to_string(sector_id); std::strcpy(module_name, module_name_str.c_str()); mfu1_inst_axis_interfaces[sector_id] = new axis_slave_fifo_adapter>( - module_name, INSTRUCTION_INTERFACE, VEW_INSTRUCTION_INTERFACE_DATAW, 1, MFU_MOP_BITWIDTH, 1); + module_name, INSTRUCTION_INTERFACE, VEW_INSTRUCTION_INTERFACE_DATAW, 1, MFU_MOP_BITWIDTH, 1, radsim_design); mfu1_inst_axis_interfaces[sector_id]->clk(clk); mfu1_inst_axis_interfaces[sector_id]->rst(rst); mfu1_inst_axis_interfaces[sector_id]->fifo_rdy(mfu1_mop_rdy_signal[sector_id]); @@ -272,7 +272,7 @@ axis_vector_elementwise::axis_vector_elementwise(const sc_module_name& name, uns ld_module->ext_output_fifo_rdata(ext_output_fifo_rdata); ld_inst_axis_interface = new axis_slave_fifo_adapter>( - "ld_inst_axis_interface", INSTRUCTION_INTERFACE, VEW_INSTRUCTION_INTERFACE_DATAW, 1, LD_MOP_BITWIDTH, 1); + "ld_inst_axis_interface", INSTRUCTION_INTERFACE, VEW_INSTRUCTION_INTERFACE_DATAW, 1, LD_MOP_BITWIDTH, 1, radsim_design); ld_inst_axis_interface->clk(clk); ld_inst_axis_interface->rst(rst); ld_inst_axis_interface->fifo_rdy(ld_mop_rdy_signal); @@ -283,7 +283,7 @@ axis_vector_elementwise::axis_vector_elementwise(const sc_module_name& name, uns // Create two write-back master AXI-streaming interfaces (send write-back data to different NPU modules) std::string dest_name = "axis_mvu_sector_0.sector_wb_interface_" + std::to_string(_thread_id); ld_wb0_axis_interface = new axis_master_fifo_adapter, sc_bv>( - "ld_wb0_axis_interface", MVU_WRITEBACK_INTERFACE, VEW_WB0_INTERFACE_DATAW, CORES, LOW_PRECISION, dest_name); + "ld_wb0_axis_interface", MVU_WRITEBACK_INTERFACE, VEW_WB0_INTERFACE_DATAW, CORES, LOW_PRECISION, dest_name, radsim_design); ld_wb0_axis_interface->clk(clk); ld_wb0_axis_interface->rst(rst); ld_wb0_axis_interface->fifo_rdy(ld_wb0_rdy_signal); diff --git a/rad-sim/example-designs/npu/modules/axis_vector_elementwise.hpp b/rad-sim/example-designs/npu/modules/axis_vector_elementwise.hpp index bf96c20..86d815c 100644 --- a/rad-sim/example-designs/npu/modules/axis_vector_elementwise.hpp +++ b/rad-sim/example-designs/npu/modules/axis_vector_elementwise.hpp @@ -88,7 +88,7 @@ class axis_vector_elementwise : public RADSimModule { sc_vector> ext_output_fifo_ren; sc_vector>> ext_output_fifo_rdata; - axis_vector_elementwise(const sc_module_name& name, unsigned int thread_id); + axis_vector_elementwise(const sc_module_name& name, unsigned int thread_id, RADSimDesignContext* radsim_design); ~axis_vector_elementwise(); void RegisterModuleInfo(); diff --git a/rad-sim/example-designs/npu/npu.clks b/rad-sim/example-designs/npu/npu.clks index e71b808..2b6a6bc 100644 --- a/rad-sim/example-designs/npu/npu.clks +++ b/rad-sim/example-designs/npu/npu.clks @@ -15,4 +15,5 @@ axis_vector_elementwise_3 0 0 axis_inst_dispatcher_0 0 0 axis_inst_dispatcher_1 0 0 axis_inst_dispatcher_2 0 0 -axis_inst_dispatcher_3 0 0 \ No newline at end of file +axis_inst_dispatcher_3 0 0 +portal_inst 0 0 \ No newline at end of file diff --git a/rad-sim/example-designs/npu/npu.place b/rad-sim/example-designs/npu/npu.place index 766ab39..60889b1 100644 --- a/rad-sim/example-designs/npu/npu.place +++ b/rad-sim/example-designs/npu/npu.place @@ -179,4 +179,5 @@ axis_vector_elementwise_3.loader_wb0_interface 0 67 axis axis_inst_dispatcher_0 0 17 axis axis_inst_dispatcher_1 0 37 axis axis_inst_dispatcher_2 0 57 axis -axis_inst_dispatcher_3 0 77 axis \ No newline at end of file +axis_inst_dispatcher_3 0 77 axis +portal_inst 0 39 axis \ No newline at end of file diff --git a/rad-sim/example-designs/npu/npu_driver.cpp b/rad-sim/example-designs/npu/npu_driver.cpp index d2e1525..b1f4411 100644 --- a/rad-sim/example-designs/npu/npu_driver.cpp +++ b/rad-sim/example-designs/npu/npu_driver.cpp @@ -1,6 +1,6 @@ #include -npu_driver::npu_driver(const sc_module_name &name) +npu_driver::npu_driver(const sc_module_name &name, RADSimDesignContext* radsim_design_) : sc_module(name), rst("rst"), inst_wdata("inst_wdata"), @@ -19,6 +19,8 @@ npu_driver::npu_driver(const sc_module_name &name) ofifo_ren("ofifo_ren"), ofifo_rdata("ofifo_rdata") { + this->radsim_design = radsim_design_; + init_vector>::init_sc_vector(ififo_rdy, THREADS, CORES); init_vector>::init_sc_vector(ififo_wen, THREADS, CORES); init_vector>>::init_sc_vector(ififo_wdata, THREADS, CORES); @@ -97,7 +99,7 @@ void npu_driver::source() { // Trigger NPU start signal start.write(true); wait(); - start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); //"max_period")); //AKB: replaced with sim_driver_period + start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); start.write(false); wait(); @@ -176,7 +178,7 @@ void npu_driver::sink() { } wait(); } - end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("max_period")); + end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); std::ofstream report; std::string npu_dir = radsim_config.GetStringKnob("radsim_user_design_root_dir"); @@ -196,7 +198,9 @@ void npu_driver::sink() { sim_trace_probe.dump_traces(); - sc_stop(); + //sc_stop(); + this->radsim_design->set_rad_done(); //flag to replace sc_stop calls + return; //NoCTransactionTelemetry::DumpStatsToFile("/Users/andrew/PhD/dev/rad-sim-opt-npu-multithread-hard-c2/stats.csv"); } diff --git a/rad-sim/example-designs/npu/npu_driver.hpp b/rad-sim/example-designs/npu/npu_driver.hpp index ad5c462..ffd6f18 100644 --- a/rad-sim/example-designs/npu/npu_driver.hpp +++ b/rad-sim/example-designs/npu/npu_driver.hpp @@ -18,6 +18,7 @@ class npu_driver : public sc_module { std::vector> npu_outputs; public: + RADSimDesignContext* radsim_design; sc_in clk; sc_out rst; sc_out inst_wdata; @@ -36,7 +37,7 @@ class npu_driver : public sc_module { sc_vector>> ofifo_ren; sc_vector>>> ofifo_rdata; - npu_driver(const sc_module_name& name); + npu_driver(const sc_module_name& name, RADSimDesignContext* radsim_design_); ~npu_driver(); void source(); diff --git a/rad-sim/example-designs/npu/npu_system.cpp b/rad-sim/example-designs/npu/npu_system.cpp index 3b9c325..2236084 100644 --- a/rad-sim/example-designs/npu/npu_system.cpp +++ b/rad-sim/example-designs/npu/npu_system.cpp @@ -1,6 +1,6 @@ #include -npu_system::npu_system(const sc_module_name &name, sc_clock* driver_clk_sig) +npu_system::npu_system(const sc_module_name &name, sc_clock* driver_clk_sig, RADSimDesignContext* radsim_design) : sc_module(name), inst_wdata("inst_wdata"), inst_waddr("inst_waddr"), @@ -26,7 +26,7 @@ npu_system::npu_system(const sc_module_name &name, sc_clock* driver_clk_sig) init_vector>::init_sc_vector(ofifo_ren, THREADS, CORES); init_vector>>::init_sc_vector(ofifo_rdata, THREADS, CORES); - npu_driver_inst = new npu_driver("npu_driver_inst"); + npu_driver_inst = new npu_driver("npu_driver_inst", radsim_design); npu_driver_inst->clk(*driver_clk_sig); npu_driver_inst->rst(rst_sig); npu_driver_inst->inst_wdata(inst_wdata); @@ -45,7 +45,7 @@ npu_system::npu_system(const sc_module_name &name, sc_clock* driver_clk_sig) npu_driver_inst->ofifo_ren(ofifo_ren); npu_driver_inst->ofifo_rdata(ofifo_rdata); - npu_inst = new npu_top("npu_inst"); + npu_inst = new npu_top("npu_inst", radsim_design); npu_inst->rst(rst_sig); npu_inst->inst_wdata(inst_wdata); npu_inst->inst_waddr(inst_waddr); @@ -62,6 +62,9 @@ npu_system::npu_system(const sc_module_name &name, sc_clock* driver_clk_sig) npu_inst->ofifo_rdy(ofifo_rdy); npu_inst->ofifo_ren(ofifo_ren); npu_inst->ofifo_rdata(ofifo_rdata); + + //add _top as dut instance for parent class design_system + this->design_dut_inst = npu_inst; } npu_system::~npu_system() { diff --git a/rad-sim/example-designs/npu/npu_system.hpp b/rad-sim/example-designs/npu/npu_system.hpp index 1581ea3..a68c69a 100644 --- a/rad-sim/example-designs/npu/npu_system.hpp +++ b/rad-sim/example-designs/npu/npu_system.hpp @@ -9,8 +9,9 @@ #include #include #include +#include -class npu_system : public sc_module { +class npu_system : public design_system { private: public: sc_signal inst_wdata; @@ -33,6 +34,6 @@ class npu_system : public sc_module { npu_driver* npu_driver_inst; npu_top* npu_inst; - npu_system(const sc_module_name& name, sc_clock* driver_clk_sig); + npu_system(const sc_module_name& name, sc_clock* driver_clk_sig, RADSimDesignContext* radsim_design); ~npu_system(); }; \ No newline at end of file diff --git a/rad-sim/example-designs/npu/npu_top.cpp b/rad-sim/example-designs/npu/npu_top.cpp index 442ef53..4ffd2be 100644 --- a/rad-sim/example-designs/npu/npu_top.cpp +++ b/rad-sim/example-designs/npu/npu_top.cpp @@ -1,6 +1,6 @@ #include -npu_top::npu_top(const sc_module_name &name) : sc_module(name), +npu_top::npu_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : design_top(radsim_design), sector_chain_fifo_rdy_signals("sector_chain_fifo_rdy_signals"), sector_chain_fifo_ren_signals("sector_chain_fifo_ren_signals"), sector_chain_fifo_rdata_signals("sector_chain_fifo_rdata_signals"), @@ -31,7 +31,7 @@ npu_top::npu_top(const sc_module_name &name) : sc_module(name), char module_name[NAME_LENGTH]; std::string module_name_str; - first_mvu_sector = new axis_mvu_sector("axis_mvu_sector_0", 0); + first_mvu_sector = new axis_mvu_sector("axis_mvu_sector_0", 0, radsim_design); first_mvu_sector->rst(rst); first_mvu_sector->mrf_waddr(mrf_waddr); first_mvu_sector->mrf_wdata(mrf_wdata); @@ -43,7 +43,7 @@ npu_top::npu_top(const sc_module_name &name) : sc_module(name), for (unsigned int sector_id = 1; sector_id < SECTORS; sector_id++) { module_name_str = "axis_mvu_sector_" + std::to_string(sector_id); std::strcpy(module_name, module_name_str.c_str()); - mvu_sectors[sector_id - 1] = new axis_mvu_sector_chain(module_name, sector_id); + mvu_sectors[sector_id - 1] = new axis_mvu_sector_chain(module_name, sector_id, radsim_design); mvu_sectors[sector_id - 1]->rst(rst); mvu_sectors[sector_id - 1]->mrf_waddr(mrf_waddr); mvu_sectors[sector_id - 1]->mrf_wdata(mrf_wdata); @@ -59,7 +59,7 @@ npu_top::npu_top(const sc_module_name &name) : sc_module(name), for (unsigned int thread_id = 0; thread_id < THREADS; thread_id++) { module_name_str = "axis_inst_dispatcher_" + std::to_string(thread_id); std::strcpy(module_name, module_name_str.c_str()); - inst_dispatcher[thread_id] = new axis_inst_dispatch(module_name, thread_id); + inst_dispatcher[thread_id] = new axis_inst_dispatch(module_name, thread_id, radsim_design); inst_dispatcher[thread_id]->rst(rst); inst_dispatcher[thread_id]->start_pc(start_pc); inst_dispatcher[thread_id]->end_pc(end_pc); @@ -70,7 +70,7 @@ npu_top::npu_top(const sc_module_name &name) : sc_module(name), module_name_str = "axis_vector_elementwise_" + std::to_string(thread_id); std::strcpy(module_name, module_name_str.c_str()); - vector_elementwise_blocks[thread_id] = new axis_vector_elementwise(module_name, thread_id); + vector_elementwise_blocks[thread_id] = new axis_vector_elementwise(module_name, thread_id, radsim_design); vector_elementwise_blocks[thread_id]->rst(rst); vector_elementwise_blocks[thread_id]->ext_input_fifo_rdy(ififo_rdy[thread_id]); vector_elementwise_blocks[thread_id]->ext_input_fifo_wen(ififo_wen[thread_id]); @@ -80,9 +80,10 @@ npu_top::npu_top(const sc_module_name &name) : sc_module(name), vector_elementwise_blocks[thread_id]->ext_output_fifo_rdata(ofifo_rdata[thread_id]); } - radsim_design.BuildDesignContext("npu.place", "npu.clks"); - radsim_design.CreateSystemNoCs(rst); - radsim_design.ConnectModulesToNoC(); + this->portal_inst->rst(rst); + radsim_design->BuildDesignContext("npu.place", "npu.clks"); + radsim_design->CreateSystemNoCs(rst); + radsim_design->ConnectModulesToNoC(); } npu_top::~npu_top() { diff --git a/rad-sim/example-designs/npu/npu_top.hpp b/rad-sim/example-designs/npu/npu_top.hpp index 0c0d8ee..50eece6 100644 --- a/rad-sim/example-designs/npu/npu_top.hpp +++ b/rad-sim/example-designs/npu/npu_top.hpp @@ -12,9 +12,10 @@ #include #include #include +#include -class npu_top : public sc_module { +class npu_top : public design_top { private: sc_vector>>> sector_chain_fifo_rdy_signals; sc_vector>>> sector_chain_fifo_ren_signals; @@ -46,7 +47,7 @@ class npu_top : public sc_module { sc_vector>> ofifo_ren; sc_vector>>> ofifo_rdata; - npu_top(const sc_module_name& name); + npu_top(const sc_module_name& name, RADSimDesignContext* radsim_design); ~npu_top(); void prepare_adapters_info(); }; \ No newline at end of file diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 14d3ccc..d0c5095 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -7,7 +7,7 @@ #include #include -#include +#include RADSimConfig radsim_config; std::ostream *gWatchOut; @@ -31,7 +31,7 @@ int sc_main(int argc, char *argv[]) { sc_clock *driver_clk_sig0 = new sc_clock( "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); - mlp_int8_system *system0 = new mlp_int8_system("mlp_int8_system", driver_clk_sig0, cluster->all_rads[0]); + npu_system *system0 = new npu_system("npu_system", driver_clk_sig0, cluster->all_rads[0]); cluster->StoreSystem(system0); sc_clock *inter_rad_clk_sig = new sc_clock( diff --git a/rad-sim/sim/noc/noc0_rad0_config b/rad-sim/sim/noc/noc0_rad0_config index f24533c..fa20978 100644 --- a/rad-sim/sim/noc/noc0_rad0_config +++ b/rad-sim/sim/noc/noc0_rad0_config @@ -1,6 +1,6 @@ // Topology topology = mesh; -k = 5; +k = 10; n = 2; // Routing diff --git a/rad-sim/sim/radsim_defines.hpp b/rad-sim/sim/radsim_defines.hpp index 94c69d1..249b544 100644 --- a/rad-sim/sim/radsim_defines.hpp +++ b/rad-sim/sim/radsim_defines.hpp @@ -8,7 +8,7 @@ #define NOC_LINKS_VCID_WIDTH 3 #define NOC_LINKS_PACKETID_WIDTH 32 #define NOC_LINKS_TYPEID_WIDTH 3 -#define NOC_LINKS_DEST_WIDTH 15 +#define NOC_LINKS_DEST_WIDTH 21 #define NOC_LINKS_DEST_INTERFACE_WIDTH 5 #define NOC_LINKS_WIDTH (NOC_LINKS_PAYLOAD_WIDTH + NOC_LINKS_VCID_WIDTH + NOC_LINKS_PACKETID_WIDTH + NOC_LINKS_DEST_WIDTH + NOC_LINKS_DEST_INTERFACE_WIDTH) @@ -23,14 +23,14 @@ #define AXIS_KEEPW 8 #define AXIS_IDW NOC_LINKS_PACKETID_WIDTH #define AXIS_DESTW NOC_LINKS_DEST_WIDTH -#define AXIS_DEST_FIELDW 5 +#define AXIS_DEST_FIELDW 7 #define AXI4_IDW 8 #define AXI4_ADDRW 64 #define AXI4_LENW 8 #define AXI4_SIZEW 3 #define AXI4_BURSTW 2 #define AXI4_RESPW 2 -#define AXI4_NODE_ADDRW 5 +#define AXI4_NODE_ADDRW 7 #define AXI4_CTRLW (AXI4_LENW + AXI4_SIZEW + AXI4_BURSTW) // AXI Packetization Defines diff --git a/rad-sim/sim/radsim_knobs b/rad-sim/sim/radsim_knobs index bd1360a..3fa3bf6 100644 --- a/rad-sim/sim/radsim_knobs +++ b/rad-sim/sim/radsim_knobs @@ -1,22 +1,22 @@ -design_name 0 mlp_int8 +design_name 0 npu noc_num_nocs 0 1 noc_clk_period 0 1.0 noc_vcs 0 5 noc_payload_width 0 166 -noc_num_nodes 0 25 -design_noc_placement 0 mlp.place +noc_num_nodes 0 100 +design_noc_placement 0 npu.place noc_adapters_clk_period 0 1.25 noc_adapters_fifo_size 0 16 noc_adapters_obuff_size 0 2 noc_adapters_in_arbiter 0 fixed_rr noc_adapters_out_arbiter 0 priority_rr noc_adapters_vc_mapping 0 direct -design_clk_periods 0 5.0 +design_clk_periods 0 5.0 2.5 dram_num_controllers 0 0 dram_clk_periods 0 2.0 dram_queue_sizes 0 64 dram_config_files 0 HBM2_8Gb_x128 -radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/mlp_int8 +radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/npu radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim sim_driver_period 5.0 telemetry_log_verbosity 2 diff --git a/rad-sim/uni_config.yml b/rad-sim/uni_config.yml index 801f02f..33d4bb8 100644 --- a/rad-sim/uni_config.yml +++ b/rad-sim/uni_config.yml @@ -4,8 +4,8 @@ noc: clk_period: [1.0] payload_width: [166] topology: ['mesh'] - dim_x: [5] - dim_y: [4] + dim_x: [10] + dim_y: [10] routing_func: ['dim_order'] vcs: [5] vc_buffer_size: [8] @@ -29,9 +29,9 @@ noc_adapters: config rad1: design: - name: 'mlp_int8' - noc_placement: ['mlp.place'] - clk_periods: [5.0] + name: 'npu' + noc_placement: ['npu.place'] + clk_periods: [5.0, 2.5] cluster: sim_driver_period: 5.0 From c2154c9273ffac4d173a22bc1812acf4455b27e1 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 30 Jul 2024 20:44:54 -0400 Subject: [PATCH 086/127] TO-BE-TESTED: fix knobs access in mlp_int8 --- rad-sim/example-designs/mlp_int8/mlp_driver.cpp | 4 ++-- rad-sim/example-designs/mlp_int8/mlp_top.cpp | 4 ++-- rad-sim/example-designs/mlp_int8/modules/sysc_mvm.cpp | 6 +++--- rad-sim/example-designs/mlp_int8/modules/sysc_mvm.hpp | 2 +- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/rad-sim/example-designs/mlp_int8/mlp_driver.cpp b/rad-sim/example-designs/mlp_int8/mlp_driver.cpp index 46080fe..7ca11fd 100644 --- a/rad-sim/example-designs/mlp_int8/mlp_driver.cpp +++ b/rad-sim/example-designs/mlp_int8/mlp_driver.cpp @@ -5,7 +5,7 @@ bool ParseWeights(std::vector>& weights, std::vector& layer_ids, std::vector& mvm_ids, unsigned int num_layers, std::vector& num_mvms, unsigned int _rad_id) { - std::string design_root_dir = radsim_config.GetStringKnobShared("radsim_user_design_root_dir", _rad_id); + std::string design_root_dir = radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", _rad_id); for (unsigned int l = 0; l < num_layers; l++) { for (unsigned int m = 0; m < num_mvms[l]; m++) { for (unsigned int d = 0; d < DPES; d++) { @@ -44,7 +44,7 @@ bool ParseInstructions(std::vector &insts, std::vector& layer_ids, std::vector& mvm_ids, unsigned int num_layers, std::vector& num_mvms, unsigned int _rad_id) { - std::string design_root_dir = radsim_config.GetStringKnob("radsim_user_design_root_dir", _rad_id); + std::string design_root_dir = radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", _rad_id); for (unsigned int l = 0; l < num_layers; l++) { for (unsigned int m = 0; m < num_mvms[l]; m++) { diff --git a/rad-sim/example-designs/mlp_int8/mlp_top.cpp b/rad-sim/example-designs/mlp_int8/mlp_top.cpp index bfb8eeb..9b54e09 100644 --- a/rad-sim/example-designs/mlp_int8/mlp_top.cpp +++ b/rad-sim/example-designs/mlp_int8/mlp_top.cpp @@ -51,7 +51,7 @@ mlp_top::mlp_top(const sc_module_name &name, RADSimDesignContext* radsim_design) "layer" + std::to_string(layer_id) + "_mvm" + std::to_string(mvm_id); std::strcpy(module_name, module_name_str.c_str()); sysc_matrix_vector_engines[layer_id][mvm_id] = - new sysc_mvm(module_name, mvm_id, layer_id); + new sysc_mvm(module_name, mvm_id, layer_id, radsim_design); sysc_matrix_vector_engines[layer_id][mvm_id]->rst(rst); } for (unsigned int mvm_id = 0; mvm_id < num_mvms_rtl[layer_id]; mvm_id++) { @@ -59,7 +59,7 @@ mlp_top::mlp_top(const sc_module_name &name, RADSimDesignContext* radsim_design) "layer" + std::to_string(layer_id) + "_mvm" + std::to_string(mvm_id + num_mvms_sysc[layer_id]); std::strcpy(module_name, module_name_str.c_str()); rtl_matrix_vector_engines[layer_id][mvm_id] = - new rtl_mvm(module_name); + new rtl_mvm(module_name, radsim_design); rtl_matrix_vector_engines[layer_id][mvm_id]->rst(rst); } } diff --git a/rad-sim/example-designs/mlp_int8/modules/sysc_mvm.cpp b/rad-sim/example-designs/mlp_int8/modules/sysc_mvm.cpp index 3674a83..f6589db 100644 --- a/rad-sim/example-designs/mlp_int8/modules/sysc_mvm.cpp +++ b/rad-sim/example-designs/mlp_int8/modules/sysc_mvm.cpp @@ -1,7 +1,7 @@ #include "sysc_mvm.hpp" -sysc_mvm::sysc_mvm(const sc_module_name &name, unsigned int id_mvm, unsigned int id_layer) - : RADSimModule(name), +sysc_mvm::sysc_mvm(const sc_module_name &name, unsigned int id_mvm, unsigned int id_layer, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), rf_rdata("rf_rdata", DPES), rf_wdata("rf_wdata"), rf_wen("rf_wen", DPES), @@ -27,7 +27,7 @@ sysc_mvm::sysc_mvm(const sc_module_name &name, unsigned int id_mvm, unsigned int std::string datapath_name_str; rf.resize(DPES); datapath_inst.resize(DPES); - std::string mvm_dir = radsim_config.GetStringKnob("radsim_user_design_root_dir"); + std::string mvm_dir = radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); std::string mem_init_file; // STAGE 1: Instruction FIFO, Input FIFO, and Reduction FIFO diff --git a/rad-sim/example-designs/mlp_int8/modules/sysc_mvm.hpp b/rad-sim/example-designs/mlp_int8/modules/sysc_mvm.hpp index 6b9c9fb..280bdf8 100644 --- a/rad-sim/example-designs/mlp_int8/modules/sysc_mvm.hpp +++ b/rad-sim/example-designs/mlp_int8/modules/sysc_mvm.hpp @@ -78,7 +78,7 @@ class sysc_mvm : public RADSimModule { axis_slave_port rx_interface; axis_master_port tx_interface; - sysc_mvm(const sc_module_name& name, unsigned int id_mvm, unsigned int id_layer); + sysc_mvm(const sc_module_name& name, unsigned int id_mvm, unsigned int id_layer, RADSimDesignContext* radsim_design); ~sysc_mvm(); void Assign(); From 578c96500d3812d827020d6b38166678ebeb4fd0 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 30 Jul 2024 23:21:26 -0400 Subject: [PATCH 087/127] Working mlp_int8 --- rad-sim/example-designs/mlp_int8/mlp.place | 28 +++++++++---------- .../example-designs/mlp_int8/mlp_driver.cpp | 2 +- .../mlp_int8/modules/rtl/rtl_mvm.v | 2 +- rad-sim/sim/main.cpp | 4 +-- rad-sim/sim/noc/noc0_rad0_config | 2 +- rad-sim/sim/radsim_defines.hpp | 6 ++-- rad-sim/sim/radsim_knobs | 10 +++---- rad-sim/uni_config.yml | 10 +++---- 8 files changed, 32 insertions(+), 32 deletions(-) diff --git a/rad-sim/example-designs/mlp_int8/mlp.place b/rad-sim/example-designs/mlp_int8/mlp.place index 613a244..54d6bf4 100644 --- a/rad-sim/example-designs/mlp_int8/mlp.place +++ b/rad-sim/example-designs/mlp_int8/mlp.place @@ -1,17 +1,17 @@ -layer0_mvm0 0 10 axis -layer0_mvm1 0 2 axis -layer0_mvm2 0 11 axis -layer1_mvm0 0 14 axis -layer1_mvm1 0 13 axis -layer1_mvm2 0 12 axis +layer0_mvm0 0 12 axis +layer0_mvm1 0 7 axis +layer0_mvm2 0 8 axis +layer1_mvm0 0 6 axis +layer1_mvm1 0 15 axis +layer1_mvm2 0 11 axis layer2_mvm0 0 3 axis -layer2_mvm1 0 5 axis -layer3_mvm0 0 9 axis +layer2_mvm1 0 10 axis +layer3_mvm0 0 1 axis layer3_mvm1 0 0 axis -input_dispatcher0 0 4 axis -input_dispatcher1 0 8 axis -input_dispatcher2 0 7 axis -output_collector 0 1 axis -weight_loader 0 6 axis -inst_loader 0 15 axis +input_dispatcher0 0 5 axis +input_dispatcher1 0 9 axis +input_dispatcher2 0 2 axis +output_collector 0 13 axis +weight_loader 0 4 axis +inst_loader 0 14 axis portal_inst 0 16 axis diff --git a/rad-sim/example-designs/mlp_int8/mlp_driver.cpp b/rad-sim/example-designs/mlp_int8/mlp_driver.cpp index 7ca11fd..53f81d7 100644 --- a/rad-sim/example-designs/mlp_int8/mlp_driver.cpp +++ b/rad-sim/example-designs/mlp_int8/mlp_driver.cpp @@ -323,7 +323,7 @@ void mlp_driver::sink() { NoCFlitTelemetry::DumpNoCFlitTracesToFile("flit_traces.csv"); std::vector aggregate_bandwidths = NoCTransactionTelemetry::DumpTrafficFlows("traffic_flows", - end_cycle - start_cycle, radsim_design.GetNodeModuleNames(), radsim_design->rad_id); + end_cycle - start_cycle, radsim_design->GetNodeModuleNames(), radsim_design->rad_id); std::cout << "Aggregate NoC BW = " << aggregate_bandwidths[0] / 1000000000 << " Gbps" << std::endl; //sc_stop(); diff --git a/rad-sim/example-designs/mlp_int8/modules/rtl/rtl_mvm.v b/rad-sim/example-designs/mlp_int8/modules/rtl/rtl_mvm.v index c9b03a3..24e9142 100644 --- a/rad-sim/example-designs/mlp_int8/modules/rtl/rtl_mvm.v +++ b/rad-sim/example-designs/mlp_int8/modules/rtl/rtl_mvm.v @@ -16,7 +16,7 @@ module rtl_mvm # ( parameter DATAW = 512, // Bitwidth of axi-s tdata parameter BYTEW = 8, // Bitwidth of axi-s tkeep, tstrb parameter IDW = 32, // Bitwidth of axi-s tid - parameter DESTW = 12, // Bitwidth of axi-s tdest + parameter DESTW = 15, // Bitwidth of axi-s tdest parameter USERW = 75, // Bitwidth of axi-s tuser parameter IPRECISION = 8, // Input precision in bits parameter OPRECISION = 32, // Output precision in bits diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index d0c5095..14d3ccc 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -7,7 +7,7 @@ #include #include -#include +#include RADSimConfig radsim_config; std::ostream *gWatchOut; @@ -31,7 +31,7 @@ int sc_main(int argc, char *argv[]) { sc_clock *driver_clk_sig0 = new sc_clock( "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); - npu_system *system0 = new npu_system("npu_system", driver_clk_sig0, cluster->all_rads[0]); + mlp_int8_system *system0 = new mlp_int8_system("mlp_int8_system", driver_clk_sig0, cluster->all_rads[0]); cluster->StoreSystem(system0); sc_clock *inter_rad_clk_sig = new sc_clock( diff --git a/rad-sim/sim/noc/noc0_rad0_config b/rad-sim/sim/noc/noc0_rad0_config index fa20978..f24533c 100644 --- a/rad-sim/sim/noc/noc0_rad0_config +++ b/rad-sim/sim/noc/noc0_rad0_config @@ -1,6 +1,6 @@ // Topology topology = mesh; -k = 10; +k = 5; n = 2; // Routing diff --git a/rad-sim/sim/radsim_defines.hpp b/rad-sim/sim/radsim_defines.hpp index 249b544..94c69d1 100644 --- a/rad-sim/sim/radsim_defines.hpp +++ b/rad-sim/sim/radsim_defines.hpp @@ -8,7 +8,7 @@ #define NOC_LINKS_VCID_WIDTH 3 #define NOC_LINKS_PACKETID_WIDTH 32 #define NOC_LINKS_TYPEID_WIDTH 3 -#define NOC_LINKS_DEST_WIDTH 21 +#define NOC_LINKS_DEST_WIDTH 15 #define NOC_LINKS_DEST_INTERFACE_WIDTH 5 #define NOC_LINKS_WIDTH (NOC_LINKS_PAYLOAD_WIDTH + NOC_LINKS_VCID_WIDTH + NOC_LINKS_PACKETID_WIDTH + NOC_LINKS_DEST_WIDTH + NOC_LINKS_DEST_INTERFACE_WIDTH) @@ -23,14 +23,14 @@ #define AXIS_KEEPW 8 #define AXIS_IDW NOC_LINKS_PACKETID_WIDTH #define AXIS_DESTW NOC_LINKS_DEST_WIDTH -#define AXIS_DEST_FIELDW 7 +#define AXIS_DEST_FIELDW 5 #define AXI4_IDW 8 #define AXI4_ADDRW 64 #define AXI4_LENW 8 #define AXI4_SIZEW 3 #define AXI4_BURSTW 2 #define AXI4_RESPW 2 -#define AXI4_NODE_ADDRW 7 +#define AXI4_NODE_ADDRW 5 #define AXI4_CTRLW (AXI4_LENW + AXI4_SIZEW + AXI4_BURSTW) // AXI Packetization Defines diff --git a/rad-sim/sim/radsim_knobs b/rad-sim/sim/radsim_knobs index 3fa3bf6..bd1360a 100644 --- a/rad-sim/sim/radsim_knobs +++ b/rad-sim/sim/radsim_knobs @@ -1,22 +1,22 @@ -design_name 0 npu +design_name 0 mlp_int8 noc_num_nocs 0 1 noc_clk_period 0 1.0 noc_vcs 0 5 noc_payload_width 0 166 -noc_num_nodes 0 100 -design_noc_placement 0 npu.place +noc_num_nodes 0 25 +design_noc_placement 0 mlp.place noc_adapters_clk_period 0 1.25 noc_adapters_fifo_size 0 16 noc_adapters_obuff_size 0 2 noc_adapters_in_arbiter 0 fixed_rr noc_adapters_out_arbiter 0 priority_rr noc_adapters_vc_mapping 0 direct -design_clk_periods 0 5.0 2.5 +design_clk_periods 0 5.0 dram_num_controllers 0 0 dram_clk_periods 0 2.0 dram_queue_sizes 0 64 dram_config_files 0 HBM2_8Gb_x128 -radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/npu +radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/mlp_int8 radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim sim_driver_period 5.0 telemetry_log_verbosity 2 diff --git a/rad-sim/uni_config.yml b/rad-sim/uni_config.yml index 33d4bb8..801f02f 100644 --- a/rad-sim/uni_config.yml +++ b/rad-sim/uni_config.yml @@ -4,8 +4,8 @@ noc: clk_period: [1.0] payload_width: [166] topology: ['mesh'] - dim_x: [10] - dim_y: [10] + dim_x: [5] + dim_y: [4] routing_func: ['dim_order'] vcs: [5] vc_buffer_size: [8] @@ -29,9 +29,9 @@ noc_adapters: config rad1: design: - name: 'npu' - noc_placement: ['npu.place'] - clk_periods: [5.0, 2.5] + name: 'mlp_int8' + noc_placement: ['mlp.place'] + clk_periods: [5.0] cluster: sim_driver_period: 5.0 From 1b365be171a00f31498463293acb37270d16ef7e Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 31 Jul 2024 12:49:33 -0400 Subject: [PATCH 088/127] Fixed ported npu design to work with multi-rad code, but for single rad --- .../npu/modules/axis_inst_dispatch.cpp | 10 +- .../npu/modules/axis_mvu_sector.cpp | 6 +- .../npu/modules/axis_mvu_sector_chain.cpp | 4 +- .../npu/modules/axis_vector_elementwise.cpp | 2 +- .../npu/modules/mvu_sector.cpp | 4 +- .../npu/modules/mvu_sector.hpp | 3 +- rad-sim/example-designs/npu/npu_driver.cpp | 4 +- rad-sim/sim/main.cpp | 4 +- rad-sim/sim/noc/noc0_rad0_config | 2 +- rad-sim/sim/radsim_defines.hpp | 6 +- rad-sim/sim/radsim_knobs | 10 +- rad-sim/sim/sim.log | 4720 +++++++++++++++++ rad-sim/uni_config.yml | 10 +- 13 files changed, 4753 insertions(+), 32 deletions(-) diff --git a/rad-sim/example-designs/npu/modules/axis_inst_dispatch.cpp b/rad-sim/example-designs/npu/modules/axis_inst_dispatch.cpp index ccab465..c5ccce2 100644 --- a/rad-sim/example-designs/npu/modules/axis_inst_dispatch.cpp +++ b/rad-sim/example-designs/npu/modules/axis_inst_dispatch.cpp @@ -69,7 +69,7 @@ axis_inst_dispatch::axis_inst_dispatch(const sc_module_name& name, unsigned int module_name_str = "sector_" + std::to_string(sector_id) + "_mop_axis_interface_" + std::to_string(_thread_id); std::strcpy(module_name, module_name_str.c_str()); sector_mop_axis_interface[sector_id] = new axis_master_fifo_adapter>( - module_name, INSTRUCTION_INTERFACE, DEC_INSTRUCTION_INTERFACE_DATAW, 1, MVU_MOP_BITWIDTH, dest_name); + module_name, INSTRUCTION_INTERFACE, DEC_INSTRUCTION_INTERFACE_DATAW, 1, MVU_MOP_BITWIDTH, dest_name, radsim_design); sector_mop_axis_interface[sector_id]->clk(clk); sector_mop_axis_interface[sector_id]->rst(rst); sector_mop_axis_interface[sector_id]->fifo_rdy(sector_mop_rdy_signal[sector_id]); @@ -83,7 +83,7 @@ axis_inst_dispatch::axis_inst_dispatch(const sc_module_name& name, unsigned int module_name_str = "evrf_" + std::to_string(sector_id) + "_mop_axis_interface_" + std::to_string(_thread_id); std::strcpy(module_name, module_name_str.c_str()); evrf_mop_axis_interface[sector_id] = new axis_master_fifo_adapter>( - module_name, INSTRUCTION_INTERFACE, DEC_INSTRUCTION_INTERFACE_DATAW, 1, EVRF_MOP_BITWIDTH, dest_name); + module_name, INSTRUCTION_INTERFACE, DEC_INSTRUCTION_INTERFACE_DATAW, 1, EVRF_MOP_BITWIDTH, dest_name, radsim_design); evrf_mop_axis_interface[sector_id]->clk(clk); evrf_mop_axis_interface[sector_id]->rst(rst); evrf_mop_axis_interface[sector_id]->fifo_rdy(evrf_mop_rdy_signal[sector_id]); @@ -97,7 +97,7 @@ axis_inst_dispatch::axis_inst_dispatch(const sc_module_name& name, unsigned int module_name_str = "mfu0_" + std::to_string(sector_id) + "_mop_axis_interface_" + std::to_string(_thread_id); std::strcpy(module_name, module_name_str.c_str()); mfu0_mop_axis_interface[sector_id] = new axis_master_fifo_adapter>( - module_name, INSTRUCTION_INTERFACE, DEC_INSTRUCTION_INTERFACE_DATAW, 1, MFU_MOP_BITWIDTH, dest_name); + module_name, INSTRUCTION_INTERFACE, DEC_INSTRUCTION_INTERFACE_DATAW, 1, MFU_MOP_BITWIDTH, dest_name, radsim_design); mfu0_mop_axis_interface[sector_id]->clk(clk); mfu0_mop_axis_interface[sector_id]->rst(rst); mfu0_mop_axis_interface[sector_id]->fifo_rdy(mfu0_mop_rdy_signal[sector_id]); @@ -111,7 +111,7 @@ axis_inst_dispatch::axis_inst_dispatch(const sc_module_name& name, unsigned int module_name_str = "mfu1_" + std::to_string(sector_id) + "_mop_axis_interface_" + std::to_string(_thread_id); std::strcpy(module_name, module_name_str.c_str()); mfu1_mop_axis_interface[sector_id] = new axis_master_fifo_adapter>( - module_name, INSTRUCTION_INTERFACE, DEC_INSTRUCTION_INTERFACE_DATAW, 1, MFU_MOP_BITWIDTH, dest_name); + module_name, INSTRUCTION_INTERFACE, DEC_INSTRUCTION_INTERFACE_DATAW, 1, MFU_MOP_BITWIDTH, dest_name, radsim_design); mfu1_mop_axis_interface[sector_id]->clk(clk); mfu1_mop_axis_interface[sector_id]->rst(rst); mfu1_mop_axis_interface[sector_id]->fifo_rdy(mfu1_mop_rdy_signal[sector_id]); @@ -125,7 +125,7 @@ axis_inst_dispatch::axis_inst_dispatch(const sc_module_name& name, unsigned int module_name_str = "ld_mop_axis_interface_" + std::to_string(_thread_id); std::strcpy(module_name, module_name_str.c_str()); ld_mop_axis_interface = new axis_master_fifo_adapter>( - module_name, INSTRUCTION_INTERFACE, DEC_INSTRUCTION_INTERFACE_DATAW, 1, LD_MOP_BITWIDTH, dest_name); + module_name, INSTRUCTION_INTERFACE, DEC_INSTRUCTION_INTERFACE_DATAW, 1, LD_MOP_BITWIDTH, dest_name, radsim_design); ld_mop_axis_interface->clk(clk); ld_mop_axis_interface->rst(rst); ld_mop_axis_interface->fifo_rdy(ld_mop_rdy_signal); diff --git a/rad-sim/example-designs/npu/modules/axis_mvu_sector.cpp b/rad-sim/example-designs/npu/modules/axis_mvu_sector.cpp index a1e3890..67b6628 100644 --- a/rad-sim/example-designs/npu/modules/axis_mvu_sector.cpp +++ b/rad-sim/example-designs/npu/modules/axis_mvu_sector.cpp @@ -79,7 +79,7 @@ axis_mvu_sector::axis_mvu_sector(const sc_module_name& name, unsigned int sector std::strcpy(wb_interface_name, wb_interface_name_str.c_str()); wb_axis_interface[thread_id] = new axis_slave_fifo_adapter, sc_bv>( - wb_interface_name, MVU_WRITEBACK_INTERFACE, MVU_WRITEBACK_INTERFACE_DATAW, CORES, LOW_PRECISION, LANES); + wb_interface_name, MVU_WRITEBACK_INTERFACE, MVU_WRITEBACK_INTERFACE_DATAW, CORES, LOW_PRECISION, LANES, radsim_design); wb_axis_interface[thread_id]->clk(clk); wb_axis_interface[thread_id]->rst(rst); wb_axis_interface[thread_id]->fifo_rdy(wb_rdy_signal[thread_id]); @@ -97,7 +97,7 @@ axis_mvu_sector::axis_mvu_sector(const sc_module_name& name, unsigned int sector ofifo_axis_interface[thread_id] = new axis_master_fifo_adapter, sc_bv>( sector_ofifo_interface_name, FEEDFORWARD_INTERFACE, MVU_FEEDFORWARD_INTERFACE_DATAW, CORES, HIGH_PRECISION, - dest_name); + dest_name, radsim_design); ofifo_axis_interface[thread_id]->clk(clk); ofifo_axis_interface[thread_id]->rst(rst); ofifo_axis_interface[thread_id]->fifo_rdy(ofifo_rdy_signal[thread_id]); @@ -110,7 +110,7 @@ axis_mvu_sector::axis_mvu_sector(const sc_module_name& name, unsigned int sector char sector_name[NAME_LENGTH]; std::string sector_name_str = "sector" + std::to_string(_sector_id); std::strcpy(sector_name, sector_name_str.c_str()); - sector_module = new mvu_sector(sector_name, _sector_id); + sector_module = new mvu_sector(sector_name, _sector_id, radsim_design); sector_module->clk(clk); sector_module->rst(rst); sector_module->inst(uop_wdata_signal); diff --git a/rad-sim/example-designs/npu/modules/axis_mvu_sector_chain.cpp b/rad-sim/example-designs/npu/modules/axis_mvu_sector_chain.cpp index 5b3cdb5..ac5c608 100644 --- a/rad-sim/example-designs/npu/modules/axis_mvu_sector_chain.cpp +++ b/rad-sim/example-designs/npu/modules/axis_mvu_sector_chain.cpp @@ -78,7 +78,7 @@ axis_mvu_sector_chain::axis_mvu_sector_chain(const sc_module_name& name, unsigne ofifo_axis_interface[thread_id] = new axis_master_fifo_adapter, sc_bv>( sector_ofifo_interface_name, FEEDFORWARD_INTERFACE, MVU_FEEDFORWARD_INTERFACE_DATAW, CORES, HIGH_PRECISION, - dest_name); + dest_name, radsim_design); ofifo_axis_interface[thread_id]->clk(clk); ofifo_axis_interface[thread_id]->rst(rst); ofifo_axis_interface[thread_id]->fifo_rdy(ofifo_rdy_signal[thread_id]); @@ -91,7 +91,7 @@ axis_mvu_sector_chain::axis_mvu_sector_chain(const sc_module_name& name, unsigne char sector_name[NAME_LENGTH]; std::string sector_name_str = "sector" + std::to_string(_sector_id); std::strcpy(sector_name, sector_name_str.c_str()); - sector_module = new mvu_sector(sector_name, _sector_id); + sector_module = new mvu_sector(sector_name, _sector_id, radsim_design); sector_module->clk(clk); sector_module->rst(rst); sector_module->inst(uop_wdata_signal); diff --git a/rad-sim/example-designs/npu/modules/axis_vector_elementwise.cpp b/rad-sim/example-designs/npu/modules/axis_vector_elementwise.cpp index 4964a79..18d6e13 100644 --- a/rad-sim/example-designs/npu/modules/axis_vector_elementwise.cpp +++ b/rad-sim/example-designs/npu/modules/axis_vector_elementwise.cpp @@ -148,7 +148,7 @@ axis_vector_elementwise::axis_vector_elementwise(const sc_module_name& name, uns std::strcpy(module_name, module_name_str.c_str()); evrf_ififo_axis_interfaces[sector_id] = new axis_slave_fifo_adapter, sc_bv>( - module_name, FEEDFORWARD_INTERFACE, VEW_FEEDFORWARD_INTERFACE_DATAW, CORES, HIGH_PRECISION, DPES_PER_SECTOR); + module_name, FEEDFORWARD_INTERFACE, VEW_FEEDFORWARD_INTERFACE_DATAW, CORES, HIGH_PRECISION, DPES_PER_SECTOR, radsim_design); evrf_ififo_axis_interfaces[sector_id]->clk(clk); evrf_ififo_axis_interfaces[sector_id]->rst(rst); evrf_ififo_axis_interfaces[sector_id]->fifo_rdy(evrf_ififo_rdy_signal[sector_id]); diff --git a/rad-sim/example-designs/npu/modules/mvu_sector.cpp b/rad-sim/example-designs/npu/modules/mvu_sector.cpp index 31a1500..1a8815d 100644 --- a/rad-sim/example-designs/npu/modules/mvu_sector.cpp +++ b/rad-sim/example-designs/npu/modules/mvu_sector.cpp @@ -1,6 +1,6 @@ #include "mvu_sector.hpp" -mvu_sector::mvu_sector(const sc_module_name& name, unsigned int id) +mvu_sector::mvu_sector(const sc_module_name& name, unsigned int id, RADSimDesignContext* radsim_design) : sc_module(name), inst_valid_pipeline("inst_valid_pipeline", SECTOR_INST_TO_DPES_PIPELINE), inst_pipeline("inst_pipeline", SECTOR_INST_PIPELINE), @@ -173,7 +173,7 @@ mvu_sector::mvu_sector(const sc_module_name& name, unsigned int id) mrfs.resize(DPES_PER_SECTOR); std::string mrf_filename, mrf_path; - std::string npu_dir = radsim_config.GetStringKnob("radsim_user_design_root_dir"); + std::string npu_dir = radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); for (unsigned int dpe_id = 0; dpe_id < DPES_PER_SECTOR; dpe_id++) { mrfs[dpe_id].resize(TILES); for (unsigned int tile_id = 0; tile_id < TILES; tile_id++) { diff --git a/rad-sim/example-designs/npu/modules/mvu_sector.hpp b/rad-sim/example-designs/npu/modules/mvu_sector.hpp index afb732c..46234b0 100644 --- a/rad-sim/example-designs/npu/modules/mvu_sector.hpp +++ b/rad-sim/example-designs/npu/modules/mvu_sector.hpp @@ -11,6 +11,7 @@ #include #include #include +#include class mvu_sector : public sc_module { private: @@ -92,7 +93,7 @@ class mvu_sector : public sc_module { sc_vector>> sector_ofifo_ren; sc_vector>>> sector_ofifo_rdata; - mvu_sector(const sc_module_name& name, unsigned int id); + mvu_sector(const sc_module_name& name, unsigned int id, RADSimDesignContext* radsim_design); ~mvu_sector(); void Tick(); diff --git a/rad-sim/example-designs/npu/npu_driver.cpp b/rad-sim/example-designs/npu/npu_driver.cpp index b1f4411..e51292d 100644 --- a/rad-sim/example-designs/npu/npu_driver.cpp +++ b/rad-sim/example-designs/npu/npu_driver.cpp @@ -43,7 +43,7 @@ npu_driver::~npu_driver() {} void npu_driver::source() { bool parse_flag; - std::string npu_dir = radsim_config.GetStringKnob("radsim_user_design_root_dir"); + std::string npu_dir = radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); // Parse NPU instructions std::string inst_filename = "/register_files/instructions.txt"; @@ -181,7 +181,7 @@ void npu_driver::sink() { end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); std::ofstream report; - std::string npu_dir = radsim_config.GetStringKnob("radsim_user_design_root_dir"); + std::string npu_dir = radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); std::string report_filename = "/sim_done"; std::string report_path = npu_dir + report_filename; report.open(report_path); diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 14d3ccc..d0c5095 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -7,7 +7,7 @@ #include #include -#include +#include RADSimConfig radsim_config; std::ostream *gWatchOut; @@ -31,7 +31,7 @@ int sc_main(int argc, char *argv[]) { sc_clock *driver_clk_sig0 = new sc_clock( "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); - mlp_int8_system *system0 = new mlp_int8_system("mlp_int8_system", driver_clk_sig0, cluster->all_rads[0]); + npu_system *system0 = new npu_system("npu_system", driver_clk_sig0, cluster->all_rads[0]); cluster->StoreSystem(system0); sc_clock *inter_rad_clk_sig = new sc_clock( diff --git a/rad-sim/sim/noc/noc0_rad0_config b/rad-sim/sim/noc/noc0_rad0_config index f24533c..fa20978 100644 --- a/rad-sim/sim/noc/noc0_rad0_config +++ b/rad-sim/sim/noc/noc0_rad0_config @@ -1,6 +1,6 @@ // Topology topology = mesh; -k = 5; +k = 10; n = 2; // Routing diff --git a/rad-sim/sim/radsim_defines.hpp b/rad-sim/sim/radsim_defines.hpp index 94c69d1..249b544 100644 --- a/rad-sim/sim/radsim_defines.hpp +++ b/rad-sim/sim/radsim_defines.hpp @@ -8,7 +8,7 @@ #define NOC_LINKS_VCID_WIDTH 3 #define NOC_LINKS_PACKETID_WIDTH 32 #define NOC_LINKS_TYPEID_WIDTH 3 -#define NOC_LINKS_DEST_WIDTH 15 +#define NOC_LINKS_DEST_WIDTH 21 #define NOC_LINKS_DEST_INTERFACE_WIDTH 5 #define NOC_LINKS_WIDTH (NOC_LINKS_PAYLOAD_WIDTH + NOC_LINKS_VCID_WIDTH + NOC_LINKS_PACKETID_WIDTH + NOC_LINKS_DEST_WIDTH + NOC_LINKS_DEST_INTERFACE_WIDTH) @@ -23,14 +23,14 @@ #define AXIS_KEEPW 8 #define AXIS_IDW NOC_LINKS_PACKETID_WIDTH #define AXIS_DESTW NOC_LINKS_DEST_WIDTH -#define AXIS_DEST_FIELDW 5 +#define AXIS_DEST_FIELDW 7 #define AXI4_IDW 8 #define AXI4_ADDRW 64 #define AXI4_LENW 8 #define AXI4_SIZEW 3 #define AXI4_BURSTW 2 #define AXI4_RESPW 2 -#define AXI4_NODE_ADDRW 5 +#define AXI4_NODE_ADDRW 7 #define AXI4_CTRLW (AXI4_LENW + AXI4_SIZEW + AXI4_BURSTW) // AXI Packetization Defines diff --git a/rad-sim/sim/radsim_knobs b/rad-sim/sim/radsim_knobs index bd1360a..3fa3bf6 100644 --- a/rad-sim/sim/radsim_knobs +++ b/rad-sim/sim/radsim_knobs @@ -1,22 +1,22 @@ -design_name 0 mlp_int8 +design_name 0 npu noc_num_nocs 0 1 noc_clk_period 0 1.0 noc_vcs 0 5 noc_payload_width 0 166 -noc_num_nodes 0 25 -design_noc_placement 0 mlp.place +noc_num_nodes 0 100 +design_noc_placement 0 npu.place noc_adapters_clk_period 0 1.25 noc_adapters_fifo_size 0 16 noc_adapters_obuff_size 0 2 noc_adapters_in_arbiter 0 fixed_rr noc_adapters_out_arbiter 0 priority_rr noc_adapters_vc_mapping 0 direct -design_clk_periods 0 5.0 +design_clk_periods 0 5.0 2.5 dram_num_controllers 0 0 dram_clk_periods 0 2.0 dram_queue_sizes 0 64 dram_config_files 0 HBM2_8Gb_x128 -radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/mlp_int8 +radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/npu radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim sim_driver_period 5.0 telemetry_log_verbosity 2 diff --git a/rad-sim/sim/sim.log b/rad-sim/sim/sim.log index e69de29..15e184f 100644 --- a/rad-sim/sim/sim.log +++ b/rad-sim/sim/sim.log @@ -0,0 +1,4720 @@ +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 164: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 165: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 166: Tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 185: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 186: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 187: Tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 206: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 207: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 208: Tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 224: Thread 0 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 225: Thread 0 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 226: Thread 0 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 227: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 227: Thread 0 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 228: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 228: Thread 0 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 229: Tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 229: Thread 0 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 230: Thread 0 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 231: Thread 0 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 232: Thread 0 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 233: Thread 0 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 248: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 249: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 250: Tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 269: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 270: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 271: Tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 287: Thread 1 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 287: Thread 0 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 288: Thread 1 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 288: Thread 0 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 289: Thread 1 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 289: Thread 0 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 290: Thread 1 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 290: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 290: Thread 0 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 291: Thread 1 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 291: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 291: Thread 0 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 292: Thread 1 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 292: Tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 292: Thread 0 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 293: Thread 1 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 293: Thread 0 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 294: Thread 1 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 294: Thread 0 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 295: Thread 1 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 295: Thread 0 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 296: Thread 1 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 296: Thread 0 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 345: Thread 0 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 346: Thread 0 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 347: Thread 0 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 348: Thread 0 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 349: Thread 0 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 350: Thread 0 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 351: Thread 0 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 352: Thread 0 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 353: Thread 0 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 354: Thread 0 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 401: Thread 2 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 402: Thread 2 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 402: Thread 1 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 403: Thread 0 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 403: Thread 2 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 403: Thread 1 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 404: Thread 0 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 404: Thread 2 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 404: Thread 1 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 405: Thread 0 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 405: Thread 2 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 405: Thread 1 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 406: Thread 0 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 406: Thread 2 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 406: Thread 1 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 407: Thread 0 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 407: Thread 2 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 407: Thread 1 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 408: Thread 0 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 408: Thread 2 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 408: Thread 3 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 408: Thread 1 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 409: Thread 0 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 409: Thread 2 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 409: Thread 3 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 409: Thread 1 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 410: Thread 0 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 410: Thread 2 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 410: Thread 3 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 410: Thread 1 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 411: Thread 0 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 411: Thread 3 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 411: Thread 1 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 412: Thread 0 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 412: Thread 3 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 413: Thread 3 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 414: Thread 3 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 415: Thread 3 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 416: Thread 3 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 417: Thread 3 tag is updated to 1 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 460: Thread 0 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 461: Thread 0 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 462: Thread 0 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 463: Thread 0 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 464: Thread 0 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 465: Thread 0 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 466: Thread 0 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 467: Thread 0 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 468: Thread 0 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 469: Thread 0 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 517: Thread 1 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 518: Thread 0 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 518: Thread 1 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 519: Thread 0 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 519: Thread 1 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 520: Thread 0 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 520: Thread 1 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 521: Thread 0 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 521: Thread 1 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 522: Thread 0 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 522: Thread 1 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 523: Thread 0 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 523: Thread 1 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 524: Thread 0 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 524: Thread 1 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 525: Thread 0 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 525: Thread 1 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 526: Thread 0 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 526: Thread 1 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 527: Thread 0 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 575: Thread 0 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 576: Thread 0 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 577: Thread 0 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 578: Thread 0 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 579: Thread 0 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 580: Thread 0 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 581: Thread 0 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 582: Thread 0 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 583: Thread 0 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 584: Thread 0 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 613: Thread 2 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 614: Thread 1 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 614: Thread 2 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 615: Thread 1 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 615: Thread 2 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 616: Thread 1 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 616: Thread 2 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 617: Thread 1 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 617: Thread 2 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 618: Thread 3 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 618: Thread 1 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 618: Thread 2 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 619: Thread 3 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 619: Thread 1 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 619: Thread 2 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 620: Thread 3 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 620: Thread 1 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 620: Thread 2 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 621: Thread 3 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 621: Thread 1 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 621: Thread 2 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 622: Thread 3 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 622: Thread 1 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 622: Thread 2 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 623: Thread 3 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 623: Thread 1 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 624: Thread 3 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 625: Thread 3 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 626: Thread 3 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 627: Thread 3 tag is updated to 2 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 690: Thread 1 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 691: Thread 1 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 692: Thread 1 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 693: Thread 1 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 694: Thread 1 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 695: Thread 1 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 696: Thread 1 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 697: Thread 1 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 698: Thread 1 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 699: Thread 1 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 766: Thread 2 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 767: Thread 1 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 767: Thread 2 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 768: Thread 1 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 768: Thread 2 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 769: Thread 1 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 769: Thread 2 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 770: Thread 1 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 770: Thread 2 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 771: Thread 3 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 771: Thread 1 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 771: Thread 2 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 772: Thread 3 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 772: Thread 1 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 772: Thread 2 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 773: Thread 3 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 773: Thread 1 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 773: Thread 2 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 774: Thread 3 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 774: Thread 1 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 774: Thread 2 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 775: Thread 3 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 775: Thread 1 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 775: Thread 2 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 776: Thread 3 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 776: Thread 1 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 777: Thread 3 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 778: Thread 3 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 779: Thread 3 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 780: Thread 3 tag is updated to 3 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 844: Thread 1 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 845: Thread 1 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 846: Thread 1 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 847: Thread 1 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 848: Thread 1 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 849: Thread 1 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 850: Thread 1 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 851: Thread 1 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 852: Thread 1 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 853: Thread 1 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 882: Thread 2 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 883: Thread 2 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 884: Thread 2 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 885: Thread 3 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 885: Thread 2 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 886: Thread 3 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 886: Thread 2 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 887: Thread 3 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 887: Thread 2 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 888: Thread 3 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 888: Thread 2 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 889: Thread 3 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 889: Thread 2 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 890: Thread 3 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 890: Thread 2 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 891: Thread 3 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 891: Thread 2 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 892: Thread 3 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 893: Thread 3 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 894: Thread 3 tag is updated to 4 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 954: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 954: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 954: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 954: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 954: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 954: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 954: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 954: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 954: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 954: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 955: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 955: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 955: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 955: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 955: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 955: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 955: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 955: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 955: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 955: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 956: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 956: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 956: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 956: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 956: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 956: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 956: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 956: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 956: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 956: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 959: Thread 2 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 960: Thread 2 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 961: Thread 2 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 962: Thread 3 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 962: Thread 2 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 963: Thread 3 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 963: Thread 2 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 964: Thread 3 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 964: Thread 2 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 965: Thread 3 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 965: Thread 2 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 966: Thread 3 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 966: Thread 0 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 966: Thread 2 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 967: Thread 3 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 967: Thread 0 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 967: Thread 2 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 968: Thread 3 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 968: Thread 0 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 968: Thread 2 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 969: Thread 3 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 969: Thread 0 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 970: Thread 3 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 970: Thread 0 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 971: Thread 3 tag is updated to 5 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 971: Thread 0 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 972: Thread 0 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 973: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 973: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 973: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 973: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 973: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 973: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 973: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 973: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 973: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 973: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 973: Thread 0 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 974: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 974: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 974: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 974: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 974: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 974: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 974: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 974: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 974: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 974: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 974: Thread 0 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 975: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 975: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 975: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 975: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 975: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 975: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 975: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 975: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 975: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 975: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 975: Thread 0 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 992: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 992: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 992: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 992: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 992: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 992: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 992: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 992: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 992: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 992: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 993: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 993: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 993: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 993: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 993: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 993: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 993: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 993: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 993: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 993: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 994: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 994: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 994: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 994: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 994: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 994: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 994: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 994: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 994: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 994: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1011: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1011: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1011: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1011: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1011: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1011: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1011: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1011: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1011: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1011: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1012: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1012: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1012: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1012: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1012: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1012: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1012: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1012: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1012: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1012: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1013: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1013: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1013: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1013: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1013: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1013: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1013: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1013: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1013: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1013: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1025: Thread 0 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1026: Thread 0 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1027: Thread 0 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1028: Thread 0 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1029: Thread 0 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1030: Thread 0 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1030: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1030: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1030: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1030: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1030: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1030: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1030: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1030: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1030: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1030: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1031: Thread 0 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1031: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1031: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1031: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1031: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1031: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1031: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1031: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1031: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1031: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1031: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1032: Thread 0 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1032: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1032: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1032: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1032: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1032: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1032: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1032: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1032: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1032: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1032: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1033: Thread 0 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1034: Thread 0 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1049: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1049: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1049: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1049: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1049: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1049: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1049: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1049: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1049: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1049: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1050: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1050: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1050: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1050: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1050: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1050: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1050: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1050: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1050: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1050: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1051: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1051: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1051: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1051: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1051: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1051: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1051: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1051: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1051: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1051: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1068: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1068: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1068: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1068: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1068: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1068: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1068: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1068: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1068: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1068: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1069: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1069: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1069: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1069: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1069: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1069: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1069: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1069: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1069: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1069: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1070: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1070: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1070: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1070: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1070: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1070: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1070: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1070: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1070: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1070: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1072: Thread 2 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1073: Thread 2 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1074: Thread 2 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1075: Thread 2 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1076: Thread 3 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1076: Thread 2 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1077: Thread 3 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1077: Thread 2 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1078: Thread 3 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1078: Thread 2 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1079: Thread 3 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1079: Thread 2 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1080: Thread 3 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1080: Thread 2 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1081: Thread 3 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1081: Thread 2 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1082: Thread 3 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1082: Thread 0 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1083: Thread 3 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1083: Thread 0 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1084: Thread 3 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1084: Thread 0 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1085: Thread 3 tag is updated to 6 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1085: Thread 0 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1086: Thread 0 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1087: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1087: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1087: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1087: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1087: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1087: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1087: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1087: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1087: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1087: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1087: Thread 0 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1088: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1088: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1088: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1088: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1088: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1088: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1088: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1088: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1088: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1088: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1088: Thread 0 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1089: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1089: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1089: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1089: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1089: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1089: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1089: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1089: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1089: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1089: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1089: Thread 0 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1090: Thread 0 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1091: Thread 0 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1106: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1106: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1106: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1106: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1106: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1106: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1106: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1106: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1106: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1106: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1107: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1107: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1107: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1107: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1107: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1107: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1107: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1107: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1107: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1107: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1108: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1108: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1108: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1108: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1108: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1108: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1108: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1108: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1108: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1108: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1125: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1125: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1125: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1125: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1125: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1125: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1125: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1125: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1125: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1125: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1126: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1126: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1126: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1126: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1126: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1126: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1126: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1126: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1126: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1126: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1127: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1127: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1127: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1127: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1127: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1127: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1127: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1127: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1127: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1127: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1140: Thread 0 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1141: Thread 0 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1142: Thread 0 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1143: Thread 0 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1144: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1144: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1144: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1144: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1144: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1144: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1144: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1144: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1144: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1144: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1144: Thread 0 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1145: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1145: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1145: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1145: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1145: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1145: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1145: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1145: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1145: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1145: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1145: Thread 0 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1146: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1146: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1146: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1146: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1146: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1146: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1146: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1146: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1146: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1146: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1146: Thread 0 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1147: Thread 0 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1148: Thread 0 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1149: Thread 0 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1163: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1163: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1163: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1163: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1163: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1163: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1163: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1163: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1163: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1163: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1164: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1164: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1164: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1164: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1164: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1164: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1164: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1164: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1164: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1164: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1165: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1165: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1165: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1165: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1165: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1165: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1165: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1165: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1165: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1165: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1182: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1182: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1182: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1182: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1182: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1182: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1182: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1182: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1182: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1182: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1183: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1183: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1183: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1183: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1183: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1183: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1183: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1183: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1183: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1183: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1184: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1184: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1184: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1184: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1184: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1184: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1184: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1184: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1184: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1184: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1187: Thread 2 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1188: Thread 2 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1189: Thread 2 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1190: Thread 3 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1190: Thread 2 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1191: Thread 3 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1191: Thread 2 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1192: Thread 3 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1192: Thread 2 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1193: Thread 3 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1193: Thread 2 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1194: Thread 3 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1194: Thread 2 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1195: Thread 3 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1195: Thread 0 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1195: Thread 2 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1196: Thread 3 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1196: Thread 0 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1196: Thread 2 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1197: Thread 3 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1197: Thread 0 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1198: Thread 3 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1198: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1198: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1198: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1198: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1198: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1198: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1198: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1198: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1198: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1198: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1198: Thread 0 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1199: Thread 3 tag is updated to 7 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1199: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1199: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1199: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1199: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1199: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1199: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1199: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1199: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1199: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1199: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1199: Thread 0 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1200: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1200: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1200: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1200: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1200: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1200: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1200: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1200: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1200: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1200: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1200: Thread 0 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1201: Thread 0 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1202: Thread 0 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1203: Thread 0 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1204: Thread 0 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1217: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1217: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1217: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1217: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1217: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1217: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1217: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1217: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1217: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1217: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1218: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1218: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1218: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1218: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1218: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1218: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1218: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1218: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1218: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1218: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1219: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1219: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1219: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1219: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1219: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1219: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1219: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1219: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1219: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1219: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1232: Thread 1 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1233: Thread 1 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1234: Thread 1 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1235: Thread 1 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1236: Thread 1 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1236: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1236: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1236: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1236: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1236: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1236: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1236: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1236: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1236: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1236: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1236: Thread 0 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1237: Thread 1 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1237: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1237: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1237: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1237: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1237: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1237: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1237: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1237: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1237: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1237: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1237: Thread 0 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1238: Thread 1 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1238: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1238: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1238: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1238: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1238: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1238: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1238: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1238: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1238: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1238: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1238: Thread 0 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1239: Thread 1 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1239: Thread 0 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1240: Thread 1 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1240: Thread 0 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1241: Thread 1 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1241: Thread 0 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1242: Thread 0 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1243: Thread 0 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1244: Thread 0 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1245: Thread 0 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1255: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1255: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1255: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1255: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1255: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1255: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1255: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1255: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1255: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1255: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1256: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1256: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1256: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1256: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1256: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1256: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1256: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1256: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1256: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1256: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1257: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1257: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1257: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1257: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1257: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1257: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1257: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1257: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1257: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1257: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1274: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1274: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1274: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1274: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1274: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1274: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1274: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1274: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1274: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1274: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1275: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1275: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1275: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1275: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1275: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1275: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1275: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1275: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1275: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1275: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1276: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1276: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1276: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1276: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1276: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1276: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1276: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1276: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1276: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1276: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1289: Thread 1 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1290: Thread 1 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1291: Thread 1 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1292: Thread 1 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1293: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1293: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1293: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1293: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1293: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1293: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1293: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1293: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1293: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1293: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1293: Thread 1 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1294: Thread 0 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1294: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1294: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1294: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1294: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1294: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1294: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1294: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1294: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1294: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1294: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1294: Thread 1 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1295: Thread 0 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1295: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1295: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1295: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1295: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1295: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1295: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1295: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1295: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1295: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1295: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1295: Thread 1 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1296: Thread 0 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1296: Thread 1 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1297: Thread 0 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1297: Thread 1 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1298: Thread 0 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1298: Thread 1 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1299: Thread 0 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1300: Thread 0 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1301: Thread 0 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1302: Thread 0 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1303: Thread 0 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1312: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1312: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1312: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1312: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1312: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1312: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1312: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1312: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1312: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1312: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1313: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1313: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1313: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1313: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1313: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1313: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1313: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1313: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1313: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1313: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1314: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1314: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1314: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1314: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1314: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1314: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1314: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1314: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1314: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1314: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1331: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1331: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1331: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1331: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1331: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1331: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1331: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1331: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1331: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1331: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1332: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1332: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1332: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1332: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1332: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1332: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1332: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1332: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1332: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1332: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1333: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1333: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1333: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1333: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1333: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1333: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1333: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1333: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1333: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1333: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1347: Thread 1 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1348: Thread 1 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1349: Thread 1 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1350: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1350: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1350: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1350: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1350: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1350: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1350: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1350: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1350: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1350: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1350: Thread 1 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1351: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1351: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1351: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1351: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1351: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1351: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1351: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1351: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1351: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1351: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1351: Thread 0 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1351: Thread 1 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1352: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1352: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1352: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1352: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1352: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1352: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1352: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1352: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1352: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1352: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1352: Thread 0 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1352: Thread 1 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1353: Thread 0 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1353: Thread 1 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1354: Thread 0 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1354: Thread 1 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1355: Thread 0 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1355: Thread 1 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1356: Thread 0 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1356: Thread 1 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1357: Thread 0 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1358: Thread 0 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1359: Thread 0 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1360: Thread 0 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1369: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1369: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1369: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1369: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1369: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1369: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1369: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1369: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1369: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1369: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1370: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1370: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1370: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1370: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1370: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1370: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1370: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1370: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1370: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1370: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1371: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1371: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1371: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1371: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1371: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1371: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1371: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1371: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1371: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1371: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1388: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1388: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1388: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1388: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1388: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1388: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1388: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1388: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1388: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1388: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1389: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1389: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1389: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1389: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1389: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1389: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1389: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1389: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1389: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1389: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1390: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1390: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1390: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1390: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1390: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1390: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1390: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1390: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1390: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1390: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1405: Thread 1 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1406: Thread 1 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1407: Thread 1 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1407: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1407: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1407: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1407: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1407: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1407: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1407: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1407: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1407: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1407: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1408: Thread 1 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1408: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1408: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1408: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1408: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1408: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1408: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1408: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1408: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1408: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1408: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1409: Thread 0 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1409: Thread 1 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1409: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1409: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1409: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1409: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1409: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1409: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1409: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1409: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1409: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1409: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1410: Thread 0 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1410: Thread 1 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1411: Thread 0 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1411: Thread 1 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1412: Thread 0 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1412: Thread 1 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1413: Thread 0 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1413: Thread 1 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1414: Thread 0 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1414: Thread 1 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1415: Thread 0 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1416: Thread 0 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1417: Thread 0 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1418: Thread 0 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1426: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1426: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1426: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1426: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1426: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1426: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1426: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1426: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1426: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1426: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1427: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1427: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1427: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1427: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1427: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1427: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1427: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1427: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1427: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1427: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1428: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1428: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1428: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1428: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1428: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1428: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1428: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1428: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1428: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1428: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1445: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1445: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1445: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1445: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1445: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1445: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1445: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1445: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1445: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1445: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1446: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1446: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1446: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1446: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1446: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1446: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1446: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1446: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1446: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1446: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1447: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1447: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1447: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1447: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1447: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1447: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1447: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1447: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1447: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1447: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1461: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1461: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1461: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1461: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1461: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1461: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1461: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1461: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1461: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1461: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1462: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1462: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1462: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1462: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1462: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1462: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1462: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1462: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1462: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1462: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1462: Thread 1 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1463: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1463: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1463: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1463: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1463: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1463: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1463: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1463: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1463: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1463: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1463: Thread 1 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1464: Thread 1 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1465: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1465: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1465: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1465: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1465: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1465: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1465: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1465: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1465: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1465: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1465: Thread 1 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1466: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1466: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1466: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1466: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1466: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1466: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1466: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1466: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1466: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1466: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1466: Thread 0 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1466: Thread 1 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1467: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1467: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1467: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1467: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1467: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1467: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1467: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1467: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1467: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1467: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1467: Thread 0 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1467: Thread 1 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1468: Thread 0 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1468: Thread 1 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1469: Thread 0 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1469: Thread 1 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1470: Thread 0 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1470: Thread 1 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1471: Thread 0 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1471: Thread 1 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1472: Thread 0 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1473: Thread 0 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1474: Thread 0 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1475: Thread 0 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1484: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1484: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1484: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1484: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1484: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1484: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1484: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1484: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1484: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1484: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1485: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1485: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1485: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1485: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1485: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1485: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1485: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1485: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1485: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1485: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1486: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1486: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1486: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1486: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1486: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1486: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1486: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1486: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1486: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1486: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1491: Thread 2 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1492: Thread 2 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1493: Thread 2 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1494: Thread 2 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1495: Thread 2 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1496: Thread 2 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1497: Thread 2 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1498: Thread 2 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1499: Thread 2 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1500: Thread 2 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1503: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1503: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1503: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1503: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1503: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1503: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1503: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1503: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1503: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1503: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1504: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1504: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1504: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1504: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1504: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1504: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1504: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1504: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1504: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1504: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1505: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1505: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1505: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1505: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1505: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1505: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1505: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1505: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1505: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1505: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1522: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1522: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1522: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1522: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1522: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1522: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1522: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1522: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1522: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1522: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1523: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1523: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1523: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1523: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1523: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1523: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1523: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1523: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1523: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1523: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1524: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1524: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1524: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1524: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1524: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1524: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1524: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1524: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1524: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1524: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1524: Thread 0 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1525: Thread 0 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1526: Thread 0 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1527: Thread 0 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1528: Thread 0 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1529: Thread 0 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1530: Thread 0 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1531: Thread 0 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1532: Thread 0 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1533: Thread 0 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1541: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1541: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1541: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1541: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1541: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1541: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1541: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1541: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1541: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1541: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1542: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1542: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1542: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1542: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1542: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1542: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1542: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1542: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1542: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1542: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1543: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1543: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1543: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1543: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1543: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1543: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1543: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1543: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1543: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1543: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1555: Thread 1 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1556: Thread 1 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1557: Thread 1 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1558: Thread 1 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1559: Thread 1 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1560: Thread 1 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1560: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1560: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1560: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1560: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1560: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1560: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1560: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1560: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1560: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1560: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1561: Thread 1 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1561: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1561: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1561: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1561: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1561: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1561: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1561: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1561: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1561: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1561: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1562: Thread 1 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1562: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1562: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1562: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1562: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1562: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1562: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1562: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1562: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1562: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1562: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1563: Thread 1 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1564: Thread 1 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1579: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1579: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1579: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1579: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1579: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1579: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1579: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1579: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1579: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1579: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1580: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1580: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1580: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1580: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1580: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1580: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1580: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1580: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1580: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1580: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1581: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1581: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1581: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1581: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1581: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1581: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1581: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1581: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1581: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1581: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1582: Thread 0 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1583: Thread 0 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1584: Thread 0 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1585: Thread 0 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1586: Thread 0 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1587: Thread 0 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1588: Thread 0 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1589: Thread 0 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1590: Thread 0 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1591: Thread 0 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1598: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1598: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1598: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1598: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1598: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1598: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1598: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1598: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1598: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1598: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1599: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1599: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1599: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1599: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1599: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1599: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1599: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1599: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1599: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1599: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1600: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1600: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1600: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1600: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1600: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1600: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1600: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1600: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1600: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1600: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1606: Thread 2 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1607: Thread 2 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1608: Thread 2 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1609: Thread 2 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1610: Thread 2 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1611: Thread 2 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1612: Thread 2 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1613: Thread 2 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1614: Thread 2 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1615: Thread 2 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1617: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1617: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1617: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1617: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1617: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1617: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1617: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1617: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1617: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1617: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1618: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1618: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1618: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1618: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1618: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1618: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1618: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1618: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1618: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1618: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1619: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1619: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1619: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1619: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1619: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1619: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1619: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1619: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1619: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1619: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1636: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1636: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1636: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1636: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1636: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1636: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1636: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1636: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1636: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1636: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1637: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1637: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1637: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1637: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1637: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1637: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1637: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1637: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1637: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1637: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1638: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1638: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1638: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1638: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1638: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1638: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1638: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1638: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1638: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1638: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1639: Thread 0 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1640: Thread 0 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1641: Thread 0 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1642: Thread 0 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1643: Thread 0 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1644: Thread 0 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1645: Thread 0 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1646: Thread 0 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1647: Thread 0 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1648: Thread 0 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1655: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1655: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1655: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1655: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1655: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1655: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1655: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1655: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1655: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1655: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1656: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1656: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1656: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1656: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1656: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1656: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1656: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1656: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1656: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1656: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1657: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1657: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1657: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1657: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1657: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1657: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1657: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1657: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1657: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1657: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1670: Thread 1 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1671: Thread 1 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1672: Thread 1 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1673: Thread 1 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1674: Thread 1 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1674: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1674: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1674: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1674: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1674: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1674: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1674: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1674: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1674: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1674: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1675: Thread 1 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1675: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1675: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1675: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1675: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1675: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1675: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1675: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1675: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1675: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1675: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1676: Thread 1 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1676: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1676: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1676: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1676: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1676: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1676: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1676: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1676: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1676: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1676: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1677: Thread 1 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1678: Thread 1 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1679: Thread 1 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1686: Thread 0 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1687: Thread 0 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1688: Thread 0 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1689: Thread 0 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1690: Thread 0 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1691: Thread 0 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1692: Thread 0 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1693: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1693: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1693: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1693: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1693: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1693: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1693: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1693: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1693: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1693: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1693: Thread 0 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1694: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1694: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1694: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1694: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1694: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1694: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1694: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1694: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1694: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1694: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1694: Thread 0 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1695: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1695: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1695: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1695: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1695: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1695: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1695: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1695: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1695: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1695: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1695: Thread 0 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1709: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1709: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1709: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1709: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1709: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1709: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1709: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1709: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1709: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1709: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1710: Thread 2 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1710: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1710: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1710: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1710: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1710: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1710: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1710: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1710: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1710: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1710: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1711: Thread 2 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1711: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1711: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1711: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1711: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1711: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1711: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1711: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1711: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1711: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1711: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1712: Thread 2 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1713: Thread 2 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1714: Thread 2 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1715: Thread 2 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1716: Thread 2 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1717: Thread 2 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1718: Thread 2 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1719: Thread 2 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1752: Thread 1 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1753: Thread 1 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1754: Thread 1 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1755: Thread 1 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1756: Thread 1 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1757: Thread 1 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1758: Thread 1 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1759: Thread 1 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1760: Thread 1 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1761: Thread 1 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1787: Thread 2 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1788: Thread 2 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1789: Thread 2 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1790: Thread 2 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1791: Thread 2 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1792: Thread 2 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1793: Thread 2 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1794: Thread 2 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1795: Thread 2 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1796: Thread 2 tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1816: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1816: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1816: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1816: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1816: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1816: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1816: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1816: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1816: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1816: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1817: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1817: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1817: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1817: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1817: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1817: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1817: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1817: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1817: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1817: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1818: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1818: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1818: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1818: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1818: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1818: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1818: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1818: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1818: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1818: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1829: Thread 0 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1830: Thread 0 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1831: Thread 1 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1831: Thread 0 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1832: Thread 1 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1832: Thread 0 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1833: Thread 1 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1833: Thread 0 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1834: Thread 1 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1834: Thread 0 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1835: Thread 1 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1835: Thread 0 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1835: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1835: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1835: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1835: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1835: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1835: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1835: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1835: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1835: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1835: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1836: Thread 1 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1836: Thread 0 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1836: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1836: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1836: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1836: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1836: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1836: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1836: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1836: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1836: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1836: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1837: Thread 1 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1837: Thread 0 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1837: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1837: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1837: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1837: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1837: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1837: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1837: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1837: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1837: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1837: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1838: Thread 1 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1838: Thread 0 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1839: Thread 1 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1840: Thread 1 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1854: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1854: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1854: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1854: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1854: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1854: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1854: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1854: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1854: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1854: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1855: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1855: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1855: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1855: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1855: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1855: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1855: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1855: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1855: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1855: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1856: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1856: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1856: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1856: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1856: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1856: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1856: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1856: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1856: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1856: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1873: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1873: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1873: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1873: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1873: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1873: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1873: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1873: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1873: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1873: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1874: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1874: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1874: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1874: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1874: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1874: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1874: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1874: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1874: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1874: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1875: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1875: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1875: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1875: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1875: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1875: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1875: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1875: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1875: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1875: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1882: Thread 2 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1883: Thread 2 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1884: Thread 2 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1885: Thread 2 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1886: Thread 0 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1886: Thread 2 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1887: Thread 0 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1887: Thread 2 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1888: Thread 0 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1888: Thread 2 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1889: Thread 0 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1889: Thread 2 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1890: Thread 0 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1890: Thread 2 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1891: Thread 0 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1891: Thread 2 tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1892: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1892: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1892: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1892: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1892: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1892: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1892: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1892: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1892: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1892: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1892: Thread 0 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1893: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1893: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1893: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1893: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1893: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1893: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1893: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1893: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1893: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1893: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1893: Thread 0 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1894: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1894: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1894: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1894: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1894: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1894: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1894: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1894: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1894: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1894: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1894: Thread 0 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1895: Thread 0 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1911: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1911: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1911: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1911: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1911: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1911: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1911: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1911: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1911: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1911: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1912: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1912: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1912: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1912: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1912: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1912: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1912: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1912: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1912: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1912: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1913: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1913: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1913: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1913: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1913: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1913: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1913: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1913: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1913: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1913: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1930: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1930: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1930: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1930: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1930: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1930: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1930: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1930: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1930: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1930: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1931: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1931: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1931: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1931: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1931: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1931: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1931: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1931: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1931: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1931: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1932: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1932: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1932: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1932: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1932: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1932: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1932: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1932: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1932: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1932: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1944: Thread 0 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1945: Thread 0 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1946: Thread 1 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1946: Thread 0 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1947: Thread 1 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1947: Thread 0 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1948: Thread 1 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1948: Thread 0 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1949: Thread 1 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1949: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1949: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1949: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1949: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1949: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1949: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1949: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1949: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1949: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1949: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1949: Thread 0 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1950: Thread 1 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1950: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1950: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1950: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1950: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1950: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1950: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1950: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1950: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1950: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1950: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1950: Thread 0 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1951: Thread 1 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1951: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1951: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1951: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1951: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1951: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1951: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1951: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1951: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1951: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1951: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1951: Thread 0 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1952: Thread 1 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1952: Thread 0 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1953: Thread 1 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1953: Thread 0 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1954: Thread 1 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1955: Thread 1 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1968: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1968: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1968: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1968: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1968: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1968: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1968: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1968: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1968: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1968: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1969: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1969: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1969: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1969: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1969: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1969: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1969: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1969: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1969: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1969: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1970: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1970: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1970: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1970: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1970: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1970: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1970: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1970: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1970: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1970: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1987: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1987: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1987: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1987: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1987: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1987: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1987: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1987: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1987: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1987: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1988: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1988: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1988: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1988: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1988: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1988: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1988: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1988: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1988: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1988: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1989: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1989: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1989: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1989: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1989: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1989: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1989: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1989: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1989: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1989: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1997: Thread 2 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1998: Thread 2 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1999: Thread 2 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2000: Thread 2 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2001: Thread 2 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2002: Thread 0 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2002: Thread 2 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2003: Thread 0 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2003: Thread 2 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2004: Thread 0 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2004: Thread 2 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2005: Thread 0 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2005: Thread 2 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2006: Thread 0 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2006: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2006: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2006: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2006: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2006: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2006: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2006: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2006: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2006: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2006: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2006: Thread 2 tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2007: Thread 0 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2007: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2007: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2007: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2007: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2007: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2007: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2007: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2007: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2007: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2007: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2008: Thread 0 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2008: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2008: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2008: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2008: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2008: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2008: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2008: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2008: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2008: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2008: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2009: Thread 0 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2010: Thread 0 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2011: Thread 0 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2025: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2025: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2025: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2025: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2025: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2025: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2025: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2025: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2025: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2025: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2026: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2026: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2026: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2026: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2026: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2026: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2026: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2026: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2026: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2026: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2027: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2027: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2027: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2027: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2027: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2027: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2027: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2027: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2027: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2027: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2044: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2044: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2044: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2044: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2044: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2044: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2044: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2044: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2044: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2044: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2045: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2045: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2045: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2045: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2045: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2045: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2045: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2045: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2045: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2045: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2046: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2046: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2046: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2046: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2046: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2046: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2046: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2046: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2046: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2046: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2059: Thread 0 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2060: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2060: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2060: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2060: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2060: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2060: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2060: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2060: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2060: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2060: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2060: Thread 0 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2061: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2061: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2061: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2061: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2061: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2061: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2061: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2061: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2061: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2061: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2061: Thread 1 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2061: Thread 0 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2062: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2062: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2062: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2062: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2062: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2062: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2062: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2062: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2062: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2062: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2062: Thread 1 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2062: Thread 0 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2063: Thread 1 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2063: Thread 0 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2064: Thread 1 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2064: Thread 0 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2065: Thread 1 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2065: Thread 0 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2066: Thread 1 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2066: Thread 0 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2067: Thread 1 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2067: Thread 0 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2068: Thread 1 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2068: Thread 0 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2069: Thread 1 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2070: Thread 1 tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2113: Thread 2 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2114: Thread 2 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2115: Thread 2 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2116: Thread 2 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2117: Thread 0 tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2117: Thread 2 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2118: Thread 0 tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2118: Thread 2 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2119: Thread 0 tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2119: Thread 2 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2120: Thread 0 tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2120: Thread 2 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2121: Thread 0 tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2121: Thread 2 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2122: Thread 0 tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2122: Thread 2 tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2123: Thread 0 tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2124: Thread 0 tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2125: Thread 0 tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2125: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2125: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2125: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2125: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2125: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2125: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2125: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2125: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2125: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2125: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2126: Thread 0 tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2126: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2126: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2126: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2126: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2126: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2126: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2126: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2126: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2126: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2126: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2127: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2127: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2127: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2127: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2127: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2127: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2127: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2127: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2127: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2127: Tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2144: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2144: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2144: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2144: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2144: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2144: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2144: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2144: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2144: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2144: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2145: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2145: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2145: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2145: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2145: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2145: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2145: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2145: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2145: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2145: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2146: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2146: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2146: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2146: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2146: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2146: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2146: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2146: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2146: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2146: Tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2163: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2163: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2163: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2163: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2163: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2163: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2163: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2163: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2163: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2163: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2163: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2163: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2163: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2163: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2163: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2163: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2163: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2163: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2163: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2163: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2164: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2164: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2164: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2164: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2164: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2164: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2164: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2164: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2164: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2164: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2164: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2164: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2164: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2164: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2164: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2164: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2164: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2164: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2164: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2164: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2165: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2165: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2165: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2165: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2165: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2165: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2165: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2165: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2165: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2165: Tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2165: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2165: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2165: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2165: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2165: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2165: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2165: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2165: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2165: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2165: Tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2174: Thread 0 tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2175: Thread 0 tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2176: Thread 1 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2176: Thread 0 tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2177: Thread 1 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2177: Thread 0 tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2178: Thread 1 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2178: Thread 0 tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2179: Thread 1 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2179: Thread 0 tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2180: Thread 1 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2180: Thread 0 tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2181: Thread 1 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2181: Thread 0 tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2182: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2182: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2182: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2182: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2182: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2182: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2182: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2182: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2182: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2182: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2182: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2182: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2182: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2182: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2182: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2182: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2182: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2182: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2182: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2182: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2182: Thread 1 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2182: Thread 0 tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2183: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2183: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2183: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2183: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2183: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2183: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2183: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2183: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2183: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2183: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2183: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2183: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2183: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2183: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2183: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2183: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2183: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2183: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2183: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2183: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2183: Thread 1 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2183: Thread 0 tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2184: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2184: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2184: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2184: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2184: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2184: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2184: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2184: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2184: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2184: Tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2184: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2184: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2184: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2184: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2184: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2184: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2184: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2184: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2184: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2184: Tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2184: Thread 1 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2185: Thread 1 tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2201: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2201: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2201: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2201: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2201: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2201: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2201: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2201: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2201: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2201: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2201: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2201: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2201: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2201: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2201: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2201: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2201: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2201: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2201: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2201: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2202: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2202: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2202: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2202: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2202: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2202: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2202: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2202: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2202: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2202: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2202: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2202: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2202: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2202: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2202: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2202: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2202: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2202: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2202: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2202: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2203: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2203: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2203: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2203: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2203: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2203: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2203: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2203: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2203: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2203: Tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2203: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2203: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2203: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2203: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2203: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2203: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2203: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2203: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2203: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2203: Tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2213: Thread 3 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2214: Thread 3 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2215: Thread 3 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2216: Thread 3 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2217: Thread 3 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2218: Thread 3 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2219: Thread 3 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2220: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2220: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2220: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2220: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2220: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2220: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2220: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2220: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2220: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2220: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2220: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2220: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2220: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2220: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2220: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2220: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2220: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2220: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2220: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2220: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2220: Thread 3 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2221: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2221: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2221: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2221: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2221: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2221: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2221: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2221: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2221: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2221: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2221: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2221: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2221: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2221: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2221: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2221: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2221: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2221: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2221: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2221: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2221: Thread 3 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2222: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2222: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2222: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2222: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2222: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2222: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2222: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2222: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2222: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2222: Tag is updated to 27 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2222: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2222: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2222: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2222: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2222: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2222: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2222: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2222: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2222: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2222: Tag is updated to 11 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2222: Thread 3 tag is updated to 8 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2232: Thread 0 tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2233: Thread 0 tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2234: Thread 0 tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2235: Thread 0 tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2236: Thread 0 tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2237: Thread 0 tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2238: Thread 0 tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2239: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2239: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2239: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2239: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2239: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2239: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2239: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2239: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2239: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2239: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2239: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2239: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2239: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2239: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2239: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2239: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2239: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2239: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2239: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2239: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2239: Thread 0 tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2240: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2240: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2240: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2240: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2240: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2240: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2240: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2240: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2240: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2240: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2240: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2240: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2240: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2240: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2240: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2240: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2240: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2240: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2240: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2240: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2240: Thread 0 tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2241: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2241: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2241: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2241: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2241: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2241: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2241: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2241: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2241: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2241: Tag is updated to 28 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2241: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2241: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2241: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2241: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2241: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2241: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2241: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2241: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2241: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2241: Tag is updated to 12 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2241: Thread 0 tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2254: Thread 2 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2255: Thread 2 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2256: Thread 2 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2257: Thread 2 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2258: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2258: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2258: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2258: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2258: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2258: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2258: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2258: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2258: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2258: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2258: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2258: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2258: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2258: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2258: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2258: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2258: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2258: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2258: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2258: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2258: Thread 2 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2259: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2259: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2259: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2259: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2259: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2259: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2259: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2259: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2259: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2259: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2259: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2259: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2259: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2259: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2259: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2259: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2259: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2259: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2259: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2259: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2259: Thread 2 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2260: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2260: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2260: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2260: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2260: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2260: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2260: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2260: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2260: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2260: Tag is updated to 29 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2260: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2260: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2260: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2260: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2260: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2260: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2260: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2260: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2260: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2260: Tag is updated to 13 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2260: Thread 2 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2261: Thread 2 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2262: Thread 2 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2263: Thread 2 tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2277: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2277: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2277: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2277: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2277: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2277: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2277: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2277: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2277: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2277: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2278: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2278: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2278: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2278: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2278: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2278: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2278: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2278: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2278: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2278: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2279: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2279: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2279: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2279: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2279: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2279: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2279: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2279: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2279: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2279: Tag is updated to 14 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2290: Thread 0 tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2291: Thread 0 tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2291: Thread 1 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2292: Thread 0 tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2292: Thread 1 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2293: Thread 0 tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2293: Thread 1 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2294: Thread 0 tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2294: Thread 1 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2295: Thread 0 tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2295: Thread 1 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2296: Thread 0 tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2296: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2296: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2296: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2296: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2296: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2296: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2296: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2296: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2296: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2296: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2296: Thread 1 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2297: Thread 0 tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2297: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2297: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2297: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2297: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2297: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2297: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2297: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2297: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2297: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2297: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2297: Thread 1 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2298: Thread 0 tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2298: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2298: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2298: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2298: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2298: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2298: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2298: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2298: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2298: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2298: Tag is updated to 15 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2298: Thread 1 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2299: Thread 0 tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2299: Thread 1 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2300: Thread 1 tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2315: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2315: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2315: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2315: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2315: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2315: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2315: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2315: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2315: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2315: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2316: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2316: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2316: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2316: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2316: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2316: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2316: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2316: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2316: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2316: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2317: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2317: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2317: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2317: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2317: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2317: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2317: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2317: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2317: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2317: Tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2334: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2334: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2334: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2334: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2334: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2334: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2334: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2334: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2334: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2334: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2335: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2335: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2335: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2335: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2335: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2335: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2335: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2335: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2335: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2335: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2336: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2336: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2336: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2336: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2336: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2336: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2336: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2336: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2336: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2336: Tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2347: Thread 0 tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2348: Thread 0 tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2349: Thread 0 tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2350: Thread 0 tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2351: Thread 0 tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2352: Thread 0 tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2353: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2353: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2353: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2353: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2353: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2353: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2353: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2353: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2353: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2353: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2353: Thread 0 tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2354: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2354: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2354: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2354: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2354: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2354: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2354: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2354: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2354: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2354: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2354: Thread 0 tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2355: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2355: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2355: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2355: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2355: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2355: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2355: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2355: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2355: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2355: Tag is updated to 18 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2355: Thread 0 tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2356: Thread 0 tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2372: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2372: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2372: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2372: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2372: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2372: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2372: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2372: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2372: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2372: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2373: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2373: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2373: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2373: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2373: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2373: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2373: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2373: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2373: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2373: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2374: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2374: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2374: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2374: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2374: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2374: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2374: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2374: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2374: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2374: Tag is updated to 19 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2385: Thread 1 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2386: Thread 1 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2387: Thread 1 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2388: Thread 1 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2389: Thread 1 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2390: Thread 1 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2391: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2391: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2391: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2391: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2391: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2391: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2391: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2391: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2391: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2391: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2391: Thread 1 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2392: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2392: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2392: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2392: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2392: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2392: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2392: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2392: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2392: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2392: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2392: Thread 1 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2392: Thread 1 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2393: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2393: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2393: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2393: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2393: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2393: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2393: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2393: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2393: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2393: Tag is updated to 20 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2393: Thread 1 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2393: Thread 1 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2394: Thread 1 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2394: Thread 1 tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2395: Thread 1 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2396: Thread 1 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2397: Thread 1 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2398: Thread 1 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2399: Thread 1 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2400: Thread 1 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2401: Thread 1 tag is updated to 22 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2405: Thread 0 tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2406: Thread 0 tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2407: Thread 0 tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2407: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2407: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2407: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2407: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2407: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2407: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2407: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2407: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2407: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2407: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2408: Thread 0 tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2408: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2408: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2408: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2408: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2408: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2408: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2408: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2408: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2408: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2408: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2409: Thread 0 tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2409: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2409: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2409: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2409: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2409: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2409: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2409: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2409: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2409: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2409: Tag is updated to 21 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2410: Thread 0 tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2411: Thread 0 tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2412: Thread 0 tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2413: Thread 0 tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2414: Thread 0 tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2444: Thread 3 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2445: Thread 3 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2446: Thread 3 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2447: Thread 3 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2448: Thread 3 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2449: Thread 3 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2450: Thread 3 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2451: Thread 3 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2452: Thread 3 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2453: Thread 3 tag is updated to 9 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2462: Thread 0 tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2463: Thread 0 tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2464: Thread 0 tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2465: Thread 0 tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2466: Thread 0 tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2467: Thread 0 tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2468: Thread 0 tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2469: Thread 0 tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2470: Thread 0 tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2471: Thread 0 tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2485: Thread 2 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2486: Thread 2 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2487: Thread 2 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2488: Thread 2 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2489: Thread 2 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2490: Thread 2 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2491: Thread 2 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2492: Thread 2 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2493: Thread 2 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2494: Thread 2 tag is updated to 16 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2507: Thread 1 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2508: Thread 1 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2509: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2509: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2509: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2509: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2509: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2509: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2509: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2509: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2509: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2509: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2509: Thread 1 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2510: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2510: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2510: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2510: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2510: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2510: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2510: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2510: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2510: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2510: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2510: Thread 1 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2511: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2511: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2511: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2511: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2511: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2511: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2511: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2511: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2511: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2511: Tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2511: Thread 1 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2512: Thread 1 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2513: Thread 1 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2514: Thread 1 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2515: Thread 1 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2516: Thread 1 tag is updated to 23 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2520: Thread 0 tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2521: Thread 0 tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2522: Thread 0 tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2523: Thread 0 tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2524: Thread 0 tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2525: Thread 0 tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2526: Thread 0 tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2527: Thread 0 tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2528: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2528: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2528: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2528: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2528: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2528: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2528: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2528: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2528: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2528: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2528: Thread 0 tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2529: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2529: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2529: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2529: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2529: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2529: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2529: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2529: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2529: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2529: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2529: Thread 0 tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2530: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2530: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2530: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2530: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2530: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2530: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2530: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2530: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2530: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2530: Tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2547: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2547: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2547: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2547: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2547: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2547: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2547: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2547: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2547: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2547: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2548: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2548: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2548: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2548: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2548: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2548: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2548: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2548: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2548: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2548: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2549: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2549: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2549: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2549: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2549: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2549: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2549: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2549: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2549: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2549: Tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2566: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2566: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2566: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2566: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2566: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2566: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2566: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2566: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2566: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2566: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2567: Thread 0 tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2567: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2567: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2567: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2567: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2567: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2567: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2567: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2567: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2567: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2567: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2568: Thread 0 tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2568: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2568: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2568: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2568: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2568: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2568: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2568: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2568: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2568: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2568: Tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2569: Thread 0 tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2570: Thread 0 tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2570: Thread 0 tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2571: Thread 0 tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2571: Thread 0 tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2572: Thread 0 tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2572: Thread 0 tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2573: Thread 0 tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2573: Thread 0 tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2574: Thread 0 tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2574: Thread 0 tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2575: Thread 0 tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2575: Thread 0 tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2576: Thread 0 tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2576: Thread 0 tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2577: Thread 0 tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2578: Thread 0 tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2579: Thread 0 tag is updated to 36 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2585: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2585: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2585: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2585: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2585: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2585: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2585: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2585: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2585: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2585: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2586: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2586: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2586: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2586: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2586: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2586: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2586: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2586: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2586: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2586: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2587: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2587: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2587: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2587: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2587: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2587: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2587: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2587: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2587: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2587: Tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2600: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2600: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2600: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2600: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2600: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2600: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2600: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2600: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2600: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2600: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2601: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2601: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2601: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2601: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2601: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2601: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2601: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2601: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2601: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2601: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2602: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2602: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2602: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2602: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2602: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2602: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2602: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2602: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2602: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2602: Tag is updated to 30 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2604: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2604: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2604: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2604: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2604: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2604: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2604: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2604: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2604: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2604: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2605: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2605: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2605: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2605: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2605: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2605: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2605: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2605: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2605: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2605: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2606: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2606: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2606: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2606: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2606: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2606: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2606: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2606: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2606: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2606: Tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2623: Thread 1 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2623: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2623: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2623: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2623: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2623: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2623: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2623: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2623: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2623: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2623: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2624: Thread 1 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2624: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2624: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2624: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2624: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2624: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2624: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2624: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2624: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2624: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2624: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2624: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2624: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2624: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2624: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2624: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2624: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2624: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2624: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2624: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2624: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2625: Thread 1 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2625: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2625: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2625: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2625: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2625: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2625: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2625: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2625: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2625: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2625: Tag is updated to 42 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2625: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2625: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2625: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2625: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2625: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2625: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2625: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2625: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2625: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2625: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2626: Thread 1 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2626: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2626: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2626: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2626: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2626: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2626: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2626: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2626: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2626: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2626: Tag is updated to 31 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2627: Thread 1 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2628: Thread 1 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2628: Thread 0 tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2629: Thread 1 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2629: Thread 0 tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2630: Thread 1 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2630: Thread 0 tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2631: Thread 1 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2631: Thread 0 tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2632: Thread 1 tag is updated to 24 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2632: Thread 0 tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2633: Thread 0 tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2634: Thread 0 tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2635: Thread 0 tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2636: Thread 0 tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2637: Thread 0 tag is updated to 37 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2642: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2642: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2642: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2642: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2642: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2642: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2642: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2642: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2642: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2642: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2643: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2643: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2643: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2643: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2643: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2643: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2643: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2643: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2643: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2643: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2644: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2644: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2644: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2644: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2644: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2644: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2644: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2644: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2644: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2644: Tag is updated to 43 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2648: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2648: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2648: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2648: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2648: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2648: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2648: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2648: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2648: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2648: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2649: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2649: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2649: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2649: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2649: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2649: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2649: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2649: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2649: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2649: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2650: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2650: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2650: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2650: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2650: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2650: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2650: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2650: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2650: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2650: Tag is updated to 32 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2672: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2672: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2672: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2672: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2672: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2672: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2672: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2672: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2672: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2672: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2673: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2673: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2673: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2673: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2673: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2673: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2673: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2673: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2673: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2673: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2674: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2674: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2674: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2674: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2674: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2674: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2674: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2674: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2674: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2674: Tag is updated to 33 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2674: Thread 3 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2675: Thread 3 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2676: Thread 3 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2677: Thread 3 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2678: Thread 3 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2679: Thread 3 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2680: Thread 3 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2681: Thread 3 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2682: Thread 3 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2683: Thread 3 tag is updated to 10 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2686: Thread 0 tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2687: Thread 0 tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2688: Thread 0 tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2689: Thread 0 tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2690: Thread 0 tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2691: Thread 0 tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2692: Thread 0 tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2693: Thread 0 tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2694: Thread 0 tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2695: Thread 0 tag is updated to 38 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2696: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2696: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2696: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2696: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2696: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2696: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2696: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2696: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2696: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2696: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2697: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2697: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2697: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2697: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2697: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2697: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2697: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2697: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2697: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2697: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2698: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2698: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2698: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2698: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2698: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2698: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2698: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2698: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2698: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2698: Tag is updated to 34 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2715: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2715: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2715: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2715: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2715: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2715: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2715: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2715: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2715: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2715: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2715: Thread 2 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2716: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2716: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2716: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2716: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2716: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2716: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2716: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2716: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2716: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2716: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2716: Thread 2 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2717: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2717: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2717: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2717: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2717: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2717: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2717: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2717: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2717: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2717: Tag is updated to 35 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2717: Thread 2 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2718: Thread 2 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2719: Thread 2 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2720: Thread 2 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2721: Thread 2 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2722: Thread 2 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2723: Thread 2 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2724: Thread 2 tag is updated to 17 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2738: Thread 1 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2739: Thread 1 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2740: Thread 1 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2741: Thread 1 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2742: Thread 1 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2743: Thread 1 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2743: Thread 0 tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2744: Thread 1 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2744: Thread 0 tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2745: Thread 1 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2745: Thread 0 tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2746: Thread 1 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2746: Thread 0 tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2747: Thread 1 tag is updated to 25 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2747: Thread 0 tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2748: Thread 0 tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2749: Thread 0 tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2750: Thread 0 tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2751: Thread 0 tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2752: Thread 0 tag is updated to 39 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2754: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2754: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2754: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2754: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2754: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2754: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2754: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2754: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2754: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2754: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2755: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2755: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2755: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2755: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2755: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2755: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2755: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2755: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2755: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2755: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2756: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2756: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2756: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2756: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2756: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2756: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2756: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2756: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2756: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2756: Tag is updated to 44 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2778: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2778: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2778: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2778: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2778: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2778: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2778: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2778: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2778: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2778: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2779: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2779: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2779: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2779: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2779: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2779: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2779: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2779: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2779: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2779: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2780: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2780: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2780: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2780: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2780: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2780: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2780: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2780: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2780: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2780: Tag is updated to 45 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2801: Thread 0 tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2802: Thread 0 tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2802: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2802: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2802: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2802: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2802: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2802: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2802: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2802: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2802: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2802: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2803: Thread 0 tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2803: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2803: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2803: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2803: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2803: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2803: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2803: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2803: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2803: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2803: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2804: Thread 0 tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2804: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2804: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2804: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2804: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2804: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2804: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2804: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2804: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2804: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2804: Tag is updated to 46 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2805: Thread 0 tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2806: Thread 0 tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2807: Thread 0 tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2808: Thread 0 tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2809: Thread 0 tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2810: Thread 0 tag is updated to 40 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2826: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2826: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2826: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2826: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2826: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2826: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2826: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2826: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2826: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2826: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2827: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2827: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2827: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2827: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2827: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2827: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2827: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2827: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2827: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2827: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2828: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2828: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2828: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2828: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2828: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2828: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2828: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2828: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2828: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2828: Tag is updated to 47 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2850: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2850: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2850: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2850: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2850: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2850: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2850: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2850: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2850: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2850: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2851: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2851: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2851: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2851: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2851: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2851: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2851: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2851: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2851: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2851: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2852: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2852: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2852: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2852: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2852: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2852: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2852: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2852: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2852: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2852: Tag is updated to 48 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2853: Thread 1 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2854: Thread 1 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2855: Thread 1 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2856: Thread 1 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2857: Thread 1 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2858: Thread 0 tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2858: Thread 1 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2859: Thread 0 tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2859: Thread 1 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2860: Thread 0 tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2860: Thread 1 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2861: Thread 0 tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2861: Thread 1 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2862: Thread 0 tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2862: Thread 1 tag is updated to 26 +[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2863: Thread 0 tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2864: Thread 0 tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2865: Thread 0 tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2866: Thread 0 tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2867: Thread 0 tag is updated to 41 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2869: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2869: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2869: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2869: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2869: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2869: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2869: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2869: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2869: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2869: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2870: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2870: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2870: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2870: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2870: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2870: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2870: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2870: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2870: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2870: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2871: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2871: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2871: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2871: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2871: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2871: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2871: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2871: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2871: Tag is updated to 49 +[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2871: Tag is updated to 49 diff --git a/rad-sim/uni_config.yml b/rad-sim/uni_config.yml index 801f02f..33d4bb8 100644 --- a/rad-sim/uni_config.yml +++ b/rad-sim/uni_config.yml @@ -4,8 +4,8 @@ noc: clk_period: [1.0] payload_width: [166] topology: ['mesh'] - dim_x: [5] - dim_y: [4] + dim_x: [10] + dim_y: [10] routing_func: ['dim_order'] vcs: [5] vc_buffer_size: [8] @@ -29,9 +29,9 @@ noc_adapters: config rad1: design: - name: 'mlp_int8' - noc_placement: ['mlp.place'] - clk_periods: [5.0] + name: 'npu' + noc_placement: ['npu.place'] + clk_periods: [5.0, 2.5] cluster: sim_driver_period: 5.0 From 8218696ca01619ec25cc59fff6fd5c67b555e226 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 10 Sep 2024 00:31:56 -0400 Subject: [PATCH 089/127] Renamed uni_config.yml to config.yml everywhere --- docs/rad-sim-code-structure.rst | 6 +++--- rad-sim/config.py | 2 +- rad-sim/{uni_config.yml => config.yml} | 0 rad-sim/test/dlrm_test.sh | 2 +- rad-sim/test/mlp_int8_test.sh | 2 +- rad-sim/test/mlp_test.sh | 2 +- rad-sim/test/npu_test.sh | 2 +- 7 files changed, 8 insertions(+), 8 deletions(-) rename rad-sim/{uni_config.yml => config.yml} (100%) diff --git a/docs/rad-sim-code-structure.rst b/docs/rad-sim-code-structure.rst index 30e7352..384212e 100644 --- a/docs/rad-sim-code-structure.rst +++ b/docs/rad-sim-code-structure.rst @@ -38,7 +38,7 @@ The code structure of RAD-Sim is summarized as follows: |- example-designs/ | |- mydesign/ | | |- modules/ - | | |- uni_config.yml + | | |- config.yml | | |- mydesign_driver.{cpp/hpp} | | |- mydesign_system.{cpp/hpp} | | |- mydesign_top.{cpp/hpp} @@ -163,7 +163,7 @@ space-separated) as shown in the example below. module_b 0 0 The two integers in each line represent the indecies to the NoC adapters and design clock period values listed in the -design's ``uni_config.yml`` file. For example, if the ``uni_config.yml`` file, had the following values, it means that the NoC +design's ``config.yml`` file. For example, if the ``config.yml`` file, had the following values, it means that the NoC adapters of both modules are operating at 1.25 ns clock period (800 MHz), while ``module_a`` has a clock period of 2.5 ns (400 MHz) and ``module_b`` has a clock period of 5.0 ns (200 MHz). @@ -207,7 +207,7 @@ for CMake to compile correctly when you build RAD-Sim for the application design recommended that you copy the ``CMakeLists.txt`` file from one of the provided example design directories and edit the ``hdrfiles`` and ``srcfiles`` variables to include all your design ``.hpp`` and ``.cpp`` files. -RAD-Sim Configuration File (``uni_config.yml``) +RAD-Sim Configuration File (``config.yml``) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ This YAML file configures all the RAD-Sim parameters for the simulation of the application design under 4 main tags: ``noc``, ``noc_adapters``, ``config ``, and ``cluster``. The ``noc`` and ``noc_adapters`` parameters are shared across all RADs. diff --git a/rad-sim/config.py b/rad-sim/config.py index 8436923..fbd7d76 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -492,7 +492,7 @@ def find_num_configs(config_filename): # Point to YAML configuration file #config_filename = "example-designs/" + design_name + "/config.yml" - config_filename = "uni_config.yml" + config_filename = "config.yml" config_names = [] # List default parameter values diff --git a/rad-sim/uni_config.yml b/rad-sim/config.yml similarity index 100% rename from rad-sim/uni_config.yml rename to rad-sim/config.yml diff --git a/rad-sim/test/dlrm_test.sh b/rad-sim/test/dlrm_test.sh index 7235d2a..8cb4e44 100755 --- a/rad-sim/test/dlrm_test.sh +++ b/rad-sim/test/dlrm_test.sh @@ -2,7 +2,7 @@ test_path=$( cd "$(dirname "${BASH_SOURCE[0]}")" ; pwd -P ) cd $test_path -cp -f ../example-designs/dlrm/config.yml ../uni_config.yml +cp -f ../example-designs/dlrm/config.yml ../config.yml (cd ../; python config.py dlrm) diff --git a/rad-sim/test/mlp_int8_test.sh b/rad-sim/test/mlp_int8_test.sh index e0747a9..605592e 100755 --- a/rad-sim/test/mlp_int8_test.sh +++ b/rad-sim/test/mlp_int8_test.sh @@ -2,7 +2,7 @@ test_path=$( cd "$(dirname "${BASH_SOURCE[0]}")" ; pwd -P ) cd $test_path -cp -f ../example-designs/mlp_int8/config.yml ../uni_config.yml +cp -f ../example-designs/mlp_int8/config.yml ../config.yml (cd ../; python config.py mlp_int8) diff --git a/rad-sim/test/mlp_test.sh b/rad-sim/test/mlp_test.sh index 5272151..d63d622 100755 --- a/rad-sim/test/mlp_test.sh +++ b/rad-sim/test/mlp_test.sh @@ -2,7 +2,7 @@ test_path=$( cd "$(dirname "${BASH_SOURCE[0]}")" ; pwd -P ) cd $test_path -cp -f ../example-designs/mlp/config.yml ../uni_config.yml +cp -f ../example-designs/mlp/config.yml ../config.yml (cd ../; python config.py mlp) diff --git a/rad-sim/test/npu_test.sh b/rad-sim/test/npu_test.sh index 75cdedd..86ad5f2 100755 --- a/rad-sim/test/npu_test.sh +++ b/rad-sim/test/npu_test.sh @@ -22,7 +22,7 @@ done test_path=$( cd "$(dirname "${BASH_SOURCE[0]}")" ; pwd -P ) cd $test_path -cp -f ../example-designs/npu/config.yml ../uni_config.yml +cp -f ../example-designs/npu/config.yml ../config.yml (cd ../; python config.py npu) From ac4d5ed9a87ae5f32e515e9e0f74c8000c1203d1 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 10 Sep 2024 00:47:09 -0400 Subject: [PATCH 090/127] Cleaned up some comments and fixed docs for class name formatting --- docs/rad-sim-code-structure.rst | 2 +- rad-sim/sim/radsim_cluster.hpp | 6 ++---- rad-sim/sim/radsim_config.hpp | 18 ++++++++---------- rad-sim/sim/radsim_inter_rad.cpp | 2 +- rad-sim/sim/radsim_telemetry.cpp | 2 +- 5 files changed, 13 insertions(+), 17 deletions(-) diff --git a/docs/rad-sim-code-structure.rst b/docs/rad-sim-code-structure.rst index 384212e..aadfbde 100644 --- a/docs/rad-sim-code-structure.rst +++ b/docs/rad-sim-code-structure.rst @@ -72,7 +72,7 @@ This directory includes all the RAD-Sim simulation infrastructure and utilities: * The ``RADSimDesignContext`` class in ``design_context.{cpp/hpp}`` stores all the details of a RAD-Sim design such as NoCs and modules of the design, their clocks, module NoC placement, and connections between modules and NoC adapters. For each device in the RAD-Sim simulation, there is a variable of this class type (``radsim_design``) that stores these information to be used from any part of the simulator. -* The ``radsim_cluster`` class in ``radsim_cluster.{cpp/hpp}`` stores details for the cluster of multiple RADs for the RADSim simulation. This is the top-level of the hierarchy for multiple device simulation. +* The ``RADSimCluster`` class in ``radsim_cluster.{cpp/hpp}`` stores details for the cluster of RADs for the RADSim simulation. This is the top-level of the hierarchy for simulation. Single-RAD simulation is implemented as a cluster of one RAD. * The ``design_system`` class in ``design_system.hpp`` is a generalized parent class used per design. The design_system wraps around the device-under-test (DUT) and testbench. Each design in the example-designs directory has its own system class that should inherit from this class. This class has ``sc_module`` as its virtual parent class. diff --git a/rad-sim/sim/radsim_cluster.hpp b/rad-sim/sim/radsim_cluster.hpp index 140e8bd..94517d4 100644 --- a/rad-sim/sim/radsim_cluster.hpp +++ b/rad-sim/sim/radsim_cluster.hpp @@ -12,10 +12,8 @@ class RADSimCluster { public: int num_rads; std::vector all_rads; - std::vector all_systems; //added support for this, ignore commented lines below - //std::vector all_systems; //nth system should be on the nth RAD. also tried std::any, auto - //std::vector> all_systems_in; //nth system should be on the nth RAD - //std::vector> all_systems_out; //nth system should be on the nth RAD + std::vector all_systems; + enum inter_rad_topo_type { ALL_TO_ALL = 0, SWITCH = 1, diff --git a/rad-sim/sim/radsim_config.hpp b/rad-sim/sim/radsim_config.hpp index 55c6428..a24bb3b 100644 --- a/rad-sim/sim/radsim_config.hpp +++ b/rad-sim/sim/radsim_config.hpp @@ -12,7 +12,6 @@ class RADSimConfig { public: // Simulation configuration parameters are stored in pairs of knob name and value - //AKB: appended _shared to names std::unordered_map _int_knobs_shared; std::unordered_map _double_knobs_shared; std::unordered_map _string_knobs_shared; @@ -20,7 +19,7 @@ class RADSimConfig { std::unordered_map> _double_vector_knobs_shared; std::unordered_map> _string_vector_knobs_shared; - //AKB: for rad-specific parameters + //for rad-specific parameters std::vector> _int_knobs_per_rad; std::vector> _double_knobs_per_rad; std::vector> _string_knobs_per_rad; @@ -30,23 +29,22 @@ class RADSimConfig { RADSimConfig(); ~RADSimConfig(); - //AKB: added to support resizing instance of class based on # of RADs - void ResizeAll(int num_rads); - //AKB: changed to be general parameters aka shared across all RADs + void ResizeAll(int num_rads); //resizing instance of class based on # of RADs + //general parameters shared across all RADs void AddIntKnobShared(const std::string& key, int val); void AddDoubleKnobShared(const std::string& key, double val); void AddStringKnobShared(const std::string& key, std::string& val); void AddIntVectorKnobShared(const std::string& key, std::vector& val); void AddDoubleVectorKnobShared(const std::string& key, std::vector& val); void AddStringVectorKnobShared(const std::string& key, std::vector& val); - //AKB: rad-specific parameters + //rad-specific parameters void AddIntKnobPerRad(const std::string& key, int val, unsigned int rad_id); void AddDoubleKnobPerRad(const std::string& key, double val, unsigned int rad_id); void AddStringKnobPerRad(const std::string& key, std::string& val, unsigned int rad_id); void AddIntVectorKnobPerRad(const std::string& key, std::vector& val, unsigned int rad_id); void AddDoubleVectorKnobPerRad(const std::string& key, std::vector& val, unsigned int rad_id); void AddStringVectorKnobPerRad(const std::string& key, std::vector& val, unsigned int rad_id); - //AKB: changed to be parameters shared across all RADs + //general parameters shared across all RADs int GetIntKnobShared(const std::string& key); double GetDoubleKnobShared(const std::string& key); std::string GetStringKnobShared(const std::string& key); @@ -56,7 +54,7 @@ class RADSimConfig { std::vector& GetIntVectorKnobShared(const std::string& key); std::vector& GetDoubleVectorKnobShared(const std::string& key); std::vector& GetStringVectorKnobShared(const std::string& key); - //AKB: rad-specific parameters + //rad-specific parameters int GetIntKnobPerRad(const std::string& key, unsigned int rad_id); double GetDoubleKnobPerRad(const std::string& key, unsigned int rad_id); std::string GetStringKnobPerRad(const std::string& key, unsigned int rad_id); @@ -66,14 +64,14 @@ class RADSimConfig { std::vector& GetIntVectorKnobPerRad(const std::string& key, unsigned int rad_id); std::vector& GetDoubleVectorKnobPerRad(const std::string& key, unsigned int rad_id); std::vector& GetStringVectorKnobPerRad(const std::string& key, unsigned int rad_id); - //AKB: specify if shared knob + //specify if shared knob bool HasIntKnobShared(const std::string& key); bool HasDoubleKnobShared(const std::string& key); bool HasStringKnobShared(const std::string& key); bool HasIntVectorKnobShared(const std::string& key); bool HasDoubleVectorKnobShared(const std::string& key); bool HasStringVectorKnobShared(const std::string& key); - //AKB: rad-specific knobs + //rad-specific knobs bool HasIntKnobPerRad(const std::string& key, unsigned int rad_id); bool HasDoubleKnobPerRad(const std::string& key, unsigned int rad_id); bool HasStringKnobPerRad(const std::string& key, unsigned int rad_id); diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 64cc64d..812d7f9 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -123,7 +123,7 @@ RADSimInterRad::writeFifo() { if (this->fifos[dest_rad]->nb_write(curr_transaction) != false) { //there was an available slot to write to /* START FOR DEBUG */ // sc_bv rx_tdata_bv = curr_transaction.tdata; - // data_vector rx_tdata(32); //NOTE (AKB): type needs to match what is supported in example-designs/{design}/modules/sim_utils.hpp + // data_vector rx_tdata(32); //NOTE: type needs to match what is supported in example-designs/{design}/modules/sim_utils.hpp // bv_to_data_vector(rx_tdata_bv, rx_tdata, 32); // std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << rx_tdata << std::endl; // std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << curr_transaction.tdata.to_uint64() << std::endl; diff --git a/rad-sim/sim/radsim_telemetry.cpp b/rad-sim/sim/radsim_telemetry.cpp index 35aa0f3..a810748 100644 --- a/rad-sim/sim/radsim_telemetry.cpp +++ b/rad-sim/sim/radsim_telemetry.cpp @@ -64,7 +64,7 @@ void NoCTransactionTelemetry::DumpStatsToFile(const std::string& filename) { } std::vector NoCTransactionTelemetry::DumpTrafficFlows(const std::string& filename, unsigned int cycle_count, - std::vector>> node_module_names, unsigned int rad_id) { //AKB: require passing of rad_id + std::vector>> node_module_names, unsigned int rad_id) { double sim_driver_period = radsim_config.GetDoubleKnobShared("sim_driver_period") / 1000000000.0; unsigned int num_nocs = radsim_config.GetIntKnobPerRad("noc_num_nocs", rad_id); std::vector>> traffic_bits(num_nocs); From 8f47efe146e038517eab89b18ea4b455f647fcce Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 10 Sep 2024 00:58:15 -0400 Subject: [PATCH 091/127] Changed design_top class name to RADSimDesignTop --- docs/rad-sim-code-structure.rst | 6 +++--- rad-sim/example-designs/add/add_top.hpp | 2 +- rad-sim/example-designs/dlrm/dlrm_top.cpp | 14 ++------------ rad-sim/example-designs/dlrm/dlrm_top.hpp | 2 +- rad-sim/example-designs/mlp/mlp_top.cpp | 2 +- rad-sim/example-designs/mlp/mlp_top.hpp | 2 +- rad-sim/example-designs/mlp_int8/mlp_top.cpp | 2 +- rad-sim/example-designs/mlp_int8/mlp_top.hpp | 2 +- rad-sim/example-designs/mult/mult_top.hpp | 2 +- rad-sim/example-designs/npu/npu_top.cpp | 2 +- rad-sim/example-designs/npu/npu_top.hpp | 2 +- rad-sim/sim/design_system.hpp | 2 +- rad-sim/sim/design_top.hpp | 13 ++++--------- 13 files changed, 19 insertions(+), 34 deletions(-) diff --git a/docs/rad-sim-code-structure.rst b/docs/rad-sim-code-structure.rst index aadfbde..53ceb69 100644 --- a/docs/rad-sim-code-structure.rst +++ b/docs/rad-sim-code-structure.rst @@ -76,7 +76,7 @@ This directory includes all the RAD-Sim simulation infrastructure and utilities: * The ``design_system`` class in ``design_system.hpp`` is a generalized parent class used per design. The design_system wraps around the device-under-test (DUT) and testbench. Each design in the example-designs directory has its own system class that should inherit from this class. This class has ``sc_module`` as its virtual parent class. -* The ``design_top`` class in ``design_top.hpp`` is a parent class for the DUT (top) class used within any design. It contains the creation of a portal module which is used to interface with the inter-RAD network. This class has ``sc_module`` as its virtual parent class. +* The ``RADSimDesignTop`` class in ``design_top.hpp`` is a parent class for the DUT (top) class used within any design. It contains the creation of a portal module which is used to interface with the inter-RAD network. This class has ``sc_module`` as its virtual parent class. * The ``RADSimConfig`` class in ``radsim_config.{cpp/hpp}`` stores all the RAD-Sim configuration parameters. @@ -110,7 +110,7 @@ ports which are defined in the ``sim/{aximm|axi_s}_interface.hpp`` files. Design Top-level (``_top.{cpp/hpp}``) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -These files define a design_top class which in turn defines a SystemC module (``sc_module``) that instantiates all the modules in the design and connects any +These files define a RADSimDesignTop class which in turn defines a SystemC module (``sc_module``) that instantiates all the modules in the design and connects any non-NoC signals between the modules in its constructor using conventional SystemC syntax. At the end of its constructor, it must include the following lines of code to build the design context, create the system NoCs, and automatically connect the ports of NoC-attached modules to the NoC based on the NoC placement file: @@ -118,7 +118,7 @@ connect the ports of NoC-attached modules to the NoC based on the NoC placement .. code-block:: c++ // mydesign_top Constructor - mydesign_top::mydesign_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : design_top(radsim_design) { + mydesign_top::mydesign_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : RADSimDesignTop(radsim_design) { this->radsim_design = radsim_design; //to use within design // Module Instantiations and Connections Start Here // ... diff --git a/rad-sim/example-designs/add/add_top.hpp b/rad-sim/example-designs/add/add_top.hpp index 907ca19..9a7c391 100644 --- a/rad-sim/example-designs/add/add_top.hpp +++ b/rad-sim/example-designs/add/add_top.hpp @@ -9,7 +9,7 @@ #include #include -class add_top : public design_top { +class add_top : public RADSimDesignTop { private: adder *adder_inst; client *client_inst; diff --git a/rad-sim/example-designs/dlrm/dlrm_top.cpp b/rad-sim/example-designs/dlrm/dlrm_top.cpp index 68edff2..fb73c70 100644 --- a/rad-sim/example-designs/dlrm/dlrm_top.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_top.cpp @@ -1,6 +1,6 @@ #include -dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : design_top(radsim_design) { //}, rst) { //sc_module(name) { +dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : RADSimDesignTop(radsim_design) { this->radsim_design = radsim_design; unsigned int line_bitwidth = 512; unsigned int element_bitwidth = 16; @@ -134,17 +134,7 @@ dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_desig ch_id += mem_channels[ctrl_id]; } - // //create portal module - // module_name_str = "portal_inst"; - // std::strcpy(module_name, module_name_str.c_str()); - // portal_inst = new portal(module_name, radsim_design); - // portal_inst->rst(rst); this->portal_inst->rst(rst); - // //portal_inst->portal_recvd(this->portal_recvd); - - // //connect master to master instead, to expose to top - // portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); - // portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); //top drives portal bc top receives slave inputs radsim_design->BuildDesignContext("dlrm.place", "dlrm.clks"); radsim_design->CreateSystemNoCs(rst); @@ -162,5 +152,5 @@ dlrm_top::~dlrm_top() { delete mvm; } } - //delete portal_inst; //AKB commenting out to debug end of sim segfault + } \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/dlrm_top.hpp b/rad-sim/example-designs/dlrm/dlrm_top.hpp index de096f1..7c8d8fc 100644 --- a/rad-sim/example-designs/dlrm/dlrm_top.hpp +++ b/rad-sim/example-designs/dlrm/dlrm_top.hpp @@ -13,7 +13,7 @@ #include #include -class dlrm_top : public design_top { //sc_module { +class dlrm_top : public RADSimDesignTop { private: //portal *portal_inst; embedding_lookup *embedding_lookup_inst; diff --git a/rad-sim/example-designs/mlp/mlp_top.cpp b/rad-sim/example-designs/mlp/mlp_top.cpp index 377eb65..544c343 100644 --- a/rad-sim/example-designs/mlp/mlp_top.cpp +++ b/rad-sim/example-designs/mlp/mlp_top.cpp @@ -1,6 +1,6 @@ #include -mlp_top::mlp_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : design_top(radsim_design) { +mlp_top::mlp_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : RADSimDesignTop(radsim_design) { this->radsim_design = radsim_design; std::string design_root_dir = radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); diff --git a/rad-sim/example-designs/mlp/mlp_top.hpp b/rad-sim/example-designs/mlp/mlp_top.hpp index 13c022a..e8b194c 100644 --- a/rad-sim/example-designs/mlp/mlp_top.hpp +++ b/rad-sim/example-designs/mlp/mlp_top.hpp @@ -10,7 +10,7 @@ #include #include -class mlp_top : public design_top { +class mlp_top : public RADSimDesignTop { private: std::vector> matrix_vector_engines; std::vector input_dispatchers; diff --git a/rad-sim/example-designs/mlp_int8/mlp_top.cpp b/rad-sim/example-designs/mlp_int8/mlp_top.cpp index 9b54e09..498a79d 100644 --- a/rad-sim/example-designs/mlp_int8/mlp_top.cpp +++ b/rad-sim/example-designs/mlp_int8/mlp_top.cpp @@ -1,6 +1,6 @@ #include -mlp_top::mlp_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : design_top(radsim_design) { +mlp_top::mlp_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : RADSimDesignTop(radsim_design) { this->radsim_design = radsim_design; std::string design_root_dir = diff --git a/rad-sim/example-designs/mlp_int8/mlp_top.hpp b/rad-sim/example-designs/mlp_int8/mlp_top.hpp index 3147ed1..a41c0de 100644 --- a/rad-sim/example-designs/mlp_int8/mlp_top.hpp +++ b/rad-sim/example-designs/mlp_int8/mlp_top.hpp @@ -14,7 +14,7 @@ #include -class mlp_top : public design_top { +class mlp_top : public RADSimDesignTop { private: std::vector> rtl_matrix_vector_engines; std::vector> sysc_matrix_vector_engines; diff --git a/rad-sim/example-designs/mult/mult_top.hpp b/rad-sim/example-designs/mult/mult_top.hpp index b7d6532..b2f9ec8 100644 --- a/rad-sim/example-designs/mult/mult_top.hpp +++ b/rad-sim/example-designs/mult/mult_top.hpp @@ -9,7 +9,7 @@ #include #include -class mult_top : public design_top { +class mult_top : public RADSimDesignTop { private: mult *mult_inst; client_mult *client_inst; diff --git a/rad-sim/example-designs/npu/npu_top.cpp b/rad-sim/example-designs/npu/npu_top.cpp index 4ffd2be..fe7b39b 100644 --- a/rad-sim/example-designs/npu/npu_top.cpp +++ b/rad-sim/example-designs/npu/npu_top.cpp @@ -1,6 +1,6 @@ #include -npu_top::npu_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : design_top(radsim_design), +npu_top::npu_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : RADSimDesignTop(radsim_design), sector_chain_fifo_rdy_signals("sector_chain_fifo_rdy_signals"), sector_chain_fifo_ren_signals("sector_chain_fifo_ren_signals"), sector_chain_fifo_rdata_signals("sector_chain_fifo_rdata_signals"), diff --git a/rad-sim/example-designs/npu/npu_top.hpp b/rad-sim/example-designs/npu/npu_top.hpp index 50eece6..02b30f8 100644 --- a/rad-sim/example-designs/npu/npu_top.hpp +++ b/rad-sim/example-designs/npu/npu_top.hpp @@ -15,7 +15,7 @@ #include -class npu_top : public design_top { +class npu_top : public RADSimDesignTop { private: sc_vector>>> sector_chain_fifo_rdy_signals; sc_vector>>> sector_chain_fifo_ren_signals; diff --git a/rad-sim/sim/design_system.hpp b/rad-sim/sim/design_system.hpp index 6667e83..65b0fde 100644 --- a/rad-sim/sim/design_system.hpp +++ b/rad-sim/sim/design_system.hpp @@ -5,5 +5,5 @@ class design_system : virtual public sc_module { public: - design_top* design_dut_inst; + RADSimDesignTop* design_dut_inst; }; \ No newline at end of file diff --git a/rad-sim/sim/design_top.hpp b/rad-sim/sim/design_top.hpp index dac9f97..582346d 100644 --- a/rad-sim/sim/design_top.hpp +++ b/rad-sim/sim/design_top.hpp @@ -4,29 +4,24 @@ #include #include -//#define DATAW 128 -class design_top : virtual public sc_module { +class RADSimDesignTop : virtual public sc_module { public: - //sc_in> portal_in; - //sc_out> portal_out; - axis_slave_port design_top_portal_axis_slave; //TODO: add back here, for now just directly putting into child class add_top + axis_slave_port design_top_portal_axis_slave; axis_master_port design_top_portal_axis_master; portal* portal_inst; - design_top(RADSimDesignContext* radsim_design) { //, sc_in rst) { + RADSimDesignTop(RADSimDesignContext* radsim_design) { //create portal module std::string module_name_str = "portal_inst"; char module_name[25]; std::strcpy(module_name, module_name_str.c_str()); portal_inst = new portal(module_name, radsim_design); - // portal_inst->rst(rst); //AKB: commented out to try to fix Info: (I804) /IEEE_Std_1666/deprecated: interface and/or port binding in port constructors is deprecated - //portal_inst->portal_recvd(this->portal_recvd); //connect master to master instead, to expose to top portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); //top drives portal bc top receives slave inputs } - ~design_top() { + ~RADSimDesignTop() { delete portal_inst; } }; \ No newline at end of file From b52019550c7a8be9b4ac9be81149ea95880785ff Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 10 Sep 2024 00:59:37 -0400 Subject: [PATCH 092/127] Fixed formatting on example-designs in doc --- docs/rad-sim-code-structure.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/rad-sim-code-structure.rst b/docs/rad-sim-code-structure.rst index 53ceb69..a4ed7d6 100644 --- a/docs/rad-sim-code-structure.rst +++ b/docs/rad-sim-code-structure.rst @@ -74,7 +74,7 @@ This directory includes all the RAD-Sim simulation infrastructure and utilities: * The ``RADSimCluster`` class in ``radsim_cluster.{cpp/hpp}`` stores details for the cluster of RADs for the RADSim simulation. This is the top-level of the hierarchy for simulation. Single-RAD simulation is implemented as a cluster of one RAD. -* The ``design_system`` class in ``design_system.hpp`` is a generalized parent class used per design. The design_system wraps around the device-under-test (DUT) and testbench. Each design in the example-designs directory has its own system class that should inherit from this class. This class has ``sc_module`` as its virtual parent class. +* The ``design_system`` class in ``design_system.hpp`` is a generalized parent class used per design. The design_system wraps around the device-under-test (DUT) and testbench. Each design in the ``example-designs`` directory has its own system class that should inherit from this class. This class has ``sc_module`` as its virtual parent class. * The ``RADSimDesignTop`` class in ``design_top.hpp`` is a parent class for the DUT (top) class used within any design. It contains the creation of a portal module which is used to interface with the inter-RAD network. This class has ``sc_module`` as its virtual parent class. From ee49bbe2588297f0bd442257db5fe5c0588d7a47 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 10 Sep 2024 01:27:09 -0400 Subject: [PATCH 093/127] Cleaned up comments and removed dead code --- docs/rad-sim-code-structure.rst | 18 ++++---- rad-sim/config.py | 25 ++--------- rad-sim/example-designs/CMakeLists.txt | 3 -- rad-sim/example-designs/add/add_driver.hpp | 4 +- rad-sim/example-designs/add/add_system.cpp | 2 +- rad-sim/example-designs/add/modules/adder.cpp | 42 +++---------------- rad-sim/sim/design_context.cpp | 10 +---- rad-sim/sim/design_context.hpp | 7 +--- rad-sim/sim/dram/mem_controller.hpp | 2 +- rad-sim/sim/noc/axis_interface.hpp | 3 -- 10 files changed, 26 insertions(+), 90 deletions(-) diff --git a/docs/rad-sim-code-structure.rst b/docs/rad-sim-code-structure.rst index a4ed7d6..d23d027 100644 --- a/docs/rad-sim-code-structure.rst +++ b/docs/rad-sim-code-structure.rst @@ -92,7 +92,7 @@ This directory includes all the RAD-Sim simulation infrastructure and utilities: * The ``SimLog`` class is for logging simulator messages. * The ``SimTraceRecording`` class is for recording timestamps at any time during the simulation and dumping them as simulation traces at the end of the simulation. -* Utility functions functions and struct definitions are in ``radsim_utils.{cpp/hpp}``. +* Utility functions and struct definitions are in ``radsim_utils.{cpp/hpp}``. * The ``main.cpp`` file declares all the global variables, instantiates the system to be simulated, and starts the SystemC simulation. @@ -139,11 +139,11 @@ It has two SystemC threads (``SC_CTHREAD``): a ``source`` thread that sends inpu and a ``sink`` thread that listens on the design top-level output ports to receive outputs. A common scenario is that this driver module performs the following steps: -1. Parse test inputs and golden outputs from files -2. Use the ``source`` thread to send inputs to design top-level when ready -3. Use ``sink`` thread to listen for outputs from the design top-level when available -4. Compare received outputs to golden outputs to verify functionality -5. Raise per-RAD flag to stop simulation when all outputs are received across all devices under simulation +1. Parse test inputs and golden outputs from files. +2. Use the ``source`` thread to send inputs to design top-level when ready. +3. Use ``sink`` thread to listen for outputs from the design top-level when available. +4. Compare received outputs to golden outputs to verify functionality. +5. Raise per-RAD done flag when all testbench outputs are received. When all testbenches (for all RADs in the simulation raise their done flags, simulation stops. Design System (``_system.{cpp/hpp}``) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -334,7 +334,7 @@ An example configuration file is shown below, followed by an explanation for eac :menuselection:`vc_mapping` -**Config Configuration Parameters** +**Configuration Parameters** **Config subsection: DRAM Configuration Parameters** @@ -342,7 +342,7 @@ An example configuration file is shown below, followed by an explanation for eac :menuselection:`clk_periods` are the clock periods per DRAM -:menuselection:`queue_sizes` are the sizes for the queue used for each +:menuselection:`queue_sizes` are the names of the ``DRAMSim3`` configuration file for each DRAM. For a complete list of configuration options, check the ``rad-flow/rad-sim/sim/dram/DRAMsim3/configs/`` directory. :menuselection:`config_files` are the filenames of the files specifying the memory configuration per DRAM @@ -352,7 +352,7 @@ An example configuration file is shown below, followed by an explanation for eac :menuselection:`noc_placement` is the NoC placement file to use -:menuselection:`clk_periods` are the clock periods for the configuration +:menuselection:`clk_periods` is a list of all clock periods used in this design **Cluster Configuration Parameters** diff --git a/rad-sim/config.py b/rad-sim/config.py index fbd7d76..e3d697a 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -80,13 +80,6 @@ def parse_config_file(config_filename, booksim_params, radsim_header_params, rad for i in range(0, num_configs): radsim_knobs[i]["radsim_user_design_root_dir"] = cluster_knobs["radsim_root_dir"] + "/example-designs/" + radsim_knobs[i]["design_name"] - #commented out below bc yaml file now explicitly sets sim_driver_perid - # longest_clk_period = radsim_knobs["design_clk_periods"][0] - # for p in radsim_knobs["design_clk_periods"]: - # if p > longest_clk_period: - # longest_clk_period = p - # radsim_knobs["sim_driver_period"] = longest_clk_period - if config_counter != num_configs: print('number of unique config sections in config YAML file does not match commandline argument') exit(-1) @@ -210,7 +203,7 @@ def generate_booksim_config_files(booksim_params, radsim_header_params, radsim_k def generate_radsim_params_header(radsim_header_params): - radsim_params_header_file = open(radsim_header_params["radsim_root_dir"] + "/sim/radsim_defines.hpp", "w") #AKB created temp file to test + radsim_params_header_file = open(radsim_header_params["radsim_root_dir"] + "/sim/radsim_defines.hpp", "w") radsim_params_header_file.write("#pragma once\n\n") radsim_params_header_file.write("// clang-format off\n") radsim_params_header_file.write('#define RADSIM_ROOT_DIR "' + radsim_header_params["radsim_root_dir"] + '"\n\n') @@ -369,8 +362,6 @@ def generate_radsim_config_file(radsim_knobs, cluster_knobs): else: radsim_config_file.write(param + " " ) - # if param == 'inter_rad_latency': - # radsim_config_file.write(str(ceil(cluster_knobs[param]/cluster_knobs["sim_driver_period"])) + "\n") if isinstance(cluster_knobs[param], list): for value in cluster_knobs[param]: radsim_config_file.write(str(value) + " ") @@ -431,8 +422,8 @@ def generate_radsim_main(design_names, num_rads, radsim_knobs): for i in range(num_rads): main_cpp_file.write("\tdelete system" + str(i) + ";\n") main_cpp_file.write("\tdelete driver_clk_sig" + str(i) + ";\n") - main_cpp_file.write("\tdelete blackbox;\n") #AKB added only to script - main_cpp_file.write("\tdelete inter_rad_clk_sig;\n\n") #AKB added only to script + main_cpp_file.write("\tdelete blackbox;\n") + main_cpp_file.write("\tdelete inter_rad_clk_sig;\n\n") main_cpp_file.write("\tsc_flit scf;\n") main_cpp_file.write("\tscf.FreeAllFlits();\n") main_cpp_file.write("\tFlit *f = Flit::New();\n") @@ -449,8 +440,6 @@ def prepare_build_dir(design_names): if os.path.isdir("build"): shutil.rmtree("build", ignore_errors=True) os.makedirs("build") - #os.system("cd build; cmake -DDESIGN:STRING=" + design_name + " ..; cd ..;") - #os.system("cd build;") semicol_sep_design_names = '' count = 0 count_max = len(design_names) @@ -459,10 +448,7 @@ def prepare_build_dir(design_names): if count < count_max-1: semicol_sep_design_names += ';' count = count+1 - #print("cmake -DDESIGN_NAMES=\"" + semicol_sep_design_names + "\" ..;") os.system("cd build; cmake -DCMAKE_BUILD_TYPE=Debug -DDESIGN_NAMES=\"" + semicol_sep_design_names + "\" ..; cd .;") - #os.system("cd build; cmake -DDESIGN:STRING=\"" + 'add' + "\" ..; cd .;") - #os.system("cd ..;") def find_num_configs(config_filename): with open(config_filename, 'r') as yaml_config: @@ -491,7 +477,6 @@ def find_num_configs(config_filename): exit(1) # Point to YAML configuration file - #config_filename = "example-designs/" + design_name + "/config.yml" config_filename = "config.yml" config_names = [] @@ -534,7 +519,6 @@ def find_num_configs(config_filename): "interfaces_max_axi_data_width": 512, } radsim_knobs = { #includes cluster config - #"radsim_root_dir": os.getcwd(), "design_name": design_name, "noc_num_nocs": 1, "noc_clk_period": [0.571], @@ -549,9 +533,6 @@ def find_num_configs(config_filename): "noc_adapters_out_arbiter": ["priority_rr"], "noc_adapters_vc_mapping": ["direct"], "design_clk_periods": [5.0], - # "sim_driver_period": 5.0, - # "telemetry_log_verbosity": 0, - # "telemetry_traces": ["trace0", "trace1"], "dram_num_controllers": 0, "dram_clk_periods": [2.0], "dram_queue_sizes": [64], diff --git a/rad-sim/example-designs/CMakeLists.txt b/rad-sim/example-designs/CMakeLists.txt index 3274304..8a57faa 100644 --- a/rad-sim/example-designs/CMakeLists.txt +++ b/rad-sim/example-designs/CMakeLists.txt @@ -1,9 +1,6 @@ cmake_minimum_required(VERSION 3.16) find_package(SystemCLanguage CONFIG REQUIRED) -#add_subdirectory(add) -#add_subdirectory(mult) - FOREACH(DESIGN_NAME ${DESIGN_NAMES}) MESSAGE("<<${DESIGN_NAME}>>") add_subdirectory(${DESIGN_NAME}) diff --git a/rad-sim/example-designs/add/add_driver.hpp b/rad-sim/example-designs/add/add_driver.hpp index f6cf134..cff26c2 100644 --- a/rad-sim/example-designs/add/add_driver.hpp +++ b/rad-sim/example-designs/add/add_driver.hpp @@ -14,7 +14,7 @@ class add_driver : public sc_module { std::queue numbers_to_send; int actual_sum; std::chrono::steady_clock::time_point start_time, end_time; - RADSimDesignContext* radsim_design; //AKB ADDED: store ptr passed into constructor for use in source() and sink() + RADSimDesignContext* radsim_design; public: sc_in clk; @@ -27,7 +27,7 @@ class add_driver : public sc_module { sc_in response_valid; sc_in portal_recvd; - add_driver(const sc_module_name &name, RADSimDesignContext* radsim_design_); //AKB ADDED last arg + add_driver(const sc_module_name &name, RADSimDesignContext* radsim_design_); ~add_driver(); void source(); diff --git a/rad-sim/example-designs/add/add_system.cpp b/rad-sim/example-designs/add/add_system.cpp index 8b69f2c..436b473 100644 --- a/rad-sim/example-designs/add/add_system.cpp +++ b/rad-sim/example-designs/add/add_system.cpp @@ -1,6 +1,6 @@ #include -add_system::add_system(const sc_module_name &name, sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design) // AKB: added last 3 args +add_system::add_system(const sc_module_name &name, sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design) : sc_module(name) { // Instantiate driver diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index 307e1fe..e73dca0 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -3,7 +3,7 @@ int which_rad = 1; int TOTAL_RADS = 5; -adder::adder(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg +adder::adder(const sc_module_name &name, RADSimDesignContext* radsim_design) : RADSimModule(name, radsim_design) { this->radsim_design = radsim_design; @@ -17,10 +17,6 @@ adder::adder(const sc_module_name &name, RADSimDesignContext* radsim_design) //A adder_tdata_fifo->rst(rst); adder_tdata_fifo->wen(adder_tdata_fifo_wen_signal); adder_tdata_fifo->ren(adder_tdata_fifo_ren_signal); - //sc_in> my_subset; - //my_subset = axis_adder_interface.tdata.read().range(DATAW-1, 0); - //adder_tdata_fifo->wdata(my_subset); - //adder_tdata_fifo->wdata(axis_adder_interface.tdata.read().range(DATAW-1, 0)); adder_tdata_fifo->wdata(adder_tdata); adder_tdata_fifo->full(adder_tdata_fifo_full_signal); adder_tdata_fifo->almost_full(adder_tdata_fifo_almost_full_signal); @@ -48,7 +44,7 @@ adder::adder(const sc_module_name &name, RADSimDesignContext* radsim_design) //A << axis_adder_interface.tvalid << adder_tdata_fifo_almost_full_signal << adder_tdata_fifo_empty_signal << axis_adder_master_interface.tready << axis_adder_master_interface.tvalid << adder_tdata_fifo_rdata_signal - << adder_tlast_fifo_rdata_signal << clk; //AKB: must be sensitive to clk or get occasional unexpected behaviour where rdata stagnates + << adder_tlast_fifo_rdata_signal << clk; //must be sensitive to clk or get occasional unexpected behaviour where rdata stagnates // Sequential logic and its clock/reset setup SC_CTHREAD(Tick, clk.pos()); reset_signal_is(rst, true); // Reset is active high @@ -77,14 +73,14 @@ void adder::Assign() { bool tlast = adder_tlast_fifo_rdata_signal.read(); std::string src_port_name = module_name + ".axis_adder_master_interface"; std::string dst_port_name = "portal_inst.axis_portal_slave_interface"; - uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref - uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref + uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); + uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //std::cout << "adder.cpp portal dest is: " << dst_addr << std::endl; sc_bv concat_dest; DEST_RAD(concat_dest) = which_rad; //1; DEST_LOCAL_NODE(concat_dest) = dst_addr; - DEST_REMOTE_NODE(concat_dest) = 0; //for mult module on RAD 2 -- I know this, but designer would not... -- for proof of concept tho - axis_adder_master_interface.tdest.write(concat_dest); //dst_addr); + DEST_REMOTE_NODE(concat_dest) = 0; //for mult module on RAD 2 -- I know this, but designer would not... TODO code this flexibly + axis_adder_master_interface.tdest.write(concat_dest); axis_adder_master_interface.tid.write(0); axis_adder_master_interface.tstrb.write(0); axis_adder_master_interface.tkeep.write(0); @@ -143,11 +139,7 @@ void adder::Tick() { // << axis_adder_interface.tdata.read().to_uint64() << ")!" // << std::endl; count_in_addends++; - //which_rad = 2; //can send to other RAD next time } - // else { - // which_rad = 1; - // } if (which_rad < (TOTAL_RADS-1)) { which_rad++; @@ -156,33 +148,11 @@ void adder::Tick() { which_rad = 1; //rollback } - //adder_tdata_tlast_fifo.push(std::make_tuple(axis_adder_interface.tdata.read(), axis_adder_interface.tlast.read())); } - /*if (adder_tdata_tlast_fifo.size() > 0) { //fifo not empty - //TODO: restrict fifo size, not doing so for now - std::string src_port_name = module_name + ".axis_adder_master_interface"; - std::string dst_port_name = "portal_inst.axis_portal_slave_interface"; - cout << axis_adder_interface.tdata.read().to_uint64() << endl; - uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref - uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref - axis_adder_master_interface.tdest.write(dst_addr); - axis_adder_master_interface.tid.write(0); - axis_adder_master_interface.tstrb.write(0); - axis_adder_master_interface.tkeep.write(0); - axis_adder_master_interface.tuser.write(src_addr); - axis_adder_master_interface.tlast.write(std::get<1>(adder_tdata_tlast_fifo.front())); //true only for last addend - axis_adder_master_interface.tdata.write(std::get<0>(adder_tdata_tlast_fifo.front())); - axis_adder_master_interface.tvalid.write(true); - } - else { - axis_adder_master_interface.tvalid.write(false); - } */ - //sent to portal module if (axis_adder_master_interface.tvalid.read() && axis_adder_master_interface.tready.read()) { //std::cout << "Sent the " << count_out_addends << "th addend " << axis_adder_master_interface.tdata.read().to_uint64() << " over NoC to portal module on cycle " << curr_cycle << std::endl; - //adder_tdata_tlast_fifo.pop(); count_out_addends++; } diff --git a/rad-sim/sim/design_context.cpp b/rad-sim/sim/design_context.cpp index f279dd6..6b066e4 100644 --- a/rad-sim/sim/design_context.cpp +++ b/rad-sim/sim/design_context.cpp @@ -1,9 +1,6 @@ #include RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { - // std::string radsim_knobs_filename = "/sim/radsim_knobs"; - // std::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename; - // ParseRADSimKnobs(radsim_knobs_filepath); //TODO: move this to main.cpp so it only gets called once, not per-RAD //assign its rad id rad_id = rad_id_; @@ -45,7 +42,6 @@ RADSimDesignContext::RADSimDesignContext(unsigned int rad_id_) { int num_nodes = radsim_config.GetIntVectorKnobPerRad("noc_num_nodes", noc_id, rad_id); _node_module_names[noc_id].resize(num_nodes); } - //AKB ADDED: rad_done = false; //initially this RAD is not done its simulation design } @@ -61,7 +57,6 @@ bool IsSlavePort(std::string &port_name, RADSimModule *module_ptr) { module_ptr->_axis_master_ports.end(); bool is_aximm_master = module_ptr->_aximm_master_ports.find(port_name) != module_ptr->_aximm_master_ports.end(); - std::cout << "design_context.cpp: port_name and is_aximm_master and is_axis_master " << port_name << " " << is_aximm_master << " " << is_axis_master << std::endl; assert(is_aximm_master || is_axis_master); } return (is_axis_slave || is_aximm_slave); @@ -335,7 +330,6 @@ void RADSimDesignContext::RegisterModule(std::string module_name, void RADSimDesignContext::BuildDesignContext(const std::string &placement_filename, const std::string &clks_filename) { unsigned int num_nocs = radsim_config.GetIntKnobPerRad("noc_num_nocs", rad_id); - std::cout << "rad_id " << rad_id << " has num_nocs " << num_nocs << std::endl; _node_id_is_aximm.resize(num_nocs); _node_id_ports_list.resize(num_nocs); _noc_axis_slave_adapter_info.resize(num_nocs); @@ -480,7 +474,7 @@ void RADSimDesignContext::CreateSystemNoCs(sc_in &rst) { _noc_axis_slave_adapter_info[noc_id], _noc_aximm_master_adapter_info[noc_id], _noc_aximm_slave_adapter_info[noc_id], - this); //AKB ADDED to pass in an instance of this class + this); noc_inst->noc_clk(*_noc_clks[noc_id]); noc_inst->rst(rst); @@ -710,7 +704,7 @@ void RADSimDesignContext::ReportDesignFailure() { _sim_exit_code = 1; } -//AKB ADDED: returns info (because private member) of if the RAD is done simulation +//returns whether the rad is done simulation. needed because rad_done is private member. bool RADSimDesignContext::is_rad_done() { return this->rad_done; diff --git a/rad-sim/sim/design_context.hpp b/rad-sim/sim/design_context.hpp index d31ba20..18d92e4 100644 --- a/rad-sim/sim/design_context.hpp +++ b/rad-sim/sim/design_context.hpp @@ -54,7 +54,7 @@ class RADSimDesignContext { _noc_aximm_master_ports; std::vector _aximm_signals; - //AKB ADDED: flag to indicate if this device done + //flag to indicate if this device done bool rad_done; public: @@ -107,11 +107,8 @@ class RADSimDesignContext { int GetSimExitCode(); void ReportDesignFailure(); - //AKB ADDED: bool is_rad_done(); void set_rad_done(); void AssignPortalSlaveName(std::string name); unsigned int GetPortalSlaveID (); -}; - -//extern RADSimDesignContext radsim_design; //AKB: commented out \ No newline at end of file +}; \ No newline at end of file diff --git a/rad-sim/sim/dram/mem_controller.hpp b/rad-sim/sim/dram/mem_controller.hpp index 34cd26b..a8f4fd3 100644 --- a/rad-sim/sim/dram/mem_controller.hpp +++ b/rad-sim/sim/dram/mem_controller.hpp @@ -86,7 +86,7 @@ class mem_controller : public RADSimModule { mem_controller(const sc_module_name &name, unsigned int dram_id, RADSimDesignContext* radsim_design, - std::string init_filename = ""); //AKB: added radsim_design, note that argument(s) with defaults must be at end + std::string init_filename = ""); ~mem_controller(); void MemReadCallback(uint64_t addr); diff --git a/rad-sim/sim/noc/axis_interface.hpp b/rad-sim/sim/noc/axis_interface.hpp index 56cea17..c74a008 100644 --- a/rad-sim/sim/noc/axis_interface.hpp +++ b/rad-sim/sim/noc/axis_interface.hpp @@ -129,9 +129,6 @@ struct axis_signal { // Helper function for connecting the AXI-stream master and slave ports of two // modules void Connect(axis_master_port &m, axis_slave_port &s) { - //AKB ADDED few lines below TO TEST - //std::cout << "Here in Connect in axis_interface.hpp" << endl; - //std::cout << "master " << &m << " and slave " << &s << endl; // Connect signal to master port m.tvalid(tvalid); m.tready(tready); From 6daf26e45e8a54a984b5e8607ade2c426d2db6d7 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 23 Sep 2024 13:06:48 -0400 Subject: [PATCH 094/127] Changed portal-related code to use ifndef-based enablement --- rad-sim/config.py | 16 +- rad-sim/config.yml | 32 +- .../mlp/compiler/gen_testcase.py | 6 +- rad-sim/example-designs/mlp/config.yml | 2 +- rad-sim/example-designs/mlp/mlp.clks | 1 - rad-sim/example-designs/mlp/mlp.place | 33 +- rad-sim/example-designs/mlp/mlp_top.cpp | 2 + rad-sim/sim/design_top.hpp | 14 +- rad-sim/sim/main.cpp | 16 +- rad-sim/sim/noc/noc0_rad0_config | 12 +- rad-sim/sim/noc/radsim_noc.cpp | 4 +- rad-sim/sim/portal.hpp | 2 +- rad-sim/sim/radsim_defines.hpp | 14 +- rad-sim/sim/radsim_inter_rad.cpp | 3 + rad-sim/sim/radsim_knobs | 14 +- rad-sim/sim/sim.log | 4720 ----------------- 16 files changed, 92 insertions(+), 4799 deletions(-) delete mode 100644 rad-sim/sim/sim.log diff --git a/rad-sim/config.py b/rad-sim/config.py index e3d697a..a05daa9 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -406,11 +406,12 @@ def generate_radsim_main(design_names, num_rads, radsim_knobs): + design_name + "_system\", driver_clk_sig" + str(i) + ", cluster->all_rads[" + str(i) + "]);\n") main_cpp_file.write("\tcluster->StoreSystem(system" + str(i) + ");\n") - main_cpp_file.write("\n\tsc_clock *inter_rad_clk_sig = new sc_clock(\n") - main_cpp_file.write("\t\t\"node_clk0\", radsim_config.GetDoubleKnobShared(\"sim_driver_period\"), SC_NS);\n") - main_cpp_file.write("\tRADSimInterRad* blackbox = new RADSimInterRad(\"inter_rad_box\", inter_rad_clk_sig, cluster);\n\n") - for i in range(num_rads): - main_cpp_file.write("\tblackbox->ConnectRadAxi(" + str(i) +");\n") + if (num_rads > 1): + main_cpp_file.write("\n\tsc_clock *inter_rad_clk_sig = new sc_clock(\n") + main_cpp_file.write("\t\t\"node_clk0\", radsim_config.GetDoubleKnobShared(\"sim_driver_period\"), SC_NS);\n") + main_cpp_file.write("\tRADSimInterRad* blackbox = new RADSimInterRad(\"inter_rad_box\", inter_rad_clk_sig, cluster);\n\n") + for i in range(num_rads): + main_cpp_file.write("\tblackbox->ConnectRadAxi(" + str(i) +");\n") #main_cpp_file.write("\tsc_start();\n\n") main_cpp_file.write("\n\tint start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared(\"sim_driver_period\"));\n") main_cpp_file.write("\twhile (cluster->AllRADsNotDone()) {\n") @@ -422,8 +423,9 @@ def generate_radsim_main(design_names, num_rads, radsim_knobs): for i in range(num_rads): main_cpp_file.write("\tdelete system" + str(i) + ";\n") main_cpp_file.write("\tdelete driver_clk_sig" + str(i) + ";\n") - main_cpp_file.write("\tdelete blackbox;\n") - main_cpp_file.write("\tdelete inter_rad_clk_sig;\n\n") + if (num_rads > 1): + main_cpp_file.write("\tdelete blackbox;\n") + main_cpp_file.write("\tdelete inter_rad_clk_sig;\n\n") main_cpp_file.write("\tsc_flit scf;\n") main_cpp_file.write("\tscf.FreeAllFlits();\n") main_cpp_file.write("\tFlit *f = Flit::New();\n") diff --git a/rad-sim/config.yml b/rad-sim/config.yml index 33d4bb8..0f56ee1 100644 --- a/rad-sim/config.yml +++ b/rad-sim/config.yml @@ -2,15 +2,15 @@ noc: type: ['2d'] num_nocs: 1 clk_period: [1.0] - payload_width: [166] + payload_width: [145] topology: ['mesh'] - dim_x: [10] - dim_y: [10] + dim_x: [5] + dim_y: [4] routing_func: ['dim_order'] - vcs: [5] + vcs: [1] vc_buffer_size: [8] output_buffer_size: [8] - num_packet_types: [5] + num_packet_types: [1] router_uarch: ['iq'] vc_allocator: ['islip'] sw_allocator: ['islip'] @@ -28,14 +28,18 @@ noc_adapters: vc_mapping: ['direct'] config rad1: - design: - name: 'npu' - noc_placement: ['npu.place'] - clk_periods: [5.0, 2.5] + design: + name: 'mlp' + noc_placement: ['mlp.place'] + clk_periods: [5.0] cluster: - sim_driver_period: 5.0 - telemetry_log_verbosity: 2 - telemetry_traces: [] - num_rads: 1 - cluster_configs: ['rad1'] \ No newline at end of file + sim_driver_period: 5.0 + telemetry_log_verbosity: 2 + telemetry_traces: [] + num_rads: 1 + cluster_configs: ['rad1'] + +interfaces: + max_axis_tdata_width: 512 + axis_tuser_width: 75 diff --git a/rad-sim/example-designs/mlp/compiler/gen_testcase.py b/rad-sim/example-designs/mlp/compiler/gen_testcase.py index 86f6990..b94db14 100644 --- a/rad-sim/example-designs/mlp/compiler/gen_testcase.py +++ b/rad-sim/example-designs/mlp/compiler/gen_testcase.py @@ -207,8 +207,10 @@ idx = idx + 1 clocks_file.write('output_collector 0 0\n') -placement_file.write('portal_inst 0 16 axis\n') -clocks_file.write('portal_inst 0 0\n') +#WARNING: uncomment out if multi-rad design +print('WARNING: if multi-rad mlp design, uncomment out lines 212-213 of gen_testcase.py') +# placement_file.write('portal_inst 0 16 axis\n') +# clocks_file.write('portal_inst 0 0\n') placement_file.close() clocks_file.close() diff --git a/rad-sim/example-designs/mlp/config.yml b/rad-sim/example-designs/mlp/config.yml index 0f56ee1..bf12c31 100644 --- a/rad-sim/example-designs/mlp/config.yml +++ b/rad-sim/example-designs/mlp/config.yml @@ -4,7 +4,7 @@ noc: clk_period: [1.0] payload_width: [145] topology: ['mesh'] - dim_x: [5] + dim_x: [4] dim_y: [4] routing_func: ['dim_order'] vcs: [1] diff --git a/rad-sim/example-designs/mlp/mlp.clks b/rad-sim/example-designs/mlp/mlp.clks index 7ebfa4b..3860fb5 100644 --- a/rad-sim/example-designs/mlp/mlp.clks +++ b/rad-sim/example-designs/mlp/mlp.clks @@ -14,4 +14,3 @@ input_dispatcher1 0 0 input_dispatcher2 0 0 input_dispatcher3 0 0 output_collector 0 0 -portal_inst 0 0 diff --git a/rad-sim/example-designs/mlp/mlp.place b/rad-sim/example-designs/mlp/mlp.place index 615e56e..61ace3b 100644 --- a/rad-sim/example-designs/mlp/mlp.place +++ b/rad-sim/example-designs/mlp/mlp.place @@ -1,17 +1,16 @@ -layer0_mvm0 0 3 axis -layer0_mvm1 0 9 axis -layer0_mvm2 0 0 axis -layer0_mvm3 0 12 axis -layer1_mvm0 0 14 axis -layer1_mvm1 0 8 axis -layer1_mvm2 0 5 axis -layer2_mvm0 0 6 axis -layer2_mvm1 0 4 axis -layer3_mvm0 0 11 axis -layer3_mvm1 0 7 axis -input_dispatcher0 0 2 axis -input_dispatcher1 0 1 axis -input_dispatcher2 0 10 axis -input_dispatcher3 0 13 axis -output_collector 0 15 axis -portal_inst 0 16 axis +layer0_mvm0 0 10 axis +layer0_mvm1 0 3 axis +layer0_mvm2 0 5 axis +layer0_mvm3 0 4 axis +layer1_mvm0 0 6 axis +layer1_mvm1 0 12 axis +layer1_mvm2 0 7 axis +layer2_mvm0 0 9 axis +layer2_mvm1 0 11 axis +layer3_mvm0 0 13 axis +layer3_mvm1 0 8 axis +input_dispatcher0 0 1 axis +input_dispatcher1 0 14 axis +input_dispatcher2 0 2 axis +input_dispatcher3 0 15 axis +output_collector 0 0 axis diff --git a/rad-sim/example-designs/mlp/mlp_top.cpp b/rad-sim/example-designs/mlp/mlp_top.cpp index 544c343..e4b2c15 100644 --- a/rad-sim/example-designs/mlp/mlp_top.cpp +++ b/rad-sim/example-designs/mlp/mlp_top.cpp @@ -66,7 +66,9 @@ mlp_top::mlp_top(const sc_module_name &name, RADSimDesignContext* radsim_design) output_collector->data_fifo_ren(collector_fifo_ren); output_collector->data_fifo_rdata(collector_fifo_rdata); + #ifndef SINGLE_RAD this->portal_inst->rst(rst); + #endif radsim_design->BuildDesignContext("mlp.place", "mlp.clks"); radsim_design->CreateSystemNoCs(rst); radsim_design->ConnectModulesToNoC(); diff --git a/rad-sim/sim/design_top.hpp b/rad-sim/sim/design_top.hpp index 582346d..69ec2dd 100644 --- a/rad-sim/sim/design_top.hpp +++ b/rad-sim/sim/design_top.hpp @@ -7,21 +7,27 @@ class RADSimDesignTop : virtual public sc_module { public: + #ifndef SINGLE_RAD axis_slave_port design_top_portal_axis_slave; axis_master_port design_top_portal_axis_master; portal* portal_inst; - RADSimDesignTop(RADSimDesignContext* radsim_design) { - //create portal module + #endif + RADSimDesignTop(RADSimDesignContext* radsim_design) { + #ifndef SINGLE_RAD + //create portal module std::string module_name_str = "portal_inst"; char module_name[25]; std::strcpy(module_name, module_name_str.c_str()); portal_inst = new portal(module_name, radsim_design); - //connect master to master instead, to expose to top + connect master to master instead, to expose to top portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); //top drives portal bc top receives slave inputs + #endif } ~RADSimDesignTop() { - delete portal_inst; + #ifndef SINGLE_RAD + delete portal_inst; + #endif } }; \ No newline at end of file diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index d0c5095..dbcf7e7 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -7,7 +7,7 @@ #include #include -#include +#include RADSimConfig radsim_config; std::ostream *gWatchOut; @@ -31,14 +31,14 @@ int sc_main(int argc, char *argv[]) { sc_clock *driver_clk_sig0 = new sc_clock( "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); - npu_system *system0 = new npu_system("npu_system", driver_clk_sig0, cluster->all_rads[0]); + mlp_system *system0 = new mlp_system("mlp_system", driver_clk_sig0, cluster->all_rads[0]); cluster->StoreSystem(system0); - sc_clock *inter_rad_clk_sig = new sc_clock( - "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); - RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); + // sc_clock *inter_rad_clk_sig = new sc_clock( + // "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); + // RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); - blackbox->ConnectRadAxi(0); + // blackbox->ConnectRadAxi(0); int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); while (cluster->AllRADsNotDone()) { @@ -50,8 +50,8 @@ int sc_main(int argc, char *argv[]) { delete system0; delete driver_clk_sig0; - delete blackbox; - delete inter_rad_clk_sig; + // delete blackbox; + // delete inter_rad_clk_sig; sc_flit scf; scf.FreeAllFlits(); diff --git a/rad-sim/sim/noc/noc0_rad0_config b/rad-sim/sim/noc/noc0_rad0_config index fa20978..5614bd1 100644 --- a/rad-sim/sim/noc/noc0_rad0_config +++ b/rad-sim/sim/noc/noc0_rad0_config @@ -1,25 +1,17 @@ // Topology topology = mesh; -k = 10; +k = 5; n = 2; // Routing routing_function = dim_order; // Flow control -num_vcs = 5; +num_vcs = 1; vc_buf_size = 8; output_buffer_size = 8; read_request_begin_vc = 0; read_request_end_vc = 0; -write_request_begin_vc = 1; -write_request_end_vc = 1; -write_data_begin_vc = 2; -write_data_end_vc = 2; -read_reply_begin_vc = 3; -read_reply_end_vc = 3; -write_reply_begin_vc = 4; -write_reply_end_vc = 4; // Router architecture & delays router = iq; diff --git a/rad-sim/sim/noc/radsim_noc.cpp b/rad-sim/sim/noc/radsim_noc.cpp index 15b1fe2..be8284c 100644 --- a/rad-sim/sim/noc/radsim_noc.cpp +++ b/rad-sim/sim/noc/radsim_noc.cpp @@ -242,12 +242,14 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str _aximm_slave_adapters.push_back(slave_adapter); } - //set portal ID to use in axis_slave_adapter for NoC versus inter_rad + #ifndef SINGLE_RAD + set portal ID to use in axis_slave_adapter for NoC versus inter_rad unsigned int PortalSlaveID = radsim_design->GetPortalSlaveID(); std::cout << "Set portal slave ids in radsim_noc.cpp to: " << PortalSlaveID << std::endl; for (int i = 0; i < _axis_slave_adapters.size(); i++) { _axis_slave_adapters[i]->AssignPortalSlaveID(PortalSlaveID); } + #endif std::cout << "DONE AXIS SLAVE ADAPTER CREATION " << std::endl; SC_CTHREAD(Tick, noc_clk.pos()); diff --git a/rad-sim/sim/portal.hpp b/rad-sim/sim/portal.hpp index bbdce90..3614092 100644 --- a/rad-sim/sim/portal.hpp +++ b/rad-sim/sim/portal.hpp @@ -31,7 +31,7 @@ class portal : public RADSimModule { public: RADSimDesignContext* radsim_design; - sc_in rst; + sc_in rst { "rst" }; //sc_in> portal_in; //sc_out> portal_out; //axis ports for external access to inter_rad diff --git a/rad-sim/sim/radsim_defines.hpp b/rad-sim/sim/radsim_defines.hpp index 249b544..5762f4c 100644 --- a/rad-sim/sim/radsim_defines.hpp +++ b/rad-sim/sim/radsim_defines.hpp @@ -1,14 +1,16 @@ #pragma once +#define SINGLE_RAD 1 + // clang-format off #define RADSIM_ROOT_DIR "/home/bassiabn/rad-sim/rad-flow/rad-sim" // NoC-related Parameters -#define NOC_LINKS_PAYLOAD_WIDTH 166 -#define NOC_LINKS_VCID_WIDTH 3 +#define NOC_LINKS_PAYLOAD_WIDTH 145 +#define NOC_LINKS_VCID_WIDTH 1 #define NOC_LINKS_PACKETID_WIDTH 32 -#define NOC_LINKS_TYPEID_WIDTH 3 -#define NOC_LINKS_DEST_WIDTH 21 +#define NOC_LINKS_TYPEID_WIDTH 1 +#define NOC_LINKS_DEST_WIDTH 15 #define NOC_LINKS_DEST_INTERFACE_WIDTH 5 #define NOC_LINKS_WIDTH (NOC_LINKS_PAYLOAD_WIDTH + NOC_LINKS_VCID_WIDTH + NOC_LINKS_PACKETID_WIDTH + NOC_LINKS_DEST_WIDTH + NOC_LINKS_DEST_INTERFACE_WIDTH) @@ -23,14 +25,14 @@ #define AXIS_KEEPW 8 #define AXIS_IDW NOC_LINKS_PACKETID_WIDTH #define AXIS_DESTW NOC_LINKS_DEST_WIDTH -#define AXIS_DEST_FIELDW 7 +#define AXIS_DEST_FIELDW 5 #define AXI4_IDW 8 #define AXI4_ADDRW 64 #define AXI4_LENW 8 #define AXI4_SIZEW 3 #define AXI4_BURSTW 2 #define AXI4_RESPW 2 -#define AXI4_NODE_ADDRW 7 +#define AXI4_NODE_ADDRW 5 #define AXI4_CTRLW (AXI4_LENW + AXI4_SIZEW + AXI4_BURSTW) // AXI Packetization Defines diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 812d7f9..34328ab 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -64,8 +64,11 @@ RADSimInterRad::ConnectRadPair(int i, int j) { void RADSimInterRad::ConnectRadAxi(int i) { + //Connect the axi slave interface of each portal module to its corresponding RADSimInterRad axi master interface, and vice versa + #ifndef SINGLE_RAD all_axis_master_signals[i]->Connect(*(all_axis_master_ports[i]), cluster->all_systems[i]->design_dut_inst->design_top_portal_axis_slave); //Connect(axis_master_port &m, axis_slave_port &s) all_axis_slave_signals[i]->Connect(cluster->all_systems[i]->design_dut_inst->design_top_portal_axis_master, *(all_axis_slave_ports[i])); //Connect(axis_master_port &m, axis_slave_port &s) + #endif } bool wrote_yet = false; diff --git a/rad-sim/sim/radsim_knobs b/rad-sim/sim/radsim_knobs index 3fa3bf6..df9dd53 100644 --- a/rad-sim/sim/radsim_knobs +++ b/rad-sim/sim/radsim_knobs @@ -1,22 +1,22 @@ -design_name 0 npu +design_name 0 mlp noc_num_nocs 0 1 noc_clk_period 0 1.0 -noc_vcs 0 5 -noc_payload_width 0 166 -noc_num_nodes 0 100 -design_noc_placement 0 npu.place +noc_vcs 0 1 +noc_payload_width 0 145 +noc_num_nodes 0 25 +design_noc_placement 0 mlp.place noc_adapters_clk_period 0 1.25 noc_adapters_fifo_size 0 16 noc_adapters_obuff_size 0 2 noc_adapters_in_arbiter 0 fixed_rr noc_adapters_out_arbiter 0 priority_rr noc_adapters_vc_mapping 0 direct -design_clk_periods 0 5.0 2.5 +design_clk_periods 0 5.0 dram_num_controllers 0 0 dram_clk_periods 0 2.0 dram_queue_sizes 0 64 dram_config_files 0 HBM2_8Gb_x128 -radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/npu +radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/mlp radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim sim_driver_period 5.0 telemetry_log_verbosity 2 diff --git a/rad-sim/sim/sim.log b/rad-sim/sim/sim.log deleted file mode 100644 index 15e184f..0000000 --- a/rad-sim/sim/sim.log +++ /dev/null @@ -1,4720 +0,0 @@ -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 164: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 165: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 166: Tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 185: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 186: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 187: Tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 206: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 207: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 208: Tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 224: Thread 0 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 225: Thread 0 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 226: Thread 0 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 227: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 227: Thread 0 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 228: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 228: Thread 0 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 229: Tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 229: Thread 0 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 230: Thread 0 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 231: Thread 0 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 232: Thread 0 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 233: Thread 0 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 248: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 249: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 250: Tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 269: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 270: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 271: Tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 287: Thread 1 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 287: Thread 0 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 288: Thread 1 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 288: Thread 0 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 289: Thread 1 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 289: Thread 0 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 290: Thread 1 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 290: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 290: Thread 0 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 291: Thread 1 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 291: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 291: Thread 0 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 292: Thread 1 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 292: Tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 292: Thread 0 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 293: Thread 1 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 293: Thread 0 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 294: Thread 1 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 294: Thread 0 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 295: Thread 1 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 295: Thread 0 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 296: Thread 1 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 296: Thread 0 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 345: Thread 0 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 346: Thread 0 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 347: Thread 0 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 348: Thread 0 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 349: Thread 0 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 350: Thread 0 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 351: Thread 0 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 352: Thread 0 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 353: Thread 0 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 354: Thread 0 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 401: Thread 2 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 402: Thread 2 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 402: Thread 1 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 403: Thread 0 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 403: Thread 2 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 403: Thread 1 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 404: Thread 0 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 404: Thread 2 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 404: Thread 1 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 405: Thread 0 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 405: Thread 2 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 405: Thread 1 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 406: Thread 0 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 406: Thread 2 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 406: Thread 1 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 407: Thread 0 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 407: Thread 2 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 407: Thread 1 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 408: Thread 0 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 408: Thread 2 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 408: Thread 3 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 408: Thread 1 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 409: Thread 0 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 409: Thread 2 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 409: Thread 3 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 409: Thread 1 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 410: Thread 0 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 410: Thread 2 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 410: Thread 3 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 410: Thread 1 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 411: Thread 0 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 411: Thread 3 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 411: Thread 1 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 412: Thread 0 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 412: Thread 3 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 413: Thread 3 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 414: Thread 3 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 415: Thread 3 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 416: Thread 3 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 417: Thread 3 tag is updated to 1 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 460: Thread 0 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 461: Thread 0 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 462: Thread 0 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 463: Thread 0 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 464: Thread 0 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 465: Thread 0 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 466: Thread 0 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 467: Thread 0 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 468: Thread 0 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 469: Thread 0 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 517: Thread 1 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 518: Thread 0 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 518: Thread 1 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 519: Thread 0 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 519: Thread 1 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 520: Thread 0 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 520: Thread 1 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 521: Thread 0 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 521: Thread 1 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 522: Thread 0 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 522: Thread 1 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 523: Thread 0 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 523: Thread 1 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 524: Thread 0 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 524: Thread 1 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 525: Thread 0 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 525: Thread 1 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 526: Thread 0 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 526: Thread 1 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 527: Thread 0 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 575: Thread 0 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 576: Thread 0 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 577: Thread 0 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 578: Thread 0 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 579: Thread 0 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 580: Thread 0 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 581: Thread 0 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 582: Thread 0 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 583: Thread 0 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 584: Thread 0 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 613: Thread 2 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 614: Thread 1 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 614: Thread 2 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 615: Thread 1 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 615: Thread 2 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 616: Thread 1 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 616: Thread 2 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 617: Thread 1 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 617: Thread 2 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 618: Thread 3 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 618: Thread 1 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 618: Thread 2 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 619: Thread 3 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 619: Thread 1 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 619: Thread 2 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 620: Thread 3 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 620: Thread 1 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 620: Thread 2 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 621: Thread 3 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 621: Thread 1 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 621: Thread 2 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 622: Thread 3 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 622: Thread 1 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 622: Thread 2 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 623: Thread 3 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 623: Thread 1 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 624: Thread 3 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 625: Thread 3 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 626: Thread 3 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 627: Thread 3 tag is updated to 2 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 690: Thread 1 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 691: Thread 1 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 692: Thread 1 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 693: Thread 1 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 694: Thread 1 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 695: Thread 1 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 696: Thread 1 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 697: Thread 1 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 698: Thread 1 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 699: Thread 1 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 766: Thread 2 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 767: Thread 1 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 767: Thread 2 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 768: Thread 1 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 768: Thread 2 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 769: Thread 1 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 769: Thread 2 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 770: Thread 1 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 770: Thread 2 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 771: Thread 3 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 771: Thread 1 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 771: Thread 2 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 772: Thread 3 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 772: Thread 1 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 772: Thread 2 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 773: Thread 3 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 773: Thread 1 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 773: Thread 2 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 774: Thread 3 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 774: Thread 1 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 774: Thread 2 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 775: Thread 3 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 775: Thread 1 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 775: Thread 2 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 776: Thread 3 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 776: Thread 1 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 777: Thread 3 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 778: Thread 3 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 779: Thread 3 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 780: Thread 3 tag is updated to 3 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 844: Thread 1 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 845: Thread 1 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 846: Thread 1 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 847: Thread 1 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 848: Thread 1 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 849: Thread 1 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 850: Thread 1 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 851: Thread 1 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 852: Thread 1 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 853: Thread 1 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 882: Thread 2 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 883: Thread 2 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 884: Thread 2 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 885: Thread 3 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 885: Thread 2 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 886: Thread 3 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 886: Thread 2 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 887: Thread 3 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 887: Thread 2 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 888: Thread 3 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 888: Thread 2 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 889: Thread 3 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 889: Thread 2 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 890: Thread 3 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 890: Thread 2 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 891: Thread 3 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 891: Thread 2 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 892: Thread 3 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 893: Thread 3 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 894: Thread 3 tag is updated to 4 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 954: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 954: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 954: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 954: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 954: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 954: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 954: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 954: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 954: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 954: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 955: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 955: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 955: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 955: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 955: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 955: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 955: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 955: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 955: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 955: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 956: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 956: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 956: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 956: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 956: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 956: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 956: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 956: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 956: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 956: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 959: Thread 2 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 960: Thread 2 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 961: Thread 2 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 962: Thread 3 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 962: Thread 2 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 963: Thread 3 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 963: Thread 2 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 964: Thread 3 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 964: Thread 2 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 965: Thread 3 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 965: Thread 2 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 966: Thread 3 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 966: Thread 0 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 966: Thread 2 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 967: Thread 3 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 967: Thread 0 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 967: Thread 2 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 968: Thread 3 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 968: Thread 0 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 968: Thread 2 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 969: Thread 3 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 969: Thread 0 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 970: Thread 3 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 970: Thread 0 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 971: Thread 3 tag is updated to 5 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 971: Thread 0 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 972: Thread 0 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 973: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 973: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 973: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 973: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 973: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 973: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 973: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 973: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 973: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 973: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 973: Thread 0 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 974: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 974: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 974: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 974: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 974: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 974: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 974: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 974: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 974: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 974: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 974: Thread 0 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 975: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 975: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 975: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 975: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 975: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 975: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 975: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 975: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 975: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 975: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 975: Thread 0 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 992: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 992: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 992: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 992: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 992: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 992: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 992: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 992: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 992: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 992: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 993: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 993: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 993: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 993: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 993: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 993: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 993: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 993: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 993: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 993: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 994: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 994: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 994: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 994: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 994: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 994: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 994: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 994: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 994: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 994: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1011: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1011: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1011: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1011: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1011: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1011: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1011: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1011: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1011: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1011: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1012: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1012: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1012: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1012: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1012: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1012: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1012: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1012: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1012: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1012: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1013: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1013: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1013: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1013: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1013: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1013: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1013: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1013: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1013: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1013: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1025: Thread 0 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1026: Thread 0 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1027: Thread 0 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1028: Thread 0 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1029: Thread 0 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1030: Thread 0 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1030: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1030: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1030: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1030: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1030: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1030: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1030: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1030: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1030: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1030: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1031: Thread 0 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1031: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1031: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1031: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1031: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1031: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1031: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1031: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1031: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1031: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1031: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1032: Thread 0 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1032: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1032: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1032: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1032: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1032: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1032: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1032: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1032: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1032: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1032: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1033: Thread 0 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1034: Thread 0 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1049: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1049: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1049: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1049: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1049: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1049: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1049: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1049: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1049: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1049: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1050: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1050: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1050: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1050: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1050: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1050: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1050: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1050: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1050: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1050: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1051: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1051: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1051: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1051: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1051: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1051: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1051: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1051: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1051: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1051: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1068: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1068: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1068: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1068: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1068: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1068: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1068: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1068: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1068: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1068: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1069: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1069: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1069: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1069: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1069: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1069: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1069: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1069: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1069: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1069: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1070: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1070: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1070: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1070: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1070: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1070: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1070: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1070: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1070: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1070: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1072: Thread 2 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1073: Thread 2 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1074: Thread 2 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1075: Thread 2 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1076: Thread 3 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1076: Thread 2 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1077: Thread 3 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1077: Thread 2 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1078: Thread 3 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1078: Thread 2 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1079: Thread 3 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1079: Thread 2 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1080: Thread 3 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1080: Thread 2 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1081: Thread 3 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1081: Thread 2 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1082: Thread 3 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1082: Thread 0 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1083: Thread 3 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1083: Thread 0 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1084: Thread 3 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1084: Thread 0 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1085: Thread 3 tag is updated to 6 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1085: Thread 0 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1086: Thread 0 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1087: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1087: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1087: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1087: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1087: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1087: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1087: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1087: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1087: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1087: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1087: Thread 0 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1088: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1088: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1088: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1088: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1088: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1088: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1088: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1088: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1088: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1088: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1088: Thread 0 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1089: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1089: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1089: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1089: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1089: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1089: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1089: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1089: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1089: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1089: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1089: Thread 0 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1090: Thread 0 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1091: Thread 0 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1106: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1106: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1106: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1106: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1106: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1106: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1106: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1106: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1106: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1106: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1107: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1107: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1107: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1107: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1107: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1107: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1107: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1107: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1107: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1107: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1108: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1108: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1108: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1108: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1108: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1108: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1108: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1108: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1108: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1108: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1125: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1125: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1125: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1125: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1125: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1125: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1125: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1125: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1125: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1125: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1126: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1126: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1126: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1126: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1126: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1126: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1126: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1126: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1126: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1126: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1127: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1127: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1127: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1127: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1127: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1127: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1127: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1127: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1127: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1127: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1140: Thread 0 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1141: Thread 0 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1142: Thread 0 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1143: Thread 0 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1144: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1144: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1144: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1144: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1144: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1144: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1144: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1144: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1144: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1144: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1144: Thread 0 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1145: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1145: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1145: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1145: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1145: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1145: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1145: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1145: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1145: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1145: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1145: Thread 0 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1146: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1146: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1146: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1146: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1146: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1146: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1146: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1146: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1146: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1146: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1146: Thread 0 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1147: Thread 0 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1148: Thread 0 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1149: Thread 0 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1163: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1163: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1163: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1163: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1163: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1163: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1163: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1163: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1163: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1163: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1164: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1164: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1164: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1164: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1164: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1164: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1164: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1164: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1164: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1164: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1165: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1165: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1165: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1165: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1165: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1165: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1165: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1165: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1165: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1165: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1182: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1182: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1182: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1182: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1182: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1182: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1182: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1182: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1182: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1182: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1183: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1183: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1183: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1183: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1183: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1183: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1183: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1183: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1183: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1183: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1184: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1184: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1184: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1184: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1184: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1184: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1184: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1184: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1184: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1184: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1187: Thread 2 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1188: Thread 2 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1189: Thread 2 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1190: Thread 3 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1190: Thread 2 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1191: Thread 3 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1191: Thread 2 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1192: Thread 3 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1192: Thread 2 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1193: Thread 3 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1193: Thread 2 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1194: Thread 3 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1194: Thread 2 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1195: Thread 3 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1195: Thread 0 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1195: Thread 2 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1196: Thread 3 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1196: Thread 0 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1196: Thread 2 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1197: Thread 3 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1197: Thread 0 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1198: Thread 3 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1198: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1198: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1198: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1198: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1198: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1198: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1198: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1198: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1198: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1198: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1198: Thread 0 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1199: Thread 3 tag is updated to 7 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1199: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1199: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1199: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1199: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1199: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1199: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1199: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1199: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1199: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1199: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1199: Thread 0 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1200: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1200: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1200: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1200: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1200: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1200: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1200: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1200: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1200: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1200: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1200: Thread 0 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1201: Thread 0 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1202: Thread 0 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1203: Thread 0 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1204: Thread 0 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1217: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1217: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1217: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1217: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1217: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1217: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1217: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1217: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1217: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1217: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1218: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1218: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1218: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1218: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1218: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1218: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1218: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1218: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1218: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1218: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1219: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1219: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1219: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1219: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1219: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1219: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1219: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1219: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1219: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1219: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1232: Thread 1 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1233: Thread 1 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1234: Thread 1 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1235: Thread 1 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1236: Thread 1 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1236: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1236: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1236: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1236: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1236: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1236: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1236: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1236: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1236: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1236: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1236: Thread 0 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1237: Thread 1 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1237: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1237: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1237: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1237: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1237: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1237: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1237: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1237: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1237: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1237: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1237: Thread 0 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1238: Thread 1 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1238: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1238: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1238: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1238: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1238: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1238: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1238: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1238: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1238: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1238: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1238: Thread 0 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1239: Thread 1 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1239: Thread 0 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1240: Thread 1 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1240: Thread 0 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1241: Thread 1 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1241: Thread 0 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1242: Thread 0 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1243: Thread 0 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1244: Thread 0 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1245: Thread 0 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1255: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1255: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1255: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1255: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1255: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1255: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1255: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1255: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1255: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1255: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1256: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1256: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1256: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1256: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1256: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1256: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1256: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1256: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1256: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1256: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1257: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1257: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1257: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1257: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1257: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1257: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1257: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1257: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1257: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1257: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1274: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1274: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1274: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1274: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1274: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1274: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1274: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1274: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1274: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1274: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1275: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1275: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1275: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1275: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1275: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1275: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1275: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1275: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1275: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1275: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1276: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1276: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1276: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1276: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1276: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1276: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1276: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1276: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1276: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1276: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1289: Thread 1 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1290: Thread 1 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1291: Thread 1 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1292: Thread 1 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1293: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1293: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1293: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1293: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1293: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1293: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1293: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1293: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1293: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1293: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1293: Thread 1 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1294: Thread 0 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1294: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1294: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1294: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1294: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1294: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1294: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1294: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1294: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1294: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1294: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1294: Thread 1 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1295: Thread 0 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1295: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1295: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1295: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1295: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1295: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1295: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1295: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1295: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1295: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1295: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1295: Thread 1 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1296: Thread 0 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1296: Thread 1 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1297: Thread 0 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1297: Thread 1 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1298: Thread 0 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1298: Thread 1 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1299: Thread 0 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1300: Thread 0 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1301: Thread 0 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1302: Thread 0 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1303: Thread 0 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1312: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1312: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1312: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1312: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1312: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1312: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1312: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1312: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1312: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1312: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1313: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1313: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1313: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1313: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1313: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1313: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1313: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1313: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1313: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1313: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1314: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1314: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1314: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1314: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1314: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1314: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1314: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1314: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1314: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1314: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1331: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1331: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1331: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1331: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1331: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1331: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1331: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1331: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1331: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1331: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1332: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1332: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1332: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1332: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1332: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1332: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1332: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1332: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1332: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1332: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1333: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1333: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1333: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1333: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1333: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1333: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1333: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1333: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1333: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1333: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1347: Thread 1 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1348: Thread 1 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1349: Thread 1 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1350: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1350: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1350: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1350: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1350: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1350: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1350: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1350: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1350: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1350: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1350: Thread 1 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1351: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1351: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1351: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1351: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1351: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1351: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1351: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1351: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1351: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1351: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1351: Thread 0 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1351: Thread 1 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1352: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1352: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1352: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1352: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1352: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1352: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1352: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1352: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1352: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1352: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1352: Thread 0 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1352: Thread 1 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1353: Thread 0 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1353: Thread 1 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1354: Thread 0 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1354: Thread 1 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1355: Thread 0 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1355: Thread 1 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1356: Thread 0 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1356: Thread 1 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1357: Thread 0 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1358: Thread 0 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1359: Thread 0 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1360: Thread 0 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1369: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1369: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1369: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1369: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1369: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1369: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1369: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1369: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1369: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1369: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1370: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1370: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1370: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1370: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1370: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1370: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1370: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1370: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1370: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1370: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1371: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1371: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1371: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1371: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1371: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1371: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1371: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1371: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1371: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1371: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1388: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1388: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1388: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1388: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1388: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1388: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1388: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1388: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1388: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1388: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1389: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1389: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1389: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1389: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1389: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1389: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1389: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1389: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1389: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1389: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1390: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1390: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1390: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1390: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1390: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1390: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1390: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1390: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1390: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1390: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1405: Thread 1 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1406: Thread 1 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1407: Thread 1 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1407: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1407: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1407: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1407: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1407: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1407: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1407: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1407: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1407: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1407: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1408: Thread 1 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1408: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1408: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1408: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1408: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1408: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1408: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1408: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1408: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1408: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1408: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1409: Thread 0 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1409: Thread 1 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1409: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1409: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1409: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1409: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1409: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1409: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1409: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1409: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1409: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1409: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1410: Thread 0 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1410: Thread 1 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1411: Thread 0 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1411: Thread 1 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1412: Thread 0 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1412: Thread 1 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1413: Thread 0 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1413: Thread 1 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1414: Thread 0 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1414: Thread 1 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1415: Thread 0 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1416: Thread 0 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1417: Thread 0 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1418: Thread 0 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1426: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1426: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1426: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1426: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1426: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1426: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1426: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1426: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1426: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1426: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1427: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1427: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1427: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1427: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1427: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1427: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1427: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1427: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1427: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1427: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1428: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1428: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1428: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1428: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1428: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1428: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1428: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1428: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1428: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1428: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1445: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1445: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1445: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1445: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1445: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1445: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1445: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1445: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1445: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1445: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1446: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1446: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1446: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1446: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1446: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1446: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1446: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1446: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1446: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1446: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1447: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1447: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1447: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1447: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1447: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1447: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1447: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1447: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1447: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1447: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 1461: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 1461: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 1461: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 1461: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 1461: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 1461: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 1461: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 1461: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 1461: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 1461: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 1462: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 1462: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 1462: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 1462: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 1462: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 1462: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 1462: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 1462: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 1462: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 1462: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1462: Thread 1 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 1463: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 1463: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 1463: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 1463: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 1463: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 1463: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 1463: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 1463: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 1463: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 1463: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1463: Thread 1 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1464: Thread 1 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1465: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1465: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1465: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1465: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1465: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1465: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1465: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1465: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1465: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1465: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1465: Thread 1 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1466: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1466: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1466: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1466: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1466: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1466: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1466: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1466: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1466: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1466: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1466: Thread 0 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1466: Thread 1 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1467: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1467: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1467: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1467: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1467: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1467: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1467: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1467: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1467: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1467: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1467: Thread 0 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1467: Thread 1 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1468: Thread 0 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1468: Thread 1 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1469: Thread 0 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1469: Thread 1 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1470: Thread 0 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1470: Thread 1 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1471: Thread 0 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1471: Thread 1 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1472: Thread 0 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1473: Thread 0 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1474: Thread 0 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1475: Thread 0 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1484: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1484: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1484: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1484: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1484: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1484: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1484: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1484: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1484: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1484: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1485: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1485: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1485: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1485: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1485: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1485: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1485: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1485: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1485: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1485: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1486: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1486: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1486: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1486: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1486: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1486: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1486: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1486: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1486: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1486: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1491: Thread 2 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1492: Thread 2 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1493: Thread 2 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1494: Thread 2 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1495: Thread 2 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1496: Thread 2 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1497: Thread 2 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1498: Thread 2 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1499: Thread 2 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1500: Thread 2 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1503: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1503: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1503: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1503: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1503: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1503: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1503: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1503: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1503: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1503: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1504: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1504: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1504: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1504: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1504: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1504: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1504: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1504: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1504: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1504: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1505: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1505: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1505: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1505: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1505: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1505: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1505: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1505: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1505: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1505: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1522: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1522: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1522: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1522: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1522: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1522: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1522: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1522: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1522: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1522: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1523: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1523: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1523: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1523: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1523: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1523: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1523: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1523: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1523: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1523: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1524: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1524: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1524: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1524: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1524: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1524: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1524: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1524: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1524: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1524: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1524: Thread 0 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1525: Thread 0 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1526: Thread 0 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1527: Thread 0 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1528: Thread 0 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1529: Thread 0 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1530: Thread 0 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1531: Thread 0 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1532: Thread 0 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1533: Thread 0 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1541: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1541: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1541: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1541: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1541: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1541: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1541: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1541: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1541: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1541: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1542: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1542: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1542: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1542: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1542: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1542: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1542: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1542: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1542: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1542: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1543: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1543: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1543: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1543: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1543: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1543: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1543: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1543: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1543: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1543: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1555: Thread 1 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1556: Thread 1 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1557: Thread 1 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1558: Thread 1 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1559: Thread 1 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1560: Thread 1 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1560: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1560: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1560: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1560: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1560: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1560: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1560: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1560: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1560: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1560: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1561: Thread 1 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1561: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1561: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1561: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1561: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1561: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1561: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1561: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1561: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1561: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1561: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1562: Thread 1 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1562: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1562: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1562: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1562: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1562: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1562: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1562: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1562: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1562: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1562: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1563: Thread 1 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1564: Thread 1 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1579: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1579: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1579: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1579: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1579: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1579: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1579: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1579: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1579: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1579: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1580: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1580: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1580: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1580: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1580: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1580: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1580: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1580: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1580: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1580: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1581: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1581: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1581: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1581: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1581: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1581: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1581: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1581: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1581: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1581: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1582: Thread 0 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1583: Thread 0 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1584: Thread 0 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1585: Thread 0 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1586: Thread 0 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1587: Thread 0 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1588: Thread 0 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1589: Thread 0 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1590: Thread 0 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1591: Thread 0 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1598: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1598: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1598: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1598: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1598: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1598: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1598: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1598: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1598: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1598: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1599: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1599: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1599: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1599: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1599: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1599: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1599: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1599: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1599: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1599: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1600: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1600: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1600: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1600: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1600: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1600: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1600: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1600: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1600: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1600: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1606: Thread 2 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1607: Thread 2 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1608: Thread 2 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1609: Thread 2 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1610: Thread 2 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1611: Thread 2 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1612: Thread 2 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1613: Thread 2 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1614: Thread 2 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1615: Thread 2 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1617: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1617: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1617: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1617: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1617: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1617: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1617: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1617: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1617: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1617: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1618: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1618: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1618: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1618: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1618: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1618: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1618: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1618: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1618: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1618: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1619: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1619: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1619: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1619: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1619: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1619: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1619: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1619: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1619: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1619: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1636: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1636: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1636: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1636: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1636: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1636: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1636: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1636: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1636: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1636: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1637: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1637: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1637: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1637: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1637: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1637: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1637: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1637: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1637: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1637: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1638: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1638: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1638: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1638: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1638: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1638: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1638: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1638: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1638: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1638: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1639: Thread 0 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1640: Thread 0 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1641: Thread 0 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1642: Thread 0 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1643: Thread 0 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1644: Thread 0 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1645: Thread 0 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1646: Thread 0 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1647: Thread 0 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1648: Thread 0 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1655: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1655: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1655: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1655: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1655: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1655: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1655: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1655: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1655: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1655: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1656: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1656: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1656: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1656: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1656: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1656: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1656: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1656: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1656: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1656: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1657: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1657: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1657: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1657: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1657: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1657: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1657: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1657: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1657: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1657: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1670: Thread 1 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1671: Thread 1 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1672: Thread 1 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1673: Thread 1 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1674: Thread 1 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1674: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1674: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1674: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1674: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1674: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1674: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1674: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1674: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1674: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1674: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1675: Thread 1 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1675: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1675: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1675: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1675: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1675: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1675: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1675: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1675: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1675: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1675: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1676: Thread 1 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1676: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1676: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1676: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1676: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1676: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1676: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1676: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1676: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1676: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1676: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1677: Thread 1 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1678: Thread 1 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1679: Thread 1 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1686: Thread 0 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1687: Thread 0 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1688: Thread 0 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1689: Thread 0 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1690: Thread 0 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1691: Thread 0 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1692: Thread 0 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1693: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1693: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1693: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1693: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1693: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1693: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1693: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1693: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1693: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1693: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1693: Thread 0 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1694: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1694: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1694: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1694: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1694: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1694: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1694: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1694: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1694: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1694: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1694: Thread 0 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1695: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1695: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1695: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1695: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1695: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1695: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1695: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1695: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1695: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1695: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1695: Thread 0 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_0 @ 1709: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_1 @ 1709: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_2 @ 1709: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_3 @ 1709: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_4 @ 1709: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_5 @ 1709: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_6 @ 1709: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_7 @ 1709: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_8 @ 1709: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.evrf_9 @ 1709: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1710: Thread 2 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_0 @ 1710: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_1 @ 1710: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_2 @ 1710: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_3 @ 1710: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_4 @ 1710: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_5 @ 1710: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_6 @ 1710: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_7 @ 1710: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_8 @ 1710: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu0_module_9 @ 1710: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1711: Thread 2 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_0 @ 1711: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_1 @ 1711: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_2 @ 1711: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_3 @ 1711: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_4 @ 1711: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_5 @ 1711: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_6 @ 1711: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_7 @ 1711: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_8 @ 1711: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_2.mfu1_module_9 @ 1711: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1712: Thread 2 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1713: Thread 2 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1714: Thread 2 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1715: Thread 2 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1716: Thread 2 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1717: Thread 2 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1718: Thread 2 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1719: Thread 2 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1752: Thread 1 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1753: Thread 1 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1754: Thread 1 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1755: Thread 1 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1756: Thread 1 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1757: Thread 1 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1758: Thread 1 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1759: Thread 1 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1760: Thread 1 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1761: Thread 1 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1787: Thread 2 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1788: Thread 2 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1789: Thread 2 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1790: Thread 2 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1791: Thread 2 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1792: Thread 2 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1793: Thread 2 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1794: Thread 2 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1795: Thread 2 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1796: Thread 2 tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1816: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1816: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1816: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1816: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1816: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1816: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1816: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1816: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1816: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1816: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1817: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1817: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1817: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1817: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1817: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1817: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1817: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1817: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1817: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1817: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1818: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1818: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1818: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1818: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1818: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1818: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1818: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1818: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1818: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1818: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1829: Thread 0 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1830: Thread 0 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1831: Thread 1 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1831: Thread 0 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1832: Thread 1 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1832: Thread 0 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1833: Thread 1 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1833: Thread 0 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1834: Thread 1 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1834: Thread 0 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1835: Thread 1 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1835: Thread 0 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1835: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1835: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1835: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1835: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1835: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1835: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1835: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1835: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1835: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1835: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1836: Thread 1 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1836: Thread 0 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1836: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1836: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1836: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1836: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1836: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1836: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1836: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1836: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1836: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1836: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1837: Thread 1 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1837: Thread 0 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1837: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1837: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1837: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1837: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1837: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1837: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1837: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1837: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1837: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1837: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1838: Thread 1 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1838: Thread 0 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1839: Thread 1 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1840: Thread 1 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1854: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1854: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1854: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1854: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1854: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1854: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1854: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1854: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1854: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1854: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1855: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1855: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1855: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1855: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1855: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1855: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1855: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1855: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1855: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1855: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1856: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1856: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1856: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1856: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1856: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1856: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1856: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1856: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1856: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1856: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1873: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1873: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1873: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1873: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1873: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1873: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1873: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1873: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1873: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1873: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1874: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1874: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1874: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1874: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1874: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1874: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1874: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1874: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1874: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1874: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1875: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1875: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1875: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1875: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1875: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1875: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1875: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1875: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1875: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1875: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1882: Thread 2 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1883: Thread 2 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1884: Thread 2 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1885: Thread 2 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1886: Thread 0 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1886: Thread 2 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1887: Thread 0 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1887: Thread 2 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1888: Thread 0 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1888: Thread 2 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1889: Thread 0 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1889: Thread 2 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1890: Thread 0 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1890: Thread 2 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1891: Thread 0 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1891: Thread 2 tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1892: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1892: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1892: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1892: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1892: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1892: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1892: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1892: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1892: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1892: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1892: Thread 0 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1893: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1893: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1893: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1893: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1893: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1893: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1893: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1893: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1893: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1893: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1893: Thread 0 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1894: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1894: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1894: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1894: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1894: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1894: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1894: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1894: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1894: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1894: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1894: Thread 0 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1895: Thread 0 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1911: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1911: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1911: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1911: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1911: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1911: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1911: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1911: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1911: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1911: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1912: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1912: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1912: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1912: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1912: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1912: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1912: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1912: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1912: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1912: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1913: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1913: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1913: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1913: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1913: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1913: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1913: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1913: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1913: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1913: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1930: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1930: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1930: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1930: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1930: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1930: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1930: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1930: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1930: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1930: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1931: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1931: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1931: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1931: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1931: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1931: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1931: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1931: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1931: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1931: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1932: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1932: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1932: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1932: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1932: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1932: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1932: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1932: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1932: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1932: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1944: Thread 0 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1945: Thread 0 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1946: Thread 1 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1946: Thread 0 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1947: Thread 1 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1947: Thread 0 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1948: Thread 1 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1948: Thread 0 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 1949: Thread 1 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1949: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1949: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1949: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1949: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1949: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1949: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1949: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1949: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1949: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1949: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1949: Thread 0 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 1950: Thread 1 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1950: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1950: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1950: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1950: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1950: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1950: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1950: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1950: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1950: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1950: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1950: Thread 0 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 1951: Thread 1 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1951: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1951: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1951: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1951: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1951: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1951: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1951: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1951: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1951: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1951: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1951: Thread 0 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 1952: Thread 1 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1952: Thread 0 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 1953: Thread 1 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1953: Thread 0 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 1954: Thread 1 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 1955: Thread 1 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1968: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1968: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1968: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1968: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1968: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1968: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1968: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1968: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1968: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1968: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1969: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1969: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1969: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1969: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1969: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1969: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1969: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1969: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1969: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1969: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1970: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1970: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1970: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1970: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1970: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1970: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1970: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1970: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1970: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1970: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 1987: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 1987: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 1987: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 1987: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 1987: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 1987: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 1987: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 1987: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 1987: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 1987: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 1988: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 1988: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 1988: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 1988: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 1988: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 1988: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 1988: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 1988: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 1988: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 1988: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 1989: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 1989: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 1989: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 1989: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 1989: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 1989: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 1989: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 1989: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 1989: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 1989: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 1997: Thread 2 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 1998: Thread 2 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 1999: Thread 2 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2000: Thread 2 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2001: Thread 2 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2002: Thread 0 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2002: Thread 2 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2003: Thread 0 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2003: Thread 2 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2004: Thread 0 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2004: Thread 2 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2005: Thread 0 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2005: Thread 2 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2006: Thread 0 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2006: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2006: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2006: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2006: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2006: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2006: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2006: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2006: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2006: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2006: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2006: Thread 2 tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2007: Thread 0 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2007: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2007: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2007: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2007: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2007: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2007: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2007: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2007: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2007: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2007: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2008: Thread 0 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2008: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2008: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2008: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2008: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2008: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2008: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2008: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2008: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2008: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2008: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2009: Thread 0 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2010: Thread 0 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2011: Thread 0 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2025: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2025: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2025: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2025: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2025: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2025: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2025: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2025: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2025: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2025: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2026: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2026: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2026: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2026: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2026: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2026: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2026: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2026: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2026: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2026: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2027: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2027: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2027: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2027: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2027: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2027: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2027: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2027: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2027: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2027: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2044: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2044: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2044: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2044: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2044: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2044: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2044: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2044: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2044: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2044: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2045: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2045: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2045: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2045: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2045: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2045: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2045: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2045: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2045: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2045: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2046: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2046: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2046: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2046: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2046: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2046: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2046: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2046: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2046: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2046: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2059: Thread 0 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2060: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2060: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2060: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2060: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2060: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2060: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2060: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2060: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2060: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2060: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2060: Thread 0 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2061: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2061: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2061: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2061: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2061: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2061: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2061: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2061: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2061: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2061: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2061: Thread 1 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2061: Thread 0 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2062: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2062: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2062: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2062: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2062: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2062: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2062: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2062: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2062: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2062: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2062: Thread 1 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2062: Thread 0 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2063: Thread 1 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2063: Thread 0 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2064: Thread 1 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2064: Thread 0 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2065: Thread 1 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2065: Thread 0 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2066: Thread 1 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2066: Thread 0 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2067: Thread 1 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2067: Thread 0 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2068: Thread 1 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2068: Thread 0 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2069: Thread 1 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2070: Thread 1 tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2113: Thread 2 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2114: Thread 2 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2115: Thread 2 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2116: Thread 2 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2117: Thread 0 tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2117: Thread 2 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2118: Thread 0 tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2118: Thread 2 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2119: Thread 0 tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2119: Thread 2 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2120: Thread 0 tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2120: Thread 2 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2121: Thread 0 tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2121: Thread 2 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2122: Thread 0 tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2122: Thread 2 tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2123: Thread 0 tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2124: Thread 0 tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2125: Thread 0 tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2125: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2125: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2125: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2125: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2125: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2125: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2125: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2125: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2125: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2125: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2126: Thread 0 tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2126: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2126: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2126: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2126: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2126: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2126: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2126: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2126: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2126: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2126: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2127: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2127: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2127: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2127: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2127: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2127: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2127: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2127: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2127: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2127: Tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2144: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2144: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2144: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2144: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2144: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2144: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2144: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2144: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2144: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2144: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2145: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2145: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2145: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2145: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2145: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2145: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2145: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2145: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2145: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2145: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2146: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2146: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2146: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2146: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2146: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2146: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2146: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2146: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2146: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2146: Tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2163: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2163: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2163: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2163: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2163: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2163: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2163: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2163: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2163: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2163: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2163: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2163: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2163: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2163: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2163: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2163: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2163: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2163: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2163: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2163: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2164: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2164: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2164: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2164: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2164: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2164: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2164: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2164: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2164: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2164: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2164: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2164: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2164: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2164: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2164: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2164: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2164: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2164: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2164: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2164: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2165: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2165: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2165: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2165: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2165: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2165: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2165: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2165: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2165: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2165: Tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2165: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2165: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2165: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2165: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2165: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2165: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2165: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2165: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2165: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2165: Tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2174: Thread 0 tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2175: Thread 0 tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2176: Thread 1 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2176: Thread 0 tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2177: Thread 1 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2177: Thread 0 tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2178: Thread 1 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2178: Thread 0 tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2179: Thread 1 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2179: Thread 0 tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2180: Thread 1 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2180: Thread 0 tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2181: Thread 1 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2181: Thread 0 tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2182: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2182: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2182: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2182: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2182: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2182: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2182: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2182: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2182: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2182: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2182: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2182: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2182: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2182: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2182: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2182: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2182: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2182: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2182: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2182: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2182: Thread 1 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2182: Thread 0 tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2183: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2183: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2183: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2183: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2183: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2183: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2183: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2183: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2183: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2183: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2183: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2183: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2183: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2183: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2183: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2183: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2183: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2183: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2183: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2183: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2183: Thread 1 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2183: Thread 0 tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2184: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2184: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2184: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2184: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2184: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2184: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2184: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2184: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2184: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2184: Tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2184: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2184: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2184: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2184: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2184: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2184: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2184: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2184: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2184: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2184: Tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2184: Thread 1 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2185: Thread 1 tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2201: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2201: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2201: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2201: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2201: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2201: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2201: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2201: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2201: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2201: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2201: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2201: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2201: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2201: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2201: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2201: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2201: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2201: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2201: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2201: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2202: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2202: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2202: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2202: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2202: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2202: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2202: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2202: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2202: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2202: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2202: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2202: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2202: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2202: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2202: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2202: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2202: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2202: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2202: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2202: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2203: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2203: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2203: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2203: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2203: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2203: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2203: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2203: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2203: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2203: Tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2203: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2203: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2203: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2203: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2203: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2203: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2203: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2203: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2203: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2203: Tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2213: Thread 3 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2214: Thread 3 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2215: Thread 3 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2216: Thread 3 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2217: Thread 3 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2218: Thread 3 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2219: Thread 3 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2220: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2220: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2220: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2220: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2220: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2220: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2220: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2220: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2220: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2220: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2220: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2220: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2220: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2220: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2220: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2220: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2220: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2220: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2220: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2220: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2220: Thread 3 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2221: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2221: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2221: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2221: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2221: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2221: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2221: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2221: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2221: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2221: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2221: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2221: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2221: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2221: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2221: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2221: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2221: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2221: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2221: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2221: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2221: Thread 3 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2222: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2222: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2222: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2222: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2222: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2222: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2222: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2222: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2222: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2222: Tag is updated to 27 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2222: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2222: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2222: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2222: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2222: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2222: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2222: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2222: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2222: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2222: Tag is updated to 11 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2222: Thread 3 tag is updated to 8 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2232: Thread 0 tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2233: Thread 0 tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2234: Thread 0 tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2235: Thread 0 tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2236: Thread 0 tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2237: Thread 0 tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2238: Thread 0 tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2239: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2239: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2239: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2239: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2239: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2239: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2239: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2239: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2239: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2239: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2239: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2239: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2239: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2239: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2239: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2239: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2239: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2239: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2239: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2239: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2239: Thread 0 tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2240: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2240: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2240: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2240: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2240: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2240: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2240: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2240: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2240: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2240: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2240: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2240: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2240: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2240: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2240: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2240: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2240: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2240: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2240: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2240: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2240: Thread 0 tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2241: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2241: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2241: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2241: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2241: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2241: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2241: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2241: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2241: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2241: Tag is updated to 28 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2241: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2241: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2241: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2241: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2241: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2241: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2241: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2241: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2241: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2241: Tag is updated to 12 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2241: Thread 0 tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2254: Thread 2 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2255: Thread 2 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2256: Thread 2 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2257: Thread 2 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2258: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2258: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2258: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2258: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2258: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2258: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2258: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2258: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2258: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2258: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2258: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2258: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2258: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2258: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2258: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2258: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2258: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2258: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2258: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2258: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2258: Thread 2 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2259: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2259: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2259: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2259: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2259: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2259: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2259: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2259: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2259: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2259: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2259: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2259: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2259: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2259: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2259: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2259: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2259: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2259: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2259: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2259: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2259: Thread 2 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2260: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2260: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2260: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2260: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2260: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2260: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2260: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2260: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2260: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2260: Tag is updated to 29 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2260: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2260: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2260: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2260: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2260: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2260: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2260: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2260: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2260: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2260: Tag is updated to 13 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2260: Thread 2 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2261: Thread 2 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2262: Thread 2 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2263: Thread 2 tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2277: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2277: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2277: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2277: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2277: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2277: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2277: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2277: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2277: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2277: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2278: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2278: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2278: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2278: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2278: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2278: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2278: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2278: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2278: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2278: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2279: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2279: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2279: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2279: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2279: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2279: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2279: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2279: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2279: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2279: Tag is updated to 14 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2290: Thread 0 tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2291: Thread 0 tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2291: Thread 1 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2292: Thread 0 tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2292: Thread 1 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2293: Thread 0 tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2293: Thread 1 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2294: Thread 0 tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2294: Thread 1 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2295: Thread 0 tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2295: Thread 1 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2296: Thread 0 tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2296: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2296: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2296: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2296: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2296: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2296: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2296: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2296: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2296: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2296: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2296: Thread 1 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2297: Thread 0 tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2297: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2297: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2297: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2297: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2297: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2297: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2297: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2297: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2297: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2297: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2297: Thread 1 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2298: Thread 0 tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2298: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2298: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2298: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2298: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2298: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2298: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2298: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2298: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2298: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2298: Tag is updated to 15 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2298: Thread 1 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2299: Thread 0 tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2299: Thread 1 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2300: Thread 1 tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2315: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2315: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2315: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2315: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2315: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2315: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2315: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2315: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2315: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2315: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2316: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2316: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2316: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2316: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2316: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2316: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2316: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2316: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2316: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2316: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2317: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2317: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2317: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2317: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2317: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2317: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2317: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2317: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2317: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2317: Tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2334: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2334: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2334: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2334: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2334: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2334: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2334: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2334: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2334: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2334: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2335: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2335: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2335: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2335: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2335: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2335: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2335: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2335: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2335: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2335: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2336: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2336: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2336: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2336: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2336: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2336: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2336: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2336: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2336: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2336: Tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2347: Thread 0 tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2348: Thread 0 tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2349: Thread 0 tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2350: Thread 0 tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2351: Thread 0 tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2352: Thread 0 tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2353: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2353: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2353: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2353: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2353: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2353: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2353: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2353: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2353: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2353: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2353: Thread 0 tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2354: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2354: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2354: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2354: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2354: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2354: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2354: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2354: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2354: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2354: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2354: Thread 0 tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2355: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2355: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2355: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2355: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2355: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2355: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2355: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2355: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2355: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2355: Tag is updated to 18 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2355: Thread 0 tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2356: Thread 0 tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2372: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2372: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2372: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2372: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2372: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2372: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2372: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2372: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2372: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2372: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2373: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2373: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2373: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2373: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2373: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2373: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2373: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2373: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2373: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2373: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2374: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2374: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2374: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2374: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2374: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2374: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2374: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2374: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2374: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2374: Tag is updated to 19 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2385: Thread 1 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2386: Thread 1 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2387: Thread 1 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2388: Thread 1 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2389: Thread 1 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2390: Thread 1 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2391: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2391: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2391: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2391: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2391: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2391: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2391: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2391: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2391: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2391: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2391: Thread 1 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2392: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2392: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2392: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2392: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2392: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2392: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2392: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2392: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2392: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2392: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2392: Thread 1 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2392: Thread 1 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2393: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2393: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2393: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2393: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2393: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2393: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2393: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2393: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2393: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2393: Tag is updated to 20 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2393: Thread 1 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2393: Thread 1 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2394: Thread 1 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2394: Thread 1 tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2395: Thread 1 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2396: Thread 1 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2397: Thread 1 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2398: Thread 1 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2399: Thread 1 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2400: Thread 1 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2401: Thread 1 tag is updated to 22 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2405: Thread 0 tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2406: Thread 0 tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2407: Thread 0 tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_0 @ 2407: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_1 @ 2407: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_2 @ 2407: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_3 @ 2407: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_4 @ 2407: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_5 @ 2407: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_6 @ 2407: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_7 @ 2407: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_8 @ 2407: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.evrf_9 @ 2407: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2408: Thread 0 tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_0 @ 2408: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_1 @ 2408: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_2 @ 2408: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_3 @ 2408: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_4 @ 2408: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_5 @ 2408: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_6 @ 2408: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_7 @ 2408: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_8 @ 2408: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu0_module_9 @ 2408: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2409: Thread 0 tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_0 @ 2409: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_1 @ 2409: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_2 @ 2409: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_3 @ 2409: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_4 @ 2409: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_5 @ 2409: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_6 @ 2409: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_7 @ 2409: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_8 @ 2409: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_3.mfu1_module_9 @ 2409: Tag is updated to 21 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2410: Thread 0 tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2411: Thread 0 tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2412: Thread 0 tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2413: Thread 0 tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2414: Thread 0 tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2444: Thread 3 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2445: Thread 3 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2446: Thread 3 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2447: Thread 3 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2448: Thread 3 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2449: Thread 3 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2450: Thread 3 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2451: Thread 3 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2452: Thread 3 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2453: Thread 3 tag is updated to 9 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2462: Thread 0 tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2463: Thread 0 tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2464: Thread 0 tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2465: Thread 0 tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2466: Thread 0 tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2467: Thread 0 tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2468: Thread 0 tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2469: Thread 0 tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2470: Thread 0 tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2471: Thread 0 tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2485: Thread 2 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2486: Thread 2 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2487: Thread 2 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2488: Thread 2 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2489: Thread 2 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2490: Thread 2 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2491: Thread 2 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2492: Thread 2 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2493: Thread 2 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2494: Thread 2 tag is updated to 16 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2507: Thread 1 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2508: Thread 1 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2509: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2509: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2509: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2509: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2509: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2509: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2509: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2509: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2509: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2509: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2509: Thread 1 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2510: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2510: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2510: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2510: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2510: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2510: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2510: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2510: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2510: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2510: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2510: Thread 1 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2511: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2511: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2511: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2511: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2511: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2511: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2511: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2511: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2511: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2511: Tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2511: Thread 1 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2512: Thread 1 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2513: Thread 1 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2514: Thread 1 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2515: Thread 1 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2516: Thread 1 tag is updated to 23 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2520: Thread 0 tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2521: Thread 0 tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2522: Thread 0 tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2523: Thread 0 tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2524: Thread 0 tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2525: Thread 0 tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2526: Thread 0 tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2527: Thread 0 tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2528: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2528: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2528: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2528: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2528: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2528: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2528: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2528: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2528: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2528: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2528: Thread 0 tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2529: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2529: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2529: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2529: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2529: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2529: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2529: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2529: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2529: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2529: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2529: Thread 0 tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2530: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2530: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2530: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2530: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2530: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2530: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2530: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2530: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2530: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2530: Tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2547: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2547: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2547: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2547: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2547: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2547: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2547: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2547: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2547: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2547: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2548: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2548: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2548: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2548: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2548: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2548: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2548: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2548: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2548: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2548: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2549: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2549: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2549: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2549: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2549: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2549: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2549: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2549: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2549: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2549: Tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2566: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2566: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2566: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2566: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2566: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2566: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2566: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2566: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2566: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2566: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2567: Thread 0 tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2567: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2567: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2567: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2567: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2567: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2567: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2567: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2567: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2567: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2567: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2568: Thread 0 tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2568: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2568: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2568: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2568: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2568: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2568: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2568: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2568: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2568: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2568: Tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2569: Thread 0 tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2570: Thread 0 tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2570: Thread 0 tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2571: Thread 0 tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2571: Thread 0 tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2572: Thread 0 tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2572: Thread 0 tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2573: Thread 0 tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2573: Thread 0 tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2574: Thread 0 tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2574: Thread 0 tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2575: Thread 0 tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2575: Thread 0 tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2576: Thread 0 tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2576: Thread 0 tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2577: Thread 0 tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2578: Thread 0 tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2579: Thread 0 tag is updated to 36 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2585: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2585: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2585: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2585: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2585: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2585: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2585: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2585: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2585: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2585: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2586: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2586: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2586: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2586: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2586: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2586: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2586: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2586: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2586: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2586: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2587: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2587: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2587: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2587: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2587: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2587: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2587: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2587: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2587: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2587: Tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2600: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2600: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2600: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2600: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2600: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2600: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2600: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2600: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2600: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2600: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2601: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2601: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2601: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2601: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2601: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2601: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2601: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2601: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2601: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2601: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2602: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2602: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2602: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2602: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2602: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2602: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2602: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2602: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2602: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2602: Tag is updated to 30 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2604: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2604: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2604: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2604: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2604: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2604: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2604: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2604: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2604: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2604: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2605: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2605: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2605: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2605: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2605: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2605: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2605: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2605: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2605: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2605: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2606: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2606: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2606: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2606: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2606: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2606: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2606: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2606: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2606: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2606: Tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2623: Thread 1 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2623: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2623: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2623: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2623: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2623: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2623: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2623: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2623: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2623: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2623: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2624: Thread 1 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2624: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2624: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2624: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2624: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2624: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2624: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2624: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2624: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2624: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2624: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2624: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2624: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2624: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2624: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2624: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2624: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2624: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2624: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2624: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2624: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2625: Thread 1 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2625: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2625: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2625: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2625: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2625: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2625: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2625: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2625: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2625: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2625: Tag is updated to 42 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2625: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2625: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2625: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2625: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2625: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2625: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2625: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2625: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2625: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2625: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2626: Thread 1 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2626: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2626: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2626: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2626: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2626: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2626: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2626: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2626: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2626: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2626: Tag is updated to 31 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2627: Thread 1 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2628: Thread 1 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2628: Thread 0 tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2629: Thread 1 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2629: Thread 0 tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2630: Thread 1 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2630: Thread 0 tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2631: Thread 1 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2631: Thread 0 tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2632: Thread 1 tag is updated to 24 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2632: Thread 0 tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2633: Thread 0 tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2634: Thread 0 tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2635: Thread 0 tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2636: Thread 0 tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2637: Thread 0 tag is updated to 37 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2642: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2642: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2642: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2642: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2642: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2642: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2642: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2642: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2642: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2642: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2643: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2643: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2643: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2643: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2643: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2643: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2643: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2643: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2643: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2643: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2644: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2644: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2644: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2644: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2644: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2644: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2644: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2644: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2644: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2644: Tag is updated to 43 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2648: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2648: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2648: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2648: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2648: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2648: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2648: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2648: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2648: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2648: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2649: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2649: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2649: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2649: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2649: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2649: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2649: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2649: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2649: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2649: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2650: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2650: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2650: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2650: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2650: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2650: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2650: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2650: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2650: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2650: Tag is updated to 32 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2672: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2672: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2672: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2672: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2672: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2672: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2672: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2672: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2672: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2672: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2673: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2673: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2673: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2673: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2673: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2673: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2673: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2673: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2673: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2673: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2674: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2674: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2674: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2674: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2674: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2674: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2674: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2674: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2674: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2674: Tag is updated to 33 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2674: Thread 3 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2675: Thread 3 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2676: Thread 3 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2677: Thread 3 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2678: Thread 3 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2679: Thread 3 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2680: Thread 3 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2681: Thread 3 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2682: Thread 3 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2683: Thread 3 tag is updated to 10 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2686: Thread 0 tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2687: Thread 0 tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2688: Thread 0 tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2689: Thread 0 tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2690: Thread 0 tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2691: Thread 0 tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2692: Thread 0 tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2693: Thread 0 tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2694: Thread 0 tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2695: Thread 0 tag is updated to 38 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2696: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2696: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2696: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2696: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2696: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2696: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2696: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2696: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2696: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2696: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2697: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2697: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2697: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2697: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2697: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2697: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2697: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2697: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2697: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2697: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2698: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2698: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2698: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2698: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2698: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2698: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2698: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2698: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2698: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2698: Tag is updated to 34 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_0 @ 2715: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_1 @ 2715: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_2 @ 2715: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_3 @ 2715: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_4 @ 2715: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_5 @ 2715: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_6 @ 2715: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_7 @ 2715: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_8 @ 2715: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.evrf_9 @ 2715: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2715: Thread 2 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_0 @ 2716: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_1 @ 2716: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_2 @ 2716: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_3 @ 2716: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_4 @ 2716: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_5 @ 2716: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_6 @ 2716: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_7 @ 2716: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_8 @ 2716: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu0_module_9 @ 2716: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2716: Thread 2 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_0 @ 2717: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_1 @ 2717: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_2 @ 2717: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_3 @ 2717: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_4 @ 2717: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_5 @ 2717: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_6 @ 2717: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_7 @ 2717: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_8 @ 2717: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_1.mfu1_module_9 @ 2717: Tag is updated to 35 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2717: Thread 2 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2718: Thread 2 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2719: Thread 2 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2720: Thread 2 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2721: Thread 2 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2722: Thread 2 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2723: Thread 2 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2724: Thread 2 tag is updated to 17 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2738: Thread 1 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2739: Thread 1 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2740: Thread 1 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2741: Thread 1 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2742: Thread 1 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2743: Thread 1 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2743: Thread 0 tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2744: Thread 1 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2744: Thread 0 tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2745: Thread 1 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2745: Thread 0 tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2746: Thread 1 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2746: Thread 0 tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2747: Thread 1 tag is updated to 25 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2747: Thread 0 tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2748: Thread 0 tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2749: Thread 0 tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2750: Thread 0 tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2751: Thread 0 tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2752: Thread 0 tag is updated to 39 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2754: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2754: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2754: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2754: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2754: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2754: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2754: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2754: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2754: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2754: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2755: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2755: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2755: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2755: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2755: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2755: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2755: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2755: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2755: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2755: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2756: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2756: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2756: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2756: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2756: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2756: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2756: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2756: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2756: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2756: Tag is updated to 44 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2778: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2778: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2778: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2778: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2778: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2778: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2778: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2778: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2778: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2778: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2779: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2779: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2779: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2779: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2779: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2779: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2779: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2779: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2779: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2779: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2780: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2780: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2780: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2780: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2780: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2780: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2780: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2780: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2780: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2780: Tag is updated to 45 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2801: Thread 0 tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2802: Thread 0 tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2802: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2802: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2802: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2802: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2802: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2802: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2802: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2802: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2802: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2802: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2803: Thread 0 tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2803: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2803: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2803: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2803: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2803: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2803: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2803: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2803: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2803: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2803: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2804: Thread 0 tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2804: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2804: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2804: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2804: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2804: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2804: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2804: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2804: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2804: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2804: Tag is updated to 46 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2805: Thread 0 tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2806: Thread 0 tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2807: Thread 0 tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2808: Thread 0 tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2809: Thread 0 tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2810: Thread 0 tag is updated to 40 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2826: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2826: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2826: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2826: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2826: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2826: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2826: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2826: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2826: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2826: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2827: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2827: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2827: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2827: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2827: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2827: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2827: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2827: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2827: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2827: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2828: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2828: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2828: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2828: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2828: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2828: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2828: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2828: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2828: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2828: Tag is updated to 47 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2850: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2850: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2850: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2850: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2850: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2850: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2850: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2850: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2850: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2850: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2851: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2851: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2851: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2851: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2851: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2851: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2851: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2851: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2851: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2851: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2852: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2852: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2852: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2852: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2852: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2852: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2852: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2852: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2852: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2852: Tag is updated to 48 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2853: Thread 1 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2854: Thread 1 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2855: Thread 1 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2856: Thread 1 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2857: Thread 1 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_0.sector0 @ 2858: Thread 0 tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2858: Thread 1 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_1.sector1 @ 2859: Thread 0 tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2859: Thread 1 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_2.sector2 @ 2860: Thread 0 tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2860: Thread 1 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_3.sector3 @ 2861: Thread 0 tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2861: Thread 1 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_4.sector4 @ 2862: Thread 0 tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2862: Thread 1 tag is updated to 26 -[TRACE] npu_system.npu_inst.axis_mvu_sector_5.sector5 @ 2863: Thread 0 tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_mvu_sector_6.sector6 @ 2864: Thread 0 tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_mvu_sector_7.sector7 @ 2865: Thread 0 tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_mvu_sector_8.sector8 @ 2866: Thread 0 tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_mvu_sector_9.sector9 @ 2867: Thread 0 tag is updated to 41 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_0 @ 2869: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_1 @ 2869: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_2 @ 2869: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_3 @ 2869: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_4 @ 2869: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_5 @ 2869: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_6 @ 2869: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_7 @ 2869: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_8 @ 2869: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.evrf_9 @ 2869: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_0 @ 2870: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_1 @ 2870: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_2 @ 2870: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_3 @ 2870: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_4 @ 2870: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_5 @ 2870: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_6 @ 2870: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_7 @ 2870: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_8 @ 2870: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu0_module_9 @ 2870: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_0 @ 2871: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_1 @ 2871: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_2 @ 2871: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_3 @ 2871: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_4 @ 2871: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_5 @ 2871: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_6 @ 2871: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_7 @ 2871: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_8 @ 2871: Tag is updated to 49 -[TRACE] npu_system.npu_inst.axis_vector_elementwise_0.mfu1_module_9 @ 2871: Tag is updated to 49 From d7a8f300a1e49f293d704bae86f71e86d078c7d7 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 23 Sep 2024 13:24:14 -0400 Subject: [PATCH 095/127] Fixed Python scripts for portal related config and removed checked in trace --- rad-sim/config.py | 21 ++++++++++-------- rad-sim/config.yml | 2 +- rad-sim/example-designs/mlp/mlp.place | 32 +++++++++++++-------------- rad-sim/sim/main.cpp | 9 -------- rad-sim/sim/noc/noc0_rad0_config | 2 +- rad-sim/sim/noc/radsim_noc.cpp | 2 +- rad-sim/sim/radsim_defines.hpp | 10 ++++----- rad-sim/sim/radsim_knobs | 2 +- rad-sim/sim/sim.trace | 0 9 files changed, 37 insertions(+), 43 deletions(-) delete mode 100644 rad-sim/sim/sim.trace diff --git a/rad-sim/config.py b/rad-sim/config.py index a05daa9..3a4fa69 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -208,6 +208,9 @@ def generate_radsim_params_header(radsim_header_params): radsim_params_header_file.write("// clang-format off\n") radsim_params_header_file.write('#define RADSIM_ROOT_DIR "' + radsim_header_params["radsim_root_dir"] + '"\n\n') + if (cluster_knobs["num_rads"] <= 1): + radsim_params_header_file.write('#define SINGLE_RAD 1\n\n') + radsim_params_header_file.write("// NoC-related Parameters\n") # Finding maximum NoC payload width and setting its definition max_noc_payload_width = 0 @@ -370,7 +373,7 @@ def generate_radsim_config_file(radsim_knobs, cluster_knobs): radsim_config_file.write(str(cluster_knobs[param]) + "\n") radsim_config_file.close() -def generate_radsim_main(design_names, num_rads, radsim_knobs): +def generate_radsim_main(design_names, radsim_knobs): main_cpp_file = open(radsim_header_params["radsim_root_dir"] + "/sim/main.cpp", "w") main_cpp_file.write("#include \n") main_cpp_file.write("#include \n") @@ -390,15 +393,15 @@ def generate_radsim_main(design_names, num_rads, radsim_knobs): main_cpp_file.write("int sc_main(int argc, char *argv[]) {\n") main_cpp_file.write("\tstd::string radsim_knobs_filename = \"/sim/radsim_knobs\";\n") main_cpp_file.write("\tstd::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename;\n") - main_cpp_file.write("\tradsim_config.ResizeAll(" + str(num_rads) + ");\n") + main_cpp_file.write("\tradsim_config.ResizeAll(" + str(cluster_knobs["num_rads"]) + ");\n") main_cpp_file.write("\tParseRADSimKnobs(radsim_knobs_filepath);\n\n") - main_cpp_file.write("\tRADSimCluster* cluster = new RADSimCluster(" + str(num_rads) + ");\n\n") + main_cpp_file.write("\tRADSimCluster* cluster = new RADSimCluster(" + str(cluster_knobs["num_rads"]) + ");\n\n") main_cpp_file.write("\tgWatchOut = &cout;\n") main_cpp_file.write("\tint log_verbosity = radsim_config.GetIntKnobShared(\"telemetry_log_verbosity\");\n") main_cpp_file.write("\tsim_log.SetLogSettings(log_verbosity, \"sim.log\");\n\n") main_cpp_file.write("\tint num_traces = radsim_config.GetIntKnobShared(\"telemetry_num_traces\");\n") main_cpp_file.write("\tsim_trace_probe.SetTraceRecordingSettings(\"sim.trace\", num_traces);\n\n") - for i in range(num_rads): + for i in range(cluster_knobs["num_rads"]): design_name = radsim_knobs[i]["design_name"] main_cpp_file.write("\tsc_clock *driver_clk_sig" + str(i) + " = new sc_clock(\n") main_cpp_file.write("\t\t\"node_clk0\", radsim_config.GetDoubleKnobShared(\"sim_driver_period\"), SC_NS);\n") @@ -406,11 +409,11 @@ def generate_radsim_main(design_names, num_rads, radsim_knobs): + design_name + "_system\", driver_clk_sig" + str(i) + ", cluster->all_rads[" + str(i) + "]);\n") main_cpp_file.write("\tcluster->StoreSystem(system" + str(i) + ");\n") - if (num_rads > 1): + if (cluster_knobs["num_rads"] > 1): main_cpp_file.write("\n\tsc_clock *inter_rad_clk_sig = new sc_clock(\n") main_cpp_file.write("\t\t\"node_clk0\", radsim_config.GetDoubleKnobShared(\"sim_driver_period\"), SC_NS);\n") main_cpp_file.write("\tRADSimInterRad* blackbox = new RADSimInterRad(\"inter_rad_box\", inter_rad_clk_sig, cluster);\n\n") - for i in range(num_rads): + for i in range(cluster_knobs["num_rads"]): main_cpp_file.write("\tblackbox->ConnectRadAxi(" + str(i) +");\n") #main_cpp_file.write("\tsc_start();\n\n") main_cpp_file.write("\n\tint start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared(\"sim_driver_period\"));\n") @@ -420,10 +423,10 @@ def generate_radsim_main(design_names, num_rads, radsim_knobs): main_cpp_file.write("\tint end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared(\"sim_driver_period\"));\n") main_cpp_file.write("\tsc_stop();\n") main_cpp_file.write("\tstd::cout << \"Simulation Cycles from main.cpp = \" << end_cycle - start_cycle << std::endl;\n\n") - for i in range(num_rads): + for i in range(cluster_knobs["num_rads"]): main_cpp_file.write("\tdelete system" + str(i) + ";\n") main_cpp_file.write("\tdelete driver_clk_sig" + str(i) + ";\n") - if (num_rads > 1): + if (cluster_knobs["num_rads"] > 1): main_cpp_file.write("\tdelete blackbox;\n") main_cpp_file.write("\tdelete inter_rad_clk_sig;\n\n") main_cpp_file.write("\tsc_flit scf;\n") @@ -574,7 +577,7 @@ def find_num_configs(config_filename): generate_booksim_config_files(booksim_params_per_rad, radsim_header_params, radsim_knobs_per_rad, cluster_knobs) generate_radsim_params_header(radsim_header_params) generate_radsim_config_file(radsim_knobs_per_rad, cluster_knobs) - generate_radsim_main(design_names, cluster_knobs["num_rads"], radsim_knobs_per_rad) + generate_radsim_main(design_names, radsim_knobs_per_rad) prepare_build_dir(design_names) diff --git a/rad-sim/config.yml b/rad-sim/config.yml index 0f56ee1..bf12c31 100644 --- a/rad-sim/config.yml +++ b/rad-sim/config.yml @@ -4,7 +4,7 @@ noc: clk_period: [1.0] payload_width: [145] topology: ['mesh'] - dim_x: [5] + dim_x: [4] dim_y: [4] routing_func: ['dim_order'] vcs: [1] diff --git a/rad-sim/example-designs/mlp/mlp.place b/rad-sim/example-designs/mlp/mlp.place index 61ace3b..db1f497 100644 --- a/rad-sim/example-designs/mlp/mlp.place +++ b/rad-sim/example-designs/mlp/mlp.place @@ -1,16 +1,16 @@ -layer0_mvm0 0 10 axis -layer0_mvm1 0 3 axis -layer0_mvm2 0 5 axis -layer0_mvm3 0 4 axis -layer1_mvm0 0 6 axis -layer1_mvm1 0 12 axis -layer1_mvm2 0 7 axis -layer2_mvm0 0 9 axis -layer2_mvm1 0 11 axis -layer3_mvm0 0 13 axis -layer3_mvm1 0 8 axis -input_dispatcher0 0 1 axis -input_dispatcher1 0 14 axis -input_dispatcher2 0 2 axis -input_dispatcher3 0 15 axis -output_collector 0 0 axis +layer0_mvm0 0 2 axis +layer0_mvm1 0 5 axis +layer0_mvm2 0 7 axis +layer0_mvm3 0 0 axis +layer1_mvm0 0 8 axis +layer1_mvm1 0 4 axis +layer1_mvm2 0 11 axis +layer2_mvm0 0 6 axis +layer2_mvm1 0 12 axis +layer3_mvm0 0 10 axis +layer3_mvm1 0 14 axis +input_dispatcher0 0 15 axis +input_dispatcher1 0 13 axis +input_dispatcher2 0 9 axis +input_dispatcher3 0 1 axis +output_collector 0 3 axis diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index dbcf7e7..14e6817 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -34,12 +34,6 @@ int sc_main(int argc, char *argv[]) { mlp_system *system0 = new mlp_system("mlp_system", driver_clk_sig0, cluster->all_rads[0]); cluster->StoreSystem(system0); - // sc_clock *inter_rad_clk_sig = new sc_clock( - // "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); - // RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); - - // blackbox->ConnectRadAxi(0); - int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); while (cluster->AllRADsNotDone()) { sc_start(1, SC_NS); @@ -50,9 +44,6 @@ int sc_main(int argc, char *argv[]) { delete system0; delete driver_clk_sig0; - // delete blackbox; - // delete inter_rad_clk_sig; - sc_flit scf; scf.FreeAllFlits(); Flit *f = Flit::New(); diff --git a/rad-sim/sim/noc/noc0_rad0_config b/rad-sim/sim/noc/noc0_rad0_config index 5614bd1..5ec7772 100644 --- a/rad-sim/sim/noc/noc0_rad0_config +++ b/rad-sim/sim/noc/noc0_rad0_config @@ -1,6 +1,6 @@ // Topology topology = mesh; -k = 5; +k = 4; n = 2; // Routing diff --git a/rad-sim/sim/noc/radsim_noc.cpp b/rad-sim/sim/noc/radsim_noc.cpp index be8284c..2685dc5 100644 --- a/rad-sim/sim/noc/radsim_noc.cpp +++ b/rad-sim/sim/noc/radsim_noc.cpp @@ -243,7 +243,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str } #ifndef SINGLE_RAD - set portal ID to use in axis_slave_adapter for NoC versus inter_rad + //set portal ID to use in axis_slave_adapter for NoC versus inter_rad unsigned int PortalSlaveID = radsim_design->GetPortalSlaveID(); std::cout << "Set portal slave ids in radsim_noc.cpp to: " << PortalSlaveID << std::endl; for (int i = 0; i < _axis_slave_adapters.size(); i++) { diff --git a/rad-sim/sim/radsim_defines.hpp b/rad-sim/sim/radsim_defines.hpp index 5762f4c..738d2a4 100644 --- a/rad-sim/sim/radsim_defines.hpp +++ b/rad-sim/sim/radsim_defines.hpp @@ -1,16 +1,16 @@ #pragma once -#define SINGLE_RAD 1 - // clang-format off #define RADSIM_ROOT_DIR "/home/bassiabn/rad-sim/rad-flow/rad-sim" +#define SINGLE_RAD 1 + // NoC-related Parameters #define NOC_LINKS_PAYLOAD_WIDTH 145 #define NOC_LINKS_VCID_WIDTH 1 #define NOC_LINKS_PACKETID_WIDTH 32 #define NOC_LINKS_TYPEID_WIDTH 1 -#define NOC_LINKS_DEST_WIDTH 15 +#define NOC_LINKS_DEST_WIDTH 12 #define NOC_LINKS_DEST_INTERFACE_WIDTH 5 #define NOC_LINKS_WIDTH (NOC_LINKS_PAYLOAD_WIDTH + NOC_LINKS_VCID_WIDTH + NOC_LINKS_PACKETID_WIDTH + NOC_LINKS_DEST_WIDTH + NOC_LINKS_DEST_INTERFACE_WIDTH) @@ -25,14 +25,14 @@ #define AXIS_KEEPW 8 #define AXIS_IDW NOC_LINKS_PACKETID_WIDTH #define AXIS_DESTW NOC_LINKS_DEST_WIDTH -#define AXIS_DEST_FIELDW 5 +#define AXIS_DEST_FIELDW 4 #define AXI4_IDW 8 #define AXI4_ADDRW 64 #define AXI4_LENW 8 #define AXI4_SIZEW 3 #define AXI4_BURSTW 2 #define AXI4_RESPW 2 -#define AXI4_NODE_ADDRW 5 +#define AXI4_NODE_ADDRW 4 #define AXI4_CTRLW (AXI4_LENW + AXI4_SIZEW + AXI4_BURSTW) // AXI Packetization Defines diff --git a/rad-sim/sim/radsim_knobs b/rad-sim/sim/radsim_knobs index df9dd53..54a7d57 100644 --- a/rad-sim/sim/radsim_knobs +++ b/rad-sim/sim/radsim_knobs @@ -3,7 +3,7 @@ noc_num_nocs 0 1 noc_clk_period 0 1.0 noc_vcs 0 1 noc_payload_width 0 145 -noc_num_nodes 0 25 +noc_num_nodes 0 16 design_noc_placement 0 mlp.place noc_adapters_clk_period 0 1.25 noc_adapters_fifo_size 0 16 diff --git a/rad-sim/sim/sim.trace b/rad-sim/sim/sim.trace deleted file mode 100644 index e69de29..0000000 From 8734eacff42313fd622213923c122af3d786348a Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 24 Sep 2024 02:09:04 -0400 Subject: [PATCH 096/127] Fixed comment bug --- rad-sim/sim/design_top.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/rad-sim/sim/design_top.hpp b/rad-sim/sim/design_top.hpp index 69ec2dd..9202523 100644 --- a/rad-sim/sim/design_top.hpp +++ b/rad-sim/sim/design_top.hpp @@ -20,7 +20,7 @@ class RADSimDesignTop : virtual public sc_module { std::strcpy(module_name, module_name_str.c_str()); portal_inst = new portal(module_name, radsim_design); - connect master to master instead, to expose to top + //connect master to master instead, to expose to top portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); //top drives portal bc top receives slave inputs #endif From ad6c35fc7fff6fd36bb7f680fa8eb918dd36f945 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 30 Sep 2024 01:55:22 -0400 Subject: [PATCH 097/127] Fixed mlp_int8 design to only add portal module for multi-rad designs --- .../mlp_int8/compiler/gen_testcase.py | 6 ++-- rad-sim/example-designs/mlp_int8/config.yml | 2 +- rad-sim/example-designs/mlp_int8/mlp.clks | 1 - rad-sim/example-designs/mlp_int8/mlp.place | 33 +++++++++---------- rad-sim/example-designs/mlp_int8/mlp_top.cpp | 2 ++ rad-sim/example-designs/npu/npu_top.cpp | 2 ++ 6 files changed, 25 insertions(+), 21 deletions(-) diff --git a/rad-sim/example-designs/mlp_int8/compiler/gen_testcase.py b/rad-sim/example-designs/mlp_int8/compiler/gen_testcase.py index e0e38f9..ebcc060 100644 --- a/rad-sim/example-designs/mlp_int8/compiler/gen_testcase.py +++ b/rad-sim/example-designs/mlp_int8/compiler/gen_testcase.py @@ -76,8 +76,10 @@ idx = idx + 1 clocks_file.write('inst_loader 0 0\n') -placement_file.write('portal_inst 0 16 axis\n') -clocks_file.write('portal_inst 0 0\n') +#WARNING: uncomment out if multi-rad design +print('WARNING: if multi-rad mlp_int8 design, uncomment out lines 81-82 of gen_testcase.py') +# placement_file.write('portal_inst 0 16 axis\n') +# clocks_file.write('portal_inst 0 0\n') placement_file.close() clocks_file.close() diff --git a/rad-sim/example-designs/mlp_int8/config.yml b/rad-sim/example-designs/mlp_int8/config.yml index 801f02f..bbae812 100644 --- a/rad-sim/example-designs/mlp_int8/config.yml +++ b/rad-sim/example-designs/mlp_int8/config.yml @@ -4,7 +4,7 @@ noc: clk_period: [1.0] payload_width: [166] topology: ['mesh'] - dim_x: [5] + dim_x: [4] dim_y: [4] routing_func: ['dim_order'] vcs: [5] diff --git a/rad-sim/example-designs/mlp_int8/mlp.clks b/rad-sim/example-designs/mlp_int8/mlp.clks index 87e8fcd..7acc1bf 100644 --- a/rad-sim/example-designs/mlp_int8/mlp.clks +++ b/rad-sim/example-designs/mlp_int8/mlp.clks @@ -14,4 +14,3 @@ input_dispatcher2 0 0 output_collector 0 0 weight_loader 0 0 inst_loader 0 0 -portal_inst 0 0 diff --git a/rad-sim/example-designs/mlp_int8/mlp.place b/rad-sim/example-designs/mlp_int8/mlp.place index 54d6bf4..0f28d14 100644 --- a/rad-sim/example-designs/mlp_int8/mlp.place +++ b/rad-sim/example-designs/mlp_int8/mlp.place @@ -1,17 +1,16 @@ -layer0_mvm0 0 12 axis -layer0_mvm1 0 7 axis -layer0_mvm2 0 8 axis -layer1_mvm0 0 6 axis -layer1_mvm1 0 15 axis -layer1_mvm2 0 11 axis -layer2_mvm0 0 3 axis -layer2_mvm1 0 10 axis -layer3_mvm0 0 1 axis -layer3_mvm1 0 0 axis -input_dispatcher0 0 5 axis -input_dispatcher1 0 9 axis -input_dispatcher2 0 2 axis -output_collector 0 13 axis -weight_loader 0 4 axis -inst_loader 0 14 axis -portal_inst 0 16 axis +layer0_mvm0 0 13 axis +layer0_mvm1 0 6 axis +layer0_mvm2 0 1 axis +layer1_mvm0 0 2 axis +layer1_mvm1 0 14 axis +layer1_mvm2 0 0 axis +layer2_mvm0 0 9 axis +layer2_mvm1 0 3 axis +layer3_mvm0 0 4 axis +layer3_mvm1 0 12 axis +input_dispatcher0 0 15 axis +input_dispatcher1 0 11 axis +input_dispatcher2 0 7 axis +output_collector 0 5 axis +weight_loader 0 10 axis +inst_loader 0 8 axis diff --git a/rad-sim/example-designs/mlp_int8/mlp_top.cpp b/rad-sim/example-designs/mlp_int8/mlp_top.cpp index 498a79d..e5382dd 100644 --- a/rad-sim/example-designs/mlp_int8/mlp_top.cpp +++ b/rad-sim/example-designs/mlp_int8/mlp_top.cpp @@ -117,7 +117,9 @@ mlp_top::mlp_top(const sc_module_name &name, RADSimDesignContext* radsim_design) iloader->mvm_id_fifo_wen(inst_loader_mvm_id_fifo_wen); iloader->mvm_id_fifo_wdata(inst_loader_mvm_id_fifo_wdata); + #ifndef SINGLE_RAD this->portal_inst->rst(rst); + #endif radsim_design->BuildDesignContext("mlp.place", "mlp.clks"); radsim_design->CreateSystemNoCs(rst); radsim_design->ConnectModulesToNoC(); diff --git a/rad-sim/example-designs/npu/npu_top.cpp b/rad-sim/example-designs/npu/npu_top.cpp index fe7b39b..d5c1636 100644 --- a/rad-sim/example-designs/npu/npu_top.cpp +++ b/rad-sim/example-designs/npu/npu_top.cpp @@ -80,7 +80,9 @@ npu_top::npu_top(const sc_module_name &name, RADSimDesignContext* radsim_design) vector_elementwise_blocks[thread_id]->ext_output_fifo_rdata(ofifo_rdata[thread_id]); } + #ifndef SINGLE_RAD this->portal_inst->rst(rst); + #endif radsim_design->BuildDesignContext("npu.place", "npu.clks"); radsim_design->CreateSystemNoCs(rst); radsim_design->ConnectModulesToNoC(); From a7f217a8f00f9dacdf94cd5964b6a7f2ea7594d5 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 30 Sep 2024 01:57:58 -0400 Subject: [PATCH 098/127] Removed portal from single-rad npu clk and placement files --- rad-sim/example-designs/npu/npu.clks | 3 +-- rad-sim/example-designs/npu/npu.place | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/rad-sim/example-designs/npu/npu.clks b/rad-sim/example-designs/npu/npu.clks index 2b6a6bc..e71b808 100644 --- a/rad-sim/example-designs/npu/npu.clks +++ b/rad-sim/example-designs/npu/npu.clks @@ -15,5 +15,4 @@ axis_vector_elementwise_3 0 0 axis_inst_dispatcher_0 0 0 axis_inst_dispatcher_1 0 0 axis_inst_dispatcher_2 0 0 -axis_inst_dispatcher_3 0 0 -portal_inst 0 0 \ No newline at end of file +axis_inst_dispatcher_3 0 0 \ No newline at end of file diff --git a/rad-sim/example-designs/npu/npu.place b/rad-sim/example-designs/npu/npu.place index 60889b1..766ab39 100644 --- a/rad-sim/example-designs/npu/npu.place +++ b/rad-sim/example-designs/npu/npu.place @@ -179,5 +179,4 @@ axis_vector_elementwise_3.loader_wb0_interface 0 67 axis axis_inst_dispatcher_0 0 17 axis axis_inst_dispatcher_1 0 37 axis axis_inst_dispatcher_2 0 57 axis -axis_inst_dispatcher_3 0 77 axis -portal_inst 0 39 axis \ No newline at end of file +axis_inst_dispatcher_3 0 77 axis \ No newline at end of file From ea2d72e31821a6b42c412d55c71609e126c13746 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 1 Oct 2024 00:30:53 -0400 Subject: [PATCH 099/127] Adjusted tdest width for single-RAD mlp_int8 without portal module --- rad-sim/example-designs/mlp_int8/modules/rtl/rtl_mvm.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/rad-sim/example-designs/mlp_int8/modules/rtl/rtl_mvm.v b/rad-sim/example-designs/mlp_int8/modules/rtl/rtl_mvm.v index 24e9142..c9b03a3 100644 --- a/rad-sim/example-designs/mlp_int8/modules/rtl/rtl_mvm.v +++ b/rad-sim/example-designs/mlp_int8/modules/rtl/rtl_mvm.v @@ -16,7 +16,7 @@ module rtl_mvm # ( parameter DATAW = 512, // Bitwidth of axi-s tdata parameter BYTEW = 8, // Bitwidth of axi-s tkeep, tstrb parameter IDW = 32, // Bitwidth of axi-s tid - parameter DESTW = 15, // Bitwidth of axi-s tdest + parameter DESTW = 12, // Bitwidth of axi-s tdest parameter USERW = 75, // Bitwidth of axi-s tuser parameter IPRECISION = 8, // Input precision in bits parameter OPRECISION = 32, // Output precision in bits From 253e7cf7dec6d0a7de2f132da9b15f7af42662a5 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sun, 13 Oct 2024 03:17:16 -0400 Subject: [PATCH 100/127] Updated comments in axis_slave_adapter.hpp/cpp, added multirad stes to rad-sim-code-structure doc --- docs/rad-sim-code-structure.rst | 10 ++++++++++ rad-sim/sim/noc/axis_slave_adapter.cpp | 14 +++++++------- rad-sim/sim/noc/axis_slave_adapter.hpp | 4 ++-- 3 files changed, 19 insertions(+), 9 deletions(-) diff --git a/docs/rad-sim-code-structure.rst b/docs/rad-sim-code-structure.rst index d23d027..42a6b6b 100644 --- a/docs/rad-sim-code-structure.rst +++ b/docs/rad-sim-code-structure.rst @@ -167,6 +167,10 @@ design's ``config.yml`` file. For example, if the ``config.yml`` file, had the f adapters of both modules are operating at 1.25 ns clock period (800 MHz), while ``module_a`` has a clock period of 2.5 ns (400 MHz) and ``module_b`` has a clock period of 5.0 ns (200 MHz). +.. note:: +For designs containing multiple RADs, RAD-Sim adds a portal module to the design, which allows for communication between +RADs. The clock configuration for the portal module should be added to the clock configuration file. + .. code-block:: yaml noc_adapters: @@ -200,6 +204,12 @@ and the bottom-right router has ID :math:`N^2-1` for an :math:`N \times N` mesh. interfaces, it is possible to only write the module name and this will result in all its ports to be connected to the same NoC router with arbitration logic between them. +.. note:: +For designs containing multiple RADs, RAD-Sim adds a portal module to the design, which allows for communication between +RADs. The NoC configuration for the portal module should be added to the configuration file. AXI-S is the correct +interface type. Verify that the design configuration yaml file has a large enough NoC size to include the portal module. +Any unused NoC ID can be selected. + CMakeLists File (``CMakeLists.txt``) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ This is a conventional CMakeLists file that lists all your modules, top, driver, and system header and source files diff --git a/rad-sim/sim/noc/axis_slave_adapter.cpp b/rad-sim/sim/noc/axis_slave_adapter.cpp index b5f9cfe..037080d 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.cpp +++ b/rad-sim/sim/noc/axis_slave_adapter.cpp @@ -11,8 +11,8 @@ axis_slave_adapter::axis_slave_adapter( axis_interfaces.init(interface_types.size()); // Node properties - _rad_id = rad_id; // TO-DO-MR-DONE: set appropriate RAD ID through constructor - //std::cout << "set rad_id in axis_slave_adapter " << name << " to: " << _rad_id << std::endl; + _rad_id = rad_id; + _portal_id = 0; //default 0, user must set correct value using AssignPortalSlaveID() _node_id = node_id; _network_id = network_id; _node_period = node_period; @@ -230,20 +230,18 @@ void axis_slave_adapter::InputInjection() { booksim_flit->tail = _to_be_injected_flit._tail; booksim_flit->type = _to_be_injected_flit._type; - // TO-DO-MR BEGIN if (DEST_RAD(_to_be_injected_flit._dest) == _rad_id) { //not crossing to other RAD sc_bv booksim_flit_dest = DEST_LOCAL_NODE(_to_be_injected_flit._dest); booksim_flit->dest = GetInputDestinationNode(booksim_flit_dest); booksim_flit->dest_rad = DEST_RAD(_to_be_injected_flit._dest).to_int(); booksim_flit->dest_remote = DEST_REMOTE_NODE(_to_be_injected_flit._dest).to_int(); } else { - //std::cout << "(TO-DO-MR) _portal_id in axis_slave_adapter.cpp: " << _portal_id << std::endl; - sc_bv booksim_flit_dest = _portal_id; // TO-DO-MR-DONE: set to portal node ID + //std::cout << "_portal_id in axis_slave_adapter.cpp: " << _portal_id << std::endl; + sc_bv booksim_flit_dest = _portal_id; booksim_flit->dest = GetInputDestinationNode(booksim_flit_dest); booksim_flit->dest_rad = DEST_RAD(_to_be_injected_flit._dest).to_int(); - booksim_flit->dest_remote = DEST_REMOTE_NODE(_to_be_injected_flit._dest).to_int();//to_uint(); + booksim_flit->dest_remote = DEST_REMOTE_NODE(_to_be_injected_flit._dest).to_int(); } - // TO-DO-MR END booksim_flit->dest_interface = _to_be_injected_flit._dest_interface.to_uint(); @@ -281,6 +279,8 @@ void axis_slave_adapter::InputInjection() { } } +//For the current NoC, store the node ID of the portal module that RAD-Sim adds for multi-RAD designs. +//This is used for inter-rad communication. void axis_slave_adapter::AssignPortalSlaveID(int id) { _portal_id = id; diff --git a/rad-sim/sim/noc/axis_slave_adapter.hpp b/rad-sim/sim/noc/axis_slave_adapter.hpp index 50bfcb9..f0934cf 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.hpp +++ b/rad-sim/sim/noc/axis_slave_adapter.hpp @@ -17,8 +17,8 @@ class axis_slave_adapter : public sc_module { private: - unsigned int _rad_id; // TO-DO-MR-DONE: RAD ID of this adapter (for multi-RAD systems) - unsigned int _portal_id; //AKB ADDED FOR TO-DO-MR + unsigned int _rad_id; //RAD ID of this adapter (for multi-RAD systems) + unsigned int _portal_id; //Node ID of portal module for this RAD (for communication between RADs in multi-RAD systems) unsigned int _node_id; // Node ID of this adapter double _node_period, _adapter_period, _noc_period; unsigned int _network_id; From 5e4d3611bae8e70cbe2d72a231d3889674944392 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sun, 13 Oct 2024 03:42:25 -0400 Subject: [PATCH 101/127] Updated rtl-related doc, noted special rad for exit code in configy.py, removed cmake logs --- docs/rad-sim-rtl-code.rst | 13 +- rad-sim/config.py | 5 +- .../CMakeFiles/3.16.3/CMakeCCompiler.cmake | 76 -- .../CMakeFiles/3.16.3/CMakeCXXCompiler.cmake | 88 --- .../3.16.3/CMakeDetermineCompilerABI_C.bin | Bin 16552 -> 0 bytes .../3.16.3/CMakeDetermineCompilerABI_CXX.bin | Bin 16560 -> 0 bytes .../add/CMakeFiles/3.16.3/CMakeSystem.cmake | 15 - .../3.16.3/CompilerIdC/CMakeCCompilerId.c | 671 ------------------ .../add/CMakeFiles/3.16.3/CompilerIdC/a.out | Bin 16712 -> 0 bytes .../CompilerIdCXX/CMakeCXXCompilerId.cpp | 660 ----------------- .../add/CMakeFiles/3.16.3/CompilerIdCXX/a.out | Bin 16720 -> 0 bytes .../add/CMakeFiles/CMakeError.log | 40 -- .../add/CMakeFiles/CMakeOutput.log | 477 ------------- .../add/CMakeFiles/cmake.check_cache | 1 - .../CMakeFiles/3.16.3/CMakeCCompiler.cmake | 76 -- .../CMakeFiles/3.16.3/CMakeCXXCompiler.cmake | 88 --- .../3.16.3/CMakeDetermineCompilerABI_C.bin | Bin 16552 -> 0 bytes .../3.16.3/CMakeDetermineCompilerABI_CXX.bin | Bin 16560 -> 0 bytes .../CMakeFiles/3.16.3/CMakeSystem.cmake | 15 - .../3.16.3/CompilerIdC/CMakeCCompilerId.c | 671 ------------------ .../CMakeFiles/3.16.3/CompilerIdC/a.out | Bin 16712 -> 0 bytes .../CompilerIdCXX/CMakeCXXCompilerId.cpp | 660 ----------------- .../CMakeFiles/3.16.3/CompilerIdCXX/a.out | Bin 16720 -> 0 bytes .../add_multi/CMakeFiles/CMakeError.log | 40 -- .../add_multi/CMakeFiles/CMakeOutput.log | 477 ------------- .../add_multi/CMakeFiles/cmake.check_cache | 1 - .../CMakeFiles/3.16.3/CMakeCCompiler.cmake | 76 -- .../CMakeFiles/3.16.3/CMakeCXXCompiler.cmake | 88 --- .../3.16.3/CMakeDetermineCompilerABI_C.bin | Bin 16552 -> 0 bytes .../3.16.3/CMakeDetermineCompilerABI_CXX.bin | Bin 16560 -> 0 bytes .../mult/CMakeFiles/3.16.3/CMakeSystem.cmake | 15 - .../3.16.3/CompilerIdC/CMakeCCompilerId.c | 671 ------------------ .../mult/CMakeFiles/3.16.3/CompilerIdC/a.out | Bin 16712 -> 0 bytes .../CompilerIdCXX/CMakeCXXCompilerId.cpp | 660 ----------------- .../CMakeFiles/3.16.3/CompilerIdCXX/a.out | Bin 16720 -> 0 bytes .../mult/CMakeFiles/CMakeError.log | 40 -- .../mult/CMakeFiles/CMakeOutput.log | 477 ------------- .../mult/CMakeFiles/cmake.check_cache | 1 - 38 files changed, 14 insertions(+), 6088 deletions(-) delete mode 100644 rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeCCompiler.cmake delete mode 100644 rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake delete mode 100755 rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin delete mode 100755 rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin delete mode 100644 rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeSystem.cmake delete mode 100644 rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c delete mode 100755 rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/a.out delete mode 100644 rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdCXX/CMakeCXXCompilerId.cpp delete mode 100755 rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdCXX/a.out delete mode 100644 rad-sim/example-designs/add/CMakeFiles/CMakeError.log delete mode 100644 rad-sim/example-designs/add/CMakeFiles/CMakeOutput.log delete mode 100644 rad-sim/example-designs/add/CMakeFiles/cmake.check_cache delete mode 100644 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeCCompiler.cmake delete mode 100644 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake delete mode 100755 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin delete mode 100755 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin delete mode 100644 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeSystem.cmake delete mode 100644 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c delete mode 100755 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdC/a.out delete mode 100644 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdCXX/CMakeCXXCompilerId.cpp delete mode 100755 rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdCXX/a.out delete mode 100644 rad-sim/example-designs/add_multi/CMakeFiles/CMakeError.log delete mode 100644 rad-sim/example-designs/add_multi/CMakeFiles/CMakeOutput.log delete mode 100644 rad-sim/example-designs/add_multi/CMakeFiles/cmake.check_cache delete mode 100644 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeCCompiler.cmake delete mode 100644 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake delete mode 100755 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin delete mode 100755 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin delete mode 100644 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeSystem.cmake delete mode 100644 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c delete mode 100755 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdC/a.out delete mode 100644 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdCXX/CMakeCXXCompilerId.cpp delete mode 100755 rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdCXX/a.out delete mode 100644 rad-sim/example-designs/mult/CMakeFiles/CMakeError.log delete mode 100644 rad-sim/example-designs/mult/CMakeFiles/CMakeOutput.log delete mode 100644 rad-sim/example-designs/mult/CMakeFiles/cmake.check_cache diff --git a/docs/rad-sim-rtl-code.rst b/docs/rad-sim-rtl-code.rst index 5612ecb..16425a6 100644 --- a/docs/rad-sim-rtl-code.rst +++ b/docs/rad-sim-rtl-code.rst @@ -1,7 +1,5 @@ Compiling a RAD-Sim Module with RTL ==================================== -WARNING/TODO: this guide has not been updated or tested with multi-RAD RADSim. This is functional for single-RAD RADSim. - RAD-Sim has the capability to support RTL code (Verilog/SystemVerilog only) through Verilator. Verilator compiles RTL code into a faster optimized model, wrapped inside a C++/SystemC module. More information about Verilator can be found at `Veripool `_. @@ -60,6 +58,17 @@ RAD-Sim has a pre-defined file structure for supporting RTL code. All RTL code m An example design that utilizes RTL modules can be found in the ``rad-sim/example-designs/rtl_add`` folder. +.. note:: + For designs containing multiple RADs, RAD-Sim adds a portal module to each RAD for communication between devices. + Bitwidths for AXI-S signals carrying destination address (``tdest``) should match the ``DESTW`` set in + ``sim/radsim_defines.hpp``, which is generated by running: + .. code-block:: bash + $ python config.py + +.. note:: + RAD-Sim adds a portal module for designs containing multiple RADs. The NoC, clock, and general configuration files + should be modified according to the developer guide. + RTL CMakeLists --------------- The RTL source folder additionally contains a CMakeLists script, and an optional port mapping file used for :ref:`automatic wrapper generation `. diff --git a/rad-sim/config.py b/rad-sim/config.py index 3a4fa69..e443f7e 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -247,8 +247,8 @@ def generate_radsim_params_header(radsim_header_params): for n in radsim_header_params["noc_num_nodes"]: if n > max_num_nodes: max_num_nodes = n - max_destination_bitwidth = int(math.ceil(math.log(max_num_nodes, 2))) * 3 # TO-DO-MR: Multiply by 3 for (rad_id, node_id1, node_id0). If single RAD, node_id0 and node_id1 is the same. If not, node_id0 is portal and node_id1 is destination node on other RAD. - max_destination_field_bitwidth = int(math.ceil(math.log(max_num_nodes, 2))) # TO-DO-MR: Bitwidth of a single field of the destination described above. + max_destination_bitwidth = int(math.ceil(math.log(max_num_nodes, 2))) * 3 #Multiply by 3 for (rad_id, node_id1, node_id0). If single RAD, node_id0 and node_id1 is the same. If not, node_id0 is portal and node_id1 is destination node on other RAD. + max_destination_field_bitwidth = int(math.ceil(math.log(max_num_nodes, 2))) #Bitwidth of a single field of the destination described above. radsim_params_header_file.write("#define NOC_LINKS_DEST_WIDTH " + str(max_destination_bitwidth) + "\n") dest_interface_bitwidth = int(math.ceil(math.log(radsim_header_params["noc_max_num_router_dest_interfaces"], 2))) @@ -438,6 +438,7 @@ def generate_radsim_main(design_names, radsim_knobs): main_cpp_file.write("\tsim_trace_probe.dump_traces();\n") main_cpp_file.write("\t(void)argc;\n") main_cpp_file.write("\t(void)argv;\n") + #device with RAD ID 0 is special as it is used to generate simulation exit codes main_cpp_file.write("\treturn cluster->all_rads[0]->GetSimExitCode();\n") main_cpp_file.write("}\n") diff --git a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeCCompiler.cmake b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeCCompiler.cmake deleted file mode 100644 index c5ece7b..0000000 --- a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeCCompiler.cmake +++ /dev/null @@ -1,76 +0,0 @@ -set(CMAKE_C_COMPILER "/usr/bin/cc") -set(CMAKE_C_COMPILER_ARG1 "") -set(CMAKE_C_COMPILER_ID "GNU") -set(CMAKE_C_COMPILER_VERSION "9.4.0") -set(CMAKE_C_COMPILER_VERSION_INTERNAL "") -set(CMAKE_C_COMPILER_WRAPPER "") -set(CMAKE_C_STANDARD_COMPUTED_DEFAULT "11") -set(CMAKE_C_COMPILE_FEATURES "c_std_90;c_function_prototypes;c_std_99;c_restrict;c_variadic_macros;c_std_11;c_static_assert") -set(CMAKE_C90_COMPILE_FEATURES "c_std_90;c_function_prototypes") -set(CMAKE_C99_COMPILE_FEATURES "c_std_99;c_restrict;c_variadic_macros") -set(CMAKE_C11_COMPILE_FEATURES "c_std_11;c_static_assert") - -set(CMAKE_C_PLATFORM_ID "Linux") -set(CMAKE_C_SIMULATE_ID "") -set(CMAKE_C_COMPILER_FRONTEND_VARIANT "") -set(CMAKE_C_SIMULATE_VERSION "") - - - -set(CMAKE_AR "/usr/bin/ar") -set(CMAKE_C_COMPILER_AR "/usr/bin/gcc-ar-9") -set(CMAKE_RANLIB "/usr/bin/ranlib") -set(CMAKE_C_COMPILER_RANLIB "/usr/bin/gcc-ranlib-9") -set(CMAKE_LINKER "/usr/bin/ld") -set(CMAKE_MT "") -set(CMAKE_COMPILER_IS_GNUCC 1) -set(CMAKE_C_COMPILER_LOADED 1) -set(CMAKE_C_COMPILER_WORKS TRUE) -set(CMAKE_C_ABI_COMPILED TRUE) -set(CMAKE_COMPILER_IS_MINGW ) -set(CMAKE_COMPILER_IS_CYGWIN ) -if(CMAKE_COMPILER_IS_CYGWIN) - set(CYGWIN 1) - set(UNIX 1) -endif() - -set(CMAKE_C_COMPILER_ENV_VAR "CC") - -if(CMAKE_COMPILER_IS_MINGW) - set(MINGW 1) -endif() -set(CMAKE_C_COMPILER_ID_RUN 1) -set(CMAKE_C_SOURCE_FILE_EXTENSIONS c;m) -set(CMAKE_C_IGNORE_EXTENSIONS h;H;o;O;obj;OBJ;def;DEF;rc;RC) -set(CMAKE_C_LINKER_PREFERENCE 10) - -# Save compiler ABI information. -set(CMAKE_C_SIZEOF_DATA_PTR "8") -set(CMAKE_C_COMPILER_ABI "ELF") -set(CMAKE_C_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") - -if(CMAKE_C_SIZEOF_DATA_PTR) - set(CMAKE_SIZEOF_VOID_P "${CMAKE_C_SIZEOF_DATA_PTR}") -endif() - -if(CMAKE_C_COMPILER_ABI) - set(CMAKE_INTERNAL_PLATFORM_ABI "${CMAKE_C_COMPILER_ABI}") -endif() - -if(CMAKE_C_LIBRARY_ARCHITECTURE) - set(CMAKE_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") -endif() - -set(CMAKE_C_CL_SHOWINCLUDES_PREFIX "") -if(CMAKE_C_CL_SHOWINCLUDES_PREFIX) - set(CMAKE_CL_SHOWINCLUDES_PREFIX "${CMAKE_C_CL_SHOWINCLUDES_PREFIX}") -endif() - - - - - -set(CMAKE_C_IMPLICIT_INCLUDE_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include") -set(CMAKE_C_IMPLICIT_LINK_LIBRARIES "gcc;gcc_s;c;gcc;gcc_s") -set(CMAKE_C_IMPLICIT_LINK_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib") -set(CMAKE_C_IMPLICIT_LINK_FRAMEWORK_DIRECTORIES "") diff --git a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake deleted file mode 100644 index 278ef39..0000000 --- a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake +++ /dev/null @@ -1,88 +0,0 @@ -set(CMAKE_CXX_COMPILER "/usr/bin/c++") -set(CMAKE_CXX_COMPILER_ARG1 "") -set(CMAKE_CXX_COMPILER_ID "GNU") -set(CMAKE_CXX_COMPILER_VERSION "9.4.0") -set(CMAKE_CXX_COMPILER_VERSION_INTERNAL "") -set(CMAKE_CXX_COMPILER_WRAPPER "") -set(CMAKE_CXX_STANDARD_COMPUTED_DEFAULT "14") -set(CMAKE_CXX_COMPILE_FEATURES "cxx_std_98;cxx_template_template_parameters;cxx_std_11;cxx_alias_templates;cxx_alignas;cxx_alignof;cxx_attributes;cxx_auto_type;cxx_constexpr;cxx_decltype;cxx_decltype_incomplete_return_types;cxx_default_function_template_args;cxx_defaulted_functions;cxx_defaulted_move_initializers;cxx_delegating_constructors;cxx_deleted_functions;cxx_enum_forward_declarations;cxx_explicit_conversions;cxx_extended_friend_declarations;cxx_extern_templates;cxx_final;cxx_func_identifier;cxx_generalized_initializers;cxx_inheriting_constructors;cxx_inline_namespaces;cxx_lambdas;cxx_local_type_template_args;cxx_long_long_type;cxx_noexcept;cxx_nonstatic_member_init;cxx_nullptr;cxx_override;cxx_range_for;cxx_raw_string_literals;cxx_reference_qualified_functions;cxx_right_angle_brackets;cxx_rvalue_references;cxx_sizeof_member;cxx_static_assert;cxx_strong_enums;cxx_thread_local;cxx_trailing_return_types;cxx_unicode_literals;cxx_uniform_initialization;cxx_unrestricted_unions;cxx_user_literals;cxx_variadic_macros;cxx_variadic_templates;cxx_std_14;cxx_aggregate_default_initializers;cxx_attribute_deprecated;cxx_binary_literals;cxx_contextual_conversions;cxx_decltype_auto;cxx_digit_separators;cxx_generic_lambdas;cxx_lambda_init_captures;cxx_relaxed_constexpr;cxx_return_type_deduction;cxx_variable_templates;cxx_std_17;cxx_std_20") -set(CMAKE_CXX98_COMPILE_FEATURES "cxx_std_98;cxx_template_template_parameters") -set(CMAKE_CXX11_COMPILE_FEATURES "cxx_std_11;cxx_alias_templates;cxx_alignas;cxx_alignof;cxx_attributes;cxx_auto_type;cxx_constexpr;cxx_decltype;cxx_decltype_incomplete_return_types;cxx_default_function_template_args;cxx_defaulted_functions;cxx_defaulted_move_initializers;cxx_delegating_constructors;cxx_deleted_functions;cxx_enum_forward_declarations;cxx_explicit_conversions;cxx_extended_friend_declarations;cxx_extern_templates;cxx_final;cxx_func_identifier;cxx_generalized_initializers;cxx_inheriting_constructors;cxx_inline_namespaces;cxx_lambdas;cxx_local_type_template_args;cxx_long_long_type;cxx_noexcept;cxx_nonstatic_member_init;cxx_nullptr;cxx_override;cxx_range_for;cxx_raw_string_literals;cxx_reference_qualified_functions;cxx_right_angle_brackets;cxx_rvalue_references;cxx_sizeof_member;cxx_static_assert;cxx_strong_enums;cxx_thread_local;cxx_trailing_return_types;cxx_unicode_literals;cxx_uniform_initialization;cxx_unrestricted_unions;cxx_user_literals;cxx_variadic_macros;cxx_variadic_templates") -set(CMAKE_CXX14_COMPILE_FEATURES "cxx_std_14;cxx_aggregate_default_initializers;cxx_attribute_deprecated;cxx_binary_literals;cxx_contextual_conversions;cxx_decltype_auto;cxx_digit_separators;cxx_generic_lambdas;cxx_lambda_init_captures;cxx_relaxed_constexpr;cxx_return_type_deduction;cxx_variable_templates") -set(CMAKE_CXX17_COMPILE_FEATURES "cxx_std_17") -set(CMAKE_CXX20_COMPILE_FEATURES "cxx_std_20") - -set(CMAKE_CXX_PLATFORM_ID "Linux") -set(CMAKE_CXX_SIMULATE_ID "") -set(CMAKE_CXX_COMPILER_FRONTEND_VARIANT "") -set(CMAKE_CXX_SIMULATE_VERSION "") - - - -set(CMAKE_AR "/usr/bin/ar") -set(CMAKE_CXX_COMPILER_AR "/usr/bin/gcc-ar-9") -set(CMAKE_RANLIB "/usr/bin/ranlib") -set(CMAKE_CXX_COMPILER_RANLIB "/usr/bin/gcc-ranlib-9") -set(CMAKE_LINKER "/usr/bin/ld") -set(CMAKE_MT "") -set(CMAKE_COMPILER_IS_GNUCXX 1) -set(CMAKE_CXX_COMPILER_LOADED 1) -set(CMAKE_CXX_COMPILER_WORKS TRUE) -set(CMAKE_CXX_ABI_COMPILED TRUE) -set(CMAKE_COMPILER_IS_MINGW ) -set(CMAKE_COMPILER_IS_CYGWIN ) -if(CMAKE_COMPILER_IS_CYGWIN) - set(CYGWIN 1) - set(UNIX 1) -endif() - -set(CMAKE_CXX_COMPILER_ENV_VAR "CXX") - -if(CMAKE_COMPILER_IS_MINGW) - set(MINGW 1) -endif() -set(CMAKE_CXX_COMPILER_ID_RUN 1) -set(CMAKE_CXX_SOURCE_FILE_EXTENSIONS C;M;c++;cc;cpp;cxx;m;mm;CPP) -set(CMAKE_CXX_IGNORE_EXTENSIONS inl;h;hpp;HPP;H;o;O;obj;OBJ;def;DEF;rc;RC) - -foreach (lang C OBJC OBJCXX) - if (CMAKE_${lang}_COMPILER_ID_RUN) - foreach(extension IN LISTS CMAKE_${lang}_SOURCE_FILE_EXTENSIONS) - list(REMOVE_ITEM CMAKE_CXX_SOURCE_FILE_EXTENSIONS ${extension}) - endforeach() - endif() -endforeach() - -set(CMAKE_CXX_LINKER_PREFERENCE 30) -set(CMAKE_CXX_LINKER_PREFERENCE_PROPAGATES 1) - -# Save compiler ABI information. -set(CMAKE_CXX_SIZEOF_DATA_PTR "8") -set(CMAKE_CXX_COMPILER_ABI "ELF") -set(CMAKE_CXX_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") - -if(CMAKE_CXX_SIZEOF_DATA_PTR) - set(CMAKE_SIZEOF_VOID_P "${CMAKE_CXX_SIZEOF_DATA_PTR}") -endif() - -if(CMAKE_CXX_COMPILER_ABI) - set(CMAKE_INTERNAL_PLATFORM_ABI "${CMAKE_CXX_COMPILER_ABI}") -endif() - -if(CMAKE_CXX_LIBRARY_ARCHITECTURE) - set(CMAKE_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") -endif() - -set(CMAKE_CXX_CL_SHOWINCLUDES_PREFIX "") -if(CMAKE_CXX_CL_SHOWINCLUDES_PREFIX) - set(CMAKE_CL_SHOWINCLUDES_PREFIX "${CMAKE_CXX_CL_SHOWINCLUDES_PREFIX}") -endif() - - - - - -set(CMAKE_CXX_IMPLICIT_INCLUDE_DIRECTORIES "/usr/include/c++/9;/usr/include/x86_64-linux-gnu/c++/9;/usr/include/c++/9/backward;/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include") -set(CMAKE_CXX_IMPLICIT_LINK_LIBRARIES "stdc++;m;gcc_s;gcc;c;gcc_s;gcc") -set(CMAKE_CXX_IMPLICIT_LINK_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib") -set(CMAKE_CXX_IMPLICIT_LINK_FRAMEWORK_DIRECTORIES "") diff --git a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin deleted file mode 100755 index ebea4b340830aee444aab660f7a351e9a05007f2..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 16552 zcmeHOeQXrR6`%9jaDchH5R+VihE1BN(A0}@!8H_@JD<;9w+2$M3l$&Rv+rylxew=V zkJyM1B&Vn+;ub}%phb-kRjWwJAI%^AR6h>6O(dkWAhnb>sp>#c-H0S6DV5s**Y{@T zop;w~MG95^=?>a^^M3O_X5Y*%Gv0YmM!MRoTrNh%%|6SJ3;G2TlnsL$WCci&HM7O= z`%$)n%>%xgW1>AM2(*fFsme+{5_bbdy#Q7!&=mp(528>Hk)qyQ<;Z-|LX^q-K)o7l zlDwVXkPe7ad)c3Y%1{*kTc(3jkEmG>V>4AR#{Cd0_bqE7PI-f=4&SRX#O|7!8w#(wv?y8YKqmBVloPg8<;^nn;o z?c@Fv@Qc|Nd^1~z?2I3&*#7sfcx3K z%pbHW4N08Y@aH)mU;!Jx2=E8svX?9X3fQ;Xc^dG$aO4!BLG$YruuGVi4c#U1xFGC+ z#Dj7|t&#W-fcjZrR{uXPC+k&M!;AbgyC;c`LkM<$IOh zXNrvPv<;t-IO*r{R+$l~3 zoCr7(a3bJDz=?npfe$+Z@A~fhk2ZSEqaCaH6Rd5uuM~}{(s^z4*Pe0SmD2h%0KZdu z=(|9CD;dfI_Y2OoG0v}jv$JqvpH{f6js9)wk?yXsnxn9U(#971IB7WxmP$*rpz_b- z+E~lCprVb{JcDGzw6PRiZ^b&eUQn9wtvrH`$0Y^%1eagmi)8g}tuUpXeQUFJcG|7E zUeYeyHtN8@L(+h!G|}%{3H>5{?C+5lY-ag~d$iG(Dy(XSt46JMtYscBldDUm(qs&N zUaGkTyKdKB(6#9Q<8f$2Lp`8Zc;cE?$WOc+xryC87P+RK)W(+n#tYH;QMKRq%c3iC zlhBuK=*_+3XeP9?Ypf*)JA%*`I|~;>J)MOcq3%%OW{);j9|L$t*Xmn1CX@Q@Qb{{| z%WbS&`>KpbSK*zm!dq>HzlTb7f7M3EUD}4f$+2sjaNBH%>8iGULUCjw3coCy4%M8IYF+Q?Yv*7j{1 zP2Y!hH#G0XP;fljo7fHK1rTs8cYg-I5#slf$+t_TA)wPhPXhH!l}h+s>pD>UPS$+A zR5}mzIiLagaRtAPVsRbZ&RoNO*Yeu=p5xGl_zJk516#OLXKnNOmzxKnx(==(z&YUc zw|fJh^DTPZbA)YPw(%36dXRqxMEyN*?IJm-V?mn+TpOTI{F_|F>pxl*UOewGI0hX4 zWWc@w*O#H4fBS3q`oCV)=?#3%9q}q-)e-Nir)%204M*o`-saKy9o}Ht+Z^&XguJU- zy-KS$(CYQKdOh$ZkFnR_`YPC=Z+yTy#fg9u0Ve`Z1e^#s5pW{lM8JuF69FdzA9@7n zd>oyJliRWKnYUW%5#MAnIOi?Oq&!#m5y{iJyXBInGi`W26bqfd!+jSPYQJ&2ltKQq zJTympq?58zKI2=BQj9GWgk6>t&wFAC2r_eCQu1^buPD#k;h9-1MQND&QRJvNJBwAa zcb~*b?!A)eFT{yM@I_YiU)qB&!euEuxAt&jgW9l8ZCowz_jl-qSrw>o<8Jty1D#JdTXDnbXF7jw z#jDw&igs$s^T;X>!I$&LiqB^>&#btI(Rf+$1?;pOM=QRtJfEyM%ue~-Sn*n>RKypv zhKjhioPS}p<74z3T5&L&nlw6^GNx73QCt z-NWelv&zptkB#l_3g@T=PH&qTEBKsMv+Jc9MAY!TRfXrbZSjN?7#u%s!|#_ky$6LA z#y$-dn6>3|-Sk|yb9{CjQqm5+SIN!@m!BO^{QFp?{=dNG{cM#26)4zmEOXuO4|&@X z7Q-8{l}h$EfuSnM60pyoajtv!tnvLl;4U~nPwxeC@jAz6kNX?a4*kDC^0#iZVUyXp{x%~;-x%yVX73zeEp5XZGdAJYoO6Tx1fLF>>H~@I1 zJcw^fc@{J|h3Xl=6)VKK7Xh!7k5B}>Qa-}(KnwE@?0FEUqDZD1- z?Rg5X1FlG2GkFhi{s&ewi1og#ku&me;;4_!q#Wo*O7Fv@gB&InWb}b#rZ<|@V@4*M z)1&!e)|W{QCF4dsrZzV;t*tD?lNt1AHX9v*6aynW!uqq(R9uhcQ>hV9F>yL3B3MMj zTcVG~!(nifNXE0F)=uaj&wYTuVS{e__RyAy9@*NaLwbW%8*>?Axr{y-O~)W%LT~%h z*3g#DuvLs_UjPJYJ9{8d*UHsg_7XQpylh(-|YK4y5zy zP&P9Z&l)2ps5hU0)T=~HLNI>yMs$F2@xf?rkg2heG`J8H(pY%Qfp|8T$fPZd4sF?Z zGKvaJo1}Tw3!R7 ze+g@Xidlb`T#pgO?=$9NUw(B$qgkKUb3_%hGSuz*I|2I_tfi^{w0|JFN9xmZ&EEeg zwBz1^^ve#Uqmvk1DA-4=l0NMVFkcOCne=HLN%S(bnTs@6h8}|&?iEO%)|*5hkdoAY zk|TN;+HvneJgrNKDpKFxe+jcOsNk)VKJACfR0@)R`~9DQcDyHQhyPSWk(Bm<5-o?9 z`0qf)tglEtqGXQbi6?r-rcdi;q9iw${_{5dpj06GJ==iU?Y(Hzr*#xj+9#8L`~3Z} z)Tj6}MM_GF&zHH_{r?IYv5TZn>w2P_%*s%=`+vozKdcA^qEmt`|I+vq@JFcNnp8ga z<$VI>)!OBWCwc{ReI|YS`@nQPfKW(Ia5FsNZ$kslJ@Q}Pcc?<6D8~=yKNixXIDQ{6 z6d`@upA_XnDF|)mLi$9fq0y|*f>OFcQ1TR)5cP-Ne~@%p?z=@_PTYHK#>p?q;_{sCoiL<3 Mn*~>EQ?Rk@zX|n&%K!iX diff --git a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin deleted file mode 100755 index ee268c0505df7bc55aab1046342c263205c720a2..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 16560 zcmeHOeQX>@6`%9j$)$1bE^PuP3C&VcVbgkJo5Wl~P3~-;y@tz26Puc*>Gte9+eh!K zcYD+>A&ulV$`K5uLTac)DJh^xMWXxxm5?ZoOcMzys1c$KlnT>O;i4pULW2xVa=bS) z@4UM{t13lEh#hP1&HK&!n0+(5p52}Ia5&Oc<#I79ZuV)0T+lC&plrx)krg087GNvj z_rq)*TLOGF$3%Nj5NH+UY?YOIB<==^dUaT-K-UQvJcvR)M2dQg6>X_#Arz1OG-Lx?oYfL86h0(^*Kx<>`CN-Z?TexfN7y7_C z)xD#Sftg9fWElBatdcyoCsv<&{$!x*C+~DU)A07TUq!xgbn14pfj&_N3+mI9ARc|7 z44(htJHK0_#2=|gY#AIrINHO%J^zJe9WVdv+~fPt#DATt-TK7xAAa`S61w09uQUQN<5xgI8Kl>o_2dzrF#F-6$ zlH+x(&W0}s{1!OuB?^E7_U(4Q1o%oEDMe_|eEJHoH!?5Ft`vA&5QY@-pqxM(CH@_t zepa`j{~wd`4bo1xl)qi#(-Oz=;sxf_AWoxJrt5>FQGFW!hZA`tp6lJ-k<6syz0rXrXvbqwBMK@=gb`qdQ<=21sDt`W zsK*j%y^xQ`%+|rU0T$8-4&?Ksj_xWt>yGracjzr@i@I5yl$fzDhJRK3SJd%W6v5Bm zehX_7Fnz1oi?W^Wk91#BWZdTDeUtEMIWC@{P$ZoAv)crY*9!SYWZHy_-U_)H6HeDI zw#=Gvnlp&cnQ-!rxKo@6I1z9n;6%WQfD-{H0{<%!_?z$Me`@3BJ=&3)-@#f}dvwyM zD!rtQ|I#zXPocE=7{HfHw>|^Jx1OOqa6jid$r>0+W4PmclAalY7W8D zOPg5X_&;tUA$@9SNcF9M1pCLw2S*b9@^LPYEN^yxoCr7(a3bJDz=?np0Ve`Z1e^#s5pW{l zMBx7<0{FegTzYnN?cAD&?@^f{J(e|cdz%9Lu$|-4fy7?eFMxn+t@~5>%@Dt{%)C`9 zWr5BCJqpw_TPorAzDq!#0~)wgD!l~sIM6!zQ3k(_VsSmRo4H2)uC=vGJ&!>f;_Kiz z4z}<~opmndUwk$|brT#}z&YUccX{hR<6Hiq=OEj*X6wg4vEddJNBw)?=qEV@p`c9z zjxEq9{*5l|^&hJ0Sh3^)I0hVE8L)4{aUZnvZ-HH2|JSQ}ymeo5hrP-~b=X_~)tXLk z)1f7rH!!}m+Z#-K10ioy$Xnm;RocCE?OuPo*Mnag*&pCI40g)j{D60g69FdzP6V6? zI1z9n;6%WQfD-{H0!{?}+Yz9Bb+nI8K8}_5%GFYb_(K+hecqzX$o+U9l05C#TPu0m z3y1qfvCzIfeD1Wt5V-LP)HjEWsAB=ZE9>TaIX14OOx8PNo{Em_`5rF z!>p>SaN=%w=Ro_@%~ss7`$<|U&d&h zt@sV)`DDdmcFOCPtMAY4|^O^S7n_Jzm!+Er# z{7sCmYpeXK^7U-R;p(d}|J>{Yi6E&{GdT{H2(YhwO_)eK^NFlXeA z0_->%Wb>&Bx{=ZcF*zZR83`GEIGGuUCiR$+$>sHEVU!JKQrTqOh{x1GQ)_c&A)fT0 zM{~L88001xxiL1Bi>BgwtdL5Lfr^RKF@wP(+Oa))f4rl=zXKd4lJQ)qy+<9)W|@9> zq`5Vb9?IyZm)wX3I0$dJ!E)E`(Dtw%-qEQ;)`ZnIrbxu{8GR(0j$ztG=jV5Xw)b>c z#dr<}K#)Z_xByEu4?#RyeP(e+#vP?~9jJP_SE~wdDCL7Ng zVzkbpd_L`*_3l#NDom~ruuXnusLv9UC`5Y)(tmM_M0`9vmdVRUHA#gkD~U@A|0 zQL{;d;g33;fr=3ygrP|Cuy$24nKCSDBDmHn${$0@icUV(X|LHk`=q{-*m*3@eJeiF`1)m{E zpVo;)4`OhkU>~tc=TFZE3Bd4_NuSn}MCmyNM0kfh$1OH4@#8#qB_!V z!(rA}q#jW+M>@n4J!aFV^)peDTTK61n|@F#5dFSw!0h&ZY}2Q86H$6zCja*N`@Gbr z_%lUHN{ZK)x!C>x0vfT4q)+R6qIZ~;p>Fqo+NM9M2nC|Ef-V2j_!IC7RB#PSk7M+_ zK>4+HdE$wl16`ja(J0EkKP zGEVxpl@U=PeKV!GV-^jPL3v^0b=(XG^@r|%_`ZbtZqb($cZ1D1`6bzvi|EG!LZa5D IU}M?802n@gkpKVy diff --git a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeSystem.cmake b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeSystem.cmake deleted file mode 100644 index 15b4419..0000000 --- a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CMakeSystem.cmake +++ /dev/null @@ -1,15 +0,0 @@ -set(CMAKE_HOST_SYSTEM "Linux-5.15.0-69-generic") -set(CMAKE_HOST_SYSTEM_NAME "Linux") -set(CMAKE_HOST_SYSTEM_VERSION "5.15.0-69-generic") -set(CMAKE_HOST_SYSTEM_PROCESSOR "x86_64") - - - -set(CMAKE_SYSTEM "Linux-5.15.0-69-generic") -set(CMAKE_SYSTEM_NAME "Linux") -set(CMAKE_SYSTEM_VERSION "5.15.0-69-generic") -set(CMAKE_SYSTEM_PROCESSOR "x86_64") - -set(CMAKE_CROSSCOMPILING "FALSE") - -set(CMAKE_SYSTEM_LOADED 1) diff --git a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c deleted file mode 100644 index d884b50..0000000 --- a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c +++ /dev/null @@ -1,671 +0,0 @@ -#ifdef __cplusplus -# error "A C++ compiler has been selected for C." -#endif - -#if defined(__18CXX) -# define ID_VOID_MAIN -#endif -#if defined(__CLASSIC_C__) -/* cv-qualifiers did not exist in K&R C */ -# define const -# define volatile -#endif - - -/* Version number components: V=Version, R=Revision, P=Patch - Version date components: YYYY=Year, MM=Month, DD=Day */ - -#if defined(__INTEL_COMPILER) || defined(__ICC) -# define COMPILER_ID "Intel" -# if defined(_MSC_VER) -# define SIMULATE_ID "MSVC" -# endif -# if defined(__GNUC__) -# define SIMULATE_ID "GNU" -# endif - /* __INTEL_COMPILER = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER/100) -# define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER/10 % 10) -# if defined(__INTEL_COMPILER_UPDATE) -# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER_UPDATE) -# else -# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER % 10) -# endif -# if defined(__INTEL_COMPILER_BUILD_DATE) - /* __INTEL_COMPILER_BUILD_DATE = YYYYMMDD */ -# define COMPILER_VERSION_TWEAK DEC(__INTEL_COMPILER_BUILD_DATE) -# endif -# if defined(_MSC_VER) - /* _MSC_VER = VVRR */ -# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) -# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) -# endif -# if defined(__GNUC__) -# define SIMULATE_VERSION_MAJOR DEC(__GNUC__) -# elif defined(__GNUG__) -# define SIMULATE_VERSION_MAJOR DEC(__GNUG__) -# endif -# if defined(__GNUC_MINOR__) -# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__) -# endif -# if defined(__GNUC_PATCHLEVEL__) -# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) -# endif - -#elif defined(__PATHCC__) -# define COMPILER_ID "PathScale" -# define COMPILER_VERSION_MAJOR DEC(__PATHCC__) -# define COMPILER_VERSION_MINOR DEC(__PATHCC_MINOR__) -# if defined(__PATHCC_PATCHLEVEL__) -# define COMPILER_VERSION_PATCH DEC(__PATHCC_PATCHLEVEL__) -# endif - -#elif defined(__BORLANDC__) && defined(__CODEGEARC_VERSION__) -# define COMPILER_ID "Embarcadero" -# define COMPILER_VERSION_MAJOR HEX(__CODEGEARC_VERSION__>>24 & 0x00FF) -# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF) -# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF) - -#elif defined(__BORLANDC__) -# define COMPILER_ID "Borland" - /* __BORLANDC__ = 0xVRR */ -# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8) -# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF) - -#elif defined(__WATCOMC__) && __WATCOMC__ < 1200 -# define COMPILER_ID "Watcom" - /* __WATCOMC__ = VVRR */ -# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100) -# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) -# if (__WATCOMC__ % 10) > 0 -# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) -# endif - -#elif defined(__WATCOMC__) -# define COMPILER_ID "OpenWatcom" - /* __WATCOMC__ = VVRP + 1100 */ -# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100) -# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) -# if (__WATCOMC__ % 10) > 0 -# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) -# endif - -#elif defined(__SUNPRO_C) -# define COMPILER_ID "SunPro" -# if __SUNPRO_C >= 0x5100 - /* __SUNPRO_C = 0xVRRP */ -# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>12) -# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xFF) -# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF) -# else - /* __SUNPRO_CC = 0xVRP */ -# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>8) -# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xF) -# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF) -# endif - -#elif defined(__HP_cc) -# define COMPILER_ID "HP" - /* __HP_cc = VVRRPP */ -# define COMPILER_VERSION_MAJOR DEC(__HP_cc/10000) -# define COMPILER_VERSION_MINOR DEC(__HP_cc/100 % 100) -# define COMPILER_VERSION_PATCH DEC(__HP_cc % 100) - -#elif defined(__DECC) -# define COMPILER_ID "Compaq" - /* __DECC_VER = VVRRTPPPP */ -# define COMPILER_VERSION_MAJOR DEC(__DECC_VER/10000000) -# define COMPILER_VERSION_MINOR DEC(__DECC_VER/100000 % 100) -# define COMPILER_VERSION_PATCH DEC(__DECC_VER % 10000) - -#elif defined(__IBMC__) && defined(__COMPILER_VER__) -# define COMPILER_ID "zOS" - /* __IBMC__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) - -#elif defined(__ibmxl__) && defined(__clang__) -# define COMPILER_ID "XLClang" -# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__) -# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__) -# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__) -# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__) - - -#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ >= 800 -# define COMPILER_ID "XL" - /* __IBMC__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) - -#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ < 800 -# define COMPILER_ID "VisualAge" - /* __IBMC__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) - -#elif defined(__PGI) -# define COMPILER_ID "PGI" -# define COMPILER_VERSION_MAJOR DEC(__PGIC__) -# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__) -# if defined(__PGIC_PATCHLEVEL__) -# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__) -# endif - -#elif defined(_CRAYC) -# define COMPILER_ID "Cray" -# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR) -# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR) - -#elif defined(__TI_COMPILER_VERSION__) -# define COMPILER_ID "TI" - /* __TI_COMPILER_VERSION__ = VVVRRRPPP */ -# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000) -# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000) -# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000) - -#elif defined(__FUJITSU) || defined(__FCC_VERSION) || defined(__fcc_version) -# define COMPILER_ID "Fujitsu" - -#elif defined(__ghs__) -# define COMPILER_ID "GHS" -/* __GHS_VERSION_NUMBER = VVVVRP */ -# ifdef __GHS_VERSION_NUMBER -# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100) -# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10) -# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10) -# endif - -#elif defined(__TINYC__) -# define COMPILER_ID "TinyCC" - -#elif defined(__BCC__) -# define COMPILER_ID "Bruce" - -#elif defined(__SCO_VERSION__) -# define COMPILER_ID "SCO" - -#elif defined(__ARMCC_VERSION) && !defined(__clang__) -# define COMPILER_ID "ARMCC" -#if __ARMCC_VERSION >= 1000000 - /* __ARMCC_VERSION = VRRPPPP */ - # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000) - # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100) - # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) -#else - /* __ARMCC_VERSION = VRPPPP */ - # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000) - # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10) - # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) -#endif - - -#elif defined(__clang__) && defined(__apple_build_version__) -# define COMPILER_ID "AppleClang" -# if defined(_MSC_VER) -# define SIMULATE_ID "MSVC" -# endif -# define COMPILER_VERSION_MAJOR DEC(__clang_major__) -# define COMPILER_VERSION_MINOR DEC(__clang_minor__) -# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) -# if defined(_MSC_VER) - /* _MSC_VER = VVRR */ -# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) -# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) -# endif -# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__) - -#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION) -# define COMPILER_ID "ARMClang" - # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000) - # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100) - # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION % 10000) -# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION) - -#elif defined(__clang__) -# define COMPILER_ID "Clang" -# if defined(_MSC_VER) -# define SIMULATE_ID "MSVC" -# endif -# define COMPILER_VERSION_MAJOR DEC(__clang_major__) -# define COMPILER_VERSION_MINOR DEC(__clang_minor__) -# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) -# if defined(_MSC_VER) - /* _MSC_VER = VVRR */ -# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) -# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) -# endif - -#elif defined(__GNUC__) -# define COMPILER_ID "GNU" -# define COMPILER_VERSION_MAJOR DEC(__GNUC__) -# if defined(__GNUC_MINOR__) -# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__) -# endif -# if defined(__GNUC_PATCHLEVEL__) -# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) -# endif - -#elif defined(_MSC_VER) -# define COMPILER_ID "MSVC" - /* _MSC_VER = VVRR */ -# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100) -# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100) -# if defined(_MSC_FULL_VER) -# if _MSC_VER >= 1400 - /* _MSC_FULL_VER = VVRRPPPPP */ -# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000) -# else - /* _MSC_FULL_VER = VVRRPPPP */ -# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000) -# endif -# endif -# if defined(_MSC_BUILD) -# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD) -# endif - -#elif defined(__VISUALDSPVERSION__) || defined(__ADSPBLACKFIN__) || defined(__ADSPTS__) || defined(__ADSP21000__) -# define COMPILER_ID "ADSP" -#if defined(__VISUALDSPVERSION__) - /* __VISUALDSPVERSION__ = 0xVVRRPP00 */ -# define COMPILER_VERSION_MAJOR HEX(__VISUALDSPVERSION__>>24) -# define COMPILER_VERSION_MINOR HEX(__VISUALDSPVERSION__>>16 & 0xFF) -# define COMPILER_VERSION_PATCH HEX(__VISUALDSPVERSION__>>8 & 0xFF) -#endif - -#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) -# define COMPILER_ID "IAR" -# if defined(__VER__) && defined(__ICCARM__) -# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000) -# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000) -# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000) -# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) -# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__)) -# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100) -# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100)) -# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__) -# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) -# endif - -#elif defined(__SDCC_VERSION_MAJOR) || defined(SDCC) -# define COMPILER_ID "SDCC" -# if defined(__SDCC_VERSION_MAJOR) -# define COMPILER_VERSION_MAJOR DEC(__SDCC_VERSION_MAJOR) -# define COMPILER_VERSION_MINOR DEC(__SDCC_VERSION_MINOR) -# define COMPILER_VERSION_PATCH DEC(__SDCC_VERSION_PATCH) -# else - /* SDCC = VRP */ -# define COMPILER_VERSION_MAJOR DEC(SDCC/100) -# define COMPILER_VERSION_MINOR DEC(SDCC/10 % 10) -# define COMPILER_VERSION_PATCH DEC(SDCC % 10) -# endif - - -/* These compilers are either not known or too old to define an - identification macro. Try to identify the platform and guess that - it is the native compiler. */ -#elif defined(__hpux) || defined(__hpua) -# define COMPILER_ID "HP" - -#else /* unknown compiler */ -# define COMPILER_ID "" -#endif - -/* Construct the string literal in pieces to prevent the source from - getting matched. Store it in a pointer rather than an array - because some compilers will just produce instructions to fill the - array rather than assigning a pointer to a static array. */ -char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; -#ifdef SIMULATE_ID -char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; -#endif - -#ifdef __QNXNTO__ -char const* qnxnto = "INFO" ":" "qnxnto[]"; -#endif - -#if defined(__CRAYXE) || defined(__CRAYXC) -char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; -#endif - -#define STRINGIFY_HELPER(X) #X -#define STRINGIFY(X) STRINGIFY_HELPER(X) - -/* Identify known platforms by name. */ -#if defined(__linux) || defined(__linux__) || defined(linux) -# define PLATFORM_ID "Linux" - -#elif defined(__CYGWIN__) -# define PLATFORM_ID "Cygwin" - -#elif defined(__MINGW32__) -# define PLATFORM_ID "MinGW" - -#elif defined(__APPLE__) -# define PLATFORM_ID "Darwin" - -#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) -# define PLATFORM_ID "Windows" - -#elif defined(__FreeBSD__) || defined(__FreeBSD) -# define PLATFORM_ID "FreeBSD" - -#elif defined(__NetBSD__) || defined(__NetBSD) -# define PLATFORM_ID "NetBSD" - -#elif defined(__OpenBSD__) || defined(__OPENBSD) -# define PLATFORM_ID "OpenBSD" - -#elif defined(__sun) || defined(sun) -# define PLATFORM_ID "SunOS" - -#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) -# define PLATFORM_ID "AIX" - -#elif defined(__hpux) || defined(__hpux__) -# define PLATFORM_ID "HP-UX" - -#elif defined(__HAIKU__) -# define PLATFORM_ID "Haiku" - -#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) -# define PLATFORM_ID "BeOS" - -#elif defined(__QNX__) || defined(__QNXNTO__) -# define PLATFORM_ID "QNX" - -#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) -# define PLATFORM_ID "Tru64" - -#elif defined(__riscos) || defined(__riscos__) -# define PLATFORM_ID "RISCos" - -#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) -# define PLATFORM_ID "SINIX" - -#elif defined(__UNIX_SV__) -# define PLATFORM_ID "UNIX_SV" - -#elif defined(__bsdos__) -# define PLATFORM_ID "BSDOS" - -#elif defined(_MPRAS) || defined(MPRAS) -# define PLATFORM_ID "MP-RAS" - -#elif defined(__osf) || defined(__osf__) -# define PLATFORM_ID "OSF1" - -#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) -# define PLATFORM_ID "SCO_SV" - -#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) -# define PLATFORM_ID "ULTRIX" - -#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) -# define PLATFORM_ID "Xenix" - -#elif defined(__WATCOMC__) -# if defined(__LINUX__) -# define PLATFORM_ID "Linux" - -# elif defined(__DOS__) -# define PLATFORM_ID "DOS" - -# elif defined(__OS2__) -# define PLATFORM_ID "OS2" - -# elif defined(__WINDOWS__) -# define PLATFORM_ID "Windows3x" - -# else /* unknown platform */ -# define PLATFORM_ID -# endif - -#elif defined(__INTEGRITY) -# if defined(INT_178B) -# define PLATFORM_ID "Integrity178" - -# else /* regular Integrity */ -# define PLATFORM_ID "Integrity" -# endif - -#else /* unknown platform */ -# define PLATFORM_ID - -#endif - -/* For windows compilers MSVC and Intel we can determine - the architecture of the compiler being used. This is because - the compilers do not have flags that can change the architecture, - but rather depend on which compiler is being used -*/ -#if defined(_WIN32) && defined(_MSC_VER) -# if defined(_M_IA64) -# define ARCHITECTURE_ID "IA64" - -# elif defined(_M_X64) || defined(_M_AMD64) -# define ARCHITECTURE_ID "x64" - -# elif defined(_M_IX86) -# define ARCHITECTURE_ID "X86" - -# elif defined(_M_ARM64) -# define ARCHITECTURE_ID "ARM64" - -# elif defined(_M_ARM) -# if _M_ARM == 4 -# define ARCHITECTURE_ID "ARMV4I" -# elif _M_ARM == 5 -# define ARCHITECTURE_ID "ARMV5I" -# else -# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) -# endif - -# elif defined(_M_MIPS) -# define ARCHITECTURE_ID "MIPS" - -# elif defined(_M_SH) -# define ARCHITECTURE_ID "SHx" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__WATCOMC__) -# if defined(_M_I86) -# define ARCHITECTURE_ID "I86" - -# elif defined(_M_IX86) -# define ARCHITECTURE_ID "X86" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) -# if defined(__ICCARM__) -# define ARCHITECTURE_ID "ARM" - -# elif defined(__ICCRX__) -# define ARCHITECTURE_ID "RX" - -# elif defined(__ICCRH850__) -# define ARCHITECTURE_ID "RH850" - -# elif defined(__ICCRL78__) -# define ARCHITECTURE_ID "RL78" - -# elif defined(__ICCRISCV__) -# define ARCHITECTURE_ID "RISCV" - -# elif defined(__ICCAVR__) -# define ARCHITECTURE_ID "AVR" - -# elif defined(__ICC430__) -# define ARCHITECTURE_ID "MSP430" - -# elif defined(__ICCV850__) -# define ARCHITECTURE_ID "V850" - -# elif defined(__ICC8051__) -# define ARCHITECTURE_ID "8051" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__ghs__) -# if defined(__PPC64__) -# define ARCHITECTURE_ID "PPC64" - -# elif defined(__ppc__) -# define ARCHITECTURE_ID "PPC" - -# elif defined(__ARM__) -# define ARCHITECTURE_ID "ARM" - -# elif defined(__x86_64__) -# define ARCHITECTURE_ID "x64" - -# elif defined(__i386__) -# define ARCHITECTURE_ID "X86" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif -#else -# define ARCHITECTURE_ID -#endif - -/* Convert integer to decimal digit literals. */ -#define DEC(n) \ - ('0' + (((n) / 10000000)%10)), \ - ('0' + (((n) / 1000000)%10)), \ - ('0' + (((n) / 100000)%10)), \ - ('0' + (((n) / 10000)%10)), \ - ('0' + (((n) / 1000)%10)), \ - ('0' + (((n) / 100)%10)), \ - ('0' + (((n) / 10)%10)), \ - ('0' + ((n) % 10)) - -/* Convert integer to hex digit literals. */ -#define HEX(n) \ - ('0' + ((n)>>28 & 0xF)), \ - ('0' + ((n)>>24 & 0xF)), \ - ('0' + ((n)>>20 & 0xF)), \ - ('0' + ((n)>>16 & 0xF)), \ - ('0' + ((n)>>12 & 0xF)), \ - ('0' + ((n)>>8 & 0xF)), \ - ('0' + ((n)>>4 & 0xF)), \ - ('0' + ((n) & 0xF)) - -/* Construct a string literal encoding the version number components. */ -#ifdef COMPILER_VERSION_MAJOR -char const info_version[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', - COMPILER_VERSION_MAJOR, -# ifdef COMPILER_VERSION_MINOR - '.', COMPILER_VERSION_MINOR, -# ifdef COMPILER_VERSION_PATCH - '.', COMPILER_VERSION_PATCH, -# ifdef COMPILER_VERSION_TWEAK - '.', COMPILER_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct a string literal encoding the internal version number. */ -#ifdef COMPILER_VERSION_INTERNAL -char const info_version_internal[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', - 'i','n','t','e','r','n','a','l','[', - COMPILER_VERSION_INTERNAL,']','\0'}; -#endif - -/* Construct a string literal encoding the version number components. */ -#ifdef SIMULATE_VERSION_MAJOR -char const info_simulate_version[] = { - 'I', 'N', 'F', 'O', ':', - 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', - SIMULATE_VERSION_MAJOR, -# ifdef SIMULATE_VERSION_MINOR - '.', SIMULATE_VERSION_MINOR, -# ifdef SIMULATE_VERSION_PATCH - '.', SIMULATE_VERSION_PATCH, -# ifdef SIMULATE_VERSION_TWEAK - '.', SIMULATE_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct the string literal in pieces to prevent the source from - getting matched. Store it in a pointer rather than an array - because some compilers will just produce instructions to fill the - array rather than assigning a pointer to a static array. */ -char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; -char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; - - - - -#if !defined(__STDC__) -# if (defined(_MSC_VER) && !defined(__clang__)) \ - || (defined(__ibmxl__) || defined(__IBMC__)) -# define C_DIALECT "90" -# else -# define C_DIALECT -# endif -#elif __STDC_VERSION__ >= 201000L -# define C_DIALECT "11" -#elif __STDC_VERSION__ >= 199901L -# define C_DIALECT "99" -#else -# define C_DIALECT "90" -#endif -const char* info_language_dialect_default = - "INFO" ":" "dialect_default[" C_DIALECT "]"; - -/*--------------------------------------------------------------------------*/ - -#ifdef ID_VOID_MAIN -void main() {} -#else -# if defined(__CLASSIC_C__) -int main(argc, argv) int argc; char *argv[]; -# else -int main(int argc, char* argv[]) -# endif -{ - int require = 0; - require += info_compiler[argc]; - require += info_platform[argc]; - require += info_arch[argc]; -#ifdef COMPILER_VERSION_MAJOR - require += info_version[argc]; -#endif -#ifdef COMPILER_VERSION_INTERNAL - require += info_version_internal[argc]; -#endif -#ifdef SIMULATE_ID - require += info_simulate[argc]; -#endif -#ifdef SIMULATE_VERSION_MAJOR - require += info_simulate_version[argc]; -#endif -#if defined(__CRAYXE) || defined(__CRAYXC) - require += info_cray[argc]; -#endif - require += info_language_dialect_default[argc]; - (void)argv; - return require; -} -#endif diff --git a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/a.out b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/a.out deleted file mode 100755 index b5c91a373fc518990e2aec59df62ee3a3ddb612a..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 16712 zcmeHOeQX>@6`%9jiPI)$Cv}LMwDpn?$)WY-Y!c(7HNCTa&K|OpHnC}t>n>~G**>@r zbGJwBij+Xo!VwGsB2oT8ii!jX!XM?2ejovkLJO?`H3Eg8f=GcDgF@<-2Dy;tcyH#t z^X~dwB+4HM?MSz8=J!7L&FtRJ?##!deZ5sapWxyb?-kez*DEAUjM_a^0TLD+VhtQ` z7B`6%(5{x4;)fLht|}L*oV1p3KTy!ESR#tyFrh- zmL%Sqa5o{P%rC01oB}dwK?nuR3QprqVs%5I9y`_C;FrN*!Nyiu$`oJ-@ zci*4@GqZ?M8f9NJP#gI#?vB2&W!v2^9*Cd%;uyqyi0l>5h_~4OYn4tZP@HYQhLc5kED`TFGRLR+gC3v}Hwevu5+ zh83T2Zr8hTO;d7>E<8uL=E6Tkc(V)t65$u_6tdu0!1Lj9(T4LmBX7=z^Vmdu-iGrv zhWLUFm-kBqz2arS%Yc^wF9Ti%ybO35@G|g!lYzh0-SQ9p=%rfyc+IbO2%$eTYgLt= z*N^_F_N+X|(ym7Veyz0aYe4Fn1j<9}`?A#|WV`jRvEsS=^y2UJqko*gYoKqY<~%%_ z>N9H$NjlGfrPBHwsJwncpXq!GD*8;#caiK~u-1d?eOL$At4bH^nvS63vqV9@DCKv3 z63O;!dU0MqbNNpF%z|I{J)@tyW;K9;ZDgRfbaAY%3F2aXjQ2=q6xgD0>!5zLvkI$v z@g-}ue!O!9H0HLKN~O6t9G!cp+V3q9=@a(3m1PJy^3M#$Jajx zGxg)qOZp?a@A&H)6xL&!M^QpVjs`dT`QIJGjIB>rq&lIzkS8m z`ihr(ihqif8h)oAJ?qnV|F-ZK?Ej(R$i0!_$bAvx?ATbauIU(_uk3Fe8R%DzoAOAJ zZ13P@z{`M_0WSky2D}V-8SpaTWx&gTmjN#W|Dzf3IleY74KlW`cmJNzYmBgqeM;wPnCk%@~Wnp`_usqR!mQ=hTE>+;v94Tb1 zg0?#d6Z@9df^4-u*cJ+gb_UzFEBxOF5J?OZ>s44D0PrrCa`TBIq zZ-5sfc0|?vaJ7dj;(Rw+)WPepTD)3XL{ts$YgHm3CSCc2^%fF8<-*@dINv9g6(QaO z6&SVUc+ek~UikUoZ4lr0BnSswoR5C_zRUPDRD5D-J|6+RQvA!E*SDpeb>f#8u&Y$E z^OTgiVM(0N0q(=QsjI(!LGpaRXBRKa%F^-khP1P^e;;FyP5+INs3Lr(*(hw;`CX3L6>lYE%Q?G9o;LH6rO zp8xNj1|03UucLEhXFK_o?<&C-uHae=`D}LCc^z>$U$-6TT%m!UyKDq}vm1nVJK&g~ zu%?)8B-1VN4MGbmfa4dVIV*1!U?tM1Slk|BSZQMvH;Ck6b4WaEjHj|AX3B_L*<9W* z3sVB$T&EINA|C7rwYOFl!mTMu!_4K(X(N%ba?@fgXQmTIypT>$gNm(XfTZOR?d~@} zoapYR7v!-xgl8DN2O|AZBf780fL$t1owzW1KCmy+AM18<CYsTFK}P@9+h!7R(=u6Qao~q% z7tC=;xbvMqh{N_DP9yFMs<_$5xxL7FQqn$slu)tYHwGbs`RTM}jsUfCicWAXnSpIb zlOmYOT8ZFzrVyOWWhWCkYuW~l6q2wpEEy*#(iLm5%yA*bC(QhW2*#%~;6hO=r#Kvk z6r+X#yj&t>qJjv@lm#bKmcT=BJPQ>oF$G5)q9B=-JsC_)(4d@%gFd&Ez8alMgX>`2 zOeaSn92^Ki=mZgjPD#UPr_1hb6PyRYtpRTXvhZ^qQ=SJ9Tgq}B=@$6mGcxP*^B+?U zc=l4hFA&%c)UJPso(Gw3wJSrN@5cAVx$y8%OqHg_r0RKBY>vQ}(zhTP$@!J&^ zcl;(`IJaSap8qgCfl5&D95K(V&-0cfV0g-`&(E<;dHw_Dy(m(Ja+7&A0&f1UD$XX-v&R9hwp!@0OQ#0`rpJq1}Ob5>24 & 0x00FF) -# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF) -# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF) - -#elif defined(__BORLANDC__) -# define COMPILER_ID "Borland" - /* __BORLANDC__ = 0xVRR */ -# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8) -# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF) - -#elif defined(__WATCOMC__) && __WATCOMC__ < 1200 -# define COMPILER_ID "Watcom" - /* __WATCOMC__ = VVRR */ -# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100) -# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) -# if (__WATCOMC__ % 10) > 0 -# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) -# endif - -#elif defined(__WATCOMC__) -# define COMPILER_ID "OpenWatcom" - /* __WATCOMC__ = VVRP + 1100 */ -# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100) -# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) -# if (__WATCOMC__ % 10) > 0 -# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) -# endif - -#elif defined(__SUNPRO_CC) -# define COMPILER_ID "SunPro" -# if __SUNPRO_CC >= 0x5100 - /* __SUNPRO_CC = 0xVRRP */ -# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>12) -# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xFF) -# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) -# else - /* __SUNPRO_CC = 0xVRP */ -# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>8) -# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xF) -# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) -# endif - -#elif defined(__HP_aCC) -# define COMPILER_ID "HP" - /* __HP_aCC = VVRRPP */ -# define COMPILER_VERSION_MAJOR DEC(__HP_aCC/10000) -# define COMPILER_VERSION_MINOR DEC(__HP_aCC/100 % 100) -# define COMPILER_VERSION_PATCH DEC(__HP_aCC % 100) - -#elif defined(__DECCXX) -# define COMPILER_ID "Compaq" - /* __DECCXX_VER = VVRRTPPPP */ -# define COMPILER_VERSION_MAJOR DEC(__DECCXX_VER/10000000) -# define COMPILER_VERSION_MINOR DEC(__DECCXX_VER/100000 % 100) -# define COMPILER_VERSION_PATCH DEC(__DECCXX_VER % 10000) - -#elif defined(__IBMCPP__) && defined(__COMPILER_VER__) -# define COMPILER_ID "zOS" - /* __IBMCPP__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) - -#elif defined(__ibmxl__) && defined(__clang__) -# define COMPILER_ID "XLClang" -# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__) -# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__) -# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__) -# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__) - - -#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ >= 800 -# define COMPILER_ID "XL" - /* __IBMCPP__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) - -#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ < 800 -# define COMPILER_ID "VisualAge" - /* __IBMCPP__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) - -#elif defined(__PGI) -# define COMPILER_ID "PGI" -# define COMPILER_VERSION_MAJOR DEC(__PGIC__) -# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__) -# if defined(__PGIC_PATCHLEVEL__) -# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__) -# endif - -#elif defined(_CRAYC) -# define COMPILER_ID "Cray" -# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR) -# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR) - -#elif defined(__TI_COMPILER_VERSION__) -# define COMPILER_ID "TI" - /* __TI_COMPILER_VERSION__ = VVVRRRPPP */ -# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000) -# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000) -# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000) - -#elif defined(__FUJITSU) || defined(__FCC_VERSION) || defined(__fcc_version) -# define COMPILER_ID "Fujitsu" - -#elif defined(__ghs__) -# define COMPILER_ID "GHS" -/* __GHS_VERSION_NUMBER = VVVVRP */ -# ifdef __GHS_VERSION_NUMBER -# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100) -# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10) -# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10) -# endif - -#elif defined(__SCO_VERSION__) -# define COMPILER_ID "SCO" - -#elif defined(__ARMCC_VERSION) && !defined(__clang__) -# define COMPILER_ID "ARMCC" -#if __ARMCC_VERSION >= 1000000 - /* __ARMCC_VERSION = VRRPPPP */ - # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000) - # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100) - # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) -#else - /* __ARMCC_VERSION = VRPPPP */ - # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000) - # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10) - # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) -#endif - - -#elif defined(__clang__) && defined(__apple_build_version__) -# define COMPILER_ID "AppleClang" -# if defined(_MSC_VER) -# define SIMULATE_ID "MSVC" -# endif -# define COMPILER_VERSION_MAJOR DEC(__clang_major__) -# define COMPILER_VERSION_MINOR DEC(__clang_minor__) -# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) -# if defined(_MSC_VER) - /* _MSC_VER = VVRR */ -# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) -# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) -# endif -# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__) - -#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION) -# define COMPILER_ID "ARMClang" - # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000) - # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100) - # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION % 10000) -# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION) - -#elif defined(__clang__) -# define COMPILER_ID "Clang" -# if defined(_MSC_VER) -# define SIMULATE_ID "MSVC" -# endif -# define COMPILER_VERSION_MAJOR DEC(__clang_major__) -# define COMPILER_VERSION_MINOR DEC(__clang_minor__) -# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) -# if defined(_MSC_VER) - /* _MSC_VER = VVRR */ -# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) -# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) -# endif - -#elif defined(__GNUC__) || defined(__GNUG__) -# define COMPILER_ID "GNU" -# if defined(__GNUC__) -# define COMPILER_VERSION_MAJOR DEC(__GNUC__) -# else -# define COMPILER_VERSION_MAJOR DEC(__GNUG__) -# endif -# if defined(__GNUC_MINOR__) -# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__) -# endif -# if defined(__GNUC_PATCHLEVEL__) -# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) -# endif - -#elif defined(_MSC_VER) -# define COMPILER_ID "MSVC" - /* _MSC_VER = VVRR */ -# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100) -# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100) -# if defined(_MSC_FULL_VER) -# if _MSC_VER >= 1400 - /* _MSC_FULL_VER = VVRRPPPPP */ -# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000) -# else - /* _MSC_FULL_VER = VVRRPPPP */ -# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000) -# endif -# endif -# if defined(_MSC_BUILD) -# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD) -# endif - -#elif defined(__VISUALDSPVERSION__) || defined(__ADSPBLACKFIN__) || defined(__ADSPTS__) || defined(__ADSP21000__) -# define COMPILER_ID "ADSP" -#if defined(__VISUALDSPVERSION__) - /* __VISUALDSPVERSION__ = 0xVVRRPP00 */ -# define COMPILER_VERSION_MAJOR HEX(__VISUALDSPVERSION__>>24) -# define COMPILER_VERSION_MINOR HEX(__VISUALDSPVERSION__>>16 & 0xFF) -# define COMPILER_VERSION_PATCH HEX(__VISUALDSPVERSION__>>8 & 0xFF) -#endif - -#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) -# define COMPILER_ID "IAR" -# if defined(__VER__) && defined(__ICCARM__) -# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000) -# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000) -# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000) -# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) -# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__)) -# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100) -# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100)) -# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__) -# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) -# endif - - -/* These compilers are either not known or too old to define an - identification macro. Try to identify the platform and guess that - it is the native compiler. */ -#elif defined(__hpux) || defined(__hpua) -# define COMPILER_ID "HP" - -#else /* unknown compiler */ -# define COMPILER_ID "" -#endif - -/* Construct the string literal in pieces to prevent the source from - getting matched. Store it in a pointer rather than an array - because some compilers will just produce instructions to fill the - array rather than assigning a pointer to a static array. */ -char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; -#ifdef SIMULATE_ID -char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; -#endif - -#ifdef __QNXNTO__ -char const* qnxnto = "INFO" ":" "qnxnto[]"; -#endif - -#if defined(__CRAYXE) || defined(__CRAYXC) -char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; -#endif - -#define STRINGIFY_HELPER(X) #X -#define STRINGIFY(X) STRINGIFY_HELPER(X) - -/* Identify known platforms by name. */ -#if defined(__linux) || defined(__linux__) || defined(linux) -# define PLATFORM_ID "Linux" - -#elif defined(__CYGWIN__) -# define PLATFORM_ID "Cygwin" - -#elif defined(__MINGW32__) -# define PLATFORM_ID "MinGW" - -#elif defined(__APPLE__) -# define PLATFORM_ID "Darwin" - -#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) -# define PLATFORM_ID "Windows" - -#elif defined(__FreeBSD__) || defined(__FreeBSD) -# define PLATFORM_ID "FreeBSD" - -#elif defined(__NetBSD__) || defined(__NetBSD) -# define PLATFORM_ID "NetBSD" - -#elif defined(__OpenBSD__) || defined(__OPENBSD) -# define PLATFORM_ID "OpenBSD" - -#elif defined(__sun) || defined(sun) -# define PLATFORM_ID "SunOS" - -#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) -# define PLATFORM_ID "AIX" - -#elif defined(__hpux) || defined(__hpux__) -# define PLATFORM_ID "HP-UX" - -#elif defined(__HAIKU__) -# define PLATFORM_ID "Haiku" - -#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) -# define PLATFORM_ID "BeOS" - -#elif defined(__QNX__) || defined(__QNXNTO__) -# define PLATFORM_ID "QNX" - -#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) -# define PLATFORM_ID "Tru64" - -#elif defined(__riscos) || defined(__riscos__) -# define PLATFORM_ID "RISCos" - -#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) -# define PLATFORM_ID "SINIX" - -#elif defined(__UNIX_SV__) -# define PLATFORM_ID "UNIX_SV" - -#elif defined(__bsdos__) -# define PLATFORM_ID "BSDOS" - -#elif defined(_MPRAS) || defined(MPRAS) -# define PLATFORM_ID "MP-RAS" - -#elif defined(__osf) || defined(__osf__) -# define PLATFORM_ID "OSF1" - -#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) -# define PLATFORM_ID "SCO_SV" - -#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) -# define PLATFORM_ID "ULTRIX" - -#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) -# define PLATFORM_ID "Xenix" - -#elif defined(__WATCOMC__) -# if defined(__LINUX__) -# define PLATFORM_ID "Linux" - -# elif defined(__DOS__) -# define PLATFORM_ID "DOS" - -# elif defined(__OS2__) -# define PLATFORM_ID "OS2" - -# elif defined(__WINDOWS__) -# define PLATFORM_ID "Windows3x" - -# else /* unknown platform */ -# define PLATFORM_ID -# endif - -#elif defined(__INTEGRITY) -# if defined(INT_178B) -# define PLATFORM_ID "Integrity178" - -# else /* regular Integrity */ -# define PLATFORM_ID "Integrity" -# endif - -#else /* unknown platform */ -# define PLATFORM_ID - -#endif - -/* For windows compilers MSVC and Intel we can determine - the architecture of the compiler being used. This is because - the compilers do not have flags that can change the architecture, - but rather depend on which compiler is being used -*/ -#if defined(_WIN32) && defined(_MSC_VER) -# if defined(_M_IA64) -# define ARCHITECTURE_ID "IA64" - -# elif defined(_M_X64) || defined(_M_AMD64) -# define ARCHITECTURE_ID "x64" - -# elif defined(_M_IX86) -# define ARCHITECTURE_ID "X86" - -# elif defined(_M_ARM64) -# define ARCHITECTURE_ID "ARM64" - -# elif defined(_M_ARM) -# if _M_ARM == 4 -# define ARCHITECTURE_ID "ARMV4I" -# elif _M_ARM == 5 -# define ARCHITECTURE_ID "ARMV5I" -# else -# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) -# endif - -# elif defined(_M_MIPS) -# define ARCHITECTURE_ID "MIPS" - -# elif defined(_M_SH) -# define ARCHITECTURE_ID "SHx" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__WATCOMC__) -# if defined(_M_I86) -# define ARCHITECTURE_ID "I86" - -# elif defined(_M_IX86) -# define ARCHITECTURE_ID "X86" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) -# if defined(__ICCARM__) -# define ARCHITECTURE_ID "ARM" - -# elif defined(__ICCRX__) -# define ARCHITECTURE_ID "RX" - -# elif defined(__ICCRH850__) -# define ARCHITECTURE_ID "RH850" - -# elif defined(__ICCRL78__) -# define ARCHITECTURE_ID "RL78" - -# elif defined(__ICCRISCV__) -# define ARCHITECTURE_ID "RISCV" - -# elif defined(__ICCAVR__) -# define ARCHITECTURE_ID "AVR" - -# elif defined(__ICC430__) -# define ARCHITECTURE_ID "MSP430" - -# elif defined(__ICCV850__) -# define ARCHITECTURE_ID "V850" - -# elif defined(__ICC8051__) -# define ARCHITECTURE_ID "8051" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__ghs__) -# if defined(__PPC64__) -# define ARCHITECTURE_ID "PPC64" - -# elif defined(__ppc__) -# define ARCHITECTURE_ID "PPC" - -# elif defined(__ARM__) -# define ARCHITECTURE_ID "ARM" - -# elif defined(__x86_64__) -# define ARCHITECTURE_ID "x64" - -# elif defined(__i386__) -# define ARCHITECTURE_ID "X86" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif -#else -# define ARCHITECTURE_ID -#endif - -/* Convert integer to decimal digit literals. */ -#define DEC(n) \ - ('0' + (((n) / 10000000)%10)), \ - ('0' + (((n) / 1000000)%10)), \ - ('0' + (((n) / 100000)%10)), \ - ('0' + (((n) / 10000)%10)), \ - ('0' + (((n) / 1000)%10)), \ - ('0' + (((n) / 100)%10)), \ - ('0' + (((n) / 10)%10)), \ - ('0' + ((n) % 10)) - -/* Convert integer to hex digit literals. */ -#define HEX(n) \ - ('0' + ((n)>>28 & 0xF)), \ - ('0' + ((n)>>24 & 0xF)), \ - ('0' + ((n)>>20 & 0xF)), \ - ('0' + ((n)>>16 & 0xF)), \ - ('0' + ((n)>>12 & 0xF)), \ - ('0' + ((n)>>8 & 0xF)), \ - ('0' + ((n)>>4 & 0xF)), \ - ('0' + ((n) & 0xF)) - -/* Construct a string literal encoding the version number components. */ -#ifdef COMPILER_VERSION_MAJOR -char const info_version[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', - COMPILER_VERSION_MAJOR, -# ifdef COMPILER_VERSION_MINOR - '.', COMPILER_VERSION_MINOR, -# ifdef COMPILER_VERSION_PATCH - '.', COMPILER_VERSION_PATCH, -# ifdef COMPILER_VERSION_TWEAK - '.', COMPILER_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct a string literal encoding the internal version number. */ -#ifdef COMPILER_VERSION_INTERNAL -char const info_version_internal[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', - 'i','n','t','e','r','n','a','l','[', - COMPILER_VERSION_INTERNAL,']','\0'}; -#endif - -/* Construct a string literal encoding the version number components. */ -#ifdef SIMULATE_VERSION_MAJOR -char const info_simulate_version[] = { - 'I', 'N', 'F', 'O', ':', - 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', - SIMULATE_VERSION_MAJOR, -# ifdef SIMULATE_VERSION_MINOR - '.', SIMULATE_VERSION_MINOR, -# ifdef SIMULATE_VERSION_PATCH - '.', SIMULATE_VERSION_PATCH, -# ifdef SIMULATE_VERSION_TWEAK - '.', SIMULATE_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct the string literal in pieces to prevent the source from - getting matched. Store it in a pointer rather than an array - because some compilers will just produce instructions to fill the - array rather than assigning a pointer to a static array. */ -char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; -char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; - - - - -#if defined(__INTEL_COMPILER) && defined(_MSVC_LANG) && _MSVC_LANG < 201403L -# if defined(__INTEL_CXX11_MODE__) -# if defined(__cpp_aggregate_nsdmi) -# define CXX_STD 201402L -# else -# define CXX_STD 201103L -# endif -# else -# define CXX_STD 199711L -# endif -#elif defined(_MSC_VER) && defined(_MSVC_LANG) -# define CXX_STD _MSVC_LANG -#else -# define CXX_STD __cplusplus -#endif - -const char* info_language_dialect_default = "INFO" ":" "dialect_default[" -#if CXX_STD > 201703L - "20" -#elif CXX_STD >= 201703L - "17" -#elif CXX_STD >= 201402L - "14" -#elif CXX_STD >= 201103L - "11" -#else - "98" -#endif -"]"; - -/*--------------------------------------------------------------------------*/ - -int main(int argc, char* argv[]) -{ - int require = 0; - require += info_compiler[argc]; - require += info_platform[argc]; -#ifdef COMPILER_VERSION_MAJOR - require += info_version[argc]; -#endif -#ifdef COMPILER_VERSION_INTERNAL - require += info_version_internal[argc]; -#endif -#ifdef SIMULATE_ID - require += info_simulate[argc]; -#endif -#ifdef SIMULATE_VERSION_MAJOR - require += info_simulate_version[argc]; -#endif -#if defined(__CRAYXE) || defined(__CRAYXC) - require += info_cray[argc]; -#endif - require += info_language_dialect_default[argc]; - (void)argv; - return require; -} diff --git a/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdCXX/a.out b/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdCXX/a.out deleted file mode 100755 index 2881803fe1c1315653cec8eead6766e2c9b69693..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 16720 zcmeHOe{3699e<9KHtkx+{k4X6TW+P5(v7%ImWH$})K22`jNEo>lP!>C$HjIM3&#%j znI_XZT2h9r5~#FFOai28NC>n_1O6BSX^^U02Z*s%LR(QmM6hZZDqS`h3ed%Tzwf?Z z=kDSTiSZBUp5*(y_xb*K@4oNd`QF`opO3_PsyrUS$tylCuoUu}Oo#;jy_5k6iFUCT zj<<{3#0n@^OU{&sOaQ5wE?3#HmUu59+SOyG0^VlQP=lGcg@|Z(v($(Ug2X83JkYKN z1ypw8ZfYkZ%ggmCXbee_$1+|<1xSomJ8a5)lN5{j4m*aZK9!K|uqaOSN@1VodPYPVsc2VtOez-)YxRc24XjJ4UPn(~+x2;yI(23lmr*e96m7?S&JMes`|;eE#*9SDz@{#Xhi3)WL-IJS4D; zd8`9<%=141IU37=my*94lf+F9?Z7J)WLtn+UxDuhPN~4hZ^GXK{I&}E0^%3PaJ30d zi%;mP-UD6f zY$n;O52ev^WGtH@OU+cRs3_ZGMv-Ibfe2y@d0Z5>q*h^cKSFKi>yxhwWt}NlpzD_T zS#nStGUd#3+3(;L#nh{J@HyfY2mdAF8y)-;#9!VgWWuq4=fi2%!t*(!Y|g^-*hGHb z!t*tT{DOs-_e&(*|9if^XmEQ`_%IbUe$9^y|id-1P43FL2YSvxUK=(#rD|V;~fzYi^AP~>QqM+ zX4T?VV~u*MV+9oEc9u$|xda?8*4z$d&mh>^?B6^JLUhyzcEw}Y)M8=w#mEh8rh01A zFJPvADsoMIQuVx2_pGS<$&4p*1Na|T;!VZrO)vN$n$K4I%i7Fj;Uv}t z;Sb4phaZehciaOrm+%A8;;Z4lXz|@}Z@74)Pn~Ys4)l@O&iAlS=NcAECH4G!UZbJ; z3dJ*4d?!}C-d%hnT-x}1b?Smg-SfM`pRm6N2Ez}92g47CwF|>bb>eB`NI;b1q&zZY zliY(F0XG6}1l$O?5pW~mM!=1L8v!>0ZUo#2{EtMyWBb~;ywTBvJ%{$jvt#3_bTT&p zUnvLeIySlXxnwS%%4P(fbxlyo=(OM z_!Ky-7t+Q+bL*h+Z1sK&zh~mNFXOFJDGhiM@C@J?K>T)jY`#=F2Uz`fsq{-g18^g} zhQM#Jm^_ah7M=;eXX~1kwWo>4H3scqk8cJ<_e%MNZ#!gLu?)NfIa+&M z?Ax;Uu6wp`Loxb&2!3FS8D@yj*czTo34RA2kl%Kg4j#@8P91;f6^PM^~0tMByrJAJkC zd**M!ydV6y-|H}tZgL~wM!=1L8v!>0ZUo#2xDjw8;6{KW!0Q@$9V1MEWMW*yinPvg zEtMN-vFL}W%@P^)yVQ1S0R2z^3^6S zjuGN|Q%v`_JX=Jg)geI{d3e_ z_%bZZ96y+b$?~ft|2vhr9pv`E2fRM~1A653tBPVe;`OP#9+lUh?(gc_t2Fiv6*5La z*%N??eN%HmmYN@H2?m0#ftH;n|L+^*g%zyz++h}VFT9iB_3IWI)<$~;uTQu0)#A~L zern3&%&xzpJihGwO2OmM&esa=PdmR#@HnvZs|AlYI}f9mt}8pgMkp2ewIW!N_m%f& z*!|QAzE15tI8m&OnfHoy<@NVgsTWp;&sEglP~OL2*WXya-t9bGofXEXSKL~@KJEIO zg$P+0Gw+3~Jy?i$A^Eco{!ZfgK52Rp;-ip( zQCn^g)`zJFeja!m#P>Z(!T}fOW4(OeWgg!NdBpN~J_&rK_CF)_{UW4522zU&;G?qs zdEh;_)p$}Bi3`Q_v1e&GFLbGg6RWEb%3tCn9c{m8SD1&@*+=lDDc zykgPg>=VGRtJ*C1zRLVrd+lA|ktei(=CA@*$I zG13pwc-}?gm&m`L^!b1A3h?MBNIa>FH^|RUs#m_l1mQLEFki6))GcG zm)G>dgupk~>7zphO_)i9Q^bg4j+hUk%QeD>|L>YN(im{lLx~G zqFr{0+#~}Oym!|kDtS=54-0L7>`-SorXA|(ITGpBdc&Qu2zr%UYvTEWJg4{HOp{FL zhR!BSyKzDx+jblcwahIypljcMqb2fLZB)-BaBoiZ5NIV*8Lf~{CWJh7e#y_3V7oAY zrj$P_fOIIIrz+%rAZeV|Gb06k1iHcgB>>c6QxJy{cMDbA0%YHGWIrkCA3rt-5y(%D z8Tt^Qku!0WbEypMKN=T-Ox8#SMlyxKcrH7h%o&pwYN(Kc9b%~jQQ^*LlcA3YsXnUb zM@1kpnSm-yG;*edzLMAq8pv|Vw2lTMAfpr*Pa6Ucfsrg^jN}9yajb%7R(4(>IZC5* zGy(QpGVRS_YFcm}oa@EkGDY|rzT6mWRTY|qcLj69D56`9b7 zHGLKeIHzHIe(q)D`60KT^%x%mdz>S2nV*jt6{^hHexk)RWH6>|&(G0}3N@JPcb@;( zz!p_lj(@c>5%PSM*k%3yO%Pb^6|!SwcWlpP#-|+i{QS6e1IDY44s-hZ zzQdm91B^VM=lY%F_lIQ9@fQkd5}uWbm1ur-S@_%KLwv`dnuGBiPni?D=_qp$SMxtY?;%%FMq70vvl>fBCr? z)^}r?q5i}1kBRNLAHNM8s<1u3$C#l9xe&;#iR~E|KxnlWA<_<-NI>LL{Y)%E27Ph; z{5%&VL#~JQ>2$a#yg(r5tcUIIE^C?@wzndW9jof6$)QRYHeScrCEOmq|E&U!+itc0 e4*oGfdcfhF>oukL>{;1 - -void* test_func(void* data) -{ - return data; -} - -int main(void) -{ - pthread_t thread; - pthread_create(&thread, NULL, test_func, NULL); - pthread_detach(thread); - pthread_join(thread, NULL); - pthread_atfork(NULL, NULL, NULL); - pthread_exit(NULL); - - return 0; -} - diff --git a/rad-sim/example-designs/add/CMakeFiles/CMakeOutput.log b/rad-sim/example-designs/add/CMakeFiles/CMakeOutput.log deleted file mode 100644 index 71dd668..0000000 --- a/rad-sim/example-designs/add/CMakeFiles/CMakeOutput.log +++ /dev/null @@ -1,477 +0,0 @@ -The system is: Linux - 5.15.0-69-generic - x86_64 -Compiling the C compiler identification source file "CMakeCCompilerId.c" succeeded. -Compiler: /usr/bin/cc -Build flags: -Id flags: - -The output was: -0 - - -Compilation of the C compiler identification source "CMakeCCompilerId.c" produced "a.out" - -The C compiler identification is GNU, found in "/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/a.out" - -Compiling the CXX compiler identification source file "CMakeCXXCompilerId.cpp" succeeded. -Compiler: /usr/bin/c++ -Build flags: -Id flags: - -The output was: -0 - - -Compilation of the CXX compiler identification source "CMakeCXXCompilerId.cpp" produced "a.out" - -The CXX compiler identification is GNU, found in "/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdCXX/a.out" - -Determining if the C compiler works passed with the following output: -Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp - -Run Build Command(s):/usr/bin/make cmTC_9f9dc/fast && /usr/bin/make -f CMakeFiles/cmTC_9f9dc.dir/build.make CMakeFiles/cmTC_9f9dc.dir/build -make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' -Building C object CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o -/usr/bin/cc -o CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/testCCompiler.c -Linking C executable cmTC_9f9dc -/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_9f9dc.dir/link.txt --verbose=1 -/usr/bin/cc -rdynamic CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o -o cmTC_9f9dc -make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' - - - -Detecting C compiler ABI info compiled with the following output: -Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp - -Run Build Command(s):/usr/bin/make cmTC_5eca0/fast && /usr/bin/make -f CMakeFiles/cmTC_5eca0.dir/build.make CMakeFiles/cmTC_5eca0.dir/build -make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' -Building C object CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -/usr/bin/cc -v -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -c /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c -Using built-in specs. -COLLECT_GCC=/usr/bin/cc -OFFLOAD_TARGET_NAMES=nvptx-none:hsa -OFFLOAD_TARGET_DEFAULT=1 -Target: x86_64-linux-gnu -Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu -Thread model: posix -gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' - /usr/lib/gcc/x86_64-linux-gnu/9/cc1 -quiet -v -imultiarch x86_64-linux-gnu /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c -quiet -dumpbase CMakeCCompilerABI.c -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccEZ3Z6E.s -GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) - compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP - -GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 -ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu" -ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed" -ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include" -#include "..." search starts here: -#include <...> search starts here: - /usr/lib/gcc/x86_64-linux-gnu/9/include - /usr/local/include - /usr/include/x86_64-linux-gnu - /usr/include -End of search list. -GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) - compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP - -GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 -Compiler executable checksum: 01da938ff5dc2163489aa33cb3b747a7 -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' - as -v --64 -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o /tmp/ccEZ3Z6E.s -GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34 -COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ -LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' -Linking C executable cmTC_5eca0 -/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_5eca0.dir/link.txt --verbose=1 -/usr/bin/cc -v -rdynamic CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -o cmTC_5eca0 -Using built-in specs. -COLLECT_GCC=/usr/bin/cc -COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -OFFLOAD_TARGET_NAMES=nvptx-none:hsa -OFFLOAD_TARGET_DEFAULT=1 -Target: x86_64-linux-gnu -Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu -Thread model: posix -gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) -COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ -LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ -COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64' - /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/ccjwqw95.res -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_5eca0 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -lgcc --push-state --as-needed -lgcc_s --pop-state -lc -lgcc --push-state --as-needed -lgcc_s --pop-state /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o -COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64' -make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' - - - -Parsed C implicit include dir info from above output: rv=done - found start of include info - found start of implicit include info - add: [/usr/lib/gcc/x86_64-linux-gnu/9/include] - add: [/usr/local/include] - add: [/usr/include/x86_64-linux-gnu] - add: [/usr/include] - end of search list found - collapse include dir [/usr/lib/gcc/x86_64-linux-gnu/9/include] ==> [/usr/lib/gcc/x86_64-linux-gnu/9/include] - collapse include dir [/usr/local/include] ==> [/usr/local/include] - collapse include dir [/usr/include/x86_64-linux-gnu] ==> [/usr/include/x86_64-linux-gnu] - collapse include dir [/usr/include] ==> [/usr/include] - implicit include dirs: [/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include] - - -Parsed C implicit link information from above output: - link line regex: [^( *|.*[/\])(ld|CMAKE_LINK_STARTFILE-NOTFOUND|([^/\]+-)?ld|collect2)[^/\]*( |$)] - ignore line: [Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp] - ignore line: [] - ignore line: [Run Build Command(s):/usr/bin/make cmTC_5eca0/fast && /usr/bin/make -f CMakeFiles/cmTC_5eca0.dir/build.make CMakeFiles/cmTC_5eca0.dir/build] - ignore line: [make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp'] - ignore line: [Building C object CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o] - ignore line: [/usr/bin/cc -v -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -c /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c] - ignore line: [Using built-in specs.] - ignore line: [COLLECT_GCC=/usr/bin/cc] - ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] - ignore line: [OFFLOAD_TARGET_DEFAULT=1] - ignore line: [Target: x86_64-linux-gnu] - ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] - ignore line: [Thread model: posix] - ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] - ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/cc1 -quiet -v -imultiarch x86_64-linux-gnu /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c -quiet -dumpbase CMakeCCompilerABI.c -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccEZ3Z6E.s] - ignore line: [GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] - ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] - ignore line: [] - ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] - ignore line: [ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu"] - ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed"] - ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include"] - ignore line: [#include "..." search starts here:] - ignore line: [#include <...> search starts here:] - ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/include] - ignore line: [ /usr/local/include] - ignore line: [ /usr/include/x86_64-linux-gnu] - ignore line: [ /usr/include] - ignore line: [End of search list.] - ignore line: [GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] - ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] - ignore line: [] - ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] - ignore line: [Compiler executable checksum: 01da938ff5dc2163489aa33cb3b747a7] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] - ignore line: [ as -v --64 -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o /tmp/ccEZ3Z6E.s] - ignore line: [GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34] - ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] - ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] - ignore line: [Linking C executable cmTC_5eca0] - ignore line: [/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_5eca0.dir/link.txt --verbose=1] - ignore line: [/usr/bin/cc -v -rdynamic CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -o cmTC_5eca0 ] - ignore line: [Using built-in specs.] - ignore line: [COLLECT_GCC=/usr/bin/cc] - ignore line: [COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] - ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] - ignore line: [OFFLOAD_TARGET_DEFAULT=1] - ignore line: [Target: x86_64-linux-gnu] - ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] - ignore line: [Thread model: posix] - ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] - ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] - ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64'] - link line: [ /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/ccjwqw95.res -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_5eca0 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -lgcc --push-state --as-needed -lgcc_s --pop-state -lc -lgcc --push-state --as-needed -lgcc_s --pop-state /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] - arg [/usr/lib/gcc/x86_64-linux-gnu/9/collect2] ==> ignore - arg [-plugin] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so] ==> ignore - arg [-plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] ==> ignore - arg [-plugin-opt=-fresolution=/tmp/ccjwqw95.res] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore - arg [-plugin-opt=-pass-through=-lc] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore - arg [--build-id] ==> ignore - arg [--eh-frame-hdr] ==> ignore - arg [-m] ==> ignore - arg [elf_x86_64] ==> ignore - arg [--hash-style=gnu] ==> ignore - arg [--as-needed] ==> ignore - arg [-export-dynamic] ==> ignore - arg [-dynamic-linker] ==> ignore - arg [/lib64/ld-linux-x86-64.so.2] ==> ignore - arg [-pie] ==> ignore - arg [-znow] ==> ignore - arg [-zrelro] ==> ignore - arg [-o] ==> ignore - arg [cmTC_5eca0] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o] ==> ignore - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] - arg [-L/lib/x86_64-linux-gnu] ==> dir [/lib/x86_64-linux-gnu] - arg [-L/lib/../lib] ==> dir [/lib/../lib] - arg [-L/usr/lib/x86_64-linux-gnu] ==> dir [/usr/lib/x86_64-linux-gnu] - arg [-L/usr/lib/../lib] ==> dir [/usr/lib/../lib] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] - arg [CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o] ==> ignore - arg [-lgcc] ==> lib [gcc] - arg [--push-state] ==> ignore - arg [--as-needed] ==> ignore - arg [-lgcc_s] ==> lib [gcc_s] - arg [--pop-state] ==> ignore - arg [-lc] ==> lib [c] - arg [-lgcc] ==> lib [gcc] - arg [--push-state] ==> ignore - arg [--as-needed] ==> ignore - arg [-lgcc_s] ==> lib [gcc_s] - arg [--pop-state] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] ==> ignore - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9] ==> [/usr/lib/gcc/x86_64-linux-gnu/9] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> [/usr/lib] - collapse library dir [/lib/x86_64-linux-gnu] ==> [/lib/x86_64-linux-gnu] - collapse library dir [/lib/../lib] ==> [/lib] - collapse library dir [/usr/lib/x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] - collapse library dir [/usr/lib/../lib] ==> [/usr/lib] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> [/usr/lib] - implicit libs: [gcc;gcc_s;c;gcc;gcc_s] - implicit dirs: [/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib] - implicit fwks: [] - - -Determining if the CXX compiler works passed with the following output: -Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp - -Run Build Command(s):/usr/bin/make cmTC_8e0c3/fast && /usr/bin/make -f CMakeFiles/cmTC_8e0c3.dir/build.make CMakeFiles/cmTC_8e0c3.dir/build -make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' -Building CXX object CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o -/usr/bin/c++ -o CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/testCXXCompiler.cxx -Linking CXX executable cmTC_8e0c3 -/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_8e0c3.dir/link.txt --verbose=1 -/usr/bin/c++ -rdynamic CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o -o cmTC_8e0c3 -make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' - - - -Detecting CXX compiler ABI info compiled with the following output: -Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp - -Run Build Command(s):/usr/bin/make cmTC_59ff1/fast && /usr/bin/make -f CMakeFiles/cmTC_59ff1.dir/build.make CMakeFiles/cmTC_59ff1.dir/build -make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' -Building CXX object CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -/usr/bin/c++ -v -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -c /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp -Using built-in specs. -COLLECT_GCC=/usr/bin/c++ -OFFLOAD_TARGET_NAMES=nvptx-none:hsa -OFFLOAD_TARGET_DEFAULT=1 -Target: x86_64-linux-gnu -Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu -Thread model: posix -gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' - /usr/lib/gcc/x86_64-linux-gnu/9/cc1plus -quiet -v -imultiarch x86_64-linux-gnu -D_GNU_SOURCE /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp -quiet -dumpbase CMakeCXXCompilerABI.cpp -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccETTYVz.s -GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) - compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP - -GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 -ignoring duplicate directory "/usr/include/x86_64-linux-gnu/c++/9" -ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu" -ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed" -ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include" -#include "..." search starts here: -#include <...> search starts here: - /usr/include/c++/9 - /usr/include/x86_64-linux-gnu/c++/9 - /usr/include/c++/9/backward - /usr/lib/gcc/x86_64-linux-gnu/9/include - /usr/local/include - /usr/include/x86_64-linux-gnu - /usr/include -End of search list. -GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) - compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP - -GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 -Compiler executable checksum: 3d1eba838554fa2348dba760e4770469 -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' - as -v --64 -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o /tmp/ccETTYVz.s -GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34 -COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ -LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' -Linking CXX executable cmTC_59ff1 -/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_59ff1.dir/link.txt --verbose=1 -/usr/bin/c++ -v -rdynamic CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -o cmTC_59ff1 -Using built-in specs. -COLLECT_GCC=/usr/bin/c++ -COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -OFFLOAD_TARGET_NAMES=nvptx-none:hsa -OFFLOAD_TARGET_DEFAULT=1 -Target: x86_64-linux-gnu -Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu -Thread model: posix -gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) -COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ -LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ -COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64' - /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/cco0EvR4.res -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_59ff1 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -lstdc++ -lm -lgcc_s -lgcc -lc -lgcc_s -lgcc /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o -COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64' -make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' - - - -Parsed CXX implicit include dir info from above output: rv=done - found start of include info - found start of implicit include info - add: [/usr/include/c++/9] - add: [/usr/include/x86_64-linux-gnu/c++/9] - add: [/usr/include/c++/9/backward] - add: [/usr/lib/gcc/x86_64-linux-gnu/9/include] - add: [/usr/local/include] - add: [/usr/include/x86_64-linux-gnu] - add: [/usr/include] - end of search list found - collapse include dir [/usr/include/c++/9] ==> [/usr/include/c++/9] - collapse include dir [/usr/include/x86_64-linux-gnu/c++/9] ==> [/usr/include/x86_64-linux-gnu/c++/9] - collapse include dir [/usr/include/c++/9/backward] ==> [/usr/include/c++/9/backward] - collapse include dir [/usr/lib/gcc/x86_64-linux-gnu/9/include] ==> [/usr/lib/gcc/x86_64-linux-gnu/9/include] - collapse include dir [/usr/local/include] ==> [/usr/local/include] - collapse include dir [/usr/include/x86_64-linux-gnu] ==> [/usr/include/x86_64-linux-gnu] - collapse include dir [/usr/include] ==> [/usr/include] - implicit include dirs: [/usr/include/c++/9;/usr/include/x86_64-linux-gnu/c++/9;/usr/include/c++/9/backward;/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include] - - -Parsed CXX implicit link information from above output: - link line regex: [^( *|.*[/\])(ld|CMAKE_LINK_STARTFILE-NOTFOUND|([^/\]+-)?ld|collect2)[^/\]*( |$)] - ignore line: [Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp] - ignore line: [] - ignore line: [Run Build Command(s):/usr/bin/make cmTC_59ff1/fast && /usr/bin/make -f CMakeFiles/cmTC_59ff1.dir/build.make CMakeFiles/cmTC_59ff1.dir/build] - ignore line: [make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp'] - ignore line: [Building CXX object CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o] - ignore line: [/usr/bin/c++ -v -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -c /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp] - ignore line: [Using built-in specs.] - ignore line: [COLLECT_GCC=/usr/bin/c++] - ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] - ignore line: [OFFLOAD_TARGET_DEFAULT=1] - ignore line: [Target: x86_64-linux-gnu] - ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] - ignore line: [Thread model: posix] - ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] - ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/cc1plus -quiet -v -imultiarch x86_64-linux-gnu -D_GNU_SOURCE /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp -quiet -dumpbase CMakeCXXCompilerABI.cpp -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccETTYVz.s] - ignore line: [GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] - ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] - ignore line: [] - ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] - ignore line: [ignoring duplicate directory "/usr/include/x86_64-linux-gnu/c++/9"] - ignore line: [ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu"] - ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed"] - ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include"] - ignore line: [#include "..." search starts here:] - ignore line: [#include <...> search starts here:] - ignore line: [ /usr/include/c++/9] - ignore line: [ /usr/include/x86_64-linux-gnu/c++/9] - ignore line: [ /usr/include/c++/9/backward] - ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/include] - ignore line: [ /usr/local/include] - ignore line: [ /usr/include/x86_64-linux-gnu] - ignore line: [ /usr/include] - ignore line: [End of search list.] - ignore line: [GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] - ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] - ignore line: [] - ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] - ignore line: [Compiler executable checksum: 3d1eba838554fa2348dba760e4770469] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] - ignore line: [ as -v --64 -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o /tmp/ccETTYVz.s] - ignore line: [GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34] - ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] - ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] - ignore line: [Linking CXX executable cmTC_59ff1] - ignore line: [/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_59ff1.dir/link.txt --verbose=1] - ignore line: [/usr/bin/c++ -v -rdynamic CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -o cmTC_59ff1 ] - ignore line: [Using built-in specs.] - ignore line: [COLLECT_GCC=/usr/bin/c++] - ignore line: [COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] - ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] - ignore line: [OFFLOAD_TARGET_DEFAULT=1] - ignore line: [Target: x86_64-linux-gnu] - ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] - ignore line: [Thread model: posix] - ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] - ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] - ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] - link line: [ /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/cco0EvR4.res -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_59ff1 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -lstdc++ -lm -lgcc_s -lgcc -lc -lgcc_s -lgcc /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] - arg [/usr/lib/gcc/x86_64-linux-gnu/9/collect2] ==> ignore - arg [-plugin] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so] ==> ignore - arg [-plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] ==> ignore - arg [-plugin-opt=-fresolution=/tmp/cco0EvR4.res] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc] ==> ignore - arg [-plugin-opt=-pass-through=-lc] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc] ==> ignore - arg [--build-id] ==> ignore - arg [--eh-frame-hdr] ==> ignore - arg [-m] ==> ignore - arg [elf_x86_64] ==> ignore - arg [--hash-style=gnu] ==> ignore - arg [--as-needed] ==> ignore - arg [-export-dynamic] ==> ignore - arg [-dynamic-linker] ==> ignore - arg [/lib64/ld-linux-x86-64.so.2] ==> ignore - arg [-pie] ==> ignore - arg [-znow] ==> ignore - arg [-zrelro] ==> ignore - arg [-o] ==> ignore - arg [cmTC_59ff1] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o] ==> ignore - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] - arg [-L/lib/x86_64-linux-gnu] ==> dir [/lib/x86_64-linux-gnu] - arg [-L/lib/../lib] ==> dir [/lib/../lib] - arg [-L/usr/lib/x86_64-linux-gnu] ==> dir [/usr/lib/x86_64-linux-gnu] - arg [-L/usr/lib/../lib] ==> dir [/usr/lib/../lib] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] - arg [CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o] ==> ignore - arg [-lstdc++] ==> lib [stdc++] - arg [-lm] ==> lib [m] - arg [-lgcc_s] ==> lib [gcc_s] - arg [-lgcc] ==> lib [gcc] - arg [-lc] ==> lib [c] - arg [-lgcc_s] ==> lib [gcc_s] - arg [-lgcc] ==> lib [gcc] - arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] ==> ignore - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9] ==> [/usr/lib/gcc/x86_64-linux-gnu/9] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> [/usr/lib] - collapse library dir [/lib/x86_64-linux-gnu] ==> [/lib/x86_64-linux-gnu] - collapse library dir [/lib/../lib] ==> [/lib] - collapse library dir [/usr/lib/x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] - collapse library dir [/usr/lib/../lib] ==> [/usr/lib] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> [/usr/lib] - implicit libs: [stdc++;m;gcc_s;gcc;c;gcc_s;gcc] - implicit dirs: [/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib] - implicit fwks: [] - - -Determining if the include file pthread.h exists passed with the following output: -Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp - -Run Build Command(s):/usr/bin/make cmTC_9b3d4/fast && /usr/bin/make -f CMakeFiles/cmTC_9b3d4.dir/build.make CMakeFiles/cmTC_9b3d4.dir/build -make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' -Building C object CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o -/usr/bin/cc -o CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/CheckIncludeFile.c -Linking C executable cmTC_9b3d4 -/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_9b3d4.dir/link.txt --verbose=1 -/usr/bin/cc CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o -o cmTC_9b3d4 -make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' - - - diff --git a/rad-sim/example-designs/add/CMakeFiles/cmake.check_cache b/rad-sim/example-designs/add/CMakeFiles/cmake.check_cache deleted file mode 100644 index 3dccd73..0000000 --- a/rad-sim/example-designs/add/CMakeFiles/cmake.check_cache +++ /dev/null @@ -1 +0,0 @@ -# This file is generated by cmake for dependency checking of the CMakeCache.txt file diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeCCompiler.cmake b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeCCompiler.cmake deleted file mode 100644 index c5ece7b..0000000 --- a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeCCompiler.cmake +++ /dev/null @@ -1,76 +0,0 @@ -set(CMAKE_C_COMPILER "/usr/bin/cc") -set(CMAKE_C_COMPILER_ARG1 "") -set(CMAKE_C_COMPILER_ID "GNU") -set(CMAKE_C_COMPILER_VERSION "9.4.0") -set(CMAKE_C_COMPILER_VERSION_INTERNAL "") -set(CMAKE_C_COMPILER_WRAPPER "") -set(CMAKE_C_STANDARD_COMPUTED_DEFAULT "11") -set(CMAKE_C_COMPILE_FEATURES "c_std_90;c_function_prototypes;c_std_99;c_restrict;c_variadic_macros;c_std_11;c_static_assert") -set(CMAKE_C90_COMPILE_FEATURES "c_std_90;c_function_prototypes") -set(CMAKE_C99_COMPILE_FEATURES "c_std_99;c_restrict;c_variadic_macros") -set(CMAKE_C11_COMPILE_FEATURES "c_std_11;c_static_assert") - -set(CMAKE_C_PLATFORM_ID "Linux") -set(CMAKE_C_SIMULATE_ID "") -set(CMAKE_C_COMPILER_FRONTEND_VARIANT "") -set(CMAKE_C_SIMULATE_VERSION "") - - - -set(CMAKE_AR "/usr/bin/ar") -set(CMAKE_C_COMPILER_AR "/usr/bin/gcc-ar-9") -set(CMAKE_RANLIB "/usr/bin/ranlib") -set(CMAKE_C_COMPILER_RANLIB "/usr/bin/gcc-ranlib-9") -set(CMAKE_LINKER "/usr/bin/ld") -set(CMAKE_MT "") -set(CMAKE_COMPILER_IS_GNUCC 1) -set(CMAKE_C_COMPILER_LOADED 1) -set(CMAKE_C_COMPILER_WORKS TRUE) -set(CMAKE_C_ABI_COMPILED TRUE) -set(CMAKE_COMPILER_IS_MINGW ) -set(CMAKE_COMPILER_IS_CYGWIN ) -if(CMAKE_COMPILER_IS_CYGWIN) - set(CYGWIN 1) - set(UNIX 1) -endif() - -set(CMAKE_C_COMPILER_ENV_VAR "CC") - -if(CMAKE_COMPILER_IS_MINGW) - set(MINGW 1) -endif() -set(CMAKE_C_COMPILER_ID_RUN 1) -set(CMAKE_C_SOURCE_FILE_EXTENSIONS c;m) -set(CMAKE_C_IGNORE_EXTENSIONS h;H;o;O;obj;OBJ;def;DEF;rc;RC) -set(CMAKE_C_LINKER_PREFERENCE 10) - -# Save compiler ABI information. -set(CMAKE_C_SIZEOF_DATA_PTR "8") -set(CMAKE_C_COMPILER_ABI "ELF") -set(CMAKE_C_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") - -if(CMAKE_C_SIZEOF_DATA_PTR) - set(CMAKE_SIZEOF_VOID_P "${CMAKE_C_SIZEOF_DATA_PTR}") -endif() - -if(CMAKE_C_COMPILER_ABI) - set(CMAKE_INTERNAL_PLATFORM_ABI "${CMAKE_C_COMPILER_ABI}") -endif() - -if(CMAKE_C_LIBRARY_ARCHITECTURE) - set(CMAKE_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") -endif() - -set(CMAKE_C_CL_SHOWINCLUDES_PREFIX "") -if(CMAKE_C_CL_SHOWINCLUDES_PREFIX) - set(CMAKE_CL_SHOWINCLUDES_PREFIX "${CMAKE_C_CL_SHOWINCLUDES_PREFIX}") -endif() - - - - - -set(CMAKE_C_IMPLICIT_INCLUDE_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include") -set(CMAKE_C_IMPLICIT_LINK_LIBRARIES "gcc;gcc_s;c;gcc;gcc_s") -set(CMAKE_C_IMPLICIT_LINK_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib") -set(CMAKE_C_IMPLICIT_LINK_FRAMEWORK_DIRECTORIES "") diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake deleted file mode 100644 index 278ef39..0000000 --- a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake +++ /dev/null @@ -1,88 +0,0 @@ -set(CMAKE_CXX_COMPILER "/usr/bin/c++") -set(CMAKE_CXX_COMPILER_ARG1 "") -set(CMAKE_CXX_COMPILER_ID "GNU") -set(CMAKE_CXX_COMPILER_VERSION "9.4.0") -set(CMAKE_CXX_COMPILER_VERSION_INTERNAL "") -set(CMAKE_CXX_COMPILER_WRAPPER "") -set(CMAKE_CXX_STANDARD_COMPUTED_DEFAULT "14") -set(CMAKE_CXX_COMPILE_FEATURES "cxx_std_98;cxx_template_template_parameters;cxx_std_11;cxx_alias_templates;cxx_alignas;cxx_alignof;cxx_attributes;cxx_auto_type;cxx_constexpr;cxx_decltype;cxx_decltype_incomplete_return_types;cxx_default_function_template_args;cxx_defaulted_functions;cxx_defaulted_move_initializers;cxx_delegating_constructors;cxx_deleted_functions;cxx_enum_forward_declarations;cxx_explicit_conversions;cxx_extended_friend_declarations;cxx_extern_templates;cxx_final;cxx_func_identifier;cxx_generalized_initializers;cxx_inheriting_constructors;cxx_inline_namespaces;cxx_lambdas;cxx_local_type_template_args;cxx_long_long_type;cxx_noexcept;cxx_nonstatic_member_init;cxx_nullptr;cxx_override;cxx_range_for;cxx_raw_string_literals;cxx_reference_qualified_functions;cxx_right_angle_brackets;cxx_rvalue_references;cxx_sizeof_member;cxx_static_assert;cxx_strong_enums;cxx_thread_local;cxx_trailing_return_types;cxx_unicode_literals;cxx_uniform_initialization;cxx_unrestricted_unions;cxx_user_literals;cxx_variadic_macros;cxx_variadic_templates;cxx_std_14;cxx_aggregate_default_initializers;cxx_attribute_deprecated;cxx_binary_literals;cxx_contextual_conversions;cxx_decltype_auto;cxx_digit_separators;cxx_generic_lambdas;cxx_lambda_init_captures;cxx_relaxed_constexpr;cxx_return_type_deduction;cxx_variable_templates;cxx_std_17;cxx_std_20") -set(CMAKE_CXX98_COMPILE_FEATURES "cxx_std_98;cxx_template_template_parameters") -set(CMAKE_CXX11_COMPILE_FEATURES "cxx_std_11;cxx_alias_templates;cxx_alignas;cxx_alignof;cxx_attributes;cxx_auto_type;cxx_constexpr;cxx_decltype;cxx_decltype_incomplete_return_types;cxx_default_function_template_args;cxx_defaulted_functions;cxx_defaulted_move_initializers;cxx_delegating_constructors;cxx_deleted_functions;cxx_enum_forward_declarations;cxx_explicit_conversions;cxx_extended_friend_declarations;cxx_extern_templates;cxx_final;cxx_func_identifier;cxx_generalized_initializers;cxx_inheriting_constructors;cxx_inline_namespaces;cxx_lambdas;cxx_local_type_template_args;cxx_long_long_type;cxx_noexcept;cxx_nonstatic_member_init;cxx_nullptr;cxx_override;cxx_range_for;cxx_raw_string_literals;cxx_reference_qualified_functions;cxx_right_angle_brackets;cxx_rvalue_references;cxx_sizeof_member;cxx_static_assert;cxx_strong_enums;cxx_thread_local;cxx_trailing_return_types;cxx_unicode_literals;cxx_uniform_initialization;cxx_unrestricted_unions;cxx_user_literals;cxx_variadic_macros;cxx_variadic_templates") -set(CMAKE_CXX14_COMPILE_FEATURES "cxx_std_14;cxx_aggregate_default_initializers;cxx_attribute_deprecated;cxx_binary_literals;cxx_contextual_conversions;cxx_decltype_auto;cxx_digit_separators;cxx_generic_lambdas;cxx_lambda_init_captures;cxx_relaxed_constexpr;cxx_return_type_deduction;cxx_variable_templates") -set(CMAKE_CXX17_COMPILE_FEATURES "cxx_std_17") -set(CMAKE_CXX20_COMPILE_FEATURES "cxx_std_20") - -set(CMAKE_CXX_PLATFORM_ID "Linux") -set(CMAKE_CXX_SIMULATE_ID "") -set(CMAKE_CXX_COMPILER_FRONTEND_VARIANT "") -set(CMAKE_CXX_SIMULATE_VERSION "") - - - -set(CMAKE_AR "/usr/bin/ar") -set(CMAKE_CXX_COMPILER_AR "/usr/bin/gcc-ar-9") -set(CMAKE_RANLIB "/usr/bin/ranlib") -set(CMAKE_CXX_COMPILER_RANLIB "/usr/bin/gcc-ranlib-9") -set(CMAKE_LINKER "/usr/bin/ld") -set(CMAKE_MT "") -set(CMAKE_COMPILER_IS_GNUCXX 1) -set(CMAKE_CXX_COMPILER_LOADED 1) -set(CMAKE_CXX_COMPILER_WORKS TRUE) -set(CMAKE_CXX_ABI_COMPILED TRUE) -set(CMAKE_COMPILER_IS_MINGW ) -set(CMAKE_COMPILER_IS_CYGWIN ) -if(CMAKE_COMPILER_IS_CYGWIN) - set(CYGWIN 1) - set(UNIX 1) -endif() - -set(CMAKE_CXX_COMPILER_ENV_VAR "CXX") - -if(CMAKE_COMPILER_IS_MINGW) - set(MINGW 1) -endif() -set(CMAKE_CXX_COMPILER_ID_RUN 1) -set(CMAKE_CXX_SOURCE_FILE_EXTENSIONS C;M;c++;cc;cpp;cxx;m;mm;CPP) -set(CMAKE_CXX_IGNORE_EXTENSIONS inl;h;hpp;HPP;H;o;O;obj;OBJ;def;DEF;rc;RC) - -foreach (lang C OBJC OBJCXX) - if (CMAKE_${lang}_COMPILER_ID_RUN) - foreach(extension IN LISTS CMAKE_${lang}_SOURCE_FILE_EXTENSIONS) - list(REMOVE_ITEM CMAKE_CXX_SOURCE_FILE_EXTENSIONS ${extension}) - endforeach() - endif() -endforeach() - -set(CMAKE_CXX_LINKER_PREFERENCE 30) -set(CMAKE_CXX_LINKER_PREFERENCE_PROPAGATES 1) - -# Save compiler ABI information. -set(CMAKE_CXX_SIZEOF_DATA_PTR "8") -set(CMAKE_CXX_COMPILER_ABI "ELF") -set(CMAKE_CXX_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") - -if(CMAKE_CXX_SIZEOF_DATA_PTR) - set(CMAKE_SIZEOF_VOID_P "${CMAKE_CXX_SIZEOF_DATA_PTR}") -endif() - -if(CMAKE_CXX_COMPILER_ABI) - set(CMAKE_INTERNAL_PLATFORM_ABI "${CMAKE_CXX_COMPILER_ABI}") -endif() - -if(CMAKE_CXX_LIBRARY_ARCHITECTURE) - set(CMAKE_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") -endif() - -set(CMAKE_CXX_CL_SHOWINCLUDES_PREFIX "") -if(CMAKE_CXX_CL_SHOWINCLUDES_PREFIX) - set(CMAKE_CL_SHOWINCLUDES_PREFIX "${CMAKE_CXX_CL_SHOWINCLUDES_PREFIX}") -endif() - - - - - -set(CMAKE_CXX_IMPLICIT_INCLUDE_DIRECTORIES "/usr/include/c++/9;/usr/include/x86_64-linux-gnu/c++/9;/usr/include/c++/9/backward;/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include") -set(CMAKE_CXX_IMPLICIT_LINK_LIBRARIES "stdc++;m;gcc_s;gcc;c;gcc_s;gcc") -set(CMAKE_CXX_IMPLICIT_LINK_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib") -set(CMAKE_CXX_IMPLICIT_LINK_FRAMEWORK_DIRECTORIES "") diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin deleted file mode 100755 index ebea4b340830aee444aab660f7a351e9a05007f2..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 16552 zcmeHOeQXrR6`%9jaDchH5R+VihE1BN(A0}@!8H_@JD<;9w+2$M3l$&Rv+rylxew=V zkJyM1B&Vn+;ub}%phb-kRjWwJAI%^AR6h>6O(dkWAhnb>sp>#c-H0S6DV5s**Y{@T zop;w~MG95^=?>a^^M3O_X5Y*%Gv0YmM!MRoTrNh%%|6SJ3;G2TlnsL$WCci&HM7O= z`%$)n%>%xgW1>AM2(*fFsme+{5_bbdy#Q7!&=mp(528>Hk)qyQ<;Z-|LX^q-K)o7l zlDwVXkPe7ad)c3Y%1{*kTc(3jkEmG>V>4AR#{Cd0_bqE7PI-f=4&SRX#O|7!8w#(wv?y8YKqmBVloPg8<;^nn;o z?c@Fv@Qc|Nd^1~z?2I3&*#7sfcx3K z%pbHW4N08Y@aH)mU;!Jx2=E8svX?9X3fQ;Xc^dG$aO4!BLG$YruuGVi4c#U1xFGC+ z#Dj7|t&#W-fcjZrR{uXPC+k&M!;AbgyC;c`LkM<$IOh zXNrvPv<;t-IO*r{R+$l~3 zoCr7(a3bJDz=?npfe$+Z@A~fhk2ZSEqaCaH6Rd5uuM~}{(s^z4*Pe0SmD2h%0KZdu z=(|9CD;dfI_Y2OoG0v}jv$JqvpH{f6js9)wk?yXsnxn9U(#971IB7WxmP$*rpz_b- z+E~lCprVb{JcDGzw6PRiZ^b&eUQn9wtvrH`$0Y^%1eagmi)8g}tuUpXeQUFJcG|7E zUeYeyHtN8@L(+h!G|}%{3H>5{?C+5lY-ag~d$iG(Dy(XSt46JMtYscBldDUm(qs&N zUaGkTyKdKB(6#9Q<8f$2Lp`8Zc;cE?$WOc+xryC87P+RK)W(+n#tYH;QMKRq%c3iC zlhBuK=*_+3XeP9?Ypf*)JA%*`I|~;>J)MOcq3%%OW{);j9|L$t*Xmn1CX@Q@Qb{{| z%WbS&`>KpbSK*zm!dq>HzlTb7f7M3EUD}4f$+2sjaNBH%>8iGULUCjw3coCy4%M8IYF+Q?Yv*7j{1 zP2Y!hH#G0XP;fljo7fHK1rTs8cYg-I5#slf$+t_TA)wPhPXhH!l}h+s>pD>UPS$+A zR5}mzIiLagaRtAPVsRbZ&RoNO*Yeu=p5xGl_zJk516#OLXKnNOmzxKnx(==(z&YUc zw|fJh^DTPZbA)YPw(%36dXRqxMEyN*?IJm-V?mn+TpOTI{F_|F>pxl*UOewGI0hX4 zWWc@w*O#H4fBS3q`oCV)=?#3%9q}q-)e-Nir)%204M*o`-saKy9o}Ht+Z^&XguJU- zy-KS$(CYQKdOh$ZkFnR_`YPC=Z+yTy#fg9u0Ve`Z1e^#s5pW{lM8JuF69FdzA9@7n zd>oyJliRWKnYUW%5#MAnIOi?Oq&!#m5y{iJyXBInGi`W26bqfd!+jSPYQJ&2ltKQq zJTympq?58zKI2=BQj9GWgk6>t&wFAC2r_eCQu1^buPD#k;h9-1MQND&QRJvNJBwAa zcb~*b?!A)eFT{yM@I_YiU)qB&!euEuxAt&jgW9l8ZCowz_jl-qSrw>o<8Jty1D#JdTXDnbXF7jw z#jDw&igs$s^T;X>!I$&LiqB^>&#btI(Rf+$1?;pOM=QRtJfEyM%ue~-Sn*n>RKypv zhKjhioPS}p<74z3T5&L&nlw6^GNx73QCt z-NWelv&zptkB#l_3g@T=PH&qTEBKsMv+Jc9MAY!TRfXrbZSjN?7#u%s!|#_ky$6LA z#y$-dn6>3|-Sk|yb9{CjQqm5+SIN!@m!BO^{QFp?{=dNG{cM#26)4zmEOXuO4|&@X z7Q-8{l}h$EfuSnM60pyoajtv!tnvLl;4U~nPwxeC@jAz6kNX?a4*kDC^0#iZVUyXp{x%~;-x%yVX73zeEp5XZGdAJYoO6Tx1fLF>>H~@I1 zJcw^fc@{J|h3Xl=6)VKK7Xh!7k5B}>Qa-}(KnwE@?0FEUqDZD1- z?Rg5X1FlG2GkFhi{s&ewi1og#ku&me;;4_!q#Wo*O7Fv@gB&InWb}b#rZ<|@V@4*M z)1&!e)|W{QCF4dsrZzV;t*tD?lNt1AHX9v*6aynW!uqq(R9uhcQ>hV9F>yL3B3MMj zTcVG~!(nifNXE0F)=uaj&wYTuVS{e__RyAy9@*NaLwbW%8*>?Axr{y-O~)W%LT~%h z*3g#DuvLs_UjPJYJ9{8d*UHsg_7XQpylh(-|YK4y5zy zP&P9Z&l)2ps5hU0)T=~HLNI>yMs$F2@xf?rkg2heG`J8H(pY%Qfp|8T$fPZd4sF?Z zGKvaJo1}Tw3!R7 ze+g@Xidlb`T#pgO?=$9NUw(B$qgkKUb3_%hGSuz*I|2I_tfi^{w0|JFN9xmZ&EEeg zwBz1^^ve#Uqmvk1DA-4=l0NMVFkcOCne=HLN%S(bnTs@6h8}|&?iEO%)|*5hkdoAY zk|TN;+HvneJgrNKDpKFxe+jcOsNk)VKJACfR0@)R`~9DQcDyHQhyPSWk(Bm<5-o?9 z`0qf)tglEtqGXQbi6?r-rcdi;q9iw${_{5dpj06GJ==iU?Y(Hzr*#xj+9#8L`~3Z} z)Tj6}MM_GF&zHH_{r?IYv5TZn>w2P_%*s%=`+vozKdcA^qEmt`|I+vq@JFcNnp8ga z<$VI>)!OBWCwc{ReI|YS`@nQPfKW(Ia5FsNZ$kslJ@Q}Pcc?<6D8~=yKNixXIDQ{6 z6d`@upA_XnDF|)mLi$9fq0y|*f>OFcQ1TR)5cP-Ne~@%p?z=@_PTYHK#>p?q;_{sCoiL<3 Mn*~>EQ?Rk@zX|n&%K!iX diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin deleted file mode 100755 index ee268c0505df7bc55aab1046342c263205c720a2..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 16560 zcmeHOeQX>@6`%9j$)$1bE^PuP3C&VcVbgkJo5Wl~P3~-;y@tz26Puc*>Gte9+eh!K zcYD+>A&ulV$`K5uLTac)DJh^xMWXxxm5?ZoOcMzys1c$KlnT>O;i4pULW2xVa=bS) z@4UM{t13lEh#hP1&HK&!n0+(5p52}Ia5&Oc<#I79ZuV)0T+lC&plrx)krg087GNvj z_rq)*TLOGF$3%Nj5NH+UY?YOIB<==^dUaT-K-UQvJcvR)M2dQg6>X_#Arz1OG-Lx?oYfL86h0(^*Kx<>`CN-Z?TexfN7y7_C z)xD#Sftg9fWElBatdcyoCsv<&{$!x*C+~DU)A07TUq!xgbn14pfj&_N3+mI9ARc|7 z44(htJHK0_#2=|gY#AIrINHO%J^zJe9WVdv+~fPt#DATt-TK7xAAa`S61w09uQUQN<5xgI8Kl>o_2dzrF#F-6$ zlH+x(&W0}s{1!OuB?^E7_U(4Q1o%oEDMe_|eEJHoH!?5Ft`vA&5QY@-pqxM(CH@_t zepa`j{~wd`4bo1xl)qi#(-Oz=;sxf_AWoxJrt5>FQGFW!hZA`tp6lJ-k<6syz0rXrXvbqwBMK@=gb`qdQ<=21sDt`W zsK*j%y^xQ`%+|rU0T$8-4&?Ksj_xWt>yGracjzr@i@I5yl$fzDhJRK3SJd%W6v5Bm zehX_7Fnz1oi?W^Wk91#BWZdTDeUtEMIWC@{P$ZoAv)crY*9!SYWZHy_-U_)H6HeDI zw#=Gvnlp&cnQ-!rxKo@6I1z9n;6%WQfD-{H0{<%!_?z$Me`@3BJ=&3)-@#f}dvwyM zD!rtQ|I#zXPocE=7{HfHw>|^Jx1OOqa6jid$r>0+W4PmclAalY7W8D zOPg5X_&;tUA$@9SNcF9M1pCLw2S*b9@^LPYEN^yxoCr7(a3bJDz=?np0Ve`Z1e^#s5pW{l zMBx7<0{FegTzYnN?cAD&?@^f{J(e|cdz%9Lu$|-4fy7?eFMxn+t@~5>%@Dt{%)C`9 zWr5BCJqpw_TPorAzDq!#0~)wgD!l~sIM6!zQ3k(_VsSmRo4H2)uC=vGJ&!>f;_Kiz z4z}<~opmndUwk$|brT#}z&YUccX{hR<6Hiq=OEj*X6wg4vEddJNBw)?=qEV@p`c9z zjxEq9{*5l|^&hJ0Sh3^)I0hVE8L)4{aUZnvZ-HH2|JSQ}ymeo5hrP-~b=X_~)tXLk z)1f7rH!!}m+Z#-K10ioy$Xnm;RocCE?OuPo*Mnag*&pCI40g)j{D60g69FdzP6V6? zI1z9n;6%WQfD-{H0!{?}+Yz9Bb+nI8K8}_5%GFYb_(K+hecqzX$o+U9l05C#TPu0m z3y1qfvCzIfeD1Wt5V-LP)HjEWsAB=ZE9>TaIX14OOx8PNo{Em_`5rF z!>p>SaN=%w=Ro_@%~ss7`$<|U&d&h zt@sV)`DDdmcFOCPtMAY4|^O^S7n_Jzm!+Er# z{7sCmYpeXK^7U-R;p(d}|J>{Yi6E&{GdT{H2(YhwO_)eK^NFlXeA z0_->%Wb>&Bx{=ZcF*zZR83`GEIGGuUCiR$+$>sHEVU!JKQrTqOh{x1GQ)_c&A)fT0 zM{~L88001xxiL1Bi>BgwtdL5Lfr^RKF@wP(+Oa))f4rl=zXKd4lJQ)qy+<9)W|@9> zq`5Vb9?IyZm)wX3I0$dJ!E)E`(Dtw%-qEQ;)`ZnIrbxu{8GR(0j$ztG=jV5Xw)b>c z#dr<}K#)Z_xByEu4?#RyeP(e+#vP?~9jJP_SE~wdDCL7Ng zVzkbpd_L`*_3l#NDom~ruuXnusLv9UC`5Y)(tmM_M0`9vmdVRUHA#gkD~U@A|0 zQL{;d;g33;fr=3ygrP|Cuy$24nKCSDBDmHn${$0@icUV(X|LHk`=q{-*m*3@eJeiF`1)m{E zpVo;)4`OhkU>~tc=TFZE3Bd4_NuSn}MCmyNM0kfh$1OH4@#8#qB_!V z!(rA}q#jW+M>@n4J!aFV^)peDTTK61n|@F#5dFSw!0h&ZY}2Q86H$6zCja*N`@Gbr z_%lUHN{ZK)x!C>x0vfT4q)+R6qIZ~;p>Fqo+NM9M2nC|Ef-V2j_!IC7RB#PSk7M+_ zK>4+HdE$wl16`ja(J0EkKP zGEVxpl@U=PeKV!GV-^jPL3v^0b=(XG^@r|%_`ZbtZqb($cZ1D1`6bzvi|EG!LZa5D IU}M?802n@gkpKVy diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeSystem.cmake b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeSystem.cmake deleted file mode 100644 index 15b4419..0000000 --- a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CMakeSystem.cmake +++ /dev/null @@ -1,15 +0,0 @@ -set(CMAKE_HOST_SYSTEM "Linux-5.15.0-69-generic") -set(CMAKE_HOST_SYSTEM_NAME "Linux") -set(CMAKE_HOST_SYSTEM_VERSION "5.15.0-69-generic") -set(CMAKE_HOST_SYSTEM_PROCESSOR "x86_64") - - - -set(CMAKE_SYSTEM "Linux-5.15.0-69-generic") -set(CMAKE_SYSTEM_NAME "Linux") -set(CMAKE_SYSTEM_VERSION "5.15.0-69-generic") -set(CMAKE_SYSTEM_PROCESSOR "x86_64") - -set(CMAKE_CROSSCOMPILING "FALSE") - -set(CMAKE_SYSTEM_LOADED 1) diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c deleted file mode 100644 index d884b50..0000000 --- a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c +++ /dev/null @@ -1,671 +0,0 @@ -#ifdef __cplusplus -# error "A C++ compiler has been selected for C." -#endif - -#if defined(__18CXX) -# define ID_VOID_MAIN -#endif -#if defined(__CLASSIC_C__) -/* cv-qualifiers did not exist in K&R C */ -# define const -# define volatile -#endif - - -/* Version number components: V=Version, R=Revision, P=Patch - Version date components: YYYY=Year, MM=Month, DD=Day */ - -#if defined(__INTEL_COMPILER) || defined(__ICC) -# define COMPILER_ID "Intel" -# if defined(_MSC_VER) -# define SIMULATE_ID "MSVC" -# endif -# if defined(__GNUC__) -# define SIMULATE_ID "GNU" -# endif - /* __INTEL_COMPILER = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER/100) -# define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER/10 % 10) -# if defined(__INTEL_COMPILER_UPDATE) -# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER_UPDATE) -# else -# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER % 10) -# endif -# if defined(__INTEL_COMPILER_BUILD_DATE) - /* __INTEL_COMPILER_BUILD_DATE = YYYYMMDD */ -# define COMPILER_VERSION_TWEAK DEC(__INTEL_COMPILER_BUILD_DATE) -# endif -# if defined(_MSC_VER) - /* _MSC_VER = VVRR */ -# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) -# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) -# endif -# if defined(__GNUC__) -# define SIMULATE_VERSION_MAJOR DEC(__GNUC__) -# elif defined(__GNUG__) -# define SIMULATE_VERSION_MAJOR DEC(__GNUG__) -# endif -# if defined(__GNUC_MINOR__) -# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__) -# endif -# if defined(__GNUC_PATCHLEVEL__) -# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) -# endif - -#elif defined(__PATHCC__) -# define COMPILER_ID "PathScale" -# define COMPILER_VERSION_MAJOR DEC(__PATHCC__) -# define COMPILER_VERSION_MINOR DEC(__PATHCC_MINOR__) -# if defined(__PATHCC_PATCHLEVEL__) -# define COMPILER_VERSION_PATCH DEC(__PATHCC_PATCHLEVEL__) -# endif - -#elif defined(__BORLANDC__) && defined(__CODEGEARC_VERSION__) -# define COMPILER_ID "Embarcadero" -# define COMPILER_VERSION_MAJOR HEX(__CODEGEARC_VERSION__>>24 & 0x00FF) -# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF) -# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF) - -#elif defined(__BORLANDC__) -# define COMPILER_ID "Borland" - /* __BORLANDC__ = 0xVRR */ -# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8) -# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF) - -#elif defined(__WATCOMC__) && __WATCOMC__ < 1200 -# define COMPILER_ID "Watcom" - /* __WATCOMC__ = VVRR */ -# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100) -# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) -# if (__WATCOMC__ % 10) > 0 -# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) -# endif - -#elif defined(__WATCOMC__) -# define COMPILER_ID "OpenWatcom" - /* __WATCOMC__ = VVRP + 1100 */ -# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100) -# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) -# if (__WATCOMC__ % 10) > 0 -# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) -# endif - -#elif defined(__SUNPRO_C) -# define COMPILER_ID "SunPro" -# if __SUNPRO_C >= 0x5100 - /* __SUNPRO_C = 0xVRRP */ -# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>12) -# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xFF) -# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF) -# else - /* __SUNPRO_CC = 0xVRP */ -# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>8) -# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xF) -# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF) -# endif - -#elif defined(__HP_cc) -# define COMPILER_ID "HP" - /* __HP_cc = VVRRPP */ -# define COMPILER_VERSION_MAJOR DEC(__HP_cc/10000) -# define COMPILER_VERSION_MINOR DEC(__HP_cc/100 % 100) -# define COMPILER_VERSION_PATCH DEC(__HP_cc % 100) - -#elif defined(__DECC) -# define COMPILER_ID "Compaq" - /* __DECC_VER = VVRRTPPPP */ -# define COMPILER_VERSION_MAJOR DEC(__DECC_VER/10000000) -# define COMPILER_VERSION_MINOR DEC(__DECC_VER/100000 % 100) -# define COMPILER_VERSION_PATCH DEC(__DECC_VER % 10000) - -#elif defined(__IBMC__) && defined(__COMPILER_VER__) -# define COMPILER_ID "zOS" - /* __IBMC__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) - -#elif defined(__ibmxl__) && defined(__clang__) -# define COMPILER_ID "XLClang" -# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__) -# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__) -# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__) -# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__) - - -#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ >= 800 -# define COMPILER_ID "XL" - /* __IBMC__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) - -#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ < 800 -# define COMPILER_ID "VisualAge" - /* __IBMC__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) - -#elif defined(__PGI) -# define COMPILER_ID "PGI" -# define COMPILER_VERSION_MAJOR DEC(__PGIC__) -# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__) -# if defined(__PGIC_PATCHLEVEL__) -# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__) -# endif - -#elif defined(_CRAYC) -# define COMPILER_ID "Cray" -# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR) -# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR) - -#elif defined(__TI_COMPILER_VERSION__) -# define COMPILER_ID "TI" - /* __TI_COMPILER_VERSION__ = VVVRRRPPP */ -# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000) -# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000) -# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000) - -#elif defined(__FUJITSU) || defined(__FCC_VERSION) || defined(__fcc_version) -# define COMPILER_ID "Fujitsu" - -#elif defined(__ghs__) -# define COMPILER_ID "GHS" -/* __GHS_VERSION_NUMBER = VVVVRP */ -# ifdef __GHS_VERSION_NUMBER -# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100) -# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10) -# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10) -# endif - -#elif defined(__TINYC__) -# define COMPILER_ID "TinyCC" - -#elif defined(__BCC__) -# define COMPILER_ID "Bruce" - -#elif defined(__SCO_VERSION__) -# define COMPILER_ID "SCO" - -#elif defined(__ARMCC_VERSION) && !defined(__clang__) -# define COMPILER_ID "ARMCC" -#if __ARMCC_VERSION >= 1000000 - /* __ARMCC_VERSION = VRRPPPP */ - # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000) - # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100) - # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) -#else - /* __ARMCC_VERSION = VRPPPP */ - # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000) - # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10) - # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) -#endif - - -#elif defined(__clang__) && defined(__apple_build_version__) -# define COMPILER_ID "AppleClang" -# if defined(_MSC_VER) -# define SIMULATE_ID "MSVC" -# endif -# define COMPILER_VERSION_MAJOR DEC(__clang_major__) -# define COMPILER_VERSION_MINOR DEC(__clang_minor__) -# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) -# if defined(_MSC_VER) - /* _MSC_VER = VVRR */ -# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) -# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) -# endif -# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__) - -#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION) -# define COMPILER_ID "ARMClang" - # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000) - # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100) - # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION % 10000) -# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION) - -#elif defined(__clang__) -# define COMPILER_ID "Clang" -# if defined(_MSC_VER) -# define SIMULATE_ID "MSVC" -# endif -# define COMPILER_VERSION_MAJOR DEC(__clang_major__) -# define COMPILER_VERSION_MINOR DEC(__clang_minor__) -# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) -# if defined(_MSC_VER) - /* _MSC_VER = VVRR */ -# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) -# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) -# endif - -#elif defined(__GNUC__) -# define COMPILER_ID "GNU" -# define COMPILER_VERSION_MAJOR DEC(__GNUC__) -# if defined(__GNUC_MINOR__) -# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__) -# endif -# if defined(__GNUC_PATCHLEVEL__) -# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) -# endif - -#elif defined(_MSC_VER) -# define COMPILER_ID "MSVC" - /* _MSC_VER = VVRR */ -# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100) -# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100) -# if defined(_MSC_FULL_VER) -# if _MSC_VER >= 1400 - /* _MSC_FULL_VER = VVRRPPPPP */ -# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000) -# else - /* _MSC_FULL_VER = VVRRPPPP */ -# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000) -# endif -# endif -# if defined(_MSC_BUILD) -# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD) -# endif - -#elif defined(__VISUALDSPVERSION__) || defined(__ADSPBLACKFIN__) || defined(__ADSPTS__) || defined(__ADSP21000__) -# define COMPILER_ID "ADSP" -#if defined(__VISUALDSPVERSION__) - /* __VISUALDSPVERSION__ = 0xVVRRPP00 */ -# define COMPILER_VERSION_MAJOR HEX(__VISUALDSPVERSION__>>24) -# define COMPILER_VERSION_MINOR HEX(__VISUALDSPVERSION__>>16 & 0xFF) -# define COMPILER_VERSION_PATCH HEX(__VISUALDSPVERSION__>>8 & 0xFF) -#endif - -#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) -# define COMPILER_ID "IAR" -# if defined(__VER__) && defined(__ICCARM__) -# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000) -# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000) -# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000) -# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) -# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__)) -# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100) -# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100)) -# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__) -# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) -# endif - -#elif defined(__SDCC_VERSION_MAJOR) || defined(SDCC) -# define COMPILER_ID "SDCC" -# if defined(__SDCC_VERSION_MAJOR) -# define COMPILER_VERSION_MAJOR DEC(__SDCC_VERSION_MAJOR) -# define COMPILER_VERSION_MINOR DEC(__SDCC_VERSION_MINOR) -# define COMPILER_VERSION_PATCH DEC(__SDCC_VERSION_PATCH) -# else - /* SDCC = VRP */ -# define COMPILER_VERSION_MAJOR DEC(SDCC/100) -# define COMPILER_VERSION_MINOR DEC(SDCC/10 % 10) -# define COMPILER_VERSION_PATCH DEC(SDCC % 10) -# endif - - -/* These compilers are either not known or too old to define an - identification macro. Try to identify the platform and guess that - it is the native compiler. */ -#elif defined(__hpux) || defined(__hpua) -# define COMPILER_ID "HP" - -#else /* unknown compiler */ -# define COMPILER_ID "" -#endif - -/* Construct the string literal in pieces to prevent the source from - getting matched. Store it in a pointer rather than an array - because some compilers will just produce instructions to fill the - array rather than assigning a pointer to a static array. */ -char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; -#ifdef SIMULATE_ID -char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; -#endif - -#ifdef __QNXNTO__ -char const* qnxnto = "INFO" ":" "qnxnto[]"; -#endif - -#if defined(__CRAYXE) || defined(__CRAYXC) -char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; -#endif - -#define STRINGIFY_HELPER(X) #X -#define STRINGIFY(X) STRINGIFY_HELPER(X) - -/* Identify known platforms by name. */ -#if defined(__linux) || defined(__linux__) || defined(linux) -# define PLATFORM_ID "Linux" - -#elif defined(__CYGWIN__) -# define PLATFORM_ID "Cygwin" - -#elif defined(__MINGW32__) -# define PLATFORM_ID "MinGW" - -#elif defined(__APPLE__) -# define PLATFORM_ID "Darwin" - -#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) -# define PLATFORM_ID "Windows" - -#elif defined(__FreeBSD__) || defined(__FreeBSD) -# define PLATFORM_ID "FreeBSD" - -#elif defined(__NetBSD__) || defined(__NetBSD) -# define PLATFORM_ID "NetBSD" - -#elif defined(__OpenBSD__) || defined(__OPENBSD) -# define PLATFORM_ID "OpenBSD" - -#elif defined(__sun) || defined(sun) -# define PLATFORM_ID "SunOS" - -#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) -# define PLATFORM_ID "AIX" - -#elif defined(__hpux) || defined(__hpux__) -# define PLATFORM_ID "HP-UX" - -#elif defined(__HAIKU__) -# define PLATFORM_ID "Haiku" - -#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) -# define PLATFORM_ID "BeOS" - -#elif defined(__QNX__) || defined(__QNXNTO__) -# define PLATFORM_ID "QNX" - -#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) -# define PLATFORM_ID "Tru64" - -#elif defined(__riscos) || defined(__riscos__) -# define PLATFORM_ID "RISCos" - -#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) -# define PLATFORM_ID "SINIX" - -#elif defined(__UNIX_SV__) -# define PLATFORM_ID "UNIX_SV" - -#elif defined(__bsdos__) -# define PLATFORM_ID "BSDOS" - -#elif defined(_MPRAS) || defined(MPRAS) -# define PLATFORM_ID "MP-RAS" - -#elif defined(__osf) || defined(__osf__) -# define PLATFORM_ID "OSF1" - -#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) -# define PLATFORM_ID "SCO_SV" - -#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) -# define PLATFORM_ID "ULTRIX" - -#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) -# define PLATFORM_ID "Xenix" - -#elif defined(__WATCOMC__) -# if defined(__LINUX__) -# define PLATFORM_ID "Linux" - -# elif defined(__DOS__) -# define PLATFORM_ID "DOS" - -# elif defined(__OS2__) -# define PLATFORM_ID "OS2" - -# elif defined(__WINDOWS__) -# define PLATFORM_ID "Windows3x" - -# else /* unknown platform */ -# define PLATFORM_ID -# endif - -#elif defined(__INTEGRITY) -# if defined(INT_178B) -# define PLATFORM_ID "Integrity178" - -# else /* regular Integrity */ -# define PLATFORM_ID "Integrity" -# endif - -#else /* unknown platform */ -# define PLATFORM_ID - -#endif - -/* For windows compilers MSVC and Intel we can determine - the architecture of the compiler being used. This is because - the compilers do not have flags that can change the architecture, - but rather depend on which compiler is being used -*/ -#if defined(_WIN32) && defined(_MSC_VER) -# if defined(_M_IA64) -# define ARCHITECTURE_ID "IA64" - -# elif defined(_M_X64) || defined(_M_AMD64) -# define ARCHITECTURE_ID "x64" - -# elif defined(_M_IX86) -# define ARCHITECTURE_ID "X86" - -# elif defined(_M_ARM64) -# define ARCHITECTURE_ID "ARM64" - -# elif defined(_M_ARM) -# if _M_ARM == 4 -# define ARCHITECTURE_ID "ARMV4I" -# elif _M_ARM == 5 -# define ARCHITECTURE_ID "ARMV5I" -# else -# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) -# endif - -# elif defined(_M_MIPS) -# define ARCHITECTURE_ID "MIPS" - -# elif defined(_M_SH) -# define ARCHITECTURE_ID "SHx" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__WATCOMC__) -# if defined(_M_I86) -# define ARCHITECTURE_ID "I86" - -# elif defined(_M_IX86) -# define ARCHITECTURE_ID "X86" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) -# if defined(__ICCARM__) -# define ARCHITECTURE_ID "ARM" - -# elif defined(__ICCRX__) -# define ARCHITECTURE_ID "RX" - -# elif defined(__ICCRH850__) -# define ARCHITECTURE_ID "RH850" - -# elif defined(__ICCRL78__) -# define ARCHITECTURE_ID "RL78" - -# elif defined(__ICCRISCV__) -# define ARCHITECTURE_ID "RISCV" - -# elif defined(__ICCAVR__) -# define ARCHITECTURE_ID "AVR" - -# elif defined(__ICC430__) -# define ARCHITECTURE_ID "MSP430" - -# elif defined(__ICCV850__) -# define ARCHITECTURE_ID "V850" - -# elif defined(__ICC8051__) -# define ARCHITECTURE_ID "8051" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__ghs__) -# if defined(__PPC64__) -# define ARCHITECTURE_ID "PPC64" - -# elif defined(__ppc__) -# define ARCHITECTURE_ID "PPC" - -# elif defined(__ARM__) -# define ARCHITECTURE_ID "ARM" - -# elif defined(__x86_64__) -# define ARCHITECTURE_ID "x64" - -# elif defined(__i386__) -# define ARCHITECTURE_ID "X86" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif -#else -# define ARCHITECTURE_ID -#endif - -/* Convert integer to decimal digit literals. */ -#define DEC(n) \ - ('0' + (((n) / 10000000)%10)), \ - ('0' + (((n) / 1000000)%10)), \ - ('0' + (((n) / 100000)%10)), \ - ('0' + (((n) / 10000)%10)), \ - ('0' + (((n) / 1000)%10)), \ - ('0' + (((n) / 100)%10)), \ - ('0' + (((n) / 10)%10)), \ - ('0' + ((n) % 10)) - -/* Convert integer to hex digit literals. */ -#define HEX(n) \ - ('0' + ((n)>>28 & 0xF)), \ - ('0' + ((n)>>24 & 0xF)), \ - ('0' + ((n)>>20 & 0xF)), \ - ('0' + ((n)>>16 & 0xF)), \ - ('0' + ((n)>>12 & 0xF)), \ - ('0' + ((n)>>8 & 0xF)), \ - ('0' + ((n)>>4 & 0xF)), \ - ('0' + ((n) & 0xF)) - -/* Construct a string literal encoding the version number components. */ -#ifdef COMPILER_VERSION_MAJOR -char const info_version[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', - COMPILER_VERSION_MAJOR, -# ifdef COMPILER_VERSION_MINOR - '.', COMPILER_VERSION_MINOR, -# ifdef COMPILER_VERSION_PATCH - '.', COMPILER_VERSION_PATCH, -# ifdef COMPILER_VERSION_TWEAK - '.', COMPILER_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct a string literal encoding the internal version number. */ -#ifdef COMPILER_VERSION_INTERNAL -char const info_version_internal[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', - 'i','n','t','e','r','n','a','l','[', - COMPILER_VERSION_INTERNAL,']','\0'}; -#endif - -/* Construct a string literal encoding the version number components. */ -#ifdef SIMULATE_VERSION_MAJOR -char const info_simulate_version[] = { - 'I', 'N', 'F', 'O', ':', - 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', - SIMULATE_VERSION_MAJOR, -# ifdef SIMULATE_VERSION_MINOR - '.', SIMULATE_VERSION_MINOR, -# ifdef SIMULATE_VERSION_PATCH - '.', SIMULATE_VERSION_PATCH, -# ifdef SIMULATE_VERSION_TWEAK - '.', SIMULATE_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct the string literal in pieces to prevent the source from - getting matched. Store it in a pointer rather than an array - because some compilers will just produce instructions to fill the - array rather than assigning a pointer to a static array. */ -char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; -char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; - - - - -#if !defined(__STDC__) -# if (defined(_MSC_VER) && !defined(__clang__)) \ - || (defined(__ibmxl__) || defined(__IBMC__)) -# define C_DIALECT "90" -# else -# define C_DIALECT -# endif -#elif __STDC_VERSION__ >= 201000L -# define C_DIALECT "11" -#elif __STDC_VERSION__ >= 199901L -# define C_DIALECT "99" -#else -# define C_DIALECT "90" -#endif -const char* info_language_dialect_default = - "INFO" ":" "dialect_default[" C_DIALECT "]"; - -/*--------------------------------------------------------------------------*/ - -#ifdef ID_VOID_MAIN -void main() {} -#else -# if defined(__CLASSIC_C__) -int main(argc, argv) int argc; char *argv[]; -# else -int main(int argc, char* argv[]) -# endif -{ - int require = 0; - require += info_compiler[argc]; - require += info_platform[argc]; - require += info_arch[argc]; -#ifdef COMPILER_VERSION_MAJOR - require += info_version[argc]; -#endif -#ifdef COMPILER_VERSION_INTERNAL - require += info_version_internal[argc]; -#endif -#ifdef SIMULATE_ID - require += info_simulate[argc]; -#endif -#ifdef SIMULATE_VERSION_MAJOR - require += info_simulate_version[argc]; -#endif -#if defined(__CRAYXE) || defined(__CRAYXC) - require += info_cray[argc]; -#endif - require += info_language_dialect_default[argc]; - (void)argv; - return require; -} -#endif diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdC/a.out b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdC/a.out deleted file mode 100755 index b5c91a373fc518990e2aec59df62ee3a3ddb612a..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 16712 zcmeHOeQX>@6`%9jiPI)$Cv}LMwDpn?$)WY-Y!c(7HNCTa&K|OpHnC}t>n>~G**>@r zbGJwBij+Xo!VwGsB2oT8ii!jX!XM?2ejovkLJO?`H3Eg8f=GcDgF@<-2Dy;tcyH#t z^X~dwB+4HM?MSz8=J!7L&FtRJ?##!deZ5sapWxyb?-kez*DEAUjM_a^0TLD+VhtQ` z7B`6%(5{x4;)fLht|}L*oV1p3KTy!ESR#tyFrh- zmL%Sqa5o{P%rC01oB}dwK?nuR3QprqVs%5I9y`_C;FrN*!Nyiu$`oJ-@ zci*4@GqZ?M8f9NJP#gI#?vB2&W!v2^9*Cd%;uyqyi0l>5h_~4OYn4tZP@HYQhLc5kED`TFGRLR+gC3v}Hwevu5+ zh83T2Zr8hTO;d7>E<8uL=E6Tkc(V)t65$u_6tdu0!1Lj9(T4LmBX7=z^Vmdu-iGrv zhWLUFm-kBqz2arS%Yc^wF9Ti%ybO35@G|g!lYzh0-SQ9p=%rfyc+IbO2%$eTYgLt= z*N^_F_N+X|(ym7Veyz0aYe4Fn1j<9}`?A#|WV`jRvEsS=^y2UJqko*gYoKqY<~%%_ z>N9H$NjlGfrPBHwsJwncpXq!GD*8;#caiK~u-1d?eOL$At4bH^nvS63vqV9@DCKv3 z63O;!dU0MqbNNpF%z|I{J)@tyW;K9;ZDgRfbaAY%3F2aXjQ2=q6xgD0>!5zLvkI$v z@g-}ue!O!9H0HLKN~O6t9G!cp+V3q9=@a(3m1PJy^3M#$Jajx zGxg)qOZp?a@A&H)6xL&!M^QpVjs`dT`QIJGjIB>rq&lIzkS8m z`ihr(ihqif8h)oAJ?qnV|F-ZK?Ej(R$i0!_$bAvx?ATbauIU(_uk3Fe8R%DzoAOAJ zZ13P@z{`M_0WSky2D}V-8SpaTWx&gTmjN#W|Dzf3IleY74KlW`cmJNzYmBgqeM;wPnCk%@~Wnp`_usqR!mQ=hTE>+;v94Tb1 zg0?#d6Z@9df^4-u*cJ+gb_UzFEBxOF5J?OZ>s44D0PrrCa`TBIq zZ-5sfc0|?vaJ7dj;(Rw+)WPepTD)3XL{ts$YgHm3CSCc2^%fF8<-*@dINv9g6(QaO z6&SVUc+ek~UikUoZ4lr0BnSswoR5C_zRUPDRD5D-J|6+RQvA!E*SDpeb>f#8u&Y$E z^OTgiVM(0N0q(=QsjI(!LGpaRXBRKa%F^-khP1P^e;;FyP5+INs3Lr(*(hw;`CX3L6>lYE%Q?G9o;LH6rO zp8xNj1|03UucLEhXFK_o?<&C-uHae=`D}LCc^z>$U$-6TT%m!UyKDq}vm1nVJK&g~ zu%?)8B-1VN4MGbmfa4dVIV*1!U?tM1Slk|BSZQMvH;Ck6b4WaEjHj|AX3B_L*<9W* z3sVB$T&EINA|C7rwYOFl!mTMu!_4K(X(N%ba?@fgXQmTIypT>$gNm(XfTZOR?d~@} zoapYR7v!-xgl8DN2O|AZBf780fL$t1owzW1KCmy+AM18<CYsTFK}P@9+h!7R(=u6Qao~q% z7tC=;xbvMqh{N_DP9yFMs<_$5xxL7FQqn$slu)tYHwGbs`RTM}jsUfCicWAXnSpIb zlOmYOT8ZFzrVyOWWhWCkYuW~l6q2wpEEy*#(iLm5%yA*bC(QhW2*#%~;6hO=r#Kvk z6r+X#yj&t>qJjv@lm#bKmcT=BJPQ>oF$G5)q9B=-JsC_)(4d@%gFd&Ez8alMgX>`2 zOeaSn92^Ki=mZgjPD#UPr_1hb6PyRYtpRTXvhZ^qQ=SJ9Tgq}B=@$6mGcxP*^B+?U zc=l4hFA&%c)UJPso(Gw3wJSrN@5cAVx$y8%OqHg_r0RKBY>vQ}(zhTP$@!J&^ zcl;(`IJaSap8qgCfl5&D95K(V&-0cfV0g-`&(E<;dHw_Dy(m(Ja+7&A0&f1UD$XX-v&R9hwp!@0OQ#0`rpJq1}Ob5>24 & 0x00FF) -# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF) -# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF) - -#elif defined(__BORLANDC__) -# define COMPILER_ID "Borland" - /* __BORLANDC__ = 0xVRR */ -# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8) -# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF) - -#elif defined(__WATCOMC__) && __WATCOMC__ < 1200 -# define COMPILER_ID "Watcom" - /* __WATCOMC__ = VVRR */ -# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100) -# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) -# if (__WATCOMC__ % 10) > 0 -# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) -# endif - -#elif defined(__WATCOMC__) -# define COMPILER_ID "OpenWatcom" - /* __WATCOMC__ = VVRP + 1100 */ -# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100) -# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) -# if (__WATCOMC__ % 10) > 0 -# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) -# endif - -#elif defined(__SUNPRO_CC) -# define COMPILER_ID "SunPro" -# if __SUNPRO_CC >= 0x5100 - /* __SUNPRO_CC = 0xVRRP */ -# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>12) -# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xFF) -# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) -# else - /* __SUNPRO_CC = 0xVRP */ -# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>8) -# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xF) -# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) -# endif - -#elif defined(__HP_aCC) -# define COMPILER_ID "HP" - /* __HP_aCC = VVRRPP */ -# define COMPILER_VERSION_MAJOR DEC(__HP_aCC/10000) -# define COMPILER_VERSION_MINOR DEC(__HP_aCC/100 % 100) -# define COMPILER_VERSION_PATCH DEC(__HP_aCC % 100) - -#elif defined(__DECCXX) -# define COMPILER_ID "Compaq" - /* __DECCXX_VER = VVRRTPPPP */ -# define COMPILER_VERSION_MAJOR DEC(__DECCXX_VER/10000000) -# define COMPILER_VERSION_MINOR DEC(__DECCXX_VER/100000 % 100) -# define COMPILER_VERSION_PATCH DEC(__DECCXX_VER % 10000) - -#elif defined(__IBMCPP__) && defined(__COMPILER_VER__) -# define COMPILER_ID "zOS" - /* __IBMCPP__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) - -#elif defined(__ibmxl__) && defined(__clang__) -# define COMPILER_ID "XLClang" -# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__) -# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__) -# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__) -# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__) - - -#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ >= 800 -# define COMPILER_ID "XL" - /* __IBMCPP__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) - -#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ < 800 -# define COMPILER_ID "VisualAge" - /* __IBMCPP__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) - -#elif defined(__PGI) -# define COMPILER_ID "PGI" -# define COMPILER_VERSION_MAJOR DEC(__PGIC__) -# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__) -# if defined(__PGIC_PATCHLEVEL__) -# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__) -# endif - -#elif defined(_CRAYC) -# define COMPILER_ID "Cray" -# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR) -# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR) - -#elif defined(__TI_COMPILER_VERSION__) -# define COMPILER_ID "TI" - /* __TI_COMPILER_VERSION__ = VVVRRRPPP */ -# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000) -# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000) -# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000) - -#elif defined(__FUJITSU) || defined(__FCC_VERSION) || defined(__fcc_version) -# define COMPILER_ID "Fujitsu" - -#elif defined(__ghs__) -# define COMPILER_ID "GHS" -/* __GHS_VERSION_NUMBER = VVVVRP */ -# ifdef __GHS_VERSION_NUMBER -# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100) -# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10) -# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10) -# endif - -#elif defined(__SCO_VERSION__) -# define COMPILER_ID "SCO" - -#elif defined(__ARMCC_VERSION) && !defined(__clang__) -# define COMPILER_ID "ARMCC" -#if __ARMCC_VERSION >= 1000000 - /* __ARMCC_VERSION = VRRPPPP */ - # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000) - # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100) - # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) -#else - /* __ARMCC_VERSION = VRPPPP */ - # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000) - # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10) - # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) -#endif - - -#elif defined(__clang__) && defined(__apple_build_version__) -# define COMPILER_ID "AppleClang" -# if defined(_MSC_VER) -# define SIMULATE_ID "MSVC" -# endif -# define COMPILER_VERSION_MAJOR DEC(__clang_major__) -# define COMPILER_VERSION_MINOR DEC(__clang_minor__) -# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) -# if defined(_MSC_VER) - /* _MSC_VER = VVRR */ -# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) -# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) -# endif -# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__) - -#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION) -# define COMPILER_ID "ARMClang" - # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000) - # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100) - # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION % 10000) -# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION) - -#elif defined(__clang__) -# define COMPILER_ID "Clang" -# if defined(_MSC_VER) -# define SIMULATE_ID "MSVC" -# endif -# define COMPILER_VERSION_MAJOR DEC(__clang_major__) -# define COMPILER_VERSION_MINOR DEC(__clang_minor__) -# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) -# if defined(_MSC_VER) - /* _MSC_VER = VVRR */ -# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) -# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) -# endif - -#elif defined(__GNUC__) || defined(__GNUG__) -# define COMPILER_ID "GNU" -# if defined(__GNUC__) -# define COMPILER_VERSION_MAJOR DEC(__GNUC__) -# else -# define COMPILER_VERSION_MAJOR DEC(__GNUG__) -# endif -# if defined(__GNUC_MINOR__) -# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__) -# endif -# if defined(__GNUC_PATCHLEVEL__) -# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) -# endif - -#elif defined(_MSC_VER) -# define COMPILER_ID "MSVC" - /* _MSC_VER = VVRR */ -# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100) -# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100) -# if defined(_MSC_FULL_VER) -# if _MSC_VER >= 1400 - /* _MSC_FULL_VER = VVRRPPPPP */ -# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000) -# else - /* _MSC_FULL_VER = VVRRPPPP */ -# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000) -# endif -# endif -# if defined(_MSC_BUILD) -# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD) -# endif - -#elif defined(__VISUALDSPVERSION__) || defined(__ADSPBLACKFIN__) || defined(__ADSPTS__) || defined(__ADSP21000__) -# define COMPILER_ID "ADSP" -#if defined(__VISUALDSPVERSION__) - /* __VISUALDSPVERSION__ = 0xVVRRPP00 */ -# define COMPILER_VERSION_MAJOR HEX(__VISUALDSPVERSION__>>24) -# define COMPILER_VERSION_MINOR HEX(__VISUALDSPVERSION__>>16 & 0xFF) -# define COMPILER_VERSION_PATCH HEX(__VISUALDSPVERSION__>>8 & 0xFF) -#endif - -#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) -# define COMPILER_ID "IAR" -# if defined(__VER__) && defined(__ICCARM__) -# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000) -# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000) -# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000) -# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) -# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__)) -# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100) -# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100)) -# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__) -# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) -# endif - - -/* These compilers are either not known or too old to define an - identification macro. Try to identify the platform and guess that - it is the native compiler. */ -#elif defined(__hpux) || defined(__hpua) -# define COMPILER_ID "HP" - -#else /* unknown compiler */ -# define COMPILER_ID "" -#endif - -/* Construct the string literal in pieces to prevent the source from - getting matched. Store it in a pointer rather than an array - because some compilers will just produce instructions to fill the - array rather than assigning a pointer to a static array. */ -char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; -#ifdef SIMULATE_ID -char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; -#endif - -#ifdef __QNXNTO__ -char const* qnxnto = "INFO" ":" "qnxnto[]"; -#endif - -#if defined(__CRAYXE) || defined(__CRAYXC) -char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; -#endif - -#define STRINGIFY_HELPER(X) #X -#define STRINGIFY(X) STRINGIFY_HELPER(X) - -/* Identify known platforms by name. */ -#if defined(__linux) || defined(__linux__) || defined(linux) -# define PLATFORM_ID "Linux" - -#elif defined(__CYGWIN__) -# define PLATFORM_ID "Cygwin" - -#elif defined(__MINGW32__) -# define PLATFORM_ID "MinGW" - -#elif defined(__APPLE__) -# define PLATFORM_ID "Darwin" - -#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) -# define PLATFORM_ID "Windows" - -#elif defined(__FreeBSD__) || defined(__FreeBSD) -# define PLATFORM_ID "FreeBSD" - -#elif defined(__NetBSD__) || defined(__NetBSD) -# define PLATFORM_ID "NetBSD" - -#elif defined(__OpenBSD__) || defined(__OPENBSD) -# define PLATFORM_ID "OpenBSD" - -#elif defined(__sun) || defined(sun) -# define PLATFORM_ID "SunOS" - -#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) -# define PLATFORM_ID "AIX" - -#elif defined(__hpux) || defined(__hpux__) -# define PLATFORM_ID "HP-UX" - -#elif defined(__HAIKU__) -# define PLATFORM_ID "Haiku" - -#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) -# define PLATFORM_ID "BeOS" - -#elif defined(__QNX__) || defined(__QNXNTO__) -# define PLATFORM_ID "QNX" - -#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) -# define PLATFORM_ID "Tru64" - -#elif defined(__riscos) || defined(__riscos__) -# define PLATFORM_ID "RISCos" - -#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) -# define PLATFORM_ID "SINIX" - -#elif defined(__UNIX_SV__) -# define PLATFORM_ID "UNIX_SV" - -#elif defined(__bsdos__) -# define PLATFORM_ID "BSDOS" - -#elif defined(_MPRAS) || defined(MPRAS) -# define PLATFORM_ID "MP-RAS" - -#elif defined(__osf) || defined(__osf__) -# define PLATFORM_ID "OSF1" - -#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) -# define PLATFORM_ID "SCO_SV" - -#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) -# define PLATFORM_ID "ULTRIX" - -#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) -# define PLATFORM_ID "Xenix" - -#elif defined(__WATCOMC__) -# if defined(__LINUX__) -# define PLATFORM_ID "Linux" - -# elif defined(__DOS__) -# define PLATFORM_ID "DOS" - -# elif defined(__OS2__) -# define PLATFORM_ID "OS2" - -# elif defined(__WINDOWS__) -# define PLATFORM_ID "Windows3x" - -# else /* unknown platform */ -# define PLATFORM_ID -# endif - -#elif defined(__INTEGRITY) -# if defined(INT_178B) -# define PLATFORM_ID "Integrity178" - -# else /* regular Integrity */ -# define PLATFORM_ID "Integrity" -# endif - -#else /* unknown platform */ -# define PLATFORM_ID - -#endif - -/* For windows compilers MSVC and Intel we can determine - the architecture of the compiler being used. This is because - the compilers do not have flags that can change the architecture, - but rather depend on which compiler is being used -*/ -#if defined(_WIN32) && defined(_MSC_VER) -# if defined(_M_IA64) -# define ARCHITECTURE_ID "IA64" - -# elif defined(_M_X64) || defined(_M_AMD64) -# define ARCHITECTURE_ID "x64" - -# elif defined(_M_IX86) -# define ARCHITECTURE_ID "X86" - -# elif defined(_M_ARM64) -# define ARCHITECTURE_ID "ARM64" - -# elif defined(_M_ARM) -# if _M_ARM == 4 -# define ARCHITECTURE_ID "ARMV4I" -# elif _M_ARM == 5 -# define ARCHITECTURE_ID "ARMV5I" -# else -# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) -# endif - -# elif defined(_M_MIPS) -# define ARCHITECTURE_ID "MIPS" - -# elif defined(_M_SH) -# define ARCHITECTURE_ID "SHx" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__WATCOMC__) -# if defined(_M_I86) -# define ARCHITECTURE_ID "I86" - -# elif defined(_M_IX86) -# define ARCHITECTURE_ID "X86" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) -# if defined(__ICCARM__) -# define ARCHITECTURE_ID "ARM" - -# elif defined(__ICCRX__) -# define ARCHITECTURE_ID "RX" - -# elif defined(__ICCRH850__) -# define ARCHITECTURE_ID "RH850" - -# elif defined(__ICCRL78__) -# define ARCHITECTURE_ID "RL78" - -# elif defined(__ICCRISCV__) -# define ARCHITECTURE_ID "RISCV" - -# elif defined(__ICCAVR__) -# define ARCHITECTURE_ID "AVR" - -# elif defined(__ICC430__) -# define ARCHITECTURE_ID "MSP430" - -# elif defined(__ICCV850__) -# define ARCHITECTURE_ID "V850" - -# elif defined(__ICC8051__) -# define ARCHITECTURE_ID "8051" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__ghs__) -# if defined(__PPC64__) -# define ARCHITECTURE_ID "PPC64" - -# elif defined(__ppc__) -# define ARCHITECTURE_ID "PPC" - -# elif defined(__ARM__) -# define ARCHITECTURE_ID "ARM" - -# elif defined(__x86_64__) -# define ARCHITECTURE_ID "x64" - -# elif defined(__i386__) -# define ARCHITECTURE_ID "X86" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif -#else -# define ARCHITECTURE_ID -#endif - -/* Convert integer to decimal digit literals. */ -#define DEC(n) \ - ('0' + (((n) / 10000000)%10)), \ - ('0' + (((n) / 1000000)%10)), \ - ('0' + (((n) / 100000)%10)), \ - ('0' + (((n) / 10000)%10)), \ - ('0' + (((n) / 1000)%10)), \ - ('0' + (((n) / 100)%10)), \ - ('0' + (((n) / 10)%10)), \ - ('0' + ((n) % 10)) - -/* Convert integer to hex digit literals. */ -#define HEX(n) \ - ('0' + ((n)>>28 & 0xF)), \ - ('0' + ((n)>>24 & 0xF)), \ - ('0' + ((n)>>20 & 0xF)), \ - ('0' + ((n)>>16 & 0xF)), \ - ('0' + ((n)>>12 & 0xF)), \ - ('0' + ((n)>>8 & 0xF)), \ - ('0' + ((n)>>4 & 0xF)), \ - ('0' + ((n) & 0xF)) - -/* Construct a string literal encoding the version number components. */ -#ifdef COMPILER_VERSION_MAJOR -char const info_version[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', - COMPILER_VERSION_MAJOR, -# ifdef COMPILER_VERSION_MINOR - '.', COMPILER_VERSION_MINOR, -# ifdef COMPILER_VERSION_PATCH - '.', COMPILER_VERSION_PATCH, -# ifdef COMPILER_VERSION_TWEAK - '.', COMPILER_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct a string literal encoding the internal version number. */ -#ifdef COMPILER_VERSION_INTERNAL -char const info_version_internal[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', - 'i','n','t','e','r','n','a','l','[', - COMPILER_VERSION_INTERNAL,']','\0'}; -#endif - -/* Construct a string literal encoding the version number components. */ -#ifdef SIMULATE_VERSION_MAJOR -char const info_simulate_version[] = { - 'I', 'N', 'F', 'O', ':', - 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', - SIMULATE_VERSION_MAJOR, -# ifdef SIMULATE_VERSION_MINOR - '.', SIMULATE_VERSION_MINOR, -# ifdef SIMULATE_VERSION_PATCH - '.', SIMULATE_VERSION_PATCH, -# ifdef SIMULATE_VERSION_TWEAK - '.', SIMULATE_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct the string literal in pieces to prevent the source from - getting matched. Store it in a pointer rather than an array - because some compilers will just produce instructions to fill the - array rather than assigning a pointer to a static array. */ -char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; -char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; - - - - -#if defined(__INTEL_COMPILER) && defined(_MSVC_LANG) && _MSVC_LANG < 201403L -# if defined(__INTEL_CXX11_MODE__) -# if defined(__cpp_aggregate_nsdmi) -# define CXX_STD 201402L -# else -# define CXX_STD 201103L -# endif -# else -# define CXX_STD 199711L -# endif -#elif defined(_MSC_VER) && defined(_MSVC_LANG) -# define CXX_STD _MSVC_LANG -#else -# define CXX_STD __cplusplus -#endif - -const char* info_language_dialect_default = "INFO" ":" "dialect_default[" -#if CXX_STD > 201703L - "20" -#elif CXX_STD >= 201703L - "17" -#elif CXX_STD >= 201402L - "14" -#elif CXX_STD >= 201103L - "11" -#else - "98" -#endif -"]"; - -/*--------------------------------------------------------------------------*/ - -int main(int argc, char* argv[]) -{ - int require = 0; - require += info_compiler[argc]; - require += info_platform[argc]; -#ifdef COMPILER_VERSION_MAJOR - require += info_version[argc]; -#endif -#ifdef COMPILER_VERSION_INTERNAL - require += info_version_internal[argc]; -#endif -#ifdef SIMULATE_ID - require += info_simulate[argc]; -#endif -#ifdef SIMULATE_VERSION_MAJOR - require += info_simulate_version[argc]; -#endif -#if defined(__CRAYXE) || defined(__CRAYXC) - require += info_cray[argc]; -#endif - require += info_language_dialect_default[argc]; - (void)argv; - return require; -} diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdCXX/a.out b/rad-sim/example-designs/add_multi/CMakeFiles/3.16.3/CompilerIdCXX/a.out deleted file mode 100755 index 2881803fe1c1315653cec8eead6766e2c9b69693..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 16720 zcmeHOe{3699e<9KHtkx+{k4X6TW+P5(v7%ImWH$})K22`jNEo>lP!>C$HjIM3&#%j znI_XZT2h9r5~#FFOai28NC>n_1O6BSX^^U02Z*s%LR(QmM6hZZDqS`h3ed%Tzwf?Z z=kDSTiSZBUp5*(y_xb*K@4oNd`QF`opO3_PsyrUS$tylCuoUu}Oo#;jy_5k6iFUCT zj<<{3#0n@^OU{&sOaQ5wE?3#HmUu59+SOyG0^VlQP=lGcg@|Z(v($(Ug2X83JkYKN z1ypw8ZfYkZ%ggmCXbee_$1+|<1xSomJ8a5)lN5{j4m*aZK9!K|uqaOSN@1VodPYPVsc2VtOez-)YxRc24XjJ4UPn(~+x2;yI(23lmr*e96m7?S&JMes`|;eE#*9SDz@{#Xhi3)WL-IJS4D; zd8`9<%=141IU37=my*94lf+F9?Z7J)WLtn+UxDuhPN~4hZ^GXK{I&}E0^%3PaJ30d zi%;mP-UD6f zY$n;O52ev^WGtH@OU+cRs3_ZGMv-Ibfe2y@d0Z5>q*h^cKSFKi>yxhwWt}NlpzD_T zS#nStGUd#3+3(;L#nh{J@HyfY2mdAF8y)-;#9!VgWWuq4=fi2%!t*(!Y|g^-*hGHb z!t*tT{DOs-_e&(*|9if^XmEQ`_%IbUe$9^y|id-1P43FL2YSvxUK=(#rD|V;~fzYi^AP~>QqM+ zX4T?VV~u*MV+9oEc9u$|xda?8*4z$d&mh>^?B6^JLUhyzcEw}Y)M8=w#mEh8rh01A zFJPvADsoMIQuVx2_pGS<$&4p*1Na|T;!VZrO)vN$n$K4I%i7Fj;Uv}t z;Sb4phaZehciaOrm+%A8;;Z4lXz|@}Z@74)Pn~Ys4)l@O&iAlS=NcAECH4G!UZbJ; z3dJ*4d?!}C-d%hnT-x}1b?Smg-SfM`pRm6N2Ez}92g47CwF|>bb>eB`NI;b1q&zZY zliY(F0XG6}1l$O?5pW~mM!=1L8v!>0ZUo#2{EtMyWBb~;ywTBvJ%{$jvt#3_bTT&p zUnvLeIySlXxnwS%%4P(fbxlyo=(OM z_!Ky-7t+Q+bL*h+Z1sK&zh~mNFXOFJDGhiM@C@J?K>T)jY`#=F2Uz`fsq{-g18^g} zhQM#Jm^_ah7M=;eXX~1kwWo>4H3scqk8cJ<_e%MNZ#!gLu?)NfIa+&M z?Ax;Uu6wp`Loxb&2!3FS8D@yj*czTo34RA2kl%Kg4j#@8P91;f6^PM^~0tMByrJAJkC zd**M!ydV6y-|H}tZgL~wM!=1L8v!>0ZUo#2xDjw8;6{KW!0Q@$9V1MEWMW*yinPvg zEtMN-vFL}W%@P^)yVQ1S0R2z^3^6S zjuGN|Q%v`_JX=Jg)geI{d3e_ z_%bZZ96y+b$?~ft|2vhr9pv`E2fRM~1A653tBPVe;`OP#9+lUh?(gc_t2Fiv6*5La z*%N??eN%HmmYN@H2?m0#ftH;n|L+^*g%zyz++h}VFT9iB_3IWI)<$~;uTQu0)#A~L zern3&%&xzpJihGwO2OmM&esa=PdmR#@HnvZs|AlYI}f9mt}8pgMkp2ewIW!N_m%f& z*!|QAzE15tI8m&OnfHoy<@NVgsTWp;&sEglP~OL2*WXya-t9bGofXEXSKL~@KJEIO zg$P+0Gw+3~Jy?i$A^Eco{!ZfgK52Rp;-ip( zQCn^g)`zJFeja!m#P>Z(!T}fOW4(OeWgg!NdBpN~J_&rK_CF)_{UW4522zU&;G?qs zdEh;_)p$}Bi3`Q_v1e&GFLbGg6RWEb%3tCn9c{m8SD1&@*+=lDDc zykgPg>=VGRtJ*C1zRLVrd+lA|ktei(=CA@*$I zG13pwc-}?gm&m`L^!b1A3h?MBNIa>FH^|RUs#m_l1mQLEFki6))GcG zm)G>dgupk~>7zphO_)i9Q^bg4j+hUk%QeD>|L>YN(im{lLx~G zqFr{0+#~}Oym!|kDtS=54-0L7>`-SorXA|(ITGpBdc&Qu2zr%UYvTEWJg4{HOp{FL zhR!BSyKzDx+jblcwahIypljcMqb2fLZB)-BaBoiZ5NIV*8Lf~{CWJh7e#y_3V7oAY zrj$P_fOIIIrz+%rAZeV|Gb06k1iHcgB>>c6QxJy{cMDbA0%YHGWIrkCA3rt-5y(%D z8Tt^Qku!0WbEypMKN=T-Ox8#SMlyxKcrH7h%o&pwYN(Kc9b%~jQQ^*LlcA3YsXnUb zM@1kpnSm-yG;*edzLMAq8pv|Vw2lTMAfpr*Pa6Ucfsrg^jN}9yajb%7R(4(>IZC5* zGy(QpGVRS_YFcm}oa@EkGDY|rzT6mWRTY|qcLj69D56`9b7 zHGLKeIHzHIe(q)D`60KT^%x%mdz>S2nV*jt6{^hHexk)RWH6>|&(G0}3N@JPcb@;( zz!p_lj(@c>5%PSM*k%3yO%Pb^6|!SwcWlpP#-|+i{QS6e1IDY44s-hZ zzQdm91B^VM=lY%F_lIQ9@fQkd5}uWbm1ur-S@_%KLwv`dnuGBiPni?D=_qp$SMxtY?;%%FMq70vvl>fBCr? z)^}r?q5i}1kBRNLAHNM8s<1u3$C#l9xe&;#iR~E|KxnlWA<_<-NI>LL{Y)%E27Ph; z{5%&VL#~JQ>2$a#yg(r5tcUIIE^C?@wzndW9jof6$)QRYHeScrCEOmq|E&U!+itc0 e4*oGfdcfhF>oukL>{;1 - -void* test_func(void* data) -{ - return data; -} - -int main(void) -{ - pthread_t thread; - pthread_create(&thread, NULL, test_func, NULL); - pthread_detach(thread); - pthread_join(thread, NULL); - pthread_atfork(NULL, NULL, NULL); - pthread_exit(NULL); - - return 0; -} - diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/CMakeOutput.log b/rad-sim/example-designs/add_multi/CMakeFiles/CMakeOutput.log deleted file mode 100644 index 71dd668..0000000 --- a/rad-sim/example-designs/add_multi/CMakeFiles/CMakeOutput.log +++ /dev/null @@ -1,477 +0,0 @@ -The system is: Linux - 5.15.0-69-generic - x86_64 -Compiling the C compiler identification source file "CMakeCCompilerId.c" succeeded. -Compiler: /usr/bin/cc -Build flags: -Id flags: - -The output was: -0 - - -Compilation of the C compiler identification source "CMakeCCompilerId.c" produced "a.out" - -The C compiler identification is GNU, found in "/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/a.out" - -Compiling the CXX compiler identification source file "CMakeCXXCompilerId.cpp" succeeded. -Compiler: /usr/bin/c++ -Build flags: -Id flags: - -The output was: -0 - - -Compilation of the CXX compiler identification source "CMakeCXXCompilerId.cpp" produced "a.out" - -The CXX compiler identification is GNU, found in "/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdCXX/a.out" - -Determining if the C compiler works passed with the following output: -Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp - -Run Build Command(s):/usr/bin/make cmTC_9f9dc/fast && /usr/bin/make -f CMakeFiles/cmTC_9f9dc.dir/build.make CMakeFiles/cmTC_9f9dc.dir/build -make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' -Building C object CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o -/usr/bin/cc -o CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/testCCompiler.c -Linking C executable cmTC_9f9dc -/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_9f9dc.dir/link.txt --verbose=1 -/usr/bin/cc -rdynamic CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o -o cmTC_9f9dc -make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' - - - -Detecting C compiler ABI info compiled with the following output: -Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp - -Run Build Command(s):/usr/bin/make cmTC_5eca0/fast && /usr/bin/make -f CMakeFiles/cmTC_5eca0.dir/build.make CMakeFiles/cmTC_5eca0.dir/build -make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' -Building C object CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -/usr/bin/cc -v -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -c /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c -Using built-in specs. -COLLECT_GCC=/usr/bin/cc -OFFLOAD_TARGET_NAMES=nvptx-none:hsa -OFFLOAD_TARGET_DEFAULT=1 -Target: x86_64-linux-gnu -Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu -Thread model: posix -gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' - /usr/lib/gcc/x86_64-linux-gnu/9/cc1 -quiet -v -imultiarch x86_64-linux-gnu /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c -quiet -dumpbase CMakeCCompilerABI.c -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccEZ3Z6E.s -GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) - compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP - -GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 -ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu" -ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed" -ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include" -#include "..." search starts here: -#include <...> search starts here: - /usr/lib/gcc/x86_64-linux-gnu/9/include - /usr/local/include - /usr/include/x86_64-linux-gnu - /usr/include -End of search list. -GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) - compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP - -GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 -Compiler executable checksum: 01da938ff5dc2163489aa33cb3b747a7 -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' - as -v --64 -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o /tmp/ccEZ3Z6E.s -GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34 -COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ -LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' -Linking C executable cmTC_5eca0 -/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_5eca0.dir/link.txt --verbose=1 -/usr/bin/cc -v -rdynamic CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -o cmTC_5eca0 -Using built-in specs. -COLLECT_GCC=/usr/bin/cc -COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -OFFLOAD_TARGET_NAMES=nvptx-none:hsa -OFFLOAD_TARGET_DEFAULT=1 -Target: x86_64-linux-gnu -Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu -Thread model: posix -gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) -COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ -LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ -COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64' - /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/ccjwqw95.res -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_5eca0 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -lgcc --push-state --as-needed -lgcc_s --pop-state -lc -lgcc --push-state --as-needed -lgcc_s --pop-state /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o -COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64' -make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' - - - -Parsed C implicit include dir info from above output: rv=done - found start of include info - found start of implicit include info - add: [/usr/lib/gcc/x86_64-linux-gnu/9/include] - add: [/usr/local/include] - add: [/usr/include/x86_64-linux-gnu] - add: [/usr/include] - end of search list found - collapse include dir [/usr/lib/gcc/x86_64-linux-gnu/9/include] ==> [/usr/lib/gcc/x86_64-linux-gnu/9/include] - collapse include dir [/usr/local/include] ==> [/usr/local/include] - collapse include dir [/usr/include/x86_64-linux-gnu] ==> [/usr/include/x86_64-linux-gnu] - collapse include dir [/usr/include] ==> [/usr/include] - implicit include dirs: [/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include] - - -Parsed C implicit link information from above output: - link line regex: [^( *|.*[/\])(ld|CMAKE_LINK_STARTFILE-NOTFOUND|([^/\]+-)?ld|collect2)[^/\]*( |$)] - ignore line: [Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp] - ignore line: [] - ignore line: [Run Build Command(s):/usr/bin/make cmTC_5eca0/fast && /usr/bin/make -f CMakeFiles/cmTC_5eca0.dir/build.make CMakeFiles/cmTC_5eca0.dir/build] - ignore line: [make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp'] - ignore line: [Building C object CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o] - ignore line: [/usr/bin/cc -v -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -c /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c] - ignore line: [Using built-in specs.] - ignore line: [COLLECT_GCC=/usr/bin/cc] - ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] - ignore line: [OFFLOAD_TARGET_DEFAULT=1] - ignore line: [Target: x86_64-linux-gnu] - ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] - ignore line: [Thread model: posix] - ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] - ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/cc1 -quiet -v -imultiarch x86_64-linux-gnu /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c -quiet -dumpbase CMakeCCompilerABI.c -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccEZ3Z6E.s] - ignore line: [GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] - ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] - ignore line: [] - ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] - ignore line: [ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu"] - ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed"] - ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include"] - ignore line: [#include "..." search starts here:] - ignore line: [#include <...> search starts here:] - ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/include] - ignore line: [ /usr/local/include] - ignore line: [ /usr/include/x86_64-linux-gnu] - ignore line: [ /usr/include] - ignore line: [End of search list.] - ignore line: [GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] - ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] - ignore line: [] - ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] - ignore line: [Compiler executable checksum: 01da938ff5dc2163489aa33cb3b747a7] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] - ignore line: [ as -v --64 -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o /tmp/ccEZ3Z6E.s] - ignore line: [GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34] - ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] - ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] - ignore line: [Linking C executable cmTC_5eca0] - ignore line: [/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_5eca0.dir/link.txt --verbose=1] - ignore line: [/usr/bin/cc -v -rdynamic CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -o cmTC_5eca0 ] - ignore line: [Using built-in specs.] - ignore line: [COLLECT_GCC=/usr/bin/cc] - ignore line: [COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] - ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] - ignore line: [OFFLOAD_TARGET_DEFAULT=1] - ignore line: [Target: x86_64-linux-gnu] - ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] - ignore line: [Thread model: posix] - ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] - ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] - ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64'] - link line: [ /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/ccjwqw95.res -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_5eca0 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -lgcc --push-state --as-needed -lgcc_s --pop-state -lc -lgcc --push-state --as-needed -lgcc_s --pop-state /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] - arg [/usr/lib/gcc/x86_64-linux-gnu/9/collect2] ==> ignore - arg [-plugin] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so] ==> ignore - arg [-plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] ==> ignore - arg [-plugin-opt=-fresolution=/tmp/ccjwqw95.res] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore - arg [-plugin-opt=-pass-through=-lc] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore - arg [--build-id] ==> ignore - arg [--eh-frame-hdr] ==> ignore - arg [-m] ==> ignore - arg [elf_x86_64] ==> ignore - arg [--hash-style=gnu] ==> ignore - arg [--as-needed] ==> ignore - arg [-export-dynamic] ==> ignore - arg [-dynamic-linker] ==> ignore - arg [/lib64/ld-linux-x86-64.so.2] ==> ignore - arg [-pie] ==> ignore - arg [-znow] ==> ignore - arg [-zrelro] ==> ignore - arg [-o] ==> ignore - arg [cmTC_5eca0] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o] ==> ignore - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] - arg [-L/lib/x86_64-linux-gnu] ==> dir [/lib/x86_64-linux-gnu] - arg [-L/lib/../lib] ==> dir [/lib/../lib] - arg [-L/usr/lib/x86_64-linux-gnu] ==> dir [/usr/lib/x86_64-linux-gnu] - arg [-L/usr/lib/../lib] ==> dir [/usr/lib/../lib] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] - arg [CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o] ==> ignore - arg [-lgcc] ==> lib [gcc] - arg [--push-state] ==> ignore - arg [--as-needed] ==> ignore - arg [-lgcc_s] ==> lib [gcc_s] - arg [--pop-state] ==> ignore - arg [-lc] ==> lib [c] - arg [-lgcc] ==> lib [gcc] - arg [--push-state] ==> ignore - arg [--as-needed] ==> ignore - arg [-lgcc_s] ==> lib [gcc_s] - arg [--pop-state] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] ==> ignore - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9] ==> [/usr/lib/gcc/x86_64-linux-gnu/9] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> [/usr/lib] - collapse library dir [/lib/x86_64-linux-gnu] ==> [/lib/x86_64-linux-gnu] - collapse library dir [/lib/../lib] ==> [/lib] - collapse library dir [/usr/lib/x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] - collapse library dir [/usr/lib/../lib] ==> [/usr/lib] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> [/usr/lib] - implicit libs: [gcc;gcc_s;c;gcc;gcc_s] - implicit dirs: [/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib] - implicit fwks: [] - - -Determining if the CXX compiler works passed with the following output: -Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp - -Run Build Command(s):/usr/bin/make cmTC_8e0c3/fast && /usr/bin/make -f CMakeFiles/cmTC_8e0c3.dir/build.make CMakeFiles/cmTC_8e0c3.dir/build -make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' -Building CXX object CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o -/usr/bin/c++ -o CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/testCXXCompiler.cxx -Linking CXX executable cmTC_8e0c3 -/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_8e0c3.dir/link.txt --verbose=1 -/usr/bin/c++ -rdynamic CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o -o cmTC_8e0c3 -make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' - - - -Detecting CXX compiler ABI info compiled with the following output: -Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp - -Run Build Command(s):/usr/bin/make cmTC_59ff1/fast && /usr/bin/make -f CMakeFiles/cmTC_59ff1.dir/build.make CMakeFiles/cmTC_59ff1.dir/build -make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' -Building CXX object CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -/usr/bin/c++ -v -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -c /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp -Using built-in specs. -COLLECT_GCC=/usr/bin/c++ -OFFLOAD_TARGET_NAMES=nvptx-none:hsa -OFFLOAD_TARGET_DEFAULT=1 -Target: x86_64-linux-gnu -Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu -Thread model: posix -gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' - /usr/lib/gcc/x86_64-linux-gnu/9/cc1plus -quiet -v -imultiarch x86_64-linux-gnu -D_GNU_SOURCE /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp -quiet -dumpbase CMakeCXXCompilerABI.cpp -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccETTYVz.s -GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) - compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP - -GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 -ignoring duplicate directory "/usr/include/x86_64-linux-gnu/c++/9" -ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu" -ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed" -ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include" -#include "..." search starts here: -#include <...> search starts here: - /usr/include/c++/9 - /usr/include/x86_64-linux-gnu/c++/9 - /usr/include/c++/9/backward - /usr/lib/gcc/x86_64-linux-gnu/9/include - /usr/local/include - /usr/include/x86_64-linux-gnu - /usr/include -End of search list. -GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) - compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP - -GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 -Compiler executable checksum: 3d1eba838554fa2348dba760e4770469 -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' - as -v --64 -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o /tmp/ccETTYVz.s -GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34 -COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ -LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' -Linking CXX executable cmTC_59ff1 -/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_59ff1.dir/link.txt --verbose=1 -/usr/bin/c++ -v -rdynamic CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -o cmTC_59ff1 -Using built-in specs. -COLLECT_GCC=/usr/bin/c++ -COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -OFFLOAD_TARGET_NAMES=nvptx-none:hsa -OFFLOAD_TARGET_DEFAULT=1 -Target: x86_64-linux-gnu -Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu -Thread model: posix -gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) -COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ -LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ -COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64' - /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/cco0EvR4.res -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_59ff1 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -lstdc++ -lm -lgcc_s -lgcc -lc -lgcc_s -lgcc /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o -COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64' -make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' - - - -Parsed CXX implicit include dir info from above output: rv=done - found start of include info - found start of implicit include info - add: [/usr/include/c++/9] - add: [/usr/include/x86_64-linux-gnu/c++/9] - add: [/usr/include/c++/9/backward] - add: [/usr/lib/gcc/x86_64-linux-gnu/9/include] - add: [/usr/local/include] - add: [/usr/include/x86_64-linux-gnu] - add: [/usr/include] - end of search list found - collapse include dir [/usr/include/c++/9] ==> [/usr/include/c++/9] - collapse include dir [/usr/include/x86_64-linux-gnu/c++/9] ==> [/usr/include/x86_64-linux-gnu/c++/9] - collapse include dir [/usr/include/c++/9/backward] ==> [/usr/include/c++/9/backward] - collapse include dir [/usr/lib/gcc/x86_64-linux-gnu/9/include] ==> [/usr/lib/gcc/x86_64-linux-gnu/9/include] - collapse include dir [/usr/local/include] ==> [/usr/local/include] - collapse include dir [/usr/include/x86_64-linux-gnu] ==> [/usr/include/x86_64-linux-gnu] - collapse include dir [/usr/include] ==> [/usr/include] - implicit include dirs: [/usr/include/c++/9;/usr/include/x86_64-linux-gnu/c++/9;/usr/include/c++/9/backward;/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include] - - -Parsed CXX implicit link information from above output: - link line regex: [^( *|.*[/\])(ld|CMAKE_LINK_STARTFILE-NOTFOUND|([^/\]+-)?ld|collect2)[^/\]*( |$)] - ignore line: [Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp] - ignore line: [] - ignore line: [Run Build Command(s):/usr/bin/make cmTC_59ff1/fast && /usr/bin/make -f CMakeFiles/cmTC_59ff1.dir/build.make CMakeFiles/cmTC_59ff1.dir/build] - ignore line: [make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp'] - ignore line: [Building CXX object CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o] - ignore line: [/usr/bin/c++ -v -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -c /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp] - ignore line: [Using built-in specs.] - ignore line: [COLLECT_GCC=/usr/bin/c++] - ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] - ignore line: [OFFLOAD_TARGET_DEFAULT=1] - ignore line: [Target: x86_64-linux-gnu] - ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] - ignore line: [Thread model: posix] - ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] - ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/cc1plus -quiet -v -imultiarch x86_64-linux-gnu -D_GNU_SOURCE /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp -quiet -dumpbase CMakeCXXCompilerABI.cpp -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccETTYVz.s] - ignore line: [GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] - ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] - ignore line: [] - ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] - ignore line: [ignoring duplicate directory "/usr/include/x86_64-linux-gnu/c++/9"] - ignore line: [ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu"] - ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed"] - ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include"] - ignore line: [#include "..." search starts here:] - ignore line: [#include <...> search starts here:] - ignore line: [ /usr/include/c++/9] - ignore line: [ /usr/include/x86_64-linux-gnu/c++/9] - ignore line: [ /usr/include/c++/9/backward] - ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/include] - ignore line: [ /usr/local/include] - ignore line: [ /usr/include/x86_64-linux-gnu] - ignore line: [ /usr/include] - ignore line: [End of search list.] - ignore line: [GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] - ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] - ignore line: [] - ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] - ignore line: [Compiler executable checksum: 3d1eba838554fa2348dba760e4770469] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] - ignore line: [ as -v --64 -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o /tmp/ccETTYVz.s] - ignore line: [GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34] - ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] - ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] - ignore line: [Linking CXX executable cmTC_59ff1] - ignore line: [/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_59ff1.dir/link.txt --verbose=1] - ignore line: [/usr/bin/c++ -v -rdynamic CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -o cmTC_59ff1 ] - ignore line: [Using built-in specs.] - ignore line: [COLLECT_GCC=/usr/bin/c++] - ignore line: [COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] - ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] - ignore line: [OFFLOAD_TARGET_DEFAULT=1] - ignore line: [Target: x86_64-linux-gnu] - ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] - ignore line: [Thread model: posix] - ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] - ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] - ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] - link line: [ /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/cco0EvR4.res -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_59ff1 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -lstdc++ -lm -lgcc_s -lgcc -lc -lgcc_s -lgcc /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] - arg [/usr/lib/gcc/x86_64-linux-gnu/9/collect2] ==> ignore - arg [-plugin] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so] ==> ignore - arg [-plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] ==> ignore - arg [-plugin-opt=-fresolution=/tmp/cco0EvR4.res] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc] ==> ignore - arg [-plugin-opt=-pass-through=-lc] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc] ==> ignore - arg [--build-id] ==> ignore - arg [--eh-frame-hdr] ==> ignore - arg [-m] ==> ignore - arg [elf_x86_64] ==> ignore - arg [--hash-style=gnu] ==> ignore - arg [--as-needed] ==> ignore - arg [-export-dynamic] ==> ignore - arg [-dynamic-linker] ==> ignore - arg [/lib64/ld-linux-x86-64.so.2] ==> ignore - arg [-pie] ==> ignore - arg [-znow] ==> ignore - arg [-zrelro] ==> ignore - arg [-o] ==> ignore - arg [cmTC_59ff1] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o] ==> ignore - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] - arg [-L/lib/x86_64-linux-gnu] ==> dir [/lib/x86_64-linux-gnu] - arg [-L/lib/../lib] ==> dir [/lib/../lib] - arg [-L/usr/lib/x86_64-linux-gnu] ==> dir [/usr/lib/x86_64-linux-gnu] - arg [-L/usr/lib/../lib] ==> dir [/usr/lib/../lib] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] - arg [CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o] ==> ignore - arg [-lstdc++] ==> lib [stdc++] - arg [-lm] ==> lib [m] - arg [-lgcc_s] ==> lib [gcc_s] - arg [-lgcc] ==> lib [gcc] - arg [-lc] ==> lib [c] - arg [-lgcc_s] ==> lib [gcc_s] - arg [-lgcc] ==> lib [gcc] - arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] ==> ignore - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9] ==> [/usr/lib/gcc/x86_64-linux-gnu/9] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> [/usr/lib] - collapse library dir [/lib/x86_64-linux-gnu] ==> [/lib/x86_64-linux-gnu] - collapse library dir [/lib/../lib] ==> [/lib] - collapse library dir [/usr/lib/x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] - collapse library dir [/usr/lib/../lib] ==> [/usr/lib] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> [/usr/lib] - implicit libs: [stdc++;m;gcc_s;gcc;c;gcc_s;gcc] - implicit dirs: [/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib] - implicit fwks: [] - - -Determining if the include file pthread.h exists passed with the following output: -Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp - -Run Build Command(s):/usr/bin/make cmTC_9b3d4/fast && /usr/bin/make -f CMakeFiles/cmTC_9b3d4.dir/build.make CMakeFiles/cmTC_9b3d4.dir/build -make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' -Building C object CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o -/usr/bin/cc -o CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/CheckIncludeFile.c -Linking C executable cmTC_9b3d4 -/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_9b3d4.dir/link.txt --verbose=1 -/usr/bin/cc CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o -o cmTC_9b3d4 -make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' - - - diff --git a/rad-sim/example-designs/add_multi/CMakeFiles/cmake.check_cache b/rad-sim/example-designs/add_multi/CMakeFiles/cmake.check_cache deleted file mode 100644 index 3dccd73..0000000 --- a/rad-sim/example-designs/add_multi/CMakeFiles/cmake.check_cache +++ /dev/null @@ -1 +0,0 @@ -# This file is generated by cmake for dependency checking of the CMakeCache.txt file diff --git a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeCCompiler.cmake b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeCCompiler.cmake deleted file mode 100644 index c5ece7b..0000000 --- a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeCCompiler.cmake +++ /dev/null @@ -1,76 +0,0 @@ -set(CMAKE_C_COMPILER "/usr/bin/cc") -set(CMAKE_C_COMPILER_ARG1 "") -set(CMAKE_C_COMPILER_ID "GNU") -set(CMAKE_C_COMPILER_VERSION "9.4.0") -set(CMAKE_C_COMPILER_VERSION_INTERNAL "") -set(CMAKE_C_COMPILER_WRAPPER "") -set(CMAKE_C_STANDARD_COMPUTED_DEFAULT "11") -set(CMAKE_C_COMPILE_FEATURES "c_std_90;c_function_prototypes;c_std_99;c_restrict;c_variadic_macros;c_std_11;c_static_assert") -set(CMAKE_C90_COMPILE_FEATURES "c_std_90;c_function_prototypes") -set(CMAKE_C99_COMPILE_FEATURES "c_std_99;c_restrict;c_variadic_macros") -set(CMAKE_C11_COMPILE_FEATURES "c_std_11;c_static_assert") - -set(CMAKE_C_PLATFORM_ID "Linux") -set(CMAKE_C_SIMULATE_ID "") -set(CMAKE_C_COMPILER_FRONTEND_VARIANT "") -set(CMAKE_C_SIMULATE_VERSION "") - - - -set(CMAKE_AR "/usr/bin/ar") -set(CMAKE_C_COMPILER_AR "/usr/bin/gcc-ar-9") -set(CMAKE_RANLIB "/usr/bin/ranlib") -set(CMAKE_C_COMPILER_RANLIB "/usr/bin/gcc-ranlib-9") -set(CMAKE_LINKER "/usr/bin/ld") -set(CMAKE_MT "") -set(CMAKE_COMPILER_IS_GNUCC 1) -set(CMAKE_C_COMPILER_LOADED 1) -set(CMAKE_C_COMPILER_WORKS TRUE) -set(CMAKE_C_ABI_COMPILED TRUE) -set(CMAKE_COMPILER_IS_MINGW ) -set(CMAKE_COMPILER_IS_CYGWIN ) -if(CMAKE_COMPILER_IS_CYGWIN) - set(CYGWIN 1) - set(UNIX 1) -endif() - -set(CMAKE_C_COMPILER_ENV_VAR "CC") - -if(CMAKE_COMPILER_IS_MINGW) - set(MINGW 1) -endif() -set(CMAKE_C_COMPILER_ID_RUN 1) -set(CMAKE_C_SOURCE_FILE_EXTENSIONS c;m) -set(CMAKE_C_IGNORE_EXTENSIONS h;H;o;O;obj;OBJ;def;DEF;rc;RC) -set(CMAKE_C_LINKER_PREFERENCE 10) - -# Save compiler ABI information. -set(CMAKE_C_SIZEOF_DATA_PTR "8") -set(CMAKE_C_COMPILER_ABI "ELF") -set(CMAKE_C_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") - -if(CMAKE_C_SIZEOF_DATA_PTR) - set(CMAKE_SIZEOF_VOID_P "${CMAKE_C_SIZEOF_DATA_PTR}") -endif() - -if(CMAKE_C_COMPILER_ABI) - set(CMAKE_INTERNAL_PLATFORM_ABI "${CMAKE_C_COMPILER_ABI}") -endif() - -if(CMAKE_C_LIBRARY_ARCHITECTURE) - set(CMAKE_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") -endif() - -set(CMAKE_C_CL_SHOWINCLUDES_PREFIX "") -if(CMAKE_C_CL_SHOWINCLUDES_PREFIX) - set(CMAKE_CL_SHOWINCLUDES_PREFIX "${CMAKE_C_CL_SHOWINCLUDES_PREFIX}") -endif() - - - - - -set(CMAKE_C_IMPLICIT_INCLUDE_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include") -set(CMAKE_C_IMPLICIT_LINK_LIBRARIES "gcc;gcc_s;c;gcc;gcc_s") -set(CMAKE_C_IMPLICIT_LINK_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib") -set(CMAKE_C_IMPLICIT_LINK_FRAMEWORK_DIRECTORIES "") diff --git a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake deleted file mode 100644 index 278ef39..0000000 --- a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeCXXCompiler.cmake +++ /dev/null @@ -1,88 +0,0 @@ -set(CMAKE_CXX_COMPILER "/usr/bin/c++") -set(CMAKE_CXX_COMPILER_ARG1 "") -set(CMAKE_CXX_COMPILER_ID "GNU") -set(CMAKE_CXX_COMPILER_VERSION "9.4.0") -set(CMAKE_CXX_COMPILER_VERSION_INTERNAL "") -set(CMAKE_CXX_COMPILER_WRAPPER "") -set(CMAKE_CXX_STANDARD_COMPUTED_DEFAULT "14") -set(CMAKE_CXX_COMPILE_FEATURES "cxx_std_98;cxx_template_template_parameters;cxx_std_11;cxx_alias_templates;cxx_alignas;cxx_alignof;cxx_attributes;cxx_auto_type;cxx_constexpr;cxx_decltype;cxx_decltype_incomplete_return_types;cxx_default_function_template_args;cxx_defaulted_functions;cxx_defaulted_move_initializers;cxx_delegating_constructors;cxx_deleted_functions;cxx_enum_forward_declarations;cxx_explicit_conversions;cxx_extended_friend_declarations;cxx_extern_templates;cxx_final;cxx_func_identifier;cxx_generalized_initializers;cxx_inheriting_constructors;cxx_inline_namespaces;cxx_lambdas;cxx_local_type_template_args;cxx_long_long_type;cxx_noexcept;cxx_nonstatic_member_init;cxx_nullptr;cxx_override;cxx_range_for;cxx_raw_string_literals;cxx_reference_qualified_functions;cxx_right_angle_brackets;cxx_rvalue_references;cxx_sizeof_member;cxx_static_assert;cxx_strong_enums;cxx_thread_local;cxx_trailing_return_types;cxx_unicode_literals;cxx_uniform_initialization;cxx_unrestricted_unions;cxx_user_literals;cxx_variadic_macros;cxx_variadic_templates;cxx_std_14;cxx_aggregate_default_initializers;cxx_attribute_deprecated;cxx_binary_literals;cxx_contextual_conversions;cxx_decltype_auto;cxx_digit_separators;cxx_generic_lambdas;cxx_lambda_init_captures;cxx_relaxed_constexpr;cxx_return_type_deduction;cxx_variable_templates;cxx_std_17;cxx_std_20") -set(CMAKE_CXX98_COMPILE_FEATURES "cxx_std_98;cxx_template_template_parameters") -set(CMAKE_CXX11_COMPILE_FEATURES "cxx_std_11;cxx_alias_templates;cxx_alignas;cxx_alignof;cxx_attributes;cxx_auto_type;cxx_constexpr;cxx_decltype;cxx_decltype_incomplete_return_types;cxx_default_function_template_args;cxx_defaulted_functions;cxx_defaulted_move_initializers;cxx_delegating_constructors;cxx_deleted_functions;cxx_enum_forward_declarations;cxx_explicit_conversions;cxx_extended_friend_declarations;cxx_extern_templates;cxx_final;cxx_func_identifier;cxx_generalized_initializers;cxx_inheriting_constructors;cxx_inline_namespaces;cxx_lambdas;cxx_local_type_template_args;cxx_long_long_type;cxx_noexcept;cxx_nonstatic_member_init;cxx_nullptr;cxx_override;cxx_range_for;cxx_raw_string_literals;cxx_reference_qualified_functions;cxx_right_angle_brackets;cxx_rvalue_references;cxx_sizeof_member;cxx_static_assert;cxx_strong_enums;cxx_thread_local;cxx_trailing_return_types;cxx_unicode_literals;cxx_uniform_initialization;cxx_unrestricted_unions;cxx_user_literals;cxx_variadic_macros;cxx_variadic_templates") -set(CMAKE_CXX14_COMPILE_FEATURES "cxx_std_14;cxx_aggregate_default_initializers;cxx_attribute_deprecated;cxx_binary_literals;cxx_contextual_conversions;cxx_decltype_auto;cxx_digit_separators;cxx_generic_lambdas;cxx_lambda_init_captures;cxx_relaxed_constexpr;cxx_return_type_deduction;cxx_variable_templates") -set(CMAKE_CXX17_COMPILE_FEATURES "cxx_std_17") -set(CMAKE_CXX20_COMPILE_FEATURES "cxx_std_20") - -set(CMAKE_CXX_PLATFORM_ID "Linux") -set(CMAKE_CXX_SIMULATE_ID "") -set(CMAKE_CXX_COMPILER_FRONTEND_VARIANT "") -set(CMAKE_CXX_SIMULATE_VERSION "") - - - -set(CMAKE_AR "/usr/bin/ar") -set(CMAKE_CXX_COMPILER_AR "/usr/bin/gcc-ar-9") -set(CMAKE_RANLIB "/usr/bin/ranlib") -set(CMAKE_CXX_COMPILER_RANLIB "/usr/bin/gcc-ranlib-9") -set(CMAKE_LINKER "/usr/bin/ld") -set(CMAKE_MT "") -set(CMAKE_COMPILER_IS_GNUCXX 1) -set(CMAKE_CXX_COMPILER_LOADED 1) -set(CMAKE_CXX_COMPILER_WORKS TRUE) -set(CMAKE_CXX_ABI_COMPILED TRUE) -set(CMAKE_COMPILER_IS_MINGW ) -set(CMAKE_COMPILER_IS_CYGWIN ) -if(CMAKE_COMPILER_IS_CYGWIN) - set(CYGWIN 1) - set(UNIX 1) -endif() - -set(CMAKE_CXX_COMPILER_ENV_VAR "CXX") - -if(CMAKE_COMPILER_IS_MINGW) - set(MINGW 1) -endif() -set(CMAKE_CXX_COMPILER_ID_RUN 1) -set(CMAKE_CXX_SOURCE_FILE_EXTENSIONS C;M;c++;cc;cpp;cxx;m;mm;CPP) -set(CMAKE_CXX_IGNORE_EXTENSIONS inl;h;hpp;HPP;H;o;O;obj;OBJ;def;DEF;rc;RC) - -foreach (lang C OBJC OBJCXX) - if (CMAKE_${lang}_COMPILER_ID_RUN) - foreach(extension IN LISTS CMAKE_${lang}_SOURCE_FILE_EXTENSIONS) - list(REMOVE_ITEM CMAKE_CXX_SOURCE_FILE_EXTENSIONS ${extension}) - endforeach() - endif() -endforeach() - -set(CMAKE_CXX_LINKER_PREFERENCE 30) -set(CMAKE_CXX_LINKER_PREFERENCE_PROPAGATES 1) - -# Save compiler ABI information. -set(CMAKE_CXX_SIZEOF_DATA_PTR "8") -set(CMAKE_CXX_COMPILER_ABI "ELF") -set(CMAKE_CXX_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") - -if(CMAKE_CXX_SIZEOF_DATA_PTR) - set(CMAKE_SIZEOF_VOID_P "${CMAKE_CXX_SIZEOF_DATA_PTR}") -endif() - -if(CMAKE_CXX_COMPILER_ABI) - set(CMAKE_INTERNAL_PLATFORM_ABI "${CMAKE_CXX_COMPILER_ABI}") -endif() - -if(CMAKE_CXX_LIBRARY_ARCHITECTURE) - set(CMAKE_LIBRARY_ARCHITECTURE "x86_64-linux-gnu") -endif() - -set(CMAKE_CXX_CL_SHOWINCLUDES_PREFIX "") -if(CMAKE_CXX_CL_SHOWINCLUDES_PREFIX) - set(CMAKE_CL_SHOWINCLUDES_PREFIX "${CMAKE_CXX_CL_SHOWINCLUDES_PREFIX}") -endif() - - - - - -set(CMAKE_CXX_IMPLICIT_INCLUDE_DIRECTORIES "/usr/include/c++/9;/usr/include/x86_64-linux-gnu/c++/9;/usr/include/c++/9/backward;/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include") -set(CMAKE_CXX_IMPLICIT_LINK_LIBRARIES "stdc++;m;gcc_s;gcc;c;gcc_s;gcc") -set(CMAKE_CXX_IMPLICIT_LINK_DIRECTORIES "/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib") -set(CMAKE_CXX_IMPLICIT_LINK_FRAMEWORK_DIRECTORIES "") diff --git a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_C.bin deleted file mode 100755 index ebea4b340830aee444aab660f7a351e9a05007f2..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 16552 zcmeHOeQXrR6`%9jaDchH5R+VihE1BN(A0}@!8H_@JD<;9w+2$M3l$&Rv+rylxew=V zkJyM1B&Vn+;ub}%phb-kRjWwJAI%^AR6h>6O(dkWAhnb>sp>#c-H0S6DV5s**Y{@T zop;w~MG95^=?>a^^M3O_X5Y*%Gv0YmM!MRoTrNh%%|6SJ3;G2TlnsL$WCci&HM7O= z`%$)n%>%xgW1>AM2(*fFsme+{5_bbdy#Q7!&=mp(528>Hk)qyQ<;Z-|LX^q-K)o7l zlDwVXkPe7ad)c3Y%1{*kTc(3jkEmG>V>4AR#{Cd0_bqE7PI-f=4&SRX#O|7!8w#(wv?y8YKqmBVloPg8<;^nn;o z?c@Fv@Qc|Nd^1~z?2I3&*#7sfcx3K z%pbHW4N08Y@aH)mU;!Jx2=E8svX?9X3fQ;Xc^dG$aO4!BLG$YruuGVi4c#U1xFGC+ z#Dj7|t&#W-fcjZrR{uXPC+k&M!;AbgyC;c`LkM<$IOh zXNrvPv<;t-IO*r{R+$l~3 zoCr7(a3bJDz=?npfe$+Z@A~fhk2ZSEqaCaH6Rd5uuM~}{(s^z4*Pe0SmD2h%0KZdu z=(|9CD;dfI_Y2OoG0v}jv$JqvpH{f6js9)wk?yXsnxn9U(#971IB7WxmP$*rpz_b- z+E~lCprVb{JcDGzw6PRiZ^b&eUQn9wtvrH`$0Y^%1eagmi)8g}tuUpXeQUFJcG|7E zUeYeyHtN8@L(+h!G|}%{3H>5{?C+5lY-ag~d$iG(Dy(XSt46JMtYscBldDUm(qs&N zUaGkTyKdKB(6#9Q<8f$2Lp`8Zc;cE?$WOc+xryC87P+RK)W(+n#tYH;QMKRq%c3iC zlhBuK=*_+3XeP9?Ypf*)JA%*`I|~;>J)MOcq3%%OW{);j9|L$t*Xmn1CX@Q@Qb{{| z%WbS&`>KpbSK*zm!dq>HzlTb7f7M3EUD}4f$+2sjaNBH%>8iGULUCjw3coCy4%M8IYF+Q?Yv*7j{1 zP2Y!hH#G0XP;fljo7fHK1rTs8cYg-I5#slf$+t_TA)wPhPXhH!l}h+s>pD>UPS$+A zR5}mzIiLagaRtAPVsRbZ&RoNO*Yeu=p5xGl_zJk516#OLXKnNOmzxKnx(==(z&YUc zw|fJh^DTPZbA)YPw(%36dXRqxMEyN*?IJm-V?mn+TpOTI{F_|F>pxl*UOewGI0hX4 zWWc@w*O#H4fBS3q`oCV)=?#3%9q}q-)e-Nir)%204M*o`-saKy9o}Ht+Z^&XguJU- zy-KS$(CYQKdOh$ZkFnR_`YPC=Z+yTy#fg9u0Ve`Z1e^#s5pW{lM8JuF69FdzA9@7n zd>oyJliRWKnYUW%5#MAnIOi?Oq&!#m5y{iJyXBInGi`W26bqfd!+jSPYQJ&2ltKQq zJTympq?58zKI2=BQj9GWgk6>t&wFAC2r_eCQu1^buPD#k;h9-1MQND&QRJvNJBwAa zcb~*b?!A)eFT{yM@I_YiU)qB&!euEuxAt&jgW9l8ZCowz_jl-qSrw>o<8Jty1D#JdTXDnbXF7jw z#jDw&igs$s^T;X>!I$&LiqB^>&#btI(Rf+$1?;pOM=QRtJfEyM%ue~-Sn*n>RKypv zhKjhioPS}p<74z3T5&L&nlw6^GNx73QCt z-NWelv&zptkB#l_3g@T=PH&qTEBKsMv+Jc9MAY!TRfXrbZSjN?7#u%s!|#_ky$6LA z#y$-dn6>3|-Sk|yb9{CjQqm5+SIN!@m!BO^{QFp?{=dNG{cM#26)4zmEOXuO4|&@X z7Q-8{l}h$EfuSnM60pyoajtv!tnvLl;4U~nPwxeC@jAz6kNX?a4*kDC^0#iZVUyXp{x%~;-x%yVX73zeEp5XZGdAJYoO6Tx1fLF>>H~@I1 zJcw^fc@{J|h3Xl=6)VKK7Xh!7k5B}>Qa-}(KnwE@?0FEUqDZD1- z?Rg5X1FlG2GkFhi{s&ewi1og#ku&me;;4_!q#Wo*O7Fv@gB&InWb}b#rZ<|@V@4*M z)1&!e)|W{QCF4dsrZzV;t*tD?lNt1AHX9v*6aynW!uqq(R9uhcQ>hV9F>yL3B3MMj zTcVG~!(nifNXE0F)=uaj&wYTuVS{e__RyAy9@*NaLwbW%8*>?Axr{y-O~)W%LT~%h z*3g#DuvLs_UjPJYJ9{8d*UHsg_7XQpylh(-|YK4y5zy zP&P9Z&l)2ps5hU0)T=~HLNI>yMs$F2@xf?rkg2heG`J8H(pY%Qfp|8T$fPZd4sF?Z zGKvaJo1}Tw3!R7 ze+g@Xidlb`T#pgO?=$9NUw(B$qgkKUb3_%hGSuz*I|2I_tfi^{w0|JFN9xmZ&EEeg zwBz1^^ve#Uqmvk1DA-4=l0NMVFkcOCne=HLN%S(bnTs@6h8}|&?iEO%)|*5hkdoAY zk|TN;+HvneJgrNKDpKFxe+jcOsNk)VKJACfR0@)R`~9DQcDyHQhyPSWk(Bm<5-o?9 z`0qf)tglEtqGXQbi6?r-rcdi;q9iw${_{5dpj06GJ==iU?Y(Hzr*#xj+9#8L`~3Z} z)Tj6}MM_GF&zHH_{r?IYv5TZn>w2P_%*s%=`+vozKdcA^qEmt`|I+vq@JFcNnp8ga z<$VI>)!OBWCwc{ReI|YS`@nQPfKW(Ia5FsNZ$kslJ@Q}Pcc?<6D8~=yKNixXIDQ{6 z6d`@upA_XnDF|)mLi$9fq0y|*f>OFcQ1TR)5cP-Ne~@%p?z=@_PTYHK#>p?q;_{sCoiL<3 Mn*~>EQ?Rk@zX|n&%K!iX diff --git a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeDetermineCompilerABI_CXX.bin deleted file mode 100755 index ee268c0505df7bc55aab1046342c263205c720a2..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 16560 zcmeHOeQX>@6`%9j$)$1bE^PuP3C&VcVbgkJo5Wl~P3~-;y@tz26Puc*>Gte9+eh!K zcYD+>A&ulV$`K5uLTac)DJh^xMWXxxm5?ZoOcMzys1c$KlnT>O;i4pULW2xVa=bS) z@4UM{t13lEh#hP1&HK&!n0+(5p52}Ia5&Oc<#I79ZuV)0T+lC&plrx)krg087GNvj z_rq)*TLOGF$3%Nj5NH+UY?YOIB<==^dUaT-K-UQvJcvR)M2dQg6>X_#Arz1OG-Lx?oYfL86h0(^*Kx<>`CN-Z?TexfN7y7_C z)xD#Sftg9fWElBatdcyoCsv<&{$!x*C+~DU)A07TUq!xgbn14pfj&_N3+mI9ARc|7 z44(htJHK0_#2=|gY#AIrINHO%J^zJe9WVdv+~fPt#DATt-TK7xAAa`S61w09uQUQN<5xgI8Kl>o_2dzrF#F-6$ zlH+x(&W0}s{1!OuB?^E7_U(4Q1o%oEDMe_|eEJHoH!?5Ft`vA&5QY@-pqxM(CH@_t zepa`j{~wd`4bo1xl)qi#(-Oz=;sxf_AWoxJrt5>FQGFW!hZA`tp6lJ-k<6syz0rXrXvbqwBMK@=gb`qdQ<=21sDt`W zsK*j%y^xQ`%+|rU0T$8-4&?Ksj_xWt>yGracjzr@i@I5yl$fzDhJRK3SJd%W6v5Bm zehX_7Fnz1oi?W^Wk91#BWZdTDeUtEMIWC@{P$ZoAv)crY*9!SYWZHy_-U_)H6HeDI zw#=Gvnlp&cnQ-!rxKo@6I1z9n;6%WQfD-{H0{<%!_?z$Me`@3BJ=&3)-@#f}dvwyM zD!rtQ|I#zXPocE=7{HfHw>|^Jx1OOqa6jid$r>0+W4PmclAalY7W8D zOPg5X_&;tUA$@9SNcF9M1pCLw2S*b9@^LPYEN^yxoCr7(a3bJDz=?np0Ve`Z1e^#s5pW{l zMBx7<0{FegTzYnN?cAD&?@^f{J(e|cdz%9Lu$|-4fy7?eFMxn+t@~5>%@Dt{%)C`9 zWr5BCJqpw_TPorAzDq!#0~)wgD!l~sIM6!zQ3k(_VsSmRo4H2)uC=vGJ&!>f;_Kiz z4z}<~opmndUwk$|brT#}z&YUccX{hR<6Hiq=OEj*X6wg4vEddJNBw)?=qEV@p`c9z zjxEq9{*5l|^&hJ0Sh3^)I0hVE8L)4{aUZnvZ-HH2|JSQ}ymeo5hrP-~b=X_~)tXLk z)1f7rH!!}m+Z#-K10ioy$Xnm;RocCE?OuPo*Mnag*&pCI40g)j{D60g69FdzP6V6? zI1z9n;6%WQfD-{H0!{?}+Yz9Bb+nI8K8}_5%GFYb_(K+hecqzX$o+U9l05C#TPu0m z3y1qfvCzIfeD1Wt5V-LP)HjEWsAB=ZE9>TaIX14OOx8PNo{Em_`5rF z!>p>SaN=%w=Ro_@%~ss7`$<|U&d&h zt@sV)`DDdmcFOCPtMAY4|^O^S7n_Jzm!+Er# z{7sCmYpeXK^7U-R;p(d}|J>{Yi6E&{GdT{H2(YhwO_)eK^NFlXeA z0_->%Wb>&Bx{=ZcF*zZR83`GEIGGuUCiR$+$>sHEVU!JKQrTqOh{x1GQ)_c&A)fT0 zM{~L88001xxiL1Bi>BgwtdL5Lfr^RKF@wP(+Oa))f4rl=zXKd4lJQ)qy+<9)W|@9> zq`5Vb9?IyZm)wX3I0$dJ!E)E`(Dtw%-qEQ;)`ZnIrbxu{8GR(0j$ztG=jV5Xw)b>c z#dr<}K#)Z_xByEu4?#RyeP(e+#vP?~9jJP_SE~wdDCL7Ng zVzkbpd_L`*_3l#NDom~ruuXnusLv9UC`5Y)(tmM_M0`9vmdVRUHA#gkD~U@A|0 zQL{;d;g33;fr=3ygrP|Cuy$24nKCSDBDmHn${$0@icUV(X|LHk`=q{-*m*3@eJeiF`1)m{E zpVo;)4`OhkU>~tc=TFZE3Bd4_NuSn}MCmyNM0kfh$1OH4@#8#qB_!V z!(rA}q#jW+M>@n4J!aFV^)peDTTK61n|@F#5dFSw!0h&ZY}2Q86H$6zCja*N`@Gbr z_%lUHN{ZK)x!C>x0vfT4q)+R6qIZ~;p>Fqo+NM9M2nC|Ef-V2j_!IC7RB#PSk7M+_ zK>4+HdE$wl16`ja(J0EkKP zGEVxpl@U=PeKV!GV-^jPL3v^0b=(XG^@r|%_`ZbtZqb($cZ1D1`6bzvi|EG!LZa5D IU}M?802n@gkpKVy diff --git a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeSystem.cmake b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeSystem.cmake deleted file mode 100644 index 15b4419..0000000 --- a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CMakeSystem.cmake +++ /dev/null @@ -1,15 +0,0 @@ -set(CMAKE_HOST_SYSTEM "Linux-5.15.0-69-generic") -set(CMAKE_HOST_SYSTEM_NAME "Linux") -set(CMAKE_HOST_SYSTEM_VERSION "5.15.0-69-generic") -set(CMAKE_HOST_SYSTEM_PROCESSOR "x86_64") - - - -set(CMAKE_SYSTEM "Linux-5.15.0-69-generic") -set(CMAKE_SYSTEM_NAME "Linux") -set(CMAKE_SYSTEM_VERSION "5.15.0-69-generic") -set(CMAKE_SYSTEM_PROCESSOR "x86_64") - -set(CMAKE_CROSSCOMPILING "FALSE") - -set(CMAKE_SYSTEM_LOADED 1) diff --git a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c deleted file mode 100644 index d884b50..0000000 --- a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdC/CMakeCCompilerId.c +++ /dev/null @@ -1,671 +0,0 @@ -#ifdef __cplusplus -# error "A C++ compiler has been selected for C." -#endif - -#if defined(__18CXX) -# define ID_VOID_MAIN -#endif -#if defined(__CLASSIC_C__) -/* cv-qualifiers did not exist in K&R C */ -# define const -# define volatile -#endif - - -/* Version number components: V=Version, R=Revision, P=Patch - Version date components: YYYY=Year, MM=Month, DD=Day */ - -#if defined(__INTEL_COMPILER) || defined(__ICC) -# define COMPILER_ID "Intel" -# if defined(_MSC_VER) -# define SIMULATE_ID "MSVC" -# endif -# if defined(__GNUC__) -# define SIMULATE_ID "GNU" -# endif - /* __INTEL_COMPILER = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER/100) -# define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER/10 % 10) -# if defined(__INTEL_COMPILER_UPDATE) -# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER_UPDATE) -# else -# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER % 10) -# endif -# if defined(__INTEL_COMPILER_BUILD_DATE) - /* __INTEL_COMPILER_BUILD_DATE = YYYYMMDD */ -# define COMPILER_VERSION_TWEAK DEC(__INTEL_COMPILER_BUILD_DATE) -# endif -# if defined(_MSC_VER) - /* _MSC_VER = VVRR */ -# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) -# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) -# endif -# if defined(__GNUC__) -# define SIMULATE_VERSION_MAJOR DEC(__GNUC__) -# elif defined(__GNUG__) -# define SIMULATE_VERSION_MAJOR DEC(__GNUG__) -# endif -# if defined(__GNUC_MINOR__) -# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__) -# endif -# if defined(__GNUC_PATCHLEVEL__) -# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) -# endif - -#elif defined(__PATHCC__) -# define COMPILER_ID "PathScale" -# define COMPILER_VERSION_MAJOR DEC(__PATHCC__) -# define COMPILER_VERSION_MINOR DEC(__PATHCC_MINOR__) -# if defined(__PATHCC_PATCHLEVEL__) -# define COMPILER_VERSION_PATCH DEC(__PATHCC_PATCHLEVEL__) -# endif - -#elif defined(__BORLANDC__) && defined(__CODEGEARC_VERSION__) -# define COMPILER_ID "Embarcadero" -# define COMPILER_VERSION_MAJOR HEX(__CODEGEARC_VERSION__>>24 & 0x00FF) -# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF) -# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF) - -#elif defined(__BORLANDC__) -# define COMPILER_ID "Borland" - /* __BORLANDC__ = 0xVRR */ -# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8) -# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF) - -#elif defined(__WATCOMC__) && __WATCOMC__ < 1200 -# define COMPILER_ID "Watcom" - /* __WATCOMC__ = VVRR */ -# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100) -# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) -# if (__WATCOMC__ % 10) > 0 -# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) -# endif - -#elif defined(__WATCOMC__) -# define COMPILER_ID "OpenWatcom" - /* __WATCOMC__ = VVRP + 1100 */ -# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100) -# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) -# if (__WATCOMC__ % 10) > 0 -# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) -# endif - -#elif defined(__SUNPRO_C) -# define COMPILER_ID "SunPro" -# if __SUNPRO_C >= 0x5100 - /* __SUNPRO_C = 0xVRRP */ -# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>12) -# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xFF) -# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF) -# else - /* __SUNPRO_CC = 0xVRP */ -# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>8) -# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xF) -# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF) -# endif - -#elif defined(__HP_cc) -# define COMPILER_ID "HP" - /* __HP_cc = VVRRPP */ -# define COMPILER_VERSION_MAJOR DEC(__HP_cc/10000) -# define COMPILER_VERSION_MINOR DEC(__HP_cc/100 % 100) -# define COMPILER_VERSION_PATCH DEC(__HP_cc % 100) - -#elif defined(__DECC) -# define COMPILER_ID "Compaq" - /* __DECC_VER = VVRRTPPPP */ -# define COMPILER_VERSION_MAJOR DEC(__DECC_VER/10000000) -# define COMPILER_VERSION_MINOR DEC(__DECC_VER/100000 % 100) -# define COMPILER_VERSION_PATCH DEC(__DECC_VER % 10000) - -#elif defined(__IBMC__) && defined(__COMPILER_VER__) -# define COMPILER_ID "zOS" - /* __IBMC__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) - -#elif defined(__ibmxl__) && defined(__clang__) -# define COMPILER_ID "XLClang" -# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__) -# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__) -# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__) -# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__) - - -#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ >= 800 -# define COMPILER_ID "XL" - /* __IBMC__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) - -#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ < 800 -# define COMPILER_ID "VisualAge" - /* __IBMC__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) - -#elif defined(__PGI) -# define COMPILER_ID "PGI" -# define COMPILER_VERSION_MAJOR DEC(__PGIC__) -# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__) -# if defined(__PGIC_PATCHLEVEL__) -# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__) -# endif - -#elif defined(_CRAYC) -# define COMPILER_ID "Cray" -# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR) -# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR) - -#elif defined(__TI_COMPILER_VERSION__) -# define COMPILER_ID "TI" - /* __TI_COMPILER_VERSION__ = VVVRRRPPP */ -# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000) -# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000) -# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000) - -#elif defined(__FUJITSU) || defined(__FCC_VERSION) || defined(__fcc_version) -# define COMPILER_ID "Fujitsu" - -#elif defined(__ghs__) -# define COMPILER_ID "GHS" -/* __GHS_VERSION_NUMBER = VVVVRP */ -# ifdef __GHS_VERSION_NUMBER -# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100) -# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10) -# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10) -# endif - -#elif defined(__TINYC__) -# define COMPILER_ID "TinyCC" - -#elif defined(__BCC__) -# define COMPILER_ID "Bruce" - -#elif defined(__SCO_VERSION__) -# define COMPILER_ID "SCO" - -#elif defined(__ARMCC_VERSION) && !defined(__clang__) -# define COMPILER_ID "ARMCC" -#if __ARMCC_VERSION >= 1000000 - /* __ARMCC_VERSION = VRRPPPP */ - # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000) - # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100) - # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) -#else - /* __ARMCC_VERSION = VRPPPP */ - # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000) - # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10) - # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) -#endif - - -#elif defined(__clang__) && defined(__apple_build_version__) -# define COMPILER_ID "AppleClang" -# if defined(_MSC_VER) -# define SIMULATE_ID "MSVC" -# endif -# define COMPILER_VERSION_MAJOR DEC(__clang_major__) -# define COMPILER_VERSION_MINOR DEC(__clang_minor__) -# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) -# if defined(_MSC_VER) - /* _MSC_VER = VVRR */ -# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) -# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) -# endif -# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__) - -#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION) -# define COMPILER_ID "ARMClang" - # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000) - # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100) - # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION % 10000) -# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION) - -#elif defined(__clang__) -# define COMPILER_ID "Clang" -# if defined(_MSC_VER) -# define SIMULATE_ID "MSVC" -# endif -# define COMPILER_VERSION_MAJOR DEC(__clang_major__) -# define COMPILER_VERSION_MINOR DEC(__clang_minor__) -# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) -# if defined(_MSC_VER) - /* _MSC_VER = VVRR */ -# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) -# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) -# endif - -#elif defined(__GNUC__) -# define COMPILER_ID "GNU" -# define COMPILER_VERSION_MAJOR DEC(__GNUC__) -# if defined(__GNUC_MINOR__) -# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__) -# endif -# if defined(__GNUC_PATCHLEVEL__) -# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) -# endif - -#elif defined(_MSC_VER) -# define COMPILER_ID "MSVC" - /* _MSC_VER = VVRR */ -# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100) -# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100) -# if defined(_MSC_FULL_VER) -# if _MSC_VER >= 1400 - /* _MSC_FULL_VER = VVRRPPPPP */ -# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000) -# else - /* _MSC_FULL_VER = VVRRPPPP */ -# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000) -# endif -# endif -# if defined(_MSC_BUILD) -# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD) -# endif - -#elif defined(__VISUALDSPVERSION__) || defined(__ADSPBLACKFIN__) || defined(__ADSPTS__) || defined(__ADSP21000__) -# define COMPILER_ID "ADSP" -#if defined(__VISUALDSPVERSION__) - /* __VISUALDSPVERSION__ = 0xVVRRPP00 */ -# define COMPILER_VERSION_MAJOR HEX(__VISUALDSPVERSION__>>24) -# define COMPILER_VERSION_MINOR HEX(__VISUALDSPVERSION__>>16 & 0xFF) -# define COMPILER_VERSION_PATCH HEX(__VISUALDSPVERSION__>>8 & 0xFF) -#endif - -#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) -# define COMPILER_ID "IAR" -# if defined(__VER__) && defined(__ICCARM__) -# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000) -# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000) -# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000) -# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) -# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__)) -# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100) -# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100)) -# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__) -# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) -# endif - -#elif defined(__SDCC_VERSION_MAJOR) || defined(SDCC) -# define COMPILER_ID "SDCC" -# if defined(__SDCC_VERSION_MAJOR) -# define COMPILER_VERSION_MAJOR DEC(__SDCC_VERSION_MAJOR) -# define COMPILER_VERSION_MINOR DEC(__SDCC_VERSION_MINOR) -# define COMPILER_VERSION_PATCH DEC(__SDCC_VERSION_PATCH) -# else - /* SDCC = VRP */ -# define COMPILER_VERSION_MAJOR DEC(SDCC/100) -# define COMPILER_VERSION_MINOR DEC(SDCC/10 % 10) -# define COMPILER_VERSION_PATCH DEC(SDCC % 10) -# endif - - -/* These compilers are either not known or too old to define an - identification macro. Try to identify the platform and guess that - it is the native compiler. */ -#elif defined(__hpux) || defined(__hpua) -# define COMPILER_ID "HP" - -#else /* unknown compiler */ -# define COMPILER_ID "" -#endif - -/* Construct the string literal in pieces to prevent the source from - getting matched. Store it in a pointer rather than an array - because some compilers will just produce instructions to fill the - array rather than assigning a pointer to a static array. */ -char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; -#ifdef SIMULATE_ID -char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; -#endif - -#ifdef __QNXNTO__ -char const* qnxnto = "INFO" ":" "qnxnto[]"; -#endif - -#if defined(__CRAYXE) || defined(__CRAYXC) -char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; -#endif - -#define STRINGIFY_HELPER(X) #X -#define STRINGIFY(X) STRINGIFY_HELPER(X) - -/* Identify known platforms by name. */ -#if defined(__linux) || defined(__linux__) || defined(linux) -# define PLATFORM_ID "Linux" - -#elif defined(__CYGWIN__) -# define PLATFORM_ID "Cygwin" - -#elif defined(__MINGW32__) -# define PLATFORM_ID "MinGW" - -#elif defined(__APPLE__) -# define PLATFORM_ID "Darwin" - -#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) -# define PLATFORM_ID "Windows" - -#elif defined(__FreeBSD__) || defined(__FreeBSD) -# define PLATFORM_ID "FreeBSD" - -#elif defined(__NetBSD__) || defined(__NetBSD) -# define PLATFORM_ID "NetBSD" - -#elif defined(__OpenBSD__) || defined(__OPENBSD) -# define PLATFORM_ID "OpenBSD" - -#elif defined(__sun) || defined(sun) -# define PLATFORM_ID "SunOS" - -#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) -# define PLATFORM_ID "AIX" - -#elif defined(__hpux) || defined(__hpux__) -# define PLATFORM_ID "HP-UX" - -#elif defined(__HAIKU__) -# define PLATFORM_ID "Haiku" - -#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) -# define PLATFORM_ID "BeOS" - -#elif defined(__QNX__) || defined(__QNXNTO__) -# define PLATFORM_ID "QNX" - -#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) -# define PLATFORM_ID "Tru64" - -#elif defined(__riscos) || defined(__riscos__) -# define PLATFORM_ID "RISCos" - -#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) -# define PLATFORM_ID "SINIX" - -#elif defined(__UNIX_SV__) -# define PLATFORM_ID "UNIX_SV" - -#elif defined(__bsdos__) -# define PLATFORM_ID "BSDOS" - -#elif defined(_MPRAS) || defined(MPRAS) -# define PLATFORM_ID "MP-RAS" - -#elif defined(__osf) || defined(__osf__) -# define PLATFORM_ID "OSF1" - -#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) -# define PLATFORM_ID "SCO_SV" - -#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) -# define PLATFORM_ID "ULTRIX" - -#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) -# define PLATFORM_ID "Xenix" - -#elif defined(__WATCOMC__) -# if defined(__LINUX__) -# define PLATFORM_ID "Linux" - -# elif defined(__DOS__) -# define PLATFORM_ID "DOS" - -# elif defined(__OS2__) -# define PLATFORM_ID "OS2" - -# elif defined(__WINDOWS__) -# define PLATFORM_ID "Windows3x" - -# else /* unknown platform */ -# define PLATFORM_ID -# endif - -#elif defined(__INTEGRITY) -# if defined(INT_178B) -# define PLATFORM_ID "Integrity178" - -# else /* regular Integrity */ -# define PLATFORM_ID "Integrity" -# endif - -#else /* unknown platform */ -# define PLATFORM_ID - -#endif - -/* For windows compilers MSVC and Intel we can determine - the architecture of the compiler being used. This is because - the compilers do not have flags that can change the architecture, - but rather depend on which compiler is being used -*/ -#if defined(_WIN32) && defined(_MSC_VER) -# if defined(_M_IA64) -# define ARCHITECTURE_ID "IA64" - -# elif defined(_M_X64) || defined(_M_AMD64) -# define ARCHITECTURE_ID "x64" - -# elif defined(_M_IX86) -# define ARCHITECTURE_ID "X86" - -# elif defined(_M_ARM64) -# define ARCHITECTURE_ID "ARM64" - -# elif defined(_M_ARM) -# if _M_ARM == 4 -# define ARCHITECTURE_ID "ARMV4I" -# elif _M_ARM == 5 -# define ARCHITECTURE_ID "ARMV5I" -# else -# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) -# endif - -# elif defined(_M_MIPS) -# define ARCHITECTURE_ID "MIPS" - -# elif defined(_M_SH) -# define ARCHITECTURE_ID "SHx" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__WATCOMC__) -# if defined(_M_I86) -# define ARCHITECTURE_ID "I86" - -# elif defined(_M_IX86) -# define ARCHITECTURE_ID "X86" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) -# if defined(__ICCARM__) -# define ARCHITECTURE_ID "ARM" - -# elif defined(__ICCRX__) -# define ARCHITECTURE_ID "RX" - -# elif defined(__ICCRH850__) -# define ARCHITECTURE_ID "RH850" - -# elif defined(__ICCRL78__) -# define ARCHITECTURE_ID "RL78" - -# elif defined(__ICCRISCV__) -# define ARCHITECTURE_ID "RISCV" - -# elif defined(__ICCAVR__) -# define ARCHITECTURE_ID "AVR" - -# elif defined(__ICC430__) -# define ARCHITECTURE_ID "MSP430" - -# elif defined(__ICCV850__) -# define ARCHITECTURE_ID "V850" - -# elif defined(__ICC8051__) -# define ARCHITECTURE_ID "8051" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__ghs__) -# if defined(__PPC64__) -# define ARCHITECTURE_ID "PPC64" - -# elif defined(__ppc__) -# define ARCHITECTURE_ID "PPC" - -# elif defined(__ARM__) -# define ARCHITECTURE_ID "ARM" - -# elif defined(__x86_64__) -# define ARCHITECTURE_ID "x64" - -# elif defined(__i386__) -# define ARCHITECTURE_ID "X86" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif -#else -# define ARCHITECTURE_ID -#endif - -/* Convert integer to decimal digit literals. */ -#define DEC(n) \ - ('0' + (((n) / 10000000)%10)), \ - ('0' + (((n) / 1000000)%10)), \ - ('0' + (((n) / 100000)%10)), \ - ('0' + (((n) / 10000)%10)), \ - ('0' + (((n) / 1000)%10)), \ - ('0' + (((n) / 100)%10)), \ - ('0' + (((n) / 10)%10)), \ - ('0' + ((n) % 10)) - -/* Convert integer to hex digit literals. */ -#define HEX(n) \ - ('0' + ((n)>>28 & 0xF)), \ - ('0' + ((n)>>24 & 0xF)), \ - ('0' + ((n)>>20 & 0xF)), \ - ('0' + ((n)>>16 & 0xF)), \ - ('0' + ((n)>>12 & 0xF)), \ - ('0' + ((n)>>8 & 0xF)), \ - ('0' + ((n)>>4 & 0xF)), \ - ('0' + ((n) & 0xF)) - -/* Construct a string literal encoding the version number components. */ -#ifdef COMPILER_VERSION_MAJOR -char const info_version[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', - COMPILER_VERSION_MAJOR, -# ifdef COMPILER_VERSION_MINOR - '.', COMPILER_VERSION_MINOR, -# ifdef COMPILER_VERSION_PATCH - '.', COMPILER_VERSION_PATCH, -# ifdef COMPILER_VERSION_TWEAK - '.', COMPILER_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct a string literal encoding the internal version number. */ -#ifdef COMPILER_VERSION_INTERNAL -char const info_version_internal[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', - 'i','n','t','e','r','n','a','l','[', - COMPILER_VERSION_INTERNAL,']','\0'}; -#endif - -/* Construct a string literal encoding the version number components. */ -#ifdef SIMULATE_VERSION_MAJOR -char const info_simulate_version[] = { - 'I', 'N', 'F', 'O', ':', - 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', - SIMULATE_VERSION_MAJOR, -# ifdef SIMULATE_VERSION_MINOR - '.', SIMULATE_VERSION_MINOR, -# ifdef SIMULATE_VERSION_PATCH - '.', SIMULATE_VERSION_PATCH, -# ifdef SIMULATE_VERSION_TWEAK - '.', SIMULATE_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct the string literal in pieces to prevent the source from - getting matched. Store it in a pointer rather than an array - because some compilers will just produce instructions to fill the - array rather than assigning a pointer to a static array. */ -char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; -char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; - - - - -#if !defined(__STDC__) -# if (defined(_MSC_VER) && !defined(__clang__)) \ - || (defined(__ibmxl__) || defined(__IBMC__)) -# define C_DIALECT "90" -# else -# define C_DIALECT -# endif -#elif __STDC_VERSION__ >= 201000L -# define C_DIALECT "11" -#elif __STDC_VERSION__ >= 199901L -# define C_DIALECT "99" -#else -# define C_DIALECT "90" -#endif -const char* info_language_dialect_default = - "INFO" ":" "dialect_default[" C_DIALECT "]"; - -/*--------------------------------------------------------------------------*/ - -#ifdef ID_VOID_MAIN -void main() {} -#else -# if defined(__CLASSIC_C__) -int main(argc, argv) int argc; char *argv[]; -# else -int main(int argc, char* argv[]) -# endif -{ - int require = 0; - require += info_compiler[argc]; - require += info_platform[argc]; - require += info_arch[argc]; -#ifdef COMPILER_VERSION_MAJOR - require += info_version[argc]; -#endif -#ifdef COMPILER_VERSION_INTERNAL - require += info_version_internal[argc]; -#endif -#ifdef SIMULATE_ID - require += info_simulate[argc]; -#endif -#ifdef SIMULATE_VERSION_MAJOR - require += info_simulate_version[argc]; -#endif -#if defined(__CRAYXE) || defined(__CRAYXC) - require += info_cray[argc]; -#endif - require += info_language_dialect_default[argc]; - (void)argv; - return require; -} -#endif diff --git a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdC/a.out b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdC/a.out deleted file mode 100755 index b5c91a373fc518990e2aec59df62ee3a3ddb612a..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 16712 zcmeHOeQX>@6`%9jiPI)$Cv}LMwDpn?$)WY-Y!c(7HNCTa&K|OpHnC}t>n>~G**>@r zbGJwBij+Xo!VwGsB2oT8ii!jX!XM?2ejovkLJO?`H3Eg8f=GcDgF@<-2Dy;tcyH#t z^X~dwB+4HM?MSz8=J!7L&FtRJ?##!deZ5sapWxyb?-kez*DEAUjM_a^0TLD+VhtQ` z7B`6%(5{x4;)fLht|}L*oV1p3KTy!ESR#tyFrh- zmL%Sqa5o{P%rC01oB}dwK?nuR3QprqVs%5I9y`_C;FrN*!Nyiu$`oJ-@ zci*4@GqZ?M8f9NJP#gI#?vB2&W!v2^9*Cd%;uyqyi0l>5h_~4OYn4tZP@HYQhLc5kED`TFGRLR+gC3v}Hwevu5+ zh83T2Zr8hTO;d7>E<8uL=E6Tkc(V)t65$u_6tdu0!1Lj9(T4LmBX7=z^Vmdu-iGrv zhWLUFm-kBqz2arS%Yc^wF9Ti%ybO35@G|g!lYzh0-SQ9p=%rfyc+IbO2%$eTYgLt= z*N^_F_N+X|(ym7Veyz0aYe4Fn1j<9}`?A#|WV`jRvEsS=^y2UJqko*gYoKqY<~%%_ z>N9H$NjlGfrPBHwsJwncpXq!GD*8;#caiK~u-1d?eOL$At4bH^nvS63vqV9@DCKv3 z63O;!dU0MqbNNpF%z|I{J)@tyW;K9;ZDgRfbaAY%3F2aXjQ2=q6xgD0>!5zLvkI$v z@g-}ue!O!9H0HLKN~O6t9G!cp+V3q9=@a(3m1PJy^3M#$Jajx zGxg)qOZp?a@A&H)6xL&!M^QpVjs`dT`QIJGjIB>rq&lIzkS8m z`ihr(ihqif8h)oAJ?qnV|F-ZK?Ej(R$i0!_$bAvx?ATbauIU(_uk3Fe8R%DzoAOAJ zZ13P@z{`M_0WSky2D}V-8SpaTWx&gTmjN#W|Dzf3IleY74KlW`cmJNzYmBgqeM;wPnCk%@~Wnp`_usqR!mQ=hTE>+;v94Tb1 zg0?#d6Z@9df^4-u*cJ+gb_UzFEBxOF5J?OZ>s44D0PrrCa`TBIq zZ-5sfc0|?vaJ7dj;(Rw+)WPepTD)3XL{ts$YgHm3CSCc2^%fF8<-*@dINv9g6(QaO z6&SVUc+ek~UikUoZ4lr0BnSswoR5C_zRUPDRD5D-J|6+RQvA!E*SDpeb>f#8u&Y$E z^OTgiVM(0N0q(=QsjI(!LGpaRXBRKa%F^-khP1P^e;;FyP5+INs3Lr(*(hw;`CX3L6>lYE%Q?G9o;LH6rO zp8xNj1|03UucLEhXFK_o?<&C-uHae=`D}LCc^z>$U$-6TT%m!UyKDq}vm1nVJK&g~ zu%?)8B-1VN4MGbmfa4dVIV*1!U?tM1Slk|BSZQMvH;Ck6b4WaEjHj|AX3B_L*<9W* z3sVB$T&EINA|C7rwYOFl!mTMu!_4K(X(N%ba?@fgXQmTIypT>$gNm(XfTZOR?d~@} zoapYR7v!-xgl8DN2O|AZBf780fL$t1owzW1KCmy+AM18<CYsTFK}P@9+h!7R(=u6Qao~q% z7tC=;xbvMqh{N_DP9yFMs<_$5xxL7FQqn$slu)tYHwGbs`RTM}jsUfCicWAXnSpIb zlOmYOT8ZFzrVyOWWhWCkYuW~l6q2wpEEy*#(iLm5%yA*bC(QhW2*#%~;6hO=r#Kvk z6r+X#yj&t>qJjv@lm#bKmcT=BJPQ>oF$G5)q9B=-JsC_)(4d@%gFd&Ez8alMgX>`2 zOeaSn92^Ki=mZgjPD#UPr_1hb6PyRYtpRTXvhZ^qQ=SJ9Tgq}B=@$6mGcxP*^B+?U zc=l4hFA&%c)UJPso(Gw3wJSrN@5cAVx$y8%OqHg_r0RKBY>vQ}(zhTP$@!J&^ zcl;(`IJaSap8qgCfl5&D95K(V&-0cfV0g-`&(E<;dHw_Dy(m(Ja+7&A0&f1UD$XX-v&R9hwp!@0OQ#0`rpJq1}Ob5>24 & 0x00FF) -# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF) -# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF) - -#elif defined(__BORLANDC__) -# define COMPILER_ID "Borland" - /* __BORLANDC__ = 0xVRR */ -# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8) -# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF) - -#elif defined(__WATCOMC__) && __WATCOMC__ < 1200 -# define COMPILER_ID "Watcom" - /* __WATCOMC__ = VVRR */ -# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100) -# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) -# if (__WATCOMC__ % 10) > 0 -# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) -# endif - -#elif defined(__WATCOMC__) -# define COMPILER_ID "OpenWatcom" - /* __WATCOMC__ = VVRP + 1100 */ -# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100) -# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) -# if (__WATCOMC__ % 10) > 0 -# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) -# endif - -#elif defined(__SUNPRO_CC) -# define COMPILER_ID "SunPro" -# if __SUNPRO_CC >= 0x5100 - /* __SUNPRO_CC = 0xVRRP */ -# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>12) -# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xFF) -# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) -# else - /* __SUNPRO_CC = 0xVRP */ -# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>8) -# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xF) -# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) -# endif - -#elif defined(__HP_aCC) -# define COMPILER_ID "HP" - /* __HP_aCC = VVRRPP */ -# define COMPILER_VERSION_MAJOR DEC(__HP_aCC/10000) -# define COMPILER_VERSION_MINOR DEC(__HP_aCC/100 % 100) -# define COMPILER_VERSION_PATCH DEC(__HP_aCC % 100) - -#elif defined(__DECCXX) -# define COMPILER_ID "Compaq" - /* __DECCXX_VER = VVRRTPPPP */ -# define COMPILER_VERSION_MAJOR DEC(__DECCXX_VER/10000000) -# define COMPILER_VERSION_MINOR DEC(__DECCXX_VER/100000 % 100) -# define COMPILER_VERSION_PATCH DEC(__DECCXX_VER % 10000) - -#elif defined(__IBMCPP__) && defined(__COMPILER_VER__) -# define COMPILER_ID "zOS" - /* __IBMCPP__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) - -#elif defined(__ibmxl__) && defined(__clang__) -# define COMPILER_ID "XLClang" -# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__) -# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__) -# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__) -# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__) - - -#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ >= 800 -# define COMPILER_ID "XL" - /* __IBMCPP__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) - -#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ < 800 -# define COMPILER_ID "VisualAge" - /* __IBMCPP__ = VRP */ -# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) -# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) -# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) - -#elif defined(__PGI) -# define COMPILER_ID "PGI" -# define COMPILER_VERSION_MAJOR DEC(__PGIC__) -# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__) -# if defined(__PGIC_PATCHLEVEL__) -# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__) -# endif - -#elif defined(_CRAYC) -# define COMPILER_ID "Cray" -# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR) -# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR) - -#elif defined(__TI_COMPILER_VERSION__) -# define COMPILER_ID "TI" - /* __TI_COMPILER_VERSION__ = VVVRRRPPP */ -# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000) -# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000) -# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000) - -#elif defined(__FUJITSU) || defined(__FCC_VERSION) || defined(__fcc_version) -# define COMPILER_ID "Fujitsu" - -#elif defined(__ghs__) -# define COMPILER_ID "GHS" -/* __GHS_VERSION_NUMBER = VVVVRP */ -# ifdef __GHS_VERSION_NUMBER -# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100) -# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10) -# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10) -# endif - -#elif defined(__SCO_VERSION__) -# define COMPILER_ID "SCO" - -#elif defined(__ARMCC_VERSION) && !defined(__clang__) -# define COMPILER_ID "ARMCC" -#if __ARMCC_VERSION >= 1000000 - /* __ARMCC_VERSION = VRRPPPP */ - # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000) - # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100) - # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) -#else - /* __ARMCC_VERSION = VRPPPP */ - # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000) - # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10) - # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) -#endif - - -#elif defined(__clang__) && defined(__apple_build_version__) -# define COMPILER_ID "AppleClang" -# if defined(_MSC_VER) -# define SIMULATE_ID "MSVC" -# endif -# define COMPILER_VERSION_MAJOR DEC(__clang_major__) -# define COMPILER_VERSION_MINOR DEC(__clang_minor__) -# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) -# if defined(_MSC_VER) - /* _MSC_VER = VVRR */ -# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) -# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) -# endif -# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__) - -#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION) -# define COMPILER_ID "ARMClang" - # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000) - # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100) - # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION % 10000) -# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION) - -#elif defined(__clang__) -# define COMPILER_ID "Clang" -# if defined(_MSC_VER) -# define SIMULATE_ID "MSVC" -# endif -# define COMPILER_VERSION_MAJOR DEC(__clang_major__) -# define COMPILER_VERSION_MINOR DEC(__clang_minor__) -# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) -# if defined(_MSC_VER) - /* _MSC_VER = VVRR */ -# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) -# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) -# endif - -#elif defined(__GNUC__) || defined(__GNUG__) -# define COMPILER_ID "GNU" -# if defined(__GNUC__) -# define COMPILER_VERSION_MAJOR DEC(__GNUC__) -# else -# define COMPILER_VERSION_MAJOR DEC(__GNUG__) -# endif -# if defined(__GNUC_MINOR__) -# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__) -# endif -# if defined(__GNUC_PATCHLEVEL__) -# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) -# endif - -#elif defined(_MSC_VER) -# define COMPILER_ID "MSVC" - /* _MSC_VER = VVRR */ -# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100) -# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100) -# if defined(_MSC_FULL_VER) -# if _MSC_VER >= 1400 - /* _MSC_FULL_VER = VVRRPPPPP */ -# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000) -# else - /* _MSC_FULL_VER = VVRRPPPP */ -# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000) -# endif -# endif -# if defined(_MSC_BUILD) -# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD) -# endif - -#elif defined(__VISUALDSPVERSION__) || defined(__ADSPBLACKFIN__) || defined(__ADSPTS__) || defined(__ADSP21000__) -# define COMPILER_ID "ADSP" -#if defined(__VISUALDSPVERSION__) - /* __VISUALDSPVERSION__ = 0xVVRRPP00 */ -# define COMPILER_VERSION_MAJOR HEX(__VISUALDSPVERSION__>>24) -# define COMPILER_VERSION_MINOR HEX(__VISUALDSPVERSION__>>16 & 0xFF) -# define COMPILER_VERSION_PATCH HEX(__VISUALDSPVERSION__>>8 & 0xFF) -#endif - -#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) -# define COMPILER_ID "IAR" -# if defined(__VER__) && defined(__ICCARM__) -# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000) -# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000) -# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000) -# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) -# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__)) -# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100) -# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100)) -# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__) -# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) -# endif - - -/* These compilers are either not known or too old to define an - identification macro. Try to identify the platform and guess that - it is the native compiler. */ -#elif defined(__hpux) || defined(__hpua) -# define COMPILER_ID "HP" - -#else /* unknown compiler */ -# define COMPILER_ID "" -#endif - -/* Construct the string literal in pieces to prevent the source from - getting matched. Store it in a pointer rather than an array - because some compilers will just produce instructions to fill the - array rather than assigning a pointer to a static array. */ -char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; -#ifdef SIMULATE_ID -char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; -#endif - -#ifdef __QNXNTO__ -char const* qnxnto = "INFO" ":" "qnxnto[]"; -#endif - -#if defined(__CRAYXE) || defined(__CRAYXC) -char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; -#endif - -#define STRINGIFY_HELPER(X) #X -#define STRINGIFY(X) STRINGIFY_HELPER(X) - -/* Identify known platforms by name. */ -#if defined(__linux) || defined(__linux__) || defined(linux) -# define PLATFORM_ID "Linux" - -#elif defined(__CYGWIN__) -# define PLATFORM_ID "Cygwin" - -#elif defined(__MINGW32__) -# define PLATFORM_ID "MinGW" - -#elif defined(__APPLE__) -# define PLATFORM_ID "Darwin" - -#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) -# define PLATFORM_ID "Windows" - -#elif defined(__FreeBSD__) || defined(__FreeBSD) -# define PLATFORM_ID "FreeBSD" - -#elif defined(__NetBSD__) || defined(__NetBSD) -# define PLATFORM_ID "NetBSD" - -#elif defined(__OpenBSD__) || defined(__OPENBSD) -# define PLATFORM_ID "OpenBSD" - -#elif defined(__sun) || defined(sun) -# define PLATFORM_ID "SunOS" - -#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) -# define PLATFORM_ID "AIX" - -#elif defined(__hpux) || defined(__hpux__) -# define PLATFORM_ID "HP-UX" - -#elif defined(__HAIKU__) -# define PLATFORM_ID "Haiku" - -#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) -# define PLATFORM_ID "BeOS" - -#elif defined(__QNX__) || defined(__QNXNTO__) -# define PLATFORM_ID "QNX" - -#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) -# define PLATFORM_ID "Tru64" - -#elif defined(__riscos) || defined(__riscos__) -# define PLATFORM_ID "RISCos" - -#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) -# define PLATFORM_ID "SINIX" - -#elif defined(__UNIX_SV__) -# define PLATFORM_ID "UNIX_SV" - -#elif defined(__bsdos__) -# define PLATFORM_ID "BSDOS" - -#elif defined(_MPRAS) || defined(MPRAS) -# define PLATFORM_ID "MP-RAS" - -#elif defined(__osf) || defined(__osf__) -# define PLATFORM_ID "OSF1" - -#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) -# define PLATFORM_ID "SCO_SV" - -#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) -# define PLATFORM_ID "ULTRIX" - -#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) -# define PLATFORM_ID "Xenix" - -#elif defined(__WATCOMC__) -# if defined(__LINUX__) -# define PLATFORM_ID "Linux" - -# elif defined(__DOS__) -# define PLATFORM_ID "DOS" - -# elif defined(__OS2__) -# define PLATFORM_ID "OS2" - -# elif defined(__WINDOWS__) -# define PLATFORM_ID "Windows3x" - -# else /* unknown platform */ -# define PLATFORM_ID -# endif - -#elif defined(__INTEGRITY) -# if defined(INT_178B) -# define PLATFORM_ID "Integrity178" - -# else /* regular Integrity */ -# define PLATFORM_ID "Integrity" -# endif - -#else /* unknown platform */ -# define PLATFORM_ID - -#endif - -/* For windows compilers MSVC and Intel we can determine - the architecture of the compiler being used. This is because - the compilers do not have flags that can change the architecture, - but rather depend on which compiler is being used -*/ -#if defined(_WIN32) && defined(_MSC_VER) -# if defined(_M_IA64) -# define ARCHITECTURE_ID "IA64" - -# elif defined(_M_X64) || defined(_M_AMD64) -# define ARCHITECTURE_ID "x64" - -# elif defined(_M_IX86) -# define ARCHITECTURE_ID "X86" - -# elif defined(_M_ARM64) -# define ARCHITECTURE_ID "ARM64" - -# elif defined(_M_ARM) -# if _M_ARM == 4 -# define ARCHITECTURE_ID "ARMV4I" -# elif _M_ARM == 5 -# define ARCHITECTURE_ID "ARMV5I" -# else -# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) -# endif - -# elif defined(_M_MIPS) -# define ARCHITECTURE_ID "MIPS" - -# elif defined(_M_SH) -# define ARCHITECTURE_ID "SHx" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__WATCOMC__) -# if defined(_M_I86) -# define ARCHITECTURE_ID "I86" - -# elif defined(_M_IX86) -# define ARCHITECTURE_ID "X86" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) -# if defined(__ICCARM__) -# define ARCHITECTURE_ID "ARM" - -# elif defined(__ICCRX__) -# define ARCHITECTURE_ID "RX" - -# elif defined(__ICCRH850__) -# define ARCHITECTURE_ID "RH850" - -# elif defined(__ICCRL78__) -# define ARCHITECTURE_ID "RL78" - -# elif defined(__ICCRISCV__) -# define ARCHITECTURE_ID "RISCV" - -# elif defined(__ICCAVR__) -# define ARCHITECTURE_ID "AVR" - -# elif defined(__ICC430__) -# define ARCHITECTURE_ID "MSP430" - -# elif defined(__ICCV850__) -# define ARCHITECTURE_ID "V850" - -# elif defined(__ICC8051__) -# define ARCHITECTURE_ID "8051" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__ghs__) -# if defined(__PPC64__) -# define ARCHITECTURE_ID "PPC64" - -# elif defined(__ppc__) -# define ARCHITECTURE_ID "PPC" - -# elif defined(__ARM__) -# define ARCHITECTURE_ID "ARM" - -# elif defined(__x86_64__) -# define ARCHITECTURE_ID "x64" - -# elif defined(__i386__) -# define ARCHITECTURE_ID "X86" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif -#else -# define ARCHITECTURE_ID -#endif - -/* Convert integer to decimal digit literals. */ -#define DEC(n) \ - ('0' + (((n) / 10000000)%10)), \ - ('0' + (((n) / 1000000)%10)), \ - ('0' + (((n) / 100000)%10)), \ - ('0' + (((n) / 10000)%10)), \ - ('0' + (((n) / 1000)%10)), \ - ('0' + (((n) / 100)%10)), \ - ('0' + (((n) / 10)%10)), \ - ('0' + ((n) % 10)) - -/* Convert integer to hex digit literals. */ -#define HEX(n) \ - ('0' + ((n)>>28 & 0xF)), \ - ('0' + ((n)>>24 & 0xF)), \ - ('0' + ((n)>>20 & 0xF)), \ - ('0' + ((n)>>16 & 0xF)), \ - ('0' + ((n)>>12 & 0xF)), \ - ('0' + ((n)>>8 & 0xF)), \ - ('0' + ((n)>>4 & 0xF)), \ - ('0' + ((n) & 0xF)) - -/* Construct a string literal encoding the version number components. */ -#ifdef COMPILER_VERSION_MAJOR -char const info_version[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', - COMPILER_VERSION_MAJOR, -# ifdef COMPILER_VERSION_MINOR - '.', COMPILER_VERSION_MINOR, -# ifdef COMPILER_VERSION_PATCH - '.', COMPILER_VERSION_PATCH, -# ifdef COMPILER_VERSION_TWEAK - '.', COMPILER_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct a string literal encoding the internal version number. */ -#ifdef COMPILER_VERSION_INTERNAL -char const info_version_internal[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', - 'i','n','t','e','r','n','a','l','[', - COMPILER_VERSION_INTERNAL,']','\0'}; -#endif - -/* Construct a string literal encoding the version number components. */ -#ifdef SIMULATE_VERSION_MAJOR -char const info_simulate_version[] = { - 'I', 'N', 'F', 'O', ':', - 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', - SIMULATE_VERSION_MAJOR, -# ifdef SIMULATE_VERSION_MINOR - '.', SIMULATE_VERSION_MINOR, -# ifdef SIMULATE_VERSION_PATCH - '.', SIMULATE_VERSION_PATCH, -# ifdef SIMULATE_VERSION_TWEAK - '.', SIMULATE_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct the string literal in pieces to prevent the source from - getting matched. Store it in a pointer rather than an array - because some compilers will just produce instructions to fill the - array rather than assigning a pointer to a static array. */ -char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; -char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; - - - - -#if defined(__INTEL_COMPILER) && defined(_MSVC_LANG) && _MSVC_LANG < 201403L -# if defined(__INTEL_CXX11_MODE__) -# if defined(__cpp_aggregate_nsdmi) -# define CXX_STD 201402L -# else -# define CXX_STD 201103L -# endif -# else -# define CXX_STD 199711L -# endif -#elif defined(_MSC_VER) && defined(_MSVC_LANG) -# define CXX_STD _MSVC_LANG -#else -# define CXX_STD __cplusplus -#endif - -const char* info_language_dialect_default = "INFO" ":" "dialect_default[" -#if CXX_STD > 201703L - "20" -#elif CXX_STD >= 201703L - "17" -#elif CXX_STD >= 201402L - "14" -#elif CXX_STD >= 201103L - "11" -#else - "98" -#endif -"]"; - -/*--------------------------------------------------------------------------*/ - -int main(int argc, char* argv[]) -{ - int require = 0; - require += info_compiler[argc]; - require += info_platform[argc]; -#ifdef COMPILER_VERSION_MAJOR - require += info_version[argc]; -#endif -#ifdef COMPILER_VERSION_INTERNAL - require += info_version_internal[argc]; -#endif -#ifdef SIMULATE_ID - require += info_simulate[argc]; -#endif -#ifdef SIMULATE_VERSION_MAJOR - require += info_simulate_version[argc]; -#endif -#if defined(__CRAYXE) || defined(__CRAYXC) - require += info_cray[argc]; -#endif - require += info_language_dialect_default[argc]; - (void)argv; - return require; -} diff --git a/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdCXX/a.out b/rad-sim/example-designs/mult/CMakeFiles/3.16.3/CompilerIdCXX/a.out deleted file mode 100755 index 2881803fe1c1315653cec8eead6766e2c9b69693..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 16720 zcmeHOe{3699e<9KHtkx+{k4X6TW+P5(v7%ImWH$})K22`jNEo>lP!>C$HjIM3&#%j znI_XZT2h9r5~#FFOai28NC>n_1O6BSX^^U02Z*s%LR(QmM6hZZDqS`h3ed%Tzwf?Z z=kDSTiSZBUp5*(y_xb*K@4oNd`QF`opO3_PsyrUS$tylCuoUu}Oo#;jy_5k6iFUCT zj<<{3#0n@^OU{&sOaQ5wE?3#HmUu59+SOyG0^VlQP=lGcg@|Z(v($(Ug2X83JkYKN z1ypw8ZfYkZ%ggmCXbee_$1+|<1xSomJ8a5)lN5{j4m*aZK9!K|uqaOSN@1VodPYPVsc2VtOez-)YxRc24XjJ4UPn(~+x2;yI(23lmr*e96m7?S&JMes`|;eE#*9SDz@{#Xhi3)WL-IJS4D; zd8`9<%=141IU37=my*94lf+F9?Z7J)WLtn+UxDuhPN~4hZ^GXK{I&}E0^%3PaJ30d zi%;mP-UD6f zY$n;O52ev^WGtH@OU+cRs3_ZGMv-Ibfe2y@d0Z5>q*h^cKSFKi>yxhwWt}NlpzD_T zS#nStGUd#3+3(;L#nh{J@HyfY2mdAF8y)-;#9!VgWWuq4=fi2%!t*(!Y|g^-*hGHb z!t*tT{DOs-_e&(*|9if^XmEQ`_%IbUe$9^y|id-1P43FL2YSvxUK=(#rD|V;~fzYi^AP~>QqM+ zX4T?VV~u*MV+9oEc9u$|xda?8*4z$d&mh>^?B6^JLUhyzcEw}Y)M8=w#mEh8rh01A zFJPvADsoMIQuVx2_pGS<$&4p*1Na|T;!VZrO)vN$n$K4I%i7Fj;Uv}t z;Sb4phaZehciaOrm+%A8;;Z4lXz|@}Z@74)Pn~Ys4)l@O&iAlS=NcAECH4G!UZbJ; z3dJ*4d?!}C-d%hnT-x}1b?Smg-SfM`pRm6N2Ez}92g47CwF|>bb>eB`NI;b1q&zZY zliY(F0XG6}1l$O?5pW~mM!=1L8v!>0ZUo#2{EtMyWBb~;ywTBvJ%{$jvt#3_bTT&p zUnvLeIySlXxnwS%%4P(fbxlyo=(OM z_!Ky-7t+Q+bL*h+Z1sK&zh~mNFXOFJDGhiM@C@J?K>T)jY`#=F2Uz`fsq{-g18^g} zhQM#Jm^_ah7M=;eXX~1kwWo>4H3scqk8cJ<_e%MNZ#!gLu?)NfIa+&M z?Ax;Uu6wp`Loxb&2!3FS8D@yj*czTo34RA2kl%Kg4j#@8P91;f6^PM^~0tMByrJAJkC zd**M!ydV6y-|H}tZgL~wM!=1L8v!>0ZUo#2xDjw8;6{KW!0Q@$9V1MEWMW*yinPvg zEtMN-vFL}W%@P^)yVQ1S0R2z^3^6S zjuGN|Q%v`_JX=Jg)geI{d3e_ z_%bZZ96y+b$?~ft|2vhr9pv`E2fRM~1A653tBPVe;`OP#9+lUh?(gc_t2Fiv6*5La z*%N??eN%HmmYN@H2?m0#ftH;n|L+^*g%zyz++h}VFT9iB_3IWI)<$~;uTQu0)#A~L zern3&%&xzpJihGwO2OmM&esa=PdmR#@HnvZs|AlYI}f9mt}8pgMkp2ewIW!N_m%f& z*!|QAzE15tI8m&OnfHoy<@NVgsTWp;&sEglP~OL2*WXya-t9bGofXEXSKL~@KJEIO zg$P+0Gw+3~Jy?i$A^Eco{!ZfgK52Rp;-ip( zQCn^g)`zJFeja!m#P>Z(!T}fOW4(OeWgg!NdBpN~J_&rK_CF)_{UW4522zU&;G?qs zdEh;_)p$}Bi3`Q_v1e&GFLbGg6RWEb%3tCn9c{m8SD1&@*+=lDDc zykgPg>=VGRtJ*C1zRLVrd+lA|ktei(=CA@*$I zG13pwc-}?gm&m`L^!b1A3h?MBNIa>FH^|RUs#m_l1mQLEFki6))GcG zm)G>dgupk~>7zphO_)i9Q^bg4j+hUk%QeD>|L>YN(im{lLx~G zqFr{0+#~}Oym!|kDtS=54-0L7>`-SorXA|(ITGpBdc&Qu2zr%UYvTEWJg4{HOp{FL zhR!BSyKzDx+jblcwahIypljcMqb2fLZB)-BaBoiZ5NIV*8Lf~{CWJh7e#y_3V7oAY zrj$P_fOIIIrz+%rAZeV|Gb06k1iHcgB>>c6QxJy{cMDbA0%YHGWIrkCA3rt-5y(%D z8Tt^Qku!0WbEypMKN=T-Ox8#SMlyxKcrH7h%o&pwYN(Kc9b%~jQQ^*LlcA3YsXnUb zM@1kpnSm-yG;*edzLMAq8pv|Vw2lTMAfpr*Pa6Ucfsrg^jN}9yajb%7R(4(>IZC5* zGy(QpGVRS_YFcm}oa@EkGDY|rzT6mWRTY|qcLj69D56`9b7 zHGLKeIHzHIe(q)D`60KT^%x%mdz>S2nV*jt6{^hHexk)RWH6>|&(G0}3N@JPcb@;( zz!p_lj(@c>5%PSM*k%3yO%Pb^6|!SwcWlpP#-|+i{QS6e1IDY44s-hZ zzQdm91B^VM=lY%F_lIQ9@fQkd5}uWbm1ur-S@_%KLwv`dnuGBiPni?D=_qp$SMxtY?;%%FMq70vvl>fBCr? z)^}r?q5i}1kBRNLAHNM8s<1u3$C#l9xe&;#iR~E|KxnlWA<_<-NI>LL{Y)%E27Ph; z{5%&VL#~JQ>2$a#yg(r5tcUIIE^C?@wzndW9jof6$)QRYHeScrCEOmq|E&U!+itc0 e4*oGfdcfhF>oukL>{;1 - -void* test_func(void* data) -{ - return data; -} - -int main(void) -{ - pthread_t thread; - pthread_create(&thread, NULL, test_func, NULL); - pthread_detach(thread); - pthread_join(thread, NULL); - pthread_atfork(NULL, NULL, NULL); - pthread_exit(NULL); - - return 0; -} - diff --git a/rad-sim/example-designs/mult/CMakeFiles/CMakeOutput.log b/rad-sim/example-designs/mult/CMakeFiles/CMakeOutput.log deleted file mode 100644 index 71dd668..0000000 --- a/rad-sim/example-designs/mult/CMakeFiles/CMakeOutput.log +++ /dev/null @@ -1,477 +0,0 @@ -The system is: Linux - 5.15.0-69-generic - x86_64 -Compiling the C compiler identification source file "CMakeCCompilerId.c" succeeded. -Compiler: /usr/bin/cc -Build flags: -Id flags: - -The output was: -0 - - -Compilation of the C compiler identification source "CMakeCCompilerId.c" produced "a.out" - -The C compiler identification is GNU, found in "/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdC/a.out" - -Compiling the CXX compiler identification source file "CMakeCXXCompilerId.cpp" succeeded. -Compiler: /usr/bin/c++ -Build flags: -Id flags: - -The output was: -0 - - -Compilation of the CXX compiler identification source "CMakeCXXCompilerId.cpp" produced "a.out" - -The CXX compiler identification is GNU, found in "/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/3.16.3/CompilerIdCXX/a.out" - -Determining if the C compiler works passed with the following output: -Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp - -Run Build Command(s):/usr/bin/make cmTC_9f9dc/fast && /usr/bin/make -f CMakeFiles/cmTC_9f9dc.dir/build.make CMakeFiles/cmTC_9f9dc.dir/build -make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' -Building C object CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o -/usr/bin/cc -o CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/testCCompiler.c -Linking C executable cmTC_9f9dc -/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_9f9dc.dir/link.txt --verbose=1 -/usr/bin/cc -rdynamic CMakeFiles/cmTC_9f9dc.dir/testCCompiler.c.o -o cmTC_9f9dc -make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' - - - -Detecting C compiler ABI info compiled with the following output: -Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp - -Run Build Command(s):/usr/bin/make cmTC_5eca0/fast && /usr/bin/make -f CMakeFiles/cmTC_5eca0.dir/build.make CMakeFiles/cmTC_5eca0.dir/build -make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' -Building C object CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -/usr/bin/cc -v -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -c /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c -Using built-in specs. -COLLECT_GCC=/usr/bin/cc -OFFLOAD_TARGET_NAMES=nvptx-none:hsa -OFFLOAD_TARGET_DEFAULT=1 -Target: x86_64-linux-gnu -Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu -Thread model: posix -gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' - /usr/lib/gcc/x86_64-linux-gnu/9/cc1 -quiet -v -imultiarch x86_64-linux-gnu /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c -quiet -dumpbase CMakeCCompilerABI.c -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccEZ3Z6E.s -GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) - compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP - -GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 -ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu" -ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed" -ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include" -#include "..." search starts here: -#include <...> search starts here: - /usr/lib/gcc/x86_64-linux-gnu/9/include - /usr/local/include - /usr/include/x86_64-linux-gnu - /usr/include -End of search list. -GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) - compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP - -GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 -Compiler executable checksum: 01da938ff5dc2163489aa33cb3b747a7 -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' - as -v --64 -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o /tmp/ccEZ3Z6E.s -GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34 -COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ -LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64' -Linking C executable cmTC_5eca0 -/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_5eca0.dir/link.txt --verbose=1 -/usr/bin/cc -v -rdynamic CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -o cmTC_5eca0 -Using built-in specs. -COLLECT_GCC=/usr/bin/cc -COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -OFFLOAD_TARGET_NAMES=nvptx-none:hsa -OFFLOAD_TARGET_DEFAULT=1 -Target: x86_64-linux-gnu -Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu -Thread model: posix -gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) -COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ -LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ -COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64' - /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/ccjwqw95.res -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_5eca0 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -lgcc --push-state --as-needed -lgcc_s --pop-state -lc -lgcc --push-state --as-needed -lgcc_s --pop-state /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o -COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64' -make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' - - - -Parsed C implicit include dir info from above output: rv=done - found start of include info - found start of implicit include info - add: [/usr/lib/gcc/x86_64-linux-gnu/9/include] - add: [/usr/local/include] - add: [/usr/include/x86_64-linux-gnu] - add: [/usr/include] - end of search list found - collapse include dir [/usr/lib/gcc/x86_64-linux-gnu/9/include] ==> [/usr/lib/gcc/x86_64-linux-gnu/9/include] - collapse include dir [/usr/local/include] ==> [/usr/local/include] - collapse include dir [/usr/include/x86_64-linux-gnu] ==> [/usr/include/x86_64-linux-gnu] - collapse include dir [/usr/include] ==> [/usr/include] - implicit include dirs: [/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include] - - -Parsed C implicit link information from above output: - link line regex: [^( *|.*[/\])(ld|CMAKE_LINK_STARTFILE-NOTFOUND|([^/\]+-)?ld|collect2)[^/\]*( |$)] - ignore line: [Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp] - ignore line: [] - ignore line: [Run Build Command(s):/usr/bin/make cmTC_5eca0/fast && /usr/bin/make -f CMakeFiles/cmTC_5eca0.dir/build.make CMakeFiles/cmTC_5eca0.dir/build] - ignore line: [make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp'] - ignore line: [Building C object CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o] - ignore line: [/usr/bin/cc -v -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -c /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c] - ignore line: [Using built-in specs.] - ignore line: [COLLECT_GCC=/usr/bin/cc] - ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] - ignore line: [OFFLOAD_TARGET_DEFAULT=1] - ignore line: [Target: x86_64-linux-gnu] - ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] - ignore line: [Thread model: posix] - ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] - ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/cc1 -quiet -v -imultiarch x86_64-linux-gnu /usr/share/cmake-3.16/Modules/CMakeCCompilerABI.c -quiet -dumpbase CMakeCCompilerABI.c -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccEZ3Z6E.s] - ignore line: [GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] - ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] - ignore line: [] - ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] - ignore line: [ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu"] - ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed"] - ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include"] - ignore line: [#include "..." search starts here:] - ignore line: [#include <...> search starts here:] - ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/include] - ignore line: [ /usr/local/include] - ignore line: [ /usr/include/x86_64-linux-gnu] - ignore line: [ /usr/include] - ignore line: [End of search list.] - ignore line: [GNU C17 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] - ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] - ignore line: [] - ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] - ignore line: [Compiler executable checksum: 01da938ff5dc2163489aa33cb3b747a7] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] - ignore line: [ as -v --64 -o CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o /tmp/ccEZ3Z6E.s] - ignore line: [GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34] - ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] - ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o' '-c' '-mtune=generic' '-march=x86-64'] - ignore line: [Linking C executable cmTC_5eca0] - ignore line: [/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_5eca0.dir/link.txt --verbose=1] - ignore line: [/usr/bin/cc -v -rdynamic CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -o cmTC_5eca0 ] - ignore line: [Using built-in specs.] - ignore line: [COLLECT_GCC=/usr/bin/cc] - ignore line: [COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] - ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] - ignore line: [OFFLOAD_TARGET_DEFAULT=1] - ignore line: [Target: x86_64-linux-gnu] - ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] - ignore line: [Thread model: posix] - ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] - ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] - ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_5eca0' '-mtune=generic' '-march=x86-64'] - link line: [ /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/ccjwqw95.res -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lgcc_s --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_5eca0 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o -lgcc --push-state --as-needed -lgcc_s --pop-state -lc -lgcc --push-state --as-needed -lgcc_s --pop-state /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] - arg [/usr/lib/gcc/x86_64-linux-gnu/9/collect2] ==> ignore - arg [-plugin] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so] ==> ignore - arg [-plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] ==> ignore - arg [-plugin-opt=-fresolution=/tmp/ccjwqw95.res] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore - arg [-plugin-opt=-pass-through=-lc] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore - arg [--build-id] ==> ignore - arg [--eh-frame-hdr] ==> ignore - arg [-m] ==> ignore - arg [elf_x86_64] ==> ignore - arg [--hash-style=gnu] ==> ignore - arg [--as-needed] ==> ignore - arg [-export-dynamic] ==> ignore - arg [-dynamic-linker] ==> ignore - arg [/lib64/ld-linux-x86-64.so.2] ==> ignore - arg [-pie] ==> ignore - arg [-znow] ==> ignore - arg [-zrelro] ==> ignore - arg [-o] ==> ignore - arg [cmTC_5eca0] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o] ==> ignore - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] - arg [-L/lib/x86_64-linux-gnu] ==> dir [/lib/x86_64-linux-gnu] - arg [-L/lib/../lib] ==> dir [/lib/../lib] - arg [-L/usr/lib/x86_64-linux-gnu] ==> dir [/usr/lib/x86_64-linux-gnu] - arg [-L/usr/lib/../lib] ==> dir [/usr/lib/../lib] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] - arg [CMakeFiles/cmTC_5eca0.dir/CMakeCCompilerABI.c.o] ==> ignore - arg [-lgcc] ==> lib [gcc] - arg [--push-state] ==> ignore - arg [--as-needed] ==> ignore - arg [-lgcc_s] ==> lib [gcc_s] - arg [--pop-state] ==> ignore - arg [-lc] ==> lib [c] - arg [-lgcc] ==> lib [gcc] - arg [--push-state] ==> ignore - arg [--as-needed] ==> ignore - arg [-lgcc_s] ==> lib [gcc_s] - arg [--pop-state] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] ==> ignore - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9] ==> [/usr/lib/gcc/x86_64-linux-gnu/9] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> [/usr/lib] - collapse library dir [/lib/x86_64-linux-gnu] ==> [/lib/x86_64-linux-gnu] - collapse library dir [/lib/../lib] ==> [/lib] - collapse library dir [/usr/lib/x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] - collapse library dir [/usr/lib/../lib] ==> [/usr/lib] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> [/usr/lib] - implicit libs: [gcc;gcc_s;c;gcc;gcc_s] - implicit dirs: [/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib] - implicit fwks: [] - - -Determining if the CXX compiler works passed with the following output: -Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp - -Run Build Command(s):/usr/bin/make cmTC_8e0c3/fast && /usr/bin/make -f CMakeFiles/cmTC_8e0c3.dir/build.make CMakeFiles/cmTC_8e0c3.dir/build -make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' -Building CXX object CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o -/usr/bin/c++ -o CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/testCXXCompiler.cxx -Linking CXX executable cmTC_8e0c3 -/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_8e0c3.dir/link.txt --verbose=1 -/usr/bin/c++ -rdynamic CMakeFiles/cmTC_8e0c3.dir/testCXXCompiler.cxx.o -o cmTC_8e0c3 -make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' - - - -Detecting CXX compiler ABI info compiled with the following output: -Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp - -Run Build Command(s):/usr/bin/make cmTC_59ff1/fast && /usr/bin/make -f CMakeFiles/cmTC_59ff1.dir/build.make CMakeFiles/cmTC_59ff1.dir/build -make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' -Building CXX object CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -/usr/bin/c++ -v -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -c /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp -Using built-in specs. -COLLECT_GCC=/usr/bin/c++ -OFFLOAD_TARGET_NAMES=nvptx-none:hsa -OFFLOAD_TARGET_DEFAULT=1 -Target: x86_64-linux-gnu -Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu -Thread model: posix -gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' - /usr/lib/gcc/x86_64-linux-gnu/9/cc1plus -quiet -v -imultiarch x86_64-linux-gnu -D_GNU_SOURCE /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp -quiet -dumpbase CMakeCXXCompilerABI.cpp -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccETTYVz.s -GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) - compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP - -GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 -ignoring duplicate directory "/usr/include/x86_64-linux-gnu/c++/9" -ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu" -ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed" -ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include" -#include "..." search starts here: -#include <...> search starts here: - /usr/include/c++/9 - /usr/include/x86_64-linux-gnu/c++/9 - /usr/include/c++/9/backward - /usr/lib/gcc/x86_64-linux-gnu/9/include - /usr/local/include - /usr/include/x86_64-linux-gnu - /usr/include -End of search list. -GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu) - compiled by GNU C version 9.4.0, GMP version 6.2.0, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.22.1-GMP - -GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 -Compiler executable checksum: 3d1eba838554fa2348dba760e4770469 -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' - as -v --64 -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o /tmp/ccETTYVz.s -GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34 -COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ -LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ -COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64' -Linking CXX executable cmTC_59ff1 -/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_59ff1.dir/link.txt --verbose=1 -/usr/bin/c++ -v -rdynamic CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -o cmTC_59ff1 -Using built-in specs. -COLLECT_GCC=/usr/bin/c++ -COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -OFFLOAD_TARGET_NAMES=nvptx-none:hsa -OFFLOAD_TARGET_DEFAULT=1 -Target: x86_64-linux-gnu -Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr,hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu -Thread model: posix -gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) -COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/ -LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/ -COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64' - /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/cco0EvR4.res -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_59ff1 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -lstdc++ -lm -lgcc_s -lgcc -lc -lgcc_s -lgcc /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o -COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64' -make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' - - - -Parsed CXX implicit include dir info from above output: rv=done - found start of include info - found start of implicit include info - add: [/usr/include/c++/9] - add: [/usr/include/x86_64-linux-gnu/c++/9] - add: [/usr/include/c++/9/backward] - add: [/usr/lib/gcc/x86_64-linux-gnu/9/include] - add: [/usr/local/include] - add: [/usr/include/x86_64-linux-gnu] - add: [/usr/include] - end of search list found - collapse include dir [/usr/include/c++/9] ==> [/usr/include/c++/9] - collapse include dir [/usr/include/x86_64-linux-gnu/c++/9] ==> [/usr/include/x86_64-linux-gnu/c++/9] - collapse include dir [/usr/include/c++/9/backward] ==> [/usr/include/c++/9/backward] - collapse include dir [/usr/lib/gcc/x86_64-linux-gnu/9/include] ==> [/usr/lib/gcc/x86_64-linux-gnu/9/include] - collapse include dir [/usr/local/include] ==> [/usr/local/include] - collapse include dir [/usr/include/x86_64-linux-gnu] ==> [/usr/include/x86_64-linux-gnu] - collapse include dir [/usr/include] ==> [/usr/include] - implicit include dirs: [/usr/include/c++/9;/usr/include/x86_64-linux-gnu/c++/9;/usr/include/c++/9/backward;/usr/lib/gcc/x86_64-linux-gnu/9/include;/usr/local/include;/usr/include/x86_64-linux-gnu;/usr/include] - - -Parsed CXX implicit link information from above output: - link line regex: [^( *|.*[/\])(ld|CMAKE_LINK_STARTFILE-NOTFOUND|([^/\]+-)?ld|collect2)[^/\]*( |$)] - ignore line: [Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp] - ignore line: [] - ignore line: [Run Build Command(s):/usr/bin/make cmTC_59ff1/fast && /usr/bin/make -f CMakeFiles/cmTC_59ff1.dir/build.make CMakeFiles/cmTC_59ff1.dir/build] - ignore line: [make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp'] - ignore line: [Building CXX object CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o] - ignore line: [/usr/bin/c++ -v -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -c /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp] - ignore line: [Using built-in specs.] - ignore line: [COLLECT_GCC=/usr/bin/c++] - ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] - ignore line: [OFFLOAD_TARGET_DEFAULT=1] - ignore line: [Target: x86_64-linux-gnu] - ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] - ignore line: [Thread model: posix] - ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] - ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/cc1plus -quiet -v -imultiarch x86_64-linux-gnu -D_GNU_SOURCE /usr/share/cmake-3.16/Modules/CMakeCXXCompilerABI.cpp -quiet -dumpbase CMakeCXXCompilerABI.cpp -mtune=generic -march=x86-64 -auxbase-strip CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -version -fasynchronous-unwind-tables -fstack-protector-strong -Wformat -Wformat-security -fstack-clash-protection -fcf-protection -o /tmp/ccETTYVz.s] - ignore line: [GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] - ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] - ignore line: [] - ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] - ignore line: [ignoring duplicate directory "/usr/include/x86_64-linux-gnu/c++/9"] - ignore line: [ignoring nonexistent directory "/usr/local/include/x86_64-linux-gnu"] - ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/include-fixed"] - ignore line: [ignoring nonexistent directory "/usr/lib/gcc/x86_64-linux-gnu/9/../../../../x86_64-linux-gnu/include"] - ignore line: [#include "..." search starts here:] - ignore line: [#include <...> search starts here:] - ignore line: [ /usr/include/c++/9] - ignore line: [ /usr/include/x86_64-linux-gnu/c++/9] - ignore line: [ /usr/include/c++/9/backward] - ignore line: [ /usr/lib/gcc/x86_64-linux-gnu/9/include] - ignore line: [ /usr/local/include] - ignore line: [ /usr/include/x86_64-linux-gnu] - ignore line: [ /usr/include] - ignore line: [End of search list.] - ignore line: [GNU C++14 (Ubuntu 9.4.0-1ubuntu1~20.04.2) version 9.4.0 (x86_64-linux-gnu)] - ignore line: [ compiled by GNU C version 9.4.0 GMP version 6.2.0 MPFR version 4.0.2 MPC version 1.1.0 isl version isl-0.22.1-GMP] - ignore line: [] - ignore line: [GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072] - ignore line: [Compiler executable checksum: 3d1eba838554fa2348dba760e4770469] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] - ignore line: [ as -v --64 -o CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o /tmp/ccETTYVz.s] - ignore line: [GNU assembler version 2.34 (x86_64-linux-gnu) using BFD version (GNU Binutils for Ubuntu) 2.34] - ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] - ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-o' 'CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o' '-c' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] - ignore line: [Linking CXX executable cmTC_59ff1] - ignore line: [/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_59ff1.dir/link.txt --verbose=1] - ignore line: [/usr/bin/c++ -v -rdynamic CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -o cmTC_59ff1 ] - ignore line: [Using built-in specs.] - ignore line: [COLLECT_GCC=/usr/bin/c++] - ignore line: [COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] - ignore line: [OFFLOAD_TARGET_NAMES=nvptx-none:hsa] - ignore line: [OFFLOAD_TARGET_DEFAULT=1] - ignore line: [Target: x86_64-linux-gnu] - ignore line: [Configured with: ../src/configure -v --with-pkgversion='Ubuntu 9.4.0-1ubuntu1~20.04.2' --with-bugurl=file:///usr/share/doc/gcc-9/README.Bugs --enable-languages=c ada c++ go brig d fortran objc obj-c++ gm2 --prefix=/usr --with-gcc-major-version-only --program-suffix=-9 --program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-vtable-verify --enable-plugin --enable-default-pie --with-system-zlib --with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch --disable-werror --with-arch-32=i686 --with-abi=m64 --with-multilib-list=m32 m64 mx32 --enable-multilib --with-tune=generic --enable-offload-targets=nvptx-none=/build/gcc-9-9QDOt0/gcc-9-9.4.0/debian/tmp-nvptx/usr hsa --without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu --host=x86_64-linux-gnu --target=x86_64-linux-gnu] - ignore line: [Thread model: posix] - ignore line: [gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.2) ] - ignore line: [COMPILER_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/] - ignore line: [LIBRARY_PATH=/usr/lib/gcc/x86_64-linux-gnu/9/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib/:/lib/x86_64-linux-gnu/:/lib/../lib/:/usr/lib/x86_64-linux-gnu/:/usr/lib/../lib/:/usr/lib/gcc/x86_64-linux-gnu/9/../../../:/lib/:/usr/lib/] - ignore line: [COLLECT_GCC_OPTIONS='-v' '-rdynamic' '-o' 'cmTC_59ff1' '-shared-libgcc' '-mtune=generic' '-march=x86-64'] - link line: [ /usr/lib/gcc/x86_64-linux-gnu/9/collect2 -plugin /usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so -plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper -plugin-opt=-fresolution=/tmp/cco0EvR4.res -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc -plugin-opt=-pass-through=-lc -plugin-opt=-pass-through=-lgcc_s -plugin-opt=-pass-through=-lgcc --build-id --eh-frame-hdr -m elf_x86_64 --hash-style=gnu --as-needed -export-dynamic -dynamic-linker /lib64/ld-linux-x86-64.so.2 -pie -z now -z relro -o cmTC_59ff1 /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o /usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o -L/usr/lib/gcc/x86_64-linux-gnu/9 -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu -L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib -L/lib/x86_64-linux-gnu -L/lib/../lib -L/usr/lib/x86_64-linux-gnu -L/usr/lib/../lib -L/usr/lib/gcc/x86_64-linux-gnu/9/../../.. CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o -lstdc++ -lm -lgcc_s -lgcc -lc -lgcc_s -lgcc /usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o /usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] - arg [/usr/lib/gcc/x86_64-linux-gnu/9/collect2] ==> ignore - arg [-plugin] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/liblto_plugin.so] ==> ignore - arg [-plugin-opt=/usr/lib/gcc/x86_64-linux-gnu/9/lto-wrapper] ==> ignore - arg [-plugin-opt=-fresolution=/tmp/cco0EvR4.res] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc] ==> ignore - arg [-plugin-opt=-pass-through=-lc] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc_s] ==> ignore - arg [-plugin-opt=-pass-through=-lgcc] ==> ignore - arg [--build-id] ==> ignore - arg [--eh-frame-hdr] ==> ignore - arg [-m] ==> ignore - arg [elf_x86_64] ==> ignore - arg [--hash-style=gnu] ==> ignore - arg [--as-needed] ==> ignore - arg [-export-dynamic] ==> ignore - arg [-dynamic-linker] ==> ignore - arg [/lib64/ld-linux-x86-64.so.2] ==> ignore - arg [-pie] ==> ignore - arg [-znow] ==> ignore - arg [-zrelro] ==> ignore - arg [-o] ==> ignore - arg [cmTC_59ff1] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/Scrt1.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crti.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtbeginS.o] ==> ignore - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] - arg [-L/lib/x86_64-linux-gnu] ==> dir [/lib/x86_64-linux-gnu] - arg [-L/lib/../lib] ==> dir [/lib/../lib] - arg [-L/usr/lib/x86_64-linux-gnu] ==> dir [/usr/lib/x86_64-linux-gnu] - arg [-L/usr/lib/../lib] ==> dir [/usr/lib/../lib] - arg [-L/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] - arg [CMakeFiles/cmTC_59ff1.dir/CMakeCXXCompilerABI.cpp.o] ==> ignore - arg [-lstdc++] ==> lib [stdc++] - arg [-lm] ==> lib [m] - arg [-lgcc_s] ==> lib [gcc_s] - arg [-lgcc] ==> lib [gcc] - arg [-lc] ==> lib [c] - arg [-lgcc_s] ==> lib [gcc_s] - arg [-lgcc] ==> lib [gcc] - arg [/usr/lib/gcc/x86_64-linux-gnu/9/crtendS.o] ==> ignore - arg [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu/crtn.o] ==> ignore - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9] ==> [/usr/lib/gcc/x86_64-linux-gnu/9] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../../../lib] ==> [/usr/lib] - collapse library dir [/lib/x86_64-linux-gnu] ==> [/lib/x86_64-linux-gnu] - collapse library dir [/lib/../lib] ==> [/lib] - collapse library dir [/usr/lib/x86_64-linux-gnu] ==> [/usr/lib/x86_64-linux-gnu] - collapse library dir [/usr/lib/../lib] ==> [/usr/lib] - collapse library dir [/usr/lib/gcc/x86_64-linux-gnu/9/../../..] ==> [/usr/lib] - implicit libs: [stdc++;m;gcc_s;gcc;c;gcc_s;gcc] - implicit dirs: [/usr/lib/gcc/x86_64-linux-gnu/9;/usr/lib/x86_64-linux-gnu;/usr/lib;/lib/x86_64-linux-gnu;/lib] - implicit fwks: [] - - -Determining if the include file pthread.h exists passed with the following output: -Change Dir: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp - -Run Build Command(s):/usr/bin/make cmTC_9b3d4/fast && /usr/bin/make -f CMakeFiles/cmTC_9b3d4.dir/build.make CMakeFiles/cmTC_9b3d4.dir/build -make[1]: Entering directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' -Building C object CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o -/usr/bin/cc -o CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o -c /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp/CheckIncludeFile.c -Linking C executable cmTC_9b3d4 -/usr/bin/cmake -E cmake_link_script CMakeFiles/cmTC_9b3d4.dir/link.txt --verbose=1 -/usr/bin/cc CMakeFiles/cmTC_9b3d4.dir/CheckIncludeFile.c.o -o cmTC_9b3d4 -make[1]: Leaving directory '/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add/CMakeFiles/CMakeTmp' - - - diff --git a/rad-sim/example-designs/mult/CMakeFiles/cmake.check_cache b/rad-sim/example-designs/mult/CMakeFiles/cmake.check_cache deleted file mode 100644 index 3dccd73..0000000 --- a/rad-sim/example-designs/mult/CMakeFiles/cmake.check_cache +++ /dev/null @@ -1 +0,0 @@ -# This file is generated by cmake for dependency checking of the CMakeCache.txt file From 068b4e3397edb4249e5ab3573a5002dd2fb2f170 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sun, 13 Oct 2024 03:56:34 -0400 Subject: [PATCH 102/127] Updated and added .gitignore files to exclude cmake dir and makefiles --- rad-sim/example-designs/add/.gitignore | 2 ++ rad-sim/example-designs/add_multi/.gitignore | 2 ++ rad-sim/example-designs/dlrm/.gitignore | 2 ++ rad-sim/example-designs/mult/.gitignore | 2 ++ rad-sim/example-designs/npu/.gitignore | 1 + 5 files changed, 9 insertions(+) create mode 100644 rad-sim/example-designs/add/.gitignore create mode 100644 rad-sim/example-designs/add_multi/.gitignore create mode 100644 rad-sim/example-designs/dlrm/.gitignore create mode 100644 rad-sim/example-designs/mult/.gitignore diff --git a/rad-sim/example-designs/add/.gitignore b/rad-sim/example-designs/add/.gitignore new file mode 100644 index 0000000..c04d55a --- /dev/null +++ b/rad-sim/example-designs/add/.gitignore @@ -0,0 +1,2 @@ +CMakeFiles/ +Makefile \ No newline at end of file diff --git a/rad-sim/example-designs/add_multi/.gitignore b/rad-sim/example-designs/add_multi/.gitignore new file mode 100644 index 0000000..c04d55a --- /dev/null +++ b/rad-sim/example-designs/add_multi/.gitignore @@ -0,0 +1,2 @@ +CMakeFiles/ +Makefile \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/.gitignore b/rad-sim/example-designs/dlrm/.gitignore new file mode 100644 index 0000000..c04d55a --- /dev/null +++ b/rad-sim/example-designs/dlrm/.gitignore @@ -0,0 +1,2 @@ +CMakeFiles/ +Makefile \ No newline at end of file diff --git a/rad-sim/example-designs/mult/.gitignore b/rad-sim/example-designs/mult/.gitignore new file mode 100644 index 0000000..c04d55a --- /dev/null +++ b/rad-sim/example-designs/mult/.gitignore @@ -0,0 +1,2 @@ +CMakeFiles/ +Makefile \ No newline at end of file diff --git a/rad-sim/example-designs/npu/.gitignore b/rad-sim/example-designs/npu/.gitignore index aebfa9a..b602a05 100644 --- a/rad-sim/example-designs/npu/.gitignore +++ b/rad-sim/example-designs/npu/.gitignore @@ -10,3 +10,4 @@ compiler/dump/* compiler/__pycache__/* scripts/reports/*.rpt .vscode +Makefile \ No newline at end of file From 2afa782bbe765a7c9f469601fa4550041c4bed86 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sun, 13 Oct 2024 04:04:14 -0400 Subject: [PATCH 103/127] Updated developer doc and mistake in rtl-code doc --- docs/rad-sim-developer.rst | 5 +++-- docs/rad-sim-rtl-code.rst | 2 +- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/docs/rad-sim-developer.rst b/docs/rad-sim-developer.rst index b044fe0..7e31f3a 100644 --- a/docs/rad-sim-developer.rst +++ b/docs/rad-sim-developer.rst @@ -1,13 +1,14 @@ RAD-Sim Developers =================== -WARNING/TODO: this guide has not been updated or tested with multi-RAD RADSim. This is functional for single-RAD RADSim. - RAD-Sim Testing Infrastructure ------------------------------- Python Scripts Tests ^^^^^^^^^^^^^^^^^^^^^ +.. note:: + This script does not currently work in multi-RAD RAD-Sim. + To run python tests, ensure the current working directory is in the ``rad-sim`` folder and run the following steps: #. ``python -m unittest discover .`` diff --git a/docs/rad-sim-rtl-code.rst b/docs/rad-sim-rtl-code.rst index 16425a6..fd22815 100644 --- a/docs/rad-sim-rtl-code.rst +++ b/docs/rad-sim-rtl-code.rst @@ -67,7 +67,7 @@ An example design that utilizes RTL modules can be found in the ``rad-sim/exampl .. note:: RAD-Sim adds a portal module for designs containing multiple RADs. The NoC, clock, and general configuration files - should be modified according to the developer guide. + should be modified according to the code structure guide. RTL CMakeLists --------------- From 85b0d3dcb5a4ac14b0091991ed16a57b482106ac Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sun, 13 Oct 2024 04:09:00 -0400 Subject: [PATCH 104/127] Removed dlrm compiler log --- rad-sim/example-designs/dlrm/.gitignore | 3 ++- rad-sim/example-designs/dlrm/compiler/make.log | 0 2 files changed, 2 insertions(+), 1 deletion(-) delete mode 100644 rad-sim/example-designs/dlrm/compiler/make.log diff --git a/rad-sim/example-designs/dlrm/.gitignore b/rad-sim/example-designs/dlrm/.gitignore index c04d55a..5379a53 100644 --- a/rad-sim/example-designs/dlrm/.gitignore +++ b/rad-sim/example-designs/dlrm/.gitignore @@ -1,2 +1,3 @@ CMakeFiles/ -Makefile \ No newline at end of file +Makefile +*.log \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/compiler/make.log b/rad-sim/example-designs/dlrm/compiler/make.log deleted file mode 100644 index e69de29..0000000 From d03e93d48f6aca4fe0ad8d8ff41f8090e27eb255 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sun, 13 Oct 2024 04:14:03 -0400 Subject: [PATCH 105/127] Cleaned up .gitignore files --- rad-sim/.gitignore | 6 +++++- rad-sim/sim/.gitignore | 3 ++- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/rad-sim/.gitignore b/rad-sim/.gitignore index c567747..b501b2f 100644 --- a/rad-sim/.gitignore +++ b/rad-sim/.gitignore @@ -3,4 +3,8 @@ radsim_knobs __pycache__ -test/*.xml \ No newline at end of file +test/*.xml +*.cmake +*.a +CMakeFiles +MakeFile \ No newline at end of file diff --git a/rad-sim/sim/.gitignore b/rad-sim/sim/.gitignore index e7ea263..a7b904a 100644 --- a/rad-sim/sim/.gitignore +++ b/rad-sim/sim/.gitignore @@ -4,4 +4,5 @@ *.txt *.csv *.xml -*.log \ No newline at end of file +*.log +*.trace \ No newline at end of file From f4f8c6d95705fcca17de0fe6dea363832851b522 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sun, 13 Oct 2024 04:18:19 -0400 Subject: [PATCH 106/127] Removed CMakeCache.txt and updated .gitignore files --- rad-sim/example-designs/add/.gitignore | 3 +- rad-sim/example-designs/add/CMakeCache.txt | 379 ------------------ rad-sim/example-designs/add_multi/.gitignore | 3 +- .../example-designs/add_multi/CMakeCache.txt | 379 ------------------ rad-sim/example-designs/mult/.gitignore | 3 +- rad-sim/example-designs/mult/CMakeCache.txt | 379 ------------------ 6 files changed, 6 insertions(+), 1140 deletions(-) delete mode 100644 rad-sim/example-designs/add/CMakeCache.txt delete mode 100644 rad-sim/example-designs/add_multi/CMakeCache.txt delete mode 100644 rad-sim/example-designs/mult/CMakeCache.txt diff --git a/rad-sim/example-designs/add/.gitignore b/rad-sim/example-designs/add/.gitignore index c04d55a..e2d03be 100644 --- a/rad-sim/example-designs/add/.gitignore +++ b/rad-sim/example-designs/add/.gitignore @@ -1,2 +1,3 @@ CMakeFiles/ -Makefile \ No newline at end of file +Makefile +CMakeCache.txt \ No newline at end of file diff --git a/rad-sim/example-designs/add/CMakeCache.txt b/rad-sim/example-designs/add/CMakeCache.txt deleted file mode 100644 index acd6ebb..0000000 --- a/rad-sim/example-designs/add/CMakeCache.txt +++ /dev/null @@ -1,379 +0,0 @@ -# This is the CMakeCache file. -# For build in directory: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add -# It was generated by CMake: /usr/bin/cmake -# You can edit this file to change values found and used by cmake. -# If you do not want to change any of the values, simply exit the editor. -# If you do want to change a value, simply edit, save, and exit the editor. -# The syntax for the file is as follows: -# KEY:TYPE=VALUE -# KEY is the name of a variable in the cache. -# TYPE is a hint to GUIs for the type of VALUE, DO NOT EDIT TYPE!. -# VALUE is the current value for the KEY. - -######################## -# EXTERNAL cache entries -######################## - -//Path to a program. -CMAKE_ADDR2LINE:FILEPATH=/usr/bin/addr2line - -//Path to a program. -CMAKE_AR:FILEPATH=/usr/bin/ar - -//Choose the type of build, options are: None Debug Release RelWithDebInfo -// MinSizeRel ... -CMAKE_BUILD_TYPE:STRING= - -//Enable/Disable color output during build. -CMAKE_COLOR_MAKEFILE:BOOL=ON - -//CXX compiler -CMAKE_CXX_COMPILER:FILEPATH=/usr/bin/c++ - -//A wrapper around 'ar' adding the appropriate '--plugin' option -// for the GCC compiler -CMAKE_CXX_COMPILER_AR:FILEPATH=/usr/bin/gcc-ar-9 - -//A wrapper around 'ranlib' adding the appropriate '--plugin' option -// for the GCC compiler -CMAKE_CXX_COMPILER_RANLIB:FILEPATH=/usr/bin/gcc-ranlib-9 - -//Flags used by the CXX compiler during all build types. -CMAKE_CXX_FLAGS:STRING= - -//Flags used by the CXX compiler during DEBUG builds. -CMAKE_CXX_FLAGS_DEBUG:STRING=-g - -//Flags used by the CXX compiler during MINSIZEREL builds. -CMAKE_CXX_FLAGS_MINSIZEREL:STRING=-Os -DNDEBUG - -//Flags used by the CXX compiler during RELEASE builds. -CMAKE_CXX_FLAGS_RELEASE:STRING=-O3 -DNDEBUG - -//Flags used by the CXX compiler during RELWITHDEBINFO builds. -CMAKE_CXX_FLAGS_RELWITHDEBINFO:STRING=-O2 -g -DNDEBUG - -//C compiler -CMAKE_C_COMPILER:FILEPATH=/usr/bin/cc - -//A wrapper around 'ar' adding the appropriate '--plugin' option -// for the GCC compiler -CMAKE_C_COMPILER_AR:FILEPATH=/usr/bin/gcc-ar-9 - -//A wrapper around 'ranlib' adding the appropriate '--plugin' option -// for the GCC compiler -CMAKE_C_COMPILER_RANLIB:FILEPATH=/usr/bin/gcc-ranlib-9 - -//Flags used by the C compiler during all build types. -CMAKE_C_FLAGS:STRING= - -//Flags used by the C compiler during DEBUG builds. -CMAKE_C_FLAGS_DEBUG:STRING=-g - -//Flags used by the C compiler during MINSIZEREL builds. -CMAKE_C_FLAGS_MINSIZEREL:STRING=-Os -DNDEBUG - -//Flags used by the C compiler during RELEASE builds. -CMAKE_C_FLAGS_RELEASE:STRING=-O3 -DNDEBUG - -//Flags used by the C compiler during RELWITHDEBINFO builds. -CMAKE_C_FLAGS_RELWITHDEBINFO:STRING=-O2 -g -DNDEBUG - -//Path to a program. -CMAKE_DLLTOOL:FILEPATH=CMAKE_DLLTOOL-NOTFOUND - -//Flags used by the linker during all build types. -CMAKE_EXE_LINKER_FLAGS:STRING= - -//Flags used by the linker during DEBUG builds. -CMAKE_EXE_LINKER_FLAGS_DEBUG:STRING= - -//Flags used by the linker during MINSIZEREL builds. -CMAKE_EXE_LINKER_FLAGS_MINSIZEREL:STRING= - -//Flags used by the linker during RELEASE builds. -CMAKE_EXE_LINKER_FLAGS_RELEASE:STRING= - -//Flags used by the linker during RELWITHDEBINFO builds. -CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO:STRING= - -//Enable/Disable output of compile commands during generation. -CMAKE_EXPORT_COMPILE_COMMANDS:BOOL=OFF - -//Install path prefix, prepended onto install directories. -CMAKE_INSTALL_PREFIX:PATH=/usr/local - -//Path to a program. -CMAKE_LINKER:FILEPATH=/usr/bin/ld - -//Path to a program. -CMAKE_MAKE_PROGRAM:FILEPATH=/usr/bin/make - -//Flags used by the linker during the creation of modules during -// all build types. -CMAKE_MODULE_LINKER_FLAGS:STRING= - -//Flags used by the linker during the creation of modules during -// DEBUG builds. -CMAKE_MODULE_LINKER_FLAGS_DEBUG:STRING= - -//Flags used by the linker during the creation of modules during -// MINSIZEREL builds. -CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL:STRING= - -//Flags used by the linker during the creation of modules during -// RELEASE builds. -CMAKE_MODULE_LINKER_FLAGS_RELEASE:STRING= - -//Flags used by the linker during the creation of modules during -// RELWITHDEBINFO builds. -CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO:STRING= - -//Path to a program. -CMAKE_NM:FILEPATH=/usr/bin/nm - -//Path to a program. -CMAKE_OBJCOPY:FILEPATH=/usr/bin/objcopy - -//Path to a program. -CMAKE_OBJDUMP:FILEPATH=/usr/bin/objdump - -//Value Computed by CMake -CMAKE_PROJECT_DESCRIPTION:STATIC= - -//Value Computed by CMake -CMAKE_PROJECT_HOMEPAGE_URL:STATIC= - -//Value Computed by CMake -CMAKE_PROJECT_NAME:STATIC=Project - -//Path to a program. -CMAKE_RANLIB:FILEPATH=/usr/bin/ranlib - -//Path to a program. -CMAKE_READELF:FILEPATH=/usr/bin/readelf - -//Flags used by the linker during the creation of shared libraries -// during all build types. -CMAKE_SHARED_LINKER_FLAGS:STRING= - -//Flags used by the linker during the creation of shared libraries -// during DEBUG builds. -CMAKE_SHARED_LINKER_FLAGS_DEBUG:STRING= - -//Flags used by the linker during the creation of shared libraries -// during MINSIZEREL builds. -CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL:STRING= - -//Flags used by the linker during the creation of shared libraries -// during RELEASE builds. -CMAKE_SHARED_LINKER_FLAGS_RELEASE:STRING= - -//Flags used by the linker during the creation of shared libraries -// during RELWITHDEBINFO builds. -CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO:STRING= - -//If set, runtime paths are not added when installing shared libraries, -// but are added when building. -CMAKE_SKIP_INSTALL_RPATH:BOOL=NO - -//If set, runtime paths are not added when using shared libraries. -CMAKE_SKIP_RPATH:BOOL=NO - -//Flags used by the linker during the creation of static libraries -// during all build types. -CMAKE_STATIC_LINKER_FLAGS:STRING= - -//Flags used by the linker during the creation of static libraries -// during DEBUG builds. -CMAKE_STATIC_LINKER_FLAGS_DEBUG:STRING= - -//Flags used by the linker during the creation of static libraries -// during MINSIZEREL builds. -CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL:STRING= - -//Flags used by the linker during the creation of static libraries -// during RELEASE builds. -CMAKE_STATIC_LINKER_FLAGS_RELEASE:STRING= - -//Flags used by the linker during the creation of static libraries -// during RELWITHDEBINFO builds. -CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO:STRING= - -//Path to a program. -CMAKE_STRIP:FILEPATH=/usr/bin/strip - -//If this value is on, makefiles will be generated without the -// .SILENT directive, and all commands will be echoed to the console -// during the make. This is useful for debugging only. With Visual -// Studio IDE projects all commands are done without /nologo. -CMAKE_VERBOSE_MAKEFILE:BOOL=FALSE - -//Value Computed by CMake -Project_BINARY_DIR:STATIC=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add - -//Value Computed by CMake -Project_SOURCE_DIR:STATIC=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs - -//The directory containing a CMake configuration file for SystemCLanguage. -SystemCLanguage_DIR:PATH=/home/bassiabn/rad-sim/systemc-2.3.4/build - - -######################## -# INTERNAL cache entries -######################## - -//ADVANCED property for variable: CMAKE_ADDR2LINE -CMAKE_ADDR2LINE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_AR -CMAKE_AR-ADVANCED:INTERNAL=1 -//This is the directory where this CMakeCache.txt was created -CMAKE_CACHEFILE_DIR:INTERNAL=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add -//Major version of cmake used to create the current loaded cache -CMAKE_CACHE_MAJOR_VERSION:INTERNAL=3 -//Minor version of cmake used to create the current loaded cache -CMAKE_CACHE_MINOR_VERSION:INTERNAL=16 -//Patch version of cmake used to create the current loaded cache -CMAKE_CACHE_PATCH_VERSION:INTERNAL=3 -//ADVANCED property for variable: CMAKE_COLOR_MAKEFILE -CMAKE_COLOR_MAKEFILE-ADVANCED:INTERNAL=1 -//Path to CMake executable. -CMAKE_COMMAND:INTERNAL=/usr/bin/cmake -//Path to cpack program executable. -CMAKE_CPACK_COMMAND:INTERNAL=/usr/bin/cpack -//Path to ctest program executable. -CMAKE_CTEST_COMMAND:INTERNAL=/usr/bin/ctest -//ADVANCED property for variable: CMAKE_CXX_COMPILER -CMAKE_CXX_COMPILER-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_COMPILER_AR -CMAKE_CXX_COMPILER_AR-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_COMPILER_RANLIB -CMAKE_CXX_COMPILER_RANLIB-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_FLAGS -CMAKE_CXX_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_FLAGS_DEBUG -CMAKE_CXX_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_FLAGS_MINSIZEREL -CMAKE_CXX_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_FLAGS_RELEASE -CMAKE_CXX_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_FLAGS_RELWITHDEBINFO -CMAKE_CXX_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_COMPILER -CMAKE_C_COMPILER-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_COMPILER_AR -CMAKE_C_COMPILER_AR-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_COMPILER_RANLIB -CMAKE_C_COMPILER_RANLIB-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_FLAGS -CMAKE_C_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_FLAGS_DEBUG -CMAKE_C_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_FLAGS_MINSIZEREL -CMAKE_C_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_FLAGS_RELEASE -CMAKE_C_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_FLAGS_RELWITHDEBINFO -CMAKE_C_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_DLLTOOL -CMAKE_DLLTOOL-ADVANCED:INTERNAL=1 -//Path to cache edit program executable. -CMAKE_EDIT_COMMAND:INTERNAL=/usr/bin/ccmake -//Executable file format -CMAKE_EXECUTABLE_FORMAT:INTERNAL=ELF -//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS -CMAKE_EXE_LINKER_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_DEBUG -CMAKE_EXE_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_MINSIZEREL -CMAKE_EXE_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_RELEASE -CMAKE_EXE_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO -CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_EXPORT_COMPILE_COMMANDS -CMAKE_EXPORT_COMPILE_COMMANDS-ADVANCED:INTERNAL=1 -//Name of external makefile project generator. -CMAKE_EXTRA_GENERATOR:INTERNAL= -//Name of generator. -CMAKE_GENERATOR:INTERNAL=Unix Makefiles -//Generator instance identifier. -CMAKE_GENERATOR_INSTANCE:INTERNAL= -//Name of generator platform. -CMAKE_GENERATOR_PLATFORM:INTERNAL= -//Name of generator toolset. -CMAKE_GENERATOR_TOOLSET:INTERNAL= -//Test CMAKE_HAVE_LIBC_PTHREAD -CMAKE_HAVE_LIBC_PTHREAD:INTERNAL= -//Have include pthread.h -CMAKE_HAVE_PTHREAD_H:INTERNAL=1 -//Source directory with the top level CMakeLists.txt file for this -// project -CMAKE_HOME_DIRECTORY:INTERNAL=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs -//Install .so files without execute permission. -CMAKE_INSTALL_SO_NO_EXE:INTERNAL=1 -//ADVANCED property for variable: CMAKE_LINKER -CMAKE_LINKER-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MAKE_PROGRAM -CMAKE_MAKE_PROGRAM-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS -CMAKE_MODULE_LINKER_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_DEBUG -CMAKE_MODULE_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL -CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_RELEASE -CMAKE_MODULE_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO -CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_NM -CMAKE_NM-ADVANCED:INTERNAL=1 -//number of local generators -CMAKE_NUMBER_OF_MAKEFILES:INTERNAL=1 -//ADVANCED property for variable: CMAKE_OBJCOPY -CMAKE_OBJCOPY-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_OBJDUMP -CMAKE_OBJDUMP-ADVANCED:INTERNAL=1 -//Platform information initialized -CMAKE_PLATFORM_INFO_INITIALIZED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_RANLIB -CMAKE_RANLIB-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_READELF -CMAKE_READELF-ADVANCED:INTERNAL=1 -//Path to CMake installation. -CMAKE_ROOT:INTERNAL=/usr/share/cmake-3.16 -//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS -CMAKE_SHARED_LINKER_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_DEBUG -CMAKE_SHARED_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL -CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_RELEASE -CMAKE_SHARED_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO -CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SKIP_INSTALL_RPATH -CMAKE_SKIP_INSTALL_RPATH-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SKIP_RPATH -CMAKE_SKIP_RPATH-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS -CMAKE_STATIC_LINKER_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_DEBUG -CMAKE_STATIC_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL -CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_RELEASE -CMAKE_STATIC_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO -CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STRIP -CMAKE_STRIP-ADVANCED:INTERNAL=1 -//uname command -CMAKE_UNAME:INTERNAL=/usr/bin/uname -//ADVANCED property for variable: CMAKE_VERBOSE_MAKEFILE -CMAKE_VERBOSE_MAKEFILE-ADVANCED:INTERNAL=1 -//Details about finding Threads -FIND_PACKAGE_MESSAGE_DETAILS_Threads:INTERNAL=[TRUE][v()] -//Result of TRY_COMPILE -THREADS_HAVE_PTHREAD_ARG:INTERNAL=TRUE - diff --git a/rad-sim/example-designs/add_multi/.gitignore b/rad-sim/example-designs/add_multi/.gitignore index c04d55a..e2d03be 100644 --- a/rad-sim/example-designs/add_multi/.gitignore +++ b/rad-sim/example-designs/add_multi/.gitignore @@ -1,2 +1,3 @@ CMakeFiles/ -Makefile \ No newline at end of file +Makefile +CMakeCache.txt \ No newline at end of file diff --git a/rad-sim/example-designs/add_multi/CMakeCache.txt b/rad-sim/example-designs/add_multi/CMakeCache.txt deleted file mode 100644 index acd6ebb..0000000 --- a/rad-sim/example-designs/add_multi/CMakeCache.txt +++ /dev/null @@ -1,379 +0,0 @@ -# This is the CMakeCache file. -# For build in directory: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add -# It was generated by CMake: /usr/bin/cmake -# You can edit this file to change values found and used by cmake. -# If you do not want to change any of the values, simply exit the editor. -# If you do want to change a value, simply edit, save, and exit the editor. -# The syntax for the file is as follows: -# KEY:TYPE=VALUE -# KEY is the name of a variable in the cache. -# TYPE is a hint to GUIs for the type of VALUE, DO NOT EDIT TYPE!. -# VALUE is the current value for the KEY. - -######################## -# EXTERNAL cache entries -######################## - -//Path to a program. -CMAKE_ADDR2LINE:FILEPATH=/usr/bin/addr2line - -//Path to a program. -CMAKE_AR:FILEPATH=/usr/bin/ar - -//Choose the type of build, options are: None Debug Release RelWithDebInfo -// MinSizeRel ... -CMAKE_BUILD_TYPE:STRING= - -//Enable/Disable color output during build. -CMAKE_COLOR_MAKEFILE:BOOL=ON - -//CXX compiler -CMAKE_CXX_COMPILER:FILEPATH=/usr/bin/c++ - -//A wrapper around 'ar' adding the appropriate '--plugin' option -// for the GCC compiler -CMAKE_CXX_COMPILER_AR:FILEPATH=/usr/bin/gcc-ar-9 - -//A wrapper around 'ranlib' adding the appropriate '--plugin' option -// for the GCC compiler -CMAKE_CXX_COMPILER_RANLIB:FILEPATH=/usr/bin/gcc-ranlib-9 - -//Flags used by the CXX compiler during all build types. -CMAKE_CXX_FLAGS:STRING= - -//Flags used by the CXX compiler during DEBUG builds. -CMAKE_CXX_FLAGS_DEBUG:STRING=-g - -//Flags used by the CXX compiler during MINSIZEREL builds. -CMAKE_CXX_FLAGS_MINSIZEREL:STRING=-Os -DNDEBUG - -//Flags used by the CXX compiler during RELEASE builds. -CMAKE_CXX_FLAGS_RELEASE:STRING=-O3 -DNDEBUG - -//Flags used by the CXX compiler during RELWITHDEBINFO builds. -CMAKE_CXX_FLAGS_RELWITHDEBINFO:STRING=-O2 -g -DNDEBUG - -//C compiler -CMAKE_C_COMPILER:FILEPATH=/usr/bin/cc - -//A wrapper around 'ar' adding the appropriate '--plugin' option -// for the GCC compiler -CMAKE_C_COMPILER_AR:FILEPATH=/usr/bin/gcc-ar-9 - -//A wrapper around 'ranlib' adding the appropriate '--plugin' option -// for the GCC compiler -CMAKE_C_COMPILER_RANLIB:FILEPATH=/usr/bin/gcc-ranlib-9 - -//Flags used by the C compiler during all build types. -CMAKE_C_FLAGS:STRING= - -//Flags used by the C compiler during DEBUG builds. -CMAKE_C_FLAGS_DEBUG:STRING=-g - -//Flags used by the C compiler during MINSIZEREL builds. -CMAKE_C_FLAGS_MINSIZEREL:STRING=-Os -DNDEBUG - -//Flags used by the C compiler during RELEASE builds. -CMAKE_C_FLAGS_RELEASE:STRING=-O3 -DNDEBUG - -//Flags used by the C compiler during RELWITHDEBINFO builds. -CMAKE_C_FLAGS_RELWITHDEBINFO:STRING=-O2 -g -DNDEBUG - -//Path to a program. -CMAKE_DLLTOOL:FILEPATH=CMAKE_DLLTOOL-NOTFOUND - -//Flags used by the linker during all build types. -CMAKE_EXE_LINKER_FLAGS:STRING= - -//Flags used by the linker during DEBUG builds. -CMAKE_EXE_LINKER_FLAGS_DEBUG:STRING= - -//Flags used by the linker during MINSIZEREL builds. -CMAKE_EXE_LINKER_FLAGS_MINSIZEREL:STRING= - -//Flags used by the linker during RELEASE builds. -CMAKE_EXE_LINKER_FLAGS_RELEASE:STRING= - -//Flags used by the linker during RELWITHDEBINFO builds. -CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO:STRING= - -//Enable/Disable output of compile commands during generation. -CMAKE_EXPORT_COMPILE_COMMANDS:BOOL=OFF - -//Install path prefix, prepended onto install directories. -CMAKE_INSTALL_PREFIX:PATH=/usr/local - -//Path to a program. -CMAKE_LINKER:FILEPATH=/usr/bin/ld - -//Path to a program. -CMAKE_MAKE_PROGRAM:FILEPATH=/usr/bin/make - -//Flags used by the linker during the creation of modules during -// all build types. -CMAKE_MODULE_LINKER_FLAGS:STRING= - -//Flags used by the linker during the creation of modules during -// DEBUG builds. -CMAKE_MODULE_LINKER_FLAGS_DEBUG:STRING= - -//Flags used by the linker during the creation of modules during -// MINSIZEREL builds. -CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL:STRING= - -//Flags used by the linker during the creation of modules during -// RELEASE builds. -CMAKE_MODULE_LINKER_FLAGS_RELEASE:STRING= - -//Flags used by the linker during the creation of modules during -// RELWITHDEBINFO builds. -CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO:STRING= - -//Path to a program. -CMAKE_NM:FILEPATH=/usr/bin/nm - -//Path to a program. -CMAKE_OBJCOPY:FILEPATH=/usr/bin/objcopy - -//Path to a program. -CMAKE_OBJDUMP:FILEPATH=/usr/bin/objdump - -//Value Computed by CMake -CMAKE_PROJECT_DESCRIPTION:STATIC= - -//Value Computed by CMake -CMAKE_PROJECT_HOMEPAGE_URL:STATIC= - -//Value Computed by CMake -CMAKE_PROJECT_NAME:STATIC=Project - -//Path to a program. -CMAKE_RANLIB:FILEPATH=/usr/bin/ranlib - -//Path to a program. -CMAKE_READELF:FILEPATH=/usr/bin/readelf - -//Flags used by the linker during the creation of shared libraries -// during all build types. -CMAKE_SHARED_LINKER_FLAGS:STRING= - -//Flags used by the linker during the creation of shared libraries -// during DEBUG builds. -CMAKE_SHARED_LINKER_FLAGS_DEBUG:STRING= - -//Flags used by the linker during the creation of shared libraries -// during MINSIZEREL builds. -CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL:STRING= - -//Flags used by the linker during the creation of shared libraries -// during RELEASE builds. -CMAKE_SHARED_LINKER_FLAGS_RELEASE:STRING= - -//Flags used by the linker during the creation of shared libraries -// during RELWITHDEBINFO builds. -CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO:STRING= - -//If set, runtime paths are not added when installing shared libraries, -// but are added when building. -CMAKE_SKIP_INSTALL_RPATH:BOOL=NO - -//If set, runtime paths are not added when using shared libraries. -CMAKE_SKIP_RPATH:BOOL=NO - -//Flags used by the linker during the creation of static libraries -// during all build types. -CMAKE_STATIC_LINKER_FLAGS:STRING= - -//Flags used by the linker during the creation of static libraries -// during DEBUG builds. -CMAKE_STATIC_LINKER_FLAGS_DEBUG:STRING= - -//Flags used by the linker during the creation of static libraries -// during MINSIZEREL builds. -CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL:STRING= - -//Flags used by the linker during the creation of static libraries -// during RELEASE builds. -CMAKE_STATIC_LINKER_FLAGS_RELEASE:STRING= - -//Flags used by the linker during the creation of static libraries -// during RELWITHDEBINFO builds. -CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO:STRING= - -//Path to a program. -CMAKE_STRIP:FILEPATH=/usr/bin/strip - -//If this value is on, makefiles will be generated without the -// .SILENT directive, and all commands will be echoed to the console -// during the make. This is useful for debugging only. With Visual -// Studio IDE projects all commands are done without /nologo. -CMAKE_VERBOSE_MAKEFILE:BOOL=FALSE - -//Value Computed by CMake -Project_BINARY_DIR:STATIC=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add - -//Value Computed by CMake -Project_SOURCE_DIR:STATIC=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs - -//The directory containing a CMake configuration file for SystemCLanguage. -SystemCLanguage_DIR:PATH=/home/bassiabn/rad-sim/systemc-2.3.4/build - - -######################## -# INTERNAL cache entries -######################## - -//ADVANCED property for variable: CMAKE_ADDR2LINE -CMAKE_ADDR2LINE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_AR -CMAKE_AR-ADVANCED:INTERNAL=1 -//This is the directory where this CMakeCache.txt was created -CMAKE_CACHEFILE_DIR:INTERNAL=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add -//Major version of cmake used to create the current loaded cache -CMAKE_CACHE_MAJOR_VERSION:INTERNAL=3 -//Minor version of cmake used to create the current loaded cache -CMAKE_CACHE_MINOR_VERSION:INTERNAL=16 -//Patch version of cmake used to create the current loaded cache -CMAKE_CACHE_PATCH_VERSION:INTERNAL=3 -//ADVANCED property for variable: CMAKE_COLOR_MAKEFILE -CMAKE_COLOR_MAKEFILE-ADVANCED:INTERNAL=1 -//Path to CMake executable. -CMAKE_COMMAND:INTERNAL=/usr/bin/cmake -//Path to cpack program executable. -CMAKE_CPACK_COMMAND:INTERNAL=/usr/bin/cpack -//Path to ctest program executable. -CMAKE_CTEST_COMMAND:INTERNAL=/usr/bin/ctest -//ADVANCED property for variable: CMAKE_CXX_COMPILER -CMAKE_CXX_COMPILER-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_COMPILER_AR -CMAKE_CXX_COMPILER_AR-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_COMPILER_RANLIB -CMAKE_CXX_COMPILER_RANLIB-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_FLAGS -CMAKE_CXX_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_FLAGS_DEBUG -CMAKE_CXX_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_FLAGS_MINSIZEREL -CMAKE_CXX_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_FLAGS_RELEASE -CMAKE_CXX_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_FLAGS_RELWITHDEBINFO -CMAKE_CXX_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_COMPILER -CMAKE_C_COMPILER-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_COMPILER_AR -CMAKE_C_COMPILER_AR-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_COMPILER_RANLIB -CMAKE_C_COMPILER_RANLIB-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_FLAGS -CMAKE_C_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_FLAGS_DEBUG -CMAKE_C_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_FLAGS_MINSIZEREL -CMAKE_C_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_FLAGS_RELEASE -CMAKE_C_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_FLAGS_RELWITHDEBINFO -CMAKE_C_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_DLLTOOL -CMAKE_DLLTOOL-ADVANCED:INTERNAL=1 -//Path to cache edit program executable. -CMAKE_EDIT_COMMAND:INTERNAL=/usr/bin/ccmake -//Executable file format -CMAKE_EXECUTABLE_FORMAT:INTERNAL=ELF -//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS -CMAKE_EXE_LINKER_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_DEBUG -CMAKE_EXE_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_MINSIZEREL -CMAKE_EXE_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_RELEASE -CMAKE_EXE_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO -CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_EXPORT_COMPILE_COMMANDS -CMAKE_EXPORT_COMPILE_COMMANDS-ADVANCED:INTERNAL=1 -//Name of external makefile project generator. -CMAKE_EXTRA_GENERATOR:INTERNAL= -//Name of generator. -CMAKE_GENERATOR:INTERNAL=Unix Makefiles -//Generator instance identifier. -CMAKE_GENERATOR_INSTANCE:INTERNAL= -//Name of generator platform. -CMAKE_GENERATOR_PLATFORM:INTERNAL= -//Name of generator toolset. -CMAKE_GENERATOR_TOOLSET:INTERNAL= -//Test CMAKE_HAVE_LIBC_PTHREAD -CMAKE_HAVE_LIBC_PTHREAD:INTERNAL= -//Have include pthread.h -CMAKE_HAVE_PTHREAD_H:INTERNAL=1 -//Source directory with the top level CMakeLists.txt file for this -// project -CMAKE_HOME_DIRECTORY:INTERNAL=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs -//Install .so files without execute permission. -CMAKE_INSTALL_SO_NO_EXE:INTERNAL=1 -//ADVANCED property for variable: CMAKE_LINKER -CMAKE_LINKER-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MAKE_PROGRAM -CMAKE_MAKE_PROGRAM-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS -CMAKE_MODULE_LINKER_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_DEBUG -CMAKE_MODULE_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL -CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_RELEASE -CMAKE_MODULE_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO -CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_NM -CMAKE_NM-ADVANCED:INTERNAL=1 -//number of local generators -CMAKE_NUMBER_OF_MAKEFILES:INTERNAL=1 -//ADVANCED property for variable: CMAKE_OBJCOPY -CMAKE_OBJCOPY-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_OBJDUMP -CMAKE_OBJDUMP-ADVANCED:INTERNAL=1 -//Platform information initialized -CMAKE_PLATFORM_INFO_INITIALIZED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_RANLIB -CMAKE_RANLIB-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_READELF -CMAKE_READELF-ADVANCED:INTERNAL=1 -//Path to CMake installation. -CMAKE_ROOT:INTERNAL=/usr/share/cmake-3.16 -//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS -CMAKE_SHARED_LINKER_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_DEBUG -CMAKE_SHARED_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL -CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_RELEASE -CMAKE_SHARED_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO -CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SKIP_INSTALL_RPATH -CMAKE_SKIP_INSTALL_RPATH-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SKIP_RPATH -CMAKE_SKIP_RPATH-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS -CMAKE_STATIC_LINKER_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_DEBUG -CMAKE_STATIC_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL -CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_RELEASE -CMAKE_STATIC_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO -CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STRIP -CMAKE_STRIP-ADVANCED:INTERNAL=1 -//uname command -CMAKE_UNAME:INTERNAL=/usr/bin/uname -//ADVANCED property for variable: CMAKE_VERBOSE_MAKEFILE -CMAKE_VERBOSE_MAKEFILE-ADVANCED:INTERNAL=1 -//Details about finding Threads -FIND_PACKAGE_MESSAGE_DETAILS_Threads:INTERNAL=[TRUE][v()] -//Result of TRY_COMPILE -THREADS_HAVE_PTHREAD_ARG:INTERNAL=TRUE - diff --git a/rad-sim/example-designs/mult/.gitignore b/rad-sim/example-designs/mult/.gitignore index c04d55a..e2d03be 100644 --- a/rad-sim/example-designs/mult/.gitignore +++ b/rad-sim/example-designs/mult/.gitignore @@ -1,2 +1,3 @@ CMakeFiles/ -Makefile \ No newline at end of file +Makefile +CMakeCache.txt \ No newline at end of file diff --git a/rad-sim/example-designs/mult/CMakeCache.txt b/rad-sim/example-designs/mult/CMakeCache.txt deleted file mode 100644 index acd6ebb..0000000 --- a/rad-sim/example-designs/mult/CMakeCache.txt +++ /dev/null @@ -1,379 +0,0 @@ -# This is the CMakeCache file. -# For build in directory: /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add -# It was generated by CMake: /usr/bin/cmake -# You can edit this file to change values found and used by cmake. -# If you do not want to change any of the values, simply exit the editor. -# If you do want to change a value, simply edit, save, and exit the editor. -# The syntax for the file is as follows: -# KEY:TYPE=VALUE -# KEY is the name of a variable in the cache. -# TYPE is a hint to GUIs for the type of VALUE, DO NOT EDIT TYPE!. -# VALUE is the current value for the KEY. - -######################## -# EXTERNAL cache entries -######################## - -//Path to a program. -CMAKE_ADDR2LINE:FILEPATH=/usr/bin/addr2line - -//Path to a program. -CMAKE_AR:FILEPATH=/usr/bin/ar - -//Choose the type of build, options are: None Debug Release RelWithDebInfo -// MinSizeRel ... -CMAKE_BUILD_TYPE:STRING= - -//Enable/Disable color output during build. -CMAKE_COLOR_MAKEFILE:BOOL=ON - -//CXX compiler -CMAKE_CXX_COMPILER:FILEPATH=/usr/bin/c++ - -//A wrapper around 'ar' adding the appropriate '--plugin' option -// for the GCC compiler -CMAKE_CXX_COMPILER_AR:FILEPATH=/usr/bin/gcc-ar-9 - -//A wrapper around 'ranlib' adding the appropriate '--plugin' option -// for the GCC compiler -CMAKE_CXX_COMPILER_RANLIB:FILEPATH=/usr/bin/gcc-ranlib-9 - -//Flags used by the CXX compiler during all build types. -CMAKE_CXX_FLAGS:STRING= - -//Flags used by the CXX compiler during DEBUG builds. -CMAKE_CXX_FLAGS_DEBUG:STRING=-g - -//Flags used by the CXX compiler during MINSIZEREL builds. -CMAKE_CXX_FLAGS_MINSIZEREL:STRING=-Os -DNDEBUG - -//Flags used by the CXX compiler during RELEASE builds. -CMAKE_CXX_FLAGS_RELEASE:STRING=-O3 -DNDEBUG - -//Flags used by the CXX compiler during RELWITHDEBINFO builds. -CMAKE_CXX_FLAGS_RELWITHDEBINFO:STRING=-O2 -g -DNDEBUG - -//C compiler -CMAKE_C_COMPILER:FILEPATH=/usr/bin/cc - -//A wrapper around 'ar' adding the appropriate '--plugin' option -// for the GCC compiler -CMAKE_C_COMPILER_AR:FILEPATH=/usr/bin/gcc-ar-9 - -//A wrapper around 'ranlib' adding the appropriate '--plugin' option -// for the GCC compiler -CMAKE_C_COMPILER_RANLIB:FILEPATH=/usr/bin/gcc-ranlib-9 - -//Flags used by the C compiler during all build types. -CMAKE_C_FLAGS:STRING= - -//Flags used by the C compiler during DEBUG builds. -CMAKE_C_FLAGS_DEBUG:STRING=-g - -//Flags used by the C compiler during MINSIZEREL builds. -CMAKE_C_FLAGS_MINSIZEREL:STRING=-Os -DNDEBUG - -//Flags used by the C compiler during RELEASE builds. -CMAKE_C_FLAGS_RELEASE:STRING=-O3 -DNDEBUG - -//Flags used by the C compiler during RELWITHDEBINFO builds. -CMAKE_C_FLAGS_RELWITHDEBINFO:STRING=-O2 -g -DNDEBUG - -//Path to a program. -CMAKE_DLLTOOL:FILEPATH=CMAKE_DLLTOOL-NOTFOUND - -//Flags used by the linker during all build types. -CMAKE_EXE_LINKER_FLAGS:STRING= - -//Flags used by the linker during DEBUG builds. -CMAKE_EXE_LINKER_FLAGS_DEBUG:STRING= - -//Flags used by the linker during MINSIZEREL builds. -CMAKE_EXE_LINKER_FLAGS_MINSIZEREL:STRING= - -//Flags used by the linker during RELEASE builds. -CMAKE_EXE_LINKER_FLAGS_RELEASE:STRING= - -//Flags used by the linker during RELWITHDEBINFO builds. -CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO:STRING= - -//Enable/Disable output of compile commands during generation. -CMAKE_EXPORT_COMPILE_COMMANDS:BOOL=OFF - -//Install path prefix, prepended onto install directories. -CMAKE_INSTALL_PREFIX:PATH=/usr/local - -//Path to a program. -CMAKE_LINKER:FILEPATH=/usr/bin/ld - -//Path to a program. -CMAKE_MAKE_PROGRAM:FILEPATH=/usr/bin/make - -//Flags used by the linker during the creation of modules during -// all build types. -CMAKE_MODULE_LINKER_FLAGS:STRING= - -//Flags used by the linker during the creation of modules during -// DEBUG builds. -CMAKE_MODULE_LINKER_FLAGS_DEBUG:STRING= - -//Flags used by the linker during the creation of modules during -// MINSIZEREL builds. -CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL:STRING= - -//Flags used by the linker during the creation of modules during -// RELEASE builds. -CMAKE_MODULE_LINKER_FLAGS_RELEASE:STRING= - -//Flags used by the linker during the creation of modules during -// RELWITHDEBINFO builds. -CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO:STRING= - -//Path to a program. -CMAKE_NM:FILEPATH=/usr/bin/nm - -//Path to a program. -CMAKE_OBJCOPY:FILEPATH=/usr/bin/objcopy - -//Path to a program. -CMAKE_OBJDUMP:FILEPATH=/usr/bin/objdump - -//Value Computed by CMake -CMAKE_PROJECT_DESCRIPTION:STATIC= - -//Value Computed by CMake -CMAKE_PROJECT_HOMEPAGE_URL:STATIC= - -//Value Computed by CMake -CMAKE_PROJECT_NAME:STATIC=Project - -//Path to a program. -CMAKE_RANLIB:FILEPATH=/usr/bin/ranlib - -//Path to a program. -CMAKE_READELF:FILEPATH=/usr/bin/readelf - -//Flags used by the linker during the creation of shared libraries -// during all build types. -CMAKE_SHARED_LINKER_FLAGS:STRING= - -//Flags used by the linker during the creation of shared libraries -// during DEBUG builds. -CMAKE_SHARED_LINKER_FLAGS_DEBUG:STRING= - -//Flags used by the linker during the creation of shared libraries -// during MINSIZEREL builds. -CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL:STRING= - -//Flags used by the linker during the creation of shared libraries -// during RELEASE builds. -CMAKE_SHARED_LINKER_FLAGS_RELEASE:STRING= - -//Flags used by the linker during the creation of shared libraries -// during RELWITHDEBINFO builds. -CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO:STRING= - -//If set, runtime paths are not added when installing shared libraries, -// but are added when building. -CMAKE_SKIP_INSTALL_RPATH:BOOL=NO - -//If set, runtime paths are not added when using shared libraries. -CMAKE_SKIP_RPATH:BOOL=NO - -//Flags used by the linker during the creation of static libraries -// during all build types. -CMAKE_STATIC_LINKER_FLAGS:STRING= - -//Flags used by the linker during the creation of static libraries -// during DEBUG builds. -CMAKE_STATIC_LINKER_FLAGS_DEBUG:STRING= - -//Flags used by the linker during the creation of static libraries -// during MINSIZEREL builds. -CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL:STRING= - -//Flags used by the linker during the creation of static libraries -// during RELEASE builds. -CMAKE_STATIC_LINKER_FLAGS_RELEASE:STRING= - -//Flags used by the linker during the creation of static libraries -// during RELWITHDEBINFO builds. -CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO:STRING= - -//Path to a program. -CMAKE_STRIP:FILEPATH=/usr/bin/strip - -//If this value is on, makefiles will be generated without the -// .SILENT directive, and all commands will be echoed to the console -// during the make. This is useful for debugging only. With Visual -// Studio IDE projects all commands are done without /nologo. -CMAKE_VERBOSE_MAKEFILE:BOOL=FALSE - -//Value Computed by CMake -Project_BINARY_DIR:STATIC=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add - -//Value Computed by CMake -Project_SOURCE_DIR:STATIC=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs - -//The directory containing a CMake configuration file for SystemCLanguage. -SystemCLanguage_DIR:PATH=/home/bassiabn/rad-sim/systemc-2.3.4/build - - -######################## -# INTERNAL cache entries -######################## - -//ADVANCED property for variable: CMAKE_ADDR2LINE -CMAKE_ADDR2LINE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_AR -CMAKE_AR-ADVANCED:INTERNAL=1 -//This is the directory where this CMakeCache.txt was created -CMAKE_CACHEFILE_DIR:INTERNAL=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/add -//Major version of cmake used to create the current loaded cache -CMAKE_CACHE_MAJOR_VERSION:INTERNAL=3 -//Minor version of cmake used to create the current loaded cache -CMAKE_CACHE_MINOR_VERSION:INTERNAL=16 -//Patch version of cmake used to create the current loaded cache -CMAKE_CACHE_PATCH_VERSION:INTERNAL=3 -//ADVANCED property for variable: CMAKE_COLOR_MAKEFILE -CMAKE_COLOR_MAKEFILE-ADVANCED:INTERNAL=1 -//Path to CMake executable. -CMAKE_COMMAND:INTERNAL=/usr/bin/cmake -//Path to cpack program executable. -CMAKE_CPACK_COMMAND:INTERNAL=/usr/bin/cpack -//Path to ctest program executable. -CMAKE_CTEST_COMMAND:INTERNAL=/usr/bin/ctest -//ADVANCED property for variable: CMAKE_CXX_COMPILER -CMAKE_CXX_COMPILER-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_COMPILER_AR -CMAKE_CXX_COMPILER_AR-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_COMPILER_RANLIB -CMAKE_CXX_COMPILER_RANLIB-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_FLAGS -CMAKE_CXX_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_FLAGS_DEBUG -CMAKE_CXX_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_FLAGS_MINSIZEREL -CMAKE_CXX_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_FLAGS_RELEASE -CMAKE_CXX_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_CXX_FLAGS_RELWITHDEBINFO -CMAKE_CXX_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_COMPILER -CMAKE_C_COMPILER-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_COMPILER_AR -CMAKE_C_COMPILER_AR-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_COMPILER_RANLIB -CMAKE_C_COMPILER_RANLIB-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_FLAGS -CMAKE_C_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_FLAGS_DEBUG -CMAKE_C_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_FLAGS_MINSIZEREL -CMAKE_C_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_FLAGS_RELEASE -CMAKE_C_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_C_FLAGS_RELWITHDEBINFO -CMAKE_C_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_DLLTOOL -CMAKE_DLLTOOL-ADVANCED:INTERNAL=1 -//Path to cache edit program executable. -CMAKE_EDIT_COMMAND:INTERNAL=/usr/bin/ccmake -//Executable file format -CMAKE_EXECUTABLE_FORMAT:INTERNAL=ELF -//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS -CMAKE_EXE_LINKER_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_DEBUG -CMAKE_EXE_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_MINSIZEREL -CMAKE_EXE_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_RELEASE -CMAKE_EXE_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO -CMAKE_EXE_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_EXPORT_COMPILE_COMMANDS -CMAKE_EXPORT_COMPILE_COMMANDS-ADVANCED:INTERNAL=1 -//Name of external makefile project generator. -CMAKE_EXTRA_GENERATOR:INTERNAL= -//Name of generator. -CMAKE_GENERATOR:INTERNAL=Unix Makefiles -//Generator instance identifier. -CMAKE_GENERATOR_INSTANCE:INTERNAL= -//Name of generator platform. -CMAKE_GENERATOR_PLATFORM:INTERNAL= -//Name of generator toolset. -CMAKE_GENERATOR_TOOLSET:INTERNAL= -//Test CMAKE_HAVE_LIBC_PTHREAD -CMAKE_HAVE_LIBC_PTHREAD:INTERNAL= -//Have include pthread.h -CMAKE_HAVE_PTHREAD_H:INTERNAL=1 -//Source directory with the top level CMakeLists.txt file for this -// project -CMAKE_HOME_DIRECTORY:INTERNAL=/home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs -//Install .so files without execute permission. -CMAKE_INSTALL_SO_NO_EXE:INTERNAL=1 -//ADVANCED property for variable: CMAKE_LINKER -CMAKE_LINKER-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MAKE_PROGRAM -CMAKE_MAKE_PROGRAM-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS -CMAKE_MODULE_LINKER_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_DEBUG -CMAKE_MODULE_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL -CMAKE_MODULE_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_RELEASE -CMAKE_MODULE_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO -CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_NM -CMAKE_NM-ADVANCED:INTERNAL=1 -//number of local generators -CMAKE_NUMBER_OF_MAKEFILES:INTERNAL=1 -//ADVANCED property for variable: CMAKE_OBJCOPY -CMAKE_OBJCOPY-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_OBJDUMP -CMAKE_OBJDUMP-ADVANCED:INTERNAL=1 -//Platform information initialized -CMAKE_PLATFORM_INFO_INITIALIZED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_RANLIB -CMAKE_RANLIB-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_READELF -CMAKE_READELF-ADVANCED:INTERNAL=1 -//Path to CMake installation. -CMAKE_ROOT:INTERNAL=/usr/share/cmake-3.16 -//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS -CMAKE_SHARED_LINKER_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_DEBUG -CMAKE_SHARED_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL -CMAKE_SHARED_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_RELEASE -CMAKE_SHARED_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO -CMAKE_SHARED_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SKIP_INSTALL_RPATH -CMAKE_SKIP_INSTALL_RPATH-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_SKIP_RPATH -CMAKE_SKIP_RPATH-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS -CMAKE_STATIC_LINKER_FLAGS-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_DEBUG -CMAKE_STATIC_LINKER_FLAGS_DEBUG-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL -CMAKE_STATIC_LINKER_FLAGS_MINSIZEREL-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_RELEASE -CMAKE_STATIC_LINKER_FLAGS_RELEASE-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO -CMAKE_STATIC_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1 -//ADVANCED property for variable: CMAKE_STRIP -CMAKE_STRIP-ADVANCED:INTERNAL=1 -//uname command -CMAKE_UNAME:INTERNAL=/usr/bin/uname -//ADVANCED property for variable: CMAKE_VERBOSE_MAKEFILE -CMAKE_VERBOSE_MAKEFILE-ADVANCED:INTERNAL=1 -//Details about finding Threads -FIND_PACKAGE_MESSAGE_DETAILS_Threads:INTERNAL=[TRUE][v()] -//Result of TRY_COMPILE -THREADS_HAVE_PTHREAD_ARG:INTERNAL=TRUE - From d3a3505fdd34ccf3b194bd4c3e58dd12c0f69697 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 14 Oct 2024 02:42:17 -0400 Subject: [PATCH 107/127] Explained location and use of shared config.yml, cleaned comments in add_driver --- docs/rad-sim-code-structure.rst | 4 ++++ rad-sim/example-designs/add/add_driver.cpp | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/docs/rad-sim-code-structure.rst b/docs/rad-sim-code-structure.rst index 42a6b6b..230fa30 100644 --- a/docs/rad-sim-code-structure.rst +++ b/docs/rad-sim-code-structure.rst @@ -223,6 +223,10 @@ This YAML file configures all the RAD-Sim parameters for the simulation of the a ``noc``, ``noc_adapters``, ``config ``, and ``cluster``. The ``noc`` and ``noc_adapters`` parameters are shared across all RADs. There may be multiple ``config `` sections, with each describing a configuration that applies to a specified number of RADs. The ``cluster`` tag describes the cluster of RADs, including the number of RADs and their configurations. + +This file should be located in the same directory as the ``config.py`` script. For a new design, you should copy +the ``config.yml`` file from one of the provided example design directories and make modifications for your use case. + Note that the parameters within a ``config `` subsection can be applied to a single RAD or shared among multiple RADs. An example configuration file is shown below, followed by an explanation for each configuration parameter. diff --git a/rad-sim/example-designs/add/add_driver.cpp b/rad-sim/example-designs/add/add_driver.cpp index 5bf4208..a1f778f 100644 --- a/rad-sim/example-designs/add/add_driver.cpp +++ b/rad-sim/example-designs/add/add_driver.cpp @@ -6,7 +6,7 @@ add_driver::add_driver(const sc_module_name &name, RADSimDesignContext* radsim_design_) : sc_module(name) { - this->radsim_design = radsim_design_; //AKB ADDED: update member for later use + this->radsim_design = radsim_design_; //for simulation cycle count start_cycle = 0; From 0c72baa5099fc0440f05ce47f2b671c38537ee7c Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 14 Oct 2024 03:55:02 -0400 Subject: [PATCH 108/127] Created wrapper fn for portal reset to design top --- rad-sim/example-designs/dlrm/dlrm_top.cpp | 2 +- rad-sim/example-designs/mlp/mlp_top.cpp | 4 +--- rad-sim/example-designs/mlp_int8/mlp_top.cpp | 4 +--- rad-sim/example-designs/npu/npu_top.cpp | 4 +--- rad-sim/sim/design_top.hpp | 8 ++++++++ 5 files changed, 12 insertions(+), 10 deletions(-) diff --git a/rad-sim/example-designs/dlrm/dlrm_top.cpp b/rad-sim/example-designs/dlrm/dlrm_top.cpp index fb73c70..0667275 100644 --- a/rad-sim/example-designs/dlrm/dlrm_top.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_top.cpp @@ -134,7 +134,7 @@ dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_desig ch_id += mem_channels[ctrl_id]; } - this->portal_inst->rst(rst); + this->connectPortalReset(&rst); radsim_design->BuildDesignContext("dlrm.place", "dlrm.clks"); radsim_design->CreateSystemNoCs(rst); diff --git a/rad-sim/example-designs/mlp/mlp_top.cpp b/rad-sim/example-designs/mlp/mlp_top.cpp index e4b2c15..97316b8 100644 --- a/rad-sim/example-designs/mlp/mlp_top.cpp +++ b/rad-sim/example-designs/mlp/mlp_top.cpp @@ -66,9 +66,7 @@ mlp_top::mlp_top(const sc_module_name &name, RADSimDesignContext* radsim_design) output_collector->data_fifo_ren(collector_fifo_ren); output_collector->data_fifo_rdata(collector_fifo_rdata); - #ifndef SINGLE_RAD - this->portal_inst->rst(rst); - #endif + this->connectPortalReset(&rst); radsim_design->BuildDesignContext("mlp.place", "mlp.clks"); radsim_design->CreateSystemNoCs(rst); radsim_design->ConnectModulesToNoC(); diff --git a/rad-sim/example-designs/mlp_int8/mlp_top.cpp b/rad-sim/example-designs/mlp_int8/mlp_top.cpp index e5382dd..27e8fd7 100644 --- a/rad-sim/example-designs/mlp_int8/mlp_top.cpp +++ b/rad-sim/example-designs/mlp_int8/mlp_top.cpp @@ -117,9 +117,7 @@ mlp_top::mlp_top(const sc_module_name &name, RADSimDesignContext* radsim_design) iloader->mvm_id_fifo_wen(inst_loader_mvm_id_fifo_wen); iloader->mvm_id_fifo_wdata(inst_loader_mvm_id_fifo_wdata); - #ifndef SINGLE_RAD - this->portal_inst->rst(rst); - #endif + this->connectPortalReset(&rst); radsim_design->BuildDesignContext("mlp.place", "mlp.clks"); radsim_design->CreateSystemNoCs(rst); radsim_design->ConnectModulesToNoC(); diff --git a/rad-sim/example-designs/npu/npu_top.cpp b/rad-sim/example-designs/npu/npu_top.cpp index d5c1636..4f3fcdd 100644 --- a/rad-sim/example-designs/npu/npu_top.cpp +++ b/rad-sim/example-designs/npu/npu_top.cpp @@ -80,9 +80,7 @@ npu_top::npu_top(const sc_module_name &name, RADSimDesignContext* radsim_design) vector_elementwise_blocks[thread_id]->ext_output_fifo_rdata(ofifo_rdata[thread_id]); } - #ifndef SINGLE_RAD - this->portal_inst->rst(rst); - #endif + this->connectPortalReset(&rst); radsim_design->BuildDesignContext("npu.place", "npu.clks"); radsim_design->CreateSystemNoCs(rst); radsim_design->ConnectModulesToNoC(); diff --git a/rad-sim/sim/design_top.hpp b/rad-sim/sim/design_top.hpp index 9202523..c040040 100644 --- a/rad-sim/sim/design_top.hpp +++ b/rad-sim/sim/design_top.hpp @@ -23,6 +23,9 @@ class RADSimDesignTop : virtual public sc_module { //connect master to master instead, to expose to top portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); //top drives portal bc top receives slave inputs + + //connect reset signal + // portal_inst->rst(rst); #endif } ~RADSimDesignTop() { @@ -30,4 +33,9 @@ class RADSimDesignTop : virtual public sc_module { delete portal_inst; #endif } + void connectPortalReset(sc_in* rst) { + #ifndef SINGLE_RAD + this->portal_inst->rst(*rst); + #endif + } }; \ No newline at end of file From 290a7c03fe089f6e38dba6d4e497f77b842c5bf4 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 14 Oct 2024 04:07:12 -0400 Subject: [PATCH 109/127] Replaced design_system with RADSimDesignSystem --- docs/rad-sim-code-structure.rst | 4 ++-- rad-sim/example-designs/add/add_system.cpp | 2 +- rad-sim/example-designs/add/add_system.hpp | 2 +- rad-sim/example-designs/dlrm/dlrm_system.cpp | 2 +- rad-sim/example-designs/dlrm/dlrm_system.hpp | 2 +- rad-sim/example-designs/mlp/mlp_system.hpp | 2 +- rad-sim/example-designs/mlp_int8/mlp_int8_system.cpp | 2 +- rad-sim/example-designs/mlp_int8/mlp_int8_system.hpp | 2 +- rad-sim/example-designs/mult/mult_system.cpp | 2 +- rad-sim/example-designs/mult/mult_system.hpp | 2 +- rad-sim/example-designs/npu/npu_system.cpp | 2 +- rad-sim/example-designs/npu/npu_system.hpp | 2 +- rad-sim/sim/design_system.hpp | 2 +- 13 files changed, 14 insertions(+), 14 deletions(-) diff --git a/docs/rad-sim-code-structure.rst b/docs/rad-sim-code-structure.rst index 230fa30..5e30ffa 100644 --- a/docs/rad-sim-code-structure.rst +++ b/docs/rad-sim-code-structure.rst @@ -74,7 +74,7 @@ This directory includes all the RAD-Sim simulation infrastructure and utilities: * The ``RADSimCluster`` class in ``radsim_cluster.{cpp/hpp}`` stores details for the cluster of RADs for the RADSim simulation. This is the top-level of the hierarchy for simulation. Single-RAD simulation is implemented as a cluster of one RAD. -* The ``design_system`` class in ``design_system.hpp`` is a generalized parent class used per design. The design_system wraps around the device-under-test (DUT) and testbench. Each design in the ``example-designs`` directory has its own system class that should inherit from this class. This class has ``sc_module`` as its virtual parent class. +* The ``RADSimDesignSystem`` class in ``design_system.hpp`` is a generalized parent class used per design. The RADSimDesignSystem wraps around the device-under-test (DUT) and testbench. Each design in the ``example-designs`` directory has its own system class that should inherit from this class. This class has ``sc_module`` as its virtual parent class. * The ``RADSimDesignTop`` class in ``design_top.hpp`` is a parent class for the DUT (top) class used within any design. It contains the creation of a portal module which is used to interface with the inter-RAD network. This class has ``sc_module`` as its virtual parent class. @@ -147,7 +147,7 @@ this driver module performs the following steps: Design System (``_system.{cpp/hpp}``) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -This inherits from the design_system class and is a simple SystemC module (``sc_module``) that instantiates and connects the design top-level and simulation +This inherits from the RADSimDesignSystem class and is a simple SystemC module (``sc_module``) that instantiates and connects the design top-level and simulation driver modules. This is the single module that will be instantiated inside the ``sc_main()`` function in the ``main.cpp`` file. diff --git a/rad-sim/example-designs/add/add_system.cpp b/rad-sim/example-designs/add/add_system.cpp index 436b473..1e3d825 100644 --- a/rad-sim/example-designs/add/add_system.cpp +++ b/rad-sim/example-designs/add/add_system.cpp @@ -25,7 +25,7 @@ add_system::add_system(const sc_module_name &name, sc_clock *driver_clk_sig, RAD dut_inst->response(response_sig); dut_inst->response_valid(response_valid_sig); dut_inst->portal_recvd(portal_recvd_sig); - //add add_top as dut instance for parent class design_system + //add add_top as dut instance for parent class RADSimDesignSystem this->design_dut_inst = dut_inst; } diff --git a/rad-sim/example-designs/add/add_system.hpp b/rad-sim/example-designs/add/add_system.hpp index 1509af8..d529ffd 100644 --- a/rad-sim/example-designs/add/add_system.hpp +++ b/rad-sim/example-designs/add/add_system.hpp @@ -6,7 +6,7 @@ #include #include -class add_system : public design_system { +class add_system : public RADSimDesignSystem { private: sc_signal> client_tdata_sig; sc_signal client_tlast_sig; diff --git a/rad-sim/example-designs/dlrm/dlrm_system.cpp b/rad-sim/example-designs/dlrm/dlrm_system.cpp index 0373e47..f278b91 100644 --- a/rad-sim/example-designs/dlrm/dlrm_system.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_system.cpp @@ -32,7 +32,7 @@ dlrm_system::dlrm_system(const sc_module_name &name, sc_clock *driver_clk_sig, R dut_inst->collector_fifo_rdy(collector_fifo_rdy_sig); dut_inst->collector_fifo_ren(collector_fifo_ren_sig); dut_inst->collector_fifo_rdata(collector_fifo_rdata_sig); - //add _top as dut instance for parent class design_system + //add _top as dut instance for parent class RADSimDesignSystem this->design_dut_inst = dut_inst; } diff --git a/rad-sim/example-designs/dlrm/dlrm_system.hpp b/rad-sim/example-designs/dlrm/dlrm_system.hpp index 0c6c1be..264c0d6 100644 --- a/rad-sim/example-designs/dlrm/dlrm_system.hpp +++ b/rad-sim/example-designs/dlrm/dlrm_system.hpp @@ -6,7 +6,7 @@ #include #include -class dlrm_system : public design_system { //sc_module { +class dlrm_system : public RADSimDesignSystem { //sc_module { private: sc_signal> lookup_indecies_data_sig; sc_signal> lookup_indecies_target_channels_sig; diff --git a/rad-sim/example-designs/mlp/mlp_system.hpp b/rad-sim/example-designs/mlp/mlp_system.hpp index da56d64..50be2b0 100644 --- a/rad-sim/example-designs/mlp/mlp_system.hpp +++ b/rad-sim/example-designs/mlp/mlp_system.hpp @@ -8,7 +8,7 @@ #include #include -class mlp_system : public design_system { +class mlp_system : public RADSimDesignSystem { private: sc_vector> dispatcher_fifo_rdy_signal; sc_vector> dispatcher_fifo_wen_signal; diff --git a/rad-sim/example-designs/mlp_int8/mlp_int8_system.cpp b/rad-sim/example-designs/mlp_int8/mlp_int8_system.cpp index a3a6978..7776e50 100644 --- a/rad-sim/example-designs/mlp_int8/mlp_int8_system.cpp +++ b/rad-sim/example-designs/mlp_int8/mlp_int8_system.cpp @@ -105,7 +105,7 @@ mlp_int8_system::mlp_int8_system(const sc_module_name& name, sc_clock* driver_cl mlp_inst->collector_fifo_ren(collector_fifo_ren_signal); mlp_inst->collector_fifo_rdata(collector_fifo_rdata_signal); - //add _top as dut instance for parent class design_system + //add _top as dut instance for parent class RADSimDesignSystem this->design_dut_inst = mlp_inst; } diff --git a/rad-sim/example-designs/mlp_int8/mlp_int8_system.hpp b/rad-sim/example-designs/mlp_int8/mlp_int8_system.hpp index f4dc4e2..469a4af 100644 --- a/rad-sim/example-designs/mlp_int8/mlp_int8_system.hpp +++ b/rad-sim/example-designs/mlp_int8/mlp_int8_system.hpp @@ -7,7 +7,7 @@ #include #include -class mlp_int8_system : public design_system { +class mlp_int8_system : public RADSimDesignSystem { private: std::vector num_mvms_sysc; std::vector num_mvms_rtl; diff --git a/rad-sim/example-designs/mult/mult_system.cpp b/rad-sim/example-designs/mult/mult_system.cpp index 811d083..82a2e35 100644 --- a/rad-sim/example-designs/mult/mult_system.cpp +++ b/rad-sim/example-designs/mult/mult_system.cpp @@ -24,7 +24,7 @@ mult_system::mult_system(const sc_module_name &name, sc_clock *driver_clk_sig, R dut_inst->client_ready(client_ready_sig); dut_inst->response(response_sig); dut_inst->response_valid(response_valid_sig); - //add mult_top as dut instance for parent class design_system + //add mult_top as dut instance for parent class RADSimDesignSystem this->design_dut_inst = dut_inst; dut_inst->mult_inter_rad_recvd(mult_inter_rad_recvd_sig); } diff --git a/rad-sim/example-designs/mult/mult_system.hpp b/rad-sim/example-designs/mult/mult_system.hpp index eb02374..483eebc 100644 --- a/rad-sim/example-designs/mult/mult_system.hpp +++ b/rad-sim/example-designs/mult/mult_system.hpp @@ -6,7 +6,7 @@ #include #include -class mult_system : public design_system { +class mult_system : public RADSimDesignSystem { private: sc_signal> client_tdata_sig; sc_signal client_tlast_sig; diff --git a/rad-sim/example-designs/npu/npu_system.cpp b/rad-sim/example-designs/npu/npu_system.cpp index 2236084..564c6ab 100644 --- a/rad-sim/example-designs/npu/npu_system.cpp +++ b/rad-sim/example-designs/npu/npu_system.cpp @@ -63,7 +63,7 @@ npu_system::npu_system(const sc_module_name &name, sc_clock* driver_clk_sig, RAD npu_inst->ofifo_ren(ofifo_ren); npu_inst->ofifo_rdata(ofifo_rdata); - //add _top as dut instance for parent class design_system + //add _top as dut instance for parent class RADSimDesignSystem this->design_dut_inst = npu_inst; } diff --git a/rad-sim/example-designs/npu/npu_system.hpp b/rad-sim/example-designs/npu/npu_system.hpp index a68c69a..1e18097 100644 --- a/rad-sim/example-designs/npu/npu_system.hpp +++ b/rad-sim/example-designs/npu/npu_system.hpp @@ -11,7 +11,7 @@ #include #include -class npu_system : public design_system { +class npu_system : public RADSimDesignSystem { private: public: sc_signal inst_wdata; diff --git a/rad-sim/sim/design_system.hpp b/rad-sim/sim/design_system.hpp index 65b0fde..f830292 100644 --- a/rad-sim/sim/design_system.hpp +++ b/rad-sim/sim/design_system.hpp @@ -3,7 +3,7 @@ #include #include -class design_system : virtual public sc_module { +class RADSimDesignSystem : virtual public sc_module { public: RADSimDesignTop* design_dut_inst; }; \ No newline at end of file From 53b00c1c47a13286866d6524b52a31a95357f928 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 14 Oct 2024 04:09:35 -0400 Subject: [PATCH 110/127] Replaced under_scored with CamelCase for RADSimInterRad class --- docs/rad-sim-code-structure.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/rad-sim-code-structure.rst b/docs/rad-sim-code-structure.rst index 5e30ffa..a6014cf 100644 --- a/docs/rad-sim-code-structure.rst +++ b/docs/rad-sim-code-structure.rst @@ -82,7 +82,7 @@ This directory includes all the RAD-Sim simulation infrastructure and utilities: * RAD-Sim constant definitions are in ``radsim_defines.hpp``. This header file is automatically generated by the RAD-Sim configuration script (``config.py``). -* The ``radsim_inter_rad class`` in ``radsim_inter_rad.{cpp/hpp}`` implements a latency- and bandwidth-constrained network for communication between RADs. +* The ``RADSimInterRad class`` in ``radsim_inter_rad.{cpp/hpp}`` implements a latency- and bandwidth-constrained network for communication between RADs. * The ``RADSimModule`` class in ``radsim_module.{cpp/hpp}`` implements an abstract class from which all RAD-Sim application modules are derived. This class stores information about each module in the design such as its name, its clock, pointers to its AXI-MM/AXI-S ports and their data widths. Each module in the application design must implement the pure virtual funtion ``RegisterModuleInfo()`` with adds the module AXI-MM and AXI-S master/slave ports to the ``RADSimDesignContext`` class. From 76384b47d79a7b848eae3389c03a1479e3faa957 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Mon, 14 Oct 2024 04:23:19 -0400 Subject: [PATCH 111/127] Updated loop var names for config, wording in code structure doc --- docs/rad-sim-code-structure.rst | 2 +- rad-sim/config.py | 57 +++++++++++++++++---------------- 2 files changed, 30 insertions(+), 29 deletions(-) diff --git a/docs/rad-sim-code-structure.rst b/docs/rad-sim-code-structure.rst index a6014cf..c2018fc 100644 --- a/docs/rad-sim-code-structure.rst +++ b/docs/rad-sim-code-structure.rst @@ -221,7 +221,7 @@ RAD-Sim Configuration File (``config.yml``) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ This YAML file configures all the RAD-Sim parameters for the simulation of the application design under 4 main tags: ``noc``, ``noc_adapters``, ``config ``, and ``cluster``. The ``noc`` and ``noc_adapters`` parameters are shared across all RADs. -There may be multiple ``config `` sections, with each describing a configuration that applies to a specified number of RADs. +There may be multiple ``config `` sections, each describing a RAD configuration that can be applied to a single or multiple devices in the cluster. The ``cluster`` tag describes the cluster of RADs, including the number of RADs and their configurations. This file should be located in the same directory as the ``config.py`` script. For a new design, you should copy diff --git a/rad-sim/config.py b/rad-sim/config.py index e443f7e..e839328 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -99,17 +99,18 @@ def print_config(booksim_params, radsim_header_params, radsim_knobs): def generate_booksim_config_files(booksim_params, radsim_header_params, radsim_knobs, cluster_knobs): - for j in range(len(cluster_knobs["cluster_configs"])): #curr_config_num in range(num_configs): - curr_config_name = cluster_knobs["cluster_configs"][j] #retrieve the config num by rad ID + num_configs = len(cluster_knobs["cluster_configs"]) + for config_idx in range(num_configs): #curr_config_num in range(num_configs): + curr_config_name = cluster_knobs["cluster_configs"][config_idx] #retrieve the config num by rad ID curr_config_num = config_names.index(curr_config_name) print('generate_booksim_config_files fn ' + curr_config_name + ' ' + str(curr_config_num)) - for i in range(booksim_params[curr_config_num]["noc_num_nocs"]): - booksim_config_file = open(booksim_params[curr_config_num]["radsim_root_dir"] + "/sim/noc/noc" + str(i) + "_rad" + str(curr_config_num) + "_config", "w") + for noc_idx in range(booksim_params[curr_config_num]["noc_num_nocs"]): + booksim_config_file = open(booksim_params[curr_config_num]["radsim_root_dir"] + "/sim/noc/noc" + str(noc_idx) + "_rad" + str(curr_config_num) + "_config", "w") # Booksim topology configuration booksim_config_file.write("// Topology\n") - noc_topology = booksim_params[curr_config_num]["noc_topology"][i] - noc_type = booksim_params[curr_config_num]["noc_type"][i] + noc_topology = booksim_params[curr_config_num]["noc_topology"][noc_idx] + noc_type = booksim_params[curr_config_num]["noc_type"][noc_idx] if noc_topology == "mesh" or noc_topology == "torus": # A 3D RAD instance is modeled as a concenterated mesh NoC if noc_type == "2d": @@ -122,8 +123,8 @@ def generate_booksim_config_files(booksim_params, radsim_header_params, radsim_k # Booksim does not support assymetric meshes so it is simplified as a square mesh assuming that a simple dim # order routing will never use the links/routers outside the specified grid - noc_dim_x = booksim_params[curr_config_num]["noc_dim_x"][i] - noc_dim_y = booksim_params[curr_config_num]["noc_dim_y"][i] + noc_dim_x = booksim_params[curr_config_num]["noc_dim_x"][noc_idx] + noc_dim_y = booksim_params[curr_config_num]["noc_dim_y"][noc_idx] larger_noc_dim = noc_dim_x if noc_dim_y > noc_dim_x: larger_noc_dim = noc_dim_y @@ -134,25 +135,25 @@ def generate_booksim_config_files(booksim_params, radsim_header_params, radsim_k # 3D RAD instances as a concentrated mesh of FPGA node, base die node, and two "empty" nodes by adjusting # their IDs if noc_type == "3d": - radsim_header_params["noc_num_nodes"][i] = (larger_noc_dim * larger_noc_dim * 4) + radsim_header_params["noc_num_nodes"][noc_idx] = (larger_noc_dim * larger_noc_dim * 4) #TODO: make changes to have per-RAD booksim config too. for now, just hacky workaround to get radsim_knobs set #for j in range(cluster_knobs["num_rads"]): - #radsim_knobs[j]["noc_num_nodes"][i] = larger_noc_dim * larger_noc_dim * 4 - radsim_knobs[curr_config_num]["noc_num_nodes"][i] = larger_noc_dim * larger_noc_dim * 4 + #radsim_knobs[j]["noc_num_nodes"][noc_idx] = larger_noc_dim * larger_noc_dim * 4 + radsim_knobs[curr_config_num]["noc_num_nodes"][noc_idx] = larger_noc_dim * larger_noc_dim * 4 booksim_config_file.write("c = 4;\n") booksim_config_file.write("xr = 2;\n") booksim_config_file.write("yr = 2;\n") else: - radsim_header_params["noc_num_nodes"][i] = (larger_noc_dim * larger_noc_dim) + radsim_header_params["noc_num_nodes"][noc_idx] = (larger_noc_dim * larger_noc_dim) #TODO: make changes to have per-RAD booksim config AND radsim_header_params too. for now, just hacky workaround to get radsim_knobs set # for j in range(cluster_knobs["num_rads"]): - # radsim_knobs[j]["noc_num_nodes"][i] = larger_noc_dim * larger_noc_dim - radsim_knobs[curr_config_num]["noc_num_nodes"][i] = larger_noc_dim * larger_noc_dim + # radsim_knobs[j]["noc_num_nodes"][noc_idx] = larger_noc_dim * larger_noc_dim + radsim_knobs[curr_config_num]["noc_num_nodes"][noc_idx] = larger_noc_dim * larger_noc_dim elif noc_topology == "anynet": booksim_config_file.write("topology = anynet;\n") - booksim_config_file.write("network_file = " + booksim_params[curr_config_num]["noc_anynet_file"][i] + ";\n") - if radsim_header_params[curr_config_num]["noc_num_nodes"][i] == 0: + booksim_config_file.write("network_file = " + booksim_params[curr_config_num]["noc_anynet_file"][noc_idx] + ";\n") + if radsim_header_params[curr_config_num]["noc_num_nodes"][noc_idx] == 0: print("Config Error: Number of nodes parameter missing for anynet NoC topologies!") exit(1) @@ -163,13 +164,13 @@ def generate_booksim_config_files(booksim_params, radsim_header_params, radsim_k # Booksim routing function configuration booksim_config_file.write("// Routing\n") - booksim_config_file.write("routing_function = " + booksim_params[curr_config_num]["noc_routing_func"][i] + ";\n") + booksim_config_file.write("routing_function = " + booksim_params[curr_config_num]["noc_routing_func"][noc_idx] + ";\n") booksim_config_file.write("\n") # Booksim flow control configuration booksim_config_file.write("// Flow control\n") - noc_vcs = booksim_params[curr_config_num]["noc_vcs"][i] - noc_num_packet_types = booksim_params[curr_config_num]["noc_num_packet_types"][i] + noc_vcs = booksim_params[curr_config_num]["noc_vcs"][noc_idx] + noc_num_packet_types = booksim_params[curr_config_num]["noc_num_packet_types"][noc_idx] if noc_vcs % noc_num_packet_types != 0: print("Config Error: Number of virtual channels has to be a multiple of the number of packet types!") exit(1) @@ -178,8 +179,8 @@ def generate_booksim_config_files(booksim_params, radsim_header_params, radsim_k exit(1) noc_num_vcs_per_packet_type = int(noc_vcs / noc_num_packet_types) booksim_config_file.write("num_vcs = " + str(noc_vcs) + ";\n") - booksim_config_file.write("vc_buf_size = " + str(booksim_params[curr_config_num]["noc_vc_buffer_size"][i]) + ";\n") - booksim_config_file.write("output_buffer_size = "+ str(booksim_params[curr_config_num]["noc_output_buffer_size"][i])+ ";\n") + booksim_config_file.write("vc_buf_size = " + str(booksim_params[curr_config_num]["noc_vc_buffer_size"][noc_idx]) + ";\n") + booksim_config_file.write("output_buffer_size = "+ str(booksim_params[curr_config_num]["noc_output_buffer_size"][noc_idx])+ ";\n") booksim_flit_types = ["read_request", "write_request", "write_data", "read_reply", "write_reply"] vc_count = 0 for t in range(noc_num_packet_types): @@ -190,15 +191,15 @@ def generate_booksim_config_files(booksim_params, radsim_header_params, radsim_k # Booksim router architecture and delays configuration booksim_config_file.write("// Router architecture & delays\n") - booksim_config_file.write("router = " + booksim_params[curr_config_num]["noc_router_uarch"][i] + ";\n") - booksim_config_file.write("vc_allocator = " + booksim_params[curr_config_num]["noc_vc_allocator"][i] + ";\n") - booksim_config_file.write("sw_allocator = " + booksim_params[curr_config_num]["noc_sw_allocator"][i] + ";\n") + booksim_config_file.write("router = " + booksim_params[curr_config_num]["noc_router_uarch"][noc_idx] + ";\n") + booksim_config_file.write("vc_allocator = " + booksim_params[curr_config_num]["noc_vc_allocator"][noc_idx] + ";\n") + booksim_config_file.write("sw_allocator = " + booksim_params[curr_config_num]["noc_sw_allocator"][noc_idx] + ";\n") booksim_config_file.write("alloc_iters = 1;\n") booksim_config_file.write("wait_for_tail_credit = 0;\n") - booksim_config_file.write("credit_delay = " + str(booksim_params[curr_config_num]["noc_credit_delay"][i]) + ";\n") - booksim_config_file.write("routing_delay = " + str(booksim_params[curr_config_num]["noc_routing_delay"][i]) + ";\n") - booksim_config_file.write("vc_alloc_delay = " + str(booksim_params[curr_config_num]["noc_vc_alloc_delay"][i]) + ";\n") - booksim_config_file.write("sw_alloc_delay = " + str(booksim_params[curr_config_num]["noc_sw_alloc_delay"][i]) + ";\n") + booksim_config_file.write("credit_delay = " + str(booksim_params[curr_config_num]["noc_credit_delay"][noc_idx]) + ";\n") + booksim_config_file.write("routing_delay = " + str(booksim_params[curr_config_num]["noc_routing_delay"][noc_idx]) + ";\n") + booksim_config_file.write("vc_alloc_delay = " + str(booksim_params[curr_config_num]["noc_vc_alloc_delay"][noc_idx]) + ";\n") + booksim_config_file.write("sw_alloc_delay = " + str(booksim_params[curr_config_num]["noc_sw_alloc_delay"][noc_idx]) + ";\n") booksim_config_file.close() From 41cf2c57f3b2e8f7a84b6f8dc9e97f3942d63d48 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 16 Oct 2024 00:54:25 -0400 Subject: [PATCH 112/127] Fixed RADSimDesignSystem class name --- rad-sim/sim/radsim_cluster.cpp | 2 +- rad-sim/sim/radsim_cluster.hpp | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/rad-sim/sim/radsim_cluster.cpp b/rad-sim/sim/radsim_cluster.cpp index e004a43..fc92e59 100644 --- a/rad-sim/sim/radsim_cluster.cpp +++ b/rad-sim/sim/radsim_cluster.cpp @@ -45,7 +45,7 @@ RADSimCluster::AllRADsNotDone() { } void -RADSimCluster::StoreSystem(design_system* system) { +RADSimCluster::StoreSystem(RADSimDesignSystem* system) { all_systems.push_back(system); } diff --git a/rad-sim/sim/radsim_cluster.hpp b/rad-sim/sim/radsim_cluster.hpp index 94517d4..8826934 100644 --- a/rad-sim/sim/radsim_cluster.hpp +++ b/rad-sim/sim/radsim_cluster.hpp @@ -12,7 +12,7 @@ class RADSimCluster { public: int num_rads; std::vector all_rads; - std::vector all_systems; + std::vector all_systems; enum inter_rad_topo_type { ALL_TO_ALL = 0, @@ -33,5 +33,5 @@ class RADSimCluster { void SetTopo(inter_rad_topo_type inter_rad_topo); void SetConnModel(inter_rad_conn_model_type inter_rad_topo); bool AllRADsNotDone(); - void StoreSystem(design_system* system); + void StoreSystem(RADSimDesignSystem* system); }; \ No newline at end of file From a706706442870acfa06d0c1558507f2f810b6eee Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 16 Oct 2024 01:30:12 -0400 Subject: [PATCH 113/127] Removed old multiple adder design, removed old portal code from dlrm and add --- rad-sim/config.py | 2 +- rad-sim/example-designs/add/CMakeLists.txt | 2 - rad-sim/example-designs/add/add_driver.cpp | 8 +- rad-sim/example-designs/add/config.yml | 19 +- .../example-designs/add/modules/portal.cpp | 126 --------- .../example-designs/add/modules/portal.hpp | 49 ---- rad-sim/example-designs/add_multi/.gitignore | 3 - .../example-designs/add_multi/CMakeLists.txt | 33 --- rad-sim/example-designs/add_multi/add.clks | 3 - rad-sim/example-designs/add_multi/add.place | 3 - .../example-designs/add_multi/add_driver.cpp | 87 ------ .../example-designs/add_multi/add_driver.hpp | 39 --- .../add_multi/add_multi_system.cpp | 41 --- .../add_multi/add_multi_system.hpp | 31 --- rad-sim/example-designs/add_multi/add_top.cpp | 45 ---- rad-sim/example-designs/add_multi/add_top.hpp | 32 --- rad-sim/example-designs/add_multi/config.yml | 37 --- .../add_multi/modules/adder.cpp | 67 ----- .../add_multi/modules/adder.hpp | 32 --- .../add_multi/modules/client.cpp | 111 -------- .../add_multi/modules/client.hpp | 47 ---- rad-sim/example-designs/dlrm/CMakeLists.txt | 2 - rad-sim/example-designs/dlrm/dlrm_top.hpp | 2 - .../example-designs/dlrm/modules/portal.cpp | 247 ------------------ .../example-designs/dlrm/modules/portal.hpp | 56 ---- 25 files changed, 16 insertions(+), 1108 deletions(-) delete mode 100644 rad-sim/example-designs/add/modules/portal.cpp delete mode 100644 rad-sim/example-designs/add/modules/portal.hpp delete mode 100644 rad-sim/example-designs/add_multi/.gitignore delete mode 100644 rad-sim/example-designs/add_multi/CMakeLists.txt delete mode 100644 rad-sim/example-designs/add_multi/add.clks delete mode 100644 rad-sim/example-designs/add_multi/add.place delete mode 100644 rad-sim/example-designs/add_multi/add_driver.cpp delete mode 100644 rad-sim/example-designs/add_multi/add_driver.hpp delete mode 100644 rad-sim/example-designs/add_multi/add_multi_system.cpp delete mode 100644 rad-sim/example-designs/add_multi/add_multi_system.hpp delete mode 100644 rad-sim/example-designs/add_multi/add_top.cpp delete mode 100644 rad-sim/example-designs/add_multi/add_top.hpp delete mode 100644 rad-sim/example-designs/add_multi/config.yml delete mode 100644 rad-sim/example-designs/add_multi/modules/adder.cpp delete mode 100644 rad-sim/example-designs/add_multi/modules/adder.hpp delete mode 100644 rad-sim/example-designs/add_multi/modules/client.cpp delete mode 100644 rad-sim/example-designs/add_multi/modules/client.hpp delete mode 100644 rad-sim/example-designs/dlrm/modules/portal.cpp delete mode 100644 rad-sim/example-designs/dlrm/modules/portal.hpp diff --git a/rad-sim/config.py b/rad-sim/config.py index e839328..e3190af 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -359,7 +359,7 @@ def generate_radsim_config_file(radsim_knobs, cluster_knobs): radsim_config_file.write("inter_rad_bw_accept_cycles " + str(inter_rad_bw_accept_cycles) + "\n") radsim_config_file.write("inter_rad_bw_total_cycles " + str(inter_rad_bw_total_cycles) + "\n") else: - print('generate_radsim_config_file error: Invalid inter_rad_bw. Proceeding with default bandwidth of AXIS_DATAW per cycle.') + print('generate_radsim_config_file error: Invalid or missing inter_rad_bw. Proceeding with default bandwidth of AXIS_DATAW per cycle.') radsim_config_file.write("inter_rad_bw_accept_cycles " + str(1) + "\n") radsim_config_file.write("inter_rad_bw_total_cycles " + str(1) + "\n") continue diff --git a/rad-sim/example-designs/add/CMakeLists.txt b/rad-sim/example-designs/add/CMakeLists.txt index defcd1b..344774a 100644 --- a/rad-sim/example-designs/add/CMakeLists.txt +++ b/rad-sim/example-designs/add/CMakeLists.txt @@ -15,7 +15,6 @@ set(srcfiles modules/adder.cpp modules/client.cpp modules/fifo.cpp - modules/portal.cpp add_top.cpp add_driver.cpp add_system.cpp @@ -25,7 +24,6 @@ set(hdrfiles modules/adder.hpp modules/client.hpp modules/fifo.hpp - modules/portal.hpp add_top.hpp add_driver.hpp add_system.hpp diff --git a/rad-sim/example-designs/add/add_driver.cpp b/rad-sim/example-designs/add/add_driver.cpp index a1f778f..a7a5889 100644 --- a/rad-sim/example-designs/add/add_driver.cpp +++ b/rad-sim/example-designs/add/add_driver.cpp @@ -1,6 +1,6 @@ #include -#define NUM_ADDENDS 5 //3 +#define NUM_ADDENDS 3 #define TOTAL_RADS 5 add_driver::add_driver(const sc_module_name &name, RADSimDesignContext* radsim_design_) @@ -22,10 +22,9 @@ add_driver::add_driver(const sc_module_name &name, RADSimDesignContext* radsim_d unsigned int r_num = std::rand() % 10 + 1; std::cout << r_num << " "; for (int i = 1; i < TOTAL_RADS; i++) { + //push same addend into FIFO repeatedly, once for each RAD numbers_to_send.push(r_num); } - // numbers_to_send.push(r_num); - // numbers_to_send.push(r_num); //push twice bc two mult modules now actual_sum += r_num; } std::cout << std::endl << "----------------------------------------" << std::endl; @@ -48,7 +47,6 @@ void add_driver::source() { while (!numbers_to_send.empty()) { client_tdata.write(numbers_to_send.front()); - //client_tlast.write(numbers_to_send.size() <= 1); client_tlast.write(numbers_to_send.size() <= TOTAL_RADS-1); //bc sending to TOTAL_RADS-1 mult RADs, so both receive the last flag client_valid.write(true); @@ -86,7 +84,7 @@ void add_driver::sink() { end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); std::cout << "Simulation Cycles for Just Adder Portion = " << end_cycle - start_cycle << std::endl; - this->radsim_design->set_rad_done(); //flag to replace sc_stop calls + this->radsim_design->set_rad_done(); return; } \ No newline at end of file diff --git a/rad-sim/example-designs/add/config.yml b/rad-sim/example-designs/add/config.yml index 24749d8..6b5a978 100644 --- a/rad-sim/example-designs/add/config.yml +++ b/rad-sim/example-designs/add/config.yml @@ -1,3 +1,9 @@ +config rad1: + design: + name: 'add' + noc_placement: ['add.place'] + clk_periods: [5.0] + noc: type: ['2d'] num_nocs: 1 @@ -27,11 +33,10 @@ noc_adapters: out_arbiter: ['priority_rr'] vc_mapping: ['direct'] -design: - name: 'add' - noc_placement: ['add.place'] - clk_periods: [5.0] -telemetry: - log_verbosity: 2 - traces: [] \ No newline at end of file +cluster: + sim_driver_period: 5.0 + telemetry_log_verbosity: 2 + telemetry_traces: [] + num_rads: 2 + cluster_configs: ['rad1', 'rad1'] \ No newline at end of file diff --git a/rad-sim/example-designs/add/modules/portal.cpp b/rad-sim/example-designs/add/modules/portal.cpp deleted file mode 100644 index 54d0cc5..0000000 --- a/rad-sim/example-designs/add/modules/portal.cpp +++ /dev/null @@ -1,126 +0,0 @@ -#include - -portal::portal(const sc_module_name &name, RADSimDesignContext* radsim_design) - : RADSimModule(name, radsim_design) { - - this->radsim_design = radsim_design; - - //combinational logic - SC_METHOD(Assign); - //sequential logic - SC_CTHREAD(Tick, clk.pos()); - // This function must be defined & called for any RAD-Sim module to register - // its info for automatically connecting to the NoC - this->RegisterModuleInfo(); //can comment out if not connecting to NoC -} - - -portal::~portal() {} - -void portal::Assign() { //combinational logic - //maybe add reset signal later - axis_portal_slave_interface.tready.write(true); -} - -int counter = 0; -sc_bv data_to_buffer = 0; -sc_bv dest_device = 1; //for testing, fixed at 1 to send to RAD1 which has mult design; //#define AXIS_USERW 66 -//bool got_data = false; -void portal::Tick() { //sequential logic - portal_recvd.write(0); - portal_axis_master.tvalid.write(false); - //bool test_ready_toggle = false; - wait(); - //Always @ positive edge of clock - while (true) { - - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - - if (axis_portal_slave_interface.tvalid.read() && - axis_portal_slave_interface.tready.read()) { - //std::cout << "Also got here" << std:: endl; - //std::cout << "Add design raising valid data to send over portal module on cycle " << curr_cycle << " , will see valid high next clk cycle " << module_name << ": Got Transaction (user = " - // << axis_portal_slave_interface.tuser.read().to_uint64() << ") (addend = " - // << axis_portal_slave_interface.tdata.read().to_uint64() << ")!" - // << std::endl; - data_to_buffer = axis_portal_slave_interface.tdata.read(); - //got_data = true; - portal_axis_fields curr_transaction = { - axis_portal_slave_interface.tvalid.read(), - axis_portal_slave_interface.tready.read(), - axis_portal_slave_interface.tdata.read(), - axis_portal_slave_interface.tstrb.read(), - axis_portal_slave_interface.tkeep.read(), - axis_portal_slave_interface.tlast.read(), - axis_portal_slave_interface.tid.read(), - axis_portal_slave_interface.tdest.read(), - axis_portal_slave_interface.tuser.read() //tuser field - }; - - portal_axis_fifo.push(curr_transaction); - } - - //warning: must do this before next if-else block so that we pop before reading front. otherwise we get outtdated value on second turn. - //we see valid as high the clock cycle AFTER we set it as high in the if-else below - if (portal_axis_master.tvalid.read() && portal_axis_master.tready.read()) { // && test_ready_toggle) { - //pop out of fifo - if (!portal_axis_fifo.empty()) { - //test_ready_toggle = false; - portal_axis_fifo.pop(); - //std::cout << "portal.cpp in add design sent " << portal_axis_master.tdata.read().to_int64() << " to dest_device " << dest_device.to_int64() << " on cycle " << curr_cycle << std::endl; - portal_recvd.write(1); - if (portal_axis_master.tlast.read()) { - //std::cout << "Add design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; - } - } - else { //should never reach here because valid should be false if fifo is empty - //std::cout << "reached here but why? portal_axis_fifo.size(): " << portal_axis_fifo.size() << std::endl; - } - } - - if ((portal_axis_fifo.size() > 0) ) { //&& test_ready_toggle) { - portal_axis_fields curr_transaction = portal_axis_fifo.front(); - portal_axis_master.tdata.write(curr_transaction.tdata); - portal_axis_master.tdest.write(curr_transaction.tdest); - portal_axis_master.tuser.write(curr_transaction.tuser); - portal_axis_master.tvalid.write(true); - portal_axis_master.tlast.write(curr_transaction.tlast); - //test_ready_toggle = false; - } - else { - //counter++; - portal_axis_master.tdata.write(0); - //portal_axis_master.tuser.write(dest_device); - portal_axis_master.tvalid.write(false); - //test_ready_toggle = true; - } - - /*if (portal_axis_master.tvalid.read()) { - test_ready_toggle = !test_ready_toggle; - }*/ - - /*else if (!test_ready_toggle) { - test_ready_toggle = true; - }*/ - - wait(); - } -} - -void portal::RegisterModuleInfo() { - std::string port_name; - _num_noc_axis_slave_ports = 0; - _num_noc_axis_master_ports = 0; - _num_noc_aximm_slave_ports = 0; - _num_noc_aximm_master_ports = 0; - - port_name = module_name + ".axis_portal_slave_interface"; - RegisterAxisSlavePort(port_name, &axis_portal_slave_interface, DATAW, 0); - //radsim_design->portal_id = radsim_design->GetPortDestinationID(port_name); //store slave port info - //radsim_design->AssignPortalSlaveID(radsim_design->GetPortDestinationID(port_name)); - radsim_design->AssignPortalSlaveName(port_name); //bc other modules will send to this slave interface - - port_name = module_name + ".axis_portal_master_interface"; - RegisterAxisMasterPort(port_name, &axis_portal_master_interface, DATAW, 0); - -} \ No newline at end of file diff --git a/rad-sim/example-designs/add/modules/portal.hpp b/rad-sim/example-designs/add/modules/portal.hpp deleted file mode 100644 index f373d20..0000000 --- a/rad-sim/example-designs/add/modules/portal.hpp +++ /dev/null @@ -1,49 +0,0 @@ -#pragma once - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -struct portal_axis_fields { - bool tvalid; - bool tready; - sc_bv tdata; - sc_bv tstrb; - sc_bv tkeep; - bool tlast; - sc_bv tid; - sc_bv tdest; - sc_bv tuser; - }; - -class portal : public RADSimModule { - private: - std::queue portal_axis_fifo; - - public: - RADSimDesignContext* radsim_design; - //sc_in> portal_in; - //sc_out> portal_out; - //axis ports for external access to inter_rad - axis_master_port portal_axis_master; - axis_slave_port portal_axis_slave; - sc_out portal_recvd; //for testing: flag so add_driver keeps simulation going until data is sent to mult module - //Interfaces to the NoC - axis_slave_port axis_portal_slave_interface; - axis_master_port axis_portal_master_interface; - - portal(const sc_module_name &name, RADSimDesignContext* radsim_design); - ~portal(); - - void Assign(); // Combinational logic process - void Tick(); // Sequential logic process - SC_HAS_PROCESS(portal); - void RegisterModuleInfo(); //even tho did not add AXI Interface, need because is virtual fn in derived class -}; \ No newline at end of file diff --git a/rad-sim/example-designs/add_multi/.gitignore b/rad-sim/example-designs/add_multi/.gitignore deleted file mode 100644 index e2d03be..0000000 --- a/rad-sim/example-designs/add_multi/.gitignore +++ /dev/null @@ -1,3 +0,0 @@ -CMakeFiles/ -Makefile -CMakeCache.txt \ No newline at end of file diff --git a/rad-sim/example-designs/add_multi/CMakeLists.txt b/rad-sim/example-designs/add_multi/CMakeLists.txt deleted file mode 100644 index c18e37d..0000000 --- a/rad-sim/example-designs/add_multi/CMakeLists.txt +++ /dev/null @@ -1,33 +0,0 @@ -cmake_minimum_required(VERSION 3.16) -find_package(SystemCLanguage CONFIG REQUIRED) - -include_directories( - ./ - modules - ../../sim - ../../sim/noc - ../../sim/noc/booksim - ../../sim/noc/booksim/networks - ../../sim/noc/booksim/routers -) - -set(srcfiles - modules/adder.cpp - modules/client.cpp - add_top.cpp - add_driver.cpp - add_multi_system.cpp -) - -set(hdrfiles - modules/adder.hpp - modules/client.hpp - add_top.hpp - add_driver.hpp - add_multi_system.hpp -) - -add_compile_options(-Wall -Wextra -pedantic -g) - -add_library(design STATIC ${srcfiles} ${hdrfiles}) -target_link_libraries(design PUBLIC SystemC::systemc booksim noc) diff --git a/rad-sim/example-designs/add_multi/add.clks b/rad-sim/example-designs/add_multi/add.clks deleted file mode 100644 index 20cd08c..0000000 --- a/rad-sim/example-designs/add_multi/add.clks +++ /dev/null @@ -1,3 +0,0 @@ -adder_inst 0 0 -adder_inst2 0 0 -client_inst 0 0 diff --git a/rad-sim/example-designs/add_multi/add.place b/rad-sim/example-designs/add_multi/add.place deleted file mode 100644 index 73d0cff..0000000 --- a/rad-sim/example-designs/add_multi/add.place +++ /dev/null @@ -1,3 +0,0 @@ -adder_inst 0 0 axis -adder_inst2 0 1 axis -client_inst 0 3 axis diff --git a/rad-sim/example-designs/add_multi/add_driver.cpp b/rad-sim/example-designs/add_multi/add_driver.cpp deleted file mode 100644 index cdc2553..0000000 --- a/rad-sim/example-designs/add_multi/add_driver.cpp +++ /dev/null @@ -1,87 +0,0 @@ -#include - -#define NUM_ADDENDS 3 - -add_driver::add_driver(const sc_module_name &name) - : sc_module(name) { - - // Random Seed - srand (time(NULL)); - actual_sum = 0; - - // Generate random numbers to be added together by the adder - std::cout << "Generating Random Numbers to be added ..." << std::endl; - for (unsigned int i = 0; i < NUM_ADDENDS; i++) { - unsigned int r_num = std::rand() % 10 + 1; - std::cout << r_num << " "; - numbers_to_send.push(r_num); - numbers_to_send.push(r_num); //ADDED, push twice (one for each adder inst) - actual_sum += r_num; - } - std::cout << std::endl << "----------------------------------------" << std::endl; - - SC_CTHREAD(source, clk.pos()); - SC_CTHREAD(sink, clk.pos()); -} - -add_driver::~add_driver() {} - -bool local_sel = 0; //ADDED -void add_driver::source() { - // Reset - rst.write(true); - client_valid.write(false); - wait(); - rst.write(false); - wait(); - - while (!numbers_to_send.empty()) { - client_tdata.write(numbers_to_send.front()); - client_tlast.write(numbers_to_send.size() <= 1); - client_valid.write(true); - - - //ADDED - client_tsel_data.write(local_sel); - client_tsel_valid.write(true); - if (local_sel == 0) { //flip to adder 2 for next number - local_sel = 1; - } - else { //flip to adder 1 for next number - local_sel = 0; - } - - - wait(); - - if (client_valid.read() && client_ready.read()) { - numbers_to_send.pop(); - } - } - client_valid.write(false); - std::cout << "Finished sending all numbers to client module!" << std::endl; - wait(); -} - -void add_driver::sink() { - while (!response_valid.read()) { - wait(); - } - std::cout << "Received " << response.read().to_uint64() << " sum from the adder!" << std::endl; - std::cout << "The actual sum is " << actual_sum << std::endl; - - if (response.read() != actual_sum) std::cout << "FAILURE - Output is not matching!" << std::endl; - else std::cout << "SUCCESS - Output is matching!" << std::endl; - - //ADDED: - while (!response_valid2.read()) { - wait(); - } - std::cout << "Received " << response2.read().to_uint64() << " sum from the adder2!" << std::endl; - std::cout << "The actual sum is " << actual_sum << std::endl; - - if (response2.read() != actual_sum) std::cout << "FAILURE - Output2 is not matching!" << std::endl; - else std::cout << "SUCCESS - Output2 is matching!" << std::endl; - - sc_stop(); -} \ No newline at end of file diff --git a/rad-sim/example-designs/add_multi/add_driver.hpp b/rad-sim/example-designs/add_multi/add_driver.hpp deleted file mode 100644 index 9d0dc64..0000000 --- a/rad-sim/example-designs/add_multi/add_driver.hpp +++ /dev/null @@ -1,39 +0,0 @@ -#pragma once - -#include -#include -#include -#include -#include -#include -#include - -class add_driver : public sc_module { -private: - std::queue numbers_to_send; - int actual_sum; - -public: - sc_in clk; - sc_out rst; - sc_out> client_tdata; - sc_out client_tlast; - sc_out client_valid; - sc_in client_ready; - sc_in> response; - sc_in response_valid; - //ADDED: - sc_in> response2; - sc_in response_valid2; - sc_out client_tsel_data; - sc_out client_tsel_valid; - - - add_driver(const sc_module_name &name); - ~add_driver(); - - void source(); - void sink(); - - SC_HAS_PROCESS(add_driver); -}; \ No newline at end of file diff --git a/rad-sim/example-designs/add_multi/add_multi_system.cpp b/rad-sim/example-designs/add_multi/add_multi_system.cpp deleted file mode 100644 index 0f37e79..0000000 --- a/rad-sim/example-designs/add_multi/add_multi_system.cpp +++ /dev/null @@ -1,41 +0,0 @@ -#include - -add_multi_system::add_multi_system(const sc_module_name &name, sc_clock *driver_clk_sig) - : sc_module(name) { - - // Instantiate driver - driver_inst = new add_driver("driver"); - driver_inst->clk(*driver_clk_sig); - driver_inst->rst(rst_sig); - driver_inst->client_tdata(client_tdata_sig); - driver_inst->client_tlast(client_tlast_sig); - driver_inst->client_valid(client_valid_sig); - driver_inst->client_ready(client_ready_sig); - driver_inst->client_tsel_data(client_tsel_data_sig); - driver_inst->client_tsel_valid(client_tsel_valid_sig); - driver_inst->response(response_sig); - driver_inst->response_valid(response_valid_sig); - driver_inst->response2(response_sig2); - driver_inst->response_valid2(response_valid_sig2); - - // Instantiate design top-level - dut_inst = new add_top("dut"); - dut_inst->rst(rst_sig); - dut_inst->client_tdata(client_tdata_sig); - dut_inst->client_tlast(client_tlast_sig); - dut_inst->client_valid(client_valid_sig); - dut_inst->client_ready(client_ready_sig); - dut_inst->client_tsel_data(client_tsel_data_sig); - dut_inst->client_tsel_valid(client_tsel_valid_sig); - dut_inst->response(response_sig); - dut_inst->response_valid(response_valid_sig); - //for adder_inst2 - dut_inst->response2(response_sig2); - dut_inst->response_valid2(response_valid_sig2); -} - -add_multi_system::~add_multi_system() { - delete driver_inst; - delete dut_inst; - delete sysclk; -} diff --git a/rad-sim/example-designs/add_multi/add_multi_system.hpp b/rad-sim/example-designs/add_multi/add_multi_system.hpp deleted file mode 100644 index 0236501..0000000 --- a/rad-sim/example-designs/add_multi/add_multi_system.hpp +++ /dev/null @@ -1,31 +0,0 @@ -#pragma once - -#include -#include -#include -#include - -class add_multi_system : public sc_module { -private: - sc_signal> client_tdata_sig; - sc_signal client_tlast_sig; - sc_signal client_valid_sig; - sc_signal client_ready_sig; - sc_signal client_tsel_data_sig; - sc_signal client_tsel_valid_sig; - sc_signal> response_sig; - sc_signal response_valid_sig; - //for adder_inst2 - sc_signal> response_sig2; - sc_signal response_valid_sig2; - -public: - sc_signal rst_sig; - sc_clock *sysclk; - add_driver *driver_inst; - add_top *dut_inst; - - add_multi_system(const sc_module_name &name, - sc_clock *driver_clk_sig); - ~add_multi_system(); -}; diff --git a/rad-sim/example-designs/add_multi/add_top.cpp b/rad-sim/example-designs/add_multi/add_top.cpp deleted file mode 100644 index 4318939..0000000 --- a/rad-sim/example-designs/add_multi/add_top.cpp +++ /dev/null @@ -1,45 +0,0 @@ -#include - -add_top::add_top(const sc_module_name &name) - : sc_module(name) { - - std::string module_name_str; - char module_name[25]; - - module_name_str = "client_inst"; - std::strcpy(module_name, module_name_str.c_str()); - - client_inst = new client(module_name, 16); - client_inst->rst(rst); - client_inst->client_tdata(client_tdata); - client_inst->client_tlast(client_tlast); - client_inst->client_valid(client_valid); - client_inst->client_ready(client_ready); - client_inst->client_tsel_data(client_tsel_data); - client_inst->client_tsel_valid(client_tsel_valid); - - module_name_str = "adder_inst"; - std::strcpy(module_name, module_name_str.c_str()); - adder_inst = new adder(module_name); - adder_inst->rst(rst); - adder_inst->response(response); - adder_inst->response_valid(response_valid); - - module_name_str = "adder_inst2"; - std::strcpy(module_name, module_name_str.c_str()); - adder_inst2 = new adder(module_name); - adder_inst2->rst(rst); - adder_inst2->response(response2); - adder_inst2->response_valid(response_valid2); - - radsim_design.BuildDesignContext("add.place", - "add.clks"); - radsim_design.CreateSystemNoCs(rst); - radsim_design.ConnectModulesToNoC(); -} - -add_top::~add_top() { - delete adder_inst; - delete adder_inst2; - delete client_inst; -} diff --git a/rad-sim/example-designs/add_multi/add_top.hpp b/rad-sim/example-designs/add_multi/add_top.hpp deleted file mode 100644 index cbd5a23..0000000 --- a/rad-sim/example-designs/add_multi/add_top.hpp +++ /dev/null @@ -1,32 +0,0 @@ -#pragma once - -#include -#include -#include -#include -#include - -class add_top : public sc_module { -private: - adder *adder_inst; - adder *adder_inst2; - client *client_inst; - -public: - sc_in rst; - // Client's interface - sc_in> client_tdata; - sc_in client_tlast; - sc_in client_valid; - sc_out client_ready; - sc_in client_tsel_data; - sc_in client_tsel_valid; - sc_out> response; - sc_out response_valid; - - sc_out> response2; //for adder_inst2 - sc_out response_valid2; //for adder_inst2 - - add_top(const sc_module_name &name); - ~add_top(); -}; diff --git a/rad-sim/example-designs/add_multi/config.yml b/rad-sim/example-designs/add_multi/config.yml deleted file mode 100644 index 5025f05..0000000 --- a/rad-sim/example-designs/add_multi/config.yml +++ /dev/null @@ -1,37 +0,0 @@ -noc: - type: ['2d'] - num_nocs: 1 - clk_period: [1.0] - payload_width: [166] - topology: ['mesh'] - dim_x: [4] - dim_y: [4] - routing_func: ['dim_order'] - vcs: [5] - vc_buffer_size: [8] - output_buffer_size: [8] - num_packet_types: [5] - router_uarch: ['iq'] - vc_allocator: ['islip'] - sw_allocator: ['islip'] - credit_delay: [1] - routing_delay: [1] - vc_alloc_delay: [1] - sw_alloc_delay: [1] - -noc_adapters: - clk_period: [1.25] - fifo_size: [16] - obuff_size: [2] - in_arbiter: ['fixed_rr'] - out_arbiter: ['priority_rr'] - vc_mapping: ['direct'] - -design: - name: 'add_multi' # Must match the design directory name under rad-sim/example-designs/ - noc_placement: ['add.place'] - clk_periods: [5.0] - -telemetry: - log_verbosity: 2 - traces: [] \ No newline at end of file diff --git a/rad-sim/example-designs/add_multi/modules/adder.cpp b/rad-sim/example-designs/add_multi/modules/adder.cpp deleted file mode 100644 index 0a8ecf6..0000000 --- a/rad-sim/example-designs/add_multi/modules/adder.cpp +++ /dev/null @@ -1,67 +0,0 @@ -#include - -adder::adder(const sc_module_name &name) - : RADSimModule(name) { - - // Combinational logic and its sensitivity list - SC_METHOD(Assign); - sensitive << rst; - // Sequential logic and its clock/reset setup - SC_CTHREAD(Tick, clk.pos()); - reset_signal_is(rst, true); // Reset is active high - - // This function must be defined & called for any RAD-Sim module to register - // its info for automatically connecting to the NoC - this->RegisterModuleInfo(); -} - -adder::~adder() {} - -void adder::Assign() { - if (rst) { - adder_rolling_sum = 0; - axis_adder_interface.tready.write(false); - } else { - // Always ready to accept the transaction - axis_adder_interface.tready.write(true); - } -} - -void adder::Tick() { - response_valid.write(0); - response.write(0); - wait(); - - // Always @ positive edge of the clock - while (true) { - // Receiving transaction from AXI-S interface - if (axis_adder_interface.tvalid.read() && - axis_adder_interface.tready.read()) { - uint64_t current_sum = adder_rolling_sum.to_uint64(); - adder_rolling_sum = current_sum + axis_adder_interface.tdata.read().to_uint64(); - t_finished.write(axis_adder_interface.tlast.read()); - std::cout << module_name << ": Got Transaction (user = " - << axis_adder_interface.tuser.read().to_uint64() << ") (addend = " - << axis_adder_interface.tdata.read().to_uint64() << ")!" - << std::endl; - } - - // Print Sum and Exit - if (t_finished.read()) { - response_valid.write(1); - response.write(adder_rolling_sum); - } - wait(); - } -} - -void adder::RegisterModuleInfo() { - std::string port_name; - _num_noc_axis_slave_ports = 0; - _num_noc_axis_master_ports = 0; - _num_noc_aximm_slave_ports = 0; - _num_noc_aximm_master_ports = 0; - - port_name = module_name + ".axis_adder_interface"; - RegisterAxisSlavePort(port_name, &axis_adder_interface, DATAW, 0); -} \ No newline at end of file diff --git a/rad-sim/example-designs/add_multi/modules/adder.hpp b/rad-sim/example-designs/add_multi/modules/adder.hpp deleted file mode 100644 index 364ad05..0000000 --- a/rad-sim/example-designs/add_multi/modules/adder.hpp +++ /dev/null @@ -1,32 +0,0 @@ -#pragma once - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -class adder : public RADSimModule { -private: - sc_bv adder_rolling_sum; // Sum to store result - sc_signal t_finished; // Signal flagging that the transaction has terminated - -public: - sc_in rst; - sc_out response_valid; - sc_out> response; - // Interface to the NoC - axis_slave_port axis_adder_interface; - - adder(const sc_module_name &name); - ~adder(); - - void Assign(); // Combinational logic process - void Tick(); // Sequential logic process - SC_HAS_PROCESS(adder); - void RegisterModuleInfo(); -}; \ No newline at end of file diff --git a/rad-sim/example-designs/add_multi/modules/client.cpp b/rad-sim/example-designs/add_multi/modules/client.cpp deleted file mode 100644 index ec62987..0000000 --- a/rad-sim/example-designs/add_multi/modules/client.cpp +++ /dev/null @@ -1,111 +0,0 @@ -#include - -client::client(const sc_module_name &name, unsigned int fifo_depth) - : RADSimModule(name) { - - client_fifo_depth = fifo_depth; - client_tsel_fifo_depth = fifo_depth; //ADDED - - // Combinational logic and its sensitivity list - SC_METHOD(Assign); - sensitive << rst << client_fifo_full; - // Sequential logic and its clock/reset setup - SC_CTHREAD(Tick, clk.pos()); - reset_signal_is(rst, true); // Reset is active high - - // This function must be defined & called for any RAD-Sim module to register - // its info for automatically connecting to the NoC - this->RegisterModuleInfo(); -} - -client::~client() {} - -void client::Assign() { - if (rst) { - client_ready.write(true); // ready to accept requests from driver testbench - } else { - // Ready to accept new addend from driver testbench as long as the addend - // FIFO is not full - client_ready.write(!client_fifo_full.read()); - } -} - -void client::Tick() { - // Reset logic - axis_client_interface.tvalid.write(false); - while (!client_tdata_fifo.empty()) { - client_tdata_fifo.pop(); - } - client_fifo_full.write(false); - //ADDED: - while (!client_tsel_fifo.empty()) { - client_tsel_fifo.pop(); - } - client_tsel_fifo_full.write(false); - - wait(); - - std::string src_port_name = module_name + ".axis_client_interface"; - - // Always @ positive edge of the clock - while (true) { - // Interface with testbench driver - if (client_ready.read() && client_valid.read()) { - client_tdata_fifo.push(client_tdata); - testbench_tlast = client_tlast.read(); - std::cout << module_name << ": Pushed request to FIFO" << std::endl; - client_tsel_fifo.push(client_tsel_data); //ADDED - } - client_fifo_full.write(client_tdata_fifo.size() >= client_fifo_depth); - client_tsel_fifo_full.write(client_tsel_fifo.size() >= client_tsel_fifo_depth); //ADDED - - // Sending transactions to AXI-S NoC - if (!client_tdata_fifo.empty()) { - sc_bv tdata = client_tdata_fifo.front(); - bool tsel_data = client_tsel_fifo.front(); //ADDED - std::string dst_port_name = "adder_inst.axis_adder_interface"; - //ADDED: - std::string dst_port_name2 = "adder_inst2.axis_adder_interface"; - uint64_t dst_addr; - if (tsel_data == 0) { - dst_addr = radsim_design.GetPortDestinationID(dst_port_name); - } - else if (tsel_data == 1) { - dst_addr = radsim_design.GetPortDestinationID(dst_port_name2); - } - - uint64_t src_addr = radsim_design.GetPortDestinationID(src_port_name); - - axis_client_interface.tdest.write(dst_addr); - axis_client_interface.tid.write(0); - axis_client_interface.tstrb.write(0); - axis_client_interface.tkeep.write(0); - axis_client_interface.tuser.write(src_addr); - axis_client_interface.tlast.write(testbench_tlast && (client_tdata_fifo.size() == 1)); - axis_client_interface.tdata.write(tdata); - - axis_client_interface.tvalid.write(true); - } else { - axis_client_interface.tvalid.write(false); - } - - if (axis_client_interface.tvalid.read() && - axis_client_interface.tready.read()) { - client_tdata_fifo.pop(); - client_tsel_fifo.pop(); //ADDED - std::cout << module_name << ": Sent Transaction!" << std::endl; - } - wait(); - } -} - -void client::RegisterModuleInfo() { - std::string port_name; - _num_noc_axis_slave_ports = 0; - _num_noc_axis_master_ports = 0; - _num_noc_aximm_slave_ports = 0; - _num_noc_aximm_master_ports = 0; - - port_name = module_name + ".axis_client_interface"; - RegisterAxisMasterPort(port_name, &axis_client_interface, DATAW, 0); -} diff --git a/rad-sim/example-designs/add_multi/modules/client.hpp b/rad-sim/example-designs/add_multi/modules/client.hpp deleted file mode 100644 index 3c9430a..0000000 --- a/rad-sim/example-designs/add_multi/modules/client.hpp +++ /dev/null @@ -1,47 +0,0 @@ -#pragma once - -#include -#include -#include -#include -#include -#include -#include -#include - -#define DATAW 128 - -class client : public RADSimModule { -private: - std::queue> client_tdata_fifo; // FIFO to store numbers - unsigned int client_fifo_depth; // MAXIMUM number of addends to store in FIFO - sc_signal client_fifo_full; // Signal flagging addend FIFO is full - bool testbench_tlast; - - //ADDED: - std::queue client_tsel_fifo; // FIFO to store which adder inst - unsigned int client_tsel_fifo_depth; // MAXIMUM number of addends to store in FIFO - sc_signal client_tsel_fifo_full; // Signal flagging addend FIFO is full - -public: - sc_in rst; - // Interface to driver logic - sc_in> client_tdata; - sc_in client_tlast; - sc_in client_valid; - sc_out client_ready; - // Interface to the NoC - axis_master_port axis_client_interface; - - //ADDED: - sc_in client_tsel_data; - sc_in client_tsel_valid; - - client(const sc_module_name &name, unsigned int fifo_depth); - ~client(); - - void Assign(); // Combinational logic process - void Tick(); // Sequential logic process - SC_HAS_PROCESS(client); - void RegisterModuleInfo(); -}; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/CMakeLists.txt b/rad-sim/example-designs/dlrm/CMakeLists.txt index 6ed244f..0416e1e 100644 --- a/rad-sim/example-designs/dlrm/CMakeLists.txt +++ b/rad-sim/example-designs/dlrm/CMakeLists.txt @@ -26,7 +26,6 @@ set(srcfiles modules/fifo.cpp modules/instructions.cpp modules/collector.cpp - modules/portal.cpp dlrm_top.cpp dlrm_driver.cpp dlrm_system.cpp @@ -43,7 +42,6 @@ set(hdrfiles modules/fifo.hpp modules/instructions.hpp modules/collector.hpp - modules/portal.hpp modules/dlrm_defines.hpp dlrm_top.hpp dlrm_driver.hpp diff --git a/rad-sim/example-designs/dlrm/dlrm_top.hpp b/rad-sim/example-designs/dlrm/dlrm_top.hpp index 7c8d8fc..e2642e2 100644 --- a/rad-sim/example-designs/dlrm/dlrm_top.hpp +++ b/rad-sim/example-designs/dlrm/dlrm_top.hpp @@ -9,13 +9,11 @@ #include #include #include -#include #include #include class dlrm_top : public RADSimDesignTop { private: - //portal *portal_inst; embedding_lookup *embedding_lookup_inst; custom_feature_interaction *feature_interaction_inst; std::vector> mvms; diff --git a/rad-sim/example-designs/dlrm/modules/portal.cpp b/rad-sim/example-designs/dlrm/modules/portal.cpp deleted file mode 100644 index 001b62b..0000000 --- a/rad-sim/example-designs/dlrm/modules/portal.cpp +++ /dev/null @@ -1,247 +0,0 @@ -#include - -portal::portal(const sc_module_name &name, RADSimDesignContext* radsim_design) - : RADSimModule(name, radsim_design) { - - this->radsim_design = radsim_design; - - //combinational logic - SC_METHOD(Assign); - sensitive << rst; // << axis_portal_master_interface.tready; //TODO: add back if inter-rad eventually supports backpressure in this direction - //sequential logic - SC_CTHREAD(Tick, clk.pos()); - // This function must be defined & called for any RAD-Sim module to register - // its info for automatically connecting to the NoC - reset_signal_is(rst, true); // Reset is active high - this->RegisterModuleInfo(); //can comment out if not connecting to NoC -} - - -portal::~portal() {} - -void portal::Assign() { //combinational logic - if (rst) { - portal_axis_slave.tready.write(false); - axis_portal_slave_interface.tready.write(false); - } - else { - //Always ready to accept from NoC because we have FIFO buffers in both directions - portal_axis_slave.tready.write(true); //axis_portal_master_interface.tready.read()) //TODO: replace if support backpressure onto inter-rad - axis_portal_slave_interface.tready.write(true); - } -} - -void bv_to_data_vector( - sc_bv &bitvector, data_vector &datavector, - unsigned int num_elements) { - - unsigned int start_idx, end_idx; - unsigned int _bitwidth = 16; //AKB: extra added - for (unsigned int e = 0; e < num_elements; e++) { - start_idx = e * _bitwidth; - end_idx = (e + 1) * _bitwidth; - datavector[e] = bitvector.range(end_idx - 1, start_idx).to_int(); - } -} - -int counter = 0; -sc_bv data_to_buffer = 0; -sc_bv dest_device = 1; //for testing, fixed at 1 to send to RAD1 which has mult design; //#define AXIS_USERW 66 -//bool got_data = false; -void portal::Tick() { //sequential logic - //portal_recvd.write(0); - portal_axis_master.tvalid.write(false); - //bool test_ready_toggle = false; - wait(); - //Always @ positive edge of clock - while (true) { - - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); - - //Accepting incoming NoC transaction - if (axis_portal_slave_interface.tvalid.read() && - axis_portal_slave_interface.tready.read()) { - //std::cout << "Also got here" << std:: endl; - // std::cout << "DLRM design raising valid data to send over portal module on cycle " << curr_cycle << " , will see valid high next clk cycle " << module_name << ": Got Transaction (user = " - // << axis_portal_slave_interface.tuser.read().to_uint64() << ") (value = " - // << axis_portal_slave_interface.tdata.read().to_uint64() << ")! Destination field is " - // << axis_portal_slave_interface.tdest.read().to_uint64() - // << std::endl; - data_to_buffer = axis_portal_slave_interface.tdata.read(); - //got_data = true; - portal_axis_fields curr_transaction = { - axis_portal_slave_interface.tvalid.read(), - axis_portal_slave_interface.tready.read(), - axis_portal_slave_interface.tdata.read(), - axis_portal_slave_interface.tstrb.read(), - axis_portal_slave_interface.tkeep.read(), - axis_portal_slave_interface.tlast.read(), - axis_portal_slave_interface.tid.read(), - axis_portal_slave_interface.tdest.read(), - axis_portal_slave_interface.tuser.read() //tuser field - }; - - portal_axis_fifo_noc_incoming.push(curr_transaction); - } - - //Sending outgoing inter-rad data - //warning: must do this before next if-else block so that we pop before reading front. otherwise we get outtdated value on second turn. - //we see valid as high the clock cycle AFTER we set it as high in the if-else below - if (portal_axis_master.tvalid.read() && portal_axis_master.tready.read()) { // && test_ready_toggle) { - //pop out of fifo - if (!portal_axis_fifo_noc_incoming.empty()) { - //test_ready_toggle = false; - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); - sc_bv tx_tdata_bv = portal_axis_fifo_noc_incoming.front().tdata; - data_vector tx_tdata(32); - bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); - //std::cout << "portal @ cycle " << curr_cycle << ": sending over inter-RAD" << tx_tdata << " from RAD " << radsim_design->rad_id << std::endl; - - portal_axis_fifo_noc_incoming.pop(); - //std::cout << "portal.cpp in dlrm design sent " << portal_axis_master.tdata.read().to_uint64() << " to dest_device " << dest_device.to_uint64() << " on cycle " << curr_cycle << std::endl; - //portal_recvd.write(1); - if (portal_axis_master.tlast.read()) { - std::cout << "dlrm design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; - } - } - else { //should never reach here because valid should be false if fifo is empty - std::cout << "reached here but why? portal_axis_fifo_noc_incoming.size(): " << portal_axis_fifo_noc_incoming.size() << std::endl; - } - } - //Prep for sending outgoing inter-rad data - if ((portal_axis_fifo_noc_incoming.size() > 0) ) { //&& test_ready_toggle) { - portal_axis_fields curr_transaction = portal_axis_fifo_noc_incoming.front(); - portal_axis_master.tdata.write(curr_transaction.tdata); - portal_axis_master.tdest.write(curr_transaction.tdest); - portal_axis_master.tuser.write(curr_transaction.tuser); - portal_axis_master.tvalid.write(true); - portal_axis_master.tlast.write(curr_transaction.tlast); - } - else { - //counter++; - portal_axis_master.tdata.write(0); - //portal_axis_master.tuser.write(dest_device); - portal_axis_master.tvalid.write(false); - } - - //Accepting incoming inter-rad data and then sending to correct module on RAD over NoC - // if (portal_axis_slave.tvalid.read() && //tvalid is written by inter-rad module - // portal_axis_slave.tready.read()) { //tready is written by this portal module - // //get current cycle - // int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - // //read - // sc_bv rx_tdata_bv = portal_axis_slave.tdata.read(); - // data_vector rx_tdata(32); - // bv_to_data_vector(rx_tdata_bv, rx_tdata, 32); - // std::cout << module_name << ": Portal Module Got Transaction on cycle " << curr_cycle << " (RAD ID) = " - // << radsim_design->rad_id //<< portal_axis_slave.tuser.read().to_uint64() - // << ") (val = " //<< portal_axis_slave.tdata.read().to_uint64() << ")!" - // << rx_tdata << ") with tdest field of " - // << portal_axis_slave.tdest.read() << "!" - // << std::endl; - // //write the addend into the mult module and that will flag when received all values and can end simulation - // std::string src_port_name = module_name + ".axis_portal_master_interface"; - // uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref - // //sc_bv concat_dest = portal_axis_slave.tdest.read(); - // //DEST_RAD(concat_dest) = radsim_design->rad_id; - // //DEST_LOCAL_NODE(concat_dest) = //dst_addr; - // //std::cout << "portal_axis_slave.tdest.read() is: " << portal_axis_slave.tdest.read() << std::endl; - // axis_portal_master_interface.tdest.write(portal_axis_slave.tdest.read()); //concat_dest); //dst_addr); - // axis_portal_master_interface.tid.write(0); - // axis_portal_master_interface.tstrb.write(0); - // axis_portal_master_interface.tkeep.write(0); - // axis_portal_master_interface.tuser.write(portal_axis_slave.tuser.read()); - // //std::cout << "portal_axis_slave.tuser.read()" << portal_axis_slave.tuser.read().range(15, 13).to_uint() << std::endl; - // axis_portal_master_interface.tlast.write(portal_axis_slave.tlast.read()); - // axis_portal_master_interface.tdata.write(portal_axis_slave.tdata.read()); - // axis_portal_master_interface.tvalid.write(true); - // //checking if last transaction and if so, printing current simulation cycle count - // if (portal_axis_slave.tlast.read()) { - // std::cout << "portal.cpp received last data via inter_rad at cycle " << curr_cycle << std::endl; - // } - // } - // else { - // axis_portal_master_interface.tvalid.write(false); - // std::cout << "portal_axis_slave.tvalid.read(): " << portal_axis_slave.tvalid.read() - // << " portal_axis_slave.tready.read() " << portal_axis_slave.tready.read() - // << " axis_portal_master_interface.tready.read() " << axis_portal_master_interface.tready.read() << std::endl; - // } - if (portal_axis_slave.tvalid.read() && - portal_axis_slave.tready.read()) { - portal_axis_fields curr_transaction = { - portal_axis_slave.tvalid.read(), - portal_axis_slave.tready.read(), - portal_axis_slave.tdata.read(), - portal_axis_slave.tstrb.read(), - portal_axis_slave.tkeep.read(), - portal_axis_slave.tlast.read(), - portal_axis_slave.tid.read(), - portal_axis_slave.tdest.read(), - portal_axis_slave.tuser.read() //tuser field - }; - - portal_axis_fifo_noc_outgoing.push(curr_transaction); - } - - //Sending outgoing NoC data - //warning: must do this before next if-else block so that we pop before reading front. otherwise we get outtdated value on second turn. - //we see valid as high the clock cycle AFTER we set it as high in the if-else below - if (axis_portal_master_interface.tvalid.read() && axis_portal_master_interface.tready.read()) { // && test_ready_toggle) { - //pop out of fifo - if (!portal_axis_fifo_noc_outgoing.empty()) { - //test_ready_toggle = false; - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); - sc_bv tx_tdata_bv = portal_axis_fifo_noc_outgoing.front().tdata; - data_vector tx_tdata(32); - bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); - //std::cout << "portal @ cycle " << curr_cycle << ": sending over NoC " << tx_tdata << " from RAD " << radsim_design->rad_id << std::endl; - - portal_axis_fifo_noc_outgoing.pop(); - //std::cout << "portal.cpp in dlrm design sent " << portal_axis_master.tdata.read().to_uint64() << " to dest_device " << dest_device.to_uint64() << " on cycle " << curr_cycle << std::endl; - //portal_recvd.write(1); - if (axis_portal_master_interface.tlast.read()) { - std::cout << "dlrm design portal.cpp sent last data via NoC at cycle " << curr_cycle << std::endl; - } - } - else { //should never reach here because valid should be false if fifo is empty - std::cout << "reached here but why? portal_axis_fifo_noc_outgoing.size(): " << portal_axis_fifo_noc_outgoing.size() << std::endl; - } - } - //Prep for sending outgoing NoC data - if ((portal_axis_fifo_noc_outgoing.size() > 0) ) { //&& test_ready_toggle) { - portal_axis_fields curr_transaction = portal_axis_fifo_noc_outgoing.front(); - axis_portal_master_interface.tdata.write(curr_transaction.tdata); - axis_portal_master_interface.tdest.write(curr_transaction.tdest); - axis_portal_master_interface.tuser.write(curr_transaction.tuser); - axis_portal_master_interface.tvalid.write(true); - axis_portal_master_interface.tlast.write(curr_transaction.tlast); - } - else { - //counter++; - axis_portal_master_interface.tdata.write(0); - //portal_axis_master.tuser.write(dest_device); - axis_portal_master_interface.tvalid.write(false); - } - - - wait(); - } -} - -void portal::RegisterModuleInfo() { - std::string port_name; - _num_noc_axis_slave_ports = 0; - _num_noc_axis_master_ports = 0; - _num_noc_aximm_slave_ports = 0; - _num_noc_aximm_master_ports = 0; - - port_name = module_name + ".axis_portal_slave_interface"; - RegisterAxisSlavePort(port_name, &axis_portal_slave_interface, DATAW, 0); - //radsim_design->portal_id = radsim_design->GetPortDestinationID(port_name); //store slave port info - //radsim_design->AssignPortalSlaveID(radsim_design->GetPortDestinationID(port_name)); - radsim_design->AssignPortalSlaveName(port_name); //bc other modules will send to this slave interface - - port_name = module_name + ".axis_portal_master_interface"; - RegisterAxisMasterPort(port_name, &axis_portal_master_interface, DATAW, 0); - -} \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/modules/portal.hpp b/rad-sim/example-designs/dlrm/modules/portal.hpp deleted file mode 100644 index 386230a..0000000 --- a/rad-sim/example-designs/dlrm/modules/portal.hpp +++ /dev/null @@ -1,56 +0,0 @@ -#pragma once - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include //AKB: added for data_vector template class - -struct portal_axis_fields { - bool tvalid; - bool tready; - sc_bv tdata; - sc_bv tstrb; - sc_bv tkeep; - bool tlast; - sc_bv tid; - sc_bv tdest; - sc_bv tuser; - }; - -class portal : public RADSimModule { - private: - std::queue portal_axis_fifo_noc_incoming; - std::queue portal_axis_fifo_noc_outgoing; - - public: - RADSimDesignContext* radsim_design; - sc_in rst; - //sc_in> portal_in; - //sc_out> portal_out; - //axis ports for external access to inter_rad - axis_master_port portal_axis_master; - axis_slave_port portal_axis_slave; - //sc_out portal_recvd; //for testing: flag so add_driver keeps simulation going until data is sent to mult module - //Interfaces to the NoC - axis_slave_port axis_portal_slave_interface; - axis_master_port axis_portal_master_interface; - - portal(const sc_module_name &name, RADSimDesignContext* radsim_design); - ~portal(); - - void Assign(); // Combinational logic process - void Tick(); // Sequential logic process - SC_HAS_PROCESS(portal); - void RegisterModuleInfo(); //even tho did not add AXI Interface, need because is virtual fn in derived class -}; - -void bv_to_data_vector( - sc_bv &bitvector, data_vector &datavector, - unsigned int num_elements); \ No newline at end of file From e06963fdc15f5d55564870e8fbfd82d51c2ce216 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 16 Oct 2024 04:04:14 -0400 Subject: [PATCH 114/127] Many changes for MR --- rad-sim/config.py | 7 +- rad-sim/example-designs/add/CMakeLists.txt | 4 +- rad-sim/example-designs/dlrm/compiler/dlrm.py | 4 +- rad-sim/sim/CMakeLists.txt | 10 +- rad-sim/sim/design_context.cpp | 8 +- rad-sim/sim/design_context.hpp | 3 +- rad-sim/sim/design_top.hpp | 5 +- rad-sim/sim/dram/DRAMsim3/Makefile | 510 ------------------ rad-sim/sim/noc/.gitignore | 1 + rad-sim/sim/noc/axis_slave_adapter.cpp | 2 + rad-sim/sim/noc/noc0_rad0_config | 25 - rad-sim/sim/noc/noc0_rad1_config | 33 -- rad-sim/sim/portal.cpp | 100 +--- rad-sim/sim/portal.hpp | 19 +- rad-sim/sim/radsim_cluster.cpp | 10 +- rad-sim/sim/radsim_cluster.hpp | 8 +- rad-sim/sim/radsim_inter_rad.cpp | 100 ++-- rad-sim/sim/radsim_inter_rad.hpp | 20 +- 18 files changed, 72 insertions(+), 797 deletions(-) delete mode 100644 rad-sim/sim/dram/DRAMsim3/Makefile create mode 100644 rad-sim/sim/noc/.gitignore delete mode 100644 rad-sim/sim/noc/noc0_rad0_config delete mode 100644 rad-sim/sim/noc/noc0_rad1_config diff --git a/rad-sim/config.py b/rad-sim/config.py index e3190af..9723512 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -64,11 +64,8 @@ def parse_config_file(config_filename, booksim_params, radsim_header_params, rad elif config_section == "cluster": param_value = param #bc no subsection, so correction - param = param_category #bc no subsection, so correction - print(' ' + param, param_value) - param_name = param - #print(param_name) - #TODO: below doesnt rlly make sense for cluster-level params, fix up + param_name = param_category #bc no subsection, so correction + print(' ' + param_name, param_value) if param_name in cluster_knobs: cluster_knobs[param_name] = param_value else: diff --git a/rad-sim/example-designs/add/CMakeLists.txt b/rad-sim/example-designs/add/CMakeLists.txt index 344774a..4110dd8 100644 --- a/rad-sim/example-designs/add/CMakeLists.txt +++ b/rad-sim/example-designs/add/CMakeLists.txt @@ -31,5 +31,5 @@ set(hdrfiles add_compile_options(-Wall -Wextra -pedantic) -add_library(design_add STATIC ${srcfiles} ${hdrfiles}) -target_link_libraries(design_add PUBLIC SystemC::systemc booksim noc) \ No newline at end of file +add_library(add STATIC ${srcfiles} ${hdrfiles}) +target_link_libraries(add PUBLIC SystemC::systemc booksim noc) \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/compiler/dlrm.py b/rad-sim/example-designs/dlrm/compiler/dlrm.py index 814ec77..dfeeb12 100644 --- a/rad-sim/example-designs/dlrm/compiler/dlrm.py +++ b/rad-sim/example-designs/dlrm/compiler/dlrm.py @@ -19,13 +19,13 @@ native_dim = 32 # int(read_bytewidth / element_bytewidth) num_layers = 3 hidden_dims = [1024, 512, 256] -num_mvms = [4, 2, 2] #TODO: make all 1 for simplicity +num_mvms = [4, 2, 2] hard_mvms = False # Model parsing table_info = [] smallest_table_bytewidth = 8 -input_dim = 0 #TODO: change to 32 +input_dim = 0 # Memory allocation hbm_channels_used_words = np.zeros(hbm_channels, dtype=int) diff --git a/rad-sim/sim/CMakeLists.txt b/rad-sim/sim/CMakeLists.txt index 21fe34b..0b78659 100644 --- a/rad-sim/sim/CMakeLists.txt +++ b/rad-sim/sim/CMakeLists.txt @@ -20,11 +20,11 @@ include_directories( dram/DRAMsim3/src ) - FOREACH(DESIGN_NAME ${DESIGN_NAMES}) - include_directories( - ../example-designs/${DESIGN_NAME} - ../example-designs/${DESIGN_NAME}/modules - ) +FOREACH(DESIGN_NAME ${DESIGN_NAMES}) + include_directories( + ../example-designs/${DESIGN_NAME} + ../example-designs/${DESIGN_NAME}/modules + ) ENDFOREACH() find_package(verilator CONFIG) diff --git a/rad-sim/sim/design_context.cpp b/rad-sim/sim/design_context.cpp index 6b066e4..1ae1be7 100644 --- a/rad-sim/sim/design_context.cpp +++ b/rad-sim/sim/design_context.cpp @@ -70,7 +70,7 @@ std::string GetModuleNameFromPortName(std::string &port_name) { return module_name; } -uint64_t DeterminedBaseAddress(int noc_id, int node_id, int rad_id) { +uint64_t DetermineBaseAddress(int noc_id, int node_id, int rad_id) { int num_nocs = radsim_config.GetIntKnobPerRad("noc_num_nocs", rad_id); int max_num_nodes = 0; for (int noc_id = 0; noc_id < num_nocs; noc_id++) { @@ -154,7 +154,7 @@ void RADSimDesignContext::ParseNoCPlacement(const std::string &placement_filenam // Set base address information _aximm_port_base_addresses[port_name] = - DeterminedBaseAddress(port_noc_placement, port_node_placement, rad_id); + DetermineBaseAddress(port_noc_placement, port_node_placement, rad_id); } } else { std::string module_name, port_name, port_noc_placement_str, @@ -258,7 +258,7 @@ void RADSimDesignContext::ParseNoCPlacement(const std::string &placement_filenam } // Set base address information _aximm_port_base_addresses[port_name] = - DeterminedBaseAddress(port_noc_placement, port_node_placement, rad_id); + DetermineBaseAddress(port_noc_placement, port_node_placement, rad_id); } for (unsigned int port_id = 0; @@ -288,7 +288,7 @@ void RADSimDesignContext::ParseNoCPlacement(const std::string &placement_filenam } // Set base address information _aximm_port_base_addresses[port_name] = - DeterminedBaseAddress(port_noc_placement, port_node_placement, rad_id); + DetermineBaseAddress(port_noc_placement, port_node_placement, rad_id); } } _node_module_names[port_noc_placement][port_node_placement].insert( diff --git a/rad-sim/sim/design_context.hpp b/rad-sim/sim/design_context.hpp index 18d92e4..73aa7fd 100644 --- a/rad-sim/sim/design_context.hpp +++ b/rad-sim/sim/design_context.hpp @@ -58,9 +58,8 @@ class RADSimDesignContext { bool rad_done; public: - //unsigned int portal_id; //NoC ID of portal module on RAD unsigned int rad_id; //unique ID of this RAD - std::string portal_slave_name; + std::string portal_slave_name; //when a portal module is created for the RAD, its name is stored here to lookup its node ID on the NoC RADSimDesignContext(unsigned int rad_id_); ~RADSimDesignContext(); void ParseNoCPlacement(const std::string &placement_filename); diff --git a/rad-sim/sim/design_top.hpp b/rad-sim/sim/design_top.hpp index c040040..5bd9754 100644 --- a/rad-sim/sim/design_top.hpp +++ b/rad-sim/sim/design_top.hpp @@ -4,7 +4,10 @@ #include #include - +//Parent class for top-level classes of example designs. +//The class constructor creates a portal module and connects it to the ports on the design. +//Communication between RADs relies on the portal module as a connection between the device's NoC and the inter-RAD network. +//The definition of SINGLE_RAD is used to prevent creation of the portal module for simulations of only one RAD. class RADSimDesignTop : virtual public sc_module { public: #ifndef SINGLE_RAD diff --git a/rad-sim/sim/dram/DRAMsim3/Makefile b/rad-sim/sim/dram/DRAMsim3/Makefile deleted file mode 100644 index 0cec52b..0000000 --- a/rad-sim/sim/dram/DRAMsim3/Makefile +++ /dev/null @@ -1,510 +0,0 @@ -# CMAKE generated file: DO NOT EDIT! -# Generated by "Unix Makefiles" Generator, CMake Version 3.16 - -# Default target executed when no arguments are given to make. -default_target: all - -.PHONY : default_target - -# Allow only one "make -f Makefile2" at a time, but pass parallelism. -.NOTPARALLEL: - - -#============================================================================= -# Special targets provided by cmake. - -# Disable implicit rules so canonical targets will work. -.SUFFIXES: - - -# Remove some rules from gmake that .SUFFIXES does not remove. -SUFFIXES = - -.SUFFIXES: .hpux_make_needs_suffix_list - - -# Suppress display of executed commands. -$(VERBOSE).SILENT: - - -# A target that is always out of date. -cmake_force: - -.PHONY : cmake_force - -#============================================================================= -# Set environment variables for the build. - -# The shell in which to execute make rules. -SHELL = /bin/sh - -# The CMake executable. -CMAKE_COMMAND = /usr/bin/cmake - -# The command to remove a file. -RM = /usr/bin/cmake -E remove -f - -# Escaping for special characters. -EQUALS = = - -# The top-level source directory on which CMake was run. -CMAKE_SOURCE_DIR = /home/bassiabn/rad-sim/rad-flow/rad-sim - -# The top-level build directory on which CMake was run. -CMAKE_BINARY_DIR = /home/bassiabn/rad-sim/rad-flow/rad-sim - -#============================================================================= -# Targets provided globally by CMake. - -# Special rule for the target edit_cache -edit_cache: - @$(CMAKE_COMMAND) -E cmake_echo_color --switch=$(COLOR) --cyan "Running CMake cache editor..." - /usr/bin/ccmake -S$(CMAKE_SOURCE_DIR) -B$(CMAKE_BINARY_DIR) -.PHONY : edit_cache - -# Special rule for the target edit_cache -edit_cache/fast: edit_cache - -.PHONY : edit_cache/fast - -# Special rule for the target rebuild_cache -rebuild_cache: - @$(CMAKE_COMMAND) -E cmake_echo_color --switch=$(COLOR) --cyan "Running CMake to regenerate build system..." - /usr/bin/cmake -S$(CMAKE_SOURCE_DIR) -B$(CMAKE_BINARY_DIR) -.PHONY : rebuild_cache - -# Special rule for the target rebuild_cache -rebuild_cache/fast: rebuild_cache - -.PHONY : rebuild_cache/fast - -# The main all target -all: cmake_check_build_system - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(CMAKE_COMMAND) -E cmake_progress_start /home/bassiabn/rad-sim/rad-flow/rad-sim/CMakeFiles /home/bassiabn/rad-sim/rad-flow/rad-sim/sim/dram/DRAMsim3/CMakeFiles/progress.marks - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f CMakeFiles/Makefile2 sim/dram/DRAMsim3/all - $(CMAKE_COMMAND) -E cmake_progress_start /home/bassiabn/rad-sim/rad-flow/rad-sim/CMakeFiles 0 -.PHONY : all - -# The main clean target -clean: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f CMakeFiles/Makefile2 sim/dram/DRAMsim3/clean -.PHONY : clean - -# The main clean target -clean/fast: clean - -.PHONY : clean/fast - -# Prepare targets for installation. -preinstall: all - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f CMakeFiles/Makefile2 sim/dram/DRAMsim3/preinstall -.PHONY : preinstall - -# Prepare targets for installation. -preinstall/fast: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f CMakeFiles/Makefile2 sim/dram/DRAMsim3/preinstall -.PHONY : preinstall/fast - -# clear depends -depend: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(CMAKE_COMMAND) -S$(CMAKE_SOURCE_DIR) -B$(CMAKE_BINARY_DIR) --check-build-system CMakeFiles/Makefile.cmake 1 -.PHONY : depend - -# Convenience name for target. -sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/rule: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f CMakeFiles/Makefile2 sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/rule -.PHONY : sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/rule - -# Convenience name for target. -dramsim3: sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/rule - -.PHONY : dramsim3 - -# fast build rule for target. -dramsim3/fast: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build -.PHONY : dramsim3/fast - -src/bankstate.o: src/bankstate.cc.o - -.PHONY : src/bankstate.o - -# target to build an object file -src/bankstate.cc.o: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/bankstate.cc.o -.PHONY : src/bankstate.cc.o - -src/bankstate.i: src/bankstate.cc.i - -.PHONY : src/bankstate.i - -# target to preprocess a source file -src/bankstate.cc.i: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/bankstate.cc.i -.PHONY : src/bankstate.cc.i - -src/bankstate.s: src/bankstate.cc.s - -.PHONY : src/bankstate.s - -# target to generate assembly for a file -src/bankstate.cc.s: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/bankstate.cc.s -.PHONY : src/bankstate.cc.s - -src/channel_state.o: src/channel_state.cc.o - -.PHONY : src/channel_state.o - -# target to build an object file -src/channel_state.cc.o: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/channel_state.cc.o -.PHONY : src/channel_state.cc.o - -src/channel_state.i: src/channel_state.cc.i - -.PHONY : src/channel_state.i - -# target to preprocess a source file -src/channel_state.cc.i: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/channel_state.cc.i -.PHONY : src/channel_state.cc.i - -src/channel_state.s: src/channel_state.cc.s - -.PHONY : src/channel_state.s - -# target to generate assembly for a file -src/channel_state.cc.s: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/channel_state.cc.s -.PHONY : src/channel_state.cc.s - -src/command_queue.o: src/command_queue.cc.o - -.PHONY : src/command_queue.o - -# target to build an object file -src/command_queue.cc.o: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/command_queue.cc.o -.PHONY : src/command_queue.cc.o - -src/command_queue.i: src/command_queue.cc.i - -.PHONY : src/command_queue.i - -# target to preprocess a source file -src/command_queue.cc.i: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/command_queue.cc.i -.PHONY : src/command_queue.cc.i - -src/command_queue.s: src/command_queue.cc.s - -.PHONY : src/command_queue.s - -# target to generate assembly for a file -src/command_queue.cc.s: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/command_queue.cc.s -.PHONY : src/command_queue.cc.s - -src/common.o: src/common.cc.o - -.PHONY : src/common.o - -# target to build an object file -src/common.cc.o: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/common.cc.o -.PHONY : src/common.cc.o - -src/common.i: src/common.cc.i - -.PHONY : src/common.i - -# target to preprocess a source file -src/common.cc.i: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/common.cc.i -.PHONY : src/common.cc.i - -src/common.s: src/common.cc.s - -.PHONY : src/common.s - -# target to generate assembly for a file -src/common.cc.s: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/common.cc.s -.PHONY : src/common.cc.s - -src/configuration.o: src/configuration.cc.o - -.PHONY : src/configuration.o - -# target to build an object file -src/configuration.cc.o: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/configuration.cc.o -.PHONY : src/configuration.cc.o - -src/configuration.i: src/configuration.cc.i - -.PHONY : src/configuration.i - -# target to preprocess a source file -src/configuration.cc.i: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/configuration.cc.i -.PHONY : src/configuration.cc.i - -src/configuration.s: src/configuration.cc.s - -.PHONY : src/configuration.s - -# target to generate assembly for a file -src/configuration.cc.s: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/configuration.cc.s -.PHONY : src/configuration.cc.s - -src/controller.o: src/controller.cc.o - -.PHONY : src/controller.o - -# target to build an object file -src/controller.cc.o: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/controller.cc.o -.PHONY : src/controller.cc.o - -src/controller.i: src/controller.cc.i - -.PHONY : src/controller.i - -# target to preprocess a source file -src/controller.cc.i: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/controller.cc.i -.PHONY : src/controller.cc.i - -src/controller.s: src/controller.cc.s - -.PHONY : src/controller.s - -# target to generate assembly for a file -src/controller.cc.s: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/controller.cc.s -.PHONY : src/controller.cc.s - -src/dram_system.o: src/dram_system.cc.o - -.PHONY : src/dram_system.o - -# target to build an object file -src/dram_system.cc.o: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/dram_system.cc.o -.PHONY : src/dram_system.cc.o - -src/dram_system.i: src/dram_system.cc.i - -.PHONY : src/dram_system.i - -# target to preprocess a source file -src/dram_system.cc.i: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/dram_system.cc.i -.PHONY : src/dram_system.cc.i - -src/dram_system.s: src/dram_system.cc.s - -.PHONY : src/dram_system.s - -# target to generate assembly for a file -src/dram_system.cc.s: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/dram_system.cc.s -.PHONY : src/dram_system.cc.s - -src/hmc.o: src/hmc.cc.o - -.PHONY : src/hmc.o - -# target to build an object file -src/hmc.cc.o: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/hmc.cc.o -.PHONY : src/hmc.cc.o - -src/hmc.i: src/hmc.cc.i - -.PHONY : src/hmc.i - -# target to preprocess a source file -src/hmc.cc.i: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/hmc.cc.i -.PHONY : src/hmc.cc.i - -src/hmc.s: src/hmc.cc.s - -.PHONY : src/hmc.s - -# target to generate assembly for a file -src/hmc.cc.s: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/hmc.cc.s -.PHONY : src/hmc.cc.s - -src/memory_system.o: src/memory_system.cc.o - -.PHONY : src/memory_system.o - -# target to build an object file -src/memory_system.cc.o: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/memory_system.cc.o -.PHONY : src/memory_system.cc.o - -src/memory_system.i: src/memory_system.cc.i - -.PHONY : src/memory_system.i - -# target to preprocess a source file -src/memory_system.cc.i: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/memory_system.cc.i -.PHONY : src/memory_system.cc.i - -src/memory_system.s: src/memory_system.cc.s - -.PHONY : src/memory_system.s - -# target to generate assembly for a file -src/memory_system.cc.s: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/memory_system.cc.s -.PHONY : src/memory_system.cc.s - -src/refresh.o: src/refresh.cc.o - -.PHONY : src/refresh.o - -# target to build an object file -src/refresh.cc.o: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/refresh.cc.o -.PHONY : src/refresh.cc.o - -src/refresh.i: src/refresh.cc.i - -.PHONY : src/refresh.i - -# target to preprocess a source file -src/refresh.cc.i: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/refresh.cc.i -.PHONY : src/refresh.cc.i - -src/refresh.s: src/refresh.cc.s - -.PHONY : src/refresh.s - -# target to generate assembly for a file -src/refresh.cc.s: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/refresh.cc.s -.PHONY : src/refresh.cc.s - -src/simple_stats.o: src/simple_stats.cc.o - -.PHONY : src/simple_stats.o - -# target to build an object file -src/simple_stats.cc.o: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/simple_stats.cc.o -.PHONY : src/simple_stats.cc.o - -src/simple_stats.i: src/simple_stats.cc.i - -.PHONY : src/simple_stats.i - -# target to preprocess a source file -src/simple_stats.cc.i: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/simple_stats.cc.i -.PHONY : src/simple_stats.cc.i - -src/simple_stats.s: src/simple_stats.cc.s - -.PHONY : src/simple_stats.s - -# target to generate assembly for a file -src/simple_stats.cc.s: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/simple_stats.cc.s -.PHONY : src/simple_stats.cc.s - -src/timing.o: src/timing.cc.o - -.PHONY : src/timing.o - -# target to build an object file -src/timing.cc.o: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/timing.cc.o -.PHONY : src/timing.cc.o - -src/timing.i: src/timing.cc.i - -.PHONY : src/timing.i - -# target to preprocess a source file -src/timing.cc.i: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/timing.cc.i -.PHONY : src/timing.cc.i - -src/timing.s: src/timing.cc.s - -.PHONY : src/timing.s - -# target to generate assembly for a file -src/timing.cc.s: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(MAKE) -f sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/build.make sim/dram/DRAMsim3/CMakeFiles/dramsim3.dir/src/timing.cc.s -.PHONY : src/timing.cc.s - -# Help Target -help: - @echo "The following are some of the valid targets for this Makefile:" - @echo "... all (the default if no target is provided)" - @echo "... clean" - @echo "... depend" - @echo "... edit_cache" - @echo "... dramsim3" - @echo "... rebuild_cache" - @echo "... src/bankstate.o" - @echo "... src/bankstate.i" - @echo "... src/bankstate.s" - @echo "... src/channel_state.o" - @echo "... src/channel_state.i" - @echo "... src/channel_state.s" - @echo "... src/command_queue.o" - @echo "... src/command_queue.i" - @echo "... src/command_queue.s" - @echo "... src/common.o" - @echo "... src/common.i" - @echo "... src/common.s" - @echo "... src/configuration.o" - @echo "... src/configuration.i" - @echo "... src/configuration.s" - @echo "... src/controller.o" - @echo "... src/controller.i" - @echo "... src/controller.s" - @echo "... src/dram_system.o" - @echo "... src/dram_system.i" - @echo "... src/dram_system.s" - @echo "... src/hmc.o" - @echo "... src/hmc.i" - @echo "... src/hmc.s" - @echo "... src/memory_system.o" - @echo "... src/memory_system.i" - @echo "... src/memory_system.s" - @echo "... src/refresh.o" - @echo "... src/refresh.i" - @echo "... src/refresh.s" - @echo "... src/simple_stats.o" - @echo "... src/simple_stats.i" - @echo "... src/simple_stats.s" - @echo "... src/timing.o" - @echo "... src/timing.i" - @echo "... src/timing.s" -.PHONY : help - - - -#============================================================================= -# Special targets to cleanup operation of make. - -# Special rule to run CMake to check the build system integrity. -# No rule that depends on this can have commands that come from listfiles -# because they might be regenerated. -cmake_check_build_system: - cd /home/bassiabn/rad-sim/rad-flow/rad-sim && $(CMAKE_COMMAND) -S$(CMAKE_SOURCE_DIR) -B$(CMAKE_BINARY_DIR) --check-build-system CMakeFiles/Makefile.cmake 0 -.PHONY : cmake_check_build_system - diff --git a/rad-sim/sim/noc/.gitignore b/rad-sim/sim/noc/.gitignore new file mode 100644 index 0000000..7ef2347 --- /dev/null +++ b/rad-sim/sim/noc/.gitignore @@ -0,0 +1 @@ +noc*_rad*_config diff --git a/rad-sim/sim/noc/axis_slave_adapter.cpp b/rad-sim/sim/noc/axis_slave_adapter.cpp index 037080d..7055e41 100644 --- a/rad-sim/sim/noc/axis_slave_adapter.cpp +++ b/rad-sim/sim/noc/axis_slave_adapter.cpp @@ -230,6 +230,8 @@ void axis_slave_adapter::InputInjection() { booksim_flit->tail = _to_be_injected_flit._tail; booksim_flit->type = _to_be_injected_flit._type; + //If the destination of the incoming transaction is a module on the same RAD as the sender module, the destination field is set appropriately. + //Else if on a different RAD, the destination field is set to the portal module node used to communicate with other RADs. if (DEST_RAD(_to_be_injected_flit._dest) == _rad_id) { //not crossing to other RAD sc_bv booksim_flit_dest = DEST_LOCAL_NODE(_to_be_injected_flit._dest); booksim_flit->dest = GetInputDestinationNode(booksim_flit_dest); diff --git a/rad-sim/sim/noc/noc0_rad0_config b/rad-sim/sim/noc/noc0_rad0_config deleted file mode 100644 index 5ec7772..0000000 --- a/rad-sim/sim/noc/noc0_rad0_config +++ /dev/null @@ -1,25 +0,0 @@ -// Topology -topology = mesh; -k = 4; -n = 2; - -// Routing -routing_function = dim_order; - -// Flow control -num_vcs = 1; -vc_buf_size = 8; -output_buffer_size = 8; -read_request_begin_vc = 0; -read_request_end_vc = 0; - -// Router architecture & delays -router = iq; -vc_allocator = islip; -sw_allocator = islip; -alloc_iters = 1; -wait_for_tail_credit = 0; -credit_delay = 1; -routing_delay = 1; -vc_alloc_delay = 1; -sw_alloc_delay = 1; diff --git a/rad-sim/sim/noc/noc0_rad1_config b/rad-sim/sim/noc/noc0_rad1_config deleted file mode 100644 index 94f70f1..0000000 --- a/rad-sim/sim/noc/noc0_rad1_config +++ /dev/null @@ -1,33 +0,0 @@ -// Topology -topology = mesh; -k = 10; -n = 2; - -// Routing -routing_function = dim_order; - -// Flow control -num_vcs = 5; -vc_buf_size = 16; -output_buffer_size = 8; -read_request_begin_vc = 0; -read_request_end_vc = 0; -write_request_begin_vc = 1; -write_request_end_vc = 1; -write_data_begin_vc = 2; -write_data_end_vc = 2; -read_reply_begin_vc = 3; -read_reply_end_vc = 3; -write_reply_begin_vc = 4; -write_reply_end_vc = 4; - -// Router architecture & delays -router = iq; -vc_allocator = islip; -sw_allocator = islip; -alloc_iters = 1; -wait_for_tail_credit = 0; -credit_delay = 1; -routing_delay = 1; -vc_alloc_delay = 1; -sw_alloc_delay = 1; diff --git a/rad-sim/sim/portal.cpp b/rad-sim/sim/portal.cpp index 0748b0b..e4f963e 100644 --- a/rad-sim/sim/portal.cpp +++ b/rad-sim/sim/portal.cpp @@ -26,34 +26,15 @@ void portal::Assign() { //combinational logic } else { //Always ready to accept from NoC because we have FIFO buffers in both directions - portal_axis_slave.tready.write(true); //axis_portal_master_interface.tready.read()) //TODO: replace if support backpressure onto inter-rad + //Not exerting back-pressure + portal_axis_slave.tready.write(true); axis_portal_slave_interface.tready.write(true); } } -//used for internal testing -//must uncomment radsim_utils define to use -// void bv_to_data_vector( -// sc_bv &bitvector, data_vector &datavector, -// unsigned int num_elements) { - -// unsigned int start_idx, end_idx; -// unsigned int _bitwidth = 16; //AKB: extra added -// for (unsigned int e = 0; e < num_elements; e++) { -// start_idx = e * _bitwidth; -// end_idx = (e + 1) * _bitwidth; -// datavector[e] = bitvector.range(end_idx - 1, start_idx).to_int(); -// } -// } - -int counter = 0; sc_bv data_to_buffer = 0; -sc_bv dest_device = 1; //for testing, fixed at 1 to send to RAD1 which has mult design; //#define AXIS_USERW 66 -//bool got_data = false; void portal::Tick() { //sequential logic - //portal_recvd.write(0); portal_axis_master.tvalid.write(false); - //bool test_ready_toggle = false; wait(); //Always @ positive edge of clock while (true) { @@ -63,14 +44,7 @@ void portal::Tick() { //sequential logic //Accepting incoming NoC transaction if (axis_portal_slave_interface.tvalid.read() && axis_portal_slave_interface.tready.read()) { - //std::cout << "Also got here" << std:: endl; - // std::cout << "DLRM design raising valid data to send over portal module on cycle " << curr_cycle << " , will see valid high next clk cycle " << module_name << ": Got Transaction (user = " - // << axis_portal_slave_interface.tuser.read().to_uint64() << ") (value = " - // << axis_portal_slave_interface.tdata.read().to_uint64() << ")! Destination field is " - // << axis_portal_slave_interface.tdest.read().to_uint64() - // << std::endl; data_to_buffer = axis_portal_slave_interface.tdata.read(); - //got_data = true; portal_axis_fields curr_transaction = { axis_portal_slave_interface.tvalid.read(), axis_portal_slave_interface.tready.read(), @@ -80,7 +54,7 @@ void portal::Tick() { //sequential logic axis_portal_slave_interface.tlast.read(), axis_portal_slave_interface.tid.read(), axis_portal_slave_interface.tdest.read(), - axis_portal_slave_interface.tuser.read() //tuser field + axis_portal_slave_interface.tuser.read() }; portal_axis_fifo_noc_incoming.push(curr_transaction); @@ -93,18 +67,7 @@ void portal::Tick() { //sequential logic //pop out of fifo if (!portal_axis_fifo_noc_incoming.empty()) { int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); - /* START FOR DEBUG */ - //sc_bv tx_tdata_bv = portal_axis_fifo_noc_incoming.front().tdata; - //data_vector tx_tdata(32); - //bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); - //std::cout << "portal @ cycle " << curr_cycle << ": sending over inter-RAD" << tx_tdata << " from RAD " << radsim_design->rad_id << std::endl; - /* END FOR DEBUG */ - portal_axis_fifo_noc_incoming.pop(); - /* START FOR DEBUG */ - //std::cout << "portal.cpp in dlrm design sent " << portal_axis_master.tdata.read().to_uint64() << " to dest_device " << dest_device.to_uint64() << " on cycle " << curr_cycle << std::endl; - /* END FOR DEBUG */ - //portal_recvd.write(1); if (portal_axis_master.tlast.read()) { std::cout << "dlrm design portal.cpp sent last data via inter_rad at cycle " << curr_cycle << std::endl; @@ -124,54 +87,11 @@ void portal::Tick() { //sequential logic portal_axis_master.tlast.write(curr_transaction.tlast); } else { - //counter++; portal_axis_master.tdata.write(0); - //portal_axis_master.tuser.write(dest_device); portal_axis_master.tvalid.write(false); } //Accepting incoming inter-rad data and then sending to correct module on RAD over NoC - // if (portal_axis_slave.tvalid.read() && //tvalid is written by inter-rad module - // portal_axis_slave.tready.read()) { //tready is written by this portal module - // //get current cycle - // int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - // //read - // sc_bv rx_tdata_bv = portal_axis_slave.tdata.read(); - // data_vector rx_tdata(32); - // bv_to_data_vector(rx_tdata_bv, rx_tdata, 32); - // std::cout << module_name << ": Portal Module Got Transaction on cycle " << curr_cycle << " (RAD ID) = " - // << radsim_design->rad_id //<< portal_axis_slave.tuser.read().to_uint64() - // << ") (val = " //<< portal_axis_slave.tdata.read().to_uint64() << ")!" - // << rx_tdata << ") with tdest field of " - // << portal_axis_slave.tdest.read() << "!" - // << std::endl; - // //write the addend into the mult module and that will flag when received all values and can end simulation - // std::string src_port_name = module_name + ".axis_portal_master_interface"; - // uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref - // //sc_bv concat_dest = portal_axis_slave.tdest.read(); - // //DEST_RAD(concat_dest) = radsim_design->rad_id; - // //DEST_LOCAL_NODE(concat_dest) = //dst_addr; - // //std::cout << "portal_axis_slave.tdest.read() is: " << portal_axis_slave.tdest.read() << std::endl; - // axis_portal_master_interface.tdest.write(portal_axis_slave.tdest.read()); //concat_dest); //dst_addr); - // axis_portal_master_interface.tid.write(0); - // axis_portal_master_interface.tstrb.write(0); - // axis_portal_master_interface.tkeep.write(0); - // axis_portal_master_interface.tuser.write(portal_axis_slave.tuser.read()); - // //std::cout << "portal_axis_slave.tuser.read()" << portal_axis_slave.tuser.read().range(15, 13).to_uint() << std::endl; - // axis_portal_master_interface.tlast.write(portal_axis_slave.tlast.read()); - // axis_portal_master_interface.tdata.write(portal_axis_slave.tdata.read()); - // axis_portal_master_interface.tvalid.write(true); - // //checking if last transaction and if so, printing current simulation cycle count - // if (portal_axis_slave.tlast.read()) { - // std::cout << "portal.cpp received last data via inter_rad at cycle " << curr_cycle << std::endl; - // } - // } - // else { - // axis_portal_master_interface.tvalid.write(false); - // std::cout << "portal_axis_slave.tvalid.read(): " << portal_axis_slave.tvalid.read() - // << " portal_axis_slave.tready.read() " << portal_axis_slave.tready.read() - // << " axis_portal_master_interface.tready.read() " << axis_portal_master_interface.tready.read() << std::endl; - // } if (portal_axis_slave.tvalid.read() && portal_axis_slave.tready.read()) { portal_axis_fields curr_transaction = { @@ -196,15 +116,7 @@ void portal::Tick() { //sequential logic //pop out of fifo if (!portal_axis_fifo_noc_outgoing.empty()) { int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); - //used for testing - //sc_bv tx_tdata_bv = portal_axis_fifo_noc_outgoing.front().tdata; - //data_vector tx_tdata(32); - //bv_to_data_vector(tx_tdata_bv, tx_tdata, 32); - //std::cout << "portal @ cycle " << curr_cycle << ": sending over NoC " << tx_tdata << " from RAD " << radsim_design->rad_id << std::endl; - portal_axis_fifo_noc_outgoing.pop(); - //std::cout << "portal.cpp in dlrm design sent " << portal_axis_master.tdata.read().to_uint64() << " to dest_device " << dest_device.to_uint64() << " on cycle " << curr_cycle << std::endl; - //portal_recvd.write(1); if (axis_portal_master_interface.tlast.read()) { std::cout << "dlrm design portal.cpp sent last data via NoC at cycle " << curr_cycle << std::endl; } @@ -223,9 +135,7 @@ void portal::Tick() { //sequential logic axis_portal_master_interface.tlast.write(curr_transaction.tlast); } else { - //counter++; axis_portal_master_interface.tdata.write(0); - //portal_axis_master.tuser.write(dest_device); axis_portal_master_interface.tvalid.write(false); } @@ -243,9 +153,7 @@ void portal::RegisterModuleInfo() { port_name = module_name + ".axis_portal_slave_interface"; RegisterAxisSlavePort(port_name, &axis_portal_slave_interface, AXIS_MAX_DATAW, 0); - //radsim_design->portal_id = radsim_design->GetPortDestinationID(port_name); //store slave port info - //radsim_design->AssignPortalSlaveID(radsim_design->GetPortDestinationID(port_name)); - radsim_design->AssignPortalSlaveName(port_name); //bc other modules will send to this slave interface + radsim_design->AssignPortalSlaveName(port_name); //other modules will send to this slave interface port_name = module_name + ".axis_portal_master_interface"; RegisterAxisMasterPort(port_name, &axis_portal_master_interface, AXIS_MAX_DATAW, 0); diff --git a/rad-sim/sim/portal.hpp b/rad-sim/sim/portal.hpp index 3614092..a45f2ba 100644 --- a/rad-sim/sim/portal.hpp +++ b/rad-sim/sim/portal.hpp @@ -9,8 +9,6 @@ #include #include #include -//#include -//#include //AKB: added for data_vector template class struct portal_axis_fields { bool tvalid; @@ -24,6 +22,8 @@ struct portal_axis_fields { sc_bv tuser; }; + +//The portal class is a module that connects from a device's NoC to the outer inter-RAD network. class portal : public RADSimModule { private: std::queue portal_axis_fifo_noc_incoming; @@ -32,12 +32,9 @@ class portal : public RADSimModule { public: RADSimDesignContext* radsim_design; sc_in rst { "rst" }; - //sc_in> portal_in; - //sc_out> portal_out; //axis ports for external access to inter_rad axis_master_port portal_axis_master; axis_slave_port portal_axis_slave; - //sc_out portal_recvd; //for testing: flag so add_driver keeps simulation going until data is sent to mult module //Interfaces to the NoC axis_slave_port axis_portal_slave_interface; axis_master_port axis_portal_master_interface; @@ -48,13 +45,5 @@ class portal : public RADSimModule { void Assign(); // Combinational logic process void Tick(); // Sequential logic process SC_HAS_PROCESS(portal); - void RegisterModuleInfo(); //even tho did not add AXI Interface, need because is virtual fn in derived class -}; - -/* START FOR DEBUG -Note: need correct data_vector datatype matching the design's sim_utils.hpp -*/ -// void bv_to_data_vector( -// sc_bv &bitvector, data_vector &datavector, -// unsigned int num_elements); -/* END FOR DEBUG */ \ No newline at end of file + void RegisterModuleInfo(); +}; \ No newline at end of file diff --git a/rad-sim/sim/radsim_cluster.cpp b/rad-sim/sim/radsim_cluster.cpp index fc92e59..caeb15a 100644 --- a/rad-sim/sim/radsim_cluster.cpp +++ b/rad-sim/sim/radsim_cluster.cpp @@ -6,8 +6,9 @@ RADSimCluster::RADSimCluster(int num_rads) { RADSimDesignContext* new_rad = new RADSimDesignContext(i); //pass in unique RAD ID all_rads.push_back(new_rad); } + //TODO: use configuration parameters to change topology and connectivity models inter_rad_topo = ALL_TO_ALL; - inter_rad_conn_model = WIRE; + inter_rad_conn_model = NETWORK; } RADSimCluster::~RADSimCluster() { @@ -47,9 +48,4 @@ RADSimCluster::AllRADsNotDone() { void RADSimCluster::StoreSystem(RADSimDesignSystem* system) { all_systems.push_back(system); -} - -/*void -RADSimCluster::StoreSystemOut(sc_out system_out) { - all_systems_out.push_back(system_out); -}*/ \ No newline at end of file +} \ No newline at end of file diff --git a/rad-sim/sim/radsim_cluster.hpp b/rad-sim/sim/radsim_cluster.hpp index 8826934..4981a0c 100644 --- a/rad-sim/sim/radsim_cluster.hpp +++ b/rad-sim/sim/radsim_cluster.hpp @@ -7,6 +7,9 @@ #include #include +//Represents a cluster of one or multiple RAD devices +//Stores pointers to objects representing the RADs and the designs on each RAD +//Contains support for future development of new topologies for inter-RAD connections class RADSimCluster { private: public: @@ -20,9 +23,8 @@ class RADSimCluster { RING = 2 }; enum inter_rad_conn_model_type { - WIRE = 0, - STAT = 1, - SIM = 2 + WIRE = 0, //Direct wire-based connection between RADs. This option has been deprecated. + NETWORK = 1 //Current approach using bandwidth and latency constraints from the user for inter-RAD communication. }; inter_rad_topo_type inter_rad_topo; inter_rad_conn_model_type inter_rad_conn_model; diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index 34328ab..c71d3cf 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -10,10 +10,8 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c this->clk(*inter_rad_clk); num_rads = cluster->num_rads; all_signals.init(num_rads + 1); - //std::cout << "num_rads is " << num_rads << std::endl; fifos_latency_counters.resize(num_rads); - //std::cout << "fifos_latency_counters[0].size() " << fifos_latency_counters[0].size() << std::endl; int inter_rad_fifo_num_slots = radsim_config.GetIntKnobShared("inter_rad_fifo_num_slots"); //1000; for (int v = 0; v < num_rads; v++) { //width of vector = num of rads bc want fifo per rad sc_fifo* new_fifo_ptr = new sc_fifo(inter_rad_fifo_num_slots); @@ -24,7 +22,6 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c new_axis_signal = new axis_signal; //second signal (one for master, one for slave) all_axis_slave_signals.push_back(new_axis_signal); axis_slave_port* new_axis_slave_port = new axis_slave_port; - //new_axis_slave_port->tready.write(false); //initialize ready to false all_axis_slave_ports.push_back(new_axis_slave_port); axis_master_port* new_axis_master_port = new axis_master_port; all_axis_master_ports.push_back(new_axis_master_port); @@ -33,12 +30,6 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c SC_CTHREAD(writeFifo, clk.pos()); SC_CTHREAD(readFifo, clk.pos()); - //testing - /*for (int i = 0; i < num_rads; i++) { - for (int j = 0; j < NUM_SLOTS; j++) { - std::cout << fifos_latency_counters[i][j] << std::endl; - } - }*/ } RADSimInterRad::~RADSimInterRad() { @@ -52,19 +43,9 @@ RADSimInterRad::~RADSimInterRad() { } } -void -RADSimInterRad::ConnectRadPair(int i, int j) { - //this works - /*cluster->all_systems[i]->design_dut_inst->portal_in(all_signals[0]); - //cluster->all_systems[i]->design_dut_inst->portal_out(all_signals[1]); //commenting out to demo sending data through fifo instead - cluster->all_systems[i]->design_dut_inst->portal_out(all_signals[2]); - cluster->all_systems[j]->design_dut_inst->portal_in(all_signals[1]); - cluster->all_systems[j]->design_dut_inst->portal_out(all_signals[0]);*/ -} - +//Connect the axi slave interface of each portal module to its corresponding RADSimInterRad axi master interface, and vice versa void RADSimInterRad::ConnectRadAxi(int i) { - //Connect the axi slave interface of each portal module to its corresponding RADSimInterRad axi master interface, and vice versa #ifndef SINGLE_RAD all_axis_master_signals[i]->Connect(*(all_axis_master_ports[i]), cluster->all_systems[i]->design_dut_inst->design_top_portal_axis_slave); //Connect(axis_master_port &m, axis_slave_port &s) all_axis_slave_signals[i]->Connect(cluster->all_systems[i]->design_dut_inst->design_top_portal_axis_master, *(all_axis_slave_ports[i])); //Connect(axis_master_port &m, axis_slave_port &s) @@ -84,53 +65,49 @@ RADSimInterRad::writeFifo() { TODO: use tdest instead of tuser TODO: automating adding all fields to curr_transaction */ - //wait(); + + //initial setup for (int i = 0; i < num_rads; i++) { all_axis_slave_signals[i]->tready.write(true); } - int bw_counter = 0; + int bw_counter = 0; //counter used for bandwidth constraint on inter-rad network wait(); + + //every clock cycle while (true) { //get current cycle for experiments int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); //iterate thru all RADs for (int i = 0; i < num_rads; i++) { - if (bw_counter < radsim_config.GetIntKnobShared("inter_rad_bw_accept_cycles")) { //>= bw_limit) { + //from bandwidth constraint, we calculated how many cycles at a time we can accept data into the inter-rad network + //when bw_counter exceeds those cycles, we can no longer accept more data + //we assert backpressure accordingly to prevent accepting of data into the inter-rad. + if (bw_counter < radsim_config.GetIntKnobShared("inter_rad_bw_accept_cycles")) { all_axis_slave_ports[i]->tready.write(true); } else { all_axis_slave_ports[i]->tready.write(false); } + //Obtain relevant axi-s fields struct axis_fields curr_transaction; - curr_transaction.tdata = all_axis_slave_ports[i]->tdata.read(); //0 bc adder + curr_transaction.tdata = all_axis_slave_ports[i]->tdata.read(); curr_transaction.tuser = all_axis_slave_ports[i]->tuser.read(); - //std::cout << "curr_transaction.tuser in interrad: " << curr_transaction.tuser << std::endl; curr_transaction.tvalid = all_axis_slave_ports[i]->tvalid.read(); curr_transaction.tlast = all_axis_slave_ports[i]->tlast.read(); - //since crossing RADs, DEST_LOCAL_NODE is now DEST_REMOTE_NODE, and DEST_REMOTE_NODE can be reset to 0 + + //Update the dest field because data will now move from an initial RAD to a different RAD + //Once we reach the destination RAD, what was previously a remote NoC node destination is now local + //DEST_LOCAL_NODE is now DEST_REMOTE_NODE, and DEST_REMOTE_NODE can be reset to 0 sc_bv concat_dest_swap = all_axis_slave_ports[i]->tdest.read(); - //std::cout << "concat_dest_swap: " << concat_dest_swap << std::endl; DEST_LOCAL_NODE(concat_dest_swap) = DEST_REMOTE_NODE(all_axis_slave_ports[i]->tdest.read()); DEST_REMOTE_NODE(concat_dest_swap) = 0; - curr_transaction.tdest = concat_dest_swap; //all_axis_slave_ports[i]->tdest.read(); - //std::cout << "curr_transaction.tdest: " << concat_dest_swap << std::endl; - //all_axis_slave_ports[i]->tready.write(true); - /*if (all_axis_slave_ports[i]->tready.read()) { - //std::cout << "valid" << std::endl; - }*/ + curr_transaction.tdest = concat_dest_swap; + if (curr_transaction.tvalid && all_axis_slave_ports[i]->tready.read()) { unsigned int dest_rad = DEST_RAD(curr_transaction.tdest).to_uint64(); - //std::cout << "radsim_inter_rad.cpp dest_rad is: "<< dest_rad << std::endl; if (this->fifos[dest_rad]->nb_write(curr_transaction) != false) { //there was an available slot to write to - /* START FOR DEBUG */ - // sc_bv rx_tdata_bv = curr_transaction.tdata; - // data_vector rx_tdata(32); //NOTE: type needs to match what is supported in example-designs/{design}/modules/sim_utils.hpp - // bv_to_data_vector(rx_tdata_bv, rx_tdata, 32); - // std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << rx_tdata << std::endl; - // std::cout << "inter_rad fifo data WRITTEN on cycle " << curr_cycle << " is " << curr_transaction.tdata.to_uint64() << std::endl; - /* END FOR DEBUG */ fifos_latency_counters[dest_rad].push_back(0); //for latency counters } else { @@ -138,17 +115,11 @@ RADSimInterRad::writeFifo() { write_fifo_packet_drop_count++; } } - - // if (all_axis_slave_ports[i]->tready.read()) { - // std::cout << "June-27: inter_rad fifo is ready with counter " << bw_counter << std::endl; - // } - // else { //will see the ready signal one cycle after the counter var val changes bc is systemc signal - // std::cout << "June-27: inter_rad fifo NOT ready with counter " << bw_counter << std::endl; - // } - } - if (bw_counter >= (radsim_config.GetIntKnobShared("inter_rad_bw_total_cycles") - 1)) { //bw_limit) { + //Update bandwidth cycle counter. Reset to 0 if we have accepted data for enough cycles to meet our bandwidth limit. + //Else, increment the cycle counter. + if (bw_counter >= (radsim_config.GetIntKnobShared("inter_rad_bw_total_cycles") - 1)) { bw_counter = 0; } else { @@ -161,49 +132,40 @@ RADSimInterRad::writeFifo() { void RADSimInterRad::readFifo() { /* - Always @ positive edge of the clock - Read from fifo slot - Iterates thru all fifos - Matches the dest index of fifo to the dest rad - DONE: use tdest instead of tuser + Always @ positive edge of the clock + Read from fifo slot + Iterates thru all fifos + Matches the dest index of fifo to the dest rad */ int target_delay = radsim_config.GetIntKnobShared("inter_rad_latency_cycles"); while (true) { - //std::cout << "inter_rad fifo free before READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; //get current cycle for experiments int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); - //sc_bv val = this->fifos[0]->read(); for (int i = 0; i < num_rads; i++) { //iterate through all rad's fifos + //increment delay on all counters for (int j = 0; j < fifos_latency_counters[i].size(); j++) { - //std::cout << "i " << i << " j " << j << std::endl; fifos_latency_counters[i][j]++; } - //try reading from front of fifo - //std::cout << "all_axis_master_signals[dest_device]->tready.read(): " << all_axis_master_signals[dest_device]->tready.read() << std::endl; - //tried adding && (all_axis_master_signals[dest_device]->tready.read() as condn below, but no support for peek on sc_fifo to get the dest - //TODO: replace sc_fifo with something else std::queue that can support peeks + + //Try reading from front of fifo. sc_fifo does not support peek so this is required instead to obtain dest. + //TODO: replace sc_fifo with something else e.g., std::queue that can support peeks //IMPORTANT: currently does not accept backpressure. Portal module must create a buffer for backpressure on the RAD's NoC if ( (this->fifos[i]->num_available() != 0) && (fifos_latency_counters[i][0] >= target_delay) ){ //check that fifo is not empty fifos_latency_counters[i].erase(fifos_latency_counters[i].begin()); //to reset counter, remove first elem struct axis_fields read_from_fifo; this->fifos[i]->nb_read(read_from_fifo); sc_bv val = read_from_fifo.tdata; - int dest_device = (DEST_RAD(read_from_fifo.tdest)).to_uint64(); //#define AXIS_USERW 66 + int dest_device = (DEST_RAD(read_from_fifo.tdest)).to_uint64(); - //std::cout << "inter_rad fifo data READ is " << this->fifos[0]->read() << std::endl; if (read_from_fifo.tvalid) { - //std::cout << "inter_rad fifo data READ is " << val.to_uint64() << " on cycle " << curr_cycle << std::endl; - //std::cout << "dest_device: " << dest_device << std::endl; - //all_signals[1].write(val); //works but replacing with axi - all_axis_master_signals[dest_device]->tdata.write(val); //works if write to either this or line above + all_axis_master_signals[dest_device]->tdata.write(val); all_axis_master_signals[dest_device]->tvalid.write(read_from_fifo.tvalid); all_axis_master_signals[dest_device]->tlast.write(read_from_fifo.tlast); all_axis_master_signals[dest_device]->tdest.write(read_from_fifo.tdest); all_axis_master_signals[dest_device]->tuser.write(read_from_fifo.tuser); - //std::cout << "inter_rad fifo free after READ is " << this->fifos[0]->num_free() << "/" << this->fifos[0]->num_available() << std::endl; } else { //no data to be written to any RAD's portal module diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index 69fc434..afbd56c 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -12,11 +12,6 @@ #include #include -//#define DATAW AXIS_MAX_DATAW //16*32 //changed to match dlrm defines file //128 -//#define NUM_SLOTS 1000 //5 //number of fifo slots, for now = NUM_ADDENDS -// #define DEST_RAD_LSB 0 -// #define DEST_RAD_MSB AXIS_DEST_FIELDW //7 - struct axis_fields { bool tvalid; bool tready; @@ -31,22 +26,16 @@ struct axis_fields { friend std::ostream& operator<<(std::ostream& os, const axis_fields& I); }; + +//Network for communication between RADs class RADSimInterRad : public sc_module { private: RADSimCluster* cluster; - //std::vector> all_signals; sc_vector>> all_signals{"all_signals"}; - //sc_fifo> data_in_rad1 = sc_fifo>(2); //2 slots for now - //sc_vector>> switch_port_fifos{"switch_port_fifos"}; - //for latency - // float latency_sec = 2.1 * pow(10, -6); //5.0*1 * pow(10, -9); //2.6 * pow(10, -6); //do not currently support zero latency -- I could implement by bypassing FIFO - // float period_sec = 5.0 * pow(10, -9); - // int target_delay = ceil(latency_sec/period_sec); //number of cycles to delay int bw_limit = 0; public: int num_rads; sc_in clk; - //std::vector>*> fifos; //works but replacing with struct elems std::vector*> fifos; //for axi interfaces @@ -58,17 +47,12 @@ class RADSimInterRad : public sc_module { //for rising edge detection on each interface std::vector prev_valid; - //for latency counter - //std::vector> fifos_latency_counters; //using vector of vectors bc dynamic sizing based on num_rads, allows pushback and erase, and faster incrementing (we increment more often than erase from front) than std::deque std::vector> fifos_latency_counters; RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_clk, RADSimCluster* cluster); ~RADSimInterRad(); - void ConnectRadPair(int i, int j); void ConnectRadAxi(int i); - /*sc_signal in_i_out_j; - sc_signal in_j_out_i; */ void writeFifo(); void readFifo(); SC_HAS_PROCESS(RADSimInterRad); From 67fcc87a36ef63419c3589448ec26f74f7588e4e Mon Sep 17 00:00:00 2001 From: abnashkb Date: Sun, 20 Oct 2024 02:09:13 -0400 Subject: [PATCH 115/127] Changed add design to support multi-RAD code changes but run on single RAD --- rad-sim/example-designs/add/add.clks | 3 +- rad-sim/example-designs/add/add.place | 3 +- rad-sim/example-designs/add/add_driver.cpp | 16 +-- rad-sim/example-designs/add/add_driver.hpp | 1 - rad-sim/example-designs/add/add_system.cpp | 2 - rad-sim/example-designs/add/add_system.hpp | 1 - rad-sim/example-designs/add/add_top.cpp | 18 +-- rad-sim/example-designs/add/add_top.hpp | 4 +- rad-sim/example-designs/add/config.yml | 4 +- rad-sim/example-designs/add/modules/adder.cpp | 125 ++---------------- rad-sim/example-designs/add/modules/adder.hpp | 34 +---- .../example-designs/add/modules/client.cpp | 26 ++-- .../example-designs/add/modules/client.hpp | 3 +- rad-sim/test/add_test.sh | 9 ++ 14 files changed, 53 insertions(+), 196 deletions(-) create mode 100755 rad-sim/test/add_test.sh diff --git a/rad-sim/example-designs/add/add.clks b/rad-sim/example-designs/add/add.clks index 067766d..a5df186 100644 --- a/rad-sim/example-designs/add/add.clks +++ b/rad-sim/example-designs/add/add.clks @@ -1,3 +1,2 @@ adder_inst 0 0 -client_inst 0 0 -portal_inst 0 0 \ No newline at end of file +client_inst 0 0 \ No newline at end of file diff --git a/rad-sim/example-designs/add/add.place b/rad-sim/example-designs/add/add.place index 66ed13e..ca746f7 100644 --- a/rad-sim/example-designs/add/add.place +++ b/rad-sim/example-designs/add/add.place @@ -1,3 +1,2 @@ adder_inst 0 0 axis -client_inst 0 3 axis -portal_inst 0 1 axis \ No newline at end of file +client_inst 0 3 axis \ No newline at end of file diff --git a/rad-sim/example-designs/add/add_driver.cpp b/rad-sim/example-designs/add/add_driver.cpp index a7a5889..d28e44b 100644 --- a/rad-sim/example-designs/add/add_driver.cpp +++ b/rad-sim/example-designs/add/add_driver.cpp @@ -1,7 +1,6 @@ #include #define NUM_ADDENDS 3 -#define TOTAL_RADS 5 add_driver::add_driver(const sc_module_name &name, RADSimDesignContext* radsim_design_) : sc_module(name) { @@ -21,10 +20,7 @@ add_driver::add_driver(const sc_module_name &name, RADSimDesignContext* radsim_d for (unsigned int i = 0; i < NUM_ADDENDS; i++) { unsigned int r_num = std::rand() % 10 + 1; std::cout << r_num << " "; - for (int i = 1; i < TOTAL_RADS; i++) { - //push same addend into FIFO repeatedly, once for each RAD - numbers_to_send.push(r_num); - } + numbers_to_send.push(r_num); actual_sum += r_num; } std::cout << std::endl << "----------------------------------------" << std::endl; @@ -41,13 +37,13 @@ void add_driver::source() { client_valid.write(false); wait(); rst.write(false); - start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); start_time = std::chrono::steady_clock::now(); wait(); while (!numbers_to_send.empty()) { client_tdata.write(numbers_to_send.front()); - client_tlast.write(numbers_to_send.size() <= TOTAL_RADS-1); //bc sending to TOTAL_RADS-1 mult RADs, so both receive the last flag + client_tlast.write(numbers_to_send.size() <= 1); client_valid.write(true); wait(); @@ -62,7 +58,7 @@ void add_driver::source() { } void add_driver::sink() { - while (!(response_valid.read() && portal_recvd.read())) { + while (!(response_valid.read())) { wait(); } //std::cout << "Received " << response.read().to_uint64() << " sum from the adder!" << std::endl; @@ -75,13 +71,13 @@ void add_driver::sink() { std::cout << "SUCCESS - Output is matching!" << std::endl; } - end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); end_time = std::chrono::steady_clock::now(); std::cout << "Simulation Cycles = " << end_cycle - start_cycle << std::endl; std::cout << "Simulation Time = " << std::chrono::duration_cast (end_time - start_time).count() << " us" << std::endl; NoCTransactionTelemetry::DumpStatsToFile("stats.csv"); - end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); std::cout << "Simulation Cycles for Just Adder Portion = " << end_cycle - start_cycle << std::endl; this->radsim_design->set_rad_done(); diff --git a/rad-sim/example-designs/add/add_driver.hpp b/rad-sim/example-designs/add/add_driver.hpp index cff26c2..311672e 100644 --- a/rad-sim/example-designs/add/add_driver.hpp +++ b/rad-sim/example-designs/add/add_driver.hpp @@ -25,7 +25,6 @@ class add_driver : public sc_module { sc_in client_ready; sc_in> response; sc_in response_valid; - sc_in portal_recvd; add_driver(const sc_module_name &name, RADSimDesignContext* radsim_design_); ~add_driver(); diff --git a/rad-sim/example-designs/add/add_system.cpp b/rad-sim/example-designs/add/add_system.cpp index 1e3d825..5a32d68 100644 --- a/rad-sim/example-designs/add/add_system.cpp +++ b/rad-sim/example-designs/add/add_system.cpp @@ -13,7 +13,6 @@ add_system::add_system(const sc_module_name &name, sc_clock *driver_clk_sig, RAD driver_inst->client_ready(client_ready_sig); driver_inst->response(response_sig); driver_inst->response_valid(response_valid_sig); - driver_inst->portal_recvd(portal_recvd_sig); // Instantiate design top-level dut_inst = new add_top("dut", radsim_design); @@ -24,7 +23,6 @@ add_system::add_system(const sc_module_name &name, sc_clock *driver_clk_sig, RAD dut_inst->client_ready(client_ready_sig); dut_inst->response(response_sig); dut_inst->response_valid(response_valid_sig); - dut_inst->portal_recvd(portal_recvd_sig); //add add_top as dut instance for parent class RADSimDesignSystem this->design_dut_inst = dut_inst; } diff --git a/rad-sim/example-designs/add/add_system.hpp b/rad-sim/example-designs/add/add_system.hpp index d529ffd..ace1ecb 100644 --- a/rad-sim/example-designs/add/add_system.hpp +++ b/rad-sim/example-designs/add/add_system.hpp @@ -14,7 +14,6 @@ class add_system : public RADSimDesignSystem { sc_signal client_ready_sig; sc_signal> response_sig; sc_signal response_valid_sig; - sc_signal portal_recvd_sig; public: sc_signal rst_sig; diff --git a/rad-sim/example-designs/add/add_top.cpp b/rad-sim/example-designs/add/add_top.cpp index 3638c4a..c9dd366 100644 --- a/rad-sim/example-designs/add/add_top.cpp +++ b/rad-sim/example-designs/add/add_top.cpp @@ -1,7 +1,9 @@ #include add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) - : sc_module(name) { + : RADSimDesignTop(radsim_design) { + + this->radsim_design = radsim_design; std::string module_name_str; char module_name[25]; @@ -9,7 +11,7 @@ add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) module_name_str = "client_inst"; std::strcpy(module_name, module_name_str.c_str()); - client_inst = new client(module_name, 16, radsim_design); + client_inst = new client(module_name, radsim_design); client_inst->rst(rst); client_inst->client_tdata(client_tdata); client_inst->client_tlast(client_tlast); @@ -23,16 +25,7 @@ add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) adder_inst->response(response); adder_inst->response_valid(response_valid); - //create portal module - module_name_str = "portal_inst"; - std::strcpy(module_name, module_name_str.c_str()); - portal_inst = new portal(module_name, radsim_design); - portal_inst->portal_recvd(this->portal_recvd); - - //connect master to master instead, to expose to top - portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); - portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); //top drives portal bc top receives slave inputs - + this->connectPortalReset(&rst); radsim_design->BuildDesignContext("add.place", "add.clks"); radsim_design->CreateSystemNoCs(rst); radsim_design->ConnectModulesToNoC(); @@ -41,5 +34,4 @@ add_top::add_top(const sc_module_name &name, RADSimDesignContext* radsim_design) add_top::~add_top() { delete adder_inst; delete client_inst; - delete portal_inst; } \ No newline at end of file diff --git a/rad-sim/example-designs/add/add_top.hpp b/rad-sim/example-designs/add/add_top.hpp index 9a7c391..6ca9d2c 100644 --- a/rad-sim/example-designs/add/add_top.hpp +++ b/rad-sim/example-designs/add/add_top.hpp @@ -3,7 +3,6 @@ #include #include #include -#include #include #include #include @@ -13,7 +12,7 @@ class add_top : public RADSimDesignTop { private: adder *adder_inst; client *client_inst; - portal *portal_inst; + RADSimDesignContext* radsim_design; public: sc_in rst; @@ -24,7 +23,6 @@ class add_top : public RADSimDesignTop { sc_out client_ready; sc_out> response; sc_out response_valid; - sc_out portal_recvd; add_top(const sc_module_name &name, RADSimDesignContext* radsim_design); ~add_top(); diff --git a/rad-sim/example-designs/add/config.yml b/rad-sim/example-designs/add/config.yml index 6b5a978..b65f928 100644 --- a/rad-sim/example-designs/add/config.yml +++ b/rad-sim/example-designs/add/config.yml @@ -38,5 +38,5 @@ cluster: sim_driver_period: 5.0 telemetry_log_verbosity: 2 telemetry_traces: [] - num_rads: 2 - cluster_configs: ['rad1', 'rad1'] \ No newline at end of file + num_rads: 1 + cluster_configs: ['rad1'] \ No newline at end of file diff --git a/rad-sim/example-designs/add/modules/adder.cpp b/rad-sim/example-designs/add/modules/adder.cpp index e73dca0..5d8f1e0 100644 --- a/rad-sim/example-designs/add/modules/adder.cpp +++ b/rad-sim/example-designs/add/modules/adder.cpp @@ -1,50 +1,13 @@ #include -int which_rad = 1; -int TOTAL_RADS = 5; - adder::adder(const sc_module_name &name, RADSimDesignContext* radsim_design) : RADSimModule(name, radsim_design) { this->radsim_design = radsim_design; - char fifo_name[25]; - std::string fifo_name_str; - fifo_name_str = "adder_tdata_fifo"; - std::strcpy(fifo_name, fifo_name_str.c_str()); - adder_tdata_fifo = new fifo>(fifo_name, FIFO_DEPTH, FIFO_DEPTH - 1, 0); - adder_tdata_fifo->clk(clk); - adder_tdata_fifo->rst(rst); - adder_tdata_fifo->wen(adder_tdata_fifo_wen_signal); - adder_tdata_fifo->ren(adder_tdata_fifo_ren_signal); - adder_tdata_fifo->wdata(adder_tdata); - adder_tdata_fifo->full(adder_tdata_fifo_full_signal); - adder_tdata_fifo->almost_full(adder_tdata_fifo_almost_full_signal); - adder_tdata_fifo->empty(adder_tdata_fifo_empty_signal); - adder_tdata_fifo->almost_empty(adder_tdata_fifo_almost_empty_signal); - adder_tdata_fifo->rdata(adder_tdata_fifo_rdata_signal); - - fifo_name_str = "adder_tlast_fifo"; - std::strcpy(fifo_name, fifo_name_str.c_str()); - adder_tlast_fifo = new fifo(fifo_name, FIFO_DEPTH, FIFO_DEPTH - 1, 0); - adder_tlast_fifo->clk(clk); - adder_tlast_fifo->rst(rst); - adder_tlast_fifo->wen(adder_tlast_fifo_wen_signal); - adder_tlast_fifo->ren(adder_tlast_fifo_ren_signal); - adder_tlast_fifo->wdata(axis_adder_interface.tlast); - adder_tlast_fifo->full(adder_tlast_fifo_full_signal); - adder_tlast_fifo->almost_full(adder_tlast_fifo_almost_full_signal); - adder_tlast_fifo->empty(adder_tlast_fifo_empty_signal); - adder_tlast_fifo->almost_empty(adder_tlast_fifo_almost_empty_signal); - adder_tlast_fifo->rdata(adder_tlast_fifo_rdata_signal); - // Combinational logic and its sensitivity list SC_METHOD(Assign); - sensitive << rst << axis_adder_interface.tready - << axis_adder_interface.tvalid << adder_tdata_fifo_almost_full_signal - << adder_tdata_fifo_empty_signal << axis_adder_master_interface.tready - << axis_adder_master_interface.tvalid << adder_tdata_fifo_rdata_signal - << adder_tlast_fifo_rdata_signal << clk; //must be sensitive to clk or get occasional unexpected behaviour where rdata stagnates + sensitive << rst; // Sequential logic and its clock/reset setup SC_CTHREAD(Tick, clk.pos()); reset_signal_is(rst, true); // Reset is active high @@ -55,56 +18,15 @@ adder::adder(const sc_module_name &name, RADSimDesignContext* radsim_design) } adder::~adder() { - delete adder_tdata_fifo; - delete adder_tlast_fifo; } void adder::Assign() { if (rst) { adder_rolling_sum = 0; axis_adder_interface.tready.write(false); - adder_tdata_fifo_wen_signal.write(false); - adder_tlast_fifo_wen_signal.write(false); - axis_adder_master_interface.tvalid.write(false); - adder_tdata.write(0); } else { - if (!adder_tdata_fifo_empty_signal.read()) { - sc_bv tdata = adder_tdata_fifo_rdata_signal.read(); - bool tlast = adder_tlast_fifo_rdata_signal.read(); - std::string src_port_name = module_name + ".axis_adder_master_interface"; - std::string dst_port_name = "portal_inst.axis_portal_slave_interface"; - uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); - uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); - //std::cout << "adder.cpp portal dest is: " << dst_addr << std::endl; - sc_bv concat_dest; - DEST_RAD(concat_dest) = which_rad; //1; - DEST_LOCAL_NODE(concat_dest) = dst_addr; - DEST_REMOTE_NODE(concat_dest) = 0; //for mult module on RAD 2 -- I know this, but designer would not... TODO code this flexibly - axis_adder_master_interface.tdest.write(concat_dest); - axis_adder_master_interface.tid.write(0); - axis_adder_master_interface.tstrb.write(0); - axis_adder_master_interface.tkeep.write(0); - axis_adder_master_interface.tuser.write(src_addr); - axis_adder_master_interface.tlast.write(tlast); - axis_adder_master_interface.tdata.write(tdata); - axis_adder_master_interface.tvalid.write(true); - adder_tdata.write(axis_adder_interface.tdata.read()); - } else { - // Always ready to accept the transaction - //axis_adder_interface.tready.write(true); - axis_adder_master_interface.tvalid.write(false); - adder_tdata.write(axis_adder_interface.tdata.read()); - } - - axis_adder_interface.tready.write(!adder_tdata_fifo_almost_full_signal.read()); - - adder_tdata_fifo_wen_signal.write(axis_adder_interface.tready.read() && axis_adder_interface.tvalid.read()); - adder_tlast_fifo_wen_signal.write(axis_adder_interface.tready.read() && axis_adder_interface.tvalid.read()); - - adder_tdata_fifo_ren_signal.write(axis_adder_master_interface.tvalid.read() && - axis_adder_master_interface.tready.read()); - adder_tlast_fifo_ren_signal.write(axis_adder_master_interface.tvalid.read() && - axis_adder_master_interface.tready.read()); + // Always ready to accept the transaction + axis_adder_interface.tready.write(true); } } @@ -112,48 +34,27 @@ void adder::Tick() { response_valid.write(0); response.write(0); int count_in_addends = 0; - int count_out_addends = 0; wait(); - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); //std::cout << "adder.cpp is before while loop at cycle " << curr_cycle << std::endl; + // Always @ positive edge of the clock while (true) { - curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - //std::cout << "tready: " << axis_adder_master_interface.tready.read() << std::endl; + curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); - //accept_data = !accept_data; // Receiving transaction from AXI-S interface if (axis_adder_interface.tvalid.read() && axis_adder_interface.tready.read() - //also check master since sending on master in same cycle - //in future if needed, could decouple receiving and sending using a fifo - //&& axis_adder_master_interface.tready.read() //this is input from NoC ){ - if (which_rad == 1) { //only calculate sum when sending to RAD 1 -- prevents doubly adding + count_in_addends++; uint64_t current_sum = adder_rolling_sum.to_uint64(); adder_rolling_sum = current_sum + axis_adder_interface.tdata.read().to_uint64(); - t_finished.write(axis_adder_interface.tlast.read()); //this should still work even with 2 RADs because of which_rad check - // std::cout << module_name << ": Got Transaction " << count_in_addends << " on cycle " << curr_cycle << " (user = " - // << axis_adder_interface.tuser.read().to_uint64() << ") (addend = " - // << axis_adder_interface.tdata.read().to_uint64() << ")!" - // << std::endl; - count_in_addends++; - } - - if (which_rad < (TOTAL_RADS-1)) { - which_rad++; - } - else { - which_rad = 1; //rollback - } - - } - - //sent to portal module - if (axis_adder_master_interface.tvalid.read() && axis_adder_master_interface.tready.read()) { - //std::cout << "Sent the " << count_out_addends << "th addend " << axis_adder_master_interface.tdata.read().to_uint64() << " over NoC to portal module on cycle " << curr_cycle << std::endl; - count_out_addends++; + t_finished.write(axis_adder_interface.tlast.read()); + std::cout << module_name << ": Got Transaction " << count_in_addends << " on cycle " << curr_cycle << " (user = " + << axis_adder_interface.tuser.read().to_uint64() << ") (addend = " + << axis_adder_interface.tdata.read().to_uint64() << ")!" + << std::endl; } // Print Sum and Exit @@ -175,6 +76,4 @@ void adder::RegisterModuleInfo() { port_name = module_name + ".axis_adder_interface"; RegisterAxisSlavePort(port_name, &axis_adder_interface, DATAW, 0); - port_name = module_name + ".axis_adder_master_interface"; - RegisterAxisMasterPort(port_name, &axis_adder_master_interface, DATAW, 0); } \ No newline at end of file diff --git a/rad-sim/example-designs/add/modules/adder.hpp b/rad-sim/example-designs/add/modules/adder.hpp index ab37fae..9abffa2 100644 --- a/rad-sim/example-designs/add/modules/adder.hpp +++ b/rad-sim/example-designs/add/modules/adder.hpp @@ -11,38 +11,11 @@ #include #include #include -#include - -#define FIFO_DEPTH 16 class adder : public RADSimModule { private: sc_bv adder_rolling_sum; // Sum to store result sc_signal t_finished; // Signal flagging that the transaction has terminated - //std::queue, bool>> adder_tdata_tlast_fifo; - // FIFO to store numbers - fifo>* adder_tdata_fifo; - fifo* adder_tlast_fifo; - - // Data FIFO signals - sc_signal> adder_tdata_fifo_rdata_signal; - sc_signal adder_tdata_fifo_wen_signal; - sc_signal adder_tdata_fifo_ren_signal; - sc_signal adder_tdata_fifo_full_signal; - sc_signal adder_tdata_fifo_empty_signal; - sc_signal adder_tdata_fifo_almost_full_signal; - sc_signal adder_tdata_fifo_almost_empty_signal; - - // Last FIFO signals - sc_signal adder_tlast_fifo_rdata_signal; - sc_signal adder_tlast_fifo_wen_signal; - sc_signal adder_tlast_fifo_ren_signal; - sc_signal adder_tlast_fifo_full_signal; - sc_signal adder_tlast_fifo_empty_signal; - sc_signal adder_tlast_fifo_almost_full_signal; - sc_signal adder_tlast_fifo_almost_empty_signal; - - bool testbench_tlast; public: RADSimDesignContext* radsim_design; @@ -51,13 +24,8 @@ class adder : public RADSimModule { sc_out> response; // Interface to the NoC axis_slave_port axis_adder_interface; - axis_master_port axis_adder_master_interface; - //to connect to fifo - //sc_in> adder_tdata; - sc_signal> adder_tdata; - //sc_in adder_tlast; - adder(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg + adder(const sc_module_name &name, RADSimDesignContext* radsim_design); ~adder(); void Assign(); // Combinational logic process diff --git a/rad-sim/example-designs/add/modules/client.cpp b/rad-sim/example-designs/add/modules/client.cpp index 5c0f84f..3e395f5 100644 --- a/rad-sim/example-designs/add/modules/client.cpp +++ b/rad-sim/example-designs/add/modules/client.cpp @@ -1,6 +1,6 @@ #include -client::client(const sc_module_name &name, unsigned int fifo_depth, RADSimDesignContext* radsim_design) +client::client(const sc_module_name &name, RADSimDesignContext* radsim_design) : RADSimModule(name, radsim_design) { this->radsim_design = radsim_design; @@ -59,15 +59,15 @@ void client::Tick() { wait(); while (true) { if (client_ready.read() && client_valid.read()) { - // std::cout << this->name() << " @ cycle " - // << GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")) << ": " - // << " Pushed request to FIFO!" << std::endl; + std::cout << this->name() << " @ cycle " + << GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")) << ": " + << " Pushed request to FIFO!" << std::endl; } if (axis_client_interface.tvalid.read() && axis_client_interface.tready.read()) { - // std::cout << this->name() << " @ cycle " - // << GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")) << ": " - // << " Sent Transaction!" << std::endl; + std::cout << this->name() << " @ cycle " + << GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")) << ": " + << " Sent Transaction!" << std::endl; } wait(); } @@ -85,11 +85,13 @@ void client::Assign() { bool tlast = client_tlast_fifo_rdata_signal.read(); std::string src_port_name = module_name + ".axis_client_interface"; std::string dst_port_name = "adder_inst.axis_adder_interface"; - //cout << dst_port_name << endl; - uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref - uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref - - axis_client_interface.tdest.write(dst_addr); + uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); + uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); + sc_bv dest_id_concat; + DEST_REMOTE_NODE(dest_id_concat) = 0; //bc staying on same RAD + DEST_LOCAL_NODE(dest_id_concat) = dst_addr; + DEST_RAD(dest_id_concat) = radsim_design->rad_id; + axis_client_interface.tdest.write(dest_id_concat); axis_client_interface.tid.write(0); axis_client_interface.tstrb.write(0); axis_client_interface.tkeep.write(0); diff --git a/rad-sim/example-designs/add/modules/client.hpp b/rad-sim/example-designs/add/modules/client.hpp index 5220ae7..2bc9865 100644 --- a/rad-sim/example-designs/add/modules/client.hpp +++ b/rad-sim/example-designs/add/modules/client.hpp @@ -48,10 +48,9 @@ class client : public RADSimModule { sc_out client_ready; // Interface to the NoC axis_master_port axis_client_interface; - //AKB added bc used in functions outside of constructor: RADSimDesignContext* radsim_design; - client(const sc_module_name &name, unsigned int fifo_depth, RADSimDesignContext* radsim_design); //AKB added last arg + client(const sc_module_name &name, RADSimDesignContext* radsim_design); ~client(); void Assign(); // Combinational logic process diff --git a/rad-sim/test/add_test.sh b/rad-sim/test/add_test.sh new file mode 100755 index 0000000..beb6184 --- /dev/null +++ b/rad-sim/test/add_test.sh @@ -0,0 +1,9 @@ +#!/bin/bash +test_path=$( cd "$(dirname "${BASH_SOURCE[0]}")" ; pwd -P ) +cd $test_path + +cp -f ../example-designs/add/config.yml ../config.yml + +(cd ../; python config.py add) + +(cd ../build; make run) \ No newline at end of file From 7ff1a740b4fd11e63584bb56841756962ff0cacb Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 23 Oct 2024 02:23:14 -0400 Subject: [PATCH 116/127] Updated mult design --- rad-sim/example-designs/mlp/mlp_top.hpp | 2 +- rad-sim/example-designs/mult/CMakeLists.txt | 12 +- rad-sim/example-designs/mult/config.yml | 20 +-- .../example-designs/mult/modules/client.cpp | 127 ++++++++++++++++++ .../example-designs/mult/modules/client.hpp | 60 +++++++++ .../mult/modules/client_mult.cpp | 93 ------------- .../mult/modules/client_mult.hpp | 42 ------ rad-sim/example-designs/mult/modules/mult.cpp | 24 ++-- rad-sim/example-designs/mult/modules/mult.hpp | 5 +- .../mult/modules/portal_mult.cpp | 106 --------------- .../mult/modules/portal_mult.hpp | 35 ----- rad-sim/example-designs/mult/mult.clks | 3 +- rad-sim/example-designs/mult/mult.place | 3 +- rad-sim/example-designs/mult/mult_driver.cpp | 12 +- rad-sim/example-designs/mult/mult_driver.hpp | 5 +- rad-sim/example-designs/mult/mult_system.cpp | 5 +- rad-sim/example-designs/mult/mult_system.hpp | 1 - rad-sim/example-designs/mult/mult_top.cpp | 18 +-- rad-sim/example-designs/mult/mult_top.hpp | 8 +- 19 files changed, 238 insertions(+), 343 deletions(-) create mode 100644 rad-sim/example-designs/mult/modules/client.cpp create mode 100644 rad-sim/example-designs/mult/modules/client.hpp delete mode 100644 rad-sim/example-designs/mult/modules/client_mult.cpp delete mode 100644 rad-sim/example-designs/mult/modules/client_mult.hpp delete mode 100644 rad-sim/example-designs/mult/modules/portal_mult.cpp delete mode 100644 rad-sim/example-designs/mult/modules/portal_mult.hpp diff --git a/rad-sim/example-designs/mlp/mlp_top.hpp b/rad-sim/example-designs/mlp/mlp_top.hpp index e8b194c..96f3835 100644 --- a/rad-sim/example-designs/mlp/mlp_top.hpp +++ b/rad-sim/example-designs/mlp/mlp_top.hpp @@ -15,7 +15,7 @@ class mlp_top : public RADSimDesignTop { std::vector> matrix_vector_engines; std::vector input_dispatchers; collector* output_collector; - RADSimDesignContext* radsim_design; //AKB ADDED + RADSimDesignContext* radsim_design; public: sc_in rst; diff --git a/rad-sim/example-designs/mult/CMakeLists.txt b/rad-sim/example-designs/mult/CMakeLists.txt index 5758451..a9cc639 100644 --- a/rad-sim/example-designs/mult/CMakeLists.txt +++ b/rad-sim/example-designs/mult/CMakeLists.txt @@ -13,8 +13,8 @@ include_directories( set(srcfiles modules/mult.cpp - modules/client_mult.cpp - modules/portal_mult.cpp + modules/client.cpp + modules/fifo.cpp mult_top.cpp mult_driver.cpp mult_system.cpp @@ -22,8 +22,8 @@ set(srcfiles set(hdrfiles modules/mult.hpp - modules/client_mult.hpp - modules/portal_mult.hpp + modules/client.hpp + modules/fifo.hpp mult_top.hpp mult_driver.hpp mult_system.hpp @@ -31,5 +31,5 @@ set(hdrfiles add_compile_options(-Wall -Wextra -pedantic) -add_library(design_mult STATIC ${srcfiles} ${hdrfiles}) -target_link_libraries(design_mult PUBLIC SystemC::systemc booksim noc) \ No newline at end of file +add_library(mult STATIC ${srcfiles} ${hdrfiles}) +target_link_libraries(mult PUBLIC SystemC::systemc booksim noc) \ No newline at end of file diff --git a/rad-sim/example-designs/mult/config.yml b/rad-sim/example-designs/mult/config.yml index 8acd4b1..dd80ac8 100644 --- a/rad-sim/example-designs/mult/config.yml +++ b/rad-sim/example-designs/mult/config.yml @@ -1,3 +1,9 @@ +config rad1: + design: + name: 'mult' + noc_placement: ['mult.place'] + clk_periods: [5.0] + noc: type: ['2d'] num_nocs: 1 @@ -27,11 +33,9 @@ noc_adapters: out_arbiter: ['priority_rr'] vc_mapping: ['direct'] -design: - name: 'mult' - noc_placement: ['mult.place'] - clk_periods: [5.0] - -telemetry: - log_verbosity: 2 - traces: [] \ No newline at end of file +cluster: + sim_driver_period: 5.0 + telemetry_log_verbosity: 2 + telemetry_traces: [] + num_rads: 1 + cluster_configs: ['rad1'] \ No newline at end of file diff --git a/rad-sim/example-designs/mult/modules/client.cpp b/rad-sim/example-designs/mult/modules/client.cpp new file mode 100644 index 0000000..6c15013 --- /dev/null +++ b/rad-sim/example-designs/mult/modules/client.cpp @@ -0,0 +1,127 @@ +#include + +client::client(const sc_module_name &name, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design) { + + this->radsim_design = radsim_design; + + char fifo_name[25]; + std::string fifo_name_str; + fifo_name_str = "client_tdata_fifo"; + std::strcpy(fifo_name, fifo_name_str.c_str()); + client_tdata_fifo = new fifo>(fifo_name, FIFO_DEPTH, FIFO_DEPTH - 1, 0); + client_tdata_fifo->clk(clk); + client_tdata_fifo->rst(rst); + client_tdata_fifo->wen(client_tdata_fifo_wen_signal); + client_tdata_fifo->ren(client_tdata_fifo_ren_signal); + client_tdata_fifo->wdata(client_tdata); + client_tdata_fifo->full(client_tdata_fifo_full_signal); + client_tdata_fifo->almost_full(client_tdata_fifo_almost_full_signal); + client_tdata_fifo->empty(client_tdata_fifo_empty_signal); + client_tdata_fifo->almost_empty(client_tdata_fifo_almost_empty_signal); + client_tdata_fifo->rdata(client_tdata_fifo_rdata_signal); + + fifo_name_str = "client_tlast_fifo"; + std::strcpy(fifo_name, fifo_name_str.c_str()); + client_tlast_fifo = new fifo(fifo_name, FIFO_DEPTH, FIFO_DEPTH - 1, 0); + client_tlast_fifo->clk(clk); + client_tlast_fifo->rst(rst); + client_tlast_fifo->wen(client_tlast_fifo_wen_signal); + client_tlast_fifo->ren(client_tlast_fifo_ren_signal); + client_tlast_fifo->wdata(client_tlast); + client_tlast_fifo->full(client_tlast_fifo_full_signal); + client_tlast_fifo->almost_full(client_tlast_fifo_almost_full_signal); + client_tlast_fifo->empty(client_tlast_fifo_empty_signal); + client_tlast_fifo->almost_empty(client_tlast_fifo_almost_empty_signal); + client_tlast_fifo->rdata(client_tlast_fifo_rdata_signal); + + // Combinational logic and its sensitivity list + SC_METHOD(Assign); + sensitive << rst << client_ready << client_valid << client_tdata_fifo_almost_full_signal + << client_tdata_fifo_empty_signal << axis_client_interface.tready + << axis_client_interface.tvalid << client_tdata_fifo_rdata_signal + << client_tlast_fifo_rdata_signal; + // Sequential logic and its clock/reset setup + SC_CTHREAD(Tick, clk.pos()); + reset_signal_is(rst, true); // Reset is active high + + // This function must be defined & called for any RAD-Sim module to register + // its info for automatically connecting to the NoC + this->RegisterModuleInfo(); +} + +client::~client() { + delete client_tdata_fifo; + delete client_tlast_fifo; +} + +void client::Tick() { + wait(); + while (true) { + if (client_ready.read() && client_valid.read()) { + std::cout << this->name() << " @ cycle " + << GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")) << ": " + << " Pushed request to FIFO!" << std::endl; + } + + if (axis_client_interface.tvalid.read() && axis_client_interface.tready.read()) { + std::cout << this->name() << " @ cycle " + << GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")) << ": " + << " Sent Transaction!" << std::endl; + } + wait(); + } +} + +void client::Assign() { + if (rst) { + client_tdata_fifo_wen_signal.write(false); + client_tlast_fifo_wen_signal.write(false); + client_ready.write(false); + axis_client_interface.tvalid.write(false); + } else { + if (!client_tdata_fifo_empty_signal.read()) { + sc_bv tdata = client_tdata_fifo_rdata_signal.read(); + bool tlast = client_tlast_fifo_rdata_signal.read(); + std::string src_port_name = module_name + ".axis_client_interface"; + std::string dst_port_name = "mult_inst.axis_mult_interface"; + uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); + uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); + sc_bv dest_id_concat; + DEST_REMOTE_NODE(dest_id_concat) = 0; //bc staying on same RAD + DEST_LOCAL_NODE(dest_id_concat) = dst_addr; + DEST_RAD(dest_id_concat) = radsim_design->rad_id; + axis_client_interface.tdest.write(dest_id_concat); + axis_client_interface.tid.write(0); + axis_client_interface.tstrb.write(0); + axis_client_interface.tkeep.write(0); + axis_client_interface.tuser.write(src_addr); + axis_client_interface.tlast.write(tlast); + axis_client_interface.tdata.write(tdata); + axis_client_interface.tvalid.write(true); + } else { + axis_client_interface.tvalid.write(false); + } + + client_ready.write(!client_tdata_fifo_almost_full_signal.read()); + + client_tdata_fifo_wen_signal.write(client_ready.read() && client_valid.read()); + client_tlast_fifo_wen_signal.write(client_ready.read() && client_valid.read()); + + client_tdata_fifo_ren_signal.write(axis_client_interface.tvalid.read() && + axis_client_interface.tready.read()); + client_tlast_fifo_ren_signal.write(axis_client_interface.tvalid.read() && + axis_client_interface.tready.read()); + } +} + +void client::RegisterModuleInfo() { + std::string port_name; + _num_noc_axis_slave_ports = 0; + _num_noc_axis_master_ports = 0; + _num_noc_aximm_slave_ports = 0; + _num_noc_aximm_master_ports = 0; + + port_name = module_name + ".axis_client_interface"; + RegisterAxisMasterPort(port_name, &axis_client_interface, DATAW, 0); +} diff --git a/rad-sim/example-designs/mult/modules/client.hpp b/rad-sim/example-designs/mult/modules/client.hpp new file mode 100644 index 0000000..2bc9865 --- /dev/null +++ b/rad-sim/example-designs/mult/modules/client.hpp @@ -0,0 +1,60 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define FIFO_DEPTH 16 + +class client : public RADSimModule { +private: + // FIFO to store numbers + fifo>* client_tdata_fifo; + fifo* client_tlast_fifo; + + // Data FIFO signals + sc_signal> client_tdata_fifo_rdata_signal; + sc_signal client_tdata_fifo_wen_signal; + sc_signal client_tdata_fifo_ren_signal; + sc_signal client_tdata_fifo_full_signal; + sc_signal client_tdata_fifo_empty_signal; + sc_signal client_tdata_fifo_almost_full_signal; + sc_signal client_tdata_fifo_almost_empty_signal; + + // Last FIFO signals + sc_signal client_tlast_fifo_rdata_signal; + sc_signal client_tlast_fifo_wen_signal; + sc_signal client_tlast_fifo_ren_signal; + sc_signal client_tlast_fifo_full_signal; + sc_signal client_tlast_fifo_empty_signal; + sc_signal client_tlast_fifo_almost_full_signal; + sc_signal client_tlast_fifo_almost_empty_signal; + + bool testbench_tlast; + +public: + sc_in rst; + // Interface to driver logic + sc_in> client_tdata; + sc_in client_tlast; + sc_in client_valid; + sc_out client_ready; + // Interface to the NoC + axis_master_port axis_client_interface; + RADSimDesignContext* radsim_design; + + client(const sc_module_name &name, RADSimDesignContext* radsim_design); + ~client(); + + void Assign(); // Combinational logic process + void Tick(); // Sequential logic process + SC_HAS_PROCESS(client); + void RegisterModuleInfo(); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/mult/modules/client_mult.cpp b/rad-sim/example-designs/mult/modules/client_mult.cpp deleted file mode 100644 index e1087a3..0000000 --- a/rad-sim/example-designs/mult/modules/client_mult.cpp +++ /dev/null @@ -1,93 +0,0 @@ -#include - -client_mult::client_mult(const sc_module_name &name, unsigned int fifo_depth, RADSimDesignContext* radsim_design) - : RADSimModule(name, radsim_design) { - - this->radsim_design = radsim_design; //AKB ADDED - - client_fifo_depth = fifo_depth; - - // Combinational logic and its sensitivity list - SC_METHOD(Assign); - sensitive << rst << client_fifo_full; - // Sequential logic and its clock/reset setup - SC_CTHREAD(Tick, clk.pos()); - reset_signal_is(rst, true); // Reset is active high - - // This function must be defined & called for any RAD-Sim module to register - // its info for automatically connecting to the NoC - this->RegisterModuleInfo(); -} - -client_mult::~client_mult() {} - -void client_mult::Assign() { - if (rst) { - client_ready.write(true); // ready to accept requests from driver testbench - } else { - // Ready to accept new factor from driver testbench as long as the factor - // FIFO is not full - client_ready.write(!client_fifo_full.read()); - } -} - -void client_mult::Tick() { - // Reset logic - axis_client_interface.tvalid.write(false); - while (!client_tdata_fifo.empty()) { - client_tdata_fifo.pop(); - } - client_fifo_full.write(false); - wait(); - - std::string src_port_name = module_name + ".axis_client_interface"; - - // Always @ positive edge of the clock - while (true) { - // Interface with testbench driver - if (client_ready.read() && client_valid.read()) { - client_tdata_fifo.push(client_tdata); - testbench_tlast = client_tlast.read(); - //std::cout << module_name << ": Pushed request to FIFO" << std::endl; - } - client_fifo_full.write(client_tdata_fifo.size() >= client_fifo_depth); - - // Sending transactions to AXI-S NoC - if (!client_tdata_fifo.empty()) { - sc_bv tdata = client_tdata_fifo.front(); - /*std::string dst_port_name = "mult_inst.axis_mult_interface"; - uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref - uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref - - axis_client_interface.tdest.write(dst_addr); - axis_client_interface.tid.write(0); - axis_client_interface.tstrb.write(0); - axis_client_interface.tkeep.write(0); - axis_client_interface.tuser.write(src_addr); - axis_client_interface.tlast.write(testbench_tlast && (client_tdata_fifo.size() == 1)); - axis_client_interface.tdata.write(tdata); - - axis_client_interface.tvalid.write(true); - } else { - axis_client_interface.tvalid.write(false); - } - - if (axis_client_interface.tvalid.read() && - axis_client_interface.tready.read()) {*/ - client_tdata_fifo.pop(); - //std::cout << module_name << ": Sent Transaction!" << std::endl; - } - wait(); - } -} - -void client_mult::RegisterModuleInfo() { - std::string port_name; - _num_noc_axis_slave_ports = 0; - _num_noc_axis_master_ports = 0; - _num_noc_aximm_slave_ports = 0; - _num_noc_aximm_master_ports = 0; - - port_name = module_name + ".axis_client_interface"; - RegisterAxisMasterPort(port_name, &axis_client_interface, DATAW, 0); -} diff --git a/rad-sim/example-designs/mult/modules/client_mult.hpp b/rad-sim/example-designs/mult/modules/client_mult.hpp deleted file mode 100644 index 5d8a0a2..0000000 --- a/rad-sim/example-designs/mult/modules/client_mult.hpp +++ /dev/null @@ -1,42 +0,0 @@ -#pragma once - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define FIFO_DEPTH 16 - -class client_mult : public RADSimModule { -private: - std::queue> client_tdata_fifo; // FIFO to store numbers - unsigned int client_fifo_depth; // MAXIMUM number of factors to store in FIFO - sc_signal client_fifo_full; // Signal flagging factor FIFO is full - bool testbench_tlast; - -public: - sc_in rst; - // Interface to driver logic - sc_in> client_tdata; - sc_in client_tlast; - sc_in client_valid; - sc_out client_ready; - // Interface to the NoC - axis_master_port axis_client_interface; - //AKB added bc used in functions outside of constructor: - RADSimDesignContext* radsim_design; - - client_mult(const sc_module_name &name, unsigned int fifo_depth, RADSimDesignContext* radsim_design); //AKB added last arg - ~client_mult(); - - void Assign(); // Combinational logic process - void Tick(); // Sequential logic process - SC_HAS_PROCESS(client_mult); - void RegisterModuleInfo(); -}; \ No newline at end of file diff --git a/rad-sim/example-designs/mult/modules/mult.cpp b/rad-sim/example-designs/mult/modules/mult.cpp index 9291e29..f32020a 100644 --- a/rad-sim/example-designs/mult/modules/mult.cpp +++ b/rad-sim/example-designs/mult/modules/mult.cpp @@ -1,6 +1,6 @@ #include -mult::mult(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg +mult::mult(const sc_module_name &name, RADSimDesignContext* radsim_design) : RADSimModule(name, radsim_design) { this->radsim_design = radsim_design; @@ -33,33 +33,29 @@ void mult::Tick() { response_valid.write(0); response.write(0); wait(); - bool printed_end_cycle = false; + int curr_cycle; // Always @ positive edge of the clock while (true) { + curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); + // Receiving transaction from AXI-S interface if (axis_mult_interface.tvalid.read() && axis_mult_interface.tready.read()) { - uint64_t current_product = mult_rolling_product.to_uint64(); //removing for experiment - mult_rolling_product = current_product * axis_mult_interface.tdata.read().to_uint64(); //removing for experiment + uint64_t current_product = mult_rolling_product.to_uint64(); + mult_rolling_product = current_product * axis_mult_interface.tdata.read().to_uint64(); t_finished.write(axis_mult_interface.tlast.read()); - // std::cout << module_name << ": Got Transaction (user = " - // << axis_mult_interface.tuser.read().to_uint64() << ") (factor = " - // << axis_mult_interface.tdata.read().to_uint64() << ")!" - // << std::endl; + std::cout << module_name << ": Got Transaction on cycle " << curr_cycle << "(user = " + << axis_mult_interface.tuser.read().to_uint64() << ") (factor = " + << axis_mult_interface.tdata.read().to_uint64() << ")!" + << std::endl; } // Print Sum and Exit if (t_finished.read()) { response_valid.write(1); response.write(mult_rolling_product); - //mult_inter_rad_recvd.write(1); //maybe not needed if using the - if (!printed_end_cycle) { - int end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - //std::cout << "mult.cpp received all factors from add RAD at cycle " << end_cycle << std::endl; - printed_end_cycle = true; - } } wait(); } diff --git a/rad-sim/example-designs/mult/modules/mult.hpp b/rad-sim/example-designs/mult/modules/mult.hpp index 8d679b8..2c0a25c 100644 --- a/rad-sim/example-designs/mult/modules/mult.hpp +++ b/rad-sim/example-designs/mult/modules/mult.hpp @@ -5,7 +5,7 @@ #include #include #include -#include +#include #include #include #include @@ -21,11 +21,10 @@ class mult : public RADSimModule { sc_in rst; sc_out response_valid; sc_out> response; - sc_out mult_inter_rad_recvd; // Interface to the NoC axis_slave_port axis_mult_interface; - mult(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg + mult(const sc_module_name &name, RADSimDesignContext* radsim_design); ~mult(); void Assign(); // Combinational logic process diff --git a/rad-sim/example-designs/mult/modules/portal_mult.cpp b/rad-sim/example-designs/mult/modules/portal_mult.cpp deleted file mode 100644 index af13cd8..0000000 --- a/rad-sim/example-designs/mult/modules/portal_mult.cpp +++ /dev/null @@ -1,106 +0,0 @@ -#include - -portal_mult::portal_mult(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg - : RADSimModule(name, radsim_design) { - - this->radsim_design = radsim_design; - - // Combinational logic and its sensitivity list - SC_METHOD(Assign); - sensitive << rst; - - //maybe add combinational logic if applicable later - SC_CTHREAD(Tick, clk.pos()); - reset_signal_is(rst, true); // Reset is active high - this->RegisterModuleInfo(); //can comment out if not connecting to NoC -} - - -portal_mult::~portal_mult() {} - -void portal_mult::Assign() { //combinational logic - if (rst) { - portal_axis_slave.tready.write(false); - axis_mult_portal_slave_interface.tready.write(false); - } else { - // Always ready to accept the transaction - portal_axis_slave.tready.write(true); - axis_mult_portal_slave_interface.tready.write(true); - } -} - -int counter_mult = 0; -void portal_mult::Tick() { //sequential logic - //portal_out.write(counter_mult); - wait(); - //Always @ positive edge of clock - while (true) { - // Receiving transaction from AXI-S interface - if (portal_axis_slave.tvalid.read() && - portal_axis_slave.tready.read()) { - //get current cycle - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); - //read - //std::cout << module_name << ": Portal_Mult Module Got Transaction on cycle " << curr_cycle << " (RAD ID) = " - // << radsim_design->rad_id //<< portal_axis_slave.tuser.read().to_uint64() - // << ") (addend = " - // << portal_axis_slave.tdata.read().to_uint64() << ")!" - // << std::endl; - //write the addend into the mult module and that will flag when received all values and can end simulation - std::string src_port_name = module_name + ".axis_mult_portal_master_interface"; - std::string dst_port_name = "mult_inst.axis_mult_interface"; - uint64_t dst_addr = radsim_design->GetPortDestinationID(dst_port_name); //AKB changed to ptr deref - //uint64_t src_addr = radsim_design->GetPortDestinationID(src_port_name); //AKB changed to ptr deref - //std::cout << "dst_addr in portal_mult.cpp is: " << dst_addr << std::endl; - //sc_bv concat_dest = portal_axis_slave.tdest.read(); - //DEST_RAD(concat_dest) = radsim_design->rad_id; - //DEST_LOCAL_NODE(concat_dest) = //dst_addr; - //std::cout << "portal_axis_slave.tdest.read() is: " << portal_axis_slave.tdest.read() << std::endl; - axis_mult_portal_master_interface.tdest.write(portal_axis_slave.tdest.read()); //concat_dest); //dst_addr); - axis_mult_portal_master_interface.tid.write(0); - axis_mult_portal_master_interface.tstrb.write(0); - axis_mult_portal_master_interface.tkeep.write(0); - axis_mult_portal_master_interface.tuser.write(portal_axis_slave.tuser.read()); //src_addr); - axis_mult_portal_master_interface.tlast.write(portal_axis_slave.tlast.read()); - axis_mult_portal_master_interface.tdata.write(portal_axis_slave.tdata.read()); - axis_mult_portal_master_interface.tvalid.write(true); - //checking if last transaction and if so, printing current simulation cycle count - if (portal_axis_slave.tlast.read()) { - //std::cout << "Mult design portal_mult.cpp received last data via inter_rad at cycle " << curr_cycle << std::endl; - } - } - else { - axis_mult_portal_master_interface.tvalid.write(false); - } - - - //added earlier for testing: writing alternating 0s and 1s to send data directly back to RAD0 with add design - /*if (counter_mult == 0) { - counter_mult = 1; - } - else { - counter_mult = 0; - } - portal_out.write(counter_mult);*/ - //std::cout << module_name << ": Wire in is showing " << portal_in.read() << std::endl; - //std::cout << counter << std::endl; - wait(); - } -} - -void portal_mult::RegisterModuleInfo() { - std::string port_name; - _num_noc_axis_slave_ports = 0; - _num_noc_axis_master_ports = 0; - _num_noc_aximm_slave_ports = 0; - _num_noc_aximm_master_ports = 0; - - port_name = module_name + ".axis_mult_portal_slave_interface"; - //std::cout << port_name << std::endl; - RegisterAxisSlavePort(port_name, &axis_mult_portal_slave_interface, DATAW, 0); - radsim_design->AssignPortalSlaveName(port_name); //bc other modules will send to this slave interface - - port_name = module_name + ".axis_mult_portal_master_interface"; - //std::cout << port_name << std::endl; - RegisterAxisMasterPort(port_name, &axis_mult_portal_master_interface, DATAW, 0); -} diff --git a/rad-sim/example-designs/mult/modules/portal_mult.hpp b/rad-sim/example-designs/mult/modules/portal_mult.hpp deleted file mode 100644 index b5cb484..0000000 --- a/rad-sim/example-designs/mult/modules/portal_mult.hpp +++ /dev/null @@ -1,35 +0,0 @@ -#pragma once - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -class portal_mult : public RADSimModule { - private: - public: - RADSimDesignContext* radsim_design; - sc_in rst; - //sc_in> portal_in; - //sc_out> portal_out; - //try adding axis_master_port for portal_out - axis_master_port portal_axis_master; - axis_slave_port portal_axis_slave; - //Interfaces to the NoC - axis_slave_port axis_mult_portal_slave_interface; - axis_master_port axis_mult_portal_master_interface; - - portal_mult(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB added last arg - ~portal_mult(); - - void Assign(); // Combinational logic process - void Tick(); // Sequential logic process - SC_HAS_PROCESS(portal_mult); - void RegisterModuleInfo(); //even tho did not add AXI Interface, need because is virtual fn in derived class -}; \ No newline at end of file diff --git a/rad-sim/example-designs/mult/mult.clks b/rad-sim/example-designs/mult/mult.clks index 873208a..3e3efd6 100644 --- a/rad-sim/example-designs/mult/mult.clks +++ b/rad-sim/example-designs/mult/mult.clks @@ -1,3 +1,2 @@ mult_inst 0 0 -client_inst 0 0 -portal_inst 0 0 \ No newline at end of file +client_inst 0 0 \ No newline at end of file diff --git a/rad-sim/example-designs/mult/mult.place b/rad-sim/example-designs/mult/mult.place index d98b32d..f7e1ad0 100644 --- a/rad-sim/example-designs/mult/mult.place +++ b/rad-sim/example-designs/mult/mult.place @@ -1,3 +1,2 @@ mult_inst 0 0 axis -client_inst 0 3 axis -portal_inst 0 1 axis \ No newline at end of file +client_inst 0 3 axis \ No newline at end of file diff --git a/rad-sim/example-designs/mult/mult_driver.cpp b/rad-sim/example-designs/mult/mult_driver.cpp index dfccaf6..2ed5dfa 100644 --- a/rad-sim/example-designs/mult/mult_driver.cpp +++ b/rad-sim/example-designs/mult/mult_driver.cpp @@ -1,6 +1,6 @@ #include -#define NUM_ADDENDS 5 +#define NUM_FACTORS 5 mult_driver::mult_driver(const sc_module_name &name, RADSimDesignContext* radsim_design_) : sc_module(name) { @@ -17,7 +17,7 @@ mult_driver::mult_driver(const sc_module_name &name, RADSimDesignContext* radsim // Generate random numbers to be multiplied together by the multiplier std::cout << "Generating Random Numbers to be multiplied ..." << std::endl; - for (unsigned int i = 0; i < NUM_ADDENDS; i++) { + for (unsigned int i = 0; i < NUM_FACTORS; i++) { unsigned int r_num = std::rand() % 10 + 1; std::cout << r_num << " "; numbers_to_send.push(r_num); @@ -37,7 +37,7 @@ void mult_driver::source() { client_valid.write(false); wait(); rst.write(false); - start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); wait(); while (!numbers_to_send.empty()) { @@ -58,7 +58,7 @@ void mult_driver::source() { void mult_driver::sink() { - while (!(response_valid.read())) { //&& mult_inter_rad_recvd.read())) { + while (!(response_valid.read())) { wait(); } std::cout << "Received " << response.read().to_uint64() << " product from the multiplier!" << std::endl; @@ -67,10 +67,10 @@ void mult_driver::sink() { if (response.read() != actual_product) std::cout << "FAILURE - Output is not matching!" << std::endl; else std::cout << "SUCCESS - Output is matching!" << std::endl; - end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnob("sim_driver_period")); + end_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); std::cout << "Simulation Cycles for Just Mult Portion = " << end_cycle - start_cycle << std::endl; - this->radsim_design->set_rad_done(); //flag to replace sc_stop calls + this->radsim_design->set_rad_done(); return; } \ No newline at end of file diff --git a/rad-sim/example-designs/mult/mult_driver.hpp b/rad-sim/example-designs/mult/mult_driver.hpp index 2050f85..5e060af 100644 --- a/rad-sim/example-designs/mult/mult_driver.hpp +++ b/rad-sim/example-designs/mult/mult_driver.hpp @@ -2,7 +2,7 @@ #include #include -#include +#include #include #include #include @@ -13,7 +13,7 @@ class mult_driver : public sc_module { int start_cycle, end_cycle; std::queue numbers_to_send; int actual_product; - RADSimDesignContext* radsim_design; //store ptr passed into constructor for use in source() and sink() + RADSimDesignContext* radsim_design; public: sc_in clk; @@ -24,7 +24,6 @@ class mult_driver : public sc_module { sc_in client_ready; sc_in> response; sc_in response_valid; - sc_in mult_inter_rad_recvd; mult_driver(const sc_module_name &name, RADSimDesignContext* radsim_design_); ~mult_driver(); diff --git a/rad-sim/example-designs/mult/mult_system.cpp b/rad-sim/example-designs/mult/mult_system.cpp index 82a2e35..0984d6e 100644 --- a/rad-sim/example-designs/mult/mult_system.cpp +++ b/rad-sim/example-designs/mult/mult_system.cpp @@ -1,6 +1,6 @@ #include -mult_system::mult_system(const sc_module_name &name, sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design) // AKB: added last 3 args +mult_system::mult_system(const sc_module_name &name, sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design) : sc_module(name) { // Instantiate driver @@ -13,7 +13,6 @@ mult_system::mult_system(const sc_module_name &name, sc_clock *driver_clk_sig, R driver_inst->client_ready(client_ready_sig); driver_inst->response(response_sig); driver_inst->response_valid(response_valid_sig); - driver_inst->mult_inter_rad_recvd(mult_inter_rad_recvd_sig); // Instantiate design top-level dut_inst = new mult_top("dut", radsim_design); @@ -24,9 +23,9 @@ mult_system::mult_system(const sc_module_name &name, sc_clock *driver_clk_sig, R dut_inst->client_ready(client_ready_sig); dut_inst->response(response_sig); dut_inst->response_valid(response_valid_sig); + //add mult_top as dut instance for parent class RADSimDesignSystem this->design_dut_inst = dut_inst; - dut_inst->mult_inter_rad_recvd(mult_inter_rad_recvd_sig); } mult_system::~mult_system() { diff --git a/rad-sim/example-designs/mult/mult_system.hpp b/rad-sim/example-designs/mult/mult_system.hpp index 483eebc..f3026b3 100644 --- a/rad-sim/example-designs/mult/mult_system.hpp +++ b/rad-sim/example-designs/mult/mult_system.hpp @@ -14,7 +14,6 @@ class mult_system : public RADSimDesignSystem { sc_signal client_ready_sig; sc_signal> response_sig; sc_signal response_valid_sig; - sc_signal mult_inter_rad_recvd_sig; public: sc_signal rst_sig; diff --git a/rad-sim/example-designs/mult/mult_top.cpp b/rad-sim/example-designs/mult/mult_top.cpp index cbd946c..9115d07 100644 --- a/rad-sim/example-designs/mult/mult_top.cpp +++ b/rad-sim/example-designs/mult/mult_top.cpp @@ -1,7 +1,9 @@ #include mult_top::mult_top(const sc_module_name &name, RADSimDesignContext* radsim_design) - : sc_module(name) { + : RADSimDesignTop(radsim_design) { + + this->radsim_design = radsim_design; std::string module_name_str; char module_name[25]; @@ -9,7 +11,7 @@ mult_top::mult_top(const sc_module_name &name, RADSimDesignContext* radsim_desig module_name_str = "client_inst"; std::strcpy(module_name, module_name_str.c_str()); - client_inst = new client_mult(module_name, 16, radsim_design); //AKB added last arg + client_inst = new client(module_name, radsim_design); client_inst->rst(rst); client_inst->client_tdata(client_tdata); client_inst->client_tlast(client_tlast); @@ -22,18 +24,8 @@ mult_top::mult_top(const sc_module_name &name, RADSimDesignContext* radsim_desig mult_inst->rst(rst); mult_inst->response(response); mult_inst->response_valid(response_valid); - mult_inst->mult_inter_rad_recvd(this->mult_inter_rad_recvd); - - //AKB: added code block for portal module - module_name_str = "portal_inst"; - std::strcpy(module_name, module_name_str.c_str()); - portal_inst = new portal_mult(module_name, radsim_design); - portal_inst->rst(rst); - - //connect master to master instead, to expose to top - portal_inst->portal_axis_master.ConnectToPort(this->design_top_portal_axis_master); - portal_inst->portal_axis_slave.ConnectToPort(this->design_top_portal_axis_slave); + this->connectPortalReset(&rst); radsim_design->BuildDesignContext("mult.place", "mult.clks"); radsim_design->CreateSystemNoCs(rst); radsim_design->ConnectModulesToNoC(); diff --git a/rad-sim/example-designs/mult/mult_top.hpp b/rad-sim/example-designs/mult/mult_top.hpp index b2f9ec8..8d07678 100644 --- a/rad-sim/example-designs/mult/mult_top.hpp +++ b/rad-sim/example-designs/mult/mult_top.hpp @@ -2,8 +2,7 @@ #include #include -#include -#include +#include #include #include #include @@ -12,8 +11,8 @@ class mult_top : public RADSimDesignTop { private: mult *mult_inst; - client_mult *client_inst; - portal_mult *portal_inst; + client *client_inst; + RADSimDesignContext* radsim_design; public: sc_in rst; @@ -24,7 +23,6 @@ class mult_top : public RADSimDesignTop { sc_out client_ready; sc_out> response; sc_out response_valid; - sc_out mult_inter_rad_recvd; mult_top(const sc_module_name &name, RADSimDesignContext* radsim_design); ~mult_top(); From f28841ce6334f88c29d81bfa33deab178d263e69 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 23 Oct 2024 02:33:27 -0400 Subject: [PATCH 117/127] Created separate two rad dlrm design dir --- .../example-designs/dlrm_two_rad/.gitignore | 9 + .../dlrm_two_rad/CMakeLists.txt | 54 ++ .../dlrm_two_rad/compiler/ab_large.csv | 99 ++ .../dlrm_two_rad/compiler/ab_small.csv | 48 + .../dlrm_two_rad/compiler/dlrm.py | 844 ++++++++++++++++++ .../dlrm_two_rad/compiler/plot.py | 131 +++ .../dlrm_two_rad/compiler/report.csv | 297 ++++++ .../dlrm_two_rad/compiler/run_tests.py | 127 +++ .../dlrm_two_rad/compiler/run_tests.sh | 52 ++ .../example-designs/dlrm_two_rad/config.yml | 63 ++ .../example-designs/dlrm_two_rad/dlrm.clks | 16 + .../example-designs/dlrm_two_rad/dlrm.place | 68 ++ .../dlrm_two_rad/dlrm_driver.cpp | 227 +++++ .../dlrm_two_rad/dlrm_driver.hpp | 47 + .../dlrm_two_rad/dlrm_system.cpp | 42 + .../dlrm_two_rad/dlrm_system.hpp | 30 + .../example-designs/dlrm_two_rad/dlrm_top.cpp | 156 ++++ .../example-designs/dlrm_two_rad/dlrm_top.hpp | 44 + .../dlrm_two_rad/modules/afifo.cpp | 103 +++ .../dlrm_two_rad/modules/afifo.hpp | 38 + .../dlrm_two_rad/modules/collector.cpp | 65 ++ .../dlrm_two_rad/modules/collector.hpp | 36 + .../modules/custom_feature_interaction.cpp | 314 +++++++ .../modules/custom_feature_interaction.hpp | 77 ++ .../dlrm_two_rad/modules/dlrm_defines.hpp | 9 + .../dlrm_two_rad/modules/embedding_lookup.cpp | 203 +++++ .../dlrm_two_rad/modules/embedding_lookup.hpp | 51 ++ .../modules/feature_interaction.cpp | 360 ++++++++ .../modules/feature_interaction.hpp | 79 ++ .../dlrm_two_rad/modules/fifo.cpp | 86 ++ .../dlrm_two_rad/modules/fifo.hpp | 42 + .../dlrm_two_rad/modules/instructions.cpp | 63 ++ .../dlrm_two_rad/modules/instructions.hpp | 25 + .../dlrm_two_rad/modules/mvm.cpp | 612 +++++++++++++ .../dlrm_two_rad/modules/mvm.hpp | 91 ++ .../dlrm_two_rad/modules/register_file.cpp | 103 +++ .../dlrm_two_rad/modules/register_file.hpp | 71 ++ .../dlrm_two_rad/modules/sim_utils.cpp | 271 ++++++ .../dlrm_two_rad/modules/sim_utils.hpp | 108 +++ .../example-designs/dlrm_two_rad/sim_trace | 3 + 40 files changed, 5164 insertions(+) create mode 100644 rad-sim/example-designs/dlrm_two_rad/.gitignore create mode 100644 rad-sim/example-designs/dlrm_two_rad/CMakeLists.txt create mode 100644 rad-sim/example-designs/dlrm_two_rad/compiler/ab_large.csv create mode 100644 rad-sim/example-designs/dlrm_two_rad/compiler/ab_small.csv create mode 100644 rad-sim/example-designs/dlrm_two_rad/compiler/dlrm.py create mode 100644 rad-sim/example-designs/dlrm_two_rad/compiler/plot.py create mode 100644 rad-sim/example-designs/dlrm_two_rad/compiler/report.csv create mode 100644 rad-sim/example-designs/dlrm_two_rad/compiler/run_tests.py create mode 100755 rad-sim/example-designs/dlrm_two_rad/compiler/run_tests.sh create mode 100644 rad-sim/example-designs/dlrm_two_rad/config.yml create mode 100644 rad-sim/example-designs/dlrm_two_rad/dlrm.clks create mode 100644 rad-sim/example-designs/dlrm_two_rad/dlrm.place create mode 100644 rad-sim/example-designs/dlrm_two_rad/dlrm_driver.cpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/dlrm_driver.hpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/dlrm_system.cpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/dlrm_system.hpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/dlrm_top.cpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/dlrm_top.hpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/afifo.cpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/afifo.hpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/collector.cpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/collector.hpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/custom_feature_interaction.cpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/custom_feature_interaction.hpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/dlrm_defines.hpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/embedding_lookup.cpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/embedding_lookup.hpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/feature_interaction.cpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/feature_interaction.hpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/fifo.cpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/fifo.hpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/instructions.cpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/instructions.hpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/mvm.cpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/mvm.hpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/register_file.cpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/register_file.hpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/sim_utils.cpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/modules/sim_utils.hpp create mode 100644 rad-sim/example-designs/dlrm_two_rad/sim_trace diff --git a/rad-sim/example-designs/dlrm_two_rad/.gitignore b/rad-sim/example-designs/dlrm_two_rad/.gitignore new file mode 100644 index 0000000..5dfc5be --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/.gitignore @@ -0,0 +1,9 @@ +CMakeFiles/ +Makefile +*.log +compiler/embedding_tables/ +compiler/instructions/ +compiler/mvm_weights/ +compiler/*.out +compiler/*.in +compiler/mvms.config \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/CMakeLists.txt b/rad-sim/example-designs/dlrm_two_rad/CMakeLists.txt new file mode 100644 index 0000000..0416e1e --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/CMakeLists.txt @@ -0,0 +1,54 @@ +cmake_minimum_required(VERSION 3.16) +find_package(SystemCLanguage CONFIG REQUIRED) + +include_directories( + ./ + modules + ../../sim + ../../sim/noc + ../../sim/noc/booksim + ../../sim/noc/booksim/networks + ../../sim/noc/booksim/routers + ../../sim/dram + ../../sim/dram/DRAMsim3 + ../../sim/dram/DRAMsim3/src + ../../sim/dram/DRAMsim3/ext/headers +) + +set(srcfiles + modules/embedding_lookup.cpp + modules/feature_interaction.cpp + modules/custom_feature_interaction.cpp + modules/sim_utils.cpp + modules/afifo.cpp + modules/register_file.cpp + modules/mvm.cpp + modules/fifo.cpp + modules/instructions.cpp + modules/collector.cpp + dlrm_top.cpp + dlrm_driver.cpp + dlrm_system.cpp +) + +set(hdrfiles + modules/embedding_lookup.hpp + modules/feature_interaction.hpp + modules/custom_feature_interaction.hpp + modules/sim_utils.hpp + modules/afifo.hpp + modules/register_file.hpp + modules/mvm.hpp + modules/fifo.hpp + modules/instructions.hpp + modules/collector.hpp + modules/dlrm_defines.hpp + dlrm_top.hpp + dlrm_driver.hpp + dlrm_system.hpp +) + +add_compile_options(-Wall -Wextra -pedantic) + +add_library(dlrm STATIC ${srcfiles} ${hdrfiles}) +target_link_libraries(dlrm PUBLIC SystemC::systemc booksim noc dram) diff --git a/rad-sim/example-designs/dlrm_two_rad/compiler/ab_large.csv b/rad-sim/example-designs/dlrm_two_rad/compiler/ab_large.csv new file mode 100644 index 0000000..59a47d5 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/compiler/ab_large.csv @@ -0,0 +1,99 @@ +# Vector Elements,Table Entries +4,500 +4,500 +4,1000 +4,1000 +4,1000 +4,1000 +8,1000 +8,1000 +8,1000 +8,1000 +8,1000 +8,5000 +8,5000 +8,5000 +8,5000 +8,5000 +8,5000 +8,5000 +8,5000 +8,5000 +8,5000 +8,5000 +8,5000 +8,5000 +8,5000 +8,15000 +8,15000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,50000 +8,100000 +8,100000 +8,150000 +8,150000 +16,500000 +16,500000 +16,500000 +16,500000 +16,500000 +16,500000 +16,500000 +16,500000 +16,500000 +16,500000 +16,500000 +16,500000 +16,500000 +16,500000 +16,500000 +16,500000 +16,1000000 +16,1000000 +16,5000000 +32,10000000 +32,100000000 +4,100 +4,100 +4,100 +4,100 +4,100 +4,100 +4,100 +4,100 +4,100 +4,100 +4,100 +4,100 +4,500 +4,500 +4,500 +4,500 \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/compiler/ab_small.csv b/rad-sim/example-designs/dlrm_two_rad/compiler/ab_small.csv new file mode 100644 index 0000000..c995b61 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/compiler/ab_small.csv @@ -0,0 +1,48 @@ +# Vector Elements, Table Entries +4,100 +4,100 +4,100 +4,100 +4,500 +4,500 +4,1000 +4,1000 +4,1000 +4,1000 +4,1000 +4,1000 +4,1000 +4,1000 +4,1000 +4,1000 +8,3000 +8,10000 +8,10000 +8,10000 +8,10000 +8,10000 +8,10000 +8,10000 +8,10000 +8,10000 +8,10000 +8,10000 +8,10000 +8,10000 +8,10000 +8,10000 +8,20000 +8,30000 +8,100000 +8,100000 +8,100000 +8,100000 +8,100000 +8,100000 +8,100000 +8,100000 +8,100000 +8,100000 +16,500000 +16,1000000 +32,10000000 \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/compiler/dlrm.py b/rad-sim/example-designs/dlrm_two_rad/compiler/dlrm.py new file mode 100644 index 0000000..dfeeb12 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/compiler/dlrm.py @@ -0,0 +1,844 @@ +import math +import random +import os +import glob +import numpy as np +import sys + +# Input parameters +model_csv = "ab_small.csv" +read_bytewidth = 64 +element_bytewidth = 2 +hbm_channels = 16 +hbm_channel_words = 1 * 1024 * 1024 * 1024 / read_bytewidth +ddr_channels = 2 +ddr_channel_words = 8 * 1024 * 1024 * 1024 / read_bytewidth +num_test_inputs = 256 + +# MLP parameters +native_dim = 32 # int(read_bytewidth / element_bytewidth) +num_layers = 3 +hidden_dims = [1024, 512, 256] +num_mvms = [4, 2, 2] +hard_mvms = False + +# Model parsing +table_info = [] +smallest_table_bytewidth = 8 +input_dim = 0 + +# Memory allocation +hbm_channels_used_words = np.zeros(hbm_channels, dtype=int) +hbm_channels_rounds = np.zeros(hbm_channels, dtype=int) +ddr_channels_used_words = np.zeros(ddr_channels, dtype=int) +ddr_channels_rounds = np.zeros(ddr_channels, dtype=int) +tables_per_ddr_channel = {} +tables_per_hbm_channel = {} +base_addr_per_ddr_channel = {} +base_addr_per_hbm_channel = {} + +# Testing +test_input_data = [] +test_input_base_addr = [] +test_input_target_ch = [] +test_feature_interaction_outputs = [] +test_golden_outputs = [] +mem_contents_per_channel = [{} for channel in range(ddr_channels + hbm_channels)] + +tobin = lambda x, count=8: "".join( + map(lambda y: str((x >> y) & 1), range(count - 1, -1, -1)) +) + + +def get_table_id(table): + return table[0] + + +def get_table_vector_length(table): + return table[1] + + +def get_table_vector_length_by_id(all_tables, id): + for table in all_tables: + if get_table_id(table) == id: + return get_table_vector_length(table) + return -1 + + +def get_table_entries(table): + return table[2] + + +def get_table_entries_by_id(all_tables, id): + for table in all_tables: + if get_table_id(table) == id: + return get_table_entries(table) + return -1 + + +def get_table_words(table): + return table[3] + + +def get_table_channel_type(table): + if len(table) < 5: + return -1 + return table[4] + + +def get_table_channel_id(table): + if len(table) < 5: + return -1 + return table[5] + + +def parse_dlrm_description(filename): + global smallest_table_bytewidth + global input_dim + f = open(filename, "r") + lines = f.readlines() + id = 0 + for line in lines: + if line[0] == "#": + continue + line_split = line.split(",") + line_split = [eval(i) for i in line_split] + input_dim += line_split[0] + if line_split[0] * element_bytewidth < smallest_table_bytewidth: + smallest_table_bytewidth = line_split[0] * element_bytewidth + words_per_entry = int(math.ceil(1.0 * line_split[0] / read_bytewidth)) + line_split.append(words_per_entry * line_split[1]) + line_split.insert(0, id) + id = id + 1 + table_info.append(line_split) + f.close() + + +def sort_tables(): + table_info.sort(key=lambda x: x[3], reverse=True) + + +def greedy_allocation(): + round_id = 1 + for table in table_info: + allocated = False + while not (allocated): + for ch in range(ddr_channels): + rem_words = ddr_channel_words - ddr_channels_used_words[ch] + if (ddr_channels_rounds[ch] < round_id) and ( + rem_words >= get_table_words(table) + ): + if ch in tables_per_ddr_channel: + tables_per_ddr_channel[ch].append(get_table_id(table)) + base_addr_per_ddr_channel[ch].append( + ddr_channels_used_words[ch] + ) + else: + tables_per_ddr_channel[ch] = [get_table_id(table)] + base_addr_per_ddr_channel[ch] = [ddr_channels_used_words[ch]] + ddr_channels_used_words[ch] += get_table_words(table) + ddr_channels_rounds[ch] += 1 + allocated = True + table.append(1) + table.append(ch) + + break + + if not (allocated): + for ch in range(hbm_channels): + rem_words = hbm_channel_words - hbm_channels_used_words[ch] + if (hbm_channels_rounds[ch] < round_id) and ( + rem_words >= get_table_words(table) + ): + if ch in tables_per_hbm_channel: + tables_per_hbm_channel[ch].append(get_table_id(table)) + base_addr_per_hbm_channel[ch].append( + hbm_channels_used_words[ch] + ) + else: + tables_per_hbm_channel[ch] = [get_table_id(table)] + base_addr_per_hbm_channel[ch] = [ + hbm_channels_used_words[ch] + ] + hbm_channels_used_words[ch] += get_table_words(table) + hbm_channels_rounds[ch] += 1 + allocated = True + table.append(0) + table.append(ch) + break + + if not (allocated): + round_id += 1 + + +def print_dlrm_description(): + print("Embedding Tables (sorted):") + print("+----+----+-----------+") + print("| # | V | Entries |") + print("|----|----|-----------|") + for row in table_info: + print("| {:>2} | {:>2} | {:>9} |".format(*row)) + print("+----+----+-----------+") + + +def print_allocation(): + ddr_total_mb = 0 + hbm_total_mb = 0 + print("\nDDR Channel Allocations:") + ddr_table = [ddr_channels_rounds, ddr_channels_used_words] + ddr_table = np.transpose(ddr_table).tolist() + print("+----+-----------+--------+----------+") + print("| R | Mem Words | % | Size(MB) |") + print("|----|-----------|--------|----------|") + for row in ddr_table: + row.append(1.0 * row[1] / ddr_channel_words * 100) + size_mb = 1.0 * row[1] * read_bytewidth / 1024 / 1024 + ddr_total_mb += size_mb + row.append(size_mb) + print("| {:>2} | {:>9} | {:5.2f}% | {:8.2f} |".format(*row)) + print("+----+-----------+--------+----------+") + print("\nHBM Channel Allocations:") + hbm_table = [hbm_channels_rounds, hbm_channels_used_words] + hbm_table = np.transpose(hbm_table).tolist() + print("+----+-----------+--------+----------+") + print("| R | Mem Words | % | Size(MB) |") + print("|----|-----------|--------|----------|") + for row in hbm_table: + row.append(1.0 * row[1] / hbm_channel_words * 100) + size_mb = 1.0 * row[1] * read_bytewidth / 1024 / 1024 + hbm_total_mb += size_mb + row.append(size_mb) + print("| {:>2} | {:>9} | {:5.2f}% | {:8.2f} |".format(*row)) + print("+----+-----------+--------+----------+") + print("Total DDR memory footprint = {:.2f} MB".format(ddr_total_mb)) + print("Total HBM memory footprint = {:.2f} MB".format(hbm_total_mb)) + print("Total memory footprint = {:.2f} MB".format(ddr_total_mb + hbm_total_mb)) + print("\n") + print("DDR Tables per channel:") + for ch in tables_per_ddr_channel: + print("{:>2} : ".format(ch), end="") + for i in range(len(tables_per_ddr_channel[ch])): + print( + "{:>3} ({:>9}) ({:>2})".format( + tables_per_ddr_channel[ch][i], + base_addr_per_ddr_channel[ch][i], + int( + get_table_vector_length_by_id( + table_info, tables_per_ddr_channel[ch][i] + ) + * element_bytewidth + / smallest_table_bytewidth + ), + ), + end="", + ) + print("") + print("\n") + print("HBM Tables per channel:") + for ch in tables_per_hbm_channel: + print("{:>2} : ".format(ch), end="") + for i in range(len(tables_per_hbm_channel[ch])): + print( + "{:>3} ({:>9}) ({:>2})".format( + tables_per_hbm_channel[ch][i], + base_addr_per_hbm_channel[ch][i], + int( + get_table_vector_length_by_id( + table_info, tables_per_hbm_channel[ch][i] + ) + * element_bytewidth + / smallest_table_bytewidth + ), + ), + end="", + ) + print("") + print("\n") + + +def generate_embedding_lookup_inputs(num_inputs): + f = open("embedding_indecies.in", "w") + f.write(str(len(table_info)) + " " + str(num_inputs) + "\n") + for i in range(num_inputs): + input_vec = [] + target_ch = [] + base_addr = [] + round_id = 0 + done = False + table_count = 0 + while not (done): + for ch in tables_per_ddr_channel: + if round_id < len(tables_per_ddr_channel[ch]): + table_id = tables_per_ddr_channel[ch][round_id] + limit = int(get_table_entries_by_id(table_info, table_id) / 2) + input_vec.append(random.randint(0, limit) * read_bytewidth) + target_ch.append(ch) + base_addr.append( + base_addr_per_ddr_channel[ch][round_id] * read_bytewidth + ) + vector_length = get_table_vector_length_by_id(table_info, table_id) + mem_addr = base_addr[-1] + input_vec[-1] + mem_contents_per_channel[ch][mem_addr] = [ + random.randint(-2, 2) for i in range(vector_length) + ] + table_count += 1 + for ch in tables_per_hbm_channel: + if round_id < len(tables_per_hbm_channel[ch]): + table_id = tables_per_hbm_channel[ch][round_id] + limit = int(get_table_entries_by_id(table_info, table_id) / 2) + input_vec.append(random.randint(0, limit) * read_bytewidth) + target_ch.append(ddr_channels + ch) + base_addr.append( + base_addr_per_hbm_channel[ch][round_id] * read_bytewidth + ) + vector_length = get_table_vector_length_by_id(table_info, table_id) + mem_addr = base_addr[-1] + input_vec[-1] + mem_contents_per_channel[ddr_channels + ch][mem_addr] = [ + random.randint(-2, 2) for i in range(vector_length) + ] + table_count += 1 + round_id += 1 + done = table_count == len(table_info) + test_input_data.append(input_vec) + test_input_base_addr.append(base_addr) + test_input_target_ch.append(target_ch) + for j in input_vec: + f.write(str(j) + " ") + f.write("\n") + for j in target_ch: + f.write(str(j) + " ") + f.write("\n") + for j in base_addr: + f.write(str(j) + " ") + f.write("\n") + f.close() + + +def generate_mem_channel_contents(): + # Prepare instruction MIFs directory + if not (os.path.exists("./embedding_tables")): + os.mkdir("embedding_tables") + else: + files = glob.glob("embedding_tables/*.dat") + for file in files: + os.remove(file) + + for c in range(ddr_channels + hbm_channels): + f = open("embedding_tables/channel_" + str(c) + ".dat", "w") + for addr in mem_contents_per_channel[c]: + content = mem_contents_per_channel[c][addr] + string_content = "" + byte_count = 0 + for e in content: + string_content = tobin(e, element_bytewidth * 8) + string_content + byte_count += element_bytewidth + for i in range(read_bytewidth - byte_count): + string_content = tobin(0, element_bytewidth * 8) + string_content + f.write(str(addr) + " " + string_content + "\n") + f.close() + + +def pop_one_hot(fifo_ids): + one_hot = "" + for i in range(ddr_channels + hbm_channels): + one_hot += "0" + for id in fifo_ids: + one_hot = one_hot[:id] + "1" + one_hot[id + 1 :] + return one_hot + + +def generate_feature_interaction_instructions(): + if not (os.path.exists("./instructions")): + os.mkdir("instructions") + else: + files = glob.glob("instructions/*.inst") + for file in files: + os.remove(file) + + global smallest_table_bytewidth + f = open("instructions/feature_interaction.inst", "w") + round_id = 0 + table_count = 0 + total_flush_count = 0 + flush_counters = np.zeros(ddr_channels + hbm_channels, dtype=int) + total_pushed_bytes = 0 + while table_count < len(table_info): + for c in tables_per_ddr_channel: + if round_id < len(tables_per_ddr_channel[c]): + vector_length = get_table_vector_length_by_id( + table_info, tables_per_ddr_channel[c][round_id] + ) + num_pops = int( + vector_length * element_bytewidth / smallest_table_bytewidth + ) + total_pushed_bytes += vector_length * element_bytewidth + for p in range(num_pops): + fifo_ids = [c] + for fc in range(len(flush_counters)): + if flush_counters[fc] != 0: + fifo_ids.append(fc) + flush_counters[fc] -= 1 + total_flush_count -= 1 + f.write(str(c + 1) + " " + pop_one_hot(fifo_ids) + "\n") + num_flushes = (read_bytewidth / smallest_table_bytewidth) - num_pops + total_flush_count += num_flushes + flush_counters[c] += num_flushes + table_count += 1 + + for ch in tables_per_hbm_channel: + c = ch + ddr_channels + if round_id < len(tables_per_hbm_channel[ch]): + vector_length = get_table_vector_length_by_id( + table_info, tables_per_hbm_channel[ch][round_id] + ) + num_pops = int( + vector_length * element_bytewidth / smallest_table_bytewidth + ) + total_pushed_bytes += vector_length * element_bytewidth + for p in range(num_pops): + fifo_ids = [c] + for fc in range(len(flush_counters)): + if flush_counters[fc] != 0: + fifo_ids.append(fc) + flush_counters[fc] -= 1 + total_flush_count -= 1 + f.write(str(c + 1) + " " + pop_one_hot(fifo_ids) + "\n") + num_flushes = (read_bytewidth / smallest_table_bytewidth) - num_pops + total_flush_count += num_flushes + flush_counters[c] += num_flushes + table_count += 1 + + round_id += 1 + + padded_input_dim = math.ceil(input_dim / native_dim / num_mvms[0]) + padded_input_dim = int(padded_input_dim * native_dim * num_mvms[0]) + total_vector_bytewidth = padded_input_dim * element_bytewidth + remaining_bytes = total_vector_bytewidth - total_pushed_bytes + assert remaining_bytes % smallest_table_bytewidth == 0 + padding_words = int(remaining_bytes / smallest_table_bytewidth) + while total_flush_count > 0: + fifo_ids = [] + for fc in range(len(flush_counters)): + if flush_counters[fc] != 0: + fifo_ids.append(fc) + flush_counters[fc] -= 1 + total_flush_count -= 1 + if padding_words > 0: + f.write( + str(ddr_channels + hbm_channels + 1) + + " " + + pop_one_hot(fifo_ids) + + "\n" + ) + padding_words -= 1 + else: + f.write("0 " + pop_one_hot(fifo_ids) + "\n") + + while padding_words > 0: + f.write(str(ddr_channels + hbm_channels + 1) + " " + pop_one_hot([]) + "\n") + padding_words -= 1 + + f.close() + + +def generate_custom_feature_interaction_instructions(): + global smallest_table_bytewidth + round_id = 0 + table_count = 0 + running_byte_count = 0 + total_pushed_bytes = 0 + schedule = [] + schedule_step = [] + while table_count < len(table_info): + for ch in tables_per_ddr_channel: + if round_id < len(tables_per_ddr_channel[ch]): + vector_length = get_table_vector_length_by_id(table_info, tables_per_ddr_channel[ch][round_id]) + running_byte_count += vector_length * element_bytewidth + if (vector_length > native_dim): + for i in range(int(vector_length/native_dim)): + schedule_step.append(ch + 1) + schedule_step.append(i * native_dim) + schedule_step.append((i+1) * native_dim - 1) + if (i == int(vector_length/native_dim) - 1): + schedule_step.append(1) + schedule.append(schedule_step) + schedule_step = [] + running_byte_count = 0 + else: + schedule_step.append(0) + schedule.append(schedule_step) + schedule_step = [] + else: + schedule_step.append(ch + 1) + schedule_step.append(0) + schedule_step.append(vector_length-1) + schedule_step.append(1) + if (running_byte_count == native_dim * element_bytewidth): + schedule.append(schedule_step) + running_byte_count = 0 + schedule_step = [] + table_count += 1 + total_pushed_bytes += (vector_length * element_bytewidth) + + for c in tables_per_hbm_channel: + ch = ddr_channels + c + if round_id < len(tables_per_hbm_channel[c]): + vector_length = get_table_vector_length_by_id(table_info, tables_per_hbm_channel[c][round_id]) + running_byte_count += vector_length * element_bytewidth + if (vector_length > native_dim): + for i in range(int(vector_length/native_dim)): + schedule_step.append(ch + 1) + schedule_step.append(i * native_dim) + schedule_step.append((i+1) * native_dim - 1) + schedule_step.append(int(i == int(vector_length/native_dim))) + if (i == int(vector_length/native_dim) - 1): + schedule_step.append(1) + schedule.append(schedule_step) + schedule_step = [] + running_byte_count = 0 + else: + schedule_step.append(0) + schedule.append(schedule_step) + schedule_step = [] + else: + schedule_step.append(ch + 1) + schedule_step.append(0) + schedule_step.append(vector_length-1) + schedule_step.append(1) + if (running_byte_count == native_dim * element_bytewidth): + schedule.append(schedule_step) + running_byte_count = 0 + schedule_step = [] + table_count += 1 + total_pushed_bytes += (vector_length * element_bytewidth) + + round_id += 1 + + if running_byte_count > 0 and running_byte_count < native_dim * element_bytewidth: + remaining_bytes = (native_dim * element_bytewidth) - running_byte_count + schedule_step.append(0) + schedule_step.append(0) + schedule_step.append(int(remaining_bytes / element_bytewidth)-1) + schedule_step.append(0) + running_byte_count = 0 + schedule.append(schedule_step) + schedule_step = [] + total_pushed_bytes += remaining_bytes + + padded_input_dim = math.ceil(input_dim / native_dim / num_mvms[0]) + padded_input_dim = int(padded_input_dim * native_dim * num_mvms[0]) + total_vector_bytewidth = padded_input_dim * element_bytewidth + remaining_bytes = total_vector_bytewidth - total_pushed_bytes + assert remaining_bytes % read_bytewidth == 0 + padding_words = int(remaining_bytes / native_dim / element_bytewidth) + for i in range(padding_words): + schedule_step.append(0) + schedule_step.append(0) + schedule_step.append(native_dim-1) + schedule_step.append(0) + schedule.append(schedule_step) + schedule_step = [] + + if not (os.path.exists("./instructions")): + os.mkdir("instructions") + else: + files = glob.glob("instructions/*.inst") + for file in files: + os.remove(file) + f = open("instructions/feature_interaction.inst", "w") + for step in schedule: + for s in step: + f.write(str(s) + " ") + f.write("\n") + f.close() + #idx = 0 + #for s in schedule: + # print(str(idx) + ": " + str(s)) + # idx += 1 + +def generate_feature_interaction_outputs(): + f = open("feature_interaction.out", "w") + feature_interaction_vector_length = 0 + for table in table_info: + feature_interaction_vector_length += get_table_vector_length(table) + total_num_outputs = len(test_input_data) * int( + feature_interaction_vector_length * element_bytewidth / read_bytewidth + ) + f.write(str(total_num_outputs) + "\n") + for input_id in range(len(test_input_data)): + output_vec = [] + for idx_id in range(len(test_input_data[input_id])): + idx = test_input_data[input_id][idx_id] + base = test_input_base_addr[input_id][idx_id] + ch = test_input_target_ch[input_id][idx_id] + mem_content = mem_contents_per_channel[ch][base + idx] + for e in mem_content: + output_vec.append(e) + reshaped_output_vec = np.reshape( + output_vec, + ( + int(len(output_vec) / int((read_bytewidth / element_bytewidth))), + int(read_bytewidth / element_bytewidth), + ), + ) + for o in reshaped_output_vec: + for e in o: + f.write(str(e) + " ") + f.write("\n") + test_feature_interaction_outputs.append(output_vec) + f.close() + + +def generate_mlp_weights(): + # Generate random padded weight matrices + padded_weights = [] + for l in range(num_layers): + num_mvms_in = num_mvms[l] + if l == num_layers - 1: + num_mvms_out = num_mvms[0] + else: + num_mvms_out = num_mvms[l + 1] + if l == 0: + layer_input_dim = input_dim + else: + layer_input_dim = hidden_dims[l - 1] + padded_dimx = int( + math.ceil(layer_input_dim * 1.0 / native_dim / num_mvms_in) + * native_dim + * num_mvms_in + ) + padded_dimy = int( + math.ceil(hidden_dims[l] * 1.0 / native_dim / num_mvms_out) + * native_dim + * num_mvms_out + ) + padded_weights.append(np.zeros(shape=(padded_dimy, padded_dimx), dtype=int)) + for i in range(hidden_dims[l]): + sample_indecies = random.sample( + range(layer_input_dim), int(0.1 * layer_input_dim) + ) + for idx in sample_indecies: + padded_weights[l][i, idx] = np.random.randint(-2, 2) + # padded_weights[l][: hidden_dims[l], :layer_input_dim] = np.random.randint( + # -2, 2, size=(hidden_dims[l], layer_input_dim) + # ) + + # Prepare weight MIFs directory + if not (os.path.exists("./mvm_weights")): + os.mkdir("mvm_weights") + else: + files = glob.glob("mvm_weights/*.dat") + for file in files: + os.remove(file) + + # Write weight MIFs + for l in range(num_layers): + layer_mvms = num_mvms[l] + mvm_idx = 0 + limx = int(padded_weights[l].shape[1] / native_dim) + limy = int(padded_weights[l].shape[0] / native_dim) + mifs = [] + for m in range(layer_mvms): + mifs.append([]) + for d in range(native_dim): + mifs[m].append( + open( + "mvm_weights/layer" + + str(l) + + "_mvm" + + str(m) + + "_dot" + + str(d) + + ".dat", + "w", + ) + ) + + for i in range(limx): + for j in range(limy): + for d in range(native_dim): + for e in range(native_dim): + mifs[mvm_idx][d].write( + str( + padded_weights[l][(j * native_dim) + d][ + (i * native_dim) + e + ] + ) + + " " + ) + mifs[mvm_idx][d].write("\n") + if mvm_idx == layer_mvms - 1: + mvm_idx = 0 + else: + mvm_idx = mvm_idx + 1 + + for mvm_mifs in mifs: + for mif in mvm_mifs: + mif.close() + return padded_weights + + +def generate_mvm_instructions(padded_weights): + # Generate instruction MIFs + # en, jump, reduce, accum, accum_en, release, raddr, last, dest_layer, dest_mvm + for l in range(num_layers): + layer_mvms = num_mvms[l] + limx = int(padded_weights[l].shape[1] / native_dim / layer_mvms) + limy = int(padded_weights[l].shape[0] / native_dim) + for m in range(layer_mvms): + inst_mif = open( + "instructions/layer" + str(l) + "_mvm" + str(m) + ".inst", "w" + ) + for i in range(limx): + for j in range(limy): + if (l == num_layers - 1) and (m == layer_mvms - 1): + dest_layer = 0 + dest_mvm = 0 + elif m == layer_mvms - 1: + dest_layer = l + 2 + dest_mvm = j % num_mvms[l + 1] + else: + dest_layer = l + 1 + dest_mvm = m + 1 + inst_mif.write("1 0 ") # en, jump + if m == 0 or i < limx - 1: + inst_mif.write("0 ") # reduce + else: + inst_mif.write("1 ") # reduce + if i == 0: + inst_mif.write(str(j) + " 0 ") # accum, accum_en + else: + inst_mif.write(str(j) + " 1 ") # accum, accum_en + if i == limx - 1: + inst_mif.write("1 ") # release + else: + inst_mif.write("0 ") # release + inst_mif.write(str(i * limy + j) + " ") # raddr + if j == limy - 1: + inst_mif.write("1 ") # last + else: + inst_mif.write("0 ") # last + inst_mif.write( + str(dest_layer) + " " + str(dest_mvm) + "\n" + ) # dest_layer, dest_mvm + inst_mif.write("1 1 0 0 0 0 0 0 0 0\n") + inst_mif.close() + + +def generate_mlp_outputs(padded_weights): + # Compute test outputs + padded_input_dim = int( + math.ceil(input_dim * 1.0 / native_dim / num_mvms[0]) * native_dim * num_mvms[0] + ) + padded_test_feature_interaction_outputs = np.zeros( + shape=(num_test_inputs, padded_input_dim), dtype=int + ) + padded_test_feature_interaction_outputs[ + :, :input_dim + ] = test_feature_interaction_outputs + test_inputs = np.transpose(padded_test_feature_interaction_outputs) + test_outputs = np.dot(padded_weights[0], test_inputs) + # test_outputs = np.maximum(test_outputs, np.zeros(shape=test_outputs.shape, dtype=int)) + for l in range(1, num_layers): + test_outputs = np.dot(padded_weights[l], test_outputs) + # test_outputs = np.maximum(test_outputs, np.zeros(shape=test_outputs.shape, dtype=int)) + test_outputs = np.transpose(test_outputs) + + # Generate test output MIFs + output_file = open("./mlp.out", "w") + output_file.write( + str(test_outputs.shape[0] * int(test_outputs.shape[1] / native_dim)) + "\n" + ) + for o in range(test_outputs.shape[0]): + for c in range(int(test_outputs.shape[1] / native_dim)): + for e in range(native_dim): + output_file.write(str(test_outputs[o][(c * native_dim) + e]) + " ") + output_file.write("\n") + output_file.close() + + +def generate_mvms_config(): + # Generate layer/MVM configuration + config_file = open("./mvms.config", "w") + config_file.write(str(num_layers) + " ") + for mvm_count in num_mvms: + config_file.write(str(mvm_count) + " ") + config_file.close() + + +def generate_dlrm_defines_hpp(): + dlrm_defines = open("../modules/dlrm_defines.hpp", "w") + dlrm_defines.write("#define BITWIDTH 16\n") + dlrm_defines.write("#define LANES " + str(native_dim) + "\n") + dlrm_defines.write("#define FIFO_SIZE 512\n") + dlrm_defines.write( + "#define COMPUTE_LATENCY " + str(int(math.log2(native_dim)) + 5) + "\n" + ) + if (native_dim == 16): + dlrm_defines.write("#define RF_MEM_DEPTH 1024\n") + else: + dlrm_defines.write("#define RF_MEM_DEPTH 512\n") + dlrm_defines.write("#define ACCUM_MEM_DEPTH 64\n") + dlrm_defines.write("#define INST_MEM_DEPTH 2048\n") + dlrm_defines.write("#define DOT_PRODUCTS LANES\n") + dlrm_defines.write("#define DATAW (BITWIDTH * LANES)\n") + dlrm_defines.close() + + +def generate_radsim_clocks_file(): + dlrm_clks = open("../dlrm.clks", "w") + dlrm_clks.write("embedding_lookup_inst 0 0\n") + dlrm_clks.write("feature_interaction_inst 0 0\n") + dlrm_clks.write("ext_mem_0 2 2\n") + dlrm_clks.write("ext_mem_1 2 2\n") + dlrm_clks.write("ext_mem_2 1 1\n") + dlrm_clks.write("ext_mem_3 1 1\n") + for l in range(len(num_mvms)): + for m in range(num_mvms[l]): + if hard_mvms: + dlrm_clks.write("layer" + str(l) + "_mvm" + str(m) + " 0 3\n") + else: + dlrm_clks.write("layer" + str(l) + "_mvm" + str(m) + " 0 0\n") + dlrm_clks.write("output_collector 0 0") + dlrm_clks.close() + + +if "-h" in sys.argv or "--help" in sys.argv: + print("python dlrm.py -l -n -m ") + exit(1) + +# Parse command line arguments +if "-n" in sys.argv: + if sys.argv.index("-n") + 1 >= len(sys.argv): + sys.exit(1) + num_test_inputs = int(sys.argv[sys.argv.index("-n") + 1]) + +if "-l" in sys.argv: + if sys.argv.index("-l") + 1 >= len(sys.argv): + sys.exit(1) + native_dim = int(sys.argv[sys.argv.index("-l") + 1]) + +if "-m" in sys.argv: + if sys.argv.index("-m") + 1 >= len(sys.argv): + sys.exit(1) + model_csv = sys.argv[sys.argv.index("-m") + 1] + +if "-a" in sys.argv: + hard_mvms = True + +parse_dlrm_description(model_csv) +sort_tables() +# print_dlrm_description() +greedy_allocation() +#print_allocation() +generate_embedding_lookup_inputs(num_test_inputs) +generate_mem_channel_contents() +#generate_feature_interaction_instructions() +generate_custom_feature_interaction_instructions() +generate_feature_interaction_outputs() +padded_weights = generate_mlp_weights() +generate_mvm_instructions(padded_weights) +generate_mlp_outputs(padded_weights) +generate_mvms_config() +generate_dlrm_defines_hpp() +#generate_radsim_clocks_file() \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/compiler/plot.py b/rad-sim/example-designs/dlrm_two_rad/compiler/plot.py new file mode 100644 index 0000000..333ea3c --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/compiler/plot.py @@ -0,0 +1,131 @@ +import plotly.express as px +import math +from plotly.subplots import make_subplots +import plotly.graph_objects as go +import plotly.io as pio +import numpy as np +from numpy import loadtxt +import sys + +pio.orca.config.use_xvfb = False + +num_traces = 14 + +root_dir = sys.argv[1] + +vspacing = 0.25 +vspacing_step = vspacing / 5.0 + +traces_names = [ + "Embed. LU Req", + "Mem0 Resp", + "Mem1 Resp", + "Mem2 Resp", + "Mem3 Resp", + "Feat. Inter. Out", + "MVM0", + "MVM1", + "MVM2", + "MVM3", + "MVM4", + "MVM5", + "MVM6", + "MVM7", +] +traces_color = [ + "#003f5c", + "#2f4b7c", + "#665191", + "#a05195", + "#d45087", + "#f95d6a", + "#ffa600", + "#ffa600", + "#ffa600", + "#ffa600", + "#ffa600", + "#ffa600", + "#ffa600", + "#ffa600", +] + +traces_x = [] +traces_y = [] +for i in range(num_traces): + traces_x.append([]) + traces_y.append([]) + +trace_count = 0 +max_val = 0 +with open(root_dir+"sim/sim.trace") as traces_file: + for line in traces_file: + # Extract integer values of a trace + trace = line.strip().split(" ") + if "" in trace: + trace.remove("") + trace = [int(i) for i in trace] + trace_height = vspacing * ((num_traces - trace_count + 1)) + + for i in trace: + # Append values to corresponding trace list + traces_x[trace_count].append(i) + traces_y[trace_count].append(trace_height) + if i > max_val: + max_val = i + + # Update trace counter + if trace_count == num_traces - 1: + trace_count = 0 + else: + trace_count = trace_count + 1 + +fig = go.Figure() + +for i in range(len(traces_x)): + fig.add_trace( + go.Scatter( + x=traces_x[i], + y=traces_y[i], + mode="markers", + marker_symbol="circle", + marker_color=traces_color[i], + marker_size=10, + ), + ) + +tick_vals = [] +tick_text = traces_names +for i in range(num_traces + 1): + tick_vals.append(vspacing * (i + 1)) +tick_vals.reverse() + +fig.update_xaxes(showline=True, linewidth=2, linecolor="black", mirror=True) +fig.update_xaxes(showgrid=True, gridcolor="rgb(211,211,211)") +fig.update_xaxes( + tickfont=dict(family="Arial", color="black", size=25), + title="Simulation Cycles", + titlefont=dict(family="Arial", color="black", size=25), +) +fig.update_xaxes(tick0=0, ticks="inside") +fig.update_yaxes(showline=True, linewidth=2, linecolor="black", mirror=True) +fig.update_yaxes( + tickmode="array", + tickvals=tick_vals, + ticktext=tick_text, + tickfont=dict(family="Arial", color="black", size=25), +) +fig.update_yaxes(showgrid=False) + +fig.update_layout(xaxis_range=[0, max_val + 10]) +#fig.update_layout(xaxis_range=[0, 5000 + 10]) +fig.update_layout(plot_bgcolor="white") +fig.update_layout(showlegend=False) + +fig.update_layout(height=num_traces * 55) + +filename = sys.argv[2] + +#fig.write_image(filename+".pdf") +fig.write_html(filename+".html") + +#fig.show() diff --git a/rad-sim/example-designs/dlrm_two_rad/compiler/report.csv b/rad-sim/example-designs/dlrm_two_rad/compiler/report.csv new file mode 100644 index 0000000..2ed52a7 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/compiler/report.csv @@ -0,0 +1,297 @@ +flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles +131, 8, 16, small, 1, 537 +131, 8, 16, small, 256, 54470 +131, 8, 16, large, 1, +131, 8, 16, large, 256, +131, 8, 32, small, 1, 279 +131, 8, 32, small, 256, 17573 +131, 8, 32, large, 1, 358 +131, 8, 32, large, 256, 34754 +131, 12, 16, small, 1, 537 +131, 12, 16, small, 256, 54470 +131, 12, 16, large, 1, +131, 12, 16, large, 256, +131, 12, 32, small, 1, 276 +131, 12, 32, small, 256, 17451 +131, 12, 32, large, 1, 351 +131, 12, 32, large, 256, 34828 +131, 16, 16, small, 1, 545 +131, 16, 16, small, 256, 54470 +131, 16, 16, large, 1, +131, 16, 16, large, 256, +131, 16, 32, small, 1, 275 +131, 16, 32, small, 256, 17499 +131, 16, 32, large, 1, 367 +131, 16, 32, large, 256, 34828 +195, 8, 16, small, 1, 531 +195, 8, 16, small, 256, 54463 +195, 8, 16, large, 1, +195, 8, 16, large, 256, +195, 8, 32, small, 1, 226 +195, 8, 32, small, 256, 15046 +195, 8, 32, large, 1, 293 +195, 8, 32, large, 256, 34647 +195, 12, 16, small, 1, 531 +195, 12, 16, small, 256, 54471 +195, 12, 16, large, 1, +195, 12, 16, large, 256, +195, 12, 32, small, 1, 216 +195, 12, 32, small, 256, 14997 +195, 12, 32, large, 1, 296 +195, 12, 32, large, 256, 34678 +195, 16, 16, small, 1, 539 +195, 16, 16, small, 256, 54474 +195, 16, 16, large, 1, +195, 16, 16, large, 256, +195, 16, 32, small, 1, 223 +195, 16, 32, small, 256, 14977 +195, 16, 32, large, 1, 299 +195, 16, 32, large, 256, 34650 +323, 8, 16, small, 1, 529 +323, 8, 16, small, 256, 54461 +323, 8, 16, large, 1, +323, 8, 16, large, 256, +323, 8, 32, small, 1, 239 +323, 8, 32, small, 256, 15010 +323, 8, 32, large, 1, 290 +323, 8, 32, large, 256, 34645 +323, 12, 16, small, 1, 537 +323, 12, 16, small, 256, 54469 +323, 12, 16, large, 1, +323, 12, 16, large, 256, +323, 12, 32, small, 1, 239 +323, 12, 32, small, 256, 15007 +323, 12, 32, large, 1, 290 +323, 12, 32, large, 256, 34645 +323, 16, 16, small, 1, 529 +323, 16, 16, small, 256, 54474 +323, 16, 16, large, 1, +323, 16, 16, large, 256, +323, 16, 32, small, 1, 218 +323, 16, 32, small, 256, 15023 +323, 16, 32, large, 1, 290 +323, 16, 32, large, 256, 34673 +flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles +131, 4, 16, small, 1, flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles +131, 8, 16, large, 1, +131, 8, 16, large, 256, +131, 12, 16, large, 1, flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles +131, 8, 16, large, 1, flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles +131, 8, 16, large, 1, +131, 8, 16, large, 256, flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles +131, 8, 16, large, 1, 760 +131, 8, 16, large, 256, 79399 +131, 12, 16, large, 1, 760 +131, 12, 16, large, 256, 79406 +131, 16, 16, large, 1, 809 +131, 16, 16, large, 256, 79461 +195, 8, 16, large, 1, 804 +195, 8, 16, large, 256, 79317 +195, 12, 16, large, 1, 752 +195, 12, 16, large, 256, 79315 +195, 16, 16, large, 1, 792 +195, 16, 16, large, 256, 79192 +323, 8, 16, large, 1, 749 +323, 8, 16, large, 256, 79313 +323, 12, 16, large, 1, 800 +323, 12, 16, large, 256, 79326 +323, 16, 16, large, 1, 777 +323, 16, 16, large, 256, 79227 +flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles +131, 8, 32, large, 1, 342 +131, 8, 32, large, 256, 22244 +131, 12, 32, large, 1, 332 +131, 12, 32, large, 256, 22236 +131, 16, 32, large, 1, 334 +131, 16, 32, large, 256, 22272 +195, 8, 32, large, 1, 286 +195, 8, 32, large, 256, 20263 +195, 12, 32, large, 1, 274 +195, 12, 32, large, 256, 20315 +195, 16, 32, large, 1, 274 +195, 16, 32, large, 256, 20348 +323, 8, 32, large, 1, 275 +323, 8, 32, large, 256, 20347 +323, 12, 32, large, 1, 304 +323, 12, 32, large, 256, 20227 +323, 16, 32, large, 1, 275 +323, 16, 32, large, 256, 20279 +flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles +131, 8, 16, large, 1, 787 +131, 8, 16, large, 256, 79270 +131, 8, 32, large, 1, 333 +131, 8, 32, large, 256, 22250 +131, 12, 16, large, 1, 810 +131, 12, 16, large, 256, 79393 +131, 12, 32, large, 1, 317 +131, 12, 32, large, 256, 22212 +131, 16, 16, large, 1, 760 +131, 16, 16, large, 256, 79483 +131, 16, 32, large, 1, 327 +131, 16, 32, large, 256, 22230 +195, 8, 16, large, 1, 802 +195, 8, 16, large, 256, 79476 +195, 8, 32, large, 1, 286 +195, 8, 32, large, 256, 20161 +195, 12, 16, large, 1, 792 +195, 12, 16, large, 256, 79510 +195, 12, 32, large, 1, 279 +195, 12, 32, large, 256, 20251 +195, 16, 16, large, 1, 792 +195, 16, 16, large, 256, 79212 +195, 16, 32, large, 1, 371 +195, 16, 32, large, 256, 20210 +323, 8, 16, large, 1, 750 +323, 8, 16, large, 256, 79233 +323, 8, 32, large, 1, 264 +323, 8, 32, large, 256, 20078 +323, 12, 16, large, 1, 800 +323, 12, 16, large, 256, 79329 +323, 12, 32, large, 1, 298 +323, 12, 32, large, 256, 20231 +323, 16, 16, large, 1, 749 +323, 16, 16, large, 256, 79452 +323, 16, 32, large, 1, 282 +323, 16, 32, large, 256, 20214 +flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles +131, 8, 16, small, 1, 545 +131, 8, 16, small, 256, 54470 +131, 8, 32, small, 1, 285 +131, 8, 32, small, 256, 17428 +131, 12, 16, small, 1, 545 +131, 12, 16, small, 256, 54470 +131, 12, 32, small, 1, 276 +131, 12, 32, small, 256, 17470 +131, 16, 16, small, 1, 537 +131, 16, 16, small, 256, 54478 +131, 16, 32, small, 1, 281 +131, 16, 32, small, 256, 17415 +195, 8, 16, small, 1, 539 +195, 8, 16, small, 256, 54463 +195, 8, 32, small, 1, 242 +195, 8, 32, small, 256, 15007 +195, 12, 16, small, 1, 539 +195, 12, 16, small, 256, 54471 +195, 12, 32, small, 1, 223 +195, 12, 32, small, 256, 15011 +195, 16, 16, small, 1, 539 +195, 16, 16, small, 256, 54471 +195, 16, 32, small, 1, 223 +195, 16, 32, small, 256, 14980 +323, 8, 16, small, 1, 539 +323, 8, 16, small, 256, 54461 +323, 8, 32, small, 1, 217 +323, 8, 32, small, 256, 15035 +323, 12, 16, small, 1, 539 +323, 12, 16, small, 256, 54469 +323, 12, 32, small, 1, 239 +323, 12, 32, small, 256, 15011 +323, 16, 16, small, 1, 529 +323, 16, 16, small, 256, 54461 +323, 16, 32, small, 1, 213 +323, 16, 32, small, 256, 15005 +flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles +131, 8, 64, small, 1, flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles +131, 8, 64, small, 1, flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles +195, 8, 64, small, 1, 236 +195, 8, 64, small, 256, 8798 +195, 16, 64, small, 1, 201 +195, 16, 64, small, 256, 8860 +323, 8, 64, small, 1, 170 +323, 8, 64, small, 256, 6164 +323, 16, 64, small, 1, 206 +323, 16, 64, small, 256, 6409 +flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles +195, 8, 64, large, 1, 241 +195, 8, 64, large, 256, 13805 +195, 12, 64, large, 1, 265 +195, 12, 64, large, 256, 13568 +195, 16, 64, large, 1, 206 +195, 16, 64, large, 256, 13864 +323, 8, 64, large, 1, 212 +323, 8, 64, large, 256, 13143 +323, 12, 64, large, 1, 215 +323, 12, 64, large, 256, 13907 +323, 16, 64, large, 1, 243 +323, 16, 64, large, 256, 13595 +flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles +195, 8, 64, large, 1, 246 +195, 8, 64, large, 256, 13044 +195, 12, 64, large, 1, 243 +195, 12, 64, large, 256, 13910 +195, 16, 64, large, 1, 217 +195, 16, 64, large, 256, 13962 +323, 8, 64, large, 1, 181 +323, 8, 64, large, 256, 14123 +323, 12, 64, large, 1, 185 +323, 12, 64, large, 256, 13545 +323, 16, 64, large, 1, 211 +323, 16, 64, large, 256, 13639 +flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles +131, 8, 64, large, 1, flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles +195, 8, 16, small, 1, 602 +195, 8, 16, small, 256, 79008 +195, 8, 16, large, 1, 804 +195, 8, 16, large, 256, 79510 +195, 8, 32, small, 1, 244 +195, 8, 32, small, 256, 19938 +195, 8, 32, large, 1, 288 +195, 8, 32, large, 256, 20210 +195, 8, 64, small, 1, 207 +195, 8, 64, small, 256, 8895 +195, 8, 64, large, 1, 278 +195, 8, 64, large, 256, 14391 +195, 16, 16, small, 1, 584 +195, 16, 16, small, 256, 79015 +195, 16, 16, large, 1, 804 +195, 16, 16, large, 256, 79368 +195, 16, 32, small, 1, 239 +195, 16, 32, small, 256, 19911 +195, 16, 32, large, 1, 274 +195, 16, 32, large, 256, 20308 +195, 16, 64, small, 1, 204 +195, 16, 64, small, 256, 9086 +195, 16, 64, large, 1, 211 +195, 16, 64, large, 256, 13955 +323, 8, 16, small, 1, 594 +323, 8, 16, small, 256, 79048 +323, 8, 16, large, 1, 801 +323, 8, 16, large, 256, 79190 +323, 8, 32, small, 1, 230 +323, 8, 32, small, 256, 19942 +323, 8, 32, large, 1, 284 +323, 8, 32, large, 256, 20301 +323, 8, 64, small, 1, 175 +323, 8, 64, small, 256, 6568 +323, 8, 64, large, 1, 242 +323, 8, 64, large, 256, 13545 +323, 16, 16, small, 1, 594 +323, 16, 16, small, 256, 79007 +323, 16, 16, large, 1, 801 +323, 16, 16, large, 256, 79394 +323, 16, 32, small, 1, 235 +323, 16, 32, small, 256, 19979 +323, 16, 32, large, 1, 278 +323, 16, 32, large, 256, 20143 +323, 16, 64, small, 1, 175 +323, 16, 64, small, 256, 6735 +323, 16, 64, large, 1, 214 +323, 16, 64, large, 256, 13290 +flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles +131, 8, 16, small, 1, 591 +131, 8, 16, small, 256, 79016 +131, 8, 16, large, 1, 787 +131, 8, 16, large, 256, 79268 +131, 8, 32, small, 1, 284 +131, 8, 32, small, 256, 20081 +131, 8, 32, large, 1, 360 +131, 8, 32, large, 256, 22256 +131, 16, 16, small, 1, 591 +131, 16, 16, small, 256, 79084 +131, 16, 16, large, 1, 809 +131, 16, 16, large, 256, 79483 +131, 16, 32, small, 1, 269 +131, 16, 32, small, 256, 20206 +131, 16, 32, large, 1, 333 +131, 16, 32, large, 256, 22210 +flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles diff --git a/rad-sim/example-designs/dlrm_two_rad/compiler/run_tests.py b/rad-sim/example-designs/dlrm_two_rad/compiler/run_tests.py new file mode 100644 index 0000000..b6d033e --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/compiler/run_tests.py @@ -0,0 +1,127 @@ +import sys +import os +import subprocess +import glob +import shutil + +models = ['small', 'large'] +flit_widths = [131] +vc_buffer_sizes = [8, 16] +mvm_configs = [16, 32] +num_inputs = [1, 256] + +root_dir = '/home/andrew/repos/rad-flow-dev/' + +report_file = open('report.csv', 'a') +report_file.write('flit_width, vc_buf_size, mvm_lanes, model, num_inputs, cycles\n') + +# Go to the RAD flow root directory +os.chdir(root_dir) + +for fw in flit_widths: + for vc in vc_buffer_sizes: + # For every variation of the flit width and buffer size + # change the rad-flow.config file and run config script + if (fw == 131): + pw = 82 + elif (fw == 195): + pw = 146 + else: + pw = 274 + + config_file = open(root_dir+'rad-flow.config', 'r') + lines = config_file.readlines() + config_file.close() + for i in range(len(lines)): + if 'noc_payload_width' in lines[i]: + lines[i] = 'noc_payload_width = ['+str(pw)+']\n' + elif 'noc_vc_buffer_size' in lines[i]: + lines[i] = 'noc_vc_buffer_size = ['+str(vc)+']\n' + config_file = open(root_dir+'rad-flow.config', 'w') + config_file.writelines(lines) + config_file.close() + os.chdir(root_dir+'scripts/') + subprocess.run(['python', 'config.py']) + + for mvm in mvm_configs: + for model in models: + for inputs in num_inputs: + name = 'fw' + str(fw) + '_vc' + str(vc) + '_mvm' + str(mvm) + \ + '_' + str(model) + '_' + str(inputs) + report_file.write(str(fw) + ', ' + + str(vc) + ', ' + + str(mvm) + ', ' + + str(model) + ', ' + + str(inputs) + ', ') + report_file.flush() + print(name) + + print('Creating reports directory ... ', end='', flush=True) + reports_path = root_dir + 'rad-sim/example-designs/dlrm/compiler/reports/' + name + if not os.path.exists(reports_path): + os.makedirs(reports_path) + print('Done') + + + # Run dlrm compiler script + print('Running DLRM compiler script ... ', end='', flush=True) + os.chdir(root_dir+'rad-sim/example-designs/dlrm/compiler/') + subprocess.run(['python', 'dlrm.py', + '-l', str(mvm), + '-n', str(inputs), + '-m', 'ab_'+model+'.csv']) + print('Done') + + # Build RAD-Sim + print('Building RAD-Sim ... ', end='', flush=True) + os.chdir(root_dir+'rad-sim/build/') + run_log = open(reports_path + '/radsim.log', 'w') + subprocess.run(['make'], stdout=run_log, stderr=run_log) + print('Done') + + # Run RAD-Sim + print('Running RAD-Sim ... ', end='', flush=True) + run_out = subprocess.run(['./sim/build/system'], + stdout=run_log, + stderr=run_log, timeout=300) + print('Done') + run_log.close() + + # Parse run log + read_run_log = open(reports_path + '/radsim.log', 'r') + lines = read_run_log.readlines() + flag = False + for line in lines: + if 'PASSED' in line: + print('Simulation Passed! ', end='') + flag = True + if 'Simulated' in line: + line = line.split() + cycles = line[1] + print(str(cycles) + ' cycles') + report_file.write(str(cycles) + '\n') + report_file.flush() + if not flag: + print('Something Wrong!') + report_file.write('\n') + report_file.flush() + read_run_log.close() + + + # Copy dramsim reports + print('Copying DRAMsim3 reports ... ', end='', flush=True) + files = glob.iglob(os.path.join(root_dir+'rad-sim/logs', '*.txt')) + for file in files: + if (os.path.isfile(file)): + shutil.copy2(file, reports_path + '/') + print('Done') + + # Plot and save as html + print('Ploting and saving trace ... ', end='', flush=True) + os.chdir(root_dir+'rad-sim/example-designs/dlrm/compiler/') + subprocess.run(['python', root_dir+'rad-sim/example-designs/dlrm/compiler/plot.py', root_dir+'rad-sim/', reports_path]) + print('Done') + print('---------------------------') + + +report_file.close() \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/compiler/run_tests.sh b/rad-sim/example-designs/dlrm_two_rad/compiler/run_tests.sh new file mode 100755 index 0000000..c2daf34 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/compiler/run_tests.sh @@ -0,0 +1,52 @@ +#!/bin/sh + +RUN="mvm16-flitw$FLITW-vcbuf$VCBUF-$MODEL" +ROOT_DIR="/home/andrew/repos/rad-flow-dev/" + +cd $ROOT_DIR +for FLITW in 131 +do + for VCBUF in 8 + do + + if [ $FLITW -eq 131 ] + then + sed -i 's/noc_payload_width = \[[0-9]*\]/noc_payload_width = \[82\]/g' rad-flow.config + elif [ $FLITW -eq 195 ] + then + sed -i 's/noc_payload_width = \[[0-9]*\]/noc_payload_width = \[146\]/g' rad-flow.config + else + sed -i 's/noc_payload_width = \[[0-9]*\]/noc_payload_width = \[274\]/g' rad-flow.config + fi + + sed -i 's/noc_vc_buffer_size = \[[0-9]*\]/noc_vc_buffer_size = \['$VCBUF'\]/g' rad-flow.config + cd scripts + python config.py + + for MVM in 16 32 + do + for MODEL in small + do + for INPUTS in 1 256 + do + RUN="mvm$MVM-flitw$FLITW-vcbuf$VCBUF-$MODEL-$INPUTS" + echo "$RUN" + + cd $ROOT_DIR/rad-sim/example-designs/dlrm/compiler + python dlrm.py -l $MVM -n $INPUTS -m ab_$MODEL.csv + + cd $ROOT_DIR/rad-sim/build + make >> make.log + ./sim/build/system + + cd $ROOT_DIR/rad-sim/logs + mkdir $ROOT_DIR/rad-sim/example-designs/dlrm/compiler/reports/dramsim_logs/$RUN + cp *.txt $ROOT_DIR/rad-sim/example-designs/dlrm/compiler/reports/dramsim_logs/$RUN/ + + cd $ROOT_DIR/rad-sim/example-designs/dlrm/compiler + python plot.py $ROOT_DIR/rad-sim/example-designs/dlrm/compiler/reports/plots/$RUN + done + done + done + done +done \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/config.yml b/rad-sim/example-designs/dlrm_two_rad/config.yml new file mode 100644 index 0000000..b3ea2a6 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/config.yml @@ -0,0 +1,63 @@ +config rad1: + dram: + num_controllers: 4 + clk_periods: [3.32, 3.32, 2.0, 2.0] + queue_sizes: [64, 64, 64, 64] + config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] + + design: + name: 'dlrm' + noc_placement: ['dlrm.place'] + clk_periods: [5.0, 2.0, 3.32, 1.5] + +config anotherconfig: + dram: + num_controllers: 4 + clk_periods: [3.32, 3.32, 2.0, 2.0] + queue_sizes: [64, 64, 64, 64] + config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] + + design: + name: 'dlrm' + noc_placement: ['dlrm.place'] + clk_periods: [5.0, 2.0, 3.32, 1.5] + +noc: + type: ['2d'] + num_nocs: 1 + clk_period: [1.0] + payload_width: [82] + topology: ['mesh'] + dim_x: [10] + dim_y: [10] + routing_func: ['dim_order'] + vcs: [5] + vc_buffer_size: [16] + output_buffer_size: [8] + num_packet_types: [5] + router_uarch: ['iq'] + vc_allocator: ['islip'] + sw_allocator: ['islip'] + credit_delay: [1] + routing_delay: [1] + vc_alloc_delay: [1] + sw_alloc_delay: [1] + +noc_adapters: + clk_period: [1.25] + fifo_size: [16] + obuff_size: [2] + in_arbiter: ['fixed_rr'] + out_arbiter: ['priority_rr'] + vc_mapping: ['direct'] + +cluster: + sim_driver_period: 5.0 + telemetry_log_verbosity: 2 + telemetry_traces: ['Embedding LU', 'Mem0', 'Mem1', 'Mem2', 'Mem3', 'Feature Inter.', 'MVM first', 'MVM last'] + num_rads: 2 + cluster_configs: ['rad1', 'anotherconfig'] + cluster_topology: 'all-to-all' + inter_rad_latency: 2100 + inter_rad_bw: 102.4 + inter_rad_fifo_num_slots: 1000 \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/dlrm.clks b/rad-sim/example-designs/dlrm_two_rad/dlrm.clks new file mode 100644 index 0000000..d50f638 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/dlrm.clks @@ -0,0 +1,16 @@ +embedding_lookup_inst 0 0 +feature_interaction_inst 0 0 +ext_mem_0 0 2 +ext_mem_1 0 2 +ext_mem_2 0 1 +ext_mem_3 0 1 +layer0_mvm0 0 3 +layer0_mvm1 0 3 +layer0_mvm2 0 3 +layer0_mvm3 0 3 +layer1_mvm0 0 3 +layer1_mvm1 0 3 +layer2_mvm0 0 3 +layer2_mvm1 0 3 +output_collector 0 0 +portal_inst 0 0 \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/dlrm.place b/rad-sim/example-designs/dlrm_two_rad/dlrm.place new file mode 100644 index 0000000..2e2e240 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/dlrm.place @@ -0,0 +1,68 @@ +ext_mem_0.mem_channel_0 0 1 aximm +ext_mem_1.mem_channel_0 0 71 aximm +ext_mem_2.mem_channel_0 0 2 aximm +ext_mem_2.mem_channel_1 0 3 aximm +ext_mem_2.mem_channel_2 0 4 aximm +ext_mem_2.mem_channel_3 0 5 aximm +ext_mem_2.mem_channel_4 0 6 aximm +ext_mem_2.mem_channel_5 0 7 aximm +ext_mem_2.mem_channel_6 0 8 aximm +ext_mem_2.mem_channel_7 0 9 aximm +ext_mem_3.mem_channel_0 0 72 aximm +ext_mem_3.mem_channel_1 0 73 aximm +ext_mem_3.mem_channel_2 0 74 aximm +ext_mem_3.mem_channel_3 0 75 aximm +ext_mem_3.mem_channel_4 0 76 aximm +ext_mem_3.mem_channel_5 0 77 aximm +ext_mem_3.mem_channel_6 0 78 aximm +ext_mem_3.mem_channel_7 0 79 aximm +embedding_lookup_inst.aximm_req_interface_0 0 11 aximm +embedding_lookup_inst.aximm_req_interface_1 0 61 aximm +embedding_lookup_inst.aximm_req_interface_2 0 12 aximm +embedding_lookup_inst.aximm_req_interface_3 0 13 aximm +embedding_lookup_inst.aximm_req_interface_4 0 14 aximm +embedding_lookup_inst.aximm_req_interface_5 0 15 aximm +embedding_lookup_inst.aximm_req_interface_6 0 16 aximm +embedding_lookup_inst.aximm_req_interface_7 0 17 aximm +embedding_lookup_inst.aximm_req_interface_8 0 18 aximm +embedding_lookup_inst.aximm_req_interface_9 0 19 aximm +embedding_lookup_inst.aximm_req_interface_10 0 62 aximm +embedding_lookup_inst.aximm_req_interface_11 0 63 aximm +embedding_lookup_inst.aximm_req_interface_12 0 64 aximm +embedding_lookup_inst.aximm_req_interface_13 0 65 aximm +embedding_lookup_inst.aximm_req_interface_14 0 66 aximm +embedding_lookup_inst.aximm_req_interface_15 0 67 aximm +embedding_lookup_inst.aximm_req_interface_16 0 68 aximm +embedding_lookup_inst.aximm_req_interface_17 0 69 aximm +feature_interaction_inst.aximm_interface_0 0 21 aximm +feature_interaction_inst.aximm_interface_1 0 51 aximm +feature_interaction_inst.aximm_interface_2 0 22 aximm +feature_interaction_inst.aximm_interface_3 0 23 aximm +feature_interaction_inst.aximm_interface_4 0 24 aximm +feature_interaction_inst.aximm_interface_5 0 25 aximm +feature_interaction_inst.aximm_interface_6 0 26 aximm +feature_interaction_inst.aximm_interface_7 0 27 aximm +feature_interaction_inst.aximm_interface_8 0 28 aximm +feature_interaction_inst.aximm_interface_9 0 29 aximm +feature_interaction_inst.aximm_interface_10 0 52 aximm +feature_interaction_inst.aximm_interface_11 0 53 aximm +feature_interaction_inst.aximm_interface_12 0 54 aximm +feature_interaction_inst.aximm_interface_13 0 55 aximm +feature_interaction_inst.aximm_interface_14 0 56 aximm +feature_interaction_inst.aximm_interface_15 0 57 aximm +feature_interaction_inst.aximm_interface_16 0 58 aximm +feature_interaction_inst.aximm_interface_17 0 59 aximm +feature_interaction_inst.axis_interface_0 0 41 axis +feature_interaction_inst.axis_interface_1 0 41 axis +feature_interaction_inst.axis_interface_2 0 41 axis +feature_interaction_inst.axis_interface_3 0 41 axis +layer0_mvm0 0 70 axis +layer0_mvm1 0 60 axis +layer0_mvm2 0 50 axis +layer0_mvm3 0 40 axis +layer1_mvm0 0 30 axis +layer1_mvm1 0 20 axis +layer2_mvm0 0 10 axis +layer2_mvm1 0 0 axis +output_collector 0 31 axis +portal_inst 0 32 axis \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/dlrm_driver.cpp b/rad-sim/example-designs/dlrm_two_rad/dlrm_driver.cpp new file mode 100644 index 0000000..7f31c15 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/dlrm_driver.cpp @@ -0,0 +1,227 @@ +#include + +bool ParseInputs(std::vector> &lookup_indecies, + std::vector> &target_channels, + std::vector> &base_addresses, + std::string &io_filename) { + std::ifstream io_file(io_filename); + if (!io_file) + return false; + + uint64_t num_indecies_per_input, index; + std::string line; + + // Get number of indecies per input + std::getline(io_file, line); + std::stringstream header_stream(line); + header_stream >> num_indecies_per_input; + + unsigned int line_num = 0; + while (std::getline(io_file, line)) { + std::stringstream line_stream(line); + if (line_num % 3 == 0) { + data_vector dvector(num_indecies_per_input); + for (unsigned int i = 0; i < num_indecies_per_input; i++) { + line_stream >> index; + dvector[i] = index; + } + lookup_indecies.push_back(dvector); + } else if (line_num % 3 == 1) { + data_vector dvector(num_indecies_per_input); + for (unsigned int i = 0; i < num_indecies_per_input; i++) { + line_stream >> index; + dvector[i] = index; + } + target_channels.push_back(dvector); + } else { + data_vector dvector(num_indecies_per_input); + for (unsigned int i = 0; i < num_indecies_per_input; i++) { + line_stream >> index; + dvector[i] = index; + } + base_addresses.push_back(dvector); + } + line_num++; + } + return true; +} + +bool ParseOutputs(std::vector> &fi_outputs, + std::string &io_filename, unsigned int &num_outputs) { + std::ifstream io_file(io_filename); + if (!io_file) + return false; + + int16_t element; + std::string line; + + std::getline(io_file, line); + std::stringstream line_stream(line); + line_stream >> num_outputs; + + while (std::getline(io_file, line)) { + std::stringstream line_stream(line); + std::vector tmp; + while (line_stream.rdbuf()->in_avail() != 0) { + line_stream >> element; + tmp.push_back(element); + } + fi_outputs.push_back(tmp); + } + return true; +} + +dlrm_driver::dlrm_driver(const sc_module_name &name, RADSimDesignContext* radsim_design_) : sc_module(name) { + this->radsim_design = radsim_design_; //AKB ADDED + + // Parse design configuration (number of layers & number of MVM per layer) + std::string design_root_dir = + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); + + std::string inputs_filename = + design_root_dir + "/compiler/embedding_indecies.in"; + ParseInputs(_lookup_indecies, _target_channels, _base_addresses, + inputs_filename); + std::cout << "Finished parsing inputs!" << std::endl; + + std::string feature_interaction_outputs_filename = + design_root_dir + "/compiler/feature_interaction.out"; + ParseOutputs(_feature_interaction_outputs, + feature_interaction_outputs_filename, + _num_feature_interaction_outputs); + + std::string mlp_outputs_filename = design_root_dir + "/compiler/mlp.out"; + ParseOutputs(_mlp_outputs, mlp_outputs_filename, _num_mlp_outputs); + + SC_METHOD(assign); + sensitive << collector_fifo_rdy; + SC_CTHREAD(source, clk.pos()); + SC_CTHREAD(sink, clk.pos()); +} + +dlrm_driver::~dlrm_driver() {} + +void dlrm_driver::assign() { collector_fifo_ren.write(collector_fifo_rdy); } + +void dlrm_driver::source() { + // Reset + rst.write(true); + lookup_indecies_valid.write(false); + wait(); + rst.write(false); + wait(); + + unsigned int idx = 0; + _start_cycle = + GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); + while (idx < _lookup_indecies.size()) { + lookup_indecies_data.write(_lookup_indecies[idx]); + lookup_indecies_target_channels.write(_target_channels[idx]); + lookup_indecies_base_addresses.write(_base_addresses[idx]); + lookup_indecies_valid.write(true); + + wait(); + + if (lookup_indecies_valid.read() && lookup_indecies_ready.read()) { + idx++; + } + } + lookup_indecies_valid.write(false); + std::cout << this->name() + << ": Finished sending all inputs to embedding lookup module!" + << std::endl; + wait(); +} + +void print_progress_bar(unsigned int outputs_count, unsigned int total) { + unsigned int loading_bar_width = 50; + std::cout << "["; + float progress = 1.0 * outputs_count / total; + unsigned int pos = loading_bar_width * progress; + for (unsigned int i = 0; i < loading_bar_width; ++i) { + if (i < pos) + std::cout << "="; + else if (i == pos) + std::cout << ">"; + else + std::cout << " "; + } + if (outputs_count == total) { + std::cout << "] " << int(progress * 100.0) << " %\n"; + } else { + std::cout << "] " << int(progress * 100.0) << " %\r"; + } + std::cout.flush(); +} + +void dlrm_driver::sink() { + std::ofstream mismatching_outputs_file("mismatching.log"); + + unsigned int outputs_count = 0; + data_vector dut_output; + bool all_outputs_matching = true; + while (outputs_count < _num_mlp_outputs) { + dut_output = collector_fifo_rdata.read(); + if (collector_fifo_rdy.read() && dut_output.size() > 0) { + bool matching = true; + for (unsigned int e = 0; e < dut_output.size(); e++) { + matching = (dut_output[e] == _mlp_outputs[outputs_count][e]); + } + if (!matching) { + std::cout << "Output " << outputs_count << " on rad " << radsim_design->rad_id << " does not match!\n"; + std::cout << "TRUE: [ "; + for (unsigned int e = 0; e < _mlp_outputs[outputs_count].size(); e++) { + std::cout << _mlp_outputs[outputs_count][e] << " "; + } + std::cout << "]\n"; + std::cout << "DUT : [ "; + for (unsigned int e = 0; e < dut_output.size(); e++) { + std::cout << dut_output[e] << " "; + } + std::cout << "]\n"; + std::cout << "-------------------------------\n"; + } + // else { + // std::cout << "Output " << outputs_count << " on rad " << radsim_design->rad_id << " does match :)\n"; + // std::cout << "TRUE: [ "; + // for (unsigned int e = 0; e < _mlp_outputs[outputs_count].size(); e++) { + // std::cout << _mlp_outputs[outputs_count][e] << " "; + // } + // std::cout << "]\n"; + // std::cout << "DUT : [ "; + // for (unsigned int e = 0; e < dut_output.size(); e++) { + // std::cout << dut_output[e] << " "; + // } + // std::cout << "]\n"; + // std::cout << "-------------------------------\n"; + // } + outputs_count++; + all_outputs_matching &= matching; + + print_progress_bar(outputs_count, _num_mlp_outputs); + //std::cout << "outputs_count " << outputs_count << " and _num_mlp_outputs " << _num_mlp_outputs << std::endl; + } + wait(); + } + std::cout << "Got " << outputs_count << " output(s)!\n"; + mismatching_outputs_file.flush(); + mismatching_outputs_file.close(); + + if (all_outputs_matching) { + std::cout << "Simulation PASSED! All outputs matching!" << std::endl; + } else { + std::cout << "Simulation FAILED! Some outputs are NOT matching!" << std::endl; + radsim_design->ReportDesignFailure(); + } + _end_cycle = + GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); + std::cout << "Simulated " << (_end_cycle - _start_cycle) << " cycle(s)" + << std::endl; + + for (unsigned int i = 0; i < 10; i++) { + wait(); + } + //sc_stop(); + this->radsim_design->set_rad_done(); //flag to replace sc_stop calls + return; +} \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/dlrm_driver.hpp b/rad-sim/example-designs/dlrm_two_rad/dlrm_driver.hpp new file mode 100644 index 0000000..c0531d9 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/dlrm_driver.hpp @@ -0,0 +1,47 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include +#include + +class dlrm_driver : public sc_module { +private: + std::vector> _lookup_indecies; + std::vector> _target_channels; + std::vector> _base_addresses; + std::vector> _feature_interaction_outputs; + std::vector> _mlp_outputs; + unsigned int _num_feature_interaction_outputs; + unsigned int _num_mlp_outputs; + unsigned int _start_cycle, _end_cycle; + RADSimDesignContext* radsim_design; //AKB ADDED + +public: + sc_in clk; + sc_out rst; + sc_out> lookup_indecies_data; + sc_out> lookup_indecies_target_channels; + sc_out> lookup_indecies_base_addresses; + sc_out lookup_indecies_valid; + sc_in lookup_indecies_ready; + + sc_in received_responses; + + sc_in collector_fifo_rdy; + sc_out collector_fifo_ren; + sc_in> collector_fifo_rdata; + + dlrm_driver(const sc_module_name &name, RADSimDesignContext* radsim_design_); + ~dlrm_driver(); + + void assign(); + void source(); + void sink(); + + SC_HAS_PROCESS(dlrm_driver); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/dlrm_system.cpp b/rad-sim/example-designs/dlrm_two_rad/dlrm_system.cpp new file mode 100644 index 0000000..f278b91 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/dlrm_system.cpp @@ -0,0 +1,42 @@ +#include + +dlrm_system::dlrm_system(const sc_module_name &name, sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design) + : sc_module(name) { + + // Instantiate driver + driver_inst = new dlrm_driver("driver", radsim_design); + driver_inst->clk(*driver_clk_sig); + driver_inst->rst(rst_sig); + driver_inst->lookup_indecies_data(lookup_indecies_data_sig); + driver_inst->lookup_indecies_target_channels( + lookup_indecies_target_channels_sig); + driver_inst->lookup_indecies_base_addresses( + lookup_indecies_base_addresses_sig); + driver_inst->lookup_indecies_valid(lookup_indecies_valid_sig); + driver_inst->lookup_indecies_ready(lookup_indecies_ready_sig); + driver_inst->received_responses(received_responses_sig); + driver_inst->collector_fifo_rdy(collector_fifo_rdy_sig); + driver_inst->collector_fifo_ren(collector_fifo_ren_sig); + driver_inst->collector_fifo_rdata(collector_fifo_rdata_sig); + + // Instantiate design top-level + dut_inst = new dlrm_top("dut", radsim_design); + dut_inst->rst(rst_sig); + dut_inst->lookup_indecies_data(lookup_indecies_data_sig); + dut_inst->lookup_indecies_target_channels( + lookup_indecies_target_channels_sig); + dut_inst->lookup_indecies_base_addresses(lookup_indecies_base_addresses_sig); + dut_inst->lookup_indecies_valid(lookup_indecies_valid_sig); + dut_inst->lookup_indecies_ready(lookup_indecies_ready_sig); + dut_inst->received_responses(received_responses_sig); + dut_inst->collector_fifo_rdy(collector_fifo_rdy_sig); + dut_inst->collector_fifo_ren(collector_fifo_ren_sig); + dut_inst->collector_fifo_rdata(collector_fifo_rdata_sig); + //add _top as dut instance for parent class RADSimDesignSystem + this->design_dut_inst = dut_inst; +} + +dlrm_system::~dlrm_system() { + delete driver_inst; + delete dut_inst; +} \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/dlrm_system.hpp b/rad-sim/example-designs/dlrm_two_rad/dlrm_system.hpp new file mode 100644 index 0000000..264c0d6 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/dlrm_system.hpp @@ -0,0 +1,30 @@ +#pragma once + +#include +#include +#include +#include +#include + +class dlrm_system : public RADSimDesignSystem { //sc_module { +private: + sc_signal> lookup_indecies_data_sig; + sc_signal> lookup_indecies_target_channels_sig; + sc_signal> lookup_indecies_base_addresses_sig; + sc_signal lookup_indecies_valid_sig; + sc_signal lookup_indecies_ready_sig; + + sc_signal received_responses_sig; + + sc_signal collector_fifo_rdy_sig; + sc_signal collector_fifo_ren_sig; + sc_signal> collector_fifo_rdata_sig; + +public: + sc_signal rst_sig; + dlrm_driver *driver_inst; + dlrm_top *dut_inst; + + dlrm_system(const sc_module_name &name, sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design); + ~dlrm_system(); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/dlrm_top.cpp b/rad-sim/example-designs/dlrm_two_rad/dlrm_top.cpp new file mode 100644 index 0000000..0667275 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/dlrm_top.cpp @@ -0,0 +1,156 @@ +#include + +dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_design) : RADSimDesignTop(radsim_design) { + this->radsim_design = radsim_design; + unsigned int line_bitwidth = 512; + unsigned int element_bitwidth = 16; + std::vector mem_channels = {1, 1, 8, 8}; + unsigned int embedding_lookup_fifos_depth = 16; + unsigned int feature_interaction_fifos_depth = 64; + unsigned int num_mem_controllers = + radsim_config.GetIntKnobPerRad("dram_num_controllers", radsim_design->rad_id); + assert(num_mem_controllers == mem_channels.size()); + unsigned int total_mem_channels = 0; + for (auto &num_channels : mem_channels) { + total_mem_channels += num_channels; + } + + std::string module_name_str; + char module_name[25]; + + // Parse MVM configuration + std::string design_root_dir = + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); + std::string design_config_filename = + design_root_dir + "/compiler/mvms.config"; + + std::ifstream design_config_file(design_config_filename); + if (!design_config_file) { + std::cerr << "Cannot read MLP design configuration file!" << std::endl; + exit(1); + } + std::string line; + std::getline(design_config_file, line); + std::stringstream line_stream(line); + unsigned int num_layers, tmp; + std::vector num_mvms; + line_stream >> num_layers; + num_mvms.resize(num_layers); + for (unsigned int layer_id = 0; layer_id < num_layers; layer_id++) { + line_stream >> tmp; + num_mvms[layer_id] = tmp; + } + + // Instantiate Embedding Lookup Module + module_name_str = "embedding_lookup_inst"; + std::strcpy(module_name, module_name_str.c_str()); + embedding_lookup_inst = new embedding_lookup( + module_name, line_bitwidth, mem_channels, embedding_lookup_fifos_depth, radsim_design); + embedding_lookup_inst->rst(rst); + embedding_lookup_inst->lookup_indecies_data(lookup_indecies_data); + embedding_lookup_inst->lookup_indecies_target_channels( + lookup_indecies_target_channels); + embedding_lookup_inst->lookup_indecies_base_addresses( + lookup_indecies_base_addresses); + embedding_lookup_inst->lookup_indecies_valid(lookup_indecies_valid); + embedding_lookup_inst->lookup_indecies_ready(lookup_indecies_ready); + + // Instantiate Feature Interaction Module + module_name_str = "feature_interaction_inst"; + std::strcpy(module_name, module_name_str.c_str()); + std::string feature_interaction_inst_file = + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id) + + "/compiler/instructions/feature_interaction.inst"; + feature_interaction_inst = new custom_feature_interaction( + module_name, line_bitwidth, element_bitwidth, total_mem_channels, + feature_interaction_fifos_depth, num_mvms[0], + feature_interaction_inst_file, radsim_design); + feature_interaction_inst->rst(rst); + feature_interaction_inst->received_responses(received_responses); + + // Instantiate MVM Engines + + unsigned int axis_signal_count = 0; + mvms.resize(num_layers); + for (unsigned int l = 0; l < num_layers; l++) { + mvms[l].resize(num_mvms[l]); + for (unsigned int m = 0; m < num_mvms[l]; m++) { + module_name_str = "layer" + to_string(l) + "_mvm" + to_string(m); + std::strcpy(module_name, module_name_str.c_str()); + std::string inst_filename = design_root_dir + "/compiler/instructions/" + + module_name_str + ".inst"; + mvms[l][m] = new mvm(module_name, m, l, inst_filename, radsim_design); + mvms[l][m]->rst(rst); + axis_signal_count++; + } + } + + axis_sig.resize(axis_signal_count); + unsigned int idx = 0; + for (unsigned int l = 0; l < num_layers; l++) { + for (unsigned int m = 0; m < num_mvms[l]; m++) { + if (m == num_mvms[l] - 1 && l == num_layers - 1) { + axis_sig[idx].Connect(mvms[l][m]->tx_reduce_interface, + mvms[0][0]->rx_reduce_interface); + } else if (m == num_mvms[l] - 1) { + axis_sig[idx].Connect(mvms[l][m]->tx_reduce_interface, + mvms[l + 1][0]->rx_reduce_interface); + } else { + axis_sig[idx].Connect(mvms[l][m]->tx_reduce_interface, + mvms[l][m + 1]->rx_reduce_interface); + } + idx++; + } + } + + // Instantiate Output Collector + module_name_str = "output_collector"; + std::strcpy(module_name, module_name_str.c_str()); + output_collector = new collector(module_name, radsim_design); + output_collector->rst(rst); + output_collector->data_fifo_rdy(collector_fifo_rdy); + output_collector->data_fifo_ren(collector_fifo_ren); + output_collector->data_fifo_rdata(collector_fifo_rdata); + + ext_mem.resize(num_mem_controllers); + mem_clks.resize(num_mem_controllers); + unsigned int ch_id = 0; + std::string mem_content_init_prefix = + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id) + + "/compiler/embedding_tables/channel_"; + for (unsigned int ctrl_id = 0; ctrl_id < num_mem_controllers; ctrl_id++) { + double mem_clk_period = + radsim_config.GetDoubleVectorKnobPerRad("dram_clk_periods", ctrl_id, radsim_design->rad_id); + module_name_str = "ext_mem_" + to_string(ctrl_id) + "_clk"; + std::strcpy(module_name, module_name_str.c_str()); + mem_clks[ctrl_id] = new sc_clock(module_name, mem_clk_period, SC_NS); + module_name_str = "ext_mem_" + to_string(ctrl_id); + std::strcpy(module_name, module_name_str.c_str()); + std::string mem_content_init = mem_content_init_prefix + to_string(ch_id); + ext_mem[ctrl_id] = + new mem_controller(module_name, ctrl_id, radsim_design, mem_content_init); + ext_mem[ctrl_id]->mem_clk(*mem_clks[ctrl_id]); + ext_mem[ctrl_id]->rst(rst); + ch_id += mem_channels[ctrl_id]; + } + + this->connectPortalReset(&rst); + + radsim_design->BuildDesignContext("dlrm.place", "dlrm.clks"); + radsim_design->CreateSystemNoCs(rst); + radsim_design->ConnectModulesToNoC(); +} + +dlrm_top::~dlrm_top() { + delete embedding_lookup_inst; + delete feature_interaction_inst; + for (auto &ctrlr : ext_mem) + delete ctrlr; + delete output_collector; + for (unsigned int l = 0; l < mvms.size(); l++) { + for (auto &mvm : mvms[l]) { + delete mvm; + } + } + +} \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/dlrm_top.hpp b/rad-sim/example-designs/dlrm_two_rad/dlrm_top.hpp new file mode 100644 index 0000000..e2642e2 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/dlrm_top.hpp @@ -0,0 +1,44 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +class dlrm_top : public RADSimDesignTop { +private: + embedding_lookup *embedding_lookup_inst; + custom_feature_interaction *feature_interaction_inst; + std::vector> mvms; + collector *output_collector; + std::vector ext_mem; + + std::vector axis_sig; + std::vector mem_clks; + RADSimDesignContext* radsim_design; //AKB ADDED + +public: + sc_in rst; + + sc_in> lookup_indecies_data; + sc_in> lookup_indecies_target_channels; + sc_in> lookup_indecies_base_addresses; + sc_in lookup_indecies_valid; + sc_out lookup_indecies_ready; + + sc_out received_responses; + + sc_out collector_fifo_rdy; + sc_in collector_fifo_ren; + sc_out> collector_fifo_rdata; + + dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_design); + ~dlrm_top(); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/afifo.cpp b/rad-sim/example-designs/dlrm_two_rad/modules/afifo.cpp new file mode 100644 index 0000000..98c6625 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/afifo.cpp @@ -0,0 +1,103 @@ +#include + +template +afifo::afifo(const sc_module_name &name, unsigned int depth, + unsigned int iwidth, unsigned int owidth, + unsigned int almost_full_size) + : sc_module(name), _staging_vector(owidth) { + + _wide_to_narrow = (iwidth > owidth); + _input_width = iwidth; + _output_width = owidth; + if (_wide_to_narrow) { + _width_ratio = (int)(_input_width / _output_width); + } else { + _width_ratio = (int)(_output_width / _input_width); + } + _capacity = depth; + _fifo_almost_full_size = almost_full_size; + _staging_counter = 0; + + SC_CTHREAD(Tick, clk.pos()); + reset_signal_is(rst, true); +} + +template afifo::~afifo() {} + +template void afifo::Tick() { + // Reset logic + while (!_mem.empty()) + _mem.pop(); + empty.write(true); + full.write(false); + almost_full.write(false); + wait(); + + // Sequential logic + while (true) { + // Pop logic + if (ren.read()) { + if (_mem.size() == 0) { + sim_log.log(error, "FIFO is underflowing!", this->name()); + } + _mem.pop(); + } + + // Push logic + data_vector wdata_vector; + if (wen.read()) { + if (_wide_to_narrow) { + if (_mem.size() > _capacity - _width_ratio) { + sim_log.log(error, + "FIFO is overflowing! Size = " + + std::to_string(_mem.size()), + this->name()); + } + wdata_vector = wdata.read(); + for (unsigned int i = 0; i < _width_ratio; i++) { + data_vector tmp(_output_width); + for (unsigned int j = 0; j < _output_width; j++) { + tmp[j] = wdata_vector[(i * _output_width) + j]; + } + _mem.push(tmp); + } + } else { + wdata_vector = wdata.read(); + for (unsigned int i = 0; i < _input_width; i++) { + _staging_vector[(_staging_counter * _input_width) + i] = + wdata_vector[i]; + } + if (_staging_counter == _width_ratio - 1) { + if (_mem.size() >= _capacity) { + sim_log.log(error, + "FIFO is overflowing! Size = " + + std::to_string(_mem.size()), + this->name()); + } + _staging_counter = 0; + _mem.push(_staging_vector); + } else { + _staging_counter++; + } + } + } + + empty.write(_mem.size() == 0); + if (_wide_to_narrow) + full.write(_mem.size() > _capacity - _width_ratio); + else + full.write(_mem.size() >= _capacity); + almost_full.write(_mem.size() > _capacity - 2 * _width_ratio); + data_vector tmp(_output_width); + if (_mem.size() > 0) { + tmp = _mem.front(); + } + rdata.write(tmp); + + // std::cout << this->name() << ": " << _mem.size() << " " + // << (_mem.size() >= _fifo_almost_full_size) << std::endl; + wait(); + } +} + +template class afifo; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/afifo.hpp b/rad-sim/example-designs/dlrm_two_rad/modules/afifo.hpp new file mode 100644 index 0000000..6929cac --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/afifo.hpp @@ -0,0 +1,38 @@ +#pragma once + +#include +#include +#include +#include +#include + +template class afifo : public sc_module { +private: + unsigned int _capacity; // FIFO capcity in narrower words + unsigned int _input_width; // Input width in vector elements + unsigned int _output_width; // Output widths in vector elemnts + bool _wide_to_narrow; // Flag to specify assymetry mode + unsigned int _width_ratio; // Ratio between input and output widths + unsigned int _fifo_almost_full_size; // Almost full size + std::queue> _mem; // Memory of the FIFO (queue of vectors) + data_vector _staging_vector; + unsigned int _staging_counter; + +public: + sc_in clk; + sc_in rst; + sc_in wen; + sc_in> wdata; + sc_in ren; + sc_out> rdata; + sc_out full; + sc_out almost_full; + sc_out empty; + + afifo(const sc_module_name &name, unsigned int depth, unsigned int iwidth, + unsigned int owidth, unsigned int almost_full_size); + ~afifo(); + + void Tick(); + SC_HAS_PROCESS(afifo); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/collector.cpp b/rad-sim/example-designs/dlrm_two_rad/modules/collector.cpp new file mode 100644 index 0000000..e71ba8e --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/collector.cpp @@ -0,0 +1,65 @@ +#include + +collector::collector(const sc_module_name &name, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), rst("rst"), data_fifo_rdy("data_fifo_rdy"), + data_fifo_ren("data_fifo_ren"), data_fifo_rdata("data_fifo_rdata") { + + module_name = name; + this->radsim_design = radsim_design; + + char fifo_name[25]; + std::string fifo_name_str; + fifo_name_str = "collector_data_fifo"; + std::strcpy(fifo_name, fifo_name_str.c_str()); + data_fifo = new fifo(fifo_name, FIFO_SIZE, LANES, FIFO_SIZE - 1, 0); + data_fifo->clk(clk); + data_fifo->rst(rst); + data_fifo->wen(data_fifo_wen_signal); + data_fifo->ren(data_fifo_ren); + data_fifo->wdata(data_fifo_wdata_signal); + data_fifo->full(data_fifo_full_signal); + data_fifo->almost_full(data_fifo_almost_full_signal); + data_fifo->empty(data_fifo_empty_signal); + data_fifo->almost_empty(data_fifo_almost_empty_signal); + data_fifo->rdata(data_fifo_rdata); + + SC_METHOD(Assign); + sensitive << rst << data_fifo_empty_signal << data_fifo_almost_full_signal + << rx_interface.tvalid << rx_interface.tdata << rx_interface.tready; + + this->RegisterModuleInfo(); +} + +collector::~collector() { delete data_fifo; } + +void collector::Assign() { + if (rst.read()) { + rx_interface.tready.write(false); + data_fifo_rdy.write(false); + } else if (radsim_design->rad_id == 1) { + rx_interface.tready.write(!data_fifo_almost_full_signal); + data_fifo_wen_signal.write(rx_interface.tvalid.read() && + rx_interface.tready.read()); + data_fifo_rdy.write(!data_fifo_empty_signal); + + data_vector tx_tdata(LANES); + sc_bv tx_tdata_bv = rx_interface.tdata.read(); + if (rx_interface.tvalid.read() && rx_interface.tready.read()) { + for (unsigned int lane_id = 0; lane_id < LANES; lane_id++) { + tx_tdata[lane_id] = + tx_tdata_bv.range((lane_id + 1) * BITWIDTH - 1, lane_id * BITWIDTH) + .to_int(); + } + data_fifo_wdata_signal.write(tx_tdata); + } + } +} + +void collector::RegisterModuleInfo() { + std::string port_name; + _num_noc_axis_slave_ports = 0; + _num_noc_axis_master_ports = 0; + + port_name = module_name + ".data_collect"; + RegisterAxisSlavePort(port_name, &rx_interface, DATAW, 0); +} \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/collector.hpp b/rad-sim/example-designs/dlrm_two_rad/modules/collector.hpp new file mode 100644 index 0000000..73f6f09 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/collector.hpp @@ -0,0 +1,36 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include +#include + +class collector : public RADSimModule { +private: + std::string module_name; + + fifo *data_fifo; + sc_signal> data_fifo_wdata_signal; + sc_signal data_fifo_wen_signal, data_fifo_full_signal, + data_fifo_empty_signal, data_fifo_almost_full_signal, + data_fifo_almost_empty_signal; + +public: + RADSimDesignContext* radsim_design; + sc_in rst; + sc_out data_fifo_rdy; + sc_in data_fifo_ren; + sc_out> data_fifo_rdata; + axis_slave_port rx_interface; + + collector(const sc_module_name &name, RADSimDesignContext* radsim_design); + ~collector(); + + void Assign(); + SC_HAS_PROCESS(collector); + void RegisterModuleInfo(); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/custom_feature_interaction.cpp b/rad-sim/example-designs/dlrm_two_rad/modules/custom_feature_interaction.cpp new file mode 100644 index 0000000..b0f423e --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/custom_feature_interaction.cpp @@ -0,0 +1,314 @@ +#include + +void ParseFeatureInteractionInstructions( + std::string &instructions_file, + std::vector &instructions, + std::string &responses_file, unsigned int &num_expected_responses) { + + std::ifstream resp_file(responses_file); + if (!resp_file) { + sim_log.log(error, "Cannot find feature interaction responses file!"); + } + std::string line; + std::getline(resp_file, line); + std::stringstream ls(line); + unsigned int lookups, num_inputs; + ls >> lookups >> num_inputs; + num_expected_responses = lookups * num_inputs; + resp_file.close(); + + std::ifstream inst_file(instructions_file); + if (!inst_file) { + sim_log.log(error, "Cannot find feature interaction instructions file!"); + } + + unsigned int fifo_id, start_element, end_element; + bool pop; + while (std::getline(inst_file, line)) { + custom_feature_interaction_inst instruction; + std::stringstream line_stream(line); + while (line_stream >> fifo_id >> start_element >> end_element >> pop) { + instruction.xbar_schedule.push_back(fifo_id); + instruction.start_element.push_back(start_element); + instruction.end_element.push_back(end_element); + instruction.pop_fifo.push_back(pop); + } + instructions.push_back(instruction); + } + inst_file.close(); +} + +custom_feature_interaction::custom_feature_interaction( + const sc_module_name &name, unsigned int dataw, + unsigned int element_bitwidth, unsigned int num_mem_channels, + unsigned int fifos_depth, unsigned int num_output_channels, + std::string &instructions_file, + RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design) { + + this->radsim_design = radsim_design; + _fifos_depth = fifos_depth; + _num_received_responses = 0; + _num_mem_channels = num_mem_channels; + _dataw = dataw; + _bitwidth = element_bitwidth; + _num_input_elements = dataw / element_bitwidth; //512/16=32 + _num_output_elements = DATAW / element_bitwidth; + _num_output_channels = num_output_channels; + + aximm_interface.init(_num_mem_channels); + axis_interface.init(_num_output_channels); + + _input_fifos.resize(_num_mem_channels); + _ififo_full.init(_num_mem_channels); + _ififo_empty.init(_num_mem_channels); + + _output_fifos.resize(_num_output_channels); + _ofifo_full.init(_num_output_channels); + _ofifo_empty.init(_num_output_channels); + + std::string resp_filename = + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id) + + "/compiler/embedding_indecies.in"; + ParseFeatureInteractionInstructions(instructions_file, _instructions, + resp_filename, _num_expected_responses); + + // Combinational logic and its sensitivity list + SC_METHOD(Assign); + sensitive << rst; + for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + sensitive << _ififo_full[ch_id]; + } + // Sequential logic and its clock/reset setup + SC_CTHREAD(Tick, clk.pos()); + reset_signal_is(rst, true); // Reset is active high + + // This function must be defined & called for any RAD-Sim module to register + // its info for automatically connecting to the NoC + this->RegisterModuleInfo(); + _debug_feature_interaction_out = new ofstream("dut_feature_interaction.out"); +} + +custom_feature_interaction::~custom_feature_interaction() { + delete _debug_feature_interaction_out; +} + +void custom_feature_interaction::Assign() { + if (rst) { + for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + aximm_interface[ch_id].bready.write(false); + aximm_interface[ch_id].rready.write(false); + } + } else if (radsim_design->rad_id == 0) { + // Set ready signals to accept read/write response from the AXI-MM NoC + for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + aximm_interface[ch_id].bready.write(false); + aximm_interface[ch_id].rready.write(!_ififo_full[ch_id].read()); + } + } +} + +void custom_feature_interaction::bv_to_data_vector( + sc_bv &bitvector, data_vector &datavector, + unsigned int num_elements) { + + unsigned int start_idx, end_idx; + for (unsigned int e = 0; e < num_elements; e++) { + start_idx = e * _bitwidth; + end_idx = (e + 1) * _bitwidth; + datavector[e] = bitvector.range(end_idx - 1, start_idx).to_int(); + } +} + +void custom_feature_interaction::data_vector_to_bv( + data_vector &datavector, sc_bv &bitvector, + unsigned int num_elements) { + + unsigned int start_idx, end_idx; + for (unsigned int e = 0; e < num_elements; e++) { + start_idx = e * _bitwidth; + end_idx = (e + 1) * _bitwidth; + bitvector.range(end_idx - 1, start_idx) = datavector[e]; + } +} + +bool are_ififos_ready(sc_vector> &ififo_empty, + custom_feature_interaction_inst &inst) { + + bool ready = true; + for (auto &f : inst.xbar_schedule) { + if (f == 0) + ready &= true; + else + ready &= !ififo_empty[f - 1].read(); + } + return ready; +} + +void custom_feature_interaction::Tick() { + if (radsim_design->rad_id == 0) { + // Reset ports + for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + aximm_interface[ch_id].arvalid.write(false); + aximm_interface[ch_id].awvalid.write(false); + aximm_interface[ch_id].wvalid.write(false); + } + received_responses.write(0); + // Reset signals + for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + _ififo_full[ch_id].write(false); + _ififo_empty[ch_id].write(true); + } + for (unsigned int ch_id = 0; ch_id < _num_output_channels; ch_id++) { + _ofifo_full[ch_id].write(false); + _ofifo_empty[ch_id].write(true); + axis_interface[ch_id].tvalid.write(false); + } + _dest_ofifo.write(0); + _pc.write(0); + wait(); + + int no_val_counter = 0; + bool got_all_mem_responses = false; + + // Always @ positive edge of the clock + while (true ) { //&& (radsim_design->rad_id == 0)) { + // Accept R responses from the NoC + for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + if (_input_fifos[ch_id].size() < _fifos_depth && + aximm_interface[ch_id].rvalid.read()) { + sc_bv rdata_bv = aximm_interface[ch_id].rdata.read(); + data_vector rdata(_num_input_elements); + bv_to_data_vector(rdata_bv, rdata, _num_input_elements); + _input_fifos[ch_id].push(rdata); + _num_received_responses++; + if (_num_received_responses == _num_expected_responses) { + std::cout << this->name() << ": Got all memory responses at cycle " + << GetSimulationCycle(5.0) << "!" << std::endl; + got_all_mem_responses = true; + } + } + } + + // Pop from input FIFOs + bool ififos_ready = + are_ififos_ready(_ififo_empty, _instructions[_pc.read()]); + if (ififos_ready && !_ofifo_full[_dest_ofifo.read()]) { + data_vector ofifo_data_vector(_num_output_elements); + custom_feature_interaction_inst instruction = _instructions[_pc.read()]; + unsigned int num_steps = instruction.xbar_schedule.size(); + unsigned int element_id = 0; + unsigned int fifo_id, start_idx, end_idx; + for (unsigned int step = 0; step < num_steps; step++) { + fifo_id = instruction.xbar_schedule[step]; + start_idx = instruction.start_element[step]; + end_idx = instruction.end_element[step]; + data_vector tmp(_num_input_elements); + if (fifo_id != 0) { + tmp = _input_fifos[fifo_id - 1].front(); + if (instruction.pop_fifo[step]) { + _input_fifos[fifo_id - 1].pop(); + } + } + for (unsigned int element = start_idx; element <= end_idx; element++) { + assert(element_id < ofifo_data_vector.size()); + ofifo_data_vector[element_id] = tmp[element]; + element_id++; + } + } + if (fifo_id != 0) { + *_debug_feature_interaction_out << ofifo_data_vector << "\n"; + _debug_feature_interaction_out->flush(); + } + _output_fifos[_dest_ofifo.read()].push(ofifo_data_vector); + + // Advance destination FIFO pointer + if (_dest_ofifo.read() == _num_output_channels - 1) { + _dest_ofifo.write(0); + } else { + _dest_ofifo.write(_dest_ofifo.read() + 1); + } + + // Advance Instructions Pointer + if (_pc.read() == _instructions.size() - 1) { + _pc.write(0); + } else { + _pc.write(_pc.read() + 1); + } + } + + // Interface with AXI-S NoC + bool non_empty_output_fifo = false; + for (unsigned int ch_id = 0; ch_id < _num_output_channels; ch_id++) { + if (axis_interface[ch_id].tready.read() && + axis_interface[ch_id].tvalid.read()) { + int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); + data_vector tx_tdata = _output_fifos[ch_id].front(); + //std::cout << "custom_feature_interaction @ cycle " << curr_cycle << ": tx_tdata sent " << tx_tdata << " from RAD " << radsim_design->rad_id << " with tdest field " << axis_interface[ch_id].tdest.read() << std::endl; + _output_fifos[ch_id].pop(); + } + + if ( (!_output_fifos[ch_id].empty()) ) { //&& (radsim_design->rad_id == 0) ) { + non_empty_output_fifo = true; + data_vector tx_tdata = _output_fifos[ch_id].front(); + //std::cout << "custom_feature_interaction: tx_tdata sent " << tx_tdata << " from RAD " << radsim_design->rad_id << std::endl; + sc_bv tx_tdata_bv; + data_vector_to_bv(tx_tdata, tx_tdata_bv, _num_output_elements); + axis_interface[ch_id].tvalid.write(true); + axis_interface[ch_id].tdata.write(tx_tdata_bv); + axis_interface[ch_id].tuser.write(3 << 13); + axis_interface[ch_id].tid.write(0); + std::string dest_name = + "layer0_mvm" + std::to_string(ch_id) + ".rx_interface"; + //std::cout << "radsim_design->GetPortDestinationID(dest_name) on RAD " << radsim_design->rad_id << ": " << radsim_design->GetPortDestinationID(dest_name) << std::endl; + sc_bv dest_id_concat; + DEST_RAD(dest_id_concat) = 1; //radsim_design->rad_id; + DEST_LOCAL_NODE(dest_id_concat) = radsim_design->GetPortDestinationID(dest_name); + DEST_REMOTE_NODE(dest_id_concat) = radsim_design->GetPortDestinationID(dest_name); + axis_interface[ch_id].tdest.write( + dest_id_concat); + //radsim_design->GetPortDestinationID(dest_name)); + no_val_counter = 0; + } else { + axis_interface[ch_id].tvalid.write(false); + no_val_counter++; + } + } + + // Set FIFO signals + for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + _ififo_empty[ch_id].write(_input_fifos[ch_id].empty()); + _ififo_full[ch_id].write(_input_fifos[ch_id].size() >= _fifos_depth - 4); + } + for (unsigned int ch_id = 0; ch_id < _num_output_channels; ch_id++) { + _ofifo_empty[ch_id].write(_output_fifos[ch_id].empty()); + _ofifo_full[ch_id].write(_output_fifos[ch_id].size() >= _fifos_depth - 2); + } + received_responses.write(_num_received_responses); + + if (non_empty_output_fifo && got_all_mem_responses) { + radsim_design->set_rad_done(); + } + + wait(); + } + } +} + +void custom_feature_interaction::RegisterModuleInfo() { + std::string port_name; + _num_noc_axis_slave_ports = 0; + _num_noc_axis_master_ports = 0; + _num_noc_aximm_slave_ports = 0; + _num_noc_aximm_master_ports = 0; + + for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + port_name = module_name + ".aximm_interface_" + std::to_string(ch_id); + RegisterAximmMasterPort(port_name, &aximm_interface[ch_id], _dataw); + } + + for (unsigned int ch_id = 0; ch_id < _num_output_channels; ch_id++) { + port_name = module_name + ".axis_interface_" + std::to_string(ch_id); + RegisterAxisMasterPort(port_name, &axis_interface[ch_id], DATAW, 0); + } +} diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/custom_feature_interaction.hpp b/rad-sim/example-designs/dlrm_two_rad/modules/custom_feature_interaction.hpp new file mode 100644 index 0000000..bf481e0 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/custom_feature_interaction.hpp @@ -0,0 +1,77 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct custom_feature_interaction_inst { + std::vector xbar_schedule; + std::vector start_element; + std::vector end_element; + std::vector pop_fifo; +}; + +class custom_feature_interaction : public RADSimModule { +private: + unsigned int _fifos_depth; // Depth of input/output FIFOs + std::vector _instructions; // Instruction mem + sc_signal _pc; // Program counter + + std::vector>> _input_fifos; // Input FIFOs + sc_vector> _ififo_full; // Signals FIFOs full + sc_vector> _ififo_empty; // Signals iFIFOs empty + + std::vector>> _output_fifos; // Output FIFO + sc_vector> _ofifo_full; // Signals oFIFO full + sc_vector> _ofifo_empty; // Signals oFIFO empty + sc_signal _dest_ofifo; + + unsigned int _num_mem_channels; // No. of memory channels + unsigned int _dataw; // Data interface bitwidth + unsigned int _num_received_responses; + unsigned int _num_input_elements; + unsigned int _num_output_elements; + unsigned int _bitwidth; + unsigned int _num_output_channels; + unsigned int _num_expected_responses; + + ofstream *_debug_feature_interaction_out; + +public: + RADSimDesignContext* radsim_design; + sc_in rst; + // Interface to driver logic + sc_out received_responses; + // Interface to the NoC + sc_vector aximm_interface; + sc_vector axis_interface; + + custom_feature_interaction(const sc_module_name &name, unsigned int dataw, + unsigned int element_bitwidth, + unsigned int num_mem_channels, + unsigned int fifos_depth, + unsigned int num_output_channels, + std::string &instructions_file, + RADSimDesignContext* radsim_design); + ~custom_feature_interaction(); + + void Assign(); // Combinational logic process + void Tick(); // Sequential logic process + void bv_to_data_vector(sc_bv &bitvector, + data_vector &datavector, + unsigned int num_elements); + void data_vector_to_bv(data_vector &datavector, + sc_bv &bitvector, + unsigned int num_elements); + SC_HAS_PROCESS(custom_feature_interaction); + void RegisterModuleInfo(); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/dlrm_defines.hpp b/rad-sim/example-designs/dlrm_two_rad/modules/dlrm_defines.hpp new file mode 100644 index 0000000..aa0cc7a --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/dlrm_defines.hpp @@ -0,0 +1,9 @@ +#define BITWIDTH 16 +#define LANES 32 +#define FIFO_SIZE 512 +#define COMPUTE_LATENCY 10 +#define RF_MEM_DEPTH 512 +#define ACCUM_MEM_DEPTH 64 +#define INST_MEM_DEPTH 2048 +#define DOT_PRODUCTS LANES +#define DATAW (BITWIDTH * LANES) diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/embedding_lookup.cpp b/rad-sim/example-designs/dlrm_two_rad/modules/embedding_lookup.cpp new file mode 100644 index 0000000..4f678fa --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/embedding_lookup.cpp @@ -0,0 +1,203 @@ +#include + +embedding_lookup::embedding_lookup( + const sc_module_name &name, unsigned int dataw, + std::vector &num_mem_channels_per_controller, + unsigned int fifo_depth, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design) { + + this->radsim_design = radsim_design; + + _total_num_channels = 0; + unsigned int ctrl_id = 0; + for (auto &num_channels : num_mem_channels_per_controller) { + _num_channels_per_ctrl.push_back(num_channels); + _total_num_channels += num_channels; + for (unsigned int ch_id = 0; ch_id < num_channels; ch_id++) { + std::string port_name = + "ext_mem_" + to_string(ctrl_id) + ".mem_channel_" + to_string(ch_id); + _dst_port_names.push_back(port_name); + } + ctrl_id++; + } + _lookup_indecies_fifo.resize(_total_num_channels); + _base_addresses_fifo.resize(_total_num_channels); + _fifo_depth = fifo_depth; + _fifo_full.init(_total_num_channels); + _id_count.init(_total_num_channels); + _num_received_responses = 0; + _dataw = dataw; + + aximm_req_interface.init(_total_num_channels); + + // Combinational logic and its sensitivity list + SC_METHOD(Assign); + sensitive << rst; + for (unsigned int ch_id = 0; ch_id < _total_num_channels; ch_id++) { + sensitive << _fifo_full[ch_id]; + } + // Sequential logic and its clock/reset setup + SC_CTHREAD(Tick, clk.pos()); + reset_signal_is(rst, true); // Reset is active high + + // This function must be defined & called for any RAD-Sim module to register + // its info for automatically connecting to the NoC + this->RegisterModuleInfo(); + _debug_sent_request_counter = 0; +} + +embedding_lookup::~embedding_lookup() {} + +void embedding_lookup::Assign() { + if (rst) { + lookup_indecies_ready.write(true); + for (unsigned int ch_id = 0; ch_id < _total_num_channels; ch_id++) { + aximm_req_interface[ch_id].bready.write(false); + aximm_req_interface[ch_id].rready.write(false); + } + } else if ((radsim_design->rad_id == 0)) { + bool all_fifos_not_full = true; + + // Always ready to accept read/write response from the AXI-MM NoC + // interface + for (unsigned int ch_id = 0; ch_id < _total_num_channels; ch_id++) { + aximm_req_interface[ch_id].bready.write(true); + aximm_req_interface[ch_id].rready.write(true); + all_fifos_not_full = all_fifos_not_full && !_fifo_full[ch_id].read(); + } + + // Ready to accept new lookup indecies from driver testbench as long as + // none of the FIFOs are full + lookup_indecies_ready.write(all_fifos_not_full); + } +} + +void embedding_lookup::Tick() { + if (radsim_design->rad_id == 0) { + // Reset logic + for (unsigned int ch_id = 0; ch_id < _total_num_channels; ch_id++) { + aximm_req_interface[ch_id].arvalid.write(false); + aximm_req_interface[ch_id].awvalid.write(false); + aximm_req_interface[ch_id].wvalid.write(false); + while (!_lookup_indecies_fifo[ch_id].empty()) { + _lookup_indecies_fifo[ch_id].pop(); + } + while (!_base_addresses_fifo[ch_id].empty()) { + _base_addresses_fifo[ch_id].pop(); + } + _fifo_full[ch_id].write(false); + _id_count[ch_id].write(0); + } + wait(); + + // Always @ positive edge of the clock + while (true) { //&& (radsim_design->rad_id == 0)) { + if (lookup_indecies_ready.read() && lookup_indecies_valid.read()) { + data_vector lookup_indecies = lookup_indecies_data.read(); + data_vector target_channels = + lookup_indecies_target_channels.read(); + data_vector base_addresses = + lookup_indecies_base_addresses.read(); + for (unsigned int i = 0; i < lookup_indecies.size(); i++) { + _lookup_indecies_fifo[target_channels[i]].push(lookup_indecies[i]); + _base_addresses_fifo[target_channels[i]].push(base_addresses[i]); + } + // std::cout << module_name << ": Received lookup indecies" << std::endl; + } + + // Set FIFO full signals + for (unsigned int ch_id = 0; ch_id < _total_num_channels; ch_id++) { + _fifo_full[ch_id].write(_lookup_indecies_fifo[ch_id].size() >= + _fifo_depth - 4); + } + + // Sending transactions to AXI-MM NoC + unsigned int ch_id = 0; + for (unsigned int ctrl_id = 0; ctrl_id < _num_channels_per_ctrl.size(); + ctrl_id++) { + for (unsigned int c = 0; c < _num_channels_per_ctrl[ctrl_id]; c++) { + if (!_lookup_indecies_fifo[ch_id].empty()) { + uint64_t lookup_index = _lookup_indecies_fifo[ch_id].front(); + uint64_t table_base_addr = _base_addresses_fifo[ch_id].front(); + + std::string dst_port_name = _dst_port_names[ch_id]; + uint64_t dst_addr = radsim_design->GetPortBaseAddress(dst_port_name) + + table_base_addr + lookup_index; + std::string src_port_name = + "feature_interaction_inst.aximm_interface_" + + std::to_string(ch_id); + uint64_t src_addr = radsim_design->GetPortBaseAddress(src_port_name); + + /*if (ctrl_id == 0) { + std::cout << "Base address: " << table_base_addr << std::endl; + std::cout << "Index: " << lookup_index << std::endl; + }*/ + + aximm_req_interface[ch_id].araddr.write(dst_addr); + aximm_req_interface[ch_id].arid.write(_id_count[ch_id].read()); + aximm_req_interface[ch_id].arlen.write(0); + aximm_req_interface[ch_id].arburst.write(0); + aximm_req_interface[ch_id].arsize.write(0); + aximm_req_interface[ch_id].aruser.write(src_addr); + aximm_req_interface[ch_id].arvalid.write(true); + aximm_req_interface[ch_id].awvalid.write(false); + aximm_req_interface[ch_id].wvalid.write(false); + } else { + aximm_req_interface[ch_id].arvalid.write(false); + aximm_req_interface[ch_id].awvalid.write(false); + aximm_req_interface[ch_id].wvalid.write(false); + } + + // Pop the FIFO if the transaction is accepted + if (aximm_req_interface[ch_id].arvalid.read() && + aximm_req_interface[ch_id].arready.read()) { + /*if (ctrl_id == 0) { + std::cout << "ELU sent address " + << aximm_req_interface[ch_id].araddr.read().to_uint64() + << std::endl; + cin.get(); + }*/ + _lookup_indecies_fifo[ch_id].pop(); + _base_addresses_fifo[ch_id].pop(); + _id_count[ch_id].write(_id_count[ch_id].read() + 1); + /*_debug_sent_request_counter++; + std::cout << module_name << ": Sent AR transaction " + << _debug_sent_request_counter << " @ channel " << ch_id + << "!" << std::endl;*/ + } + + // Receiving transactions from AXI-MM NoC + if (aximm_req_interface[ch_id].rvalid.read() && + aximm_req_interface[ch_id].rready.read()) { + /*std::cout << module_name << ": Received READ response " + << _num_received_responses << " (" + << aximm_req_interface[ch_id].rdata.read() << ")!" + << std::endl;*/ + _num_received_responses++; + } else if (aximm_req_interface[ch_id].bvalid.read() && + aximm_req_interface[ch_id].bready.read()) { + // std::cout << module_name << ": Received WRITE response!" << + // std::endl; + _num_received_responses++; + } + ch_id++; + } + } + wait(); + } + } +} + +void embedding_lookup::RegisterModuleInfo() { + std::string port_name; + _num_noc_axis_slave_ports = 0; + _num_noc_axis_master_ports = 0; + _num_noc_aximm_slave_ports = 0; + _num_noc_aximm_master_ports = 0; + + for (unsigned int ch_id = 0; ch_id < _total_num_channels; ch_id++) { + port_name = module_name + ".aximm_req_interface_" + std::to_string(ch_id); + // std::cout << "----" << port_name << std::endl; + RegisterAximmMasterPort(port_name, &aximm_req_interface[ch_id], _dataw); + } +} diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/embedding_lookup.hpp b/rad-sim/example-designs/dlrm_two_rad/modules/embedding_lookup.hpp new file mode 100644 index 0000000..19e3313 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/embedding_lookup.hpp @@ -0,0 +1,51 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +class embedding_lookup : public RADSimModule { +private: + std::vector> + _lookup_indecies_fifo; // Lookup indecies FIFO per channel + std::vector> + _base_addresses_fifo; // Base addresses FIFO per channel + unsigned int _fifo_depth; // Depth of request FIFOs + sc_vector> _fifo_full; // Signals flagging FIFOs are full + sc_vector> _id_count; // Counters for transaction IDs + unsigned int _num_received_responses; // Coutnter for received responses + std::vector _num_channels_per_ctrl; // # channels / controller + unsigned int _total_num_channels; // Total number of memory channels + unsigned int _dataw; // Data interface bitwidth + std::vector _dst_port_names; // Mem controller port names + + unsigned int _debug_sent_request_counter; + +public: + RADSimDesignContext* radsim_design; + sc_in rst; + // Interface to driver logic + sc_in> lookup_indecies_data; + sc_in> lookup_indecies_target_channels; + sc_in> lookup_indecies_base_addresses; + sc_in lookup_indecies_valid; + sc_out lookup_indecies_ready; + // Interface to the NoC + sc_vector aximm_req_interface; + + embedding_lookup(const sc_module_name &name, unsigned int dataw, + std::vector &num_mem_channels_per_controller, + unsigned int fifo_depth, RADSimDesignContext* radsim_design); + ~embedding_lookup(); + + void Assign(); // Combinational logic process + void Tick(); // Sequential logic process + SC_HAS_PROCESS(embedding_lookup); + void RegisterModuleInfo(); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/feature_interaction.cpp b/rad-sim/example-designs/dlrm_two_rad/modules/feature_interaction.cpp new file mode 100644 index 0000000..1479095 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/feature_interaction.cpp @@ -0,0 +1,360 @@ +#include + +void ParseFeatureInteractionInstructions( + std::string &instructions_file, + std::vector &instructions, + std::string &responses_file, unsigned int &num_expected_responses) { + + std::ifstream resp_file(responses_file); + if (!resp_file) { + sim_log.log(error, "Cannot find feature interaction responses file!"); + } + std::string line; + std::getline(resp_file, line); + std::stringstream ls(line); + unsigned int lookups, num_inputs; + ls >> lookups >> num_inputs; + num_expected_responses = lookups * num_inputs; + resp_file.close(); + + std::ifstream inst_file(instructions_file); + if (!inst_file) { + sim_log.log(error, "Cannot find feature interaction instructions file!"); + } + + unsigned int mux_select; + std::string pop_signals; + while (std::getline(inst_file, line)) { + feature_interaction_inst instruction; + std::stringstream line_stream(line); + line_stream >> mux_select; + instruction.mux_select = mux_select; + line_stream >> pop_signals; + uint8_t idx = 0; + for (char &c : pop_signals) { + if (c == '1') { + instruction.fifo_pops.push_back(true); + } else { + instruction.fifo_pops.push_back(false); + } + idx++; + } + instructions.push_back(instruction); + } + inst_file.close(); +} + +feature_interaction::feature_interaction(const sc_module_name &name, + unsigned int dataw, + unsigned int element_bitwidth, + unsigned int num_mem_channels, + unsigned int fifos_depth, + unsigned int num_output_channels, + std::string &instructions_file, + RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design) { + this->radsim_design = radsim_design; + _fifos_depth = fifos_depth; + _afifo_width_ratio_in = 32 / 4; + _afifo_width_ratio_out = LANES / 4; + _num_received_responses = 0; + _num_mem_channels = num_mem_channels; + _dataw = dataw; + _bitwidth = element_bitwidth; + _num_elements_wide_in = dataw / element_bitwidth; + _num_elements_narrow = _num_elements_wide_in / _afifo_width_ratio_in; + _num_elements_wide_out = _num_elements_narrow * _afifo_width_ratio_out; + _num_output_channels = num_output_channels; + _staging_counter = 0; + _staging_data.resize(_num_elements_wide_out); + + aximm_interface.init(_num_mem_channels); + axis_interface.init(_num_output_channels); + + _input_fifos.resize(_num_mem_channels); + _ififo_full.init(_num_mem_channels); + _ififo_empty.init(_num_mem_channels); + + _output_fifos.resize(_num_output_channels); + _ofifo_full.init(_num_output_channels); + _ofifo_empty.init(_num_output_channels); + + std::string resp_filename = + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id) + + "/compiler/embedding_indecies.in"; + ParseFeatureInteractionInstructions(instructions_file, _instructions, + resp_filename, _num_expected_responses); + + // Combinational logic and its sensitivity list + SC_METHOD(Assign); + sensitive << rst; + for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + sensitive << _ififo_full[ch_id]; + } + // Sequential logic and its clock/reset setup + SC_CTHREAD(Tick, clk.pos()); + reset_signal_is(rst, true); // Reset is active high + + // This function must be defined & called for any RAD-Sim module to register + // its info for automatically connecting to the NoC + this->RegisterModuleInfo(); + _debug_feature_interaction_out = new ofstream("dut_feature_interaction.out"); +} + +feature_interaction::~feature_interaction() { + delete _debug_feature_interaction_out; +} + +void feature_interaction::Assign() { + if (rst) { + for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + aximm_interface[ch_id].bready.write(false); + aximm_interface[ch_id].rready.write(false); + } + } else { + // Set ready signals to accept read/write response from the AXI-MM NoC + for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + aximm_interface[ch_id].bready.write(false); + aximm_interface[ch_id].rready.write(!_ififo_full[ch_id].read()); + } + } +} + +void feature_interaction::bv_to_data_vector(sc_bv &bitvector, + data_vector &datavector, + unsigned int num_elements) { + + unsigned int start_idx, end_idx; + for (unsigned int e = 0; e < num_elements; e++) { + start_idx = e * _bitwidth; + end_idx = (e + 1) * _bitwidth; + datavector[e] = bitvector.range(end_idx - 1, start_idx).to_int(); + } +} + +void feature_interaction::data_vector_to_bv(data_vector &datavector, + sc_bv &bitvector, + unsigned int num_elements) { + + unsigned int start_idx, end_idx; + for (unsigned int e = 0; e < num_elements; e++) { + start_idx = e * _bitwidth; + end_idx = (e + 1) * _bitwidth; + bitvector.range(end_idx - 1, start_idx) = datavector[e]; + } +} + +bool are_ififos_ready(sc_vector> &ififo_empty, + feature_interaction_inst &inst) { + + bool ready = true; + bool fifos_popped = (inst.mux_select > 0); + for (unsigned int ch_id = 0; ch_id < inst.fifo_pops.size(); ch_id++) { + if (inst.fifo_pops[ch_id]) { + fifos_popped = true; + ready &= !ififo_empty[ch_id].read(); + } + } + return (ready && fifos_popped); +} + +void feature_interaction::Tick() { + // Reset ports + for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + aximm_interface[ch_id].arvalid.write(false); + aximm_interface[ch_id].awvalid.write(false); + aximm_interface[ch_id].wvalid.write(false); + } + // feature_interaction_valid.write(false); + received_responses.write(0); + // Reset signals + for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + _ififo_full[ch_id].write(false); + _ififo_empty[ch_id].write(true); + } + for (unsigned int ch_id = 0; ch_id < _num_output_channels; ch_id++) { + _ofifo_full[ch_id].write(false); + _ofifo_empty[ch_id].write(true); + axis_interface[ch_id].tvalid.write(false); + } + _dest_ofifo.write(0); + _src_ofifo.write(0); + _pc.write(0); + wait(); + + // Always @ positive edge of the clock + while (true) { + // Accept R responses from the NoC + for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + if (_input_fifos[ch_id].size() < _fifos_depth && + aximm_interface[ch_id].rvalid.read()) { + sc_bv rdata_bv = aximm_interface[ch_id].rdata.read(); + data_vector rdata(_num_elements_wide_in); + bv_to_data_vector(rdata_bv, rdata, _num_elements_wide_in); + for (unsigned int c = 0; c < _afifo_width_ratio_in; c++) { + data_vector sliced_data(_num_elements_narrow); + for (unsigned int e = 0; e < sliced_data.size(); e++) { + sliced_data[e] = rdata[(c * sliced_data.size()) + e]; + } + _input_fifos[ch_id].push(sliced_data); + } + _num_received_responses++; + if (_num_received_responses == _num_expected_responses) { + std::cout << this->name() << ": Got all memory responses at cycle " + << GetSimulationCycle(5.0) << "!" << std::endl; + } + // std::cout << GetSimulationCycle(5.0) << " === " + // << "Pushed response to iFIFO " << rdata << std::endl; + } + } + + // Pop from input FIFOs to staging register + bool ififos_ready = + are_ififos_ready(_ififo_empty, _instructions[_pc.read()]); + if (ififos_ready && !_ofifo_full[_dest_ofifo.read()]) { + // Pick the right iFIFO (or zeros) to push to staging register + unsigned int mux_select = _instructions[_pc.read()].mux_select; + if (mux_select == _num_mem_channels + 1) { + for (unsigned int e = 0; e < _num_elements_narrow; e++) { + _staging_data[(_staging_counter * _num_elements_narrow) + e] = 0; + } + } else if (mux_select > 0) { + data_vector popped_data = _input_fifos[mux_select - 1].front(); + for (unsigned int e = 0; e < _num_elements_narrow; e++) { + _staging_data[(_staging_counter * _num_elements_narrow) + e] = + popped_data[e]; + } + } + + if (mux_select > 0) { + if (_staging_counter == _afifo_width_ratio_out - 1) { + _staging_counter = 0; + _output_fifos[_dest_ofifo.read()].push(_staging_data); + bool padding = true; + for (unsigned int i = 0; i < _staging_data.size(); i++) { + if (_staging_data[i] != 0) { + padding = false; + break; + } + } + if (!padding) { + *_debug_feature_interaction_out << _staging_data << "\n"; + } + _debug_feature_interaction_out->flush(); + if (_dest_ofifo.read() == _num_output_channels - 1) { + _dest_ofifo.write(0); + } else { + _dest_ofifo.write(_dest_ofifo.read() + 1); + } + } else { + _staging_counter++; + } + } + + // Pop selected iFIFOs + for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + if (_instructions[_pc.read()].fifo_pops[ch_id]) { + _input_fifos[ch_id].pop(); + } + } + + // Advance Instructions Pointer + if (_pc.read() == _instructions.size() - 1) { + _pc.write(0); + assert(_staging_counter == 0); + } else { + _pc.write(_pc.read() + 1); + } + } + + // Interface with AXI-S NoC + for (unsigned int ch_id = 0; ch_id < _num_output_channels; ch_id++) { + if (axis_interface[ch_id].tready.read() && + axis_interface[ch_id].tvalid.read()) { + _output_fifos[ch_id].pop(); + // std::cout << "FI sent out vector to MVM " << ch_id << " at cycle " + // << GetSimulationCycle(5.0) << std::endl; + } + + if (!_output_fifos[ch_id].empty()) { + data_vector tx_tdata = _output_fifos[ch_id].front(); + sc_bv tx_tdata_bv; + data_vector_to_bv(tx_tdata, tx_tdata_bv, _num_elements_wide_out); + axis_interface[ch_id].tvalid.write(true); + axis_interface[ch_id].tdata.write(tx_tdata_bv); + axis_interface[ch_id].tuser.write(3 << 13); + axis_interface[ch_id].tid.write(0); + std::string dest_name = + "layer0_mvm" + std::to_string(ch_id) + ".rx_interface"; + sc_bv dest_id_concat = radsim_design->GetPortDestinationID(dest_name); + DEST_RAD(dest_id_concat) = radsim_design->rad_id; + axis_interface[ch_id].tdest.write( + dest_id_concat); + //radsim_design->GetPortDestinationID(dest_name)); + } else { + axis_interface[ch_id].tvalid.write(false); + } + } + + // Interface with testbench + /*if (!_ofifo_empty[_src_ofifo.read()] && feature_interaction_ready.read()) + { feature_interaction_valid.write(true); + feature_interaction_odata.write(_output_fifos[_src_ofifo.read()].front()); + _output_fifos[_src_ofifo.read()].pop(); + if (_src_ofifo.read() == _num_output_channels - 1) { + _src_ofifo.write(0); + } else { + _src_ofifo.write(_src_ofifo.read() + 1); + } + } else { + feature_interaction_valid.write(false); + }*/ + + // Set FIFO signals + for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + _ififo_empty[ch_id].write(_input_fifos[ch_id].empty()); + _ififo_full[ch_id].write(_input_fifos[ch_id].size() >= + (_fifos_depth - _afifo_width_ratio_in)); + } + for (unsigned int ch_id = 0; ch_id < _num_output_channels; ch_id++) { + _ofifo_empty[ch_id].write(_output_fifos[ch_id].empty()); + _ofifo_full[ch_id].write(_output_fifos[ch_id].size() >= _fifos_depth - 2); + } + received_responses.write(_num_received_responses); + /*for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + std::cout << "iFIFO " << ch_id + << " occupancy = " << _input_fifos[ch_id].size() << std::endl; + } + for (unsigned int ch_id = 0; ch_id < _num_output_channels; ch_id++) { + std::cout << "oFIFO " << ch_id + << " occupancy = " << _output_fifos[ch_id].size() << std::endl; + } + for (unsigned int i = 0; i < _num_mem_channels; i++) { + std::cout << this->name() << " - " << i << ": " << _input_fifos[i].size() + << std::endl; + } + for (unsigned int i = 0; i < _num_output_channels; i++) { + std::cout << this->name() << " - " << i << ": " << _output_fifos[i].size() + << std::endl; + }*/ + wait(); + } +} + +void feature_interaction::RegisterModuleInfo() { + std::string port_name; + _num_noc_axis_slave_ports = 0; + _num_noc_axis_master_ports = 0; + _num_noc_aximm_slave_ports = 0; + _num_noc_aximm_master_ports = 0; + + for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { + port_name = module_name + ".aximm_interface_" + std::to_string(ch_id); + RegisterAximmMasterPort(port_name, &aximm_interface[ch_id], _dataw); + } + + for (unsigned int ch_id = 0; ch_id < _num_output_channels; ch_id++) { + port_name = module_name + ".axis_interface_" + std::to_string(ch_id); + RegisterAxisMasterPort(port_name, &axis_interface[ch_id], DATAW, 0); + } +} diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/feature_interaction.hpp b/rad-sim/example-designs/dlrm_two_rad/modules/feature_interaction.hpp new file mode 100644 index 0000000..88e1528 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/feature_interaction.hpp @@ -0,0 +1,79 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct feature_interaction_inst { + unsigned int mux_select; + std::vector fifo_pops; +}; + +class feature_interaction : public RADSimModule { +private: + unsigned int _fifos_depth; // Depth of input/output FIFOs + unsigned int _afifo_width_ratio_in; + unsigned int _afifo_width_ratio_out; + std::vector _instructions; // Instruction mem + sc_signal _pc; // Program counter + + std::vector>> _input_fifos; // Input FIFOs + sc_vector> _ififo_full; // Signals FIFOs full + sc_vector> _ififo_empty; // Signals iFIFOs empty + + std::vector>> _output_fifos; // Output FIFO + sc_vector> _ofifo_full; // Signals oFIFO full + sc_vector> _ofifo_empty; // Signals oFIFO empty + sc_signal _dest_ofifo, _src_ofifo; + data_vector _staging_data; + unsigned int _staging_counter; + + unsigned int _num_mem_channels; // No. of memory channels + unsigned int _dataw; // Data interface bitwidth + unsigned int _num_received_responses; + unsigned int _num_elements_wide_in; + unsigned int _num_elements_narrow; + unsigned int _num_elements_wide_out; + unsigned int _bitwidth; + unsigned int _num_output_channels; + unsigned int _num_expected_responses; + + ofstream *_debug_feature_interaction_out; + +public: + RADSimDesignContext* radsim_design; + sc_in rst; + // Interface to driver logic + sc_out received_responses; + // Interface to the NoC + sc_vector aximm_interface; + sc_vector axis_interface; + + feature_interaction(const sc_module_name &name, unsigned int dataw, + unsigned int element_bitwidth, + unsigned int num_mem_channels, unsigned int fifos_depth, + unsigned int num_output_channels, + std::string &instructions_file, + RADSimDesignContext* radsim_design); + ~feature_interaction(); + + void Assign(); // Combinational logic process + void Tick(); // Sequential logic process + void bv_to_data_vector(sc_bv &bitvector, + data_vector &datavector, + unsigned int num_elements); + void data_vector_to_bv(data_vector &datavector, + sc_bv &bitvector, + unsigned int num_elements); + SC_HAS_PROCESS(feature_interaction); + void RegisterModuleInfo(); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/fifo.cpp b/rad-sim/example-designs/dlrm_two_rad/modules/fifo.cpp new file mode 100644 index 0000000..a7aef00 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/fifo.cpp @@ -0,0 +1,86 @@ +#include + +template +fifo::fifo(const sc_module_name &name, unsigned int depth, + unsigned int width, unsigned int almost_full_size, + unsigned int almost_empty_size) + : sc_module(name), wen("wen"), wdata("wdata"), ren("ren"), rdata("rdata"), + full("full"), almost_full("almost_full"), empty("empty"), + almost_empty("almost_empty") { + + dwidth = width; + capacity = depth; + fifo_almost_full_size = almost_full_size; + fifo_almost_empty_size = almost_empty_size; + + // Set clock and reset signal for SC_CTHREAD + SC_CTHREAD(Tick, clk.pos()); + reset_signal_is(rst, true); +} + +template fifo::~fifo() {} + +template bool fifo::not_full() { + return mem.size() < capacity; +} + +template unsigned int fifo::occupancy() { + return mem.size(); +} + +template void fifo::Tick() { + // Reset logic + while (!mem.empty()) + mem.pop(); + empty.write(true); + almost_empty.write(true); + full.write(false); + almost_full.write(false); + wait(); + + // Sequential logic + while (true) { + // Pop from queue if read enable signal is triggered and there is data in + // the FIFO + if (ren.read()) { + if (mem.size() == 0) + sim_log.log(error, "FIFO is underflowing!", this->name()); + mem.pop(); + } + + // Push data into the FIFO if there is enough space + if (wen.read()) { + if (mem.size() == capacity) + sim_log.log(error, "FIFO is overflowing!", this->name()); + data_vector wdata_temp = wdata.read(); + std::vector temp(wdata_temp.size()); + for (unsigned int element_id = 0; element_id < wdata_temp.size(); + element_id++) + temp[element_id] = wdata_temp[element_id]; + mem.push(temp); + } + + // Update FIFO status signals + empty.write(mem.empty()); + almost_empty.write(mem.size() <= fifo_almost_empty_size); + full.write(mem.size() == capacity); + almost_full.write(mem.size() >= fifo_almost_full_size); + + // Set FIFO read data output to the top of the queue -- a vector of zeros is + // produced if the queue is empty + if (mem.size() == 0) { + std::vector temp(dwidth, 0); + rdata.write(data_vector(temp)); + } else { + std::vector temp = mem.front(); + rdata.write(data_vector(temp)); + } + + wait(); + } +} + +template class fifo; +template class fifo>; +template class fifo>; +template class fifo>; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/fifo.hpp b/rad-sim/example-designs/dlrm_two_rad/modules/fifo.hpp new file mode 100644 index 0000000..857ba99 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/fifo.hpp @@ -0,0 +1,42 @@ +#pragma once + +#include +#include +#include +#include +#include + +// This class defines a vector FIFO module. This is a "peek" FIFO where the read +// data port always shows the top of the FIFO and the read enable signal is an +// acknowledgement signal (equivalent to pop in a software queue) +template class fifo : public sc_module { +private: + unsigned int capacity; // Depth of the FIFO + unsigned int dwidth; // Width of the FIFO in number of vector elements + unsigned int fifo_almost_empty_size, + fifo_almost_full_size; // Occupancy when FIFO is considered almost + // full/empty + std::queue> mem; // FIFO storage implemented as a C++ queue + +public: + sc_in clk; + sc_in rst; + sc_in wen; + sc_in> wdata; + sc_in ren; + sc_out> rdata; + sc_out full; + sc_out almost_full; + sc_out empty; + sc_out almost_empty; + + fifo(const sc_module_name &name, unsigned int depth, unsigned int width, + unsigned int almost_full_size, unsigned int almost_empty_size); + ~fifo(); + + bool not_full(); + unsigned int occupancy(); + + void Tick(); + SC_HAS_PROCESS(fifo); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/instructions.cpp b/rad-sim/example-designs/dlrm_two_rad/modules/instructions.cpp new file mode 100644 index 0000000..0ca819d --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/instructions.cpp @@ -0,0 +1,63 @@ +#include + +mvm_inst::mvm_inst() + : en(false), jump(false), reduce(false), accum(0), accum_en(false), + release(false), raddr(0), last(false), dest_layer(-1), dest_mvm(0) {} + +bool mvm_inst::operator==(const mvm_inst &rhs) { + return (en == rhs.en) && (jump == rhs.jump) && (reduce == rhs.reduce) && + (accum == rhs.accum) && (accum_en == rhs.accum_en) && + (release == rhs.release) && (raddr == rhs.raddr) && + (last == rhs.last) && (dest_layer == rhs.dest_layer) && + (dest_mvm == rhs.dest_mvm); +} + +void mvm_inst::from_bv(const sc_bv &inst_bv) { + this->en = inst_bv.range(0, 0).to_uint(); + this->jump = inst_bv.range(1, 1).to_uint(); + this->reduce = inst_bv.range(2, 2).to_uint(); + this->accum = inst_bv.range(11, 3).to_uint(); + this->accum_en = inst_bv.range(12, 12).to_uint(); + this->release = inst_bv.range(13, 13).to_uint(); + this->raddr = inst_bv.range(22, 14).to_uint(); + this->last = inst_bv.range(23, 23).to_uint(); + this->dest_layer = inst_bv.range(28, 24).to_int(); + this->dest_mvm = inst_bv.range(33, 29).to_uint(); +} + +sc_bv mvm_inst::to_bv() { + sc_bv inst_bv; + inst_bv.range(0, 0) = this->en; + inst_bv.range(1, 1) = this->jump; + inst_bv.range(2, 2) = this->reduce; + inst_bv.range(11, 3) = this->accum; + inst_bv.range(12, 12) = this->accum_en; + inst_bv.range(13, 13) = this->release; + inst_bv.range(22, 14) = this->raddr; + inst_bv.range(23, 23) = this->last; + inst_bv.range(28, 24) = this->dest_layer; + inst_bv.range(33, 29) = this->dest_mvm; + return inst_bv; +} + +ostream &operator<<(ostream &o, const mvm_inst &inst) { + o << "{ en:" << inst.en << " jump:" << inst.jump << " reduce:" << inst.reduce + << " accum:" << inst.accum << " accum_en:" << inst.accum_en + << " release:" << inst.release << " raddr:" << inst.raddr + << " last:" << inst.last << " dest_layer:" << inst.dest_layer + << " dest_mvm:" << inst.dest_mvm << " }"; + return o; +} + +void sc_trace(sc_trace_file *f, const mvm_inst &inst, const std::string &s) { + sc_trace(f, inst.en, s + "_inst_en"); + sc_trace(f, inst.jump, s + "_inst_jump"); + sc_trace(f, inst.reduce, s + "_inst_reduce"); + sc_trace(f, inst.accum, s + "_inst_accum"); + sc_trace(f, inst.accum_en, s + "_inst_accum_en"); + sc_trace(f, inst.release, s + "_inst_release"); + sc_trace(f, inst.raddr, s + "_inst_raddr"); + sc_trace(f, inst.last, s + "_inst_last"); + sc_trace(f, inst.dest_layer, s + "_dest_layer"); + sc_trace(f, inst.dest_mvm, s + "_dest_mvm"); +} \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/instructions.hpp b/rad-sim/example-designs/dlrm_two_rad/modules/instructions.hpp new file mode 100644 index 0000000..b00149b --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/instructions.hpp @@ -0,0 +1,25 @@ +#pragma once + +#include +#include + +class mvm_inst : public std::error_code { +public: + bool en; + bool jump; + bool reduce; + unsigned int accum; + bool accum_en; + bool release; + unsigned int raddr; + bool last; + sc_int<5> dest_layer; + sc_uint<5> dest_mvm; + + mvm_inst(); + bool operator==(const mvm_inst &rhs); + void from_bv(const sc_bv &inst_bv); + sc_bv to_bv(); + friend ostream &operator<<(ostream &o, const mvm_inst &inst); +}; +void sc_trace(sc_trace_file *f, const mvm_inst &inst, const std::string &s); \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/mvm.cpp b/rad-sim/example-designs/dlrm_two_rad/modules/mvm.cpp new file mode 100644 index 0000000..93ec3ca --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/mvm.cpp @@ -0,0 +1,612 @@ +#include + +bool ParseInstructions(std::vector &inst_mem, + const std::string &inst_filename) { + std::ifstream inst_file(inst_filename); + if (!inst_file) + return false; + + std::string line; + unsigned int addr = 0; + while (std::getline(inst_file, line)) { + std::stringstream line_stream(line); + mvm_inst inst; + unsigned int value; + line_stream >> value; + inst.en = value; + line_stream >> value; + inst.jump = value; + line_stream >> value; + inst.reduce = value; + line_stream >> value; + inst.accum = value; + line_stream >> value; + inst.accum_en = value; + line_stream >> value; + inst.release = value; + line_stream >> value; + inst.raddr = value; + line_stream >> value; + inst.last = value; + line_stream >> value; + inst.dest_layer = value; + line_stream >> value; + inst.dest_mvm = value; + inst_mem[addr] = inst; + addr++; + } + return true; +} + +mvm::mvm(const sc_module_name &name, unsigned int id_mvm, unsigned int id_layer, + const std::string &inst_filename, RADSimDesignContext* radsim_design) + : RADSimModule(name, radsim_design), matrix_mem_rdata("matrix_mem_rdata", DOT_PRODUCTS), + matrix_mem_wen("matrix_mem_wen", DOT_PRODUCTS), + ififo_pipeline("ififo_pipeline", RF_RD_LATENCY), + reduce_pipeline("reduce_pipeline", RF_RD_LATENCY), + result_pipeline("result_pipeline", COMPUTE_LATENCY), + valid_pipeline("valid_pipeline", COMPUTE_LATENCY + RF_RD_LATENCY), + release_pipeline("release_pipeline", RF_RD_LATENCY), + accum_en_pipeline("accum_en_pipeline", RF_RD_LATENCY), + accum_pipeline("accum_pipeline", RF_RD_LATENCY), + dest_layer_pipeline("dest_layer_pipeline", + COMPUTE_LATENCY + RF_RD_LATENCY), + dest_mvm_pipeline("mvm_layer_pipeline", COMPUTE_LATENCY + RF_RD_LATENCY), + tdata_vec(LANES), result(DOT_PRODUCTS), rst("rst") { + + this->radsim_design = radsim_design; + module_name = name; + mvm_id = id_mvm; + layer_id = id_layer; + + inst_memory.resize(INST_MEM_DEPTH); + if (!inst_filename.empty()) { + if (!ParseInstructions(inst_memory, inst_filename)) { + std::cerr << "Parsing instructions failed!" << std::endl; + exit(1); + } + } + accum_memory.resize(ACCUM_MEM_DEPTH); + + char mem_name[25]; + std::string mem_name_str; + matrix_memory.resize(DOT_PRODUCTS); + std::string mvm_dir = + radsim_config.GetStringKnobPerRad("radsim_user_design_root_dir", radsim_design->rad_id); + std::string mem_init_file; + for (unsigned int dot_id = 0; dot_id < DOT_PRODUCTS; dot_id++) { + mem_init_file = mvm_dir + "/compiler/mvm_weights/layer" + + std::to_string(layer_id) + "_mvm" + std::to_string(mvm_id) + + "_dot" + std::to_string(dot_id) + ".dat"; + mem_name_str = + "mvm" + std::to_string(mvm_id) + "_matrix_mem" + std::to_string(dot_id); + std::strcpy(mem_name, mem_name_str.c_str()); + matrix_memory[dot_id] = new register_file( + mem_name, dot_id, RF_MEM_DEPTH, LANES, mem_init_file); + matrix_memory[dot_id]->clk(clk); + matrix_memory[dot_id]->rst(rst); + matrix_memory[dot_id]->raddr(matrix_mem_raddr); + matrix_memory[dot_id]->wdata(matrix_mem_wdata); + matrix_memory[dot_id]->waddr(matrix_mem_waddr); + matrix_memory[dot_id]->wen(matrix_mem_wen[dot_id]); + matrix_memory[dot_id]->clk_en(matrix_mem_clk_en); + matrix_memory[dot_id]->rdata(matrix_mem_rdata[dot_id]); + } + + char fifo_name[25]; + std::string fifo_name_str; + fifo_name_str = "mvm" + std::to_string(mvm_id) + "_ififo"; + std::strcpy(fifo_name, fifo_name_str.c_str()); + ififo = new fifo(fifo_name, FIFO_SIZE, LANES, FIFO_SIZE - 4, 0); + ififo->clk(clk); + ififo->rst(rst); + ififo->wen(ififo_wen_signal); + ififo->ren(ififo_ren_signal); + ififo->wdata(ififo_wdata_signal); + ififo->full(ififo_full_signal); + ififo->almost_full(ififo_almost_full_signal); + ififo->empty(ififo_empty_signal); + ififo->almost_empty(ififo_almost_empty_signal); + ififo->rdata(ififo_rdata_signal); + + fifo_name_str = "mvm" + std::to_string(mvm_id) + "_reduce_fifo"; + std::strcpy(fifo_name, fifo_name_str.c_str()); + reduce_fifo = + new fifo(fifo_name, FIFO_SIZE, LANES, FIFO_SIZE - 4, 0); + reduce_fifo->clk(clk); + reduce_fifo->rst(rst); + reduce_fifo->wen(reduce_fifo_wen_signal); + reduce_fifo->ren(reduce_fifo_ren_signal); + reduce_fifo->wdata(reduce_fifo_wdata_signal); + reduce_fifo->full(reduce_fifo_full_signal); + reduce_fifo->almost_full(reduce_fifo_almost_full_signal); + reduce_fifo->empty(reduce_fifo_empty_signal); + reduce_fifo->almost_empty(reduce_fifo_almost_empty_signal); + reduce_fifo->rdata(reduce_fifo_rdata_signal); + + fifo_name_str = "mvm" + std::to_string(mvm_id) + "_ofifo"; + std::strcpy(fifo_name, fifo_name_str.c_str()); + ofifo = new fifo(fifo_name, FIFO_SIZE, LANES, + FIFO_SIZE - COMPUTE_LATENCY - RF_RD_LATENCY - 4, 0); + ofifo->clk(clk); + ofifo->rst(rst); + ofifo->wen(ofifo_wen_signal); + ofifo->ren(ofifo_ren_signal); + ofifo->wdata(ofifo_wdata_signal); + ofifo->full(ofifo_full_signal); + ofifo->almost_full(ofifo_almost_full_signal); + ofifo->empty(ofifo_empty_signal); + ofifo->almost_empty(ofifo_almost_empty_signal); + ofifo->rdata(ofifo_rdata_signal); + + fifo_name_str = "mvm" + std::to_string(mvm_id) + "_dl_fifo"; + std::strcpy(fifo_name, fifo_name_str.c_str()); + dl_fifo = + new fifo>(fifo_name, FIFO_SIZE, 1, + FIFO_SIZE - COMPUTE_LATENCY - RF_RD_LATENCY - 4, 0); + dl_fifo->clk(clk); + dl_fifo->rst(rst); + dl_fifo->wen(dl_fifo_wen_signal); + dl_fifo->ren(dl_fifo_ren_signal); + dl_fifo->wdata(dl_fifo_wdata_signal); + dl_fifo->full(dl_fifo_full_signal); + dl_fifo->almost_full(dl_fifo_almost_full_signal); + dl_fifo->empty(dl_fifo_empty_signal); + dl_fifo->almost_empty(dl_fifo_almost_empty_signal); + dl_fifo->rdata(dl_fifo_rdata_signal); + + fifo_name_str = "mvm" + std::to_string(mvm_id) + "_dm_fifo"; + std::strcpy(fifo_name, fifo_name_str.c_str()); + dm_fifo = + new fifo>(fifo_name, FIFO_SIZE, 1, + FIFO_SIZE - COMPUTE_LATENCY - RF_RD_LATENCY - 4, 0); + dm_fifo->clk(clk); + dm_fifo->rst(rst); + dm_fifo->wen(dm_fifo_wen_signal); + dm_fifo->ren(dm_fifo_ren_signal); + dm_fifo->wdata(dm_fifo_wdata_signal); + dm_fifo->full(dm_fifo_full_signal); + dm_fifo->almost_full(dm_fifo_almost_full_signal); + dm_fifo->empty(dm_fifo_empty_signal); + dm_fifo->almost_empty(dm_fifo_almost_empty_signal); + dm_fifo->rdata(dm_fifo_rdata_signal); + + SC_METHOD(Assign); + sensitive << rst << ofifo_almost_full_signal << ofifo_rdata_signal + << tx_input_interface.tvalid << tx_input_interface.tready + << tx_reduce_interface.tvalid << tx_reduce_interface.tready + << rx_input_interface.tuser << rx_reduce_interface.tuser + << ififo_almost_full_signal << reduce_fifo_almost_full_signal + << result_pipeline[COMPUTE_LATENCY - 1] + << valid_pipeline[RF_RD_LATENCY + COMPUTE_LATENCY - 1] + << ififo_empty_signal << reduce_fifo_empty_signal << next_inst << pc + << dl_fifo_rdata_signal << dm_fifo_rdata_signal + << dest_layer_pipeline[RF_RD_LATENCY + COMPUTE_LATENCY - 1] + << dest_mvm_pipeline[RF_RD_LATENCY + COMPUTE_LATENCY - 1] + << dl_fifo_rdata_signal << dm_fifo_rdata_signal + << ofifo_empty_signal; + SC_CTHREAD(Tick, clk.pos()); + reset_signal_is(rst, true); + + this->RegisterModuleInfo(); +} + +mvm::~mvm() { delete ofifo; } + +int16_t dot(data_vector v1, data_vector v2) { + int16_t res = 0; + for (unsigned int element_id = 0; element_id < v1.size(); element_id++) { + res += (v1[element_id] * v2[element_id]); + } + return res; +} + +void mvm::Tick() { + if (radsim_design->rad_id == 1) { + // Reset logic + for (unsigned int lane_id = 0; lane_id < LANES; lane_id++) { + tdata_vec[lane_id] = 0; + } + pc.write(0); + mvm_inst rst_inst; + // next_inst.write(rst_inst); + wait(); + // Sequential logic + while (true && (radsim_design->rad_id == 1)) { + /*std::cout << this->name() << " iFIFO occ: " << ififo->occupancy() + << " rFIFO occ: " << reduce_fifo->occupancy() + << " oFIFO occ: " << ofifo->occupancy() + << " dlFIFO occ: " << dl_fifo->occupancy() + << " dmFIFO occ: " << dm_fifo->occupancy() + << " tvalid: " << tx_input_interface.tvalid.read() + << " tready: " << tx_input_interface.tready.read() << std::endl;*/ + // Instruction issue logic + // next_inst.write(inst_memory[pc.read()]); + + // Compute logic + if (dot_reduce_op) { + ififo_pipeline[0].write(ififo_rdata_signal.read()); + reduce_pipeline[0].write(reduce_fifo_rdata_signal.read()); + // std::cout << "Dot-Reduce op @ MVM (" << layer_id << ", " << mvm_id << + // ")" << std::endl; + valid_pipeline[0].write(true); + accum_pipeline[0].write(next_inst.read().accum); + accum_en_pipeline[0].write(next_inst.read().accum_en); + release_pipeline[0].write(next_inst.read().release); + dest_layer_pipeline[0].write(next_inst.read().dest_layer); + dest_mvm_pipeline[0].write(next_inst.read().dest_mvm); + pc.write(pc.read() + 1); + } else if (dot_op) { + // std::cout << "Dot op @ MVM (" << layer_id << ", " << mvm_id << ")" << + // std::endl; + data_vector zeros(LANES); + ififo_pipeline[0].write(ififo_rdata_signal.read()); + reduce_pipeline[0].write(zeros); + valid_pipeline[0].write(true); + accum_pipeline[0].write(next_inst.read().accum); + accum_en_pipeline[0].write(next_inst.read().accum_en); + release_pipeline[0].write(next_inst.read().release); + dest_layer_pipeline[0].write(next_inst.read().dest_layer); + dest_mvm_pipeline[0].write(next_inst.read().dest_mvm); + pc.write(pc.read() + 1); + // if (mvm_id == 0 && layer_id == 0 && pc.read() == 0) { + // std::cout << "MVMs started compute at cycle " << + // GetSimulationCycle(5.0) + // << std::endl; + //} + } else if (next_inst.read().en && next_inst.read().jump) { + valid_pipeline[0].write(false); + pc.write(next_inst.read().raddr); + // if (mvm_id == 1 && layer_id == 2) { + // std::cout << "MVMs finished compute at cycle " + // << GetSimulationCycle(5.0) << std::endl; + //} + } else { + valid_pipeline[0].write(false); + } + + if (valid_pipeline[RF_RD_LATENCY - 1].read()) { + data_vector reduce_vector = + reduce_pipeline[RF_RD_LATENCY - 1].read(); + unsigned int accum_addr = accum_pipeline[RF_RD_LATENCY - 1].read(); + bool accum_en = accum_en_pipeline[RF_RD_LATENCY - 1].read(); + data_vector accum_operand = accum_memory[accum_addr]; + + for (unsigned int dot_id = 0; dot_id < DOT_PRODUCTS; dot_id++) { + result[dot_id] = dot(ififo_pipeline[RF_RD_LATENCY - 1].read(), + matrix_mem_rdata[dot_id].read()); + result[dot_id] += reduce_vector[dot_id]; + if (accum_en) { + result[dot_id] += accum_operand[dot_id]; + } + } + accum_memory[accum_addr] = result; + result_pipeline[0].write(result); + // std::cout << "Result: " << result << std::endl; + } + + // Advance pipelines + for (unsigned int stage_id = 1; stage_id < RF_RD_LATENCY; stage_id++) { + ififo_pipeline[stage_id].write(ififo_pipeline[stage_id - 1].read()); + reduce_pipeline[stage_id].write(reduce_pipeline[stage_id - 1].read()); + valid_pipeline[stage_id].write(valid_pipeline[stage_id - 1].read()); + accum_pipeline[stage_id].write(accum_pipeline[stage_id - 1].read()); + accum_en_pipeline[stage_id].write(accum_en_pipeline[stage_id - 1].read()); + release_pipeline[stage_id].write(release_pipeline[stage_id - 1].read()); + dest_layer_pipeline[stage_id].write( + dest_layer_pipeline[stage_id - 1].read()); + dest_mvm_pipeline[stage_id].write(dest_mvm_pipeline[stage_id - 1].read()); + } + valid_pipeline[RF_RD_LATENCY].write( + valid_pipeline[RF_RD_LATENCY - 1].read() && + release_pipeline[RF_RD_LATENCY - 1].read()); + dest_layer_pipeline[RF_RD_LATENCY].write( + dest_layer_pipeline[RF_RD_LATENCY - 1].read()); + dest_mvm_pipeline[RF_RD_LATENCY].write( + dest_mvm_pipeline[RF_RD_LATENCY - 1].read()); + for (unsigned int stage_id = 1; stage_id < COMPUTE_LATENCY; stage_id++) { + result_pipeline[stage_id].write(result_pipeline[stage_id - 1].read()); + valid_pipeline[RF_RD_LATENCY + stage_id].write( + valid_pipeline[RF_RD_LATENCY + stage_id - 1].read()); + dest_layer_pipeline[RF_RD_LATENCY + stage_id].write( + dest_layer_pipeline[RF_RD_LATENCY + stage_id - 1].read()); + dest_mvm_pipeline[RF_RD_LATENCY + stage_id].write( + dest_mvm_pipeline[RF_RD_LATENCY + stage_id - 1].read()); + } + + if (rx_input_interface.tvalid.read() && rx_input_interface.tready.read()) { + sc_bv tdata = rx_input_interface.tdata.read(); + data_vector tdatavector(32); + unsigned int start_idx, end_idx; + for (unsigned int e = 0; e < 32; e++) { + start_idx = e * 16; + end_idx = (e + 1) * 16; + tdatavector[e] = tdata.range(end_idx - 1, start_idx).to_int(); + } + //if (layer_id == 0) std::cout << "got tdatavector on rad " << radsim_design->rad_id << ": " << tdatavector << std::endl; + // sc_bv<7> testing_width = "1000110"; + // std::cout << "testing_width.to_uint64(): " << testing_width.to_uint64() << std::endl; + if (rx_input_interface.tuser.read().range(15, 13).to_uint() == 1) { + unsigned int waddr = + rx_input_interface.tuser.read().range(8, 0).to_uint(); + mvm_inst inst; + inst.from_bv(rx_input_interface.tdata.read()); + inst_memory[waddr] = inst; + ififo_wen_signal.write(false); + for (unsigned int dot_id = 0; dot_id < DOT_PRODUCTS; dot_id++) { + matrix_mem_wen[dot_id].write(false); + } + } else if (rx_input_interface.tuser.read().range(15, 13).to_uint() > 1) { + // Read rx tdata into a vector + for (unsigned int lane_id = 0; lane_id < LANES; lane_id++) { + tdata_vec[lane_id] = + tdata.range((lane_id + 1) * BITWIDTH - 1, lane_id * BITWIDTH) + .to_int(); + } + + // Push the data vector into the right FIFO/memory + if (rx_input_interface.tuser.read().range(15, 13).to_uint() == + 3) { // Input FIFO + ififo_wdata_signal.write(tdata_vec); + ififo_wen_signal.write(true); + for (unsigned int dot_id = 0; dot_id < DOT_PRODUCTS; dot_id++) { + matrix_mem_wen[dot_id].write(false); + } + // if (mvm_id == 0 && layer_id == 0) + // std::cout << tdata_vec << std::endl; + } else if (rx_input_interface.tuser.read().range(15, 13).to_uint() == + 4) { // Matrix memory + unsigned int waddr = + rx_input_interface.tuser.read().range(8, 0).to_uint(); + unsigned int wen_id = + rx_input_interface.tuser.read().range(12, 9).to_uint(); + matrix_mem_waddr.write(waddr); + matrix_mem_wdata.write(tdata_vec); + for (unsigned int dot_id = 0; dot_id < DOT_PRODUCTS; dot_id++) { + if (dot_id == wen_id) + matrix_mem_wen[wen_id].write(true); + else + matrix_mem_wen[dot_id].write(false); + } + ififo_wen_signal.write(false); + } else { + ififo_wen_signal.write(false); + for (unsigned int dot_id = 0; dot_id < DOT_PRODUCTS; dot_id++) { + matrix_mem_wen[dot_id].write(false); + } + } + } else { + ififo_wen_signal.write(false); + for (unsigned int dot_id = 0; dot_id < DOT_PRODUCTS; dot_id++) { + matrix_mem_wen[dot_id].write(false); + } + } + } else { + ififo_wen_signal.write(false); + for (unsigned int dot_id = 0; dot_id < DOT_PRODUCTS; dot_id++) { + matrix_mem_wen[dot_id].write(false); + } + } + + if (rx_reduce_interface.tvalid.read() && + rx_reduce_interface.tready.read()) { + sc_bv tdata = rx_reduce_interface.tdata.read(); + assert(rx_reduce_interface.tuser.read().range(15, 13).to_uint() == 2); + + // Read rx tdata into a vector + for (unsigned int lane_id = 0; lane_id < LANES; lane_id++) { + tdata_vec[lane_id] = + tdata.range((lane_id + 1) * BITWIDTH - 1, lane_id * BITWIDTH) + .to_int(); + } + + reduce_fifo_wdata_signal.write(tdata_vec); + reduce_fifo_wen_signal.write(true); + // std::cout << this->name() << " Write to reduce FIFO" << std::endl; + // std::cout << tdata_vec << std::endl; + } else { + reduce_fifo_wen_signal.write(false); + } + wait(); + } + } +} + +void mvm::Assign() { + if (rst.read()) { + rx_input_interface.tready.write(false); + rx_reduce_interface.tready.write(false); + tx_input_interface.tdata.write(0); + tx_input_interface.tvalid.write(false); + tx_input_interface.tstrb.write((2 << AXIS_STRBW) - 1); + tx_input_interface.tkeep.write((2 << AXIS_KEEPW) - 1); + tx_input_interface.tlast.write(0); + tx_input_interface.tuser.write(0); + tx_reduce_interface.tdata.write(0); + tx_reduce_interface.tvalid.write(false); + tx_reduce_interface.tstrb.write((2 << AXIS_STRBW) - 1); + tx_reduce_interface.tkeep.write((2 << AXIS_KEEPW) - 1); + tx_reduce_interface.tlast.write(0); + tx_reduce_interface.tuser.write(0); + ififo_ren_signal.write(false); + reduce_fifo_ren_signal.write(false); + ofifo_wen_signal.write(false); + ofifo_ren_signal.write(false); + dl_fifo_ren_signal.write(false); + dm_fifo_ren_signal.write(false); + matrix_mem_clk_en.write(false); + matrix_mem_raddr.write(0); + dot_op.write(false); + dot_reduce_op.write(false); + } else if (radsim_design->rad_id == 1) { + if (rx_input_interface.tuser.read().range(15, 13).to_uint() == + 1) { // Inst memory + rx_input_interface.tready.write(true); + } else if (rx_input_interface.tuser.read().range(15, 13).to_uint() == + 3) { // Input FIFO + rx_input_interface.tready.write(!ififo_almost_full_signal.read()); + } else if (rx_input_interface.tuser.read().range(15, 13).to_uint() == + 4) { // Matrix memory + rx_input_interface.tready.write(true); + } else { + rx_input_interface.tready.write(false); + } + + // if (rx_reduce_interface.tuser.read().range(15, 13).to_uint() == + // 2) { // Reduction FIFO + rx_reduce_interface.tready.write(!reduce_fifo_almost_full_signal.read()); + //} else { + // rx_reduce_interface.tready.write(false); + //} + + matrix_mem_raddr.write(next_inst.read().raddr); + next_inst.write(inst_memory[pc.read()]); + + if (!ififo_empty_signal && !reduce_fifo_empty_signal && + !ofifo_almost_full_signal && next_inst.read().en && + !next_inst.read().jump && next_inst.read().reduce) { + ififo_ren_signal.write(next_inst.read().last); + reduce_fifo_ren_signal.write(true); + dot_reduce_op.write(true); + dot_op.write(false); + } else if (!ififo_empty_signal && !ofifo_almost_full_signal && + next_inst.read().en && !next_inst.read().jump && + !next_inst.read().reduce) { + ififo_ren_signal.write(next_inst.read().last); + reduce_fifo_ren_signal.write(false); + dot_op.write(true); + dot_reduce_op.write(false); + } else { + ififo_ren_signal.write(false); + reduce_fifo_ren_signal.write(false); + dot_op.write(false); + dot_reduce_op.write(false); + } + + ofifo_wen_signal.write( + valid_pipeline[COMPUTE_LATENCY + RF_RD_LATENCY - 1].read()); + ofifo_wdata_signal.write(result_pipeline[COMPUTE_LATENCY - 1].read()); + + data_vector> dest_layer(1); + dest_layer[0] = + dest_layer_pipeline[COMPUTE_LATENCY + RF_RD_LATENCY - 1].read(); + dl_fifo_wen_signal.write( + valid_pipeline[COMPUTE_LATENCY + RF_RD_LATENCY - 1].read()); + dl_fifo_wdata_signal.write(dest_layer); + + data_vector> dest_mvm(1); + dest_mvm[0] = dest_mvm_pipeline[COMPUTE_LATENCY + RF_RD_LATENCY - 1].read(); + dm_fifo_wen_signal.write( + valid_pipeline[COMPUTE_LATENCY + RF_RD_LATENCY - 1].read()); + dm_fifo_wdata_signal.write(dest_mvm); + + data_vector tx_tdata = ofifo_rdata_signal.read(); + data_vector> dest_layer_vec; + dest_layer_vec = dl_fifo_rdata_signal.read(); + int dest_layer_int = 0; + data_vector> dest_mvm_vec; + dest_mvm_vec = dm_fifo_rdata_signal.read(); + unsigned int dest_mvm_int = 0; + if (dest_layer_vec.size() > 0) { + dest_layer_int = dest_layer_vec[0].to_int(); + dest_mvm_int = dest_mvm_vec[0].to_uint(); + } + std::string dest_name; + unsigned int dest_id; + if (dest_layer_int == 0) { + dest_name = "output_collector.data_collect"; + } else { + dest_name = "layer" + std::to_string(dest_layer_int - 1) + "_mvm" + + std::to_string(dest_mvm_int) + ".rx_interface"; + } + dest_id = radsim_design->GetPortDestinationID(dest_name); + sc_bv dest_id_concat; + DEST_LOCAL_NODE(dest_id_concat) = dest_id; + DEST_REMOTE_NODE(dest_id_concat) = dest_id; + // if (radsim_design->rad_id == 1){ + // std::cout << "mvm.cpp on RAD " << radsim_design->rad_id << "'s dest_id: " << dest_id << " and DEST_RAD(dest_id): " << DEST_RAD(dest_id_concat) << std::endl; + // } + DEST_RAD(dest_id_concat) = radsim_design->rad_id; + unsigned int dest_interface; // which FIFO + unsigned int dest_interface_id; // added for separate ports + // If destination is the same layer, send to reduce FIFO + if ((unsigned int)dest_layer_int - 1 == layer_id) { + dest_interface = 2 << 13; + dest_interface_id = 1; + // if (tx_tdata.size() > 0 && !ofifo_empty_signal) + // std::cout << this->name() << " sending to interface 2 -- " << + // dest_layer_int << std::endl; + } + // If destination is a different layer, send to the input FIFO + else { + dest_interface = 3 << 13; + dest_interface_id = 0; + // if (tx_tdata.size() > 0 && !ofifo_empty_signal) + // std::cout << this->name() << " sending to interface 3 -- " << + // dest_layer_int << std::endl; + } + + if (tx_tdata.size() > 0 && !ofifo_empty_signal && dest_interface_id == 0) { + sc_bv tx_tdata_bv; + for (unsigned int lane_id = 0; lane_id < LANES; lane_id++) { + tx_tdata_bv.range((lane_id + 1) * BITWIDTH - 1, lane_id * BITWIDTH) = + tx_tdata[lane_id]; + } + tx_input_interface.tdata.write(tx_tdata_bv); + tx_input_interface.tvalid.write(true); + tx_input_interface.tuser.write(dest_interface); + tx_input_interface.tdest.write(dest_id_concat); //dest_id); + tx_input_interface.tid.write(dest_interface_id); + tx_reduce_interface.tvalid.write(false); + // if (mvm_id == 1 && layer_id == 2 && !ofifo_empty_signal) { + // std::cout << ">>>>>> " << tx_tdata << std::endl; + // } + // std::cout << "MVM (" << layer_id << "," << mvm_id << ") pushed data + // into the NoC with dest " << dest_id << "!" << std::endl; + } else if (tx_tdata.size() > 0 && !ofifo_empty_signal && + dest_interface_id == 1) { + sc_bv tx_tdata_bv; + for (unsigned int lane_id = 0; lane_id < LANES; lane_id++) { + tx_tdata_bv.range((lane_id + 1) * BITWIDTH - 1, lane_id * BITWIDTH) = + tx_tdata[lane_id]; + } + tx_reduce_interface.tdata.write(tx_tdata_bv); + tx_reduce_interface.tvalid.write(true); + tx_reduce_interface.tuser.write(dest_interface); + tx_reduce_interface.tdest.write(dest_id_concat); //dest_id); + tx_reduce_interface.tid.write(dest_interface_id); + tx_input_interface.tvalid.write(false); + } else { + tx_input_interface.tvalid.write(false); + tx_reduce_interface.tvalid.write(false); + } + + ofifo_ren_signal.write((tx_input_interface.tvalid.read() && + tx_input_interface.tready.read()) || + (tx_reduce_interface.tvalid.read() && + tx_reduce_interface.tready.read())); + dl_fifo_ren_signal.write((tx_input_interface.tvalid.read() && + tx_input_interface.tready.read()) || + (tx_reduce_interface.tvalid.read() && + tx_reduce_interface.tready.read())); + dm_fifo_ren_signal.write((tx_input_interface.tvalid.read() && + tx_input_interface.tready.read()) || + (tx_reduce_interface.tvalid.read() && + tx_reduce_interface.tready.read())); + } +} + +void mvm::RegisterModuleInfo() { + std::string port_name; + _num_noc_axis_slave_ports = 0; + _num_noc_axis_master_ports = 0; + + port_name = module_name + ".tx_interface"; + RegisterAxisMasterPort(port_name, &tx_input_interface, DATAW, 0); + + port_name = module_name + ".rx_interface"; + RegisterAxisSlavePort(port_name, &rx_input_interface, DATAW, 0); + + // port_name = module_name + ".rx_reduce_interface"; + // RegisterAxisSlavePort(port_name, &rx_reduce_interface, DATAW, 1); +} diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/mvm.hpp b/rad-sim/example-designs/dlrm_two_rad/modules/mvm.hpp new file mode 100644 index 0000000..8c61837 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/mvm.hpp @@ -0,0 +1,91 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +class mvm : public RADSimModule { +private: + std::string module_name; + unsigned int mvm_id; + unsigned int layer_id; + + std::vector inst_memory; + sc_signal next_inst; + sc_signal pc; + + std::vector> accum_memory; + sc_signal> next_accum; + + std::vector *> matrix_memory; + sc_vector>> matrix_mem_rdata; + sc_signal> matrix_mem_wdata; + sc_vector> matrix_mem_wen; + sc_signal matrix_mem_raddr, matrix_mem_waddr; + sc_signal matrix_mem_clk_en; + + fifo *ififo; + sc_signal> ififo_wdata_signal, ififo_rdata_signal; + sc_signal ififo_wen_signal, ififo_ren_signal, ififo_full_signal, + ififo_empty_signal, ififo_almost_full_signal, ififo_almost_empty_signal; + + fifo *reduce_fifo; + sc_signal> reduce_fifo_wdata_signal, + reduce_fifo_rdata_signal; + sc_signal reduce_fifo_wen_signal, reduce_fifo_ren_signal, + reduce_fifo_full_signal, reduce_fifo_empty_signal, + reduce_fifo_almost_full_signal, reduce_fifo_almost_empty_signal; + + sc_vector>> ififo_pipeline, reduce_pipeline, + result_pipeline; + sc_vector> valid_pipeline, release_pipeline, + accum_en_pipeline; + sc_vector> accum_pipeline; + sc_vector>> dest_layer_pipeline; + sc_vector>> dest_mvm_pipeline; + + fifo *ofifo; + sc_signal> ofifo_wdata_signal, ofifo_rdata_signal; + sc_signal ofifo_wen_signal, ofifo_ren_signal, ofifo_full_signal, + ofifo_empty_signal, ofifo_almost_full_signal, ofifo_almost_empty_signal; + + fifo> *dl_fifo; + sc_signal>> dl_fifo_wdata_signal, dl_fifo_rdata_signal; + sc_signal dl_fifo_wen_signal, dl_fifo_ren_signal, dl_fifo_full_signal, + dl_fifo_empty_signal, dl_fifo_almost_full_signal, + dl_fifo_almost_empty_signal; + + fifo> *dm_fifo; + sc_signal>> dm_fifo_wdata_signal, dm_fifo_rdata_signal; + sc_signal dm_fifo_wen_signal, dm_fifo_ren_signal, dm_fifo_full_signal, + dm_fifo_empty_signal, dm_fifo_almost_full_signal, + dm_fifo_almost_empty_signal; + + data_vector tdata_vec; + data_vector result; + sc_signal dot_op, dot_reduce_op; + +public: + RADSimDesignContext* radsim_design; + sc_in rst; + axis_slave_port rx_input_interface; + axis_slave_port rx_reduce_interface; + axis_master_port tx_input_interface; + axis_master_port tx_reduce_interface; + + mvm(const sc_module_name &name, unsigned int id_mvm, unsigned int id_layer, + const std::string &inst_filename, RADSimDesignContext* radsim_design); + ~mvm(); + + void Assign(); + void Tick(); + SC_HAS_PROCESS(mvm); + void RegisterModuleInfo(); +}; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/register_file.cpp b/rad-sim/example-designs/dlrm_two_rad/modules/register_file.cpp new file mode 100644 index 0000000..6b07972 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/register_file.cpp @@ -0,0 +1,103 @@ +#include + +template +register_file::register_file(const sc_module_name &name, unsigned int id, + unsigned int depth, unsigned int width, + std::string &init_file) + : sc_module(name), wdata_pipeline("wdata_pipeline", RF_WR_LATENCY), + waddr_pipeline("waddr_pipeline", RF_WR_LATENCY), + raddr_pipeline("raddr_pipeline", RF_RD_LATENCY), + wen_pipeline("wen_pipeline", RF_WR_LATENCY), rst("rst"), raddr("raddr"), + wdata("wdata"), waddr("waddr"), wen("wen"), clk_en("clk_en"), + rdata("rdata") { + + register_file_id = id; + num_elements_per_word = width; + mem.resize(depth); + for (unsigned int i = 0; i < depth; i++) { + mem[i].resize(width); + } + + if (!init_file.empty()) { + bool parse = + parse_register_file_contents_from_file(mem, init_file, width, depth); + if (!parse) { + cerr << "Error parsing contents of RF " << register_file_id << endl; + exit(1); + } + } + + SC_METHOD(Assign); + sensitive << wdata_pipeline[RF_WR_LATENCY - 1] + << wen_pipeline[RF_WR_LATENCY - 1] + << waddr_pipeline[RF_WR_LATENCY - 1] + << raddr_pipeline[RF_WR_LATENCY - 1]; + SC_CTHREAD(Tick, clk.pos()); + reset_signal_is(rst, true); +} + +template register_file::~register_file() { + for (unsigned int i = 0; i < mem.size(); i++) + mem[i].clear(); +} + +template void register_file::Assign() { + // Assign read data output + rdata.write( + data_vector(mem[raddr_pipeline[RF_RD_LATENCY - 1].read()])); + + // Assign write value + if (wen_pipeline[RF_WR_LATENCY - 1].read()) { + uint32_t addr = waddr_pipeline[RF_WR_LATENCY - 1].read(); + data_vector temp = wdata_pipeline[RF_WR_LATENCY - 1].read(); + if (temp.size() != 0) + for (unsigned int i = 0; i < num_elements_per_word; i++) + mem[addr][i] = temp[i]; + } +} + +template void register_file::Tick() { + for (unsigned int i = 0; i < RF_RD_LATENCY; i++) { + raddr_pipeline[i].write(0); + } + for (unsigned int i = 0; i < RF_WR_LATENCY; i++) { + waddr_pipeline[i].write(0); + wen_pipeline[i].write(false); + } + wait(); + + while (true) { + if (!clk_en.read()) { + // Address guards + if (raddr.read() >= mem.size()) { + cerr << "Read address (" << raddr.read() << ") out of bound at RF " + << register_file_id << endl; + exit(1); + } + if (waddr.read() >= mem.size()) { + cerr << "Write address (" << waddr.read() << ") out of bound at RF " + << register_file_id << endl; + exit(1); + } + + // Populate first stage of pipeline + raddr_pipeline[0].write(raddr.read()); + wdata_pipeline[0].write(data_vector(wdata)); + waddr_pipeline[0].write(waddr.read()); + wen_pipeline[0].write(wen.read()); + + // Advance the rest of the pipeline + for (unsigned int i = 1; i < RF_RD_LATENCY; i++) { + raddr_pipeline[i].write(raddr_pipeline[i - 1]); + } + for (unsigned int i = 1; i < RF_WR_LATENCY; i++) { + wdata_pipeline[i].write(wdata_pipeline[i - 1].read()); + waddr_pipeline[i].write(waddr_pipeline[i - 1].read()); + wen_pipeline[i].write(wen_pipeline[i - 1].read()); + } + } + wait(); + } +} + +template class register_file; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/register_file.hpp b/rad-sim/example-designs/dlrm_two_rad/modules/register_file.hpp new file mode 100644 index 0000000..6915e4a --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/register_file.hpp @@ -0,0 +1,71 @@ +#pragma once + +#include +#include +#include + +#define RF_RD_LATENCY 2 +#define RF_WR_LATENCY 2 + +template class register_file : public sc_module { +private: + unsigned int register_file_id; + unsigned int num_elements_per_word; + std::vector> mem; + + sc_vector>> wdata_pipeline; + sc_vector> waddr_pipeline; + sc_vector> raddr_pipeline; + sc_vector> wen_pipeline; + +public: + // Register file inputs + sc_in clk; + sc_in rst; + sc_in raddr; + sc_in> wdata; + sc_in waddr; + sc_in wen; + sc_in clk_en; + + // Register file outputs + sc_out> rdata; + + // DPE constructor and destructor + register_file(const sc_module_name &name, unsigned int id, unsigned int depth, + unsigned int width, std::string &init_file); + ~register_file(); + + void Tick(); + void Assign(); + + SC_HAS_PROCESS(register_file); +}; + +template +bool parse_register_file_contents_from_file( + std::vector> &mem, std::string &init_file, + unsigned int width, unsigned int depth) { + + std::ifstream rf_content(init_file); + + if (!rf_content) + return false; + + std::string line; + uint32_t addr = 0; + while (std::getline(rf_content, line) && (addr < depth)) { + std::stringstream line_stream(line); + std::vector rf_word(width, 0); + dtype value; + unsigned int idx = 0; + while (idx < width) { + line_stream >> value; + rf_word[idx] = value; + idx++; + } + mem[addr] = rf_word; + addr++; + } + return true; +} \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/sim_utils.cpp b/rad-sim/example-designs/dlrm_two_rad/modules/sim_utils.cpp new file mode 100644 index 0000000..8adf301 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/sim_utils.cpp @@ -0,0 +1,271 @@ +#include +#include + +template data_vector::data_vector() {} + +template data_vector::data_vector(unsigned int size) { + v.resize(size, 0); +} + +template +data_vector::data_vector(sc_vector> &iport) { + v.resize(iport.size()); + for (unsigned int i = 0; i < iport.size(); i++) + v[i] = iport[i].read(); +} + +template +data_vector::data_vector(std::vector &vec) { + v.resize(vec.size()); + for (unsigned int i = 0; i < vec.size(); i++) + v[i] = vec[i]; +} + +template data_vector::data_vector(std::vector &vec) { + v.resize(vec.size()); + for (unsigned int i = 0; i < vec.size(); i++) + v[i] = vec[i]; +} + +template +bool data_vector::operator==(const data_vector &rhs) { + if (v.size() != rhs.v.size()) + return false; + bool is_equal = true; + for (unsigned int i = 0; i < v.size(); i++) + is_equal &= (v[i] == rhs.v[i]); + return is_equal; +} + +template +bool data_vector::operator==(const std::vector &rhs) { + if (v.size() != rhs.size()) + return false; + bool is_equal = true; + for (unsigned int i = 0; i < v.size(); i++) + is_equal &= (v[i] == rhs[i]); + return is_equal; +} + +template dtype &data_vector::operator[](unsigned int idx) { + return v[idx]; +} + +template unsigned int data_vector::size() { + return v.size(); +} + +template void data_vector::resize(unsigned int size) { + return v.resize(size); +} + +template +ostream &operator<<(ostream &o, const data_vector &dvector) { + for (unsigned int i = 0; i < dvector.v.size(); i++) + o << dvector.v[i] << " "; + return o; +} +template ostream & +operator<< (ostream &o, const data_vector &dvector); +template ostream &operator<< (ostream &o, + const data_vector &dvector); +template ostream &operator<< (ostream &o, + const data_vector &dvector); +template ostream & +operator<< >(ostream &o, const data_vector> &dvector); +template ostream &operator<< >(ostream &o, + const data_vector> &dvector); +template ostream & +operator<< >(ostream &o, const data_vector> &dvector); + +template +data_vector operator+(const data_vector &v1, + const data_vector &v2) { + assert(v1.v.size() == v2.v.size()); + if (v1.v.size() != v2.v.size()) { + cerr << "Attempting to add two data vectors of different sizes! "; + cerr << "(" << v1.v.size() << "," << v2.v.size() << ")" << endl; + exit(1); + } + + data_vector res = data_vector(v1.v.size()); + for (unsigned int i = 0; i < v1.v.size(); i++) + res.v[i] = v1.v[i] + v2.v[i]; + return res; +} +template data_vector operator+ + (const data_vector &v1, + const data_vector &v2); +template data_vector operator+ + (const data_vector &v1, + const data_vector &v2); +template data_vector operator+ + (const data_vector &v1, const data_vector &v2); +template data_vector> operator+ + >(const data_vector> &v1, + const data_vector> &v2); +template data_vector> operator+ + >(const data_vector> &v1, + const data_vector> &v2); +template data_vector> operator+ + >(const data_vector> &v1, + const data_vector> &v2); + +template +data_vector operator-(const data_vector &v1, + const data_vector &v2) { + if (v1.v.size() != v2.v.size()) { + cerr << "Attempting to subtract two data vectors of different sizes!"; + cerr << "(" << v1.v.size() << "," << v2.v.size() << ")" << endl; + exit(1); + } + + data_vector res = data_vector(v1.v.size()); + for (unsigned int i = 0; i < v1.v.size(); i++) + res.v[i] = v1.v[i] - v2.v[i]; + return res; +} +template data_vector operator- + (const data_vector &v1, + const data_vector &v2); +template data_vector operator- + (const data_vector &v1, + const data_vector &v2); +template data_vector operator- + (const data_vector &v1, const data_vector &v2); +template data_vector> operator- + >(const data_vector> &v1, + const data_vector> &v2); +template data_vector> operator- + >(const data_vector> &v1, + const data_vector> &v2); +template data_vector> operator- + >(const data_vector> &v1, + const data_vector> &v2); + +template +data_vector operator*(const data_vector &v1, + const data_vector &v2) { + if (v1.v.size() != v2.v.size()) { + cerr << "Attempting to multiply two data vectors of different sizes!"; + cerr << "(" << v1.v.size() << "," << v2.v.size() << ")" << endl; + exit(1); + } + + data_vector res = data_vector(v1.v.size()); + for (unsigned int i = 0; i < v1.v.size(); i++) + res.v[i] = v1.v[i] * v2.v[i]; + return res; +} +template data_vector operator* + (const data_vector &v1, + const data_vector &v2); +template data_vector operator* + (const data_vector &v1, + const data_vector &v2); +template data_vector operator* + (const data_vector &v1, const data_vector &v2); +template data_vector> operator* + >(const data_vector> &v1, + const data_vector> &v2); +template data_vector> operator* + >(const data_vector> &v1, + const data_vector> &v2); +template data_vector> operator* + >(const data_vector> &v1, + const data_vector> &v2); + +template +data_vector max(const data_vector &v1, + const data_vector &v2) { + if (v1.v.size() != v2.v.size()) { + cerr << "Attempting to max two data vectors of different sizes!"; + cerr << "(" << v1.v.size() << "," << v2.v.size() << ")" << endl; + exit(1); + } + + data_vector res = data_vector(v1.v.size()); + for (unsigned int i = 0; i < v1.v.size(); i++) + res.v[i] = (v1.v[i] > v2.v[i]) ? v1.v[i] : v2.v[i]; + return res; +} +template data_vector +max(const data_vector &v1, + const data_vector &v2); +template data_vector max(const data_vector &v1, + const data_vector &v2); +template data_vector max(const data_vector &v1, + const data_vector &v2); +template data_vector> +max>(const data_vector> &v1, + const data_vector> &v2); +template data_vector> +max>(const data_vector> &v1, + const data_vector> &v2); +template data_vector> +max>(const data_vector> &v1, + const data_vector> &v2); + +void sc_trace(sc_trace_file *f, const data_vector &dvector, + const std::string &s) { + for (unsigned int i = 0; i < dvector.v.size(); i++) + sc_trace(f, dvector.v[i], s + "_v" + std::to_string(i)); +} +void sc_trace(sc_trace_file *f, const data_vector &dvector, + const std::string &s) { + for (unsigned int i = 0; i < dvector.v.size(); i++) + sc_trace(f, dvector.v[i], s + "_v" + std::to_string(i)); +} +void sc_trace(sc_trace_file *f, const data_vector &dvector, + const std::string &s) { + for (unsigned int i = 0; i < dvector.v.size(); i++) + sc_trace(f, dvector.v[i], s + "_v" + std::to_string(i)); +} +void sc_trace(sc_trace_file *f, const data_vector> &dvector, + const std::string &s) { + for (unsigned int i = 0; i < dvector.v.size(); i++) + sc_trace(f, dvector.v[i], s + "_v" + std::to_string(i)); +} +void sc_trace(sc_trace_file *f, const data_vector> &dvector, + const std::string &s) { + for (unsigned int i = 0; i < dvector.v.size(); i++) + sc_trace(f, dvector.v[i], s + "_v" + std::to_string(i)); +} +void sc_trace(sc_trace_file *f, const data_vector> &dvector, + const std::string &s) { + for (unsigned int i = 0; i < dvector.v.size(); i++) + sc_trace(f, dvector.v[i], s + "_v" + std::to_string(i)); +} + +template +void init_vector::init_sc_vector(sc_vector &vector, + unsigned int dim0) { + vector.init(dim0); +} + +template class data_vector; +template class data_vector; +template class data_vector; + +template class init_vector>>; +template class init_vector>>; +template class init_vector>; + +template class init_vector>>; +template class init_vector>>; +template class init_vector>; + +template class init_vector>>; +template class init_vector>>; +template class init_vector>; + +template class data_vector>; +template class data_vector>; +template class data_vector>; + +template class init_vector>; +template class init_vector>; +template class init_vector>; +template class init_vector>>>; +template class init_vector>>>; +template class init_vector>>>; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/sim_utils.hpp b/rad-sim/example-designs/dlrm_two_rad/modules/sim_utils.hpp new file mode 100644 index 0000000..3283e67 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/modules/sim_utils.hpp @@ -0,0 +1,108 @@ +#pragma once + +#include +#include +#include +#include + +template class data_vector; +template +data_vector max(const data_vector &v1, const data_vector &v2); +template +ostream &operator<<(ostream &o, const data_vector &dvector); +template +data_vector operator+(const data_vector &v1, const data_vector &v2); +template +data_vector operator-(const data_vector &v1, const data_vector &v2); +template +data_vector operator*(const data_vector &v1, const data_vector &v2); + +template class data_vector : public std::error_code { +public: + std::vector v; + + data_vector(); + data_vector(unsigned int size); + data_vector(sc_vector> &iport); + data_vector(std::vector &vec); + data_vector(std::vector &vec); + bool operator==(const data_vector &rhs); + bool operator==(const std::vector &rhs); + dtype &operator[](unsigned int idx); + unsigned int size(); + void resize(unsigned int size); + friend ostream &operator<< (ostream &o, + const data_vector &dvector); + friend data_vector operator+ + (const data_vector &v1, const data_vector &v2); + friend data_vector operator- + (const data_vector &v1, const data_vector &v2); + friend data_vector operator* + (const data_vector &v1, const data_vector &v2); + friend data_vector max(const data_vector &v1, + const data_vector &v2); +}; +void sc_trace(sc_trace_file *f, const data_vector &dvector, + const std::string &s); +void sc_trace(sc_trace_file *f, const data_vector &dvector, + const std::string &s); +void sc_trace(sc_trace_file *f, const data_vector &dvector, + const std::string &s); +void sc_trace(sc_trace_file *f, const data_vector> &dvector, + const std::string &s); +void sc_trace(sc_trace_file *f, const data_vector> &dvector, + const std::string &s); +void sc_trace(sc_trace_file *f, const data_vector> &dvector, + const std::string &s); + +template struct init_vector { + static void init_sc_vector(sc_vector &vector, unsigned int dim0); +}; + +template <> struct std::iterator_traits { + typedef int difference_type; + typedef int value_type; + typedef int *pointer; + typedef int &reference; + typedef std::forward_iterator_tag iterator_category; +}; + +template <> struct std::iterator_traits { + typedef int difference_type; + typedef int value_type; + typedef int *pointer; + typedef int &reference; + typedef std::forward_iterator_tag iterator_category; +}; + +template <> struct std::iterator_traits { + typedef int difference_type; + typedef int value_type; + typedef int *pointer; + typedef int &reference; + typedef std::forward_iterator_tag iterator_category; +}; + +template <> struct std::iterator_traits> { + typedef int difference_type; + typedef int value_type; + typedef int *pointer; + typedef int &reference; + typedef std::forward_iterator_tag iterator_category; +}; + +template <> struct std::iterator_traits> { + typedef int difference_type; + typedef int value_type; + typedef int *pointer; + typedef int &reference; + typedef std::forward_iterator_tag iterator_category; +}; + +template <> struct std::iterator_traits> { + typedef int difference_type; + typedef int value_type; + typedef int *pointer; + typedef int &reference; + typedef std::forward_iterator_tag iterator_category; +}; \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/sim_trace b/rad-sim/example-designs/dlrm_two_rad/sim_trace new file mode 100644 index 0000000..cd55320 --- /dev/null +++ b/rad-sim/example-designs/dlrm_two_rad/sim_trace @@ -0,0 +1,3 @@ +12 +15 32 78 59 63 44 74 88 75 32 69 82 +92 32 54 97 88 65 23 44 17 24 39 55 \ No newline at end of file From a481e959603eb7e91b788b4ad642382e37bdcb7b Mon Sep 17 00:00:00 2001 From: abnashkb Date: Wed, 23 Oct 2024 03:11:57 -0400 Subject: [PATCH 118/127] Fixed renaming for dlrm_two_rad --- rad-sim/example-designs/dlrm_two_rad/CMakeLists.txt | 8 ++++---- rad-sim/example-designs/dlrm_two_rad/config.yml | 8 ++++---- rad-sim/example-designs/dlrm_two_rad/dlrm_top.cpp | 2 +- .../dlrm_two_rad/{dlrm.clks => dlrm_two_rad.clks} | 0 .../dlrm_two_rad/{dlrm.place => dlrm_two_rad.place} | 0 .../{dlrm_system.cpp => dlrm_two_rad_system.cpp} | 6 +++--- .../{dlrm_system.hpp => dlrm_two_rad_system.hpp} | 6 +++--- rad-sim/test/dlrm_two_rad_test.sh | 10 ++++++++++ rad-sim/test/mult_test.sh | 9 +++++++++ 9 files changed, 34 insertions(+), 15 deletions(-) rename rad-sim/example-designs/dlrm_two_rad/{dlrm.clks => dlrm_two_rad.clks} (100%) rename rad-sim/example-designs/dlrm_two_rad/{dlrm.place => dlrm_two_rad.place} (100%) rename rad-sim/example-designs/dlrm_two_rad/{dlrm_system.cpp => dlrm_two_rad_system.cpp} (88%) rename rad-sim/example-designs/dlrm_two_rad/{dlrm_system.hpp => dlrm_two_rad_system.hpp} (77%) create mode 100755 rad-sim/test/dlrm_two_rad_test.sh create mode 100755 rad-sim/test/mult_test.sh diff --git a/rad-sim/example-designs/dlrm_two_rad/CMakeLists.txt b/rad-sim/example-designs/dlrm_two_rad/CMakeLists.txt index 0416e1e..37906ec 100644 --- a/rad-sim/example-designs/dlrm_two_rad/CMakeLists.txt +++ b/rad-sim/example-designs/dlrm_two_rad/CMakeLists.txt @@ -28,7 +28,7 @@ set(srcfiles modules/collector.cpp dlrm_top.cpp dlrm_driver.cpp - dlrm_system.cpp + dlrm_two_rad_system.cpp ) set(hdrfiles @@ -45,10 +45,10 @@ set(hdrfiles modules/dlrm_defines.hpp dlrm_top.hpp dlrm_driver.hpp - dlrm_system.hpp + dlrm_two_rad_system.hpp ) add_compile_options(-Wall -Wextra -pedantic) -add_library(dlrm STATIC ${srcfiles} ${hdrfiles}) -target_link_libraries(dlrm PUBLIC SystemC::systemc booksim noc dram) +add_library(dlrm_two_rad STATIC ${srcfiles} ${hdrfiles}) +target_link_libraries(dlrm_two_rad PUBLIC SystemC::systemc booksim noc dram) diff --git a/rad-sim/example-designs/dlrm_two_rad/config.yml b/rad-sim/example-designs/dlrm_two_rad/config.yml index b3ea2a6..0816b92 100644 --- a/rad-sim/example-designs/dlrm_two_rad/config.yml +++ b/rad-sim/example-designs/dlrm_two_rad/config.yml @@ -6,8 +6,8 @@ config rad1: config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] design: - name: 'dlrm' - noc_placement: ['dlrm.place'] + name: 'dlrm_two_rad' + noc_placement: ['dlrm_two_rad.place'] clk_periods: [5.0, 2.0, 3.32, 1.5] config anotherconfig: @@ -18,8 +18,8 @@ config anotherconfig: config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] design: - name: 'dlrm' - noc_placement: ['dlrm.place'] + name: 'dlrm_two_rad' + noc_placement: ['dlrm_two_rad.place'] clk_periods: [5.0, 2.0, 3.32, 1.5] noc: diff --git a/rad-sim/example-designs/dlrm_two_rad/dlrm_top.cpp b/rad-sim/example-designs/dlrm_two_rad/dlrm_top.cpp index 0667275..307b5cd 100644 --- a/rad-sim/example-designs/dlrm_two_rad/dlrm_top.cpp +++ b/rad-sim/example-designs/dlrm_two_rad/dlrm_top.cpp @@ -136,7 +136,7 @@ dlrm_top::dlrm_top(const sc_module_name &name, RADSimDesignContext* radsim_desig this->connectPortalReset(&rst); - radsim_design->BuildDesignContext("dlrm.place", "dlrm.clks"); + radsim_design->BuildDesignContext("dlrm_two_rad.place", "dlrm_two_rad.clks"); radsim_design->CreateSystemNoCs(rst); radsim_design->ConnectModulesToNoC(); } diff --git a/rad-sim/example-designs/dlrm_two_rad/dlrm.clks b/rad-sim/example-designs/dlrm_two_rad/dlrm_two_rad.clks similarity index 100% rename from rad-sim/example-designs/dlrm_two_rad/dlrm.clks rename to rad-sim/example-designs/dlrm_two_rad/dlrm_two_rad.clks diff --git a/rad-sim/example-designs/dlrm_two_rad/dlrm.place b/rad-sim/example-designs/dlrm_two_rad/dlrm_two_rad.place similarity index 100% rename from rad-sim/example-designs/dlrm_two_rad/dlrm.place rename to rad-sim/example-designs/dlrm_two_rad/dlrm_two_rad.place diff --git a/rad-sim/example-designs/dlrm_two_rad/dlrm_system.cpp b/rad-sim/example-designs/dlrm_two_rad/dlrm_two_rad_system.cpp similarity index 88% rename from rad-sim/example-designs/dlrm_two_rad/dlrm_system.cpp rename to rad-sim/example-designs/dlrm_two_rad/dlrm_two_rad_system.cpp index f278b91..05087a2 100644 --- a/rad-sim/example-designs/dlrm_two_rad/dlrm_system.cpp +++ b/rad-sim/example-designs/dlrm_two_rad/dlrm_two_rad_system.cpp @@ -1,6 +1,6 @@ -#include +#include -dlrm_system::dlrm_system(const sc_module_name &name, sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design) +dlrm_two_rad_system::dlrm_two_rad_system(const sc_module_name &name, sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design) : sc_module(name) { // Instantiate driver @@ -36,7 +36,7 @@ dlrm_system::dlrm_system(const sc_module_name &name, sc_clock *driver_clk_sig, R this->design_dut_inst = dut_inst; } -dlrm_system::~dlrm_system() { +dlrm_two_rad_system::~dlrm_two_rad_system() { delete driver_inst; delete dut_inst; } \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm_two_rad/dlrm_system.hpp b/rad-sim/example-designs/dlrm_two_rad/dlrm_two_rad_system.hpp similarity index 77% rename from rad-sim/example-designs/dlrm_two_rad/dlrm_system.hpp rename to rad-sim/example-designs/dlrm_two_rad/dlrm_two_rad_system.hpp index 264c0d6..d15b091 100644 --- a/rad-sim/example-designs/dlrm_two_rad/dlrm_system.hpp +++ b/rad-sim/example-designs/dlrm_two_rad/dlrm_two_rad_system.hpp @@ -6,7 +6,7 @@ #include #include -class dlrm_system : public RADSimDesignSystem { //sc_module { +class dlrm_two_rad_system : public RADSimDesignSystem { //sc_module { private: sc_signal> lookup_indecies_data_sig; sc_signal> lookup_indecies_target_channels_sig; @@ -25,6 +25,6 @@ class dlrm_system : public RADSimDesignSystem { //sc_module { dlrm_driver *driver_inst; dlrm_top *dut_inst; - dlrm_system(const sc_module_name &name, sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design); - ~dlrm_system(); + dlrm_two_rad_system(const sc_module_name &name, sc_clock *driver_clk_sig, RADSimDesignContext* radsim_design); + ~dlrm_two_rad_system(); }; \ No newline at end of file diff --git a/rad-sim/test/dlrm_two_rad_test.sh b/rad-sim/test/dlrm_two_rad_test.sh new file mode 100755 index 0000000..d0a9d40 --- /dev/null +++ b/rad-sim/test/dlrm_two_rad_test.sh @@ -0,0 +1,10 @@ +#!/bin/bash +test_path=$( cd "$(dirname "${BASH_SOURCE[0]}")" ; pwd -P ) +cd $test_path + +cp -f ../example-designs/dlrm_two_rad/config.yml ../config.yml + +(cd ../; python config.py dlrm_two_rad) + +(cd ../example-designs/dlrm_two_rad/compiler; python dlrm.py) +(cd ../build; make run) diff --git a/rad-sim/test/mult_test.sh b/rad-sim/test/mult_test.sh new file mode 100755 index 0000000..af10b0e --- /dev/null +++ b/rad-sim/test/mult_test.sh @@ -0,0 +1,9 @@ +#!/bin/bash +test_path=$( cd "$(dirname "${BASH_SOURCE[0]}")" ; pwd -P ) +cd $test_path + +cp -f ../example-designs/mult/config.yml ../config.yml + +(cd ../; python config.py mult) + +(cd ../build; make run) From 0ac89a658b51a58144349a67854d6f5b0923b693 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Fri, 25 Oct 2024 00:08:43 -0400 Subject: [PATCH 119/127] Added back ported single-RAD dlrm design --- rad-sim/example-designs/dlrm/config.yml | 16 ++-------------- rad-sim/example-designs/dlrm/dlrm.clks | 3 +-- rad-sim/example-designs/dlrm/dlrm.place | 3 +-- rad-sim/example-designs/dlrm/dlrm_top.hpp | 2 +- .../example-designs/dlrm/modules/collector.cpp | 2 +- .../dlrm/modules/custom_feature_interaction.cpp | 11 ++++------- .../dlrm/modules/embedding_lookup.cpp | 6 ++---- rad-sim/example-designs/dlrm/modules/mvm.cpp | 15 ++++----------- 8 files changed, 16 insertions(+), 42 deletions(-) diff --git a/rad-sim/example-designs/dlrm/config.yml b/rad-sim/example-designs/dlrm/config.yml index b3ea2a6..0ef30da 100644 --- a/rad-sim/example-designs/dlrm/config.yml +++ b/rad-sim/example-designs/dlrm/config.yml @@ -10,18 +10,6 @@ config rad1: noc_placement: ['dlrm.place'] clk_periods: [5.0, 2.0, 3.32, 1.5] -config anotherconfig: - dram: - num_controllers: 4 - clk_periods: [3.32, 3.32, 2.0, 2.0] - queue_sizes: [64, 64, 64, 64] - config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] - - design: - name: 'dlrm' - noc_placement: ['dlrm.place'] - clk_periods: [5.0, 2.0, 3.32, 1.5] - noc: type: ['2d'] num_nocs: 1 @@ -55,8 +43,8 @@ cluster: sim_driver_period: 5.0 telemetry_log_verbosity: 2 telemetry_traces: ['Embedding LU', 'Mem0', 'Mem1', 'Mem2', 'Mem3', 'Feature Inter.', 'MVM first', 'MVM last'] - num_rads: 2 - cluster_configs: ['rad1', 'anotherconfig'] + num_rads: 1 + cluster_configs: ['rad1'] cluster_topology: 'all-to-all' inter_rad_latency: 2100 inter_rad_bw: 102.4 diff --git a/rad-sim/example-designs/dlrm/dlrm.clks b/rad-sim/example-designs/dlrm/dlrm.clks index d50f638..9dfd686 100644 --- a/rad-sim/example-designs/dlrm/dlrm.clks +++ b/rad-sim/example-designs/dlrm/dlrm.clks @@ -12,5 +12,4 @@ layer1_mvm0 0 3 layer1_mvm1 0 3 layer2_mvm0 0 3 layer2_mvm1 0 3 -output_collector 0 0 -portal_inst 0 0 \ No newline at end of file +output_collector 0 0 \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/dlrm.place b/rad-sim/example-designs/dlrm/dlrm.place index 2e2e240..0b13524 100644 --- a/rad-sim/example-designs/dlrm/dlrm.place +++ b/rad-sim/example-designs/dlrm/dlrm.place @@ -64,5 +64,4 @@ layer1_mvm0 0 30 axis layer1_mvm1 0 20 axis layer2_mvm0 0 10 axis layer2_mvm1 0 0 axis -output_collector 0 31 axis -portal_inst 0 32 axis \ No newline at end of file +output_collector 0 31 axis \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/dlrm_top.hpp b/rad-sim/example-designs/dlrm/dlrm_top.hpp index e2642e2..71d699e 100644 --- a/rad-sim/example-designs/dlrm/dlrm_top.hpp +++ b/rad-sim/example-designs/dlrm/dlrm_top.hpp @@ -22,7 +22,7 @@ class dlrm_top : public RADSimDesignTop { std::vector axis_sig; std::vector mem_clks; - RADSimDesignContext* radsim_design; //AKB ADDED + RADSimDesignContext* radsim_design; public: sc_in rst; diff --git a/rad-sim/example-designs/dlrm/modules/collector.cpp b/rad-sim/example-designs/dlrm/modules/collector.cpp index e71ba8e..448b47e 100644 --- a/rad-sim/example-designs/dlrm/modules/collector.cpp +++ b/rad-sim/example-designs/dlrm/modules/collector.cpp @@ -36,7 +36,7 @@ void collector::Assign() { if (rst.read()) { rx_interface.tready.write(false); data_fifo_rdy.write(false); - } else if (radsim_design->rad_id == 1) { + } else { rx_interface.tready.write(!data_fifo_almost_full_signal); data_fifo_wen_signal.write(rx_interface.tvalid.read() && rx_interface.tready.read()); diff --git a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp index b0f423e..af731e8 100644 --- a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp +++ b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp @@ -99,7 +99,7 @@ void custom_feature_interaction::Assign() { aximm_interface[ch_id].bready.write(false); aximm_interface[ch_id].rready.write(false); } - } else if (radsim_design->rad_id == 0) { + } else { // Set ready signals to accept read/write response from the AXI-MM NoC for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { aximm_interface[ch_id].bready.write(false); @@ -146,7 +146,6 @@ bool are_ififos_ready(sc_vector> &ififo_empty, } void custom_feature_interaction::Tick() { - if (radsim_design->rad_id == 0) { // Reset ports for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { aximm_interface[ch_id].arvalid.write(false); @@ -172,7 +171,7 @@ void custom_feature_interaction::Tick() { bool got_all_mem_responses = false; // Always @ positive edge of the clock - while (true ) { //&& (radsim_design->rad_id == 0)) { + while (true ) { // Accept R responses from the NoC for (unsigned int ch_id = 0; ch_id < _num_mem_channels; ch_id++) { if (_input_fifos[ch_id].size() < _fifos_depth && @@ -248,7 +247,7 @@ void custom_feature_interaction::Tick() { _output_fifos[ch_id].pop(); } - if ( (!_output_fifos[ch_id].empty()) ) { //&& (radsim_design->rad_id == 0) ) { + if ( (!_output_fifos[ch_id].empty()) ) { non_empty_output_fifo = true; data_vector tx_tdata = _output_fifos[ch_id].front(); //std::cout << "custom_feature_interaction: tx_tdata sent " << tx_tdata << " from RAD " << radsim_design->rad_id << std::endl; @@ -262,12 +261,11 @@ void custom_feature_interaction::Tick() { "layer0_mvm" + std::to_string(ch_id) + ".rx_interface"; //std::cout << "radsim_design->GetPortDestinationID(dest_name) on RAD " << radsim_design->rad_id << ": " << radsim_design->GetPortDestinationID(dest_name) << std::endl; sc_bv dest_id_concat; - DEST_RAD(dest_id_concat) = 1; //radsim_design->rad_id; + DEST_RAD(dest_id_concat) = radsim_design->rad_id; //keep data on current RAD DEST_LOCAL_NODE(dest_id_concat) = radsim_design->GetPortDestinationID(dest_name); DEST_REMOTE_NODE(dest_id_concat) = radsim_design->GetPortDestinationID(dest_name); axis_interface[ch_id].tdest.write( dest_id_concat); - //radsim_design->GetPortDestinationID(dest_name)); no_val_counter = 0; } else { axis_interface[ch_id].tvalid.write(false); @@ -292,7 +290,6 @@ void custom_feature_interaction::Tick() { wait(); } - } } void custom_feature_interaction::RegisterModuleInfo() { diff --git a/rad-sim/example-designs/dlrm/modules/embedding_lookup.cpp b/rad-sim/example-designs/dlrm/modules/embedding_lookup.cpp index 4f678fa..a57070e 100644 --- a/rad-sim/example-designs/dlrm/modules/embedding_lookup.cpp +++ b/rad-sim/example-designs/dlrm/modules/embedding_lookup.cpp @@ -55,7 +55,7 @@ void embedding_lookup::Assign() { aximm_req_interface[ch_id].bready.write(false); aximm_req_interface[ch_id].rready.write(false); } - } else if ((radsim_design->rad_id == 0)) { + } else { bool all_fifos_not_full = true; // Always ready to accept read/write response from the AXI-MM NoC @@ -73,7 +73,6 @@ void embedding_lookup::Assign() { } void embedding_lookup::Tick() { - if (radsim_design->rad_id == 0) { // Reset logic for (unsigned int ch_id = 0; ch_id < _total_num_channels; ch_id++) { aximm_req_interface[ch_id].arvalid.write(false); @@ -91,7 +90,7 @@ void embedding_lookup::Tick() { wait(); // Always @ positive edge of the clock - while (true) { //&& (radsim_design->rad_id == 0)) { + while (true) { if (lookup_indecies_ready.read() && lookup_indecies_valid.read()) { data_vector lookup_indecies = lookup_indecies_data.read(); data_vector target_channels = @@ -185,7 +184,6 @@ void embedding_lookup::Tick() { } wait(); } - } } void embedding_lookup::RegisterModuleInfo() { diff --git a/rad-sim/example-designs/dlrm/modules/mvm.cpp b/rad-sim/example-designs/dlrm/modules/mvm.cpp index 93ec3ca..de7b1e1 100644 --- a/rad-sim/example-designs/dlrm/modules/mvm.cpp +++ b/rad-sim/example-designs/dlrm/modules/mvm.cpp @@ -202,7 +202,6 @@ int16_t dot(data_vector v1, data_vector v2) { } void mvm::Tick() { - if (radsim_design->rad_id == 1) { // Reset logic for (unsigned int lane_id = 0; lane_id < LANES; lane_id++) { tdata_vec[lane_id] = 0; @@ -212,7 +211,7 @@ void mvm::Tick() { // next_inst.write(rst_inst); wait(); // Sequential logic - while (true && (radsim_design->rad_id == 1)) { + while (true) { /*std::cout << this->name() << " iFIFO occ: " << ififo->occupancy() << " rFIFO occ: " << reduce_fifo->occupancy() << " oFIFO occ: " << ofifo->occupancy() @@ -323,9 +322,7 @@ void mvm::Tick() { end_idx = (e + 1) * 16; tdatavector[e] = tdata.range(end_idx - 1, start_idx).to_int(); } - //if (layer_id == 0) std::cout << "got tdatavector on rad " << radsim_design->rad_id << ": " << tdatavector << std::endl; - // sc_bv<7> testing_width = "1000110"; - // std::cout << "testing_width.to_uint64(): " << testing_width.to_uint64() << std::endl; + if (rx_input_interface.tuser.read().range(15, 13).to_uint() == 1) { unsigned int waddr = rx_input_interface.tuser.read().range(8, 0).to_uint(); @@ -409,7 +406,6 @@ void mvm::Tick() { } wait(); } - } } void mvm::Assign() { @@ -438,7 +434,7 @@ void mvm::Assign() { matrix_mem_raddr.write(0); dot_op.write(false); dot_reduce_op.write(false); - } else if (radsim_design->rad_id == 1) { + } else { if (rx_input_interface.tuser.read().range(15, 13).to_uint() == 1) { // Inst memory rx_input_interface.tready.write(true); @@ -523,10 +519,7 @@ void mvm::Assign() { sc_bv dest_id_concat; DEST_LOCAL_NODE(dest_id_concat) = dest_id; DEST_REMOTE_NODE(dest_id_concat) = dest_id; - // if (radsim_design->rad_id == 1){ - // std::cout << "mvm.cpp on RAD " << radsim_design->rad_id << "'s dest_id: " << dest_id << " and DEST_RAD(dest_id): " << DEST_RAD(dest_id_concat) << std::endl; - // } - DEST_RAD(dest_id_concat) = radsim_design->rad_id; + DEST_RAD(dest_id_concat) = radsim_design->rad_id; //stay on current RAD unsigned int dest_interface; // which FIFO unsigned int dest_interface_id; // added for separate ports // If destination is the same layer, send to reduce FIFO From 70df51e7c6664011fd23f0bdc03e87ecbaf87d28 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Fri, 25 Oct 2024 00:19:51 -0400 Subject: [PATCH 120/127] Cleaned up print statements --- rad-sim/sim/dram/mem_controller.cpp | 6 +++--- rad-sim/sim/noc/radsim_noc.cpp | 32 ++++++++++++++--------------- rad-sim/sim/radsim_config.cpp | 14 ++++++------- rad-sim/sim/radsim_module.cpp | 4 ++-- 4 files changed, 28 insertions(+), 28 deletions(-) diff --git a/rad-sim/sim/dram/mem_controller.cpp b/rad-sim/sim/dram/mem_controller.cpp index ae6106d..dd9e03b 100644 --- a/rad-sim/sim/dram/mem_controller.cpp +++ b/rad-sim/sim/dram/mem_controller.cpp @@ -39,7 +39,7 @@ mem_controller::mem_controller(const sc_module_name &name, unsigned int dram_id, "/sim/dram/DRAMsim3/configs/" + radsim_config.GetStringVectorKnobPerRad("dram_config_files", dram_id, radsim_design->rad_id) + ".ini"; - std::cout << "mem_controller::mem_controller() config_file: " << config_file << std::endl; + //std::cout << "mem_controller::mem_controller() config_file: " << config_file << std::endl; std::string output_dir = radsim_config.GetStringKnobShared("radsim_root_dir") + "/logs"; @@ -51,7 +51,7 @@ mem_controller::mem_controller(const sc_module_name &name, unsigned int dram_id, dram_id); _mem_id = dram_id; _num_channels = _dramsim->GetChannels(); - std::cout << "mem_controller.cpp mem_controller() _num_channels: " << _num_channels << std::endl; + //std::cout << "mem_controller.cpp mem_controller() _num_channels: " << _num_channels << std::endl; mem_channels.init(_num_channels); _memory_channel_bitwidth = _dramsim->GetBusBits(); @@ -628,7 +628,7 @@ void mem_controller::RegisterModuleInfo() { for (unsigned int ch_id = 0; ch_id < _num_channels; ch_id++) { port_name = module_name + ".mem_channel_" + std::to_string(ch_id); - std::cout << "mem_controller::RegisterModuleInfo() port_name: " << port_name << std::endl; + //std::cout << "mem_controller::RegisterModuleInfo() port_name: " << port_name << std::endl; RegisterAximmSlavePort(port_name, &mem_channels[ch_id], _addressable_size_bytes * 8); } diff --git a/rad-sim/sim/noc/radsim_noc.cpp b/rad-sim/sim/noc/radsim_noc.cpp index 2685dc5..b1ca6ec 100644 --- a/rad-sim/sim/noc/radsim_noc.cpp +++ b/rad-sim/sim/noc/radsim_noc.cpp @@ -1,4 +1,4 @@ -#include //AKB: moved to header file +#include #include radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::string portal_slave_name, int noc_id, @@ -8,7 +8,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str std::vector &axis_slave_adapter_info, std::vector &aximm_master_adapter_info, std::vector &aximm_slave_adapter_info, - RADSimDesignContext* radsim_design) //AKB: ADDED + RADSimDesignContext* radsim_design) : sc_module(name), noc_clk("noc_clk"), rst("rst") { _rad_id = rad_id; _portal_slave_name = portal_slave_name; @@ -59,12 +59,12 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str // Create NoC AXI-S Master adapters _num_axis_master_endpoints = - radsim_design->GetNumNoCMasterAdapters(_noc_id, false); //AKB to ptr + radsim_design->GetNumNoCMasterAdapters(_noc_id, false); noc_axis_master_ports.init(_num_axis_master_endpoints); for (unsigned int adapter_id = 0; adapter_id < _num_axis_master_endpoints; adapter_id++) { unsigned int num_adapter_ports = - radsim_design->GetNumAxisMasterAdapterPorts(_noc_id, adapter_id); //AKB to ptr + radsim_design->GetNumAxisMasterAdapterPorts(_noc_id, adapter_id); noc_axis_master_ports[adapter_id].init(num_adapter_ports); // Prepare adapter information @@ -95,10 +95,10 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str for (unsigned int port_id = 0; port_id < num_adapter_ports; port_id++) { std::string port_name = axis_master_adapter_info[adapter_id]._port_names[port_id]; - std::cout << "axis_master_adapter_info radsim_noc.cpp port_name is: " << port_name << std::endl; + //std::cout << "axis_master_adapter_info radsim_noc.cpp port_name is: " << port_name << std::endl; master_adapter->axis_interfaces[port_id].ConnectToPort( noc_axis_master_ports[adapter_id][port_id]); - radsim_design->RegisterNoCMasterPort( //AKB to ptr + radsim_design->RegisterNoCMasterPort( _noc_id, port_name, &noc_axis_master_ports[adapter_id][port_id]); } @@ -107,13 +107,13 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str // Create NoC AXI-S Slave adapters _num_axis_slave_endpoints = - radsim_design->GetNumNoCSlaveAdapters(_noc_id, false); //AKB to ptr + radsim_design->GetNumNoCSlaveAdapters(_noc_id, false); noc_axis_slave_ports.init(_num_axis_slave_endpoints); int local_idx_portal = -1; for (unsigned int adapter_id = 0; adapter_id < _num_axis_slave_endpoints; adapter_id++) { unsigned int num_adapter_ports = - radsim_design->GetNumAxisSlaveAdapterPorts(_noc_id, adapter_id); //AKB to ptr + radsim_design->GetNumAxisSlaveAdapterPorts(_noc_id, adapter_id); noc_axis_slave_ports[adapter_id].init(num_adapter_ports); // Prepare adapter information @@ -147,10 +147,10 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str for (unsigned int port_id = 0; port_id < num_adapter_ports; port_id++) { std::string port_name = axis_slave_adapter_info[adapter_id]._port_names[port_id]; - std::cout << "axis_slave_adapter radsim_noc.cpp port_name is: " << port_name << std::endl; + //std::cout << "axis_slave_adapter radsim_noc.cpp port_name is: " << port_name << std::endl; slave_adapter->axis_interfaces[port_id].ConnectToPort( noc_axis_slave_ports[adapter_id][port_id]); - radsim_design->RegisterNoCSlavePort( //AKB to ptr + radsim_design->RegisterNoCSlavePort( _noc_id, port_name, &noc_axis_slave_ports[adapter_id][port_id]); } @@ -159,7 +159,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str // Create NoC AXI-MM Master adapters _num_aximm_slave_endpoints = - radsim_design->GetNumNoCMasterAdapters(_noc_id, true); //AKB to ptr + radsim_design->GetNumNoCMasterAdapters(_noc_id, true); noc_aximm_master_ports.init(_num_aximm_slave_endpoints); for (unsigned int adapter_id = 0; adapter_id < _num_aximm_slave_endpoints; adapter_id++) { @@ -194,7 +194,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str noc_aximm_master_ports[adapter_id]); std::string port_name = aximm_master_adapter_info[adapter_id]._port_names[0]; - radsim_design->RegisterNoCMasterPort(_noc_id, port_name, //AKB to ptr + radsim_design->RegisterNoCMasterPort(_noc_id, port_name, &noc_aximm_master_ports[adapter_id]); _aximm_master_adapters.push_back(master_adapter); @@ -202,7 +202,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str // Create NoC AXI-MM Slave adapters _num_aximm_master_endpoints = - radsim_design->GetNumNoCSlaveAdapters(_noc_id, true); //AKB to ptr + radsim_design->GetNumNoCSlaveAdapters(_noc_id, true); noc_aximm_slave_ports.init(_num_aximm_master_endpoints); for (unsigned int adapter_id = 0; adapter_id < _num_aximm_master_endpoints; adapter_id++) { @@ -237,7 +237,7 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str noc_aximm_slave_ports[adapter_id]); std::string port_name = aximm_slave_adapter_info[adapter_id]._port_names[0]; radsim_design->RegisterNoCSlavePort(_noc_id, port_name, - &noc_aximm_slave_ports[adapter_id]); //AKB to ptr + &noc_aximm_slave_ports[adapter_id]); _aximm_slave_adapters.push_back(slave_adapter); } @@ -245,12 +245,12 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str #ifndef SINGLE_RAD //set portal ID to use in axis_slave_adapter for NoC versus inter_rad unsigned int PortalSlaveID = radsim_design->GetPortalSlaveID(); - std::cout << "Set portal slave ids in radsim_noc.cpp to: " << PortalSlaveID << std::endl; + //std::cout << "Set portal slave ids in radsim_noc.cpp to: " << PortalSlaveID << std::endl; for (int i = 0; i < _axis_slave_adapters.size(); i++) { _axis_slave_adapters[i]->AssignPortalSlaveID(PortalSlaveID); } #endif - std::cout << "DONE AXIS SLAVE ADAPTER CREATION " << std::endl; + //std::cout << "DONE AXIS SLAVE ADAPTER CREATION " << std::endl; SC_CTHREAD(Tick, noc_clk.pos()); reset_signal_is(rst, true); diff --git a/rad-sim/sim/radsim_config.cpp b/rad-sim/sim/radsim_config.cpp index dab1496..b706162 100644 --- a/rad-sim/sim/radsim_config.cpp +++ b/rad-sim/sim/radsim_config.cpp @@ -238,12 +238,12 @@ std::string RADSimConfig::GetStringVectorKnobPerRad(const std::string &key, << key << "\"" << std::endl; exit(1); } - if (key == "dram_config_files" ) { - std::cout << "radsim_config.cpp: dram_config_files: " << std::endl; - for (int i = 0; i < _string_vector_knobs_per_rad[rad_id][key].size(); i++) { - std::cout << _string_vector_knobs_per_rad[rad_id][key][i] << std::endl; - } - } + // if (key == "dram_config_files" ) { + // std::cout << "radsim_config.cpp: dram_config_files: " << std::endl; + // for (int i = 0; i < _string_vector_knobs_per_rad[rad_id][key].size(); i++) { + // std::cout << _string_vector_knobs_per_rad[rad_id][key][i] << std::endl; + // } + // } return _string_vector_knobs_per_rad[rad_id][key][idx]; } @@ -447,7 +447,7 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { std::string value_element; while (getline(ss, value_element, ' ')) { if (param == "dram_config_files") { - std::cout << "radsim_config.cpp: " << value_element << std::endl; + //std::cout << "radsim_config.cpp: " << value_element << std::endl; } value.push_back(value_element); } diff --git a/rad-sim/sim/radsim_module.cpp b/rad-sim/sim/radsim_module.cpp index 4bda822..d74d7b9 100644 --- a/rad-sim/sim/radsim_module.cpp +++ b/rad-sim/sim/radsim_module.cpp @@ -42,7 +42,7 @@ void RADSimModule::RegisterAxisMasterPort(std::string &port_name, void RADSimModule::RegisterAximmSlavePort(std::string &port_name, aximm_slave_port *port_ptr, unsigned int port_dataw) { - std::cout << "radsim_module.cpp RegisterAximmSlavePort() port_name: " << port_name << std::endl; + //std::cout << "radsim_module.cpp RegisterAximmSlavePort() port_name: " << port_name << std::endl; _ordered_aximm_slave_ports.push_back(port_name); _aximm_slave_ports[port_name] = port_ptr; _ports_dataw[port_name] = port_dataw; @@ -54,7 +54,7 @@ void RADSimModule::RegisterAximmSlavePort(std::string &port_name, void RADSimModule::RegisterAximmMasterPort(std::string &port_name, aximm_master_port *port_ptr, unsigned int port_dataw) { - std::cout << "radsim_module.cpp RegisterAximmMasterPort() port_name: " << port_name << std::endl; + //std::cout << "radsim_module.cpp RegisterAximmMasterPort() port_name: " << port_name << std::endl; _ordered_aximm_master_ports.push_back(port_name); _aximm_master_ports[port_name] = port_ptr; _ports_dataw[port_name] = port_dataw; From 6ea848c8573736ebecce58f04065dce6b8786d8d Mon Sep 17 00:00:00 2001 From: abnashkb Date: Fri, 25 Oct 2024 00:49:31 -0400 Subject: [PATCH 121/127] Cleaned up some warnings --- .../dlrm/modules/custom_feature_interaction.cpp | 2 +- rad-sim/sim/noc/radsim_noc.cpp | 1 - rad-sim/sim/portal.cpp | 2 -- rad-sim/sim/radsim_cluster.cpp | 2 +- rad-sim/sim/radsim_config.cpp | 2 +- rad-sim/sim/radsim_inter_rad.cpp | 8 ++++---- 6 files changed, 7 insertions(+), 10 deletions(-) diff --git a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp index af731e8..b34ffb4 100644 --- a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp +++ b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp @@ -241,7 +241,7 @@ void custom_feature_interaction::Tick() { for (unsigned int ch_id = 0; ch_id < _num_output_channels; ch_id++) { if (axis_interface[ch_id].tready.read() && axis_interface[ch_id].tvalid.read()) { - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); + //int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); data_vector tx_tdata = _output_fifos[ch_id].front(); //std::cout << "custom_feature_interaction @ cycle " << curr_cycle << ": tx_tdata sent " << tx_tdata << " from RAD " << radsim_design->rad_id << " with tdest field " << axis_interface[ch_id].tdest.read() << std::endl; _output_fifos[ch_id].pop(); diff --git a/rad-sim/sim/noc/radsim_noc.cpp b/rad-sim/sim/noc/radsim_noc.cpp index b1ca6ec..4bd974f 100644 --- a/rad-sim/sim/noc/radsim_noc.cpp +++ b/rad-sim/sim/noc/radsim_noc.cpp @@ -109,7 +109,6 @@ radsim_noc::radsim_noc(const sc_module_name &name, unsigned int rad_id, std::str _num_axis_slave_endpoints = radsim_design->GetNumNoCSlaveAdapters(_noc_id, false); noc_axis_slave_ports.init(_num_axis_slave_endpoints); - int local_idx_portal = -1; for (unsigned int adapter_id = 0; adapter_id < _num_axis_slave_endpoints; adapter_id++) { unsigned int num_adapter_ports = diff --git a/rad-sim/sim/portal.cpp b/rad-sim/sim/portal.cpp index e4f963e..71eea98 100644 --- a/rad-sim/sim/portal.cpp +++ b/rad-sim/sim/portal.cpp @@ -39,8 +39,6 @@ void portal::Tick() { //sequential logic //Always @ positive edge of clock while (true) { - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); - //Accepting incoming NoC transaction if (axis_portal_slave_interface.tvalid.read() && axis_portal_slave_interface.tready.read()) { diff --git a/rad-sim/sim/radsim_cluster.cpp b/rad-sim/sim/radsim_cluster.cpp index caeb15a..b7063b0 100644 --- a/rad-sim/sim/radsim_cluster.cpp +++ b/rad-sim/sim/radsim_cluster.cpp @@ -2,7 +2,7 @@ RADSimCluster::RADSimCluster(int num_rads) { this->num_rads = num_rads; - for (unsigned int i = 0; i < num_rads; i++) { + for (int i = 0; i < num_rads; i++) { RADSimDesignContext* new_rad = new RADSimDesignContext(i); //pass in unique RAD ID all_rads.push_back(new_rad); } diff --git a/rad-sim/sim/radsim_config.cpp b/rad-sim/sim/radsim_config.cpp index b706162..562050c 100644 --- a/rad-sim/sim/radsim_config.cpp +++ b/rad-sim/sim/radsim_config.cpp @@ -240,7 +240,7 @@ std::string RADSimConfig::GetStringVectorKnobPerRad(const std::string &key, } // if (key == "dram_config_files" ) { // std::cout << "radsim_config.cpp: dram_config_files: " << std::endl; - // for (int i = 0; i < _string_vector_knobs_per_rad[rad_id][key].size(); i++) { + // for (unsigned int i = 0; i < _string_vector_knobs_per_rad[rad_id][key].size(); i++) { // std::cout << _string_vector_knobs_per_rad[rad_id][key][i] << std::endl; // } // } diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index c71d3cf..d78ebb5 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -12,7 +12,7 @@ RADSimInterRad::RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_c all_signals.init(num_rads + 1); fifos_latency_counters.resize(num_rads); - int inter_rad_fifo_num_slots = radsim_config.GetIntKnobShared("inter_rad_fifo_num_slots"); //1000; + int inter_rad_fifo_num_slots = radsim_config.GetIntKnobShared("inter_rad_fifo_num_slots"); for (int v = 0; v < num_rads; v++) { //width of vector = num of rads bc want fifo per rad sc_fifo* new_fifo_ptr = new sc_fifo(inter_rad_fifo_num_slots); fifos.push_back(new_fifo_ptr); @@ -76,7 +76,7 @@ RADSimInterRad::writeFifo() { //every clock cycle while (true) { //get current cycle for experiments - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); + //int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); //iterate thru all RADs for (int i = 0; i < num_rads; i++) { @@ -141,12 +141,12 @@ RADSimInterRad::readFifo() { while (true) { //get current cycle for experiments - int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); + //int curr_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); for (int i = 0; i < num_rads; i++) { //iterate through all rad's fifos //increment delay on all counters - for (int j = 0; j < fifos_latency_counters[i].size(); j++) { + for (unsigned int j = 0; j < fifos_latency_counters[i].size(); j++) { fifos_latency_counters[i][j]++; } From f47367f30d1d5b858130d79e223c33c5cf6711b9 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Fri, 25 Oct 2024 01:13:47 -0400 Subject: [PATCH 122/127] Fixed telemetry dest width bitwise op --- rad-sim/sim/radsim_telemetry.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/rad-sim/sim/radsim_telemetry.cpp b/rad-sim/sim/radsim_telemetry.cpp index a810748..a8a5c5e 100644 --- a/rad-sim/sim/radsim_telemetry.cpp +++ b/rad-sim/sim/radsim_telemetry.cpp @@ -10,7 +10,7 @@ NoCTransactionTelemetry::~NoCTransactionTelemetry() {} int NoCTransactionTelemetry::RecordTransactionInitiation(int src, int dest, int type, int dataw, int network_id) { NoCTransactionTrace entry; entry.src_node = src; - entry.dest_node = (~(0xff << AXIS_DEST_FIELDW)) & dest; //extract only local NoC node. ignore any remote NoC node set for inter-rad network. + entry.dest_node = ((1 << AXIS_DEST_FIELDW) - 1) & dest; //extract only local NoC node. ignore any remote NoC node set for inter-rad network. entry.transaction_type = type; entry.dataw = dataw; entry.network_id = network_id; From b2d347cb93fa4d3efd0a94b5bf5ed1b6e82c7baa Mon Sep 17 00:00:00 2001 From: abnashkb Date: Fri, 25 Oct 2024 02:23:39 -0400 Subject: [PATCH 123/127] Cleaned up variable and function names, etc --- rad-sim/config.py | 18 +++--- rad-sim/config.yml | 62 ++++++++++++------- rad-sim/example-designs/dlrm/compiler/dlrm.py | 2 + .../dlrm/modules/dlrm_defines.hpp | 2 + rad-sim/example-designs/dlrm/modules/mvm.cpp | 8 +-- .../dlrm_two_rad/compiler/dlrm.py | 2 + .../dlrm_two_rad/modules/dlrm_defines.hpp | 2 + .../dlrm_two_rad/modules/mvm.cpp | 12 ++-- .../npu/compiler/09_std_rnn_1536_8.py | 41 ++++++++++++ rad-sim/sim/main.cpp | 24 +++++-- rad-sim/sim/radsim_defines.hpp | 15 ++--- rad-sim/sim/radsim_inter_rad.cpp | 6 +- rad-sim/sim/radsim_inter_rad.hpp | 2 +- rad-sim/sim/radsim_knobs | 49 ++++++++++----- rad-sim/sim/radsim_module.cpp | 10 +-- 15 files changed, 174 insertions(+), 81 deletions(-) create mode 100644 rad-sim/example-designs/npu/compiler/09_std_rnn_1536_8.py diff --git a/rad-sim/config.py b/rad-sim/config.py index 9723512..80d6578 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -33,10 +33,6 @@ def parse_config_file(config_filename, booksim_params, radsim_header_params, rad if param_name in radsim_knobs[config_counter]: radsim_knobs[config_counter][param_name] = param_value invalid_param = False - # if param_name == "dram_config_files": #TODO: double check dram_config_files correct, had error earlier but I think I fixed earlier - # print('param_value') - # print(config_counter) - # print(param_value) if invalid_param: print("Config Error: Parameter " + param_name + " is invalid!") @@ -265,12 +261,12 @@ def generate_radsim_params_header(radsim_header_params): str(radsim_header_params["interfaces_axi_user_width"]) + "\n") radsim_params_header_file.write("// (Almost always) Constant AXI Parameters\n") - radsim_params_header_file.write("// NOTE: AXIS_DEST_FIELDW must be NOC_LINKS_DEST_WIDTH/3 to fit RAD_DEST_ID, REMOTE_NODE_ID, and LOCAL_NODE_ID\n") radsim_params_header_file.write("#define AXIS_STRBW " + str(radsim_header_params["interfaces_axis_tstrb_width"]) + "\n") radsim_params_header_file.write("#define AXIS_KEEPW " + str(radsim_header_params["interfaces_axis_tkeep_width"]) + "\n") radsim_params_header_file.write("#define AXIS_IDW NOC_LINKS_PACKETID_WIDTH\n") radsim_params_header_file.write("#define AXIS_DESTW NOC_LINKS_DEST_WIDTH\n") - radsim_params_header_file.write("#define AXIS_DEST_FIELDW " + str(max_destination_field_bitwidth) + "\n") # TO-DO-MR: Define parameter for destination field width (to separate 3 fields) + #NOTE: AXIS_DEST_FIELDW is NOC_LINKS_DEST_WIDTH/3 to fit RAD_DEST_ID, REMOTE_NODE_ID, and LOCAL_NODE_ID + radsim_params_header_file.write("#define AXIS_DEST_FIELDW " + str(max_destination_field_bitwidth) + "\n") radsim_params_header_file.write("#define AXI4_IDW " + str(radsim_header_params["interfaces_axi_id_width"]) + "\n") radsim_params_header_file.write("#define AXI4_ADDRW 64\n") radsim_params_header_file.write("#define AXI4_LENW 8\n") @@ -333,11 +329,11 @@ def get_fraction(input_val): def generate_radsim_config_file(radsim_knobs, cluster_knobs): radsim_config_file = open(radsim_header_params["radsim_root_dir"] + "/sim/radsim_knobs", "w") - for i in range(len(cluster_knobs["cluster_configs"])): - curr_config_name = cluster_knobs["cluster_configs"][i] #retrieve the config num by rad ID + for config_id in range(len(cluster_knobs["cluster_configs"])): + curr_config_name = cluster_knobs["cluster_configs"][config_id] #retrieve the config num by rad ID curr_config_num = config_names.index(curr_config_name) - for param in radsim_knobs[i]: - radsim_config_file.write(param + " " + str(i) + " ") # second element is RAD ID + for param in radsim_knobs[config_id]: + radsim_config_file.write(param + " " + str(config_id) + " ") # second element is RAD ID if isinstance(radsim_knobs[curr_config_num][param], list): for value in radsim_knobs[curr_config_num][param]: radsim_config_file.write(str(value) + " ") @@ -412,7 +408,7 @@ def generate_radsim_main(design_names, radsim_knobs): main_cpp_file.write("\t\t\"node_clk0\", radsim_config.GetDoubleKnobShared(\"sim_driver_period\"), SC_NS);\n") main_cpp_file.write("\tRADSimInterRad* blackbox = new RADSimInterRad(\"inter_rad_box\", inter_rad_clk_sig, cluster);\n\n") for i in range(cluster_knobs["num_rads"]): - main_cpp_file.write("\tblackbox->ConnectRadAxi(" + str(i) +");\n") + main_cpp_file.write("\tblackbox->ConnectClusterInterfaces(" + str(i) +");\n") #main_cpp_file.write("\tsc_start();\n\n") main_cpp_file.write("\n\tint start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared(\"sim_driver_period\"));\n") main_cpp_file.write("\twhile (cluster->AllRADsNotDone()) {\n") diff --git a/rad-sim/config.yml b/rad-sim/config.yml index bf12c31..0816b92 100644 --- a/rad-sim/config.yml +++ b/rad-sim/config.yml @@ -1,16 +1,40 @@ +config rad1: + dram: + num_controllers: 4 + clk_periods: [3.32, 3.32, 2.0, 2.0] + queue_sizes: [64, 64, 64, 64] + config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] + + design: + name: 'dlrm_two_rad' + noc_placement: ['dlrm_two_rad.place'] + clk_periods: [5.0, 2.0, 3.32, 1.5] + +config anotherconfig: + dram: + num_controllers: 4 + clk_periods: [3.32, 3.32, 2.0, 2.0] + queue_sizes: [64, 64, 64, 64] + config_files: ['DDR4_8Gb_x16_2400', 'DDR4_8Gb_x16_2400', 'HBM2_8Gb_x128', 'HBM2_8Gb_x128'] + + design: + name: 'dlrm_two_rad' + noc_placement: ['dlrm_two_rad.place'] + clk_periods: [5.0, 2.0, 3.32, 1.5] + noc: type: ['2d'] num_nocs: 1 clk_period: [1.0] - payload_width: [145] + payload_width: [82] topology: ['mesh'] - dim_x: [4] - dim_y: [4] + dim_x: [10] + dim_y: [10] routing_func: ['dim_order'] - vcs: [1] - vc_buffer_size: [8] + vcs: [5] + vc_buffer_size: [16] output_buffer_size: [8] - num_packet_types: [1] + num_packet_types: [5] router_uarch: ['iq'] vc_allocator: ['islip'] sw_allocator: ['islip'] @@ -27,19 +51,13 @@ noc_adapters: out_arbiter: ['priority_rr'] vc_mapping: ['direct'] -config rad1: - design: - name: 'mlp' - noc_placement: ['mlp.place'] - clk_periods: [5.0] - -cluster: - sim_driver_period: 5.0 - telemetry_log_verbosity: 2 - telemetry_traces: [] - num_rads: 1 - cluster_configs: ['rad1'] - -interfaces: - max_axis_tdata_width: 512 - axis_tuser_width: 75 +cluster: + sim_driver_period: 5.0 + telemetry_log_verbosity: 2 + telemetry_traces: ['Embedding LU', 'Mem0', 'Mem1', 'Mem2', 'Mem3', 'Feature Inter.', 'MVM first', 'MVM last'] + num_rads: 2 + cluster_configs: ['rad1', 'anotherconfig'] + cluster_topology: 'all-to-all' + inter_rad_latency: 2100 + inter_rad_bw: 102.4 + inter_rad_fifo_num_slots: 1000 \ No newline at end of file diff --git a/rad-sim/example-designs/dlrm/compiler/dlrm.py b/rad-sim/example-designs/dlrm/compiler/dlrm.py index dfeeb12..634b95a 100644 --- a/rad-sim/example-designs/dlrm/compiler/dlrm.py +++ b/rad-sim/example-designs/dlrm/compiler/dlrm.py @@ -782,6 +782,8 @@ def generate_dlrm_defines_hpp(): dlrm_defines.write("#define INST_MEM_DEPTH 2048\n") dlrm_defines.write("#define DOT_PRODUCTS LANES\n") dlrm_defines.write("#define DATAW (BITWIDTH * LANES)\n") + dlrm_defines.write("#define TDATA_ELEMS 32\n") + dlrm_defines.write("#define TDATA_WIDTH 16\n") dlrm_defines.close() diff --git a/rad-sim/example-designs/dlrm/modules/dlrm_defines.hpp b/rad-sim/example-designs/dlrm/modules/dlrm_defines.hpp index aa0cc7a..139ca30 100644 --- a/rad-sim/example-designs/dlrm/modules/dlrm_defines.hpp +++ b/rad-sim/example-designs/dlrm/modules/dlrm_defines.hpp @@ -7,3 +7,5 @@ #define INST_MEM_DEPTH 2048 #define DOT_PRODUCTS LANES #define DATAW (BITWIDTH * LANES) +#define TDATA_ELEMS 32 +#define TDATA_WIDTH 16 diff --git a/rad-sim/example-designs/dlrm/modules/mvm.cpp b/rad-sim/example-designs/dlrm/modules/mvm.cpp index de7b1e1..a21c839 100644 --- a/rad-sim/example-designs/dlrm/modules/mvm.cpp +++ b/rad-sim/example-designs/dlrm/modules/mvm.cpp @@ -315,11 +315,11 @@ void mvm::Tick() { if (rx_input_interface.tvalid.read() && rx_input_interface.tready.read()) { sc_bv tdata = rx_input_interface.tdata.read(); - data_vector tdatavector(32); + data_vector tdatavector(TDATA_ELEMS); unsigned int start_idx, end_idx; - for (unsigned int e = 0; e < 32; e++) { - start_idx = e * 16; - end_idx = (e + 1) * 16; + for (unsigned int e = 0; e < TDATA_ELEMS; e++) { + start_idx = e * TDATA_WIDTH; + end_idx = (e + 1) * TDATA_WIDTH; tdatavector[e] = tdata.range(end_idx - 1, start_idx).to_int(); } diff --git a/rad-sim/example-designs/dlrm_two_rad/compiler/dlrm.py b/rad-sim/example-designs/dlrm_two_rad/compiler/dlrm.py index dfeeb12..634b95a 100644 --- a/rad-sim/example-designs/dlrm_two_rad/compiler/dlrm.py +++ b/rad-sim/example-designs/dlrm_two_rad/compiler/dlrm.py @@ -782,6 +782,8 @@ def generate_dlrm_defines_hpp(): dlrm_defines.write("#define INST_MEM_DEPTH 2048\n") dlrm_defines.write("#define DOT_PRODUCTS LANES\n") dlrm_defines.write("#define DATAW (BITWIDTH * LANES)\n") + dlrm_defines.write("#define TDATA_ELEMS 32\n") + dlrm_defines.write("#define TDATA_WIDTH 16\n") dlrm_defines.close() diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/dlrm_defines.hpp b/rad-sim/example-designs/dlrm_two_rad/modules/dlrm_defines.hpp index aa0cc7a..139ca30 100644 --- a/rad-sim/example-designs/dlrm_two_rad/modules/dlrm_defines.hpp +++ b/rad-sim/example-designs/dlrm_two_rad/modules/dlrm_defines.hpp @@ -7,3 +7,5 @@ #define INST_MEM_DEPTH 2048 #define DOT_PRODUCTS LANES #define DATAW (BITWIDTH * LANES) +#define TDATA_ELEMS 32 +#define TDATA_WIDTH 16 diff --git a/rad-sim/example-designs/dlrm_two_rad/modules/mvm.cpp b/rad-sim/example-designs/dlrm_two_rad/modules/mvm.cpp index 93ec3ca..82dbac2 100644 --- a/rad-sim/example-designs/dlrm_two_rad/modules/mvm.cpp +++ b/rad-sim/example-designs/dlrm_two_rad/modules/mvm.cpp @@ -316,16 +316,14 @@ void mvm::Tick() { if (rx_input_interface.tvalid.read() && rx_input_interface.tready.read()) { sc_bv tdata = rx_input_interface.tdata.read(); - data_vector tdatavector(32); + data_vector tdatavector(TDATA_ELEMS); unsigned int start_idx, end_idx; - for (unsigned int e = 0; e < 32; e++) { - start_idx = e * 16; - end_idx = (e + 1) * 16; + for (unsigned int e = 0; e < TDATA_ELEMS; e++) { + start_idx = e * TDATA_WIDTH; + end_idx = (e + 1) * TDATA_WIDTH; tdatavector[e] = tdata.range(end_idx - 1, start_idx).to_int(); } - //if (layer_id == 0) std::cout << "got tdatavector on rad " << radsim_design->rad_id << ": " << tdatavector << std::endl; - // sc_bv<7> testing_width = "1000110"; - // std::cout << "testing_width.to_uint64(): " << testing_width.to_uint64() << std::endl; + if (rx_input_interface.tuser.read().range(15, 13).to_uint() == 1) { unsigned int waddr = rx_input_interface.tuser.read().range(8, 0).to_uint(); diff --git a/rad-sim/example-designs/npu/compiler/09_std_rnn_1536_8.py b/rad-sim/example-designs/npu/compiler/09_std_rnn_1536_8.py new file mode 100644 index 0000000..db29e4d --- /dev/null +++ b/rad-sim/example-designs/npu/compiler/09_std_rnn_1536_8.py @@ -0,0 +1,41 @@ +import os +os.environ["CUDA_VISIBLE_DEVICES"] = "-1" +os.environ['TF_CPP_MIN_LOG_LEVEL'] = "2" +import tensorflow as tf +from tensorflow import keras +from tensorflow.keras import layers +#import sys +#sys.path.append('../compiler/') + +from compiler import * +from npu_layers import * + +###### START OF MODEL DEFINITION ###### + +# Define constants +INPUT_SIZE = 1536 +HIDDEN_UNITS = 1536 +TIME_STEPS = 8 + +# Define model architecture using Keras Sequential Model +model = NPUSequential([ + layers.SimpleRNN(HIDDEN_UNITS, name="layer1"), +]) + +# Random test inputs for different types of layers +test_input = tf.random.uniform(shape=[TIME_STEPS, 6, INPUT_SIZE], minval=-128, maxval=127) + +# Call model on example input +y = model(test_input) + +# Print model summary +model.summary() + +####### END OF MODEL DEFINITION ####### + +# Initialize NPU +npu = initialize_npu(sys.argv) +# Compile model for NPU +model.compile_for_npu(npu, test_input) +# Run NPU flow +npu.run_flow() diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 14e6817..72e6349 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -7,7 +7,7 @@ #include #include -#include +#include RADSimConfig radsim_config; std::ostream *gWatchOut; @@ -17,10 +17,10 @@ SimTraceRecording sim_trace_probe; int sc_main(int argc, char *argv[]) { std::string radsim_knobs_filename = "/sim/radsim_knobs"; std::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename; - radsim_config.ResizeAll(1); + radsim_config.ResizeAll(2); ParseRADSimKnobs(radsim_knobs_filepath); - RADSimCluster* cluster = new RADSimCluster(1); + RADSimCluster* cluster = new RADSimCluster(2); gWatchOut = &cout; int log_verbosity = radsim_config.GetIntKnobShared("telemetry_log_verbosity"); @@ -31,8 +31,19 @@ int sc_main(int argc, char *argv[]) { sc_clock *driver_clk_sig0 = new sc_clock( "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); - mlp_system *system0 = new mlp_system("mlp_system", driver_clk_sig0, cluster->all_rads[0]); + dlrm_two_rad_system *system0 = new dlrm_two_rad_system("dlrm_two_rad_system", driver_clk_sig0, cluster->all_rads[0]); cluster->StoreSystem(system0); + sc_clock *driver_clk_sig1 = new sc_clock( + "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); + dlrm_two_rad_system *system1 = new dlrm_two_rad_system("dlrm_two_rad_system", driver_clk_sig1, cluster->all_rads[1]); + cluster->StoreSystem(system1); + + sc_clock *inter_rad_clk_sig = new sc_clock( + "node_clk0", radsim_config.GetDoubleKnobShared("sim_driver_period"), SC_NS); + RADSimInterRad* blackbox = new RADSimInterRad("inter_rad_box", inter_rad_clk_sig, cluster); + + blackbox->ConnectClusterInterfaces(0); + blackbox->ConnectClusterInterfaces(1); int start_cycle = GetSimulationCycle(radsim_config.GetDoubleKnobShared("sim_driver_period")); while (cluster->AllRADsNotDone()) { @@ -44,6 +55,11 @@ int sc_main(int argc, char *argv[]) { delete system0; delete driver_clk_sig0; + delete system1; + delete driver_clk_sig1; + delete blackbox; + delete inter_rad_clk_sig; + sc_flit scf; scf.FreeAllFlits(); Flit *f = Flit::New(); diff --git a/rad-sim/sim/radsim_defines.hpp b/rad-sim/sim/radsim_defines.hpp index 738d2a4..470ad96 100644 --- a/rad-sim/sim/radsim_defines.hpp +++ b/rad-sim/sim/radsim_defines.hpp @@ -3,14 +3,12 @@ // clang-format off #define RADSIM_ROOT_DIR "/home/bassiabn/rad-sim/rad-flow/rad-sim" -#define SINGLE_RAD 1 - // NoC-related Parameters -#define NOC_LINKS_PAYLOAD_WIDTH 145 -#define NOC_LINKS_VCID_WIDTH 1 +#define NOC_LINKS_PAYLOAD_WIDTH 82 +#define NOC_LINKS_VCID_WIDTH 3 #define NOC_LINKS_PACKETID_WIDTH 32 -#define NOC_LINKS_TYPEID_WIDTH 1 -#define NOC_LINKS_DEST_WIDTH 12 +#define NOC_LINKS_TYPEID_WIDTH 3 +#define NOC_LINKS_DEST_WIDTH 21 #define NOC_LINKS_DEST_INTERFACE_WIDTH 5 #define NOC_LINKS_WIDTH (NOC_LINKS_PAYLOAD_WIDTH + NOC_LINKS_VCID_WIDTH + NOC_LINKS_PACKETID_WIDTH + NOC_LINKS_DEST_WIDTH + NOC_LINKS_DEST_INTERFACE_WIDTH) @@ -20,19 +18,18 @@ #define AXIS_USERW 75 #define AXI4_USERW 64 // (Almost always) Constant AXI Parameters -// NOTE: AXIS_DEST_FIELDW must be NOC_LINKS_DEST_WIDTH/3 to fit RAD_DEST_ID, REMOTE_NODE_ID, and LOCAL_NODE_ID #define AXIS_STRBW 8 #define AXIS_KEEPW 8 #define AXIS_IDW NOC_LINKS_PACKETID_WIDTH #define AXIS_DESTW NOC_LINKS_DEST_WIDTH -#define AXIS_DEST_FIELDW 4 +#define AXIS_DEST_FIELDW 7 #define AXI4_IDW 8 #define AXI4_ADDRW 64 #define AXI4_LENW 8 #define AXI4_SIZEW 3 #define AXI4_BURSTW 2 #define AXI4_RESPW 2 -#define AXI4_NODE_ADDRW 4 +#define AXI4_NODE_ADDRW 7 #define AXI4_CTRLW (AXI4_LENW + AXI4_SIZEW + AXI4_BURSTW) // AXI Packetization Defines diff --git a/rad-sim/sim/radsim_inter_rad.cpp b/rad-sim/sim/radsim_inter_rad.cpp index d78ebb5..5d623e9 100644 --- a/rad-sim/sim/radsim_inter_rad.cpp +++ b/rad-sim/sim/radsim_inter_rad.cpp @@ -45,10 +45,10 @@ RADSimInterRad::~RADSimInterRad() { //Connect the axi slave interface of each portal module to its corresponding RADSimInterRad axi master interface, and vice versa void -RADSimInterRad::ConnectRadAxi(int i) { +RADSimInterRad::ConnectClusterInterfaces(int rad_id) { #ifndef SINGLE_RAD - all_axis_master_signals[i]->Connect(*(all_axis_master_ports[i]), cluster->all_systems[i]->design_dut_inst->design_top_portal_axis_slave); //Connect(axis_master_port &m, axis_slave_port &s) - all_axis_slave_signals[i]->Connect(cluster->all_systems[i]->design_dut_inst->design_top_portal_axis_master, *(all_axis_slave_ports[i])); //Connect(axis_master_port &m, axis_slave_port &s) + all_axis_master_signals[rad_id]->Connect(*(all_axis_master_ports[rad_id]), cluster->all_systems[rad_id]->design_dut_inst->design_top_portal_axis_slave); + all_axis_slave_signals[rad_id]->Connect(cluster->all_systems[rad_id]->design_dut_inst->design_top_portal_axis_master, *(all_axis_slave_ports[rad_id])); #endif } diff --git a/rad-sim/sim/radsim_inter_rad.hpp b/rad-sim/sim/radsim_inter_rad.hpp index afbd56c..9a1c2c6 100644 --- a/rad-sim/sim/radsim_inter_rad.hpp +++ b/rad-sim/sim/radsim_inter_rad.hpp @@ -52,7 +52,7 @@ class RADSimInterRad : public sc_module { RADSimInterRad(const sc_module_name &name, sc_clock *inter_rad_clk, RADSimCluster* cluster); ~RADSimInterRad(); - void ConnectRadAxi(int i); + void ConnectClusterInterfaces(int rad_id); void writeFifo(); void readFifo(); SC_HAS_PROCESS(RADSimInterRad); diff --git a/rad-sim/sim/radsim_knobs b/rad-sim/sim/radsim_knobs index 54a7d57..8c9e682 100644 --- a/rad-sim/sim/radsim_knobs +++ b/rad-sim/sim/radsim_knobs @@ -1,30 +1,49 @@ -design_name 0 mlp +design_name 0 dlrm_two_rad noc_num_nocs 0 1 noc_clk_period 0 1.0 -noc_vcs 0 1 -noc_payload_width 0 145 -noc_num_nodes 0 16 -design_noc_placement 0 mlp.place +noc_vcs 0 5 +noc_payload_width 0 82 +noc_num_nodes 0 100 +design_noc_placement 0 dlrm_two_rad.place noc_adapters_clk_period 0 1.25 noc_adapters_fifo_size 0 16 noc_adapters_obuff_size 0 2 noc_adapters_in_arbiter 0 fixed_rr noc_adapters_out_arbiter 0 priority_rr noc_adapters_vc_mapping 0 direct -design_clk_periods 0 5.0 -dram_num_controllers 0 0 -dram_clk_periods 0 2.0 -dram_queue_sizes 0 64 -dram_config_files 0 HBM2_8Gb_x128 -radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/mlp +design_clk_periods 0 5.0 2.0 3.32 1.5 +dram_num_controllers 0 4 +dram_clk_periods 0 3.32 3.32 2.0 2.0 +dram_queue_sizes 0 64 64 64 64 +dram_config_files 0 DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 +radsim_user_design_root_dir 0 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm_two_rad +design_name 1 dlrm_two_rad +noc_num_nocs 1 1 +noc_clk_period 1 1.0 +noc_vcs 1 5 +noc_payload_width 1 82 +noc_num_nodes 1 100 +design_noc_placement 1 dlrm_two_rad.place +noc_adapters_clk_period 1 1.25 +noc_adapters_fifo_size 1 16 +noc_adapters_obuff_size 1 2 +noc_adapters_in_arbiter 1 fixed_rr +noc_adapters_out_arbiter 1 priority_rr +noc_adapters_vc_mapping 1 direct +design_clk_periods 1 5.0 2.0 3.32 1.5 +dram_num_controllers 1 4 +dram_clk_periods 1 3.32 3.32 2.0 2.0 +dram_queue_sizes 1 64 64 64 64 +dram_config_files 1 DDR4_8Gb_x16_2400 DDR4_8Gb_x16_2400 HBM2_8Gb_x128 HBM2_8Gb_x128 +radsim_user_design_root_dir 1 /home/bassiabn/rad-sim/rad-flow/rad-sim/example-designs/dlrm_two_rad radsim_root_dir /home/bassiabn/rad-sim/rad-flow/rad-sim sim_driver_period 5.0 telemetry_log_verbosity 2 -telemetry_traces -num_rads 1 -cluster_configs rad1 +telemetry_traces Embedding LU Mem0 Mem1 Mem2 Mem3 Feature Inter. MVM first MVM last +num_rads 2 +cluster_configs rad1 anotherconfig cluster_topology all-to-all -inter_rad_latency_cycles 1 +inter_rad_latency_cycles 420 inter_rad_bw_accept_cycles 1 inter_rad_bw_total_cycles 1 inter_rad_fifo_num_slots 1000 diff --git a/rad-sim/sim/radsim_module.cpp b/rad-sim/sim/radsim_module.cpp index d74d7b9..73a1e0d 100644 --- a/rad-sim/sim/radsim_module.cpp +++ b/rad-sim/sim/radsim_module.cpp @@ -1,10 +1,10 @@ -#include //AKB: moved to header file +#include #include -RADSimModule::RADSimModule(const sc_module_name &name, RADSimDesignContext* radsim_design) : sc_module(name) { //AKB radsim_design +RADSimModule::RADSimModule(const sc_module_name &name, RADSimDesignContext* radsim_design) : sc_module(name) { module_name = name; std::string name_str(static_cast(name)); - radsim_design->RegisterModule(name_str, this); //AKB to ptr + radsim_design->RegisterModule(name_str, this); _num_noc_axis_slave_ports = 0; _num_noc_axis_master_ports = 0; _num_noc_aximm_slave_ports = 0; @@ -17,14 +17,14 @@ void RADSimModule::RegisterAxisSlavePort(std::string &port_name, axis_slave_port *port_ptr, unsigned int port_dataw, unsigned int port_type) { - //std::cout << "Adding AxisSlavePort named: " << port_name << endl; //AKB ADDED TO TEST, remove after + //std::cout << "Adding AxisSlavePort named: " << port_name << endl; _ordered_axis_slave_ports.push_back(port_name); _axis_slave_ports[port_name] = port_ptr; _ports_dataw[port_name] = port_dataw; _ports_types[port_name] = port_type; _ports_is_aximm[port_name] = false; _num_noc_axis_slave_ports++; - //std::cout << "Added AxisSlavePort named: " << _axis_slave_ports[port_name] << endl; //AKB ADDED TO TEST, remove after + //std::cout << "Added AxisSlavePort named: " << _axis_slave_ports[port_name] << endl; } void RADSimModule::RegisterAxisMasterPort(std::string &port_name, From 392280f56f5bc1e169ff6b72eed56f89bef7b26c Mon Sep 17 00:00:00 2001 From: abnashkb Date: Fri, 25 Oct 2024 02:42:08 -0400 Subject: [PATCH 124/127] Added parameterization, cleaned comments --- rad-sim/config.py | 5 +++-- rad-sim/example-designs/dlrm/dlrm_driver.cpp | 2 +- rad-sim/example-designs/dlrm/dlrm_driver.hpp | 2 +- .../example-designs/dlrm_two_rad/dlrm_driver.cpp | 2 +- .../example-designs/dlrm_two_rad/dlrm_driver.hpp | 2 +- .../example-designs/dlrm_two_rad/dlrm_top.hpp | 2 +- rad-sim/example-designs/mlp/mlp_driver.cpp | 2 +- rad-sim/example-designs/mlp/mlp_driver.hpp | 2 +- rad-sim/sim/dram/mem_controller.cpp | 4 ++-- rad-sim/sim/dram/mem_controller_test.cpp | 10 +++++----- rad-sim/sim/dram/mem_controller_test.hpp | 6 +++--- rad-sim/sim/main.cpp | 5 +++-- rad-sim/sim/noc/aximm_master_adapter.cpp | 2 +- rad-sim/sim/noc/aximm_slave_adapter.cpp | 2 +- rad-sim/sim/noc/aximm_slave_adapter.hpp | 2 +- rad-sim/sim/noc/axis_master_adapter.cpp | 2 +- rad-sim/sim/noc/axis_master_adapter.hpp | 2 +- rad-sim/sim/noc/radsim_noc.hpp | 5 ++--- rad-sim/sim/radsim_cluster.cpp | 16 ++++++++-------- rad-sim/sim/radsim_cluster.hpp | 2 +- rad-sim/sim/radsim_config.cpp | 3 +-- rad-sim/sim/radsim_module.hpp | 6 +++--- rad-sim/sim/radsim_utils.cpp | 2 +- 23 files changed, 44 insertions(+), 44 deletions(-) diff --git a/rad-sim/config.py b/rad-sim/config.py index 80d6578..5c0a507 100644 --- a/rad-sim/config.py +++ b/rad-sim/config.py @@ -379,6 +379,7 @@ def generate_radsim_main(design_names, radsim_knobs): main_cpp_file.write("#include \n\n") for design_name in design_names: #iterate thru set of design names main_cpp_file.write("#include <" + design_name + "_system.hpp>\n") + main_cpp_file.write("#define NUM_RADS " + str(cluster_knobs["num_rads"]) + " \n") main_cpp_file.write("\nRADSimConfig radsim_config;\n") #main_cpp_file.write("RADSimDesignContext radsim_design;\n") main_cpp_file.write("std::ostream *gWatchOut;\n") @@ -387,9 +388,9 @@ def generate_radsim_main(design_names, radsim_knobs): main_cpp_file.write("int sc_main(int argc, char *argv[]) {\n") main_cpp_file.write("\tstd::string radsim_knobs_filename = \"/sim/radsim_knobs\";\n") main_cpp_file.write("\tstd::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename;\n") - main_cpp_file.write("\tradsim_config.ResizeAll(" + str(cluster_knobs["num_rads"]) + ");\n") + main_cpp_file.write("\tradsim_config.ResizeAll(NUM_RADS);\n") main_cpp_file.write("\tParseRADSimKnobs(radsim_knobs_filepath);\n\n") - main_cpp_file.write("\tRADSimCluster* cluster = new RADSimCluster(" + str(cluster_knobs["num_rads"]) + ");\n\n") + main_cpp_file.write("\tRADSimCluster* cluster = new RADSimCluster(NUM_RADS);\n\n") main_cpp_file.write("\tgWatchOut = &cout;\n") main_cpp_file.write("\tint log_verbosity = radsim_config.GetIntKnobShared(\"telemetry_log_verbosity\");\n") main_cpp_file.write("\tsim_log.SetLogSettings(log_verbosity, \"sim.log\");\n\n") diff --git a/rad-sim/example-designs/dlrm/dlrm_driver.cpp b/rad-sim/example-designs/dlrm/dlrm_driver.cpp index 7f31c15..1943dee 100644 --- a/rad-sim/example-designs/dlrm/dlrm_driver.cpp +++ b/rad-sim/example-designs/dlrm/dlrm_driver.cpp @@ -72,7 +72,7 @@ bool ParseOutputs(std::vector> &fi_outputs, } dlrm_driver::dlrm_driver(const sc_module_name &name, RADSimDesignContext* radsim_design_) : sc_module(name) { - this->radsim_design = radsim_design_; //AKB ADDED + this->radsim_design = radsim_design_; // Parse design configuration (number of layers & number of MVM per layer) std::string design_root_dir = diff --git a/rad-sim/example-designs/dlrm/dlrm_driver.hpp b/rad-sim/example-designs/dlrm/dlrm_driver.hpp index c0531d9..409152d 100644 --- a/rad-sim/example-designs/dlrm/dlrm_driver.hpp +++ b/rad-sim/example-designs/dlrm/dlrm_driver.hpp @@ -19,7 +19,7 @@ class dlrm_driver : public sc_module { unsigned int _num_feature_interaction_outputs; unsigned int _num_mlp_outputs; unsigned int _start_cycle, _end_cycle; - RADSimDesignContext* radsim_design; //AKB ADDED + RADSimDesignContext* radsim_design; public: sc_in clk; diff --git a/rad-sim/example-designs/dlrm_two_rad/dlrm_driver.cpp b/rad-sim/example-designs/dlrm_two_rad/dlrm_driver.cpp index 7f31c15..1943dee 100644 --- a/rad-sim/example-designs/dlrm_two_rad/dlrm_driver.cpp +++ b/rad-sim/example-designs/dlrm_two_rad/dlrm_driver.cpp @@ -72,7 +72,7 @@ bool ParseOutputs(std::vector> &fi_outputs, } dlrm_driver::dlrm_driver(const sc_module_name &name, RADSimDesignContext* radsim_design_) : sc_module(name) { - this->radsim_design = radsim_design_; //AKB ADDED + this->radsim_design = radsim_design_; // Parse design configuration (number of layers & number of MVM per layer) std::string design_root_dir = diff --git a/rad-sim/example-designs/dlrm_two_rad/dlrm_driver.hpp b/rad-sim/example-designs/dlrm_two_rad/dlrm_driver.hpp index c0531d9..409152d 100644 --- a/rad-sim/example-designs/dlrm_two_rad/dlrm_driver.hpp +++ b/rad-sim/example-designs/dlrm_two_rad/dlrm_driver.hpp @@ -19,7 +19,7 @@ class dlrm_driver : public sc_module { unsigned int _num_feature_interaction_outputs; unsigned int _num_mlp_outputs; unsigned int _start_cycle, _end_cycle; - RADSimDesignContext* radsim_design; //AKB ADDED + RADSimDesignContext* radsim_design; public: sc_in clk; diff --git a/rad-sim/example-designs/dlrm_two_rad/dlrm_top.hpp b/rad-sim/example-designs/dlrm_two_rad/dlrm_top.hpp index e2642e2..71d699e 100644 --- a/rad-sim/example-designs/dlrm_two_rad/dlrm_top.hpp +++ b/rad-sim/example-designs/dlrm_two_rad/dlrm_top.hpp @@ -22,7 +22,7 @@ class dlrm_top : public RADSimDesignTop { std::vector axis_sig; std::vector mem_clks; - RADSimDesignContext* radsim_design; //AKB ADDED + RADSimDesignContext* radsim_design; public: sc_in rst; diff --git a/rad-sim/example-designs/mlp/mlp_driver.cpp b/rad-sim/example-designs/mlp/mlp_driver.cpp index 1f0e387..9a9df9a 100644 --- a/rad-sim/example-designs/mlp/mlp_driver.cpp +++ b/rad-sim/example-designs/mlp/mlp_driver.cpp @@ -20,7 +20,7 @@ bool ParseIO(std::vector>& data_vec, std::string& io_filename) } mlp_driver::mlp_driver(const sc_module_name& name, RADSimDesignContext* radsim_design_) : sc_module(name) { - this->radsim_design = radsim_design_; //AKB ADDED + this->radsim_design = radsim_design_; start_cycle = 0; end_cycle = 0; diff --git a/rad-sim/example-designs/mlp/mlp_driver.hpp b/rad-sim/example-designs/mlp/mlp_driver.hpp index b6ab096..5a01e54 100644 --- a/rad-sim/example-designs/mlp/mlp_driver.hpp +++ b/rad-sim/example-designs/mlp/mlp_driver.hpp @@ -18,7 +18,7 @@ class mlp_driver : public sc_module { std::vector num_mvms; std::vector>> test_inputs; std::vector> golden_outputs; - RADSimDesignContext* radsim_design; //AKB ADDED + RADSimDesignContext* radsim_design; public: sc_in clk; diff --git a/rad-sim/sim/dram/mem_controller.cpp b/rad-sim/sim/dram/mem_controller.cpp index dd9e03b..efe1f4b 100644 --- a/rad-sim/sim/dram/mem_controller.cpp +++ b/rad-sim/sim/dram/mem_controller.cpp @@ -31,8 +31,8 @@ void mem_controller::InitializeMemoryContents(std::string &init_filename) { } mem_controller::mem_controller(const sc_module_name &name, unsigned int dram_id, - RADSimDesignContext* radsim_design, std::string init_filename) //AKB added radsim_design - : RADSimModule(name, radsim_design), mem_clk("mem_clk"), rst("rst") { //AKB added radsim_design + RADSimDesignContext* radsim_design, std::string init_filename) + : RADSimModule(name, radsim_design), mem_clk("mem_clk"), rst("rst") { std::string config_file = radsim_config.GetStringKnobShared("radsim_root_dir") + diff --git a/rad-sim/sim/dram/mem_controller_test.cpp b/rad-sim/sim/dram/mem_controller_test.cpp index 02ab9c1..cd4645a 100644 --- a/rad-sim/sim/dram/mem_controller_test.cpp +++ b/rad-sim/sim/dram/mem_controller_test.cpp @@ -4,10 +4,10 @@ mem_controller_test::mem_controller_test( const sc_module_name &name, unsigned int num_cmds, unsigned int test_mode, unsigned int burst_size, unsigned int num_channels, unsigned int mem_capacity_mb, unsigned int num_used_channels, - unsigned int addressable_word_size_bytes, double clk_period, RADSimDesignContext* radsim_design) //AKB added last arg + unsigned int addressable_word_size_bytes, double clk_period, RADSimDesignContext* radsim_design) : sc_module(name) { - this -> radsim_design = radsim_design; //AKB ADDED + this -> radsim_design = radsim_design; tx_interface.init(num_channels); @@ -318,7 +318,7 @@ void mem_controller_test::assign() { } } -mem_controller_system::mem_controller_system(const sc_module_name &name, RADSimDesignContext* radsim_design) //AKB added last arg +mem_controller_system::mem_controller_system(const sc_module_name &name, RADSimDesignContext* radsim_design) : sc_module(name) { double clk_period = 2.0; double mem_clk_period = 1.0; @@ -330,7 +330,7 @@ mem_controller_system::mem_controller_system(const sc_module_name &name, RADSimD clk_sig = new sc_clock("clk0", clk_period, SC_NS); mem_clk_sig = new sc_clock("mem_clk", mem_clk_period, SC_NS); - dut_inst = new mem_controller("mem_controller", 0, radsim_design); //AKB added last arg + dut_inst = new mem_controller("mem_controller", 0, radsim_design); dut_inst->clk(*clk_sig); dut_inst->mem_clk(*mem_clk_sig); dut_inst->rst(rst_sig); @@ -341,7 +341,7 @@ mem_controller_system::mem_controller_system(const sc_module_name &name, RADSimD test_inst = new mem_controller_test( "mem_controller_test", total_cmds, mode, burst_size, num_channels, dut_inst->GetMemCapacity(), num_used_channels, - dut_inst->GetAddressableWordSize(), clk_period, radsim_design); //AKB added radsim_design + dut_inst->GetAddressableWordSize(), clk_period, radsim_design); test_inst->clk(*clk_sig); test_inst->rst(rst_sig); diff --git a/rad-sim/sim/dram/mem_controller_test.hpp b/rad-sim/sim/dram/mem_controller_test.hpp index e62b7c8..ab8cffb 100644 --- a/rad-sim/sim/dram/mem_controller_test.hpp +++ b/rad-sim/sim/dram/mem_controller_test.hpp @@ -28,7 +28,7 @@ class mem_controller_test : public sc_module { sc_in clk; sc_out rst; sc_vector tx_interface; - RADSimDesignContext* radsim_design; //AKB ADDED + RADSimDesignContext* radsim_design; mem_controller_test(const sc_module_name &name, unsigned int num_cmds, unsigned int test_mode, unsigned int burst_size, @@ -36,7 +36,7 @@ class mem_controller_test : public sc_module { unsigned int num_used_channels, unsigned int addressable_word_size_bytes, double clk_peiod, - RADSimDesignContext* radsim_design); //AKB ADDED last arg + RADSimDesignContext* radsim_design); ~mem_controller_test(); void aw_source(); @@ -59,6 +59,6 @@ class mem_controller_system : public sc_module { sc_clock *clk_sig; sc_clock *mem_clk_sig; - mem_controller_system(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB ADDED last arg + mem_controller_system(const sc_module_name &name, RADSimDesignContext* radsim_design); ~mem_controller_system(); }; \ No newline at end of file diff --git a/rad-sim/sim/main.cpp b/rad-sim/sim/main.cpp index 72e6349..3384f44 100644 --- a/rad-sim/sim/main.cpp +++ b/rad-sim/sim/main.cpp @@ -8,6 +8,7 @@ #include #include +#define NUM_RADS 2 RADSimConfig radsim_config; std::ostream *gWatchOut; @@ -17,10 +18,10 @@ SimTraceRecording sim_trace_probe; int sc_main(int argc, char *argv[]) { std::string radsim_knobs_filename = "/sim/radsim_knobs"; std::string radsim_knobs_filepath = RADSIM_ROOT_DIR + radsim_knobs_filename; - radsim_config.ResizeAll(2); + radsim_config.ResizeAll(NUM_RADS); ParseRADSimKnobs(radsim_knobs_filepath); - RADSimCluster* cluster = new RADSimCluster(2); + RADSimCluster* cluster = new RADSimCluster(NUM_RADS); gWatchOut = &cout; int log_verbosity = radsim_config.GetIntKnobShared("telemetry_log_verbosity"); diff --git a/rad-sim/sim/noc/aximm_master_adapter.cpp b/rad-sim/sim/noc/aximm_master_adapter.cpp index 327270d..200ef3a 100644 --- a/rad-sim/sim/noc/aximm_master_adapter.cpp +++ b/rad-sim/sim/noc/aximm_master_adapter.cpp @@ -9,7 +9,7 @@ aximm_master_adapter::aximm_master_adapter( : sc_module(name) { // Initialize basic adapter member variables - _rad_id = rad_id; //AKB added + _rad_id = rad_id; _node_id = node_id; _network_id = network_id; _node_period = node_period; diff --git a/rad-sim/sim/noc/aximm_slave_adapter.cpp b/rad-sim/sim/noc/aximm_slave_adapter.cpp index 9948487..03738c8 100644 --- a/rad-sim/sim/noc/aximm_slave_adapter.cpp +++ b/rad-sim/sim/noc/aximm_slave_adapter.cpp @@ -11,7 +11,7 @@ aximm_slave_adapter::aximm_slave_adapter( : sc_module(name) { // Initialize basic adapter member variables - _rad_id = rad_id; //AKB added + _rad_id = rad_id; _node_id = node_id; _network_id = network_id; _node_period = node_period; diff --git a/rad-sim/sim/noc/aximm_slave_adapter.hpp b/rad-sim/sim/noc/aximm_slave_adapter.hpp index 3e7afd7..7d05d8d 100644 --- a/rad-sim/sim/noc/aximm_slave_adapter.hpp +++ b/rad-sim/sim/noc/aximm_slave_adapter.hpp @@ -51,7 +51,7 @@ class aximm_slave_adapter : public sc_module { private: // The node ID, network ID and data width of the node this adapter is // connected to - unsigned int _rad_id; //AKB added + unsigned int _rad_id; int _node_id; int _network_id; int _interface_dataw; diff --git a/rad-sim/sim/noc/axis_master_adapter.cpp b/rad-sim/sim/noc/axis_master_adapter.cpp index ea909b1..26bd400 100644 --- a/rad-sim/sim/noc/axis_master_adapter.cpp +++ b/rad-sim/sim/noc/axis_master_adapter.cpp @@ -8,7 +8,7 @@ axis_master_adapter::axis_master_adapter( bool lookahead_routing, bool wait_for_tail_credit, map *ejected_flits) : sc_module(name) { - _rad_id = rad_id; //AKB added + _rad_id = rad_id; _node_id = node_id; _network_id = network_id; _num_axis_interfaces = interface_types.size(); diff --git a/rad-sim/sim/noc/axis_master_adapter.hpp b/rad-sim/sim/noc/axis_master_adapter.hpp index 26156df..38d81ba 100644 --- a/rad-sim/sim/noc/axis_master_adapter.hpp +++ b/rad-sim/sim/noc/axis_master_adapter.hpp @@ -16,7 +16,7 @@ class axis_master_adapter : public sc_module { private: - unsigned int _rad_id; //AKB added for config-file related changes + unsigned int _rad_id; unsigned int _node_id; unsigned int _network_id; unsigned int _num_axis_interfaces; diff --git a/rad-sim/sim/noc/radsim_noc.hpp b/rad-sim/sim/noc/radsim_noc.hpp index f2f5054..b6328b9 100644 --- a/rad-sim/sim/noc/radsim_noc.hpp +++ b/rad-sim/sim/noc/radsim_noc.hpp @@ -15,8 +15,7 @@ #include #include -//#include //AKB ADDED -class RADSimDesignContext; //AKB ADDED +class RADSimDesignContext; // NoC SystemC wrapper around all Booksim-related datastructures class radsim_noc : public sc_module { @@ -56,7 +55,7 @@ class radsim_noc : public sc_module { std::vector &axis_slave_adapter_info, std::vector &aximm_master_adapter_info, std::vector &aximm_slave_adapter_info, - RADSimDesignContext* radsim_design); //AKB: added last argument + RADSimDesignContext* radsim_design); ~radsim_noc(); Network *GetNetwork(); diff --git a/rad-sim/sim/radsim_cluster.cpp b/rad-sim/sim/radsim_cluster.cpp index b7063b0..74a2288 100644 --- a/rad-sim/sim/radsim_cluster.cpp +++ b/rad-sim/sim/radsim_cluster.cpp @@ -2,8 +2,8 @@ RADSimCluster::RADSimCluster(int num_rads) { this->num_rads = num_rads; - for (int i = 0; i < num_rads; i++) { - RADSimDesignContext* new_rad = new RADSimDesignContext(i); //pass in unique RAD ID + for (int rad_id = 0; rad_id < num_rads; rad_id++) { + RADSimDesignContext* new_rad = new RADSimDesignContext(rad_id); //pass in unique RAD ID all_rads.push_back(new_rad); } //TODO: use configuration parameters to change topology and connectivity models @@ -12,14 +12,14 @@ RADSimCluster::RADSimCluster(int num_rads) { } RADSimCluster::~RADSimCluster() { - for (int i = 0; i < num_rads; i++) { - delete all_rads[i]; //free the RADs allocated + for (int rad_id = 0; rad_id < num_rads; rad_id++) { + delete all_rads[rad_id]; //free the RADs allocated } } RADSimDesignContext* -RADSimCluster::CreateNewRAD(unsigned int i) { - RADSimDesignContext* new_rad = new RADSimDesignContext(i); +RADSimCluster::CreateNewRAD(unsigned int rad_id) { + RADSimDesignContext* new_rad = new RADSimDesignContext(rad_id); num_rads++; all_rads.push_back(new_rad); return new_rad; @@ -37,8 +37,8 @@ RADSimCluster::SetConnModel(inter_rad_conn_model_type inter_rad_conn_model) { bool RADSimCluster::AllRADsNotDone() { - for (int i = 0; i < num_rads; i++) { - if (!(all_rads[i]->is_rad_done())) { + for (int rad_id = 0; rad_id < num_rads; rad_id++) { + if (!(all_rads[rad_id]->is_rad_done())) { return true; } } diff --git a/rad-sim/sim/radsim_cluster.hpp b/rad-sim/sim/radsim_cluster.hpp index 4981a0c..d4f4456 100644 --- a/rad-sim/sim/radsim_cluster.hpp +++ b/rad-sim/sim/radsim_cluster.hpp @@ -31,7 +31,7 @@ class RADSimCluster { RADSimCluster(int num_rads); ~RADSimCluster(); - RADSimDesignContext* CreateNewRAD(unsigned int i); //returns ptr to the newly added RAD + RADSimDesignContext* CreateNewRAD(unsigned int rad_id); //returns ptr to the newly added RAD void SetTopo(inter_rad_topo_type inter_rad_topo); void SetConnModel(inter_rad_conn_model_type inter_rad_topo); bool AllRADsNotDone(); diff --git a/rad-sim/sim/radsim_config.cpp b/rad-sim/sim/radsim_config.cpp index 562050c..7d6ec00 100644 --- a/rad-sim/sim/radsim_config.cpp +++ b/rad-sim/sim/radsim_config.cpp @@ -308,7 +308,7 @@ bool RADSimConfig::HasStringVectorKnobShared(const std::string &key) { return (_string_vector_knobs_shared.find(key) != _string_vector_knobs_shared.end()); } -//AKB: per-RAD functions to check if has certain knob defined for that RAD +//per-RAD functions to check if has certain knob defined for that RAD // Check if an integer configuration knob is defined bool RADSimConfig::HasIntKnobPerRad(const std::string &key, unsigned int rad_id) { return (_int_knobs_per_rad[rad_id].find(key) != _int_knobs_per_rad[rad_id].end()); @@ -460,5 +460,4 @@ void ParseRADSimKnobs(const std::string &knobs_filename) { exit(1); } } - //radsim_config.AddDoubleKnob("max_period", max_period); //AKB: removing, using sim_driver_period instead } \ No newline at end of file diff --git a/rad-sim/sim/radsim_module.hpp b/rad-sim/sim/radsim_module.hpp index 804584b..3bd0ab0 100644 --- a/rad-sim/sim/radsim_module.hpp +++ b/rad-sim/sim/radsim_module.hpp @@ -1,6 +1,6 @@ #pragma once -//#include //AKB: added +//#include #include #include @@ -8,7 +8,7 @@ #include #include -class RADSimDesignContext; //AKB ADDED +class RADSimDesignContext; class RADSimModule : public sc_module { public: @@ -29,7 +29,7 @@ class RADSimModule : public sc_module { sc_in clk; - RADSimModule(const sc_module_name &name, RADSimDesignContext* radsim_design); //AKB: added last argument + RADSimModule(const sc_module_name &name, RADSimDesignContext* radsim_design); ~RADSimModule(); virtual void RegisterModuleInfo() = 0; void RegisterAxisSlavePort(std::string &port_name, axis_slave_port *port_ptr, diff --git a/rad-sim/sim/radsim_utils.cpp b/rad-sim/sim/radsim_utils.cpp index c326ee6..497ed21 100644 --- a/rad-sim/sim/radsim_utils.cpp +++ b/rad-sim/sim/radsim_utils.cpp @@ -7,7 +7,7 @@ int GetSimulationCycle(double period) { } int GetSimulationCycle() { - double period = radsim_config.GetDoubleKnobShared("sim_driver_period"); //"max_period"); //AKB; replaced with max_period + double period = radsim_config.GetDoubleKnobShared("sim_driver_period"); sc_time t = sc_time_stamp(); int cycle = (int)ceil(t.value() / period / 1000); return cycle; From eaede59868c50d8d8c7c15a1a36d18c500f3cb3c Mon Sep 17 00:00:00 2001 From: abnashkb Date: Fri, 25 Oct 2024 03:10:59 -0400 Subject: [PATCH 125/127] Cleaned up comments in radsim_module.hpp --- rad-sim/sim/radsim_module.hpp | 2 -- 1 file changed, 2 deletions(-) diff --git a/rad-sim/sim/radsim_module.hpp b/rad-sim/sim/radsim_module.hpp index 3bd0ab0..df00a1f 100644 --- a/rad-sim/sim/radsim_module.hpp +++ b/rad-sim/sim/radsim_module.hpp @@ -1,7 +1,5 @@ #pragma once -//#include - #include #include #include From 9f02da50d381bfa5e112829f6185a63b9e4380b6 Mon Sep 17 00:00:00 2001 From: abnashkb Date: Tue, 29 Oct 2024 00:55:02 -0400 Subject: [PATCH 126/127] Fixed early termination in dlrm design --- .../dlrm/modules/custom_feature_interaction.cpp | 5 ----- 1 file changed, 5 deletions(-) diff --git a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp index b34ffb4..79522bc 100644 --- a/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp +++ b/rad-sim/example-designs/dlrm/modules/custom_feature_interaction.cpp @@ -283,11 +283,6 @@ void custom_feature_interaction::Tick() { _ofifo_full[ch_id].write(_output_fifos[ch_id].size() >= _fifos_depth - 2); } received_responses.write(_num_received_responses); - - if (non_empty_output_fifo && got_all_mem_responses) { - radsim_design->set_rad_done(); - } - wait(); } } From 1aa6f4ed582dd069949c2a4abe3f1d47034d184c Mon Sep 17 00:00:00 2001 From: abnashkb Date: Thu, 21 Nov 2024 02:58:59 -0500 Subject: [PATCH 127/127] Updated dlrm_two_rad doc --- docs/rad-sim-two-rad-dlrm-example.rst | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/docs/rad-sim-two-rad-dlrm-example.rst b/docs/rad-sim-two-rad-dlrm-example.rst index 1694fff..0995786 100644 --- a/docs/rad-sim-two-rad-dlrm-example.rst +++ b/docs/rad-sim-two-rad-dlrm-example.rst @@ -12,7 +12,7 @@ You can configure RAD-Sim for the two-RAD DLRM design simulation using the follo .. code-block:: bash $ cd /rad-sim - $ python config.py dlrm #dlrm is name of design directory within example-designs parent directory + $ python config.py dlrm_two_rad #dlrm_two_rad is name of design directory within example-designs parent directory Running RAD-Sim ---------------- @@ -24,7 +24,7 @@ You can then simulate this two-RAD DLRM example design following these steps: .. code-block:: bash - $ cd /rad-sim/example-designs/dlrm/compiler + $ cd /rad-sim/example-designs/dlrm_two_rad/compiler $ python dlrm.py 2. Run RAD-Sim simulation: @@ -33,14 +33,16 @@ You can then simulate this two-RAD DLRM example design following these steps: $ cd /rad-sim/build $ make run - # .... - # dlrm_system.dut.feature_interaction_inst: Got all memory responses at cycle 6101! + # Info: /OSCI/SystemC: Simulation stopped by user. + # Simulation Cycles from main.cpp = 20390 + # [100%] Built target run + # dlrm_system.driver: Finished sending all inputs to embedding lookup module! + # dlrm_system.dut.feature_interaction_inst: Got all memory responses at cycle 6113! # [==================================================] 100 % # Got 2048 output(s)! # Simulation PASSED! All outputs matching! - # Simulated 20377 cycle(s) - # stopping + # Simulated 19958 cycle(s) # Info: /OSCI/SystemC: Simulation stopped by user. - # Simulation Cycles from main.cpp = 20390 + # Simulation Cycles from main.cpp = 19971 # [100%] Built target run \ No newline at end of file