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mod800.pld
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mod800.pld
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GAL22V10
Mod800
; =============================================================================
;
; Copyright (c) 2024 Andrew T. Canaday
;
; This file is part of VGA-22V10, which is licensed under the MIT license.
;
; Permission is hereby granted, free of charge, to any person obtaining a copy
; of this software and associated documentation files (the "Software"), to
; deal in the Software without restriction, including without limitation the
; rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
; sell copies of the Software, and to permit persons to whom the Software is
; furnished to do so, subject to the following conditions:
;
; The above copyright notice and this permission notice shall be included in
; all copies or substantial portions of the Software.
;
; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
; AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
; LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
; FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
; IN THE SOFTWARE.
;
; -----------------------------------------------------------------------------
CLK NC NC NC NC NC NC NC NC NC NC GND
RST Q0 Q1 Q2 Q3 Q9 Q8 Q7 Q6 Q5 Q4 VCC
Q0.R = /RST * /Q0
Q1.R = /RST * Q1 * /Q0 +
/RST * /Q1 * Q0
Q2.R = /RST * Q2 * /Q1 +
/RST * Q2 * /Q0 +
/RST * /Q2 * Q1 * Q0
Q3.R = /RST * Q3 * /Q2 +
/RST * Q3 * /Q1 +
/RST * Q3 * /Q0 +
/RST * /Q3 * Q2 * Q1 * Q0
Q4.R = /RST * Q4 * /Q3 +
/RST * Q4 * /Q2 +
/RST * Q4 * /Q1 +
/RST * Q4 * /Q0 +
/RST * /Q4 * Q3 * Q2 * Q1 * Q0
Q5.R = /RST * Q5 * /Q4 +
/RST * Q5 * /Q3 +
/RST * Q5 * /Q2 +
/RST * Q5 * /Q1 +
/RST * Q5 * /Q0 +
/RST * /Q5 * Q4 * Q3 * Q2 * Q1 * Q0
Q6.R = /RST * Q6 * /Q5 +
/RST * Q6 * /Q4 +
/RST * Q6 * /Q3 +
/RST * Q6 * /Q2 +
/RST * Q6 * /Q1 +
/RST * Q6 * /Q0 +
/RST * /Q6 * Q5 * Q4 * Q3 * Q2 * Q1 * Q0
Q7.R = /RST * Q7 * /Q6 +
/RST * Q7 * /Q5 +
/RST * Q7 * /Q4 +
/RST * Q7 * /Q3 +
/RST * Q7 * /Q2 +
/RST * Q7 * /Q1 +
/RST * Q7 * /Q0 +
/RST * /Q7 * Q6 * Q5 * Q4 * Q3 * Q2 * Q1 * Q0
Q8.R = /RST * Q8 * /Q7 +
/RST * Q8 * /Q6 +
/RST * Q8 * /Q5 +
/RST * Q8 * /Q4 +
/RST * Q8 * /Q3 +
/RST * Q8 * /Q2 +
/RST * Q8 * /Q1 +
/RST * Q8 * /Q0 +
/RST * /Q8 * Q7 * Q6 * Q5 * Q4 * Q3 * Q2 * Q1 * Q0
Q9.R = /RST * Q9 * /Q8 +
/RST * Q9 * /Q7 +
/RST * Q9 * /Q6 +
/RST * Q9 * /Q5 +
/RST * Q9 * /Q4 +
/RST * Q9 * /Q3 +
/RST * Q9 * /Q2 +
/RST * Q9 * /Q1 +
/RST * Q9 * /Q0 +
/RST * /Q9 * Q8 * Q7 * Q6 * Q5 * Q4 * Q3 * Q2 * Q1 * Q0
AR = Q9 * Q8 * /Q7 * /Q6 * Q5 * /Q4 * /Q3 * /Q2 * /Q1 * /Q0
DESCRIPTION
Synchronous mod 800 counter. Asynchronous reset when RST is HIGH.