Description: A RTL-based project in Verilog that shows real-time video captured by a CMOS camera OV7670 and displayed on a monitor through VGA at 640 x 480 resolution, 30 fps.
- Nexys A7-100T FPGA Developmental Board (1)
- Female-Female Jumper Pins (16)
- Female-Male Jumper Pins (4)
- 4.7k Ohm Pull-Resistors (2)
- Male-Male VGA Video Connector (1)
- OV7670 CMOS VGA (640x480) Camera (1)
- Monitor that supports VGA (1)
- Breadboard (1)
- Vivado 2019.2